File content as of revision 8:dc1dac5c7abd:

#if defined(TARGET_STM32F3_spi1)
/*

This file is licensed under Apache 2.0 license.
(C) 2016 dinau

*/
#include "spi_dma.h"

#define DMAx_CLK_ENABLE()     __DMA2_CLK_ENABLE()    
#define SPIx_TX_DMA_CHANNEL   DMA2_Channel2
#define SPIx_RX_DMA_CHANNEL   DMA2_Channel1
#define SPIx_DMA_TX_IRQn      DMA2_Channel2_IRQn	
#define SPIx_DMA_RX_IRQn      DMA2_Channel1_IRQn	
#define DMAx_TX_IRQHandler    DMA2_Channel2_IRQHandler
#define DMAx_RX_IRQHandler    DMA2_Channel1_IRQHandler

#define readReg( reg, mask)  (  (reg) & (mask)  )	


void spi_dma_get_info( SPI_TypeDef *spi )
{
	SPI_HandleTypeDef *hspi;
	if( spi == SPI3 ){
		hspi = &Spi3Handle;
	} 
	#if 0
	else {
		hspi = &Spi2Handle;
	}
	#endif
    hspi->Instance = spi;
    hspi->Init.Mode              = readReg(spi->CR1, SPI_MODE_MASTER); 
    hspi->Init.BaudRatePrescaler = readReg(spi->CR1, SPI_CR1_BR);
    hspi->Init.Direction         = readReg(spi->CR1, SPI_CR1_BIDIMODE); 
    hspi->Init.CLKPhase          = readReg(spi->CR1, SPI_CR1_CPHA);
    hspi->Init.CLKPolarity       = readReg(spi->CR1, SPI_CR1_CPOL);
    hspi->Init.CRCCalculation    = readReg(spi->CR1, SPI_CR1_CRCEN);
    hspi->Init.CRCPolynomial     = spi->CRCPR & 0xFFFF;
    hspi->Init.DataSize          = readReg(spi->CR1, SPI_CR2_DS);
    hspi->Init.FirstBit          = SPI_FIRSTBIT_MSB;
    hspi->Init.NSS               = readReg(spi->CR1, SPI_CR1_SSM);
    hspi->Init.TIMode            = SPI_TIMODE_DISABLED;
	hspi->State			         = HAL_SPI_STATE_READY;
}

void spi_dma_handle_setup( SPI_TypeDef *spi, uint8_t mode ){
	/* Peripheral DMA init*/
	if( spi == SPI3 ){ 
		/* TX: */
		hdma_spi3_tx.Instance       = SPIx_TX_DMA_CHANNEL;
		hdma_spi3_tx.Init.Direction = DMA_MEMORY_TO_PERIPH;
		hdma_spi3_tx.Init.PeriphInc = DMA_PINC_DISABLE;
		if (mode == DMA_SPI_READ){
			hdma_spi3_tx.Init.MemInc = DMA_MINC_DISABLE;
		}
		else{
			hdma_spi3_tx.Init.MemInc = DMA_MINC_ENABLE;
		}
		hdma_spi3_tx.Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE;
		hdma_spi3_tx.Init.MemDataAlignment    = DMA_MDATAALIGN_BYTE;
		hdma_spi3_tx.Init.Mode                = DMA_NORMAL;
		hdma_spi3_tx.Init.Priority            = DMA_PRIORITY_LOW;
		HAL_DMA_Init(&hdma_spi3_tx);
		__HAL_LINKDMA( &Spi3Handle,hdmatx,hdma_spi3_tx);

		/* RX: */
		hdma_spi3_rx.Instance       = SPIx_RX_DMA_CHANNEL;
		hdma_spi3_rx.Init.Direction = DMA_PERIPH_TO_MEMORY;
		hdma_spi3_rx.Init.PeriphInc = DMA_PINC_DISABLE;
		if (mode == DMA_SPI_READ){
			hdma_spi3_rx.Init.MemInc = DMA_MINC_ENABLE;
		}
		else{
			hdma_spi3_rx.Init.MemInc = DMA_MINC_DISABLE;
		}
		hdma_spi3_rx.Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE;
		hdma_spi3_rx.Init.MemDataAlignment    = DMA_MDATAALIGN_BYTE;
		hdma_spi3_rx.Init.Mode                = DMA_NORMAL;
		hdma_spi3_rx.Init.Priority            = DMA_PRIORITY_HIGH;
		HAL_DMA_Init(&hdma_spi3_rx);

		__HAL_LINKDMA( &Spi3Handle,hdmarx,hdma_spi3_rx);
	} 
	#if 0
	else if( spi == SPI2 ) {

	}
	#endif
}

void spi_dma_irq_setup( SPI_TypeDef *spi) 
{
	if( spi == SPI3 ) {
		/* DMA controller clock enable */
        DMAx_CLK_ENABLE();

		/* DMA interrupt init */
		HAL_NVIC_SetPriority(SPIx_DMA_TX_IRQn, 3, 0);
		HAL_NVIC_EnableIRQ(  SPIx_DMA_TX_IRQn);
		HAL_NVIC_SetPriority(SPIx_DMA_RX_IRQn, 2, 0);
		HAL_NVIC_EnableIRQ(  SPIx_DMA_RX_IRQn);
	}
#if 0
	else if ( spi == SPI2 ){ 

	}
#endif
}

void DMAx_RX_IRQHandler(void)
{
  HAL_DMA_IRQHandler(&hdma_spi3_rx);
}

void DMAx_TX_IRQHandler(void)
{
  HAL_DMA_IRQHandler(&hdma_spi3_tx);
}

#endif /* TARGET_STM32F1 */