DDS AD9854, library to configure a AD9854 Serial Interface (SPI)
Dependents: JRO_DDSv2 JRO_DDSv2_rev2019
AD9854.cpp
00001 #include "AD9854.h" 00002 00003 static char controlRegister[4]; 00004 static char read_spi_data[6]; 00005 static char message[0x32]; 00006 00007 static char *MODULATION[6] = {"Single Tone ", "FSK ", "Ramped FSK ", "Chirp ", "BPSK ", "Not Allowed "}; 00008 00009 DDS::DDS(SPI *spi_dev, DigitalOut *mreset, DigitalOut *outramp, DigitalOut *spmode, DigitalOut *cs, DigitalOut *ioreset, DigitalInOut *updclk){ 00010 00011 spi_device = spi_dev; 00012 00013 dds_mreset = mreset; 00014 dds_outramp = outramp; 00015 dds_sp_mode = spmode; 00016 dds_cs = cs; 00017 dds_io_reset = ioreset; 00018 dds_updclk = updclk; 00019 00020 dds_updclk->input(); 00021 *dds_sp_mode = 0; 00022 *dds_cs = 1; 00023 *dds_outramp = 0; 00024 00025 cmd_answer = NULL; 00026 cmd_answer_len = 0; 00027 00028 spi_device->format(SPI_BITS, SPI_MODE); 00029 spi_device->frequency(SPI_FREQ); 00030 00031 this->isConfig = false; 00032 00033 } 00034 00035 int DDS::__writeData(char addr, char ndata, const char* data){ 00036 00037 // I/O reset 00038 *dds_updclk = 0; 00039 *dds_io_reset = 1; 00040 wait_us(10); 00041 *dds_io_reset = 0; 00042 wait_us(10); 00043 00044 *dds_cs = 0; 00045 00046 //Sending serial address 00047 //printf("\r\nWriting Addr = %d", addr); 00048 spi_device->write(addr & 0x0F); 00049 00050 for(char i = 0; i < ndata; i++) 00051 { 00052 wait_us(150); 00053 spi_device->write(data[i]); 00054 } 00055 00056 *dds_cs = 1; 00057 /* 00058 for(char i = 0; i < ndata; i++) 00059 { 00060 printf("\tData[%d] = 0x%x", i, data[i]); 00061 } 00062 */ 00063 00064 00065 wait_us(10); 00066 *dds_updclk = 1; 00067 wait_us(10); 00068 *dds_updclk = 0; 00069 wait_us(10); 00070 00071 return 1; 00072 } 00073 00074 00075 char* DDS::__readData(char addr, char ndata){ 00076 00077 // I/O reset 00078 *dds_io_reset = 1; 00079 wait_us(10); 00080 *dds_io_reset = 0; 00081 wait_us(10); 00082 00083 *dds_cs = 0; 00084 00085 //Sending serial address 00086 //printf("\r\nReading Addr = %d", addr); 00087 spi_device->write((addr & 0x0F) | 0x80); 00088 00089 for(char i = 0; i < ndata; i++) 00090 { 00091 wait_us(150); 00092 read_spi_data[i] = spi_device->write(0x00); 00093 } 00094 00095 *dds_cs = 1; 00096 /* 00097 for(char i = 0; i < ndata; i++) 00098 { 00099 printf("\r\nData[%d] = 0x%x", i, read_spi_data[i]); 00100 } 00101 */ 00102 00103 wait_us(10); 00104 00105 return read_spi_data; 00106 } 00107 00108 int DDS::__writeDataAndVerify(char addr, char ndata, char* wr_spi_data, SerialDriver *screen){ 00109 00110 int success; 00111 char* rd_spi_data; 00112 00113 //Avoid some values in Control Register 00114 00115 if (addr==0x07){ 00116 wr_spi_data[2] = wr_spi_data[2] & 0xFE; //cr_ioupdclk always as an input = 0 00117 wr_spi_data[3] = wr_spi_data[3] & 0xFD; //LSB first = 0, MSB first enabled 00118 wr_spi_data[3] = wr_spi_data[3] | 0x01; //cr_sdo enable = 1 00119 00120 cr_qdac_pwdn = (wr_spi_data[0] & 0x04) >> 2; 00121 00122 cr_multiplier = (wr_spi_data[1] & 0x1F) >> 0; 00123 cr_pll_bypass = (wr_spi_data[1] & 0x20) >> 5; 00124 cr_pll_range = (wr_spi_data[1] & 0x40) >> 6; 00125 00126 cr_ioupdclk = (wr_spi_data[2] & 0x01) >> 0; 00127 cr_mode = (wr_spi_data[2] & 0x07) >> 1; 00128 00129 cr_sdo = (wr_spi_data[3] & 0x01) >> 0; 00130 cr_msb_lsb = (wr_spi_data[3] & 0x02) >> 1; 00131 cr_osk_int = (wr_spi_data[3] & 0x10) >> 4; 00132 cr_osk_en = (wr_spi_data[3] & 0x20) >> 5; 00133 cr_inv_sinc = (wr_spi_data[3] & 0x40) >> 6; 00134 00135 } 00136 00137 00138 this->__writeData(addr, ndata, wr_spi_data); 00139 rd_spi_data = this->__readData(addr, ndata); 00140 00141 success = 1; 00142 00143 for(char i = 0; i < ndata; i++) 00144 { 00145 if (screen != NULL){ 00146 screen->putc(wr_spi_data[i]); 00147 screen->putc(0x3D); 00148 screen->putc(rd_spi_data[i]); 00149 } 00150 00151 if (wr_spi_data[i] != rd_spi_data[i]) 00152 { 00153 success = 0; 00154 break; 00155 } 00156 00157 } 00158 00159 //Update Control Register 00160 if ((success == 1) && (addr==0x07)){ 00161 cr_multiplier = rd_spi_data[1] & 0x1F; 00162 cr_mode = (rd_spi_data[2] & 0x0E) >> 1; 00163 } 00164 //printf("\r\nSuccessful writting = %d\r\n", success); 00165 00166 return success; 00167 } 00168 00169 char* DDS::__getControlRegister(){ 00170 /* 00171 if (cr_multiplier >= 4){ 00172 cr_pll_bypass = 0; 00173 } 00174 00175 if (this->clock >= 200.0){ 00176 cr_pll_range = 1; 00177 } 00178 */ 00179 00180 controlRegister[0] = 0x10 + cr_qdac_pwdn*4; 00181 controlRegister[1] = cr_pll_range*64 + cr_pll_bypass*32 + (cr_multiplier & 0x1F); 00182 controlRegister[2] = (cr_mode & 0x07)*2 + cr_ioupdclk; 00183 controlRegister[3] = cr_inv_sinc*64 + cr_osk_en*32 + cr_osk_int*16 + cr_msb_lsb*2 + cr_sdo; 00184 00185 return controlRegister; 00186 00187 } 00188 00189 int DDS::__writeControlRegister(){ 00190 00191 bool success; 00192 char* wr_spi_data; 00193 char* rd_spi_data; 00194 char addr = 0x07, ndata = 4; 00195 00196 wr_spi_data = this->__getControlRegister(); 00197 00198 success = this->__writeData(addr, ndata, wr_spi_data); 00199 00200 ////printf("\r\nChanging UPD_CLK as an OUTPUT ..."); 00201 dds_updclk->output(); 00202 00203 wait_us(100); 00204 *dds_updclk = 1; 00205 wait_us(10); 00206 *dds_updclk = 0; 00207 wait_us(10); 00208 00209 rd_spi_data = this->__readData(addr, ndata); 00210 00211 success = true; 00212 00213 for(char i = 0; i < ndata; i++) 00214 { 00215 if (wr_spi_data[i] != rd_spi_data[i]) 00216 { 00217 success = false; 00218 break; 00219 } 00220 } 00221 00222 return success; 00223 } 00224 00225 00226 int DDS::reset(){ 00227 00228 // Master reset 00229 //Set as a input, temporary 00230 //printf("\r\nChange updclk direction as an INPUT ...\r\n"); 00231 dds_updclk->input(); 00232 dds_updclk->mode(PullDown); 00233 00234 //printf("\r\nReseting DDS ...\r\n"); 00235 *dds_mreset = 1; 00236 wait_ms(1); 00237 *dds_mreset = 0; 00238 wait_ms(1); 00239 00240 this->rf_enabled = false; 00241 this->programmed = false; 00242 00243 return 0; 00244 } 00245 00246 int DDS::scanIOUpdate(){ 00247 00248 unsigned int cont = 0; 00249 00250 this->reset(); 00251 00252 //printf("\r\nWaiting a upd_clk ...\r\n"); 00253 while(true){ 00254 if (*dds_updclk == 1) 00255 break; 00256 00257 cont += 1; 00258 if (cont > 10000) 00259 break; 00260 00261 wait_us(1); 00262 } 00263 00264 if (cont > 10000){ 00265 //printf("\r\nA upd_clk was not found\r\n"); 00266 return 0; 00267 } 00268 00269 //printf("\r\nA upd_clk was found ...\r\n"); 00270 00271 return 1; 00272 } 00273 00274 int DDS::find(){ 00275 /* 00276 char phase[]; 00277 00278 phase[0] = 0x0A; 00279 phase[1] = 0x55; 00280 00281 this->__writeDataAndVerify(0x00, 5, phase); 00282 */ 00283 this->__readData(0x05, 4); 00284 this->__readData(0x0A, 1); 00285 return 1; 00286 00287 } 00288 00289 00290 int DDS::init(){ 00291 00292 //printf("\r\nSetting default parameters in CR ...\r\n"); 00293 00294 //Serial mode enabled 00295 this->clock = 200.0; // Work clock in MHz 00296 this->cr_multiplier = 4; // Multiplier 4- 20 00297 this->cr_mode = 0; // Single, FSK, Ramped FSK, Chirp, BPSK 00298 this->cr_qdac_pwdn = 0; // QDAC power down enabled: 0 -> disable 00299 this->cr_ioupdclk = 0; // IO Update clock direction: 0 -> input, 1 -> output 00300 this->cr_inv_sinc = 0; // Sinc inverser filter enable: 0 -> enable 00301 this->cr_osk_en = 0; // Enable Amplitude multiplier: 0 -> disabled 00302 this->cr_osk_int = 0; // register/counter output shaped control: 0 -> register, 1 -> counter 00303 this->cr_msb_lsb = 0; // msb/lsb bit first: 0 -> MSB, 1 -> LSB 00304 this->cr_sdo = 1; // SDO pin active: 0 -> inactive 00305 00306 this->cr_pll_range = 1; // Clock >= 200Mhz 00307 this->cr_pll_bypass = 0; 00308 00309 this->cr_osk_en_bkp = this->cr_osk_en; 00310 this->cr_osk_int_bkp = this->cr_osk_int; 00311 00312 //printf("\r\nSetting in serial mode ...\r\n"); 00313 *dds_sp_mode = 0; 00314 *dds_cs = 1; 00315 00316 this->reset(); 00317 00318 //printf("\r\nWritting CR ...\r\n"); 00319 00320 if (not this->__writeControlRegister()){ 00321 //printf("\r\nUnsuccessful DDS initialization"); 00322 this->isConfig = false; 00323 return false; 00324 } 00325 00326 //printf("\r\nSuccessfull DDS initialization"); 00327 00328 this->isConfig = true; 00329 00330 return true; 00331 } 00332 00333 char* DDS::rdMode(){ 00334 00335 char* rd_data; 00336 char mode; 00337 00338 rd_data = this->__readData(0x07, 4); 00339 mode = (rd_data[2] & 0x0E) >> 1; 00340 00341 this->cr_mode = mode; 00342 00343 rd_data[0] = mode; 00344 00345 return rd_data; 00346 } 00347 00348 char* DDS::rdMultiplier(){ 00349 00350 char* rd_data; 00351 char mult; 00352 00353 rd_data = this->__readData(0x07, 4); 00354 mult = (rd_data[1] & 0x1F); 00355 this->cr_multiplier = mult; 00356 00357 //Reaconditioning data to return 00358 rd_data[0] = mult; 00359 rd_data[1] = ((int)(this->clock) >> 8) & 0xff; 00360 rd_data[2] = (int)(this->clock) & 0xff; 00361 00362 return rd_data; 00363 } 00364 char* DDS::rdPhase1(){ 00365 00366 char* rd_data; 00367 00368 rd_data = this->__readData(0x00, 2); 00369 00370 return rd_data; 00371 00372 } 00373 char* DDS::rdPhase2(){ 00374 00375 char* rd_data; 00376 00377 rd_data = this->__readData(0x01, 2); 00378 00379 return rd_data; 00380 } 00381 char* DDS::rdFrequency1(){ 00382 00383 char* rd_data; 00384 00385 rd_data = this->__readData(0x02, 6); 00386 00387 for (int i=0; i<6; i++) 00388 frequency1[i] = rd_data[i]; 00389 00390 return rd_data; 00391 00392 } 00393 char* DDS::rdFrequency2(){ 00394 00395 char* rd_data; 00396 00397 rd_data = this->__readData(0x03, 6); 00398 00399 for (int i=0; i<6; i++) 00400 frequency2[i] = rd_data[i]; 00401 00402 return rd_data; 00403 } 00404 char* DDS::rdAmplitudeI(){ 00405 00406 char* rd_data; 00407 00408 rd_data = this->__readData(0x08, 2); 00409 00410 return rd_data; 00411 } 00412 char* DDS::rdAmplitudeQ(){ 00413 00414 char* rd_data; 00415 00416 rd_data = this->__readData(0x09, 2); 00417 00418 return rd_data; 00419 } 00420 00421 int DDS::isRFEnabled(){ 00422 00423 if (this->rf_enabled) 00424 return 1; 00425 00426 return 0; 00427 } 00428 00429 int DDS::isAmplitudeEnabled(){ 00430 00431 if (this->cr_osk_en) 00432 return 1; 00433 00434 return 0; 00435 } 00436 00437 char* DDS::rdDeltaFrequency(){ 00438 char* rd_data; 00439 00440 rd_data = this->__readData(0x04, 6); 00441 00442 return rd_data; 00443 00444 } 00445 00446 char* DDS::rdUpdateClock(){ 00447 char* rd_data; 00448 00449 rd_data = this->__readData(0x05, 4); 00450 00451 return rd_data; 00452 00453 } 00454 00455 char* DDS::rdRampRateClock(){ 00456 char* rd_data; 00457 00458 rd_data = this->__readData(0x06, 3); 00459 00460 return rd_data; 00461 00462 } 00463 00464 char* DDS::rdAmplitudeRampRate(){ 00465 char* rd_data; 00466 00467 rd_data = this->__readData(0x0A, 1); 00468 00469 return rd_data; 00470 00471 } 00472 00473 int DDS::wrMode(char mode){ 00474 00475 this->cr_mode = mode & 0x07; 00476 00477 return this->__writeControlRegister(); 00478 } 00479 00480 int DDS::wrMultiplier(char multiplier, float clock){ 00481 00482 this->cr_multiplier = multiplier & 0x1F; 00483 this->clock = clock; 00484 00485 //printf("\r\n mult = %d, clock = %f", multiplier, clock); 00486 //printf("\r\n cr_mult = %d", cr_multiplier); 00487 00488 return this->__writeControlRegister(); 00489 } 00490 00491 int DDS::wrPhase1(char* phase, SerialDriver *screen){ 00492 00493 return this->__writeDataAndVerify(0x00, 2, phase, screen); 00494 00495 } 00496 00497 int DDS::wrPhase2(char* phase, SerialDriver *screen){ 00498 00499 return this->__writeDataAndVerify(0x01, 2, phase, screen); 00500 00501 } 00502 00503 int DDS::wrFrequency1(char* freq, SerialDriver *screen){ 00504 int sts; 00505 00506 sts = this->__writeDataAndVerify(0x02, 6, freq, screen); 00507 00508 if (sts){ 00509 for (int i=0; i<6; i++) 00510 frequency1[i] = freq[i]; 00511 00512 this->programmed = true; 00513 } 00514 00515 return sts; 00516 00517 } 00518 int DDS::wrFrequency2(char* freq, SerialDriver *screen){ 00519 int sts; 00520 00521 sts = this->__writeDataAndVerify(0x03, 6, freq, screen); 00522 00523 if (sts){ 00524 for (int i=0; i<6; i++) 00525 frequency2[i] = freq[i]; 00526 } 00527 return sts; 00528 } 00529 00530 int DDS::wrAmplitudeI(char* amplitude, SerialDriver *screen){ 00531 00532 amplitudeI[0] = amplitude[0]; 00533 amplitudeI[1] = amplitude[1]; 00534 00535 this->rf_enabled = true; 00536 00537 return this->__writeDataAndVerify(0x08, 2, amplitude, screen); 00538 00539 } 00540 00541 int DDS::wrAmplitudeQ(char* amplitude, SerialDriver *screen){ 00542 00543 amplitudeQ[0] = amplitude[0]; 00544 amplitudeQ[1] = amplitude[1]; 00545 00546 this->rf_enabled = true; 00547 00548 return this->__writeDataAndVerify(0x09, 2, amplitude, screen); 00549 00550 } 00551 00552 int DDS::wrDeltaFrequency(char* delta_freq, SerialDriver *screen){ 00553 int sts; 00554 00555 sts = this->__writeDataAndVerify(0x04, 6, delta_freq, screen); 00556 00557 if (sts){ 00558 for (int i=0; i<6; i++) 00559 delta_frequency[i] = delta_freq[i]; 00560 } 00561 00562 return sts; 00563 00564 } 00565 00566 int DDS::wrUpdateClock(char* upd_clock, SerialDriver *screen){ 00567 int sts; 00568 00569 sts = this->__writeDataAndVerify(0x05, 4, upd_clock, screen); 00570 00571 if (sts){ 00572 for (int i=0; i<4; i++) 00573 update_clock[i] = upd_clock[i]; 00574 } 00575 00576 return sts; 00577 00578 } 00579 00580 int DDS::wrRampRateClock(char* rr_clock, SerialDriver *screen){ 00581 int sts; 00582 00583 sts = this->__writeDataAndVerify(0x06, 3, rr_clock, screen); 00584 00585 if (sts){ 00586 for (int i=0; i<3; i++) 00587 ramp_rate_clock[i] = rr_clock[i]; 00588 } 00589 00590 return sts; 00591 00592 } 00593 00594 int DDS::wrAmplitudeRampRate(char* ampl_rate, SerialDriver *screen){ 00595 int sts; 00596 00597 sts = this->__writeDataAndVerify(0x0A, 1, ampl_rate, screen); 00598 00599 if (sts){ 00600 for (int i=0; i<1; i++) 00601 amplitude_ramp_rate[i] = ampl_rate[i]; 00602 } 00603 00604 return sts; 00605 00606 } 00607 00608 int DDS::enableAmplitude(){ 00609 00610 this->cr_osk_en = 1; 00611 00612 return this->__writeControlRegister(); 00613 } 00614 00615 int DDS::disableAmplitude(){ 00616 00617 this->cr_osk_en = 0; 00618 00619 return this->__writeControlRegister(); 00620 } 00621 00622 int DDS::enableRF(){ 00623 00624 this->cr_osk_en = this->cr_osk_en_bkp; 00625 this->cr_osk_int = this->cr_osk_int_bkp; 00626 00627 this->__writeControlRegister(); 00628 00629 this->__writeDataAndVerify(0x08, 2, this->amplitudeI); 00630 00631 this->rf_enabled = true; 00632 00633 return this->__writeDataAndVerify(0x09, 2, this->amplitudeQ); 00634 00635 } 00636 00637 int DDS::disableRF(){ 00638 00639 this->cr_osk_en_bkp = this->cr_osk_en; 00640 this->cr_osk_int_bkp = this->cr_osk_int; 00641 00642 this->cr_osk_en = 1; 00643 this->cr_osk_int = 0; 00644 00645 this->__writeControlRegister(); 00646 00647 this->__writeDataAndVerify(0x08, 2, "\x00\x00"); 00648 00649 this->rf_enabled = false; 00650 00651 return this->__writeDataAndVerify(0x09, 2, "\x00\x00"); 00652 00653 } 00654 00655 int DDS::defaultSettings(SerialDriver *screen){ 00656 00657 if (!(screen == NULL)){ 00658 screen->putc(0x37); 00659 screen->putc(0x30); 00660 } 00661 00662 this->wrMultiplier(1, 0.0); 00663 this->wrAmplitudeI("\x0F\xC0", screen); //0xFC0 produces best SFDR than 0xFFF 00664 this->wrAmplitudeQ("\x0F\xC0"); //0xFC0 produces best SFDR than 0xFFF 00665 this->wrFrequency1("\x00\x00\x00\x00\x00\x00"); // 49.92 <> 0x3f 0xe5 0xc9 0x1d 0x14 0xe3 <> 49.92/clock*(2**48) \x3f\xe5\xc9\x1d\x14\xe3 00666 this->wrFrequency2("\x00\x00\x00\x00\x00\x00"); 00667 this->wrPhase1("\x00\x00"); //0 grados 00668 this->wrPhase2("\x20\x00"); //180 grados <> 0x20 0x00 <> 180/360*(2**14) 00669 this->disableAmplitude(); 00670 this->disableRF(); 00671 00672 if (!(screen == NULL)){ 00673 screen->putc(0x37); 00674 screen->putc(0x31); 00675 } 00676 this->programmed = false; 00677 return this->wrMode(0); //BPSK mode 00678 00679 } 00680 00681 char* DDS::setCommand(unsigned short cmd, char* payload, unsigned long payload_len){ 00682 00683 bool success = false; 00684 00685 strcpy(message, MSG_CMD_OK); 00686 00687 this->cmd_answer = message; 00688 this->cmd_answer_len = strlen(message); 00689 00690 //printf("cmd = %d, payload_len = %d", cmd, payload_len); 00691 00692 //printf("\r\nPayload = "); 00693 //for(unsigned long i=0; i< payload_len; i++) 00694 //printf("0x%x ", payload[i]); 00695 00696 //Si el DDS no esta inicializado siempre retornar NI_MSG 00697 if (not this->isConfig){ 00698 00699 strcpy(message, MSG_STATUS_FAIL); 00700 00701 this->cmd_answer = message; 00702 this->cmd_answer_len = strlen(message); 00703 00704 return this->cmd_answer; 00705 } 00706 00707 switch ( cmd ) 00708 { 00709 case DDS_CMD_RESET: 00710 success = this->init(); 00711 success = this->defaultSettings(); 00712 break; 00713 00714 case DDS_CMD_STATUS: 00715 00716 if (this->programmed == false) 00717 strcpy(message, MSG_STATUS_ON); 00718 00719 if ((this->programmed == true) && (this->rf_enabled == false)) 00720 strcpy(message, MSG_STATUS_RF_DIS); 00721 00722 if ((this->programmed == true) && (this->rf_enabled == true)) 00723 strcpy(message, MSG_STATUS_RF_ENA); 00724 00725 this->cmd_answer = message; 00726 this->cmd_answer_len = strlen(message); 00727 break; 00728 00729 case DDS_CMD_ENABLE_RF: 00730 if (payload_len == 1){ 00731 if (payload[0] == 0) 00732 success = this->disableRF(); 00733 else 00734 success = this->enableRF(); 00735 } 00736 break; 00737 00738 case DDS_CMD_ENABLE_AMP: 00739 if (payload_len == 1){ 00740 if (payload[0] == 0) 00741 success = this->disableAmplitude(); 00742 else 00743 success = this->enableAmplitude(); 00744 } 00745 break; 00746 00747 case DDS_CMD_MULTIPLIER: 00748 if (payload_len == 1){ 00749 success = this->wrMultiplier(payload[0]); 00750 } 00751 if (payload_len == 3){ 00752 unsigned short clock = payload[1]*256 + payload[2]; 00753 success = this->wrMultiplier(payload[0], (float)clock); 00754 } 00755 break; 00756 00757 case DDS_CMD_MODE: 00758 if (payload_len == 1){ 00759 success = this->wrMode(payload[0]); 00760 } 00761 break; 00762 00763 case DDS_CMD_FREQUENCYA: 00764 if (payload_len == 6){ 00765 success = this->wrFrequency1(payload); 00766 } 00767 break; 00768 00769 case DDS_CMD_FREQUENCYB: 00770 if (payload_len == 6){ 00771 success = this->wrFrequency2(payload); 00772 } 00773 break; 00774 00775 case DDS_CMD_PHASEA: 00776 if (payload_len == 2){ 00777 success = this->wrPhase1(payload); 00778 } 00779 break; 00780 00781 case DDS_CMD_PHASEB: 00782 if (payload_len == 2){ 00783 success = this->wrPhase2(payload); 00784 } 00785 break; 00786 00787 case DDS_CMD_AMPLITUDE1: 00788 if (payload_len == 2){ 00789 success = this->wrAmplitudeI(payload); 00790 } 00791 break; 00792 00793 case DDS_CMD_AMPLITUDE2: 00794 if (payload_len == 2){ 00795 success = this->wrAmplitudeQ(payload); 00796 } 00797 break; 00798 00799 case DDS_CMD_AMP_RAMP_RATE: 00800 if (payload_len == 1){ 00801 success = this->wrAmplitudeRampRate(payload); 00802 } 00803 break; 00804 00805 case DDS_CMD_DELTA_FREQ: 00806 if (payload_len == 1){ 00807 success = this->wrDeltaFrequency(payload); 00808 } 00809 break; 00810 00811 case DDS_CMD_UPD_CLOCK: 00812 if (payload_len == 1){ 00813 success = this->wrUpdateClock(payload); 00814 } 00815 break; 00816 00817 case DDS_CMD_RAMP_RATE_CLOCK: 00818 if (payload_len == 1){ 00819 success = this->wrRampRateClock(payload); 00820 } 00821 break; 00822 00823 case DDS_CMD_READ | DDS_CMD_ENABLE_RF: 00824 if (this->isRFEnabled() == 1) 00825 strcpy(message, MSG_ENABLED); 00826 else 00827 strcpy(message, MSG_DISABLED); 00828 00829 this->cmd_answer_len = strlen(message); 00830 00831 break; 00832 00833 case DDS_CMD_READ | DDS_CMD_ENABLE_AMP: 00834 if (this->cr_osk_en == 1) 00835 strcpy(message, MSG_ENABLED); 00836 else 00837 strcpy(message, MSG_DISABLED); 00838 00839 this->cmd_answer_len = strlen(message); 00840 00841 break; 00842 00843 case DDS_CMD_READ | DDS_CMD_MULTIPLIER: 00844 this->cmd_answer = this->rdMultiplier(); 00845 this->cmd_answer_len = 1; 00846 break; 00847 00848 case DDS_CMD_READ | DDS_CMD_MODE: 00849 this->cmd_answer = this->rdMode(); 00850 this->cmd_answer_len = 1; 00851 break; 00852 00853 case DDS_CMD_READ | DDS_CMD_FREQUENCYA: 00854 this->cmd_answer = this->rdFrequency1(); 00855 this->cmd_answer_len = 6; 00856 break; 00857 00858 case DDS_CMD_READ | DDS_CMD_FREQUENCYB: 00859 this->cmd_answer = this->rdFrequency2(); 00860 this->cmd_answer_len = 6; 00861 break; 00862 00863 case DDS_CMD_READ | DDS_CMD_PHASEA: 00864 this->cmd_answer = this->rdPhase1(); 00865 this->cmd_answer_len = 2; 00866 break; 00867 00868 case DDS_CMD_READ | DDS_CMD_PHASEB: 00869 this->cmd_answer = this->rdPhase2(); 00870 this->cmd_answer_len = 2; 00871 break; 00872 00873 case DDS_CMD_READ | DDS_CMD_AMPLITUDE1: 00874 this->cmd_answer = this->rdAmplitudeI(); 00875 this->cmd_answer_len = 2; 00876 break; 00877 00878 case DDS_CMD_READ | DDS_CMD_AMPLITUDE2: 00879 this->cmd_answer = this->rdAmplitudeQ(); 00880 this->cmd_answer_len = 2; 00881 break; 00882 00883 case DDS_CMD_READ | DDS_CMD_AMP_RAMP_RATE: 00884 this->cmd_answer = this->rdAmplitudeRampRate(); 00885 this->cmd_answer_len = 1; 00886 break; 00887 00888 case DDS_CMD_READ | DDS_CMD_DELTA_FREQ: 00889 this->cmd_answer = this->rdDeltaFrequency(); 00890 this->cmd_answer_len = 6; 00891 break; 00892 00893 case DDS_CMD_READ | DDS_CMD_UPD_CLOCK: 00894 this->cmd_answer = this->rdUpdateClock(); 00895 this->cmd_answer_len = 4; 00896 break; 00897 00898 case DDS_CMD_READ | DDS_CMD_RAMP_RATE_CLOCK: 00899 this->cmd_answer = this->rdRampRateClock(); 00900 this->cmd_answer_len = 3; 00901 break; 00902 00903 case DDS_CMD_WRITE: 00904 if (payload_len == 0x28){ 00905 success = this->writeAllDevice(payload); 00906 } 00907 break; 00908 00909 case DDS_CMD_READ: 00910 this->cmd_answer = this->readAllDevice(); 00911 this->cmd_answer_len = 0x28; 00912 break; 00913 00914 default: 00915 success = false; 00916 strcpy(message, MSG_CMD_KO); 00917 this->cmd_answer = message; 00918 this->cmd_answer_len = strlen(message); 00919 00920 } 00921 00922 if (success){ 00923 strcpy(message, MSG_CMD_OK); 00924 this->cmd_answer = message; 00925 this->cmd_answer_len = strlen(message); 00926 } 00927 00928 return this->cmd_answer; 00929 } 00930 00931 char* DDS::getCmdAnswer(){ 00932 00933 return this->cmd_answer; 00934 00935 } 00936 00937 unsigned long DDS::getCmdAnswerLen(){ 00938 00939 return this->cmd_answer_len; 00940 00941 } 00942 00943 bool DDS::wasInitialized(){ 00944 00945 return this->isConfig; 00946 } 00947 00948 char DDS::getMultiplier(){ 00949 return this->cr_multiplier; 00950 } 00951 00952 double DDS::getFreqFactor1(){ 00953 factor_freq1 = ((double)frequency1[0])/256.0 + ((double)frequency1[1])/65536.0 + ((double)frequency1[2])/16777216.0 + ((double)frequency1[3])/4294967296.0; 00954 factor_freq1 *= ((double)this->cr_multiplier); 00955 00956 return factor_freq1; 00957 } 00958 00959 double DDS::getFreqFactor2(){ 00960 factor_freq2 = ((double)frequency2[0])/256.0 + ((double)frequency2[1])/65536.0 + ((double)frequency2[2])/16777216.0 + ((double)frequency2[3])/4294967296.0; 00961 factor_freq2 *= ((double)this->cr_multiplier); 00962 00963 return factor_freq2; 00964 } 00965 00966 char DDS::getMode(){ 00967 return this->cr_mode; 00968 } 00969 00970 char* DDS::getModeStr(){ 00971 00972 if (this->cr_mode > 4) 00973 return MODULATION[5]; 00974 00975 return MODULATION[this->cr_mode]; 00976 } 00977 00978 00979 int DDS::writeAllDevice(char* payload, SerialDriver *screen){ 00980 00981 int sts; 00982 char* phase1, *phase2; 00983 char* freq1, *freq2; 00984 char* delta_freq, *upd_rate_clk, *ramp_rate_clk; 00985 char* control_reg; 00986 char* amplitudeI, *amplitudeQ, *ampl_ramp_rate; 00987 char* qdac; 00988 00989 //parm = payload[ParallelAddress] 00990 phase1 = &payload[0x00]; 00991 phase2 = &payload[0x02]; 00992 freq1 = &payload[0x04]; 00993 freq2 = &payload[0x0A]; 00994 delta_freq = &payload[0x10]; 00995 upd_rate_clk = &payload[0x16]; 00996 ramp_rate_clk = &payload[0x1A]; 00997 control_reg = &payload[0x1D]; 00998 amplitudeI = &payload[0x21]; 00999 amplitudeQ = &payload[0x23]; 01000 ampl_ramp_rate = &payload[0x25]; 01001 qdac = &payload[0x26]; 01002 01003 control_reg[2] = control_reg[2] & 0xFE; //cr_ioupdclk always as an input = 0 when serial operation is used 01004 control_reg[3] = control_reg[3] & 0xFD; //LSB first = 0, MSB first enabled 01005 control_reg[3] = control_reg[3] | 0x01; //cr_sdo enable = 1 01006 01007 cr_osk_int_bkp = (control_reg[3] & 0x10) >> 4; 01008 cr_osk_en_bkp = (control_reg[3] & 0x20) >> 5; 01009 01010 //this->__writeDataAndVerify(SerialAddress, NumberOfBytes, Bytes); 01011 //this->__writeDataAndVerify(0x04, 6, delta_freq); 01012 //this->__writeDataAndVerify(0x05, 4, upd_rate_clk); 01013 //this->__writeDataAndVerify(0x06, 3, ramp_rate_clk); 01014 this->__writeDataAndVerify(0x07, 4, control_reg); 01015 01016 //this->__writeDataAndVerify(0x0A, 1, ampl_ramp_rate); 01017 this->__writeDataAndVerify(0x0B, 2, qdac, screen); 01018 01019 this->wrPhase1(phase1); 01020 this->wrPhase2(phase2); 01021 this->wrFrequency1(freq1); 01022 this->wrFrequency2(freq2); 01023 this->wrDeltaFrequency(delta_freq); 01024 this->wrUpdateClock(upd_rate_clk); 01025 this->wrRampRateClock(ramp_rate_clk); 01026 01027 this->wrAmplitudeI(amplitudeI); 01028 this->wrAmplitudeQ(amplitudeQ); 01029 01030 this->wrAmplitudeRampRate(ampl_ramp_rate); 01031 01032 //Enabling RF 01033 sts = this->enableRF(); 01034 01035 return sts; 01036 01037 } 01038 01039 01040 char* DDS::readAllDevice(){ 01041 01042 char* rd_data; 01043 int i=0, k=0; 01044 01045 rd_data = this->rdPhase1(); 01046 01047 for (i=0; i<2; i++) 01048 message[k+i] = rd_data[i]; 01049 k += i; 01050 01051 rd_data = this->rdPhase2(); 01052 01053 for (i=0; i<2; i++) 01054 message[k+i] = rd_data[i]; 01055 k += i; 01056 01057 rd_data = this->rdFrequency1(); 01058 01059 for (i=0; i<6; i++) 01060 message[k+i] = rd_data[i]; 01061 k += i; 01062 01063 rd_data = this->rdFrequency2(); 01064 01065 for (i=0; i<6; i++) 01066 message[k+i] = rd_data[i]; 01067 k += i; 01068 01069 rd_data = this->rdDeltaFrequency(); 01070 01071 for (i=0; i<6; i++) 01072 message[k+i] = rd_data[i]; 01073 k += i; 01074 01075 rd_data = this->rdUpdateClock(); 01076 01077 for (i=0; i<4; i++) 01078 message[k+i] = rd_data[i]; 01079 k += i; 01080 01081 rd_data = this->rdRampRateClock(); 01082 01083 for (i=0; i<3; i++) 01084 message[k+i] = rd_data[i]; 01085 k += i; 01086 01087 rd_data = this->__readData(0x07, 4); 01088 01089 for (i=0; i<4; i++) 01090 message[k+i] = rd_data[i]; 01091 k += i; 01092 01093 rd_data = this->rdAmplitudeI(); 01094 01095 for (i=0; i<2; i++) 01096 message[k+i] = rd_data[i]; 01097 k += i; 01098 01099 rd_data = this->rdAmplitudeQ(); 01100 01101 01102 for (i=0; i<2; i++) 01103 message[k+i] = rd_data[i]; 01104 k += i; 01105 01106 rd_data = this->rdAmplitudeRampRate(); 01107 01108 for (i=0; i<1; i++) 01109 message[k+i] = rd_data[i]; 01110 k += i; 01111 01112 rd_data = this->__readData(0x0B, 2); 01113 01114 for (i=0; i<2; i++) 01115 message[k+i] = rd_data[i]; 01116 k += i; 01117 01118 return message; 01119 01120 }
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