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cmsis_dsp/MatrixFunctions/arm_mat_trans_q31.c@3:7a284390b0ce, 2013-11-08 (annotated)
- Committer:
- mbed_official
- Date:
- Fri Nov 08 13:45:10 2013 +0000
- Revision:
- 3:7a284390b0ce
- Parent:
- 2:da51fb522205
Synchronized with git revision e69956aba2f68a2a26ac26b051f8d349deaa1ce8
Who changed what in which revision?
| User | Revision | Line number | New contents of line | 
|---|---|---|---|
| emilmont | 1:fdd22bb7aa52 | 1 | /* ---------------------------------------------------------------------- | 
| mbed_official | 3:7a284390b0ce | 2 | * Copyright (C) 2010-2013 ARM Limited. All rights reserved. | 
| emilmont | 1:fdd22bb7aa52 | 3 | * | 
| mbed_official | 3:7a284390b0ce | 4 | * $Date: 17. January 2013 | 
| mbed_official | 3:7a284390b0ce | 5 | * $Revision: V1.4.1 | 
| emilmont | 1:fdd22bb7aa52 | 6 | * | 
| emilmont | 2:da51fb522205 | 7 | * Project: CMSIS DSP Library | 
| emilmont | 2:da51fb522205 | 8 | * Title: arm_mat_trans_q31.c | 
| emilmont | 1:fdd22bb7aa52 | 9 | * | 
| emilmont | 2:da51fb522205 | 10 | * Description: Q31 matrix transpose. | 
| emilmont | 1:fdd22bb7aa52 | 11 | * | 
| emilmont | 1:fdd22bb7aa52 | 12 | * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 | 
| emilmont | 1:fdd22bb7aa52 | 13 | * | 
| mbed_official | 3:7a284390b0ce | 14 | * Redistribution and use in source and binary forms, with or without | 
| mbed_official | 3:7a284390b0ce | 15 | * modification, are permitted provided that the following conditions | 
| mbed_official | 3:7a284390b0ce | 16 | * are met: | 
| mbed_official | 3:7a284390b0ce | 17 | * - Redistributions of source code must retain the above copyright | 
| mbed_official | 3:7a284390b0ce | 18 | * notice, this list of conditions and the following disclaimer. | 
| mbed_official | 3:7a284390b0ce | 19 | * - Redistributions in binary form must reproduce the above copyright | 
| mbed_official | 3:7a284390b0ce | 20 | * notice, this list of conditions and the following disclaimer in | 
| mbed_official | 3:7a284390b0ce | 21 | * the documentation and/or other materials provided with the | 
| mbed_official | 3:7a284390b0ce | 22 | * distribution. | 
| mbed_official | 3:7a284390b0ce | 23 | * - Neither the name of ARM LIMITED nor the names of its contributors | 
| mbed_official | 3:7a284390b0ce | 24 | * may be used to endorse or promote products derived from this | 
| mbed_official | 3:7a284390b0ce | 25 | * software without specific prior written permission. | 
| mbed_official | 3:7a284390b0ce | 26 | * | 
| mbed_official | 3:7a284390b0ce | 27 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS | 
| mbed_official | 3:7a284390b0ce | 28 | * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT | 
| mbed_official | 3:7a284390b0ce | 29 | * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS | 
| mbed_official | 3:7a284390b0ce | 30 | * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE | 
| mbed_official | 3:7a284390b0ce | 31 | * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, | 
| mbed_official | 3:7a284390b0ce | 32 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, | 
| mbed_official | 3:7a284390b0ce | 33 | * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; | 
| mbed_official | 3:7a284390b0ce | 34 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER | 
| mbed_official | 3:7a284390b0ce | 35 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT | 
| mbed_official | 3:7a284390b0ce | 36 | * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN | 
| mbed_official | 3:7a284390b0ce | 37 | * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE | 
| mbed_official | 3:7a284390b0ce | 38 | * POSSIBILITY OF SUCH DAMAGE. | 
| emilmont | 1:fdd22bb7aa52 | 39 | * -------------------------------------------------------------------- */ | 
| emilmont | 1:fdd22bb7aa52 | 40 | |
| emilmont | 1:fdd22bb7aa52 | 41 | #include "arm_math.h" | 
| emilmont | 1:fdd22bb7aa52 | 42 | |
| emilmont | 1:fdd22bb7aa52 | 43 | /** | 
| emilmont | 1:fdd22bb7aa52 | 44 | * @ingroup groupMatrix | 
| emilmont | 1:fdd22bb7aa52 | 45 | */ | 
| emilmont | 1:fdd22bb7aa52 | 46 | |
| emilmont | 1:fdd22bb7aa52 | 47 | /** | 
| emilmont | 1:fdd22bb7aa52 | 48 | * @addtogroup MatrixTrans | 
| emilmont | 1:fdd22bb7aa52 | 49 | * @{ | 
| emilmont | 1:fdd22bb7aa52 | 50 | */ | 
| emilmont | 1:fdd22bb7aa52 | 51 | |
| emilmont | 1:fdd22bb7aa52 | 52 | /* | 
| emilmont | 1:fdd22bb7aa52 | 53 | * @brief Q31 matrix transpose. | 
| emilmont | 1:fdd22bb7aa52 | 54 | * @param[in] *pSrc points to the input matrix | 
| emilmont | 1:fdd22bb7aa52 | 55 | * @param[out] *pDst points to the output matrix | 
| emilmont | 2:da51fb522205 | 56 | * @return The function returns either <code>ARM_MATH_SIZE_MISMATCH</code> | 
| emilmont | 1:fdd22bb7aa52 | 57 | * or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking. | 
| emilmont | 1:fdd22bb7aa52 | 58 | */ | 
| emilmont | 1:fdd22bb7aa52 | 59 | |
| emilmont | 1:fdd22bb7aa52 | 60 | arm_status arm_mat_trans_q31( | 
| emilmont | 1:fdd22bb7aa52 | 61 | const arm_matrix_instance_q31 * pSrc, | 
| emilmont | 1:fdd22bb7aa52 | 62 | arm_matrix_instance_q31 * pDst) | 
| emilmont | 1:fdd22bb7aa52 | 63 | { | 
| emilmont | 1:fdd22bb7aa52 | 64 | q31_t *pIn = pSrc->pData; /* input data matrix pointer */ | 
| emilmont | 1:fdd22bb7aa52 | 65 | q31_t *pOut = pDst->pData; /* output data matrix pointer */ | 
| emilmont | 1:fdd22bb7aa52 | 66 | q31_t *px; /* Temporary output data matrix pointer */ | 
| emilmont | 1:fdd22bb7aa52 | 67 | uint16_t nRows = pSrc->numRows; /* number of nRows */ | 
| emilmont | 1:fdd22bb7aa52 | 68 | uint16_t nColumns = pSrc->numCols; /* number of nColumns */ | 
| emilmont | 1:fdd22bb7aa52 | 69 | |
| mbed_official | 3:7a284390b0ce | 70 | #ifndef ARM_MATH_CM0_FAMILY | 
| emilmont | 1:fdd22bb7aa52 | 71 | |
| emilmont | 1:fdd22bb7aa52 | 72 | /* Run the below code for Cortex-M4 and Cortex-M3 */ | 
| emilmont | 1:fdd22bb7aa52 | 73 | |
| emilmont | 1:fdd22bb7aa52 | 74 | uint16_t blkCnt, i = 0u, row = nRows; /* loop counters */ | 
| emilmont | 1:fdd22bb7aa52 | 75 | arm_status status; /* status of matrix transpose */ | 
| emilmont | 1:fdd22bb7aa52 | 76 | |
| emilmont | 1:fdd22bb7aa52 | 77 | |
| emilmont | 1:fdd22bb7aa52 | 78 | #ifdef ARM_MATH_MATRIX_CHECK | 
| emilmont | 1:fdd22bb7aa52 | 79 | |
| emilmont | 1:fdd22bb7aa52 | 80 | |
| emilmont | 1:fdd22bb7aa52 | 81 | /* Check for matrix mismatch condition */ | 
| emilmont | 1:fdd22bb7aa52 | 82 | if((pSrc->numRows != pDst->numCols) || (pSrc->numCols != pDst->numRows)) | 
| emilmont | 1:fdd22bb7aa52 | 83 | { | 
| emilmont | 1:fdd22bb7aa52 | 84 | /* Set status as ARM_MATH_SIZE_MISMATCH */ | 
| emilmont | 1:fdd22bb7aa52 | 85 | status = ARM_MATH_SIZE_MISMATCH; | 
| emilmont | 1:fdd22bb7aa52 | 86 | } | 
| emilmont | 1:fdd22bb7aa52 | 87 | else | 
| emilmont | 1:fdd22bb7aa52 | 88 | #endif /* #ifdef ARM_MATH_MATRIX_CHECK */ | 
| emilmont | 1:fdd22bb7aa52 | 89 | |
| emilmont | 1:fdd22bb7aa52 | 90 | { | 
| emilmont | 1:fdd22bb7aa52 | 91 | /* Matrix transpose by exchanging the rows with columns */ | 
| emilmont | 1:fdd22bb7aa52 | 92 | /* row loop */ | 
| emilmont | 1:fdd22bb7aa52 | 93 | do | 
| emilmont | 1:fdd22bb7aa52 | 94 | { | 
| emilmont | 1:fdd22bb7aa52 | 95 | /* Apply loop unrolling and exchange the columns with row elements */ | 
| emilmont | 1:fdd22bb7aa52 | 96 | blkCnt = nColumns >> 2u; | 
| emilmont | 1:fdd22bb7aa52 | 97 | |
| emilmont | 1:fdd22bb7aa52 | 98 | /* The pointer px is set to starting address of the column being processed */ | 
| emilmont | 1:fdd22bb7aa52 | 99 | px = pOut + i; | 
| emilmont | 1:fdd22bb7aa52 | 100 | |
| emilmont | 1:fdd22bb7aa52 | 101 | /* First part of the processing with loop unrolling. Compute 4 outputs at a time. | 
| emilmont | 1:fdd22bb7aa52 | 102 | ** a second loop below computes the remaining 1 to 3 samples. */ | 
| emilmont | 1:fdd22bb7aa52 | 103 | while(blkCnt > 0u) | 
| emilmont | 1:fdd22bb7aa52 | 104 | { | 
| emilmont | 1:fdd22bb7aa52 | 105 | /* Read and store the input element in the destination */ | 
| emilmont | 1:fdd22bb7aa52 | 106 | *px = *pIn++; | 
| emilmont | 1:fdd22bb7aa52 | 107 | |
| emilmont | 1:fdd22bb7aa52 | 108 | /* Update the pointer px to point to the next row of the transposed matrix */ | 
| emilmont | 1:fdd22bb7aa52 | 109 | px += nRows; | 
| emilmont | 1:fdd22bb7aa52 | 110 | |
| emilmont | 1:fdd22bb7aa52 | 111 | /* Read and store the input element in the destination */ | 
| emilmont | 1:fdd22bb7aa52 | 112 | *px = *pIn++; | 
| emilmont | 1:fdd22bb7aa52 | 113 | |
| emilmont | 1:fdd22bb7aa52 | 114 | /* Update the pointer px to point to the next row of the transposed matrix */ | 
| emilmont | 1:fdd22bb7aa52 | 115 | px += nRows; | 
| emilmont | 1:fdd22bb7aa52 | 116 | |
| emilmont | 1:fdd22bb7aa52 | 117 | /* Read and store the input element in the destination */ | 
| emilmont | 1:fdd22bb7aa52 | 118 | *px = *pIn++; | 
| emilmont | 1:fdd22bb7aa52 | 119 | |
| emilmont | 1:fdd22bb7aa52 | 120 | /* Update the pointer px to point to the next row of the transposed matrix */ | 
| emilmont | 1:fdd22bb7aa52 | 121 | px += nRows; | 
| emilmont | 1:fdd22bb7aa52 | 122 | |
| emilmont | 1:fdd22bb7aa52 | 123 | /* Read and store the input element in the destination */ | 
| emilmont | 1:fdd22bb7aa52 | 124 | *px = *pIn++; | 
| emilmont | 1:fdd22bb7aa52 | 125 | |
| emilmont | 1:fdd22bb7aa52 | 126 | /* Update the pointer px to point to the next row of the transposed matrix */ | 
| emilmont | 1:fdd22bb7aa52 | 127 | px += nRows; | 
| emilmont | 1:fdd22bb7aa52 | 128 | |
| emilmont | 1:fdd22bb7aa52 | 129 | /* Decrement the column loop counter */ | 
| emilmont | 1:fdd22bb7aa52 | 130 | blkCnt--; | 
| emilmont | 1:fdd22bb7aa52 | 131 | } | 
| emilmont | 1:fdd22bb7aa52 | 132 | |
| emilmont | 1:fdd22bb7aa52 | 133 | /* Perform matrix transpose for last 3 samples here. */ | 
| emilmont | 1:fdd22bb7aa52 | 134 | blkCnt = nColumns % 0x4u; | 
| emilmont | 1:fdd22bb7aa52 | 135 | |
| emilmont | 1:fdd22bb7aa52 | 136 | while(blkCnt > 0u) | 
| emilmont | 1:fdd22bb7aa52 | 137 | { | 
| emilmont | 1:fdd22bb7aa52 | 138 | /* Read and store the input element in the destination */ | 
| emilmont | 1:fdd22bb7aa52 | 139 | *px = *pIn++; | 
| emilmont | 1:fdd22bb7aa52 | 140 | |
| emilmont | 1:fdd22bb7aa52 | 141 | /* Update the pointer px to point to the next row of the transposed matrix */ | 
| emilmont | 1:fdd22bb7aa52 | 142 | px += nRows; | 
| emilmont | 1:fdd22bb7aa52 | 143 | |
| emilmont | 1:fdd22bb7aa52 | 144 | /* Decrement the column loop counter */ | 
| emilmont | 1:fdd22bb7aa52 | 145 | blkCnt--; | 
| emilmont | 1:fdd22bb7aa52 | 146 | } | 
| emilmont | 1:fdd22bb7aa52 | 147 | |
| emilmont | 1:fdd22bb7aa52 | 148 | #else | 
| emilmont | 1:fdd22bb7aa52 | 149 | |
| emilmont | 1:fdd22bb7aa52 | 150 | /* Run the below code for Cortex-M0 */ | 
| emilmont | 1:fdd22bb7aa52 | 151 | |
| emilmont | 1:fdd22bb7aa52 | 152 | uint16_t col, i = 0u, row = nRows; /* loop counters */ | 
| emilmont | 1:fdd22bb7aa52 | 153 | arm_status status; /* status of matrix transpose */ | 
| emilmont | 1:fdd22bb7aa52 | 154 | |
| emilmont | 1:fdd22bb7aa52 | 155 | |
| emilmont | 1:fdd22bb7aa52 | 156 | #ifdef ARM_MATH_MATRIX_CHECK | 
| emilmont | 1:fdd22bb7aa52 | 157 | |
| emilmont | 1:fdd22bb7aa52 | 158 | /* Check for matrix mismatch condition */ | 
| emilmont | 1:fdd22bb7aa52 | 159 | if((pSrc->numRows != pDst->numCols) || (pSrc->numCols != pDst->numRows)) | 
| emilmont | 1:fdd22bb7aa52 | 160 | { | 
| emilmont | 1:fdd22bb7aa52 | 161 | /* Set status as ARM_MATH_SIZE_MISMATCH */ | 
| emilmont | 1:fdd22bb7aa52 | 162 | status = ARM_MATH_SIZE_MISMATCH; | 
| emilmont | 1:fdd22bb7aa52 | 163 | } | 
| emilmont | 1:fdd22bb7aa52 | 164 | else | 
| emilmont | 1:fdd22bb7aa52 | 165 | #endif /* #ifdef ARM_MATH_MATRIX_CHECK */ | 
| emilmont | 1:fdd22bb7aa52 | 166 | |
| emilmont | 1:fdd22bb7aa52 | 167 | { | 
| emilmont | 1:fdd22bb7aa52 | 168 | /* Matrix transpose by exchanging the rows with columns */ | 
| emilmont | 1:fdd22bb7aa52 | 169 | /* row loop */ | 
| emilmont | 1:fdd22bb7aa52 | 170 | do | 
| emilmont | 1:fdd22bb7aa52 | 171 | { | 
| emilmont | 1:fdd22bb7aa52 | 172 | /* The pointer px is set to starting address of the column being processed */ | 
| emilmont | 1:fdd22bb7aa52 | 173 | px = pOut + i; | 
| emilmont | 1:fdd22bb7aa52 | 174 | |
| emilmont | 1:fdd22bb7aa52 | 175 | /* Initialize column loop counter */ | 
| emilmont | 1:fdd22bb7aa52 | 176 | col = nColumns; | 
| emilmont | 1:fdd22bb7aa52 | 177 | |
| emilmont | 1:fdd22bb7aa52 | 178 | while(col > 0u) | 
| emilmont | 1:fdd22bb7aa52 | 179 | { | 
| emilmont | 1:fdd22bb7aa52 | 180 | /* Read and store the input element in the destination */ | 
| emilmont | 1:fdd22bb7aa52 | 181 | *px = *pIn++; | 
| emilmont | 1:fdd22bb7aa52 | 182 | |
| emilmont | 1:fdd22bb7aa52 | 183 | /* Update the pointer px to point to the next row of the transposed matrix */ | 
| emilmont | 1:fdd22bb7aa52 | 184 | px += nRows; | 
| emilmont | 1:fdd22bb7aa52 | 185 | |
| emilmont | 1:fdd22bb7aa52 | 186 | /* Decrement the column loop counter */ | 
| emilmont | 1:fdd22bb7aa52 | 187 | col--; | 
| emilmont | 1:fdd22bb7aa52 | 188 | } | 
| emilmont | 1:fdd22bb7aa52 | 189 | |
| mbed_official | 3:7a284390b0ce | 190 | #endif /* #ifndef ARM_MATH_CM0_FAMILY */ | 
| emilmont | 1:fdd22bb7aa52 | 191 | |
| emilmont | 1:fdd22bb7aa52 | 192 | i++; | 
| emilmont | 1:fdd22bb7aa52 | 193 | |
| emilmont | 1:fdd22bb7aa52 | 194 | /* Decrement the row loop counter */ | 
| emilmont | 1:fdd22bb7aa52 | 195 | row--; | 
| emilmont | 1:fdd22bb7aa52 | 196 | |
| emilmont | 1:fdd22bb7aa52 | 197 | } | 
| emilmont | 1:fdd22bb7aa52 | 198 | while(row > 0u); /* row loop end */ | 
| emilmont | 1:fdd22bb7aa52 | 199 | |
| emilmont | 1:fdd22bb7aa52 | 200 | /* set status as ARM_MATH_SUCCESS */ | 
| emilmont | 1:fdd22bb7aa52 | 201 | status = ARM_MATH_SUCCESS; | 
| emilmont | 1:fdd22bb7aa52 | 202 | } | 
| emilmont | 1:fdd22bb7aa52 | 203 | |
| emilmont | 1:fdd22bb7aa52 | 204 | /* Return to application */ | 
| emilmont | 1:fdd22bb7aa52 | 205 | return (status); | 
| emilmont | 1:fdd22bb7aa52 | 206 | } | 
| emilmont | 1:fdd22bb7aa52 | 207 | |
| emilmont | 1:fdd22bb7aa52 | 208 | /** | 
| emilmont | 1:fdd22bb7aa52 | 209 | * @} end of MatrixTrans group | 
| emilmont | 1:fdd22bb7aa52 | 210 | */ |