driverAtmelRFInterface.c

00001 /*
00002  * driverAtmelRFInterface.c
00003  *
00004  *  Created on: 14 July 2014
00005  *      Author: mBed Team
00006  */
00007 
00008 #include "arm_hal_interrupt.h"
00009 #include "arm_hal_phy.h"
00010 #include "driverRFPhy.h"
00011 #include "driverAtmelRFInterface.h"
00012 #include "low_level_RF.h"
00013 
00014 #include <stdio.h>
00015 
00016 void (*app_rf_settings_cb)(void) = 0;
00017 static uint8_t rf_part_num = 0;
00018 static uint8_t rf_rx_lqi;
00019 static int8_t rf_rx_rssi;
00020 /*TODO: RSSI Base value setting*/
00021 static int8_t rf_rssi_base_val = -91;
00022 static uint8_t phy_timers_enabled = 0;
00023 
00024 /*
00025  * \brief Delay function for RF interface.
00026  *
00027  * \param ticks Number of delay ticks
00028  *
00029  * \return none
00030  */
00031 void rf_if_delay_function(uint16_t ticks)
00032 {
00033     while(ticks--);
00034 }
00035 
00036 /*
00037  * \brief Function initialises the RF timer for ACK wait and calibration.
00038  *
00039  * \param none
00040  *
00041  * \return none
00042  */
00043 void rf_if_timer_init(void)
00044 {
00045     /*  TODO   */
00046 }
00047 
00048 /*
00049  * \brief Function starts the ACK wait timeout.
00050  *
00051  * \param slots Given slots, resolution 50us
00052  *
00053  * \return none
00054  */
00055 void rf_if_ack_wait_timer_start(uint16_t slots)
00056 {
00057     /*  TODO   */
00058 }
00059 
00060 /*
00061  * \brief Function starts the calibration interval.
00062  *
00063  * \param slots Given slots, resolution 50us
00064  *
00065  * \return none
00066  */
00067 void rf_if_calibration_timer_start(uint32_t slots)
00068 {
00069     /*  TODO   */
00070 }
00071 
00072 /*
00073  * \brief Function stops the ACK wait timeout.
00074  *
00075  * \param none
00076  *
00077  * \return none
00078  */
00079 void rf_if_ack_wait_timer_stop(void)
00080 {
00081     phy_timers_enabled &= ~PHY_ACK_WAIT_TIMER;
00082 }
00083 
00084 /*
00085  * \brief Function is a call back for ACK wait timeout.
00086  *
00087  * \param none
00088  *
00089  * \return none
00090  */
00091 void rf_if_ack_wait_timer_interrupt(void)
00092 {
00093     /*  TODO   */
00094 }
00095 
00096 /*
00097  * \brief Function is a call back for calibration interval timer.
00098  *
00099  * \param none
00100  *
00101  * \return none
00102  */
00103 void rf_if_calibration_timer_interrupt(void)
00104 {
00105     /*  TODO   */
00106 }
00107 
00108 /*
00109  * \brief Function sets SLP_TR pin high in RF interface.
00110  *
00111  * \param none
00112  *
00113  * \return none
00114  */
00115 void rf_if_slp_tr_pin_high(void)
00116 {
00117       RF_SLP_TR_Set(1);
00118 }
00119 
00120 /*
00121  * \brief Function sets SLP_TR pin low in RF interface.
00122  *
00123  * \param none
00124  *
00125  * \return none
00126  */
00127 void rf_if_slp_tr_pin_low(void)
00128 {
00129     RF_SLP_TR_Set(0);   
00130 }
00131 
00132 /*
00133  * \brief Function returns peripheral ID for SPI interface.
00134  *
00135  * \param none
00136  *
00137  * \return peripheral ID
00138  */
00139 uint8_t rf_if_get_rf_spi_periph(uint8_t spi_interface)
00140 {
00141     uint8_t ret_val = 19 + spi_interface;
00142     return ret_val;
00143 }
00144 
00145 /*
00146  * \brief Function returns interrupt number for I/O port.
00147  *
00148  * \param none
00149  *
00150  * \return interrupt number
00151  */
00152 uint8_t rf_if_get_rf_irq_number(uint8_t port)
00153 {
00154     /*  not needed in mBed  */
00155     return 0x00;
00156 }
00157 
00158 
00159 /*
00160  * \brief Function enables RF irq pin interrupts in RF interface.
00161  *
00162  * \param none
00163  *
00164  * \return none
00165  */
00166 void rf_if_enable_irq(void)
00167 {
00168     /*  not needed in mBed  */
00169 }
00170 
00171 
00172 /*
00173  * \brief Function initialises RF interrupt pin in RF interface.
00174  *
00175  * \param none
00176  *
00177  * \return none
00178  */
00179 void rf_if_init_irq_delete(void)
00180 {
00181     RF_IRQ_Init();  
00182 }
00183 
00184 /*
00185  * \brief Function initialises the SPI interface for RF.
00186  *
00187  * \param none
00188  *
00189  * \return none
00190  */
00191 void rf_if_spi_init(void)
00192 {
00193     /*  not needed in mBed  */
00194 }
00195 
00196 /*
00197  * \brief Function initialises SLP_TR pin in RF interface.
00198  *
00199  * \param none
00200  *
00201  * \return none
00202  */
00203 void rf_if_init_slp_tr_pin(void)
00204 {
00205     /*Chip select*/
00206       //RF_SLP_TR_Set(0);       // moved to reset function
00207 }
00208 
00209 /*
00210  * \brief Function returns peripheral ID for I/O port.
00211  *
00212  * \param none
00213  *
00214  * \return peripheral ID
00215  */
00216 uint8_t rf_if_get_port_peripheral_id(uint8_t port)
00217 {
00218     uint8_t ret_val = 9 + port;
00219     return ret_val;
00220 }
00221 
00222 /*
00223  * \brief Function initialises I/O pins for RF interface.
00224  *
00225  * \param none
00226  *
00227  * \return peripheral ID
00228  */
00229 void rf_if_init_spi_pins(void)
00230 {
00231     /*  not needed in mBed  */
00232 }
00233 
00234 /*
00235  * \brief Function reads data from the given RF SRAM address.
00236  *
00237  * \param ptr Read pointer
00238  * \param sram_address Read address in SRAM
00239  * \param len Length of the read
00240  *
00241  * \return none
00242  */
00243 void rf_if_read_payload(uint8_t *ptr, uint8_t sram_address, uint8_t len)
00244 {
00245     uint8_t i;
00246 
00247       RF_CS_Set(0);
00248     spi_exchange(0x20);
00249     spi_exchange(sram_address);
00250     for(i=0; i<len; i++)
00251         *ptr++ = spi_exchange(0);
00252 
00253     /*Read LQI and RSSI in variable*/
00254     rf_rx_lqi = spi_exchange(0);
00255     rf_rx_rssi = (rf_rssi_base_val + spi_exchange(0));
00256       RF_CS_Set(1);
00257 }
00258 
00259 /*
00260  * \brief Function polls while the SPI chip select is active.
00261  *
00262  * \param none
00263  *
00264  * \return none
00265  */
00266 void rf_if_spi_poll_chip_select(void)
00267 {
00268     RF_CS_while_active();   
00269 }
00270 
00271 void rf_if_set_bit(uint8_t addr, uint8_t bit, uint8_t bit_mask)
00272 {
00273     uint8_t reg = rf_if_read_register(addr);
00274     reg &= ~bit_mask;
00275     reg |= bit;
00276     rf_if_write_register(addr, reg);
00277 }
00278 
00279 /*
00280  * \brief Function clears bit(s) in given RF register.
00281  *
00282  * \param addr Address of the register to clear
00283  * \param bit Bit(s) to clear
00284  *
00285  * \return none
00286  */
00287 void rf_if_clear_bit(uint8_t addr, uint8_t bit)
00288 {
00289     uint8_t reg = rf_if_read_register(addr);
00290     reg &= ~bit;
00291     rf_if_write_register(addr, reg);
00292 }
00293 
00294 /*
00295  * \brief Function writes register in RF.
00296  *
00297  * \param addr Address on the RF
00298  * \param data Written data
00299  *
00300  * \return none
00301  */
00302 void rf_if_write_register(uint8_t addr, uint8_t data)
00303 {
00304     uint8_t cmd = 0xC0;
00305     arm_enter_critical();
00306 
00307       spi_write(cmd | addr, data);
00308 
00309     arm_exit_critical();
00310 }
00311 
00312 /*
00313  * \brief Function reads RF register.
00314  *
00315  * \param addr Address on the RF
00316  *
00317  * \return Read data
00318  */
00319 uint8_t rf_if_read_register(uint8_t addr)
00320 {
00321     uint8_t cmd = 0x80;
00322     uint8_t data;
00323     arm_enter_critical();
00324 
00325       data = spi_read(cmd | addr);
00326     arm_exit_critical();
00327     return data;
00328 }
00329 
00330 /*
00331  * \brief Function resets the RF.
00332  *
00333  * \param none
00334  *
00335  * \return none
00336  */
00337 void rf_if_reset_radio(void)
00338 {    
00339     /* Reset and init RF_CS - chip select  */
00340       RF_RST_Set(1);
00341     rf_if_delay_function(65000);
00342     RF_RST_Set(0);
00343     rf_if_delay_function(65000);
00344       /* Set default states */
00345       RF_CS_Set(1);
00346       RF_SLP_TR_Set(0);
00347     rf_if_delay_function(65000);
00348     RF_RST_Set(1);
00349     rf_if_delay_function(65000);    
00350 
00351       /*Initialise RF interrupt pin*/
00352     RF_IRQ_Init();
00353 }
00354 
00355 /*
00356  * \brief Function enables the Front end usage.
00357  *
00358  * \param none
00359  *
00360  * \return none
00361  */
00362 void rf_if_enable_pa_ext(void)
00363 {
00364     /*Set PA_EXT_EN to enable controlling of external front end*/
00365     rf_if_set_bit(TRX_CTRL_1, PA_EXT_EN, PA_EXT_EN);
00366 }
00367 
00368 /*
00369  * \brief Function disables the Front end usage.
00370  *
00371  * \param none
00372  *
00373  * \return none
00374  */
00375 void rf_if_disable_pa_ext(void)
00376 {
00377     /*Clear PA_EXT_EN to disable controlling of external front end*/
00378     rf_if_clear_bit(TRX_CTRL_1, PA_EXT_EN);
00379 }
00380 
00381 /*
00382  * \brief Function enables the Antenna diversity usage.
00383  *
00384  * \param none
00385  *
00386  * \return none
00387  */
00388 void rf_if_enable_ant_div(void)
00389 {
00390     /*Set ANT_EXT_SW_EN to enable controlling of antenna diversity*/
00391     rf_if_set_bit(ANT_DIV, ANT_EXT_SW_EN, ANT_EXT_SW_EN);
00392 }
00393 
00394 /*
00395  * \brief Function disables the Antenna diversity usage.
00396  *
00397  * \param none
00398  *
00399  * \return none
00400  */
00401 void rf_if_disable_ant_div(void)
00402 {
00403     rf_if_clear_bit(ANT_DIV, ANT_EXT_SW_EN);
00404 }
00405 
00406 /*
00407  * \brief Function sets the SLP TR pin.
00408  *
00409  * \param none
00410  *
00411  * \return none
00412  */
00413 void rf_if_enable_slptr(void)
00414 {
00415       RF_SLP_TR_Set(1);
00416 }
00417 
00418 /*
00419  * \brief Function clears the SLP TR pin.
00420  *
00421  * \param none
00422  *
00423  * \return none
00424  */
00425 void rf_if_disable_slptr(void)
00426 {
00427       RF_SLP_TR_Set(0);
00428 }
00429 
00430 /*
00431  * \brief Function writes the antenna diversity settings.
00432  *
00433  * \param none
00434  *
00435  * \return none
00436  */
00437 void rf_if_write_antenna_diversity_settings(void)
00438 {
00439     /*Recommended setting of PDT_THRES is 3 when antenna diversity is used*/
00440     rf_if_set_bit(RX_CTRL, 0x03, 0x0f);
00441     rf_if_write_register(ANT_DIV, ANT_DIV_EN | ANT_EXT_SW_EN | ANT_CTRL_DEFAULT);
00442 }
00443 
00444 /*
00445  * \brief Function writes the TX output power register.
00446  *
00447  * \param value Given register value
00448  *
00449  * \return none
00450  */
00451 void rf_if_write_set_tx_power_register(uint8_t value)
00452 {
00453     rf_if_write_register(PHY_TX_PWR, value);
00454 }
00455 
00456 /*
00457  * \brief Function writes the RPC register.
00458  *
00459  * \param value Given register value
00460  *
00461  * \return none
00462  */
00463 void rf_if_write_set_trx_rpc_register(uint8_t value)
00464 {
00465     rf_if_write_register(TRX_RPC, value);
00466 }
00467 
00468 /*
00469  * \brief Function returns the RF part number.
00470  *
00471  * \param none
00472  *
00473  * \return part number
00474  */
00475 uint8_t rf_if_read_part_num_delete(void)
00476 {
00477     return rf_if_read_register(PART_NUM);
00478 }
00479 
00480 /*
00481  * \brief Function writes the RF settings and initialises SPI interface.
00482  *
00483  * \param none
00484  *
00485  * \return none
00486  */
00487 void rf_if_write_rf_settings(void)
00488 {    
00489     /* unslotted mode - max. frame & csma retries = 0 */
00490     rf_if_write_register(XAH_CTRL_0,0);
00491     if (rf_if_read_register(XAH_CTRL_0) != 0) {
00492       printf("Error: XAH_CTRL_0 reg. incorrect!\r\n"); 
00493         //while(1);
00494     }    
00495     
00496     /* TX_AUTO_CRC On - IRQ_Mask_Mode = 0 - IRQ_Polarity = 0 (Pin IRQ is active high) */
00497     rf_if_write_register(TRX_CTRL_1, 0x20);
00498     if (rf_if_read_register(TRX_CTRL_1) != 0x20) {
00499       printf("Error: TRX_CTRL_1 reg. incorrect!\r\n"); 
00500         //while(1);
00501     }
00502     
00503   /*CCA Mode - Carrier sense OR energy above threshold. Channel list is set separately*/
00504     rf_if_write_register(PHY_CC_CCA, 0x05);
00505     if (rf_if_read_register(PHY_CC_CCA) != 0x05) {
00506       printf("Error: PHY_CC_CCA reg. incorrect!\r\n"); 
00507         //while(1);
00508     }  
00509     
00510   /*Read transceiver PART_NUM*/
00511   rf_part_num = rf_if_read_register(PART_NUM);
00512 
00513   /*Sub-GHz RF settings*/
00514   if(rf_part_num == PART_AT86RF212)
00515   {
00516       /*GC_TX_OFFS mode-dependent setting - OQPSK*/
00517       rf_if_write_register(RF_CTRL_0, 0x32);
00518     
00519           if(rf_if_read_register(VERSION_NUM) == VERSION_AT86RF212B)
00520       {
00521           /*TX Output Power setting - 0 dBm North American Band*/
00522           rf_if_write_register(PHY_TX_PWR, 0x03);
00523       }
00524       else
00525       {
00526           /*TX Output Power setting - 0 dBm North American Band*/
00527           rf_if_write_register(PHY_TX_PWR, 0x24);
00528       }
00529 
00530       /*PHY Mode: IEEE 802.15.4-2006/2011 - OQPSK-SIN-250*/
00531       rf_if_write_register(TRX_CTRL_2, OQPSK_SIN_250);
00532       rf_rssi_base_val = -98;
00533     }
00534     /*2.4GHz RF settings*/
00535     else if (rf_part_num == PART_AT86RF233)
00536     {
00537       printf("Part detected: ATMEL AT86RF233\r\n");    
00538        /*PHY Mode: IEEE 802.15.4 - Data Rate 250 kb/s*/
00539        rf_if_write_register(TRX_CTRL_2, 0);
00540        rf_rssi_base_val = -91;
00541     } else {
00542         // other module not yet defined
00543         printf("Error: RF Part Unknown!\r\n");             
00544     }
00545 }
00546 
00547 
00548 /*
00549  * \brief Function checks the channel availability
00550  *
00551  * \param none
00552  *
00553  * \return 1 Channel clear
00554  * \return 0 Channel not clear
00555  */
00556 uint8_t rf_if_check_cca(void)
00557 {
00558     uint8_t retval = 0;
00559     if(rf_if_read_register(TRX_STATUS) & CCA_STATUS)
00560     {
00561         retval = 1;
00562     }
00563     return retval;
00564 }
00565 
00566 /*
00567  * \brief Function checks if the CRC is valid in received frame
00568  *
00569  * \param none
00570  *
00571  * \return 1 CRC ok
00572  * \return 0 CRC failed
00573  */
00574 uint8_t rf_if_check_crc(void)
00575 {
00576     uint8_t retval = 0;
00577     if(rf_if_read_register(PHY_RSSI) & CRC_VALID)
00578     {
00579         retval = 1;
00580     }
00581     return retval;
00582 }
00583 
00584 /*
00585  * \brief Function returns the RF state
00586  *
00587  * \param none
00588  *
00589  * \return RF state
00590  */
00591 uint8_t rf_if_read_trx_state(void)
00592 {
00593     return rf_if_read_register(TRX_STATUS) & 0x1F;
00594 }
00595 
00596 /*
00597  * \brief Function reads data from RF SRAM.
00598  *
00599  * \param ptr Read pointer
00600  * \param len Length of the read
00601  *
00602  * \return none
00603  */
00604 void rf_if_read_packet(uint8_t *ptr, uint8_t len)
00605 {
00606     if(rf_part_num == PART_AT86RF231 || rf_part_num == PART_AT86RF212)
00607         rf_if_read_payload(ptr, 0, len);
00608     else if(rf_part_num == PART_AT86RF233)
00609         rf_if_read_payload(ptr, 1, len);
00610 }
00611 
00612 /*
00613  * \brief Function writes RF short address registers
00614  *
00615  * \param short_address Given short address
00616  *
00617  * \return none
00618  */
00619 void rf_if_write_short_addr_registers(uint8_t *short_address)
00620 {
00621     rf_if_write_register(SHORT_ADDR_1, *short_address++);
00622     rf_if_write_register(SHORT_ADDR_0, *short_address);
00623 }
00624 
00625 /*
00626  * \brief Function sets the frame pending in ACK message
00627  *
00628  * \param state Given frame pending state
00629  *
00630  * \return none
00631  */
00632 void rf_if_ack_pending_ctrl(uint8_t state)
00633 {
00634     arm_enter_critical();
00635     if(state)
00636     {
00637         rf_if_set_bit(CSMA_SEED_1, (1 << AACK_SET_PD), (1 << AACK_SET_PD));
00638     }
00639     else
00640     {
00641         rf_if_clear_bit(CSMA_SEED_1, (1 << AACK_SET_PD));
00642     }
00643     arm_exit_critical();
00644 }
00645 
00646 /*
00647  * \brief Function returns the state of frame pending control
00648  *
00649  * \param none
00650  *
00651  * \return Frame pending state
00652  */
00653 uint8_t rf_if_last_acked_pending(void)
00654 {
00655     uint8_t last_acked_data_pending;
00656 
00657     if(rf_if_read_register(CSMA_SEED_1) & 0x20)
00658         last_acked_data_pending = 1;
00659     else
00660         last_acked_data_pending = 0;
00661 
00662     return last_acked_data_pending;
00663 }
00664 
00665 /*
00666  * \brief Function calibrates the RF part.
00667  *
00668  * \param none
00669  *
00670  * \return none
00671  */
00672 void rf_if_calibration(void)
00673 {
00674     rf_if_set_bit(FTN_CTRL, FTN_START, FTN_START);
00675     /*Wait while calibration is running*/
00676     while(rf_if_read_register(FTN_CTRL) & FTN_START);
00677 }
00678 
00679 /*
00680  * \brief Function writes RF PAN Id registers
00681  *
00682  * \param pan_id Given PAN Id
00683  *
00684  * \return none
00685  */
00686 void rf_if_write_pan_id_registers(uint8_t *pan_id)
00687 {
00688     rf_if_write_register(PAN_ID_1, *pan_id++);
00689     rf_if_write_register(PAN_ID_0, *pan_id);
00690 }
00691 
00692 /*
00693  * \brief Function writes RF IEEE Address registers
00694  *
00695  * \param address Given IEEE Address
00696  *
00697  * \return none
00698  */
00699 void rf_if_write_ieee_addr_registers(uint8_t *address)
00700 {
00701     uint8_t i;
00702     uint8_t temp = IEEE_ADDR_0;
00703 
00704     for(i=0; i<8; i++)
00705         rf_if_write_register(temp++, address[7-i]);
00706 }
00707 
00708 /*
00709  * \brief Function writes data in RF frame buffer.
00710  *
00711  * \param ptr Pointer to data
00712  * \param length Pointer to length
00713  *
00714  * \return none
00715  */
00716 void rf_if_write_frame_buffer(uint8_t *ptr, uint8_t length)
00717 {
00718     uint8_t i;
00719     uint8_t cmd = 0x60;
00720 
00721       RF_CS_Set(0);
00722     spi_exchange(cmd);
00723     spi_exchange(length + 2);
00724     for(i=0; i<length; i++)
00725         spi_exchange(*ptr++);
00726 
00727     rf_if_delay_function(10);   
00728       RF_CS_Set(1);
00729 }
00730 
00731 /*
00732  * \brief Function returns 8-bit random value.
00733  *
00734  * \param none
00735  *
00736  * \return random value
00737  */
00738 uint8_t rf_if_read_rnd(void)
00739 {
00740     uint8_t temp;
00741 
00742     temp = ((rf_if_read_register(PHY_RSSI)>>5) << 6);
00743     temp |= ((rf_if_read_register(PHY_RSSI)>>5) << 4);
00744     temp |= ((rf_if_read_register(PHY_RSSI)>>5) << 2);
00745     temp |= ((rf_if_read_register(PHY_RSSI)>>5));
00746     return temp;
00747 }
00748 
00749 /*
00750  * \brief Function changes the state of the RF.
00751  *
00752  * \param trx_state Given RF state
00753  *
00754  * \return none
00755  */
00756 void rf_if_change_trx_state(rf_trx_states_t trx_state)
00757 {
00758     arm_enter_critical();
00759     rf_if_write_register(TRX_STATE, trx_state);
00760     /*Wait while not in desired state*/
00761     rf_poll_trx_state_change(trx_state);
00762     arm_exit_critical();
00763 }
00764 
00765 /*
00766  * \brief Function enables the TX END interrupt
00767  *
00768  * \param none
00769  *
00770  * \return none
00771  */
00772 void rf_if_enable_tx_end_interrupt(void)
00773 {
00774     rf_if_set_bit(IRQ_MASK, TRX_END, 0x08);
00775 }
00776 
00777 /*
00778  * \brief Function enables the RX END interrupt
00779  *
00780  * \param none
00781  *
00782  * \return none
00783  */
00784 void rf_if_enable_rx_end_interrupt(void)
00785 {
00786     rf_if_set_bit(IRQ_MASK, TRX_END, 0x08);
00787 }
00788 
00789 /*
00790  * \brief Function enables the RX START interrupt
00791  *
00792  * \param none
00793  *
00794  * \return none
00795  */
00796 void rf_if_enable_rx_start_interrupt(void)
00797 {
00798     rf_if_set_bit(IRQ_MASK, RX_START, 0x04);
00799 }
00800 
00801 /*
00802  * \brief Function enables the CCA ED interrupt
00803  *
00804  * \param none
00805  *
00806  * \return none
00807  */
00808 void rf_if_enable_cca_ed_done_interrupt(void)
00809 {
00810     rf_if_set_bit(IRQ_MASK, CCA_ED_DONE, 0x10);
00811 }
00812 
00813 /*
00814  * \brief Function starts the CCA process
00815  *
00816  * \param none
00817  *
00818  * \return none
00819  */
00820 void rf_if_start_cca_process(void)
00821 {
00822     rf_if_set_bit(PHY_CC_CCA, CCA_REQUEST, 0x80);
00823 }
00824 
00825 /*
00826  * \brief Function returns the length of the received packet
00827  *
00828  * \param none
00829  *
00830  * \return packet length
00831  */
00832 uint8_t rf_if_read_received_frame_length(void)
00833 {
00834     uint8_t length;
00835 
00836       RF_CS_Set(0);
00837     spi_exchange(0x20);
00838     length = spi_exchange(0);
00839       RF_CS_Set(1);
00840     return length;
00841 }
00842 
00843 /*
00844  * \brief Function returns the LQI of the received packet
00845  *
00846  * \param none
00847  *
00848  * \return packet LQI
00849  */
00850 uint8_t rf_if_read_lqi(void)
00851 {
00852     return rf_rx_lqi;
00853 }
00854 
00855 /*
00856  * \brief Function returns the RSSI of the received packet
00857  *
00858  * \param none
00859  *
00860  * \return packet RSSI
00861  */
00862 int8_t rf_if_read_rssi(void)
00863 {
00864     return rf_rx_rssi;
00865 }
00866 
00867 /*
00868  * \brief Function sets the RF channel field
00869  *
00870  * \param Given channel
00871  *
00872  * \return none
00873  */
00874 void rf_if_set_channel_register(uint8_t channel)
00875 {
00876     rf_if_set_bit(PHY_CC_CCA, channel, 0x1f);
00877 }
00878 
00879 /*
00880  * \brief Function returns the pointer to RF interrupt handler
00881  *
00882  * \param none
00883  *
00884  * \return RF interrupt handler function
00885  */
00886 void (*rf_if_get_rf_interrupt_function())(void)
00887 {
00888     return rf_if_interrupt_handler;
00889 }
00890 
00891 /*
00892  * \brief Function is a RF interrupt vector. End of frame in RX and TX are handled here as well as CCA process interrupt.
00893  *
00894  * \param none
00895  *
00896  * \return none
00897  */
00898 void rf_if_interrupt_handler(void)
00899 {
00900     uint8_t irq_status;
00901 
00902     /*Read interrupt flag*/
00903     irq_status = rf_if_read_register(IRQ_STATUS);
00904 
00905     /*Disable interrupt on RF*/
00906     rf_if_clear_bit(IRQ_MASK, irq_status);
00907     /*RX start interrupt*/
00908     if(irq_status & RX_START)
00909     {
00910     }
00911     /*Address matching interrupt*/
00912     if(irq_status & AMI)
00913     {
00914     }
00915     if(irq_status & TRX_UR)
00916     {
00917     }
00918     /*Frame end interrupt (RX and TX)*/
00919     if(irq_status & TRX_END)
00920     {
00921         /*TX done interrupt*/
00922         if(rf_if_read_trx_state() == PLL_ON || rf_if_read_trx_state() == TX_ARET_ON)
00923         {
00924             rf_handle_tx_end();
00925         }
00926         /*Frame received interrupt*/
00927         else
00928         {
00929             rf_handle_rx_end();
00930         }
00931     }
00932     if(irq_status & CCA_ED_DONE)
00933     {
00934         rf_handle_cca_ed_done();
00935     }
00936 }
00937