Nothing Special
Modification of Mbed-dev library for LQFP48 package microcontrollers: STM32F103C8 (STM32F103C8T6) and STM32F103CB (STM32F103CBT6) (Bluepill boards, Maple mini etc. )
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mbed-STM32F103C8_org
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Nothing Special
Library for STM32F103C8 (Bluepill boards etc.).
Use this instead of mbed library.
This library allows the size of the code in the FLASH up to 128kB. Therefore, code also runs on microcontrollers STM32F103CB (eg. Maple mini).
But in the case of STM32F103C8, check the size of the resulting code would not exceed 64kB.
To compile a program with this library, use NUCLEO-F103RB as the target name. !
Changes:
- Corrected initialization of the HSE + crystal clock (mbed permanent bug), allowing the use of on-board xtal (8MHz).(1)
- Additionally, it also set USB clock (48Mhz).(2)
- Definitions of pins and peripherals adjusted to LQFP48 case.
- Board led LED1 is now PC_13 (3)
- USER_BUTTON is now PC_14 (4)
Now the library is complete rebuilt based on mbed-dev v160 (and not yet fully tested).
notes
(1) - In case 8MHz xtal on board, CPU frequency is 72MHz. Without xtal is 64MHz.
(2) - Using the USB interface is only possible if STM32 is clocking by on-board 8MHz xtal or external clock signal 8MHz on the OSC_IN pin.
(3) - On Bluepill board led operation is reversed, i.e. 0 - led on, 1 - led off.
(4) - Bluepill board has no real user button
Information
After export to SW4STM (AC6):
- add line
#include "mbed_config.h"in files Serial.h and RawSerial.h - in project properties change
Optimisation LeveltoOptimise for size (-Os)
hal/spi_api.h@148:8b0b02bf146f, 2017-04-27 (annotated)
- Committer:
- mega64
- Date:
- Thu Apr 27 23:56:38 2017 +0000
- Revision:
- 148:8b0b02bf146f
- Parent:
- 147:38a0c20c7b3e
Remove unnecessary folders
Who changed what in which revision?
| User | Revision | Line number | New contents of line |
|---|---|---|---|
| mega64 | 147:38a0c20c7b3e | 1 | |
| mega64 | 147:38a0c20c7b3e | 2 | /** \addtogroup hal */ |
| mega64 | 147:38a0c20c7b3e | 3 | /** @{*/ |
| mega64 | 147:38a0c20c7b3e | 4 | /* mbed Microcontroller Library |
| mega64 | 147:38a0c20c7b3e | 5 | * Copyright (c) 2006-2013 ARM Limited |
| mega64 | 147:38a0c20c7b3e | 6 | * |
| mega64 | 147:38a0c20c7b3e | 7 | * Licensed under the Apache License, Version 2.0 (the "License"); |
| mega64 | 147:38a0c20c7b3e | 8 | * you may not use this file except in compliance with the License. |
| mega64 | 147:38a0c20c7b3e | 9 | * You may obtain a copy of the License at |
| mega64 | 147:38a0c20c7b3e | 10 | * |
| mega64 | 147:38a0c20c7b3e | 11 | * http://www.apache.org/licenses/LICENSE-2.0 |
| mega64 | 147:38a0c20c7b3e | 12 | * |
| mega64 | 147:38a0c20c7b3e | 13 | * Unless required by applicable law or agreed to in writing, software |
| mega64 | 147:38a0c20c7b3e | 14 | * distributed under the License is distributed on an "AS IS" BASIS, |
| mega64 | 147:38a0c20c7b3e | 15 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. |
| mega64 | 147:38a0c20c7b3e | 16 | * See the License for the specific language governing permissions and |
| mega64 | 147:38a0c20c7b3e | 17 | * limitations under the License. |
| mega64 | 147:38a0c20c7b3e | 18 | */ |
| mega64 | 147:38a0c20c7b3e | 19 | #ifndef MBED_SPI_API_H |
| mega64 | 147:38a0c20c7b3e | 20 | #define MBED_SPI_API_H |
| mega64 | 147:38a0c20c7b3e | 21 | |
| mega64 | 147:38a0c20c7b3e | 22 | #include "device.h" |
| mega64 | 147:38a0c20c7b3e | 23 | #include "hal/dma_api.h" |
| mega64 | 147:38a0c20c7b3e | 24 | #include "hal/buffer.h" |
| mega64 | 147:38a0c20c7b3e | 25 | |
| mega64 | 147:38a0c20c7b3e | 26 | #if DEVICE_SPI |
| mega64 | 147:38a0c20c7b3e | 27 | |
| mega64 | 147:38a0c20c7b3e | 28 | #define SPI_EVENT_ERROR (1 << 1) |
| mega64 | 147:38a0c20c7b3e | 29 | #define SPI_EVENT_COMPLETE (1 << 2) |
| mega64 | 147:38a0c20c7b3e | 30 | #define SPI_EVENT_RX_OVERFLOW (1 << 3) |
| mega64 | 147:38a0c20c7b3e | 31 | #define SPI_EVENT_ALL (SPI_EVENT_ERROR | SPI_EVENT_COMPLETE | SPI_EVENT_RX_OVERFLOW) |
| mega64 | 147:38a0c20c7b3e | 32 | |
| mega64 | 147:38a0c20c7b3e | 33 | #define SPI_EVENT_INTERNAL_TRANSFER_COMPLETE (1 << 30) // Internal flag to report that an event occurred |
| mega64 | 147:38a0c20c7b3e | 34 | |
| mega64 | 147:38a0c20c7b3e | 35 | #define SPI_FILL_WORD (0xFFFF) |
| mega64 | 147:38a0c20c7b3e | 36 | |
| mega64 | 147:38a0c20c7b3e | 37 | #if DEVICE_SPI_ASYNCH |
| mega64 | 147:38a0c20c7b3e | 38 | /** Asynch SPI HAL structure |
| mega64 | 147:38a0c20c7b3e | 39 | */ |
| mega64 | 147:38a0c20c7b3e | 40 | typedef struct { |
| mega64 | 147:38a0c20c7b3e | 41 | struct spi_s spi; /**< Target specific SPI structure */ |
| mega64 | 147:38a0c20c7b3e | 42 | struct buffer_s tx_buff; /**< Tx buffer */ |
| mega64 | 147:38a0c20c7b3e | 43 | struct buffer_s rx_buff; /**< Rx buffer */ |
| mega64 | 147:38a0c20c7b3e | 44 | } spi_t; |
| mega64 | 147:38a0c20c7b3e | 45 | |
| mega64 | 147:38a0c20c7b3e | 46 | #else |
| mega64 | 147:38a0c20c7b3e | 47 | /** Non-asynch SPI HAL structure |
| mega64 | 147:38a0c20c7b3e | 48 | */ |
| mega64 | 147:38a0c20c7b3e | 49 | typedef struct spi_s spi_t; |
| mega64 | 147:38a0c20c7b3e | 50 | |
| mega64 | 147:38a0c20c7b3e | 51 | #endif |
| mega64 | 147:38a0c20c7b3e | 52 | |
| mega64 | 147:38a0c20c7b3e | 53 | #ifdef __cplusplus |
| mega64 | 147:38a0c20c7b3e | 54 | extern "C" { |
| mega64 | 147:38a0c20c7b3e | 55 | #endif |
| mega64 | 147:38a0c20c7b3e | 56 | |
| mega64 | 147:38a0c20c7b3e | 57 | /** |
| mega64 | 147:38a0c20c7b3e | 58 | * \defgroup hal_GeneralSPI SPI Configuration Functions |
| mega64 | 147:38a0c20c7b3e | 59 | * @{ |
| mega64 | 147:38a0c20c7b3e | 60 | */ |
| mega64 | 147:38a0c20c7b3e | 61 | |
| mega64 | 147:38a0c20c7b3e | 62 | /** Initialize the SPI peripheral |
| mega64 | 147:38a0c20c7b3e | 63 | * |
| mega64 | 147:38a0c20c7b3e | 64 | * Configures the pins used by SPI, sets a default format and frequency, and enables the peripheral |
| mega64 | 147:38a0c20c7b3e | 65 | * @param[out] obj The SPI object to initialize |
| mega64 | 147:38a0c20c7b3e | 66 | * @param[in] mosi The pin to use for MOSI |
| mega64 | 147:38a0c20c7b3e | 67 | * @param[in] miso The pin to use for MISO |
| mega64 | 147:38a0c20c7b3e | 68 | * @param[in] sclk The pin to use for SCLK |
| mega64 | 147:38a0c20c7b3e | 69 | * @param[in] ssel The pin to use for SSEL |
| mega64 | 147:38a0c20c7b3e | 70 | */ |
| mega64 | 147:38a0c20c7b3e | 71 | void spi_init(spi_t *obj, PinName mosi, PinName miso, PinName sclk, PinName ssel); |
| mega64 | 147:38a0c20c7b3e | 72 | |
| mega64 | 147:38a0c20c7b3e | 73 | /** Release a SPI object |
| mega64 | 147:38a0c20c7b3e | 74 | * |
| mega64 | 147:38a0c20c7b3e | 75 | * TODO: spi_free is currently unimplemented |
| mega64 | 147:38a0c20c7b3e | 76 | * This will require reference counting at the C++ level to be safe |
| mega64 | 147:38a0c20c7b3e | 77 | * |
| mega64 | 147:38a0c20c7b3e | 78 | * Return the pins owned by the SPI object to their reset state |
| mega64 | 147:38a0c20c7b3e | 79 | * Disable the SPI peripheral |
| mega64 | 147:38a0c20c7b3e | 80 | * Disable the SPI clock |
| mega64 | 147:38a0c20c7b3e | 81 | * @param[in] obj The SPI object to deinitialize |
| mega64 | 147:38a0c20c7b3e | 82 | */ |
| mega64 | 147:38a0c20c7b3e | 83 | void spi_free(spi_t *obj); |
| mega64 | 147:38a0c20c7b3e | 84 | |
| mega64 | 147:38a0c20c7b3e | 85 | /** Configure the SPI format |
| mega64 | 147:38a0c20c7b3e | 86 | * |
| mega64 | 147:38a0c20c7b3e | 87 | * Set the number of bits per frame, configure clock polarity and phase, shift order and master/slave mode. |
| mega64 | 147:38a0c20c7b3e | 88 | * The default bit order is MSB. |
| mega64 | 147:38a0c20c7b3e | 89 | * @param[in,out] obj The SPI object to configure |
| mega64 | 147:38a0c20c7b3e | 90 | * @param[in] bits The number of bits per frame |
| mega64 | 147:38a0c20c7b3e | 91 | * @param[in] mode The SPI mode (clock polarity, phase, and shift direction) |
| mega64 | 147:38a0c20c7b3e | 92 | * @param[in] slave Zero for master mode or non-zero for slave mode |
| mega64 | 147:38a0c20c7b3e | 93 | */ |
| mega64 | 147:38a0c20c7b3e | 94 | void spi_format(spi_t *obj, int bits, int mode, int slave); |
| mega64 | 147:38a0c20c7b3e | 95 | |
| mega64 | 147:38a0c20c7b3e | 96 | /** Set the SPI baud rate |
| mega64 | 147:38a0c20c7b3e | 97 | * |
| mega64 | 147:38a0c20c7b3e | 98 | * Actual frequency may differ from the desired frequency due to available dividers and bus clock |
| mega64 | 147:38a0c20c7b3e | 99 | * Configures the SPI peripheral's baud rate |
| mega64 | 147:38a0c20c7b3e | 100 | * @param[in,out] obj The SPI object to configure |
| mega64 | 147:38a0c20c7b3e | 101 | * @param[in] hz The baud rate in Hz |
| mega64 | 147:38a0c20c7b3e | 102 | */ |
| mega64 | 147:38a0c20c7b3e | 103 | void spi_frequency(spi_t *obj, int hz); |
| mega64 | 147:38a0c20c7b3e | 104 | |
| mega64 | 147:38a0c20c7b3e | 105 | /**@}*/ |
| mega64 | 147:38a0c20c7b3e | 106 | /** |
| mega64 | 147:38a0c20c7b3e | 107 | * \defgroup SynchSPI Synchronous SPI Hardware Abstraction Layer |
| mega64 | 147:38a0c20c7b3e | 108 | * @{ |
| mega64 | 147:38a0c20c7b3e | 109 | */ |
| mega64 | 147:38a0c20c7b3e | 110 | |
| mega64 | 147:38a0c20c7b3e | 111 | /** Write a byte out in master mode and receive a value |
| mega64 | 147:38a0c20c7b3e | 112 | * |
| mega64 | 147:38a0c20c7b3e | 113 | * @param[in] obj The SPI peripheral to use for sending |
| mega64 | 147:38a0c20c7b3e | 114 | * @param[in] value The value to send |
| mega64 | 147:38a0c20c7b3e | 115 | * @return Returns the value received during send |
| mega64 | 147:38a0c20c7b3e | 116 | */ |
| mega64 | 147:38a0c20c7b3e | 117 | int spi_master_write(spi_t *obj, int value); |
| mega64 | 147:38a0c20c7b3e | 118 | |
| mega64 | 147:38a0c20c7b3e | 119 | /** Check if a value is available to read |
| mega64 | 147:38a0c20c7b3e | 120 | * |
| mega64 | 147:38a0c20c7b3e | 121 | * @param[in] obj The SPI peripheral to check |
| mega64 | 147:38a0c20c7b3e | 122 | * @return non-zero if a value is available |
| mega64 | 147:38a0c20c7b3e | 123 | */ |
| mega64 | 147:38a0c20c7b3e | 124 | int spi_slave_receive(spi_t *obj); |
| mega64 | 147:38a0c20c7b3e | 125 | |
| mega64 | 147:38a0c20c7b3e | 126 | /** Get a received value out of the SPI receive buffer in slave mode |
| mega64 | 147:38a0c20c7b3e | 127 | * |
| mega64 | 147:38a0c20c7b3e | 128 | * Blocks until a value is available |
| mega64 | 147:38a0c20c7b3e | 129 | * @param[in] obj The SPI peripheral to read |
| mega64 | 147:38a0c20c7b3e | 130 | * @return The value received |
| mega64 | 147:38a0c20c7b3e | 131 | */ |
| mega64 | 147:38a0c20c7b3e | 132 | int spi_slave_read(spi_t *obj); |
| mega64 | 147:38a0c20c7b3e | 133 | |
| mega64 | 147:38a0c20c7b3e | 134 | /** Write a value to the SPI peripheral in slave mode |
| mega64 | 147:38a0c20c7b3e | 135 | * |
| mega64 | 147:38a0c20c7b3e | 136 | * Blocks until the SPI peripheral can be written to |
| mega64 | 147:38a0c20c7b3e | 137 | * @param[in] obj The SPI peripheral to write |
| mega64 | 147:38a0c20c7b3e | 138 | * @param[in] value The value to write |
| mega64 | 147:38a0c20c7b3e | 139 | */ |
| mega64 | 147:38a0c20c7b3e | 140 | void spi_slave_write(spi_t *obj, int value); |
| mega64 | 147:38a0c20c7b3e | 141 | |
| mega64 | 147:38a0c20c7b3e | 142 | /** Checks if the specified SPI peripheral is in use |
| mega64 | 147:38a0c20c7b3e | 143 | * |
| mega64 | 147:38a0c20c7b3e | 144 | * @param[in] obj The SPI peripheral to check |
| mega64 | 147:38a0c20c7b3e | 145 | * @return non-zero if the peripheral is currently transmitting |
| mega64 | 147:38a0c20c7b3e | 146 | */ |
| mega64 | 147:38a0c20c7b3e | 147 | int spi_busy(spi_t *obj); |
| mega64 | 147:38a0c20c7b3e | 148 | |
| mega64 | 147:38a0c20c7b3e | 149 | /** Get the module number |
| mega64 | 147:38a0c20c7b3e | 150 | * |
| mega64 | 147:38a0c20c7b3e | 151 | * @param[in] obj The SPI peripheral to check |
| mega64 | 147:38a0c20c7b3e | 152 | * @return The module number |
| mega64 | 147:38a0c20c7b3e | 153 | */ |
| mega64 | 147:38a0c20c7b3e | 154 | uint8_t spi_get_module(spi_t *obj); |
| mega64 | 147:38a0c20c7b3e | 155 | |
| mega64 | 147:38a0c20c7b3e | 156 | /**@}*/ |
| mega64 | 147:38a0c20c7b3e | 157 | |
| mega64 | 147:38a0c20c7b3e | 158 | #if DEVICE_SPI_ASYNCH |
| mega64 | 147:38a0c20c7b3e | 159 | /** |
| mega64 | 147:38a0c20c7b3e | 160 | * \defgroup AsynchSPI Asynchronous SPI Hardware Abstraction Layer |
| mega64 | 147:38a0c20c7b3e | 161 | * @{ |
| mega64 | 147:38a0c20c7b3e | 162 | */ |
| mega64 | 147:38a0c20c7b3e | 163 | |
| mega64 | 147:38a0c20c7b3e | 164 | /** Begin the SPI transfer. Buffer pointers and lengths are specified in tx_buff and rx_buff |
| mega64 | 147:38a0c20c7b3e | 165 | * |
| mega64 | 147:38a0c20c7b3e | 166 | * @param[in] obj The SPI object that holds the transfer information |
| mega64 | 147:38a0c20c7b3e | 167 | * @param[in] tx The transmit buffer |
| mega64 | 147:38a0c20c7b3e | 168 | * @param[in] tx_length The number of bytes to transmit |
| mega64 | 147:38a0c20c7b3e | 169 | * @param[in] rx The receive buffer |
| mega64 | 147:38a0c20c7b3e | 170 | * @param[in] rx_length The number of bytes to receive |
| mega64 | 147:38a0c20c7b3e | 171 | * @param[in] bit_width The bit width of buffer words |
| mega64 | 147:38a0c20c7b3e | 172 | * @param[in] event The logical OR of events to be registered |
| mega64 | 147:38a0c20c7b3e | 173 | * @param[in] handler SPI interrupt handler |
| mega64 | 147:38a0c20c7b3e | 174 | * @param[in] hint A suggestion for how to use DMA with this transfer |
| mega64 | 147:38a0c20c7b3e | 175 | */ |
| mega64 | 147:38a0c20c7b3e | 176 | void spi_master_transfer(spi_t *obj, const void *tx, size_t tx_length, void *rx, size_t rx_length, uint8_t bit_width, uint32_t handler, uint32_t event, DMAUsage hint); |
| mega64 | 147:38a0c20c7b3e | 177 | |
| mega64 | 147:38a0c20c7b3e | 178 | /** The asynchronous IRQ handler |
| mega64 | 147:38a0c20c7b3e | 179 | * |
| mega64 | 147:38a0c20c7b3e | 180 | * Reads the received values out of the RX FIFO, writes values into the TX FIFO and checks for transfer termination |
| mega64 | 147:38a0c20c7b3e | 181 | * conditions, such as buffer overflows or transfer complete. |
| mega64 | 147:38a0c20c7b3e | 182 | * @param[in] obj The SPI object that holds the transfer information |
| mega64 | 147:38a0c20c7b3e | 183 | * @return Event flags if a transfer termination condition was met; otherwise 0. |
| mega64 | 147:38a0c20c7b3e | 184 | */ |
| mega64 | 147:38a0c20c7b3e | 185 | uint32_t spi_irq_handler_asynch(spi_t *obj); |
| mega64 | 147:38a0c20c7b3e | 186 | |
| mega64 | 147:38a0c20c7b3e | 187 | /** Attempts to determine if the SPI peripheral is already in use |
| mega64 | 147:38a0c20c7b3e | 188 | * |
| mega64 | 147:38a0c20c7b3e | 189 | * If a temporary DMA channel has been allocated, peripheral is in use. |
| mega64 | 147:38a0c20c7b3e | 190 | * If a permanent DMA channel has been allocated, check if the DMA channel is in use. If not, proceed as though no DMA |
| mega64 | 147:38a0c20c7b3e | 191 | * channel were allocated. |
| mega64 | 147:38a0c20c7b3e | 192 | * If no DMA channel is allocated, check whether tx and rx buffers have been assigned. For each assigned buffer, check |
| mega64 | 147:38a0c20c7b3e | 193 | * if the corresponding buffer position is less than the buffer length. If buffers do not indicate activity, check if |
| mega64 | 147:38a0c20c7b3e | 194 | * there are any bytes in the FIFOs. |
| mega64 | 147:38a0c20c7b3e | 195 | * @param[in] obj The SPI object to check for activity |
| mega64 | 147:38a0c20c7b3e | 196 | * @return Non-zero if the SPI port is active or zero if it is not. |
| mega64 | 147:38a0c20c7b3e | 197 | */ |
| mega64 | 147:38a0c20c7b3e | 198 | uint8_t spi_active(spi_t *obj); |
| mega64 | 147:38a0c20c7b3e | 199 | |
| mega64 | 147:38a0c20c7b3e | 200 | /** Abort an SPI transfer |
| mega64 | 147:38a0c20c7b3e | 201 | * |
| mega64 | 147:38a0c20c7b3e | 202 | * @param obj The SPI peripheral to stop |
| mega64 | 147:38a0c20c7b3e | 203 | */ |
| mega64 | 147:38a0c20c7b3e | 204 | void spi_abort_asynch(spi_t *obj); |
| mega64 | 147:38a0c20c7b3e | 205 | |
| mega64 | 147:38a0c20c7b3e | 206 | |
| mega64 | 147:38a0c20c7b3e | 207 | #endif |
| mega64 | 147:38a0c20c7b3e | 208 | |
| mega64 | 147:38a0c20c7b3e | 209 | /**@}*/ |
| mega64 | 147:38a0c20c7b3e | 210 | |
| mega64 | 147:38a0c20c7b3e | 211 | #ifdef __cplusplus |
| mega64 | 147:38a0c20c7b3e | 212 | } |
| mega64 | 147:38a0c20c7b3e | 213 | #endif // __cplusplus |
| mega64 | 147:38a0c20c7b3e | 214 | |
| mega64 | 147:38a0c20c7b3e | 215 | #endif // SPI_DEVICE |
| mega64 | 147:38a0c20c7b3e | 216 | |
| mega64 | 147:38a0c20c7b3e | 217 | #endif // MBED_SPI_API_H |
| mega64 | 147:38a0c20c7b3e | 218 | |
| mega64 | 147:38a0c20c7b3e | 219 | /** @}*/ |