Manuel Caballero / PCF8591

8-bit A/D and D/A converter

PCF8591.cpp@4:bdcb2b5c8cee, 2017-09-25 (annotated)

Committer:
mcm
Date:
Mon Sep 25 10:57:07 2017 +0000
Revision:
4:bdcb2b5c8cee
Parent:
3:8d2e4b9015a8 
DAC functionality was fixed to work properly.

Who changed what in which revision?

UserRevisionLine numberNew contents of line
mcm 3:8d2e4b9015a8 1 /**
mcm 3:8d2e4b9015a8 2 * @brief PCF8591.c
mcm 3:8d2e4b9015a8 3 * @details 8-bit A/D and D/A converter.
mcm 3:8d2e4b9015a8 4 * Functions file.
mcm 3:8d2e4b9015a8 5 *
mcm 3:8d2e4b9015a8 6 *
mcm 3:8d2e4b9015a8 7 * @return NA
mcm 3:8d2e4b9015a8 8 *
mcm 3:8d2e4b9015a8 9 * @author Manuel Caballero
mcm 3:8d2e4b9015a8 10 * @date 24/September/2017
mcm 3:8d2e4b9015a8 11 * @version 24/September/2017 The ORIGIN
mcm 3:8d2e4b9015a8 12 * @pre NaN.
mcm 3:8d2e4b9015a8 13 * @warning NaN
mcm 3:8d2e4b9015a8 14 * @pre This code belongs to AqueronteBlog ( http://unbarquero.blogspot.com ).
mcm 3:8d2e4b9015a8 15 */
mcm 3:8d2e4b9015a8 16
mcm 3:8d2e4b9015a8 17 #include "PCF8591.h"
mcm 3:8d2e4b9015a8 18
mcm 3:8d2e4b9015a8 19
mcm 3:8d2e4b9015a8 20 PCF8591::PCF8591 ( PinName sda, PinName scl, uint32_t addr, uint32_t freq )
mcm 3:8d2e4b9015a8 21 : i2c ( sda, scl )
mcm 3:8d2e4b9015a8 22 , PCF8591_Addr ( addr )
mcm 3:8d2e4b9015a8 23 {
mcm 3:8d2e4b9015a8 24 i2c.frequency( freq );
mcm 3:8d2e4b9015a8 25 }
mcm 3:8d2e4b9015a8 26
mcm 3:8d2e4b9015a8 27
mcm 3:8d2e4b9015a8 28 PCF8591::~PCF8591()
mcm 3:8d2e4b9015a8 29 {
mcm 3:8d2e4b9015a8 30 }
mcm 3:8d2e4b9015a8 31
mcm 3:8d2e4b9015a8 32
mcm 3:8d2e4b9015a8 33
mcm 3:8d2e4b9015a8 34 /**
mcm 3:8d2e4b9015a8 35 * @brief PCF8591_SetADC ( PCF8591_analog_input_programming_t , PCF8591_auto_increment_status_t , PCF8591_channel_number_t )
mcm 3:8d2e4b9015a8 36 *
mcm 3:8d2e4b9015a8 37 * @details It configures the ADC.
mcm 3:8d2e4b9015a8 38 *
mcm 3:8d2e4b9015a8 39 * @param[in] myAnalogInputs: The analog input programming.
mcm 3:8d2e4b9015a8 40 * @param[in] myAutoIncrement: Auto-increment flag enabled/disabled.
mcm 3:8d2e4b9015a8 41 * @param[in] myADCchannel: ADC Channel number.
mcm 3:8d2e4b9015a8 42 *
mcm 3:8d2e4b9015a8 43 * @param[out] NaN.
mcm 3:8d2e4b9015a8 44 *
mcm 3:8d2e4b9015a8 45 *
mcm 3:8d2e4b9015a8 46 * @return Status of PCF8591_SetADC.
mcm 3:8d2e4b9015a8 47 *
mcm 3:8d2e4b9015a8 48 *
mcm 3:8d2e4b9015a8 49 * @author Manuel Caballero
mcm 3:8d2e4b9015a8 50 * @date 24/September/2017
mcm 3:8d2e4b9015a8 51 * @version 24/September/2017 The ORIGIN
mcm 3:8d2e4b9015a8 52 * @pre NaN
mcm 3:8d2e4b9015a8 53 * @warning NaN.
mcm 3:8d2e4b9015a8 54 */
mcm 3:8d2e4b9015a8 55 PCF8591::PCF8591_status_t PCF8591::PCF8591_SetADC ( PCF8591_analog_input_programming_t myAnalogInputs, PCF8591_auto_increment_status_t myAutoIncrement, PCF8591_channel_number_t myADCchannel )
mcm 3:8d2e4b9015a8 56 {
mcm 3:8d2e4b9015a8 57 char cmd = 0;
mcm 3:8d2e4b9015a8 58 uint32_t aux = 0;
mcm 3:8d2e4b9015a8 59
mcm 3:8d2e4b9015a8 60
mcm 3:8d2e4b9015a8 61 // ANALOG INPUT PROGRAMMING
mcm 3:8d2e4b9015a8 62 switch ( myAnalogInputs )
mcm 3:8d2e4b9015a8 63 {
mcm 3:8d2e4b9015a8 64 default:
mcm 3:8d2e4b9015a8 65 case PCF8591_FOUR_SINGLE_ENDED_INPUTS:
mcm 3:8d2e4b9015a8 66 // cmd &= 0xCF;
mcm 3:8d2e4b9015a8 67 break;
mcm 3:8d2e4b9015a8 68
mcm 3:8d2e4b9015a8 69 case PCF8591_THREE_DIFFERENTIAL_INPUTS:
mcm 3:8d2e4b9015a8 70 cmd |= 0x10;
mcm 3:8d2e4b9015a8 71 break;
mcm 3:8d2e4b9015a8 72
mcm 3:8d2e4b9015a8 73 case PCF8591_SINGLE_ENDED_AND_DIFFERENTIAL_MIXED:
mcm 3:8d2e4b9015a8 74 cmd |= 0x20;
mcm 3:8d2e4b9015a8 75 break;
mcm 3:8d2e4b9015a8 76
mcm 3:8d2e4b9015a8 77 case PCF8591_TWO_DIFFERENTIAL_INPUTS:
mcm 3:8d2e4b9015a8 78 cmd |= 0x30;
mcm 3:8d2e4b9015a8 79 break;
mcm 3:8d2e4b9015a8 80 }
mcm 3:8d2e4b9015a8 81
mcm 3:8d2e4b9015a8 82 _ANALOG_INPUT_PROGRAMMING = myAnalogInputs;
mcm 3:8d2e4b9015a8 83
mcm 3:8d2e4b9015a8 84
mcm 3:8d2e4b9015a8 85 // AUTO-INCREMENT FLAG
mcm 3:8d2e4b9015a8 86 if ( myAutoIncrement == PCF8591_AUTO_INCREMENT_ENABLED )
mcm 3:8d2e4b9015a8 87 cmd |= 0x04;
mcm 3:8d2e4b9015a8 88
mcm 3:8d2e4b9015a8 89
mcm 3:8d2e4b9015a8 90 _AUTO_INCREMENT_STATUS = myAutoIncrement;
mcm 3:8d2e4b9015a8 91
mcm 3:8d2e4b9015a8 92
mcm 3:8d2e4b9015a8 93
mcm 3:8d2e4b9015a8 94 // A/D CHANNEL NUMBER
mcm 3:8d2e4b9015a8 95 switch ( myADCchannel )
mcm 3:8d2e4b9015a8 96 {
mcm 3:8d2e4b9015a8 97 default:
mcm 3:8d2e4b9015a8 98 case PCF8591_CHANNEL_0:
mcm 3:8d2e4b9015a8 99 // cmd &= 0xFC;
mcm 3:8d2e4b9015a8 100 break;
mcm 3:8d2e4b9015a8 101
mcm 3:8d2e4b9015a8 102 case PCF8591_CHANNEL_1:
mcm 3:8d2e4b9015a8 103 cmd |= 0x01;
mcm 3:8d2e4b9015a8 104 break;
mcm 3:8d2e4b9015a8 105
mcm 3:8d2e4b9015a8 106 case PCF8591_CHANNEL_2:
mcm 3:8d2e4b9015a8 107 cmd |= 0x02;
mcm 3:8d2e4b9015a8 108 break;
mcm 3:8d2e4b9015a8 109
mcm 3:8d2e4b9015a8 110 case PCF8591_CHANNEL_3:
mcm 3:8d2e4b9015a8 111 cmd |= 0x03;
mcm 3:8d2e4b9015a8 112 break;
mcm 3:8d2e4b9015a8 113 }
mcm 3:8d2e4b9015a8 114
mcm 3:8d2e4b9015a8 115
mcm 3:8d2e4b9015a8 116 _CHANNEL_NUMBER = myADCchannel;
mcm 3:8d2e4b9015a8 117
mcm 3:8d2e4b9015a8 118
mcm 3:8d2e4b9015a8 119
mcm 3:8d2e4b9015a8 120 // Mask DAC
mcm 3:8d2e4b9015a8 121 if ( _DAC_STATUS == PCF8591_DAC_ENABLED )
mcm 3:8d2e4b9015a8 122 cmd |= 0x40;
mcm 3:8d2e4b9015a8 123
mcm 3:8d2e4b9015a8 124
mcm 3:8d2e4b9015a8 125
mcm 3:8d2e4b9015a8 126
mcm 3:8d2e4b9015a8 127 // Update Control Byte
mcm 3:8d2e4b9015a8 128 aux = i2c.write ( PCF8591_Addr, &cmd, 1 );
mcm 3:8d2e4b9015a8 129
mcm 3:8d2e4b9015a8 130
mcm 3:8d2e4b9015a8 131
mcm 3:8d2e4b9015a8 132 if ( aux == I2C_SUCCESS )
mcm 3:8d2e4b9015a8 133 return PCF8591_SUCCESS;
mcm 3:8d2e4b9015a8 134 else
mcm 3:8d2e4b9015a8 135 return PCF8591_FAILURE;
mcm 3:8d2e4b9015a8 136 }
mcm 3:8d2e4b9015a8 137
mcm 3:8d2e4b9015a8 138
mcm 3:8d2e4b9015a8 139
mcm 3:8d2e4b9015a8 140 /**
mcm 3:8d2e4b9015a8 141 * @brief PCF8591_ReadADC ( PCF8591_vector_data_t* )
mcm 3:8d2e4b9015a8 142 *
mcm 3:8d2e4b9015a8 143 * @details It gets the ADC result from the device.
mcm 3:8d2e4b9015a8 144 *
mcm 3:8d2e4b9015a8 145 * @param[in] myinstance: Peripheral's Instance.
mcm 3:8d2e4b9015a8 146 * @param[in] myPCF8591Addr: I2C Device address.
mcm 3:8d2e4b9015a8 147 *
mcm 3:8d2e4b9015a8 148 * @param[out] myADC_Data: ADC result into the chosen channel.
mcm 3:8d2e4b9015a8 149 *
mcm 3:8d2e4b9015a8 150 *
mcm 3:8d2e4b9015a8 151 * @return Status of PCF8591_ReadADC.
mcm 3:8d2e4b9015a8 152 *
mcm 3:8d2e4b9015a8 153 *
mcm 3:8d2e4b9015a8 154 * @author Manuel Caballero
mcm 3:8d2e4b9015a8 155 * @date 24/September/2017
mcm 3:8d2e4b9015a8 156 * @version 24/September/2017 The ORIGIN
mcm 3:8d2e4b9015a8 157 * @pre First byte is descarted.
mcm 3:8d2e4b9015a8 158 * @warning NaN.
mcm 3:8d2e4b9015a8 159 */
mcm 3:8d2e4b9015a8 160 PCF8591::PCF8591_status_t PCF8591::PCF8591_ReadADC ( PCF8591_vector_data_t* myADC_Data )
mcm 3:8d2e4b9015a8 161 {
mcm 3:8d2e4b9015a8 162 char cmd[] = { 0, 0, 0, 0, 0 };
mcm 3:8d2e4b9015a8 163 uint32_t aux = 0;
mcm 3:8d2e4b9015a8 164 uint32_t myNumberReadings = 0;
mcm 3:8d2e4b9015a8 165
mcm 3:8d2e4b9015a8 166
mcm 3:8d2e4b9015a8 167
mcm 3:8d2e4b9015a8 168 // Check if Auto-increment flag is enabled
mcm 3:8d2e4b9015a8 169 if ( _AUTO_INCREMENT_STATUS == PCF8591_AUTO_INCREMENT_ENABLED )
mcm 3:8d2e4b9015a8 170 myNumberReadings = 5;
mcm 3:8d2e4b9015a8 171 else
mcm 3:8d2e4b9015a8 172 myNumberReadings = 2;
mcm 3:8d2e4b9015a8 173
mcm 3:8d2e4b9015a8 174
mcm 3:8d2e4b9015a8 175 // Read the data
mcm 3:8d2e4b9015a8 176 aux = i2c.read ( PCF8591_Addr, &cmd[0], myNumberReadings );
mcm 3:8d2e4b9015a8 177
mcm 3:8d2e4b9015a8 178
mcm 3:8d2e4b9015a8 179
mcm 3:8d2e4b9015a8 180 // Store the data in the right position
mcm 3:8d2e4b9015a8 181 switch ( _CHANNEL_NUMBER )
mcm 3:8d2e4b9015a8 182 {
mcm 3:8d2e4b9015a8 183 default:
mcm 3:8d2e4b9015a8 184 case PCF8591_CHANNEL_0:
mcm 3:8d2e4b9015a8 185 myADC_Data->ADC_Channel_0 = cmd[ 1 ];
mcm 3:8d2e4b9015a8 186
mcm 3:8d2e4b9015a8 187 if ( _AUTO_INCREMENT_STATUS == PCF8591_AUTO_INCREMENT_ENABLED )
mcm 3:8d2e4b9015a8 188 {
mcm 3:8d2e4b9015a8 189 myADC_Data->ADC_Channel_1 = cmd[ 2 ];
mcm 3:8d2e4b9015a8 190 myADC_Data->ADC_Channel_2 = cmd[ 3 ];
mcm 3:8d2e4b9015a8 191 myADC_Data->ADC_Channel_3 = cmd[ 4 ];
mcm 3:8d2e4b9015a8 192 }
mcm 3:8d2e4b9015a8 193 break;
mcm 3:8d2e4b9015a8 194
mcm 3:8d2e4b9015a8 195 case PCF8591_CHANNEL_1:
mcm 3:8d2e4b9015a8 196 myADC_Data->ADC_Channel_1 = cmd[ 1 ];
mcm 3:8d2e4b9015a8 197
mcm 3:8d2e4b9015a8 198 if ( _AUTO_INCREMENT_STATUS == PCF8591_AUTO_INCREMENT_ENABLED )
mcm 3:8d2e4b9015a8 199 {
mcm 3:8d2e4b9015a8 200 myADC_Data->ADC_Channel_2 = cmd[ 2 ];
mcm 3:8d2e4b9015a8 201 myADC_Data->ADC_Channel_3 = cmd[ 3 ];
mcm 3:8d2e4b9015a8 202 myADC_Data->ADC_Channel_0 = cmd[ 4 ];
mcm 3:8d2e4b9015a8 203 }
mcm 3:8d2e4b9015a8 204 break;
mcm 3:8d2e4b9015a8 205
mcm 3:8d2e4b9015a8 206 case PCF8591_CHANNEL_2:
mcm 3:8d2e4b9015a8 207 myADC_Data->ADC_Channel_2 = cmd[ 1 ];
mcm 3:8d2e4b9015a8 208
mcm 3:8d2e4b9015a8 209 if ( _AUTO_INCREMENT_STATUS == PCF8591_AUTO_INCREMENT_ENABLED )
mcm 3:8d2e4b9015a8 210 {
mcm 3:8d2e4b9015a8 211 myADC_Data->ADC_Channel_3 = cmd[ 2 ];
mcm 3:8d2e4b9015a8 212 myADC_Data->ADC_Channel_0 = cmd[ 3 ];
mcm 3:8d2e4b9015a8 213 myADC_Data->ADC_Channel_1 = cmd[ 4 ];
mcm 3:8d2e4b9015a8 214 }
mcm 3:8d2e4b9015a8 215 break;
mcm 3:8d2e4b9015a8 216
mcm 3:8d2e4b9015a8 217 case PCF8591_CHANNEL_3:
mcm 3:8d2e4b9015a8 218 myADC_Data->ADC_Channel_3 = cmd[ 1 ];
mcm 3:8d2e4b9015a8 219
mcm 3:8d2e4b9015a8 220 if ( _AUTO_INCREMENT_STATUS == PCF8591_AUTO_INCREMENT_ENABLED )
mcm 3:8d2e4b9015a8 221 {
mcm 3:8d2e4b9015a8 222 myADC_Data->ADC_Channel_0 = cmd[ 2 ];
mcm 3:8d2e4b9015a8 223 myADC_Data->ADC_Channel_1 = cmd[ 3 ];
mcm 3:8d2e4b9015a8 224 myADC_Data->ADC_Channel_2 = cmd[ 4 ];
mcm 3:8d2e4b9015a8 225 }
mcm 3:8d2e4b9015a8 226 break;
mcm 3:8d2e4b9015a8 227 }
mcm 3:8d2e4b9015a8 228
mcm 3:8d2e4b9015a8 229
mcm 3:8d2e4b9015a8 230
mcm 3:8d2e4b9015a8 231
mcm 3:8d2e4b9015a8 232 if ( aux == I2C_SUCCESS )
mcm 3:8d2e4b9015a8 233 return PCF8591_SUCCESS;
mcm 3:8d2e4b9015a8 234 else
mcm 3:8d2e4b9015a8 235 return PCF8591_FAILURE;
mcm 3:8d2e4b9015a8 236 }
mcm 3:8d2e4b9015a8 237
mcm 3:8d2e4b9015a8 238
mcm 3:8d2e4b9015a8 239
mcm 3:8d2e4b9015a8 240 /**
mcm 3:8d2e4b9015a8 241 * @brief PCF8591_SetDAC ( PCF8591_dac_status_t )
mcm 3:8d2e4b9015a8 242 *
mcm 3:8d2e4b9015a8 243 * @details It enables/disables the DAC.
mcm 3:8d2e4b9015a8 244 *
mcm 3:8d2e4b9015a8 245 * @param[in] myDAC_Status: Enable/Disable DAC.
mcm 3:8d2e4b9015a8 246 *
mcm 3:8d2e4b9015a8 247 * @param[out] NaN.
mcm 3:8d2e4b9015a8 248 *
mcm 3:8d2e4b9015a8 249 *
mcm 3:8d2e4b9015a8 250 * @return Status of PCF8591_SetDAC.
mcm 3:8d2e4b9015a8 251 *
mcm 3:8d2e4b9015a8 252 *
mcm 3:8d2e4b9015a8 253 * @author Manuel Caballero
mcm 3:8d2e4b9015a8 254 * @date 24/September/2017
mcm 3:8d2e4b9015a8 255 * @version 24/September/2017 The ORIGIN
mcm 3:8d2e4b9015a8 256 * @pre NaN
mcm 3:8d2e4b9015a8 257 * @warning NaN.
mcm 3:8d2e4b9015a8 258 */
mcm 3:8d2e4b9015a8 259 PCF8591::PCF8591_status_t PCF8591::PCF8591_SetDAC ( PCF8591_dac_status_t myDAC_Status )
mcm 3:8d2e4b9015a8 260 {
mcm 3:8d2e4b9015a8 261 char cmd = 0;
mcm 3:8d2e4b9015a8 262 uint32_t aux = 0;
mcm 3:8d2e4b9015a8 263
mcm 3:8d2e4b9015a8 264
mcm 3:8d2e4b9015a8 265 // Mask ANALOG INPUT PROGRAMMING
mcm 3:8d2e4b9015a8 266 switch ( _ANALOG_INPUT_PROGRAMMING )
mcm 3:8d2e4b9015a8 267 {
mcm 3:8d2e4b9015a8 268 default:
mcm 3:8d2e4b9015a8 269 case PCF8591_FOUR_SINGLE_ENDED_INPUTS:
mcm 3:8d2e4b9015a8 270 // cmd &= 0xCF;
mcm 3:8d2e4b9015a8 271 break;
mcm 3:8d2e4b9015a8 272
mcm 3:8d2e4b9015a8 273 case PCF8591_THREE_DIFFERENTIAL_INPUTS:
mcm 3:8d2e4b9015a8 274 cmd |= 0x10;
mcm 3:8d2e4b9015a8 275 break;
mcm 3:8d2e4b9015a8 276
mcm 3:8d2e4b9015a8 277 case PCF8591_SINGLE_ENDED_AND_DIFFERENTIAL_MIXED:
mcm 3:8d2e4b9015a8 278 cmd |= 0x20;
mcm 3:8d2e4b9015a8 279 break;
mcm 3:8d2e4b9015a8 280
mcm 3:8d2e4b9015a8 281 case PCF8591_TWO_DIFFERENTIAL_INPUTS:
mcm 3:8d2e4b9015a8 282 cmd |= 0x30;
mcm 3:8d2e4b9015a8 283 break;
mcm 3:8d2e4b9015a8 284 }
mcm 3:8d2e4b9015a8 285
mcm 3:8d2e4b9015a8 286
mcm 3:8d2e4b9015a8 287 // Mask AUTO-INCREMENT FLAG
mcm 3:8d2e4b9015a8 288 if ( _AUTO_INCREMENT_STATUS == PCF8591_AUTO_INCREMENT_ENABLED )
mcm 3:8d2e4b9015a8 289 cmd |= 0x04;
mcm 3:8d2e4b9015a8 290
mcm 3:8d2e4b9015a8 291
mcm 3:8d2e4b9015a8 292
mcm 3:8d2e4b9015a8 293 // Mask A/D CHANNEL NUMBER
mcm 3:8d2e4b9015a8 294 switch ( _CHANNEL_NUMBER )
mcm 3:8d2e4b9015a8 295 {
mcm 3:8d2e4b9015a8 296 default:
mcm 3:8d2e4b9015a8 297 case PCF8591_CHANNEL_0:
mcm 3:8d2e4b9015a8 298 // cmd &= 0xFC;
mcm 3:8d2e4b9015a8 299 break;
mcm 3:8d2e4b9015a8 300
mcm 3:8d2e4b9015a8 301 case PCF8591_CHANNEL_1:
mcm 3:8d2e4b9015a8 302 cmd |= 0x01;
mcm 3:8d2e4b9015a8 303 break;
mcm 3:8d2e4b9015a8 304
mcm 3:8d2e4b9015a8 305 case PCF8591_CHANNEL_2:
mcm 3:8d2e4b9015a8 306 cmd |= 0x02;
mcm 3:8d2e4b9015a8 307 break;
mcm 3:8d2e4b9015a8 308
mcm 3:8d2e4b9015a8 309 case PCF8591_CHANNEL_3:
mcm 3:8d2e4b9015a8 310 cmd |= 0x03;
mcm 3:8d2e4b9015a8 311 break;
mcm 3:8d2e4b9015a8 312 }
mcm 3:8d2e4b9015a8 313
mcm 3:8d2e4b9015a8 314
mcm 3:8d2e4b9015a8 315
mcm 3:8d2e4b9015a8 316 // DAC
mcm 3:8d2e4b9015a8 317 if ( myDAC_Status == PCF8591_DAC_ENABLED )
mcm 3:8d2e4b9015a8 318 cmd |= 0x40;
mcm 3:8d2e4b9015a8 319
mcm 3:8d2e4b9015a8 320
mcm 3:8d2e4b9015a8 321 _DAC_STATUS = myDAC_Status;
mcm 3:8d2e4b9015a8 322
mcm 3:8d2e4b9015a8 323
mcm 3:8d2e4b9015a8 324
mcm 3:8d2e4b9015a8 325 // Update Control Byte
mcm 3:8d2e4b9015a8 326 aux = i2c.write ( PCF8591_Addr, &cmd, 1 );
mcm 3:8d2e4b9015a8 327
mcm 3:8d2e4b9015a8 328
mcm 3:8d2e4b9015a8 329
mcm 3:8d2e4b9015a8 330 if ( aux == I2C_SUCCESS )
mcm 3:8d2e4b9015a8 331 return PCF8591_SUCCESS;
mcm 3:8d2e4b9015a8 332 else
mcm 3:8d2e4b9015a8 333 return PCF8591_FAILURE;
mcm 3:8d2e4b9015a8 334 }
mcm 3:8d2e4b9015a8 335
mcm 3:8d2e4b9015a8 336
mcm 3:8d2e4b9015a8 337
mcm 3:8d2e4b9015a8 338 /**
mcm 3:8d2e4b9015a8 339 * @brief PCF8591_NewDACValue ( uint8_t )
mcm 3:8d2e4b9015a8 340 *
mcm 3:8d2e4b9015a8 341 * @details It enables/disables the DAC.
mcm 3:8d2e4b9015a8 342 *
mcm 3:8d2e4b9015a8 343 * @param[in] myNewDACValue: New DAC value.
mcm 3:8d2e4b9015a8 344 *
mcm 3:8d2e4b9015a8 345 * @param[out] NaN.
mcm 3:8d2e4b9015a8 346 *
mcm 3:8d2e4b9015a8 347 *
mcm 3:8d2e4b9015a8 348 * @return Status of PCF8591_NewDACValue.
mcm 3:8d2e4b9015a8 349 *
mcm 3:8d2e4b9015a8 350 *
mcm 3:8d2e4b9015a8 351 * @author Manuel Caballero
mcm 3:8d2e4b9015a8 352 * @date 24/September/2017
mcm 3:8d2e4b9015a8 353 * @version 24/September/2017 The ORIGIN
mcm 3:8d2e4b9015a8 354 * @pre NaN
mcm 3:8d2e4b9015a8 355 * @warning NaN.
mcm 3:8d2e4b9015a8 356 */
mcm 3:8d2e4b9015a8 357 PCF8591::PCF8591_status_t PCF8591::PCF8591_NewDACValue ( uint8_t myNewDACValue )
mcm 3:8d2e4b9015a8 358 {
mcm 3:8d2e4b9015a8 359 char cmd[] = { 0, 0 };
mcm 3:8d2e4b9015a8 360 uint32_t aux = 0;
mcm 3:8d2e4b9015a8 361
mcm 3:8d2e4b9015a8 362
mcm 3:8d2e4b9015a8 363 // Mask ANALOG INPUT PROGRAMMING
mcm 3:8d2e4b9015a8 364 switch ( _ANALOG_INPUT_PROGRAMMING )
mcm 3:8d2e4b9015a8 365 {
mcm 3:8d2e4b9015a8 366 default:
mcm 3:8d2e4b9015a8 367 case PCF8591_FOUR_SINGLE_ENDED_INPUTS:
mcm 3:8d2e4b9015a8 368 // cmd[ 0 ] &= 0xCF;
mcm 3:8d2e4b9015a8 369 break;
mcm 3:8d2e4b9015a8 370
mcm 3:8d2e4b9015a8 371 case PCF8591_THREE_DIFFERENTIAL_INPUTS:
mcm 3:8d2e4b9015a8 372 cmd[ 0 ] |= 0x10;
mcm 3:8d2e4b9015a8 373 break;
mcm 3:8d2e4b9015a8 374
mcm 3:8d2e4b9015a8 375 case PCF8591_SINGLE_ENDED_AND_DIFFERENTIAL_MIXED:
mcm 3:8d2e4b9015a8 376 cmd[ 0 ] |= 0x20;
mcm 3:8d2e4b9015a8 377 break;
mcm 3:8d2e4b9015a8 378
mcm 3:8d2e4b9015a8 379 case PCF8591_TWO_DIFFERENTIAL_INPUTS:
mcm 3:8d2e4b9015a8 380 cmd[ 0 ] |= 0x30;
mcm 3:8d2e4b9015a8 381 break;
mcm 3:8d2e4b9015a8 382 }
mcm 3:8d2e4b9015a8 383
mcm 3:8d2e4b9015a8 384
mcm 3:8d2e4b9015a8 385 // Mask AUTO-INCREMENT FLAG
mcm 3:8d2e4b9015a8 386 if ( _AUTO_INCREMENT_STATUS == PCF8591_AUTO_INCREMENT_ENABLED )
mcm 3:8d2e4b9015a8 387 cmd[ 0 ] |= 0x04;
mcm 3:8d2e4b9015a8 388
mcm 3:8d2e4b9015a8 389
mcm 3:8d2e4b9015a8 390
mcm 3:8d2e4b9015a8 391 // Mask A/D CHANNEL NUMBER
mcm 3:8d2e4b9015a8 392 switch ( _CHANNEL_NUMBER )
mcm 3:8d2e4b9015a8 393 {
mcm 3:8d2e4b9015a8 394 default:
mcm 3:8d2e4b9015a8 395 case PCF8591_CHANNEL_0:
mcm 3:8d2e4b9015a8 396 // cmd[ 0 ] &= 0xFC;
mcm 3:8d2e4b9015a8 397 break;
mcm 3:8d2e4b9015a8 398
mcm 3:8d2e4b9015a8 399 case PCF8591_CHANNEL_1:
mcm 3:8d2e4b9015a8 400 cmd[ 0 ] |= 0x01;
mcm 3:8d2e4b9015a8 401 break;
mcm 3:8d2e4b9015a8 402
mcm 3:8d2e4b9015a8 403 case PCF8591_CHANNEL_2:
mcm 3:8d2e4b9015a8 404 cmd[ 0 ] |= 0x02;
mcm 3:8d2e4b9015a8 405 break;
mcm 3:8d2e4b9015a8 406
mcm 3:8d2e4b9015a8 407 case PCF8591_CHANNEL_3:
mcm 3:8d2e4b9015a8 408 cmd[ 0 ] |= 0x03;
mcm 3:8d2e4b9015a8 409 break;
mcm 3:8d2e4b9015a8 410 }
mcm 3:8d2e4b9015a8 411
mcm 3:8d2e4b9015a8 412
mcm 3:8d2e4b9015a8 413
mcm 3:8d2e4b9015a8 414 // Mask DAC
mcm 3:8d2e4b9015a8 415 if ( _DAC_STATUS == PCF8591_DAC_ENABLED )
mcm 3:8d2e4b9015a8 416 cmd[ 0 ] |= 0x40;
mcm 3:8d2e4b9015a8 417
mcm 3:8d2e4b9015a8 418
mcm 3:8d2e4b9015a8 419
mcm 3:8d2e4b9015a8 420
mcm 4:bdcb2b5c8cee 421 // Update Control Byte and the DAC output
mcm 4:bdcb2b5c8cee 422 cmd[ 1 ] = myNewDACValue;
mcm 4:bdcb2b5c8cee 423 aux = i2c.write ( PCF8591_Addr, &cmd[0], 2 );
mcm 3:8d2e4b9015a8 424
mcm 3:8d2e4b9015a8 425
mcm 3:8d2e4b9015a8 426
mcm 3:8d2e4b9015a8 427
mcm 3:8d2e4b9015a8 428 if ( aux == I2C_SUCCESS )
mcm 3:8d2e4b9015a8 429 return PCF8591_SUCCESS;
mcm 3:8d2e4b9015a8 430 else
mcm 3:8d2e4b9015a8 431 return PCF8591_FAILURE;
mcm 3:8d2e4b9015a8 432 }