3-Axis Digital Compass IC

Committer:
mcm
Date:
Fri Oct 13 15:44:23 2017 +0000
Revision:
4:f95da142fd3a
Parent:
3:8cec250013ff
Minor changes, some comments were improved

Who changed what in which revision?

UserRevisionLine numberNew contents of line
mcm 1:689c451de04b 1 /**
mcm 1:689c451de04b 2 * @brief HMC5883L.h
mcm 1:689c451de04b 3 * @details 3-Axis Digital Compass IC.
mcm 1:689c451de04b 4 * Header file.
mcm 1:689c451de04b 5 *
mcm 1:689c451de04b 6 *
mcm 1:689c451de04b 7 * @return NA
mcm 1:689c451de04b 8 *
mcm 1:689c451de04b 9 * @author Manuel Caballero
mcm 2:e02c2a91d2ea 10 * @date 13/October/2017
mcm 2:e02c2a91d2ea 11 * @version 13/October/2017 The ORIGIN
mcm 1:689c451de04b 12 * @pre NaN.
mcm 1:689c451de04b 13 * @warning NaN
mcm 1:689c451de04b 14 * @pre This code belongs to AqueronteBlog ( http://unbarquero.blogspot.com ).
mcm 1:689c451de04b 15 */
mcm 1:689c451de04b 16 #ifndef HMC5883L_H
mcm 1:689c451de04b 17 #define HMC5883L_H
mcm 1:689c451de04b 18
mcm 1:689c451de04b 19 #include "mbed.h"
mcm 1:689c451de04b 20
mcm 1:689c451de04b 21
mcm 1:689c451de04b 22 /**
mcm 1:689c451de04b 23 Example:
mcm 1:689c451de04b 24
mcm 3:8cec250013ff 25 #include "mbed.h"
mcm 3:8cec250013ff 26 #include "HMC5883L.h"
mcm 3:8cec250013ff 27
mcm 3:8cec250013ff 28 #define X_Offset 0
mcm 3:8cec250013ff 29 #define Y_Offset 0
mcm 3:8cec250013ff 30 #define Z_Offset 0
mcm 3:8cec250013ff 31
mcm 3:8cec250013ff 32
mcm 3:8cec250013ff 33 HMC5883L myMagnetometer ( I2C_SDA, I2C_SCL, HMC5883L::HMC5883L_ADDRESS, 400000 );
mcm 3:8cec250013ff 34 Serial pc ( USBTX, USBRX );
mcm 3:8cec250013ff 35
mcm 3:8cec250013ff 36 Ticker newReading;
mcm 3:8cec250013ff 37 DigitalOut myled1 ( LED1 );
mcm 3:8cec250013ff 38
mcm 3:8cec250013ff 39
mcm 3:8cec250013ff 40
mcm 3:8cec250013ff 41 HMC5883L::HMC5883L_vector_data_t myData;
mcm 3:8cec250013ff 42
mcm 3:8cec250013ff 43
mcm 3:8cec250013ff 44 void readDATA ( void )
mcm 3:8cec250013ff 45 {
mcm 3:8cec250013ff 46 HMC5883L::HMC5883L_status_t aux;
mcm 3:8cec250013ff 47
mcm 3:8cec250013ff 48 myled1 = 1;
mcm 3:8cec250013ff 49
mcm 3:8cec250013ff 50 // Wait until a new data arrives
mcm 3:8cec250013ff 51 // NOTE: Add a counter, if something goes wrong, the uC may get stuck here!
mcm 3:8cec250013ff 52 do {
mcm 3:8cec250013ff 53 aux = myMagnetometer.HMC5883L_GetStatus ( &myData );
mcm 3:8cec250013ff 54 } while ( ( myData.Status & HMC5883L::STATUS_REG_RDY_MASK ) != HMC5883L::STATUS_REG_RDY_ENABLED );
mcm 3:8cec250013ff 55
mcm 3:8cec250013ff 56
mcm 3:8cec250013ff 57 // Get the new measurement
mcm 3:8cec250013ff 58 aux = myMagnetometer.HMC5883L_GetCompensatedDataOutput ( &myData, X_Offset, Y_Offset, Z_Offset );
mcm 3:8cec250013ff 59 aux = myMagnetometer.HMC5883L_SetMode ( HMC5883L::MODE_REG_MODE_SINGLE );
mcm 3:8cec250013ff 60
mcm 3:8cec250013ff 61
mcm 3:8cec250013ff 62 pc.printf( "X: %0.2fmG, Y: %0.2fmG, Z: %0.2fmG\r\n", myData.DataOutput_X, myData.DataOutput_Y, myData.DataOutput_Z );
mcm 3:8cec250013ff 63
mcm 3:8cec250013ff 64 myled1 = 0;
mcm 3:8cec250013ff 65 }
mcm 3:8cec250013ff 66
mcm 3:8cec250013ff 67
mcm 3:8cec250013ff 68 int main()
mcm 3:8cec250013ff 69 {
mcm 3:8cec250013ff 70 HMC5883L::HMC5883L_status_t aux;
mcm 3:8cec250013ff 71
mcm 3:8cec250013ff 72
mcm 3:8cec250013ff 73 pc.baud ( 115200 );
mcm 3:8cec250013ff 74
mcm 3:8cec250013ff 75
mcm 3:8cec250013ff 76 // Configure the device
mcm 3:8cec250013ff 77 aux = myMagnetometer.HMC5883L_Conf ( HMC5883L::CONF_REG_A_SAMPLE_1, HMC5883L::CONF_REG_A_DATARATE_15_HZ, HMC5883L::CONF_REG_A_MODE_NORMAL,
mcm 3:8cec250013ff 78 HMC5883L::CONF_REG_B_GAIN_1_3_GA, HMC5883L::MODE_REG_HIGH_SPEED_I2C_DISABLED, HMC5883L::MODE_REG_MODE_IDLE );
mcm 3:8cec250013ff 79
mcm 3:8cec250013ff 80
mcm 3:8cec250013ff 81 // Get the IDs
mcm 3:8cec250013ff 82 aux = myMagnetometer.HMC5883L_GetIdentificationRegister ( HMC5883L::HMC5883L_IDENTIFICATION_REGISTER_A, &myData );
mcm 3:8cec250013ff 83 aux = myMagnetometer.HMC5883L_GetIdentificationRegister ( HMC5883L::HMC5883L_IDENTIFICATION_REGISTER_B, &myData );
mcm 3:8cec250013ff 84 aux = myMagnetometer.HMC5883L_GetIdentificationRegister ( HMC5883L::HMC5883L_IDENTIFICATION_REGISTER_C, &myData );
mcm 3:8cec250013ff 85
mcm 3:8cec250013ff 86
mcm 3:8cec250013ff 87 //Plot the result
mcm 3:8cec250013ff 88 pc.printf( "ID_A: %d ( %d ) ID_B: %d ( %d ) ID_C: %d ( %d )\r\n", myData.IdentificationRegisterA, HMC5883L::ID_REGISTER_A, myData.IdentificationRegisterB, HMC5883L::ID_REGISTER_B,
mcm 4:f95da142fd3a 89 myData.IdentificationRegisterC, HMC5883L::ID_REGISTER_C );
mcm 3:8cec250013ff 90
mcm 3:8cec250013ff 91
mcm 3:8cec250013ff 92 newReading.attach( &readDATA, 0.5 ); // the address of the function to be attached ( readDATA ) and the interval ( 0.5s )
mcm 3:8cec250013ff 93
mcm 3:8cec250013ff 94
mcm 3:8cec250013ff 95 // Let the callbacks take care of everything
mcm 3:8cec250013ff 96 while(1) {
mcm 3:8cec250013ff 97 sleep();
mcm 3:8cec250013ff 98 }
mcm 3:8cec250013ff 99 }
mcm 1:689c451de04b 100 */
mcm 1:689c451de04b 101
mcm 1:689c451de04b 102
mcm 1:689c451de04b 103 /*!
mcm 1:689c451de04b 104 Library for the HMC5883L 3-Axis Digital Compass IC.
mcm 1:689c451de04b 105 */
mcm 1:689c451de04b 106 class HMC5883L
mcm 1:689c451de04b 107 {
mcm 1:689c451de04b 108 public:
mcm 1:689c451de04b 109 /**
mcm 1:689c451de04b 110 * @brief DEFAULT ADDRESSES.
mcm 1:689c451de04b 111 */
mcm 1:689c451de04b 112 typedef enum {
mcm 1:689c451de04b 113 HMC5883L_ADDRESS = ( 0x1E << 1) /*!< HMC5883L address */
mcm 1:689c451de04b 114 } HMC5883L_address_t;
mcm 1:689c451de04b 115
mcm 1:689c451de04b 116
mcm 1:689c451de04b 117 // REGISTER LIST
mcm 1:689c451de04b 118 /**
mcm 1:689c451de04b 119 * @brief REGISTERS
mcm 1:689c451de04b 120 */
mcm 1:689c451de04b 121 typedef enum {
mcm 1:689c451de04b 122 HMC5883L_CONFIGURATION_REGISTER_A = 0x00, /*!< Configuration Register A Read/Write */
mcm 1:689c451de04b 123 HMC5883L_CONFIGURATION_REGISTER_B = 0x01, /*!< Configuration Register B Read/Write */
mcm 1:689c451de04b 124 HMC5883L_MODE_REGISTER = 0x02, /*!< Mode Register Read/Write */
mcm 1:689c451de04b 125 HMC5883L_DATA_OUTPUT_X_MSB = 0x03, /*!< Data Output X MSB Register Read */
mcm 1:689c451de04b 126 HMC5883L_DATA_OUTPUT_X_LSB = 0x04, /*!< Data Output X LSB Register Read */
mcm 1:689c451de04b 127 HMC5883L_DATA_OUTPUT_Z_MSB = 0x05, /*!< Data Output Z MSB Register Read */
mcm 1:689c451de04b 128 HMC5883L_DATA_OUTPUT_Z_LSB = 0x06, /*!< Data Output Z LSB Register Read */
mcm 1:689c451de04b 129 HMC5883L_DATA_OUTPUT_Y_MSB = 0x07, /*!< Data Output Y MSB Register Read */
mcm 1:689c451de04b 130 HMC5883L_DATA_OUTPUT_Y_LSB = 0x08, /*!< Data Output Y LSB Register Read */
mcm 1:689c451de04b 131 HMC5883L_STATUS_REGISTER = 0x09, /*!< Status Register Read */
mcm 1:689c451de04b 132 HMC5883L_IDENTIFICATION_REGISTER_A = 0x0A, /*!< Identification Register A Read */
mcm 1:689c451de04b 133 HMC5883L_IDENTIFICATION_REGISTER_B = 0x0B, /*!< Identification Register B Read */
mcm 1:689c451de04b 134 HMC5883L_IDENTIFICATION_REGISTER_C = 0x0C /*!< Identification Register C Read */
mcm 1:689c451de04b 135 } HMC5883L_register_list_t;
mcm 1:689c451de04b 136
mcm 1:689c451de04b 137
mcm 1:689c451de04b 138
mcm 1:689c451de04b 139 // REGISTER BYTES
mcm 1:689c451de04b 140 /**
mcm 1:689c451de04b 141 * @brief CONFIGURATION REGISTER A
mcm 1:689c451de04b 142 */
mcm 1:689c451de04b 143 // [ MA1 to MA0 ] Select number of samples averaged
mcm 1:689c451de04b 144 typedef enum {
mcm 1:689c451de04b 145 CONF_REG_A_SAMPLE_MASK = 0x60, /*!< Number of samples averaged mask */
mcm 1:689c451de04b 146 CONF_REG_A_SAMPLE_1 = ( 0x00 << 5 ), /*!< Number of samples averaged 1 ( default ) */
mcm 1:689c451de04b 147 CONF_REG_A_SAMPLE_2 = ( 0x01 << 5 ), /*!< Number of samples averaged 2 */
mcm 1:689c451de04b 148 CONF_REG_A_SAMPLE_4 = ( 0x02 << 5 ), /*!< Number of samples averaged 4 */
mcm 1:689c451de04b 149 CONF_REG_A_SAMPLE_8 = ( 0x03 << 5 ) /*!< Number of samples averaged 8 */
mcm 1:689c451de04b 150 } HMC5883L_conf_reg_a_samples_t;
mcm 1:689c451de04b 151
mcm 1:689c451de04b 152
mcm 1:689c451de04b 153 // [ DO2 to DO0 ] Data Output Rate Bits.
mcm 1:689c451de04b 154 typedef enum {
mcm 1:689c451de04b 155 CONF_REG_A_DATARATE_MASK = 0x1C, /*!< Typical Data Output Rate mask */
mcm 1:689c451de04b 156 CONF_REG_A_DATARATE_0_75_HZ = ( 0x00 << 2 ), /*!< Typical Data Output Rate 0.75Hz */
mcm 1:689c451de04b 157 CONF_REG_A_DATARATE_1_5_HZ = ( 0x01 << 2 ), /*!< Typical Data Output Rate 1.5Hz */
mcm 1:689c451de04b 158 CONF_REG_A_DATARATE_3_HZ = ( 0x02 << 2 ), /*!< Typical Data Output Rate 3Hz */
mcm 1:689c451de04b 159 CONF_REG_A_DATARATE_7_5_HZ = ( 0x03 << 2 ), /*!< Typical Data Output Rate 7.5Hz */
mcm 1:689c451de04b 160 CONF_REG_A_DATARATE_15_HZ = ( 0x04 << 2 ), /*!< Typical Data Output Rate 15Hz ( default ) */
mcm 1:689c451de04b 161 CONF_REG_A_DATARATE_30_HZ = ( 0x05 << 2 ), /*!< Typical Data Output Rate 30Hz */
mcm 1:689c451de04b 162 CONF_REG_A_DATARATE_75_HZ = ( 0x06 << 2 ) /*!< Typical Data Output Rate 75Hz */
mcm 1:689c451de04b 163 } HMC5883L_conf_reg_a_dor_t;
mcm 1:689c451de04b 164
mcm 1:689c451de04b 165
mcm 1:689c451de04b 166 // [ MS1 to MS0 ] Measurement Configuration Bits.
mcm 1:689c451de04b 167 typedef enum {
mcm 1:689c451de04b 168 CONF_REG_A_MODE_MASK = 0x03, /*!< Measurement Configuration mask */
mcm 1:689c451de04b 169 CONF_REG_A_MODE_NORMAL = 0x00, /*!< Normal measurement configuration ( default ) */
mcm 1:689c451de04b 170 CONF_REG_A_MODE_POSITIVE_BIAS = 0x01, /*!< Positive bias configuration for X, Y, and Z axes */
mcm 1:689c451de04b 171 CONF_REG_A_MODE_NEGATIVE_BOAS = 0x02 /*!< Negative bias configuration for X, Y and Z axes */
mcm 1:689c451de04b 172 } HMC5883L_conf_reg_a_measurement_mode_t;
mcm 1:689c451de04b 173
mcm 1:689c451de04b 174
mcm 1:689c451de04b 175
mcm 1:689c451de04b 176
mcm 1:689c451de04b 177 /**
mcm 1:689c451de04b 178 * @brief CONFIGURATION REGISTER B
mcm 1:689c451de04b 179 */
mcm 1:689c451de04b 180 // [ GN2 to GN0 ] Gain Configuration Bits. NOTE: The new gain setting is effective from the second measurement and on.
mcm 1:689c451de04b 181 typedef enum {
mcm 1:689c451de04b 182 CONF_REG_B_GAIN_MASK = 0xE0, /*!< Gain Configuration mask */
mcm 1:689c451de04b 183 CONF_REG_B_GAIN_0_88_GA = ( 0x00 << 5 ), /*!< ± 0.88 Ga Digital Resolution: 0.73 */
mcm 1:689c451de04b 184 CONF_REG_B_GAIN_1_3_GA = ( 0x01 << 5 ), /*!< ± 1.3 Ga Digital Resolution: 0.92 ( default ) */
mcm 1:689c451de04b 185 CONF_REG_B_GAIN_1_9_GA = ( 0x02 << 5 ), /*!< ± 1.9 Ga Digital Resolution: 1.22 */
mcm 1:689c451de04b 186 CONF_REG_B_GAIN_2_5_GA = ( 0x03 << 5 ), /*!< ± 2.5 Ga Digital Resolution: 1.52 */
mcm 1:689c451de04b 187 CONF_REG_B_GAIN_4_0_GA = ( 0x04 << 5 ), /*!< ± 4.0 Ga Digital Resolution: 2.27 */
mcm 1:689c451de04b 188 CONF_REG_B_GAIN_4_7_GA = ( 0x05 << 5 ), /*!< ± 4.7 Ga Digital Resolution: 2.56 */
mcm 1:689c451de04b 189 CONF_REG_B_GAIN_5_6_GA = ( 0x06 << 5 ), /*!< ± 5.6 Ga Digital Resolution: 3.03 */
mcm 1:689c451de04b 190 CONF_REG_B_GAIN_8_1_GA = ( 0x07 << 5 ) /*!< ± 8.1 Ga Digital Resolution: 4.35 */
mcm 1:689c451de04b 191 } HMC5883L_conf_reg_b_gain_t;
mcm 1:689c451de04b 192
mcm 1:689c451de04b 193
mcm 1:689c451de04b 194
mcm 1:689c451de04b 195
mcm 1:689c451de04b 196 /**
mcm 1:689c451de04b 197 * @brief MODE REGISTER
mcm 1:689c451de04b 198 */
mcm 1:689c451de04b 199 // [ HS ] Enable High Speed I2C, 3400kHz
mcm 1:689c451de04b 200 typedef enum {
mcm 1:689c451de04b 201 MODE_REG_HIGH_SPEED_I2C_MASK = 0x80, /*!< High Speed I2C mask */
mcm 1:689c451de04b 202 MODE_REG_HIGH_SPEED_I2C_ENABLED = ( 0x01 << 7 ), /*!< High Speed I2C enabled */
mcm 1:689c451de04b 203 MODE_REG_HIGH_SPEED_I2C_DISABLED = ( 0x00 << 7 ) /*!< High Speed I2C disabled */
mcm 1:689c451de04b 204 } HMC5883L_mode_register_high_speed_t;
mcm 1:689c451de04b 205
mcm 1:689c451de04b 206
mcm 1:689c451de04b 207 // [ MD1 to MD0 ] Mode Select Bits
mcm 1:689c451de04b 208 typedef enum {
mcm 1:689c451de04b 209 MODE_REG_MODE_MASK = 0x03, /*!< Mode selection mask */
mcm 1:689c451de04b 210 MODE_REG_MODE_CONTINUOUS = 0x00, /*!< Continuous-Measurement Mode */
mcm 1:689c451de04b 211 MODE_REG_MODE_SINGLE = 0x01, /*!< Single-Measurement Mode ( default ) */
mcm 1:689c451de04b 212 MODE_REG_MODE_IDLE = 0x02 /*!< Idle Mode */
mcm 1:689c451de04b 213 } HMC5883L_mode_register_operation_mode_t;
mcm 1:689c451de04b 214
mcm 1:689c451de04b 215
mcm 1:689c451de04b 216
mcm 1:689c451de04b 217
mcm 1:689c451de04b 218 /**
mcm 1:689c451de04b 219 * @brief STATUS REGISTER
mcm 1:689c451de04b 220 */
mcm 1:689c451de04b 221 // [ LOCK ] Data output register lock
mcm 1:689c451de04b 222 typedef enum {
mcm 1:689c451de04b 223 STATUS_REG_LOCK_MASK = 0x02, /*!< Mask */
mcm 1:689c451de04b 224 STATUS_REG_LOCK_ENABLED = ( 0x01 << 1 ), /*!< This bit is set */
mcm 1:689c451de04b 225 STATUS_REG_LOCK_DISABLED = ( 0x00 << 1 ) /*!< This bit is not set */
mcm 1:689c451de04b 226 } HMC5883L_status_lock_t;
mcm 1:689c451de04b 227
mcm 1:689c451de04b 228
mcm 1:689c451de04b 229 // [ RDY ] Ready Bit
mcm 1:689c451de04b 230 typedef enum {
mcm 1:689c451de04b 231 STATUS_REG_RDY_MASK = 0x01, /*!< Mask */
mcm 1:689c451de04b 232 STATUS_REG_RDY_ENABLED = 0x01, /*!< This bit is set */
mcm 1:689c451de04b 233 STATUS_REG_RDY_DISABLED = 0x00 /*!< This bit is not set */
mcm 1:689c451de04b 234 } HMC5883L_status_ready_t;
mcm 1:689c451de04b 235
mcm 1:689c451de04b 236
mcm 1:689c451de04b 237
mcm 1:689c451de04b 238
mcm 1:689c451de04b 239 /**
mcm 1:689c451de04b 240 * @brief IDENTIFICATION REGISTERS
mcm 1:689c451de04b 241 */
mcm 1:689c451de04b 242 typedef enum {
mcm 1:689c451de04b 243 ID_REGISTER_A = 0x48, /*!< Identification Register A: 'H' */
mcm 1:689c451de04b 244 ID_REGISTER_B = 0x34, /*!< Identification Register B: '4' */
mcm 1:689c451de04b 245 ID_REGISTER_C = 0x33 /*!< Identification Register C: '3' */
mcm 1:689c451de04b 246 } HMC5883L_identification_registers_t;
mcm 1:689c451de04b 247
mcm 1:689c451de04b 248
mcm 1:689c451de04b 249
mcm 1:689c451de04b 250
mcm 1:689c451de04b 251 #ifndef HMC5883L_VECTOR_STRUCT_H
mcm 1:689c451de04b 252 #define HMC5883L_VECTOR_STRUCT_H
mcm 1:689c451de04b 253 typedef struct {
mcm 1:689c451de04b 254 float DataOutput_X;
mcm 1:689c451de04b 255 float DataOutput_Y;
mcm 1:689c451de04b 256 float DataOutput_Z;
mcm 1:689c451de04b 257
mcm 1:689c451de04b 258 uint8_t IdentificationRegisterA;
mcm 1:689c451de04b 259 uint8_t IdentificationRegisterB;
mcm 1:689c451de04b 260 uint8_t IdentificationRegisterC;
mcm 1:689c451de04b 261
mcm 1:689c451de04b 262 uint8_t Status;
mcm 1:689c451de04b 263 } HMC5883L_vector_data_t;
mcm 1:689c451de04b 264 #endif
mcm 1:689c451de04b 265
mcm 1:689c451de04b 266
mcm 1:689c451de04b 267
mcm 1:689c451de04b 268
mcm 1:689c451de04b 269 /**
mcm 1:689c451de04b 270 * @brief INTERNAL CONSTANTS
mcm 1:689c451de04b 271 */
mcm 1:689c451de04b 272 typedef enum {
mcm 1:689c451de04b 273 HMC5883L_SUCCESS = 0,
mcm 1:689c451de04b 274 HMC5883L_FAILURE = 1,
mcm 1:689c451de04b 275 I2C_SUCCESS = 0 /*!< I2C communication was fine */
mcm 1:689c451de04b 276 } HMC5883L_status_t;
mcm 1:689c451de04b 277
mcm 1:689c451de04b 278
mcm 1:689c451de04b 279
mcm 1:689c451de04b 280
mcm 1:689c451de04b 281 /** Create an HMC5883L object connected to the specified I2C pins.
mcm 1:689c451de04b 282 *
mcm 1:689c451de04b 283 * @param sda I2C data pin
mcm 1:689c451de04b 284 * @param scl I2C clock pin
mcm 1:689c451de04b 285 * @param addr I2C slave address
mcm 1:689c451de04b 286 * @param freq I2C frequency in Hz.
mcm 1:689c451de04b 287 */
mcm 1:689c451de04b 288 HMC5883L ( PinName sda, PinName scl, uint32_t addr, uint32_t freq );
mcm 1:689c451de04b 289
mcm 1:689c451de04b 290 /** Delete HMC5883L object.
mcm 1:689c451de04b 291 */
mcm 1:689c451de04b 292 ~HMC5883L();
mcm 1:689c451de04b 293
mcm 1:689c451de04b 294 /** It configures the device.
mcm 1:689c451de04b 295 */
mcm 3:8cec250013ff 296 HMC5883L_status_t HMC5883L_Conf ( HMC5883L_conf_reg_a_samples_t mySamples, HMC5883L_conf_reg_a_dor_t myDataRate, HMC5883L_conf_reg_a_measurement_mode_t myMeasurementMode,
mcm 3:8cec250013ff 297 HMC5883L_conf_reg_b_gain_t myGain, HMC5883L_mode_register_high_speed_t myI2CMode, HMC5883L_mode_register_operation_mode_t myOperationMode );
mcm 1:689c451de04b 298
mcm 1:689c451de04b 299 /** It gets the ID register
mcm 1:689c451de04b 300 */
mcm 1:689c451de04b 301 HMC5883L_status_t HMC5883L_GetIdentificationRegister ( HMC5883L_register_list_t myID_reg, HMC5883L_vector_data_t* myID );
mcm 3:8cec250013ff 302
mcm 1:689c451de04b 303 /** It gets the raw output data
mcm 1:689c451de04b 304 */
mcm 1:689c451de04b 305 HMC5883L_status_t HMC5883L_GetRawDataOutput ( HMC5883L_vector_data_t* myData );
mcm 3:8cec250013ff 306
mcm 1:689c451de04b 307 /** It gets the compensated/normalised output data
mcm 1:689c451de04b 308 */
mcm 1:689c451de04b 309 HMC5883L_status_t HMC5883L_GetCompensatedDataOutput ( HMC5883L_vector_data_t* myData, float myXOffset, float myYOffset, float myZOffset );
mcm 3:8cec250013ff 310
mcm 1:689c451de04b 311 /** It reads the status register
mcm 1:689c451de04b 312 */
mcm 1:689c451de04b 313 HMC5883L_status_t HMC5883L_GetStatus ( HMC5883L_vector_data_t* myStatus );
mcm 3:8cec250013ff 314
mcm 1:689c451de04b 315 /** It reads the a register
mcm 1:689c451de04b 316 */
mcm 1:689c451de04b 317 HMC5883L_status_t HMC5883L_ReadRegister ( HMC5883L_register_list_t myRegister, uint8_t* myRegisterData );
mcm 3:8cec250013ff 318
mcm 1:689c451de04b 319 /** It sets the number of samples averaged
mcm 1:689c451de04b 320 */
mcm 1:689c451de04b 321 HMC5883L_status_t HMC5883L_SetNumSample ( HMC5883L_conf_reg_a_samples_t mySamples );
mcm 3:8cec250013ff 322
mcm 1:689c451de04b 323 /** It sets the data rate ( bandwidth )
mcm 1:689c451de04b 324 */
mcm 1:689c451de04b 325 HMC5883L_status_t HMC5883L_SetDataRate ( HMC5883L_conf_reg_a_dor_t myDataRate );
mcm 3:8cec250013ff 326
mcm 1:689c451de04b 327 /** It sets the measurement configuration bits
mcm 1:689c451de04b 328 */
mcm 1:689c451de04b 329 HMC5883L_status_t HMC5883L_SetMeasurementConf ( HMC5883L_conf_reg_a_measurement_mode_t myMeasurementMode );
mcm 3:8cec250013ff 330
mcm 1:689c451de04b 331 /** It sets the gain
mcm 1:689c451de04b 332 */
mcm 1:689c451de04b 333 HMC5883L_status_t HMC5883L_SetGain ( HMC5883L_conf_reg_b_gain_t myGain );
mcm 3:8cec250013ff 334
mcm 1:689c451de04b 335 /** It sets the operation mode
mcm 1:689c451de04b 336 */
mcm 1:689c451de04b 337 HMC5883L_status_t HMC5883L_SetMode ( HMC5883L_mode_register_operation_mode_t myOperationMode );
mcm 1:689c451de04b 338
mcm 1:689c451de04b 339
mcm 1:689c451de04b 340
mcm 1:689c451de04b 341 private:
mcm 1:689c451de04b 342 I2C _i2c;
mcm 1:689c451de04b 343 uint32_t _HMC5883L_Addr;
mcm 1:689c451de04b 344 };
mcm 1:689c451de04b 345
mcm 1:689c451de04b 346 #endif