Micah B / mbed

mbed

Dependents:   DHTSensor_Test K64F_eCompass_OneNET_JW

TARGET_ARCH_GPRS/core_cmFunc.h@0:2cc6bb4d7fea, 2015-02-25 (annotated)

Committer:
mbotkinl
Date:
Wed Feb 25 20:22:22 2015 +0000
Revision:
0:2cc6bb4d7fea
Working code to read Temperature and Humidity readings

Who changed what in which revision?

UserRevisionLine numberNew contents of line
mbotkinl 0:2cc6bb4d7fea 1 /**************************************************************************//**
mbotkinl 0:2cc6bb4d7fea 2 * @file core_cmFunc.h
mbotkinl 0:2cc6bb4d7fea 3 * @brief CMSIS Cortex-M Core Function Access Header File
mbotkinl 0:2cc6bb4d7fea 4 * @version V3.20
mbotkinl 0:2cc6bb4d7fea 5 * @date 25. February 2013
mbotkinl 0:2cc6bb4d7fea 6 *
mbotkinl 0:2cc6bb4d7fea 7 * @note
mbotkinl 0:2cc6bb4d7fea 8 *
mbotkinl 0:2cc6bb4d7fea 9 ******************************************************************************/
mbotkinl 0:2cc6bb4d7fea 10 /* Copyright (c) 2009 - 2013 ARM LIMITED
mbotkinl 0:2cc6bb4d7fea 11
mbotkinl 0:2cc6bb4d7fea 12 All rights reserved.
mbotkinl 0:2cc6bb4d7fea 13 Redistribution and use in source and binary forms, with or without
mbotkinl 0:2cc6bb4d7fea 14 modification, are permitted provided that the following conditions are met:
mbotkinl 0:2cc6bb4d7fea 15 - Redistributions of source code must retain the above copyright
mbotkinl 0:2cc6bb4d7fea 16 notice, this list of conditions and the following disclaimer.
mbotkinl 0:2cc6bb4d7fea 17 - Redistributions in binary form must reproduce the above copyright
mbotkinl 0:2cc6bb4d7fea 18 notice, this list of conditions and the following disclaimer in the
mbotkinl 0:2cc6bb4d7fea 19 documentation and/or other materials provided with the distribution.
mbotkinl 0:2cc6bb4d7fea 20 - Neither the name of ARM nor the names of its contributors may be used
mbotkinl 0:2cc6bb4d7fea 21 to endorse or promote products derived from this software without
mbotkinl 0:2cc6bb4d7fea 22 specific prior written permission.
mbotkinl 0:2cc6bb4d7fea 23 *
mbotkinl 0:2cc6bb4d7fea 24 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
mbotkinl 0:2cc6bb4d7fea 25 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
mbotkinl 0:2cc6bb4d7fea 26 IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
mbotkinl 0:2cc6bb4d7fea 27 ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
mbotkinl 0:2cc6bb4d7fea 28 LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
mbotkinl 0:2cc6bb4d7fea 29 CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
mbotkinl 0:2cc6bb4d7fea 30 SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
mbotkinl 0:2cc6bb4d7fea 31 INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
mbotkinl 0:2cc6bb4d7fea 32 CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
mbotkinl 0:2cc6bb4d7fea 33 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
mbotkinl 0:2cc6bb4d7fea 34 POSSIBILITY OF SUCH DAMAGE.
mbotkinl 0:2cc6bb4d7fea 35 ---------------------------------------------------------------------------*/
mbotkinl 0:2cc6bb4d7fea 36
mbotkinl 0:2cc6bb4d7fea 37
mbotkinl 0:2cc6bb4d7fea 38 #ifndef __CORE_CMFUNC_H
mbotkinl 0:2cc6bb4d7fea 39 #define __CORE_CMFUNC_H
mbotkinl 0:2cc6bb4d7fea 40
mbotkinl 0:2cc6bb4d7fea 41
mbotkinl 0:2cc6bb4d7fea 42 /* ########################### Core Function Access ########################### */
mbotkinl 0:2cc6bb4d7fea 43 /** \ingroup CMSIS_Core_FunctionInterface
mbotkinl 0:2cc6bb4d7fea 44 \defgroup CMSIS_Core_RegAccFunctions CMSIS Core Register Access Functions
mbotkinl 0:2cc6bb4d7fea 45 @{
mbotkinl 0:2cc6bb4d7fea 46 */
mbotkinl 0:2cc6bb4d7fea 47
mbotkinl 0:2cc6bb4d7fea 48 #if defined ( __CC_ARM ) /*------------------RealView Compiler -----------------*/
mbotkinl 0:2cc6bb4d7fea 49 /* ARM armcc specific functions */
mbotkinl 0:2cc6bb4d7fea 50
mbotkinl 0:2cc6bb4d7fea 51 #if (__ARMCC_VERSION < 400677)
mbotkinl 0:2cc6bb4d7fea 52 #error "Please use ARM Compiler Toolchain V4.0.677 or later!"
mbotkinl 0:2cc6bb4d7fea 53 #endif
mbotkinl 0:2cc6bb4d7fea 54
mbotkinl 0:2cc6bb4d7fea 55 /* intrinsic void __enable_irq(); */
mbotkinl 0:2cc6bb4d7fea 56 /* intrinsic void __disable_irq(); */
mbotkinl 0:2cc6bb4d7fea 57
mbotkinl 0:2cc6bb4d7fea 58 /** \brief Get Control Register
mbotkinl 0:2cc6bb4d7fea 59
mbotkinl 0:2cc6bb4d7fea 60 This function returns the content of the Control Register.
mbotkinl 0:2cc6bb4d7fea 61
mbotkinl 0:2cc6bb4d7fea 62 \return Control Register value
mbotkinl 0:2cc6bb4d7fea 63 */
mbotkinl 0:2cc6bb4d7fea 64 __STATIC_INLINE uint32_t __get_CONTROL(void)
mbotkinl 0:2cc6bb4d7fea 65 {
mbotkinl 0:2cc6bb4d7fea 66 register uint32_t __regControl __ASM("control");
mbotkinl 0:2cc6bb4d7fea 67 return(__regControl);
mbotkinl 0:2cc6bb4d7fea 68 }
mbotkinl 0:2cc6bb4d7fea 69
mbotkinl 0:2cc6bb4d7fea 70
mbotkinl 0:2cc6bb4d7fea 71 /** \brief Set Control Register
mbotkinl 0:2cc6bb4d7fea 72
mbotkinl 0:2cc6bb4d7fea 73 This function writes the given value to the Control Register.
mbotkinl 0:2cc6bb4d7fea 74
mbotkinl 0:2cc6bb4d7fea 75 \param [in] control Control Register value to set
mbotkinl 0:2cc6bb4d7fea 76 */
mbotkinl 0:2cc6bb4d7fea 77 __STATIC_INLINE void __set_CONTROL(uint32_t control)
mbotkinl 0:2cc6bb4d7fea 78 {
mbotkinl 0:2cc6bb4d7fea 79 register uint32_t __regControl __ASM("control");
mbotkinl 0:2cc6bb4d7fea 80 __regControl = control;
mbotkinl 0:2cc6bb4d7fea 81 }
mbotkinl 0:2cc6bb4d7fea 82
mbotkinl 0:2cc6bb4d7fea 83
mbotkinl 0:2cc6bb4d7fea 84 /** \brief Get IPSR Register
mbotkinl 0:2cc6bb4d7fea 85
mbotkinl 0:2cc6bb4d7fea 86 This function returns the content of the IPSR Register.
mbotkinl 0:2cc6bb4d7fea 87
mbotkinl 0:2cc6bb4d7fea 88 \return IPSR Register value
mbotkinl 0:2cc6bb4d7fea 89 */
mbotkinl 0:2cc6bb4d7fea 90 __STATIC_INLINE uint32_t __get_IPSR(void)
mbotkinl 0:2cc6bb4d7fea 91 {
mbotkinl 0:2cc6bb4d7fea 92 register uint32_t __regIPSR __ASM("ipsr");
mbotkinl 0:2cc6bb4d7fea 93 return(__regIPSR);
mbotkinl 0:2cc6bb4d7fea 94 }
mbotkinl 0:2cc6bb4d7fea 95
mbotkinl 0:2cc6bb4d7fea 96
mbotkinl 0:2cc6bb4d7fea 97 /** \brief Get APSR Register
mbotkinl 0:2cc6bb4d7fea 98
mbotkinl 0:2cc6bb4d7fea 99 This function returns the content of the APSR Register.
mbotkinl 0:2cc6bb4d7fea 100
mbotkinl 0:2cc6bb4d7fea 101 \return APSR Register value
mbotkinl 0:2cc6bb4d7fea 102 */
mbotkinl 0:2cc6bb4d7fea 103 __STATIC_INLINE uint32_t __get_APSR(void)
mbotkinl 0:2cc6bb4d7fea 104 {
mbotkinl 0:2cc6bb4d7fea 105 register uint32_t __regAPSR __ASM("apsr");
mbotkinl 0:2cc6bb4d7fea 106 return(__regAPSR);
mbotkinl 0:2cc6bb4d7fea 107 }
mbotkinl 0:2cc6bb4d7fea 108
mbotkinl 0:2cc6bb4d7fea 109
mbotkinl 0:2cc6bb4d7fea 110 /** \brief Get xPSR Register
mbotkinl 0:2cc6bb4d7fea 111
mbotkinl 0:2cc6bb4d7fea 112 This function returns the content of the xPSR Register.
mbotkinl 0:2cc6bb4d7fea 113
mbotkinl 0:2cc6bb4d7fea 114 \return xPSR Register value
mbotkinl 0:2cc6bb4d7fea 115 */
mbotkinl 0:2cc6bb4d7fea 116 __STATIC_INLINE uint32_t __get_xPSR(void)
mbotkinl 0:2cc6bb4d7fea 117 {
mbotkinl 0:2cc6bb4d7fea 118 register uint32_t __regXPSR __ASM("xpsr");
mbotkinl 0:2cc6bb4d7fea 119 return(__regXPSR);
mbotkinl 0:2cc6bb4d7fea 120 }
mbotkinl 0:2cc6bb4d7fea 121
mbotkinl 0:2cc6bb4d7fea 122
mbotkinl 0:2cc6bb4d7fea 123 /** \brief Get Process Stack Pointer
mbotkinl 0:2cc6bb4d7fea 124
mbotkinl 0:2cc6bb4d7fea 125 This function returns the current value of the Process Stack Pointer (PSP).
mbotkinl 0:2cc6bb4d7fea 126
mbotkinl 0:2cc6bb4d7fea 127 \return PSP Register value
mbotkinl 0:2cc6bb4d7fea 128 */
mbotkinl 0:2cc6bb4d7fea 129 __STATIC_INLINE uint32_t __get_PSP(void)
mbotkinl 0:2cc6bb4d7fea 130 {
mbotkinl 0:2cc6bb4d7fea 131 register uint32_t __regProcessStackPointer __ASM("psp");
mbotkinl 0:2cc6bb4d7fea 132 return(__regProcessStackPointer);
mbotkinl 0:2cc6bb4d7fea 133 }
mbotkinl 0:2cc6bb4d7fea 134
mbotkinl 0:2cc6bb4d7fea 135
mbotkinl 0:2cc6bb4d7fea 136 /** \brief Set Process Stack Pointer
mbotkinl 0:2cc6bb4d7fea 137
mbotkinl 0:2cc6bb4d7fea 138 This function assigns the given value to the Process Stack Pointer (PSP).
mbotkinl 0:2cc6bb4d7fea 139
mbotkinl 0:2cc6bb4d7fea 140 \param [in] topOfProcStack Process Stack Pointer value to set
mbotkinl 0:2cc6bb4d7fea 141 */
mbotkinl 0:2cc6bb4d7fea 142 __STATIC_INLINE void __set_PSP(uint32_t topOfProcStack)
mbotkinl 0:2cc6bb4d7fea 143 {
mbotkinl 0:2cc6bb4d7fea 144 register uint32_t __regProcessStackPointer __ASM("psp");
mbotkinl 0:2cc6bb4d7fea 145 __regProcessStackPointer = topOfProcStack;
mbotkinl 0:2cc6bb4d7fea 146 }
mbotkinl 0:2cc6bb4d7fea 147
mbotkinl 0:2cc6bb4d7fea 148
mbotkinl 0:2cc6bb4d7fea 149 /** \brief Get Main Stack Pointer
mbotkinl 0:2cc6bb4d7fea 150
mbotkinl 0:2cc6bb4d7fea 151 This function returns the current value of the Main Stack Pointer (MSP).
mbotkinl 0:2cc6bb4d7fea 152
mbotkinl 0:2cc6bb4d7fea 153 \return MSP Register value
mbotkinl 0:2cc6bb4d7fea 154 */
mbotkinl 0:2cc6bb4d7fea 155 __STATIC_INLINE uint32_t __get_MSP(void)
mbotkinl 0:2cc6bb4d7fea 156 {
mbotkinl 0:2cc6bb4d7fea 157 register uint32_t __regMainStackPointer __ASM("msp");
mbotkinl 0:2cc6bb4d7fea 158 return(__regMainStackPointer);
mbotkinl 0:2cc6bb4d7fea 159 }
mbotkinl 0:2cc6bb4d7fea 160
mbotkinl 0:2cc6bb4d7fea 161
mbotkinl 0:2cc6bb4d7fea 162 /** \brief Set Main Stack Pointer
mbotkinl 0:2cc6bb4d7fea 163
mbotkinl 0:2cc6bb4d7fea 164 This function assigns the given value to the Main Stack Pointer (MSP).
mbotkinl 0:2cc6bb4d7fea 165
mbotkinl 0:2cc6bb4d7fea 166 \param [in] topOfMainStack Main Stack Pointer value to set
mbotkinl 0:2cc6bb4d7fea 167 */
mbotkinl 0:2cc6bb4d7fea 168 __STATIC_INLINE void __set_MSP(uint32_t topOfMainStack)
mbotkinl 0:2cc6bb4d7fea 169 {
mbotkinl 0:2cc6bb4d7fea 170 register uint32_t __regMainStackPointer __ASM("msp");
mbotkinl 0:2cc6bb4d7fea 171 __regMainStackPointer = topOfMainStack;
mbotkinl 0:2cc6bb4d7fea 172 }
mbotkinl 0:2cc6bb4d7fea 173
mbotkinl 0:2cc6bb4d7fea 174
mbotkinl 0:2cc6bb4d7fea 175 /** \brief Get Priority Mask
mbotkinl 0:2cc6bb4d7fea 176
mbotkinl 0:2cc6bb4d7fea 177 This function returns the current state of the priority mask bit from the Priority Mask Register.
mbotkinl 0:2cc6bb4d7fea 178
mbotkinl 0:2cc6bb4d7fea 179 \return Priority Mask value
mbotkinl 0:2cc6bb4d7fea 180 */
mbotkinl 0:2cc6bb4d7fea 181 __STATIC_INLINE uint32_t __get_PRIMASK(void)
mbotkinl 0:2cc6bb4d7fea 182 {
mbotkinl 0:2cc6bb4d7fea 183 register uint32_t __regPriMask __ASM("primask");
mbotkinl 0:2cc6bb4d7fea 184 return(__regPriMask);
mbotkinl 0:2cc6bb4d7fea 185 }
mbotkinl 0:2cc6bb4d7fea 186
mbotkinl 0:2cc6bb4d7fea 187
mbotkinl 0:2cc6bb4d7fea 188 /** \brief Set Priority Mask
mbotkinl 0:2cc6bb4d7fea 189
mbotkinl 0:2cc6bb4d7fea 190 This function assigns the given value to the Priority Mask Register.
mbotkinl 0:2cc6bb4d7fea 191
mbotkinl 0:2cc6bb4d7fea 192 \param [in] priMask Priority Mask
mbotkinl 0:2cc6bb4d7fea 193 */
mbotkinl 0:2cc6bb4d7fea 194 __STATIC_INLINE void __set_PRIMASK(uint32_t priMask)
mbotkinl 0:2cc6bb4d7fea 195 {
mbotkinl 0:2cc6bb4d7fea 196 register uint32_t __regPriMask __ASM("primask");
mbotkinl 0:2cc6bb4d7fea 197 __regPriMask = (priMask);
mbotkinl 0:2cc6bb4d7fea 198 }
mbotkinl 0:2cc6bb4d7fea 199
mbotkinl 0:2cc6bb4d7fea 200
mbotkinl 0:2cc6bb4d7fea 201 #if (__CORTEX_M >= 0x03)
mbotkinl 0:2cc6bb4d7fea 202
mbotkinl 0:2cc6bb4d7fea 203 /** \brief Enable FIQ
mbotkinl 0:2cc6bb4d7fea 204
mbotkinl 0:2cc6bb4d7fea 205 This function enables FIQ interrupts by clearing the F-bit in the CPSR.
mbotkinl 0:2cc6bb4d7fea 206 Can only be executed in Privileged modes.
mbotkinl 0:2cc6bb4d7fea 207 */
mbotkinl 0:2cc6bb4d7fea 208 #define __enable_fault_irq __enable_fiq
mbotkinl 0:2cc6bb4d7fea 209
mbotkinl 0:2cc6bb4d7fea 210
mbotkinl 0:2cc6bb4d7fea 211 /** \brief Disable FIQ
mbotkinl 0:2cc6bb4d7fea 212
mbotkinl 0:2cc6bb4d7fea 213 This function disables FIQ interrupts by setting the F-bit in the CPSR.
mbotkinl 0:2cc6bb4d7fea 214 Can only be executed in Privileged modes.
mbotkinl 0:2cc6bb4d7fea 215 */
mbotkinl 0:2cc6bb4d7fea 216 #define __disable_fault_irq __disable_fiq
mbotkinl 0:2cc6bb4d7fea 217
mbotkinl 0:2cc6bb4d7fea 218
mbotkinl 0:2cc6bb4d7fea 219 /** \brief Get Base Priority
mbotkinl 0:2cc6bb4d7fea 220
mbotkinl 0:2cc6bb4d7fea 221 This function returns the current value of the Base Priority register.
mbotkinl 0:2cc6bb4d7fea 222
mbotkinl 0:2cc6bb4d7fea 223 \return Base Priority register value
mbotkinl 0:2cc6bb4d7fea 224 */
mbotkinl 0:2cc6bb4d7fea 225 __STATIC_INLINE uint32_t __get_BASEPRI(void)
mbotkinl 0:2cc6bb4d7fea 226 {
mbotkinl 0:2cc6bb4d7fea 227 register uint32_t __regBasePri __ASM("basepri");
mbotkinl 0:2cc6bb4d7fea 228 return(__regBasePri);
mbotkinl 0:2cc6bb4d7fea 229 }
mbotkinl 0:2cc6bb4d7fea 230
mbotkinl 0:2cc6bb4d7fea 231
mbotkinl 0:2cc6bb4d7fea 232 /** \brief Set Base Priority
mbotkinl 0:2cc6bb4d7fea 233
mbotkinl 0:2cc6bb4d7fea 234 This function assigns the given value to the Base Priority register.
mbotkinl 0:2cc6bb4d7fea 235
mbotkinl 0:2cc6bb4d7fea 236 \param [in] basePri Base Priority value to set
mbotkinl 0:2cc6bb4d7fea 237 */
mbotkinl 0:2cc6bb4d7fea 238 __STATIC_INLINE void __set_BASEPRI(uint32_t basePri)
mbotkinl 0:2cc6bb4d7fea 239 {
mbotkinl 0:2cc6bb4d7fea 240 register uint32_t __regBasePri __ASM("basepri");
mbotkinl 0:2cc6bb4d7fea 241 __regBasePri = (basePri & 0xff);
mbotkinl 0:2cc6bb4d7fea 242 }
mbotkinl 0:2cc6bb4d7fea 243
mbotkinl 0:2cc6bb4d7fea 244
mbotkinl 0:2cc6bb4d7fea 245 /** \brief Get Fault Mask
mbotkinl 0:2cc6bb4d7fea 246
mbotkinl 0:2cc6bb4d7fea 247 This function returns the current value of the Fault Mask register.
mbotkinl 0:2cc6bb4d7fea 248
mbotkinl 0:2cc6bb4d7fea 249 \return Fault Mask register value
mbotkinl 0:2cc6bb4d7fea 250 */
mbotkinl 0:2cc6bb4d7fea 251 __STATIC_INLINE uint32_t __get_FAULTMASK(void)
mbotkinl 0:2cc6bb4d7fea 252 {
mbotkinl 0:2cc6bb4d7fea 253 register uint32_t __regFaultMask __ASM("faultmask");
mbotkinl 0:2cc6bb4d7fea 254 return(__regFaultMask);
mbotkinl 0:2cc6bb4d7fea 255 }
mbotkinl 0:2cc6bb4d7fea 256
mbotkinl 0:2cc6bb4d7fea 257
mbotkinl 0:2cc6bb4d7fea 258 /** \brief Set Fault Mask
mbotkinl 0:2cc6bb4d7fea 259
mbotkinl 0:2cc6bb4d7fea 260 This function assigns the given value to the Fault Mask register.
mbotkinl 0:2cc6bb4d7fea 261
mbotkinl 0:2cc6bb4d7fea 262 \param [in] faultMask Fault Mask value to set
mbotkinl 0:2cc6bb4d7fea 263 */
mbotkinl 0:2cc6bb4d7fea 264 __STATIC_INLINE void __set_FAULTMASK(uint32_t faultMask)
mbotkinl 0:2cc6bb4d7fea 265 {
mbotkinl 0:2cc6bb4d7fea 266 register uint32_t __regFaultMask __ASM("faultmask");
mbotkinl 0:2cc6bb4d7fea 267 __regFaultMask = (faultMask & (uint32_t)1);
mbotkinl 0:2cc6bb4d7fea 268 }
mbotkinl 0:2cc6bb4d7fea 269
mbotkinl 0:2cc6bb4d7fea 270 #endif /* (__CORTEX_M >= 0x03) */
mbotkinl 0:2cc6bb4d7fea 271
mbotkinl 0:2cc6bb4d7fea 272
mbotkinl 0:2cc6bb4d7fea 273 #if (__CORTEX_M == 0x04)
mbotkinl 0:2cc6bb4d7fea 274
mbotkinl 0:2cc6bb4d7fea 275 /** \brief Get FPSCR
mbotkinl 0:2cc6bb4d7fea 276
mbotkinl 0:2cc6bb4d7fea 277 This function returns the current value of the Floating Point Status/Control register.
mbotkinl 0:2cc6bb4d7fea 278
mbotkinl 0:2cc6bb4d7fea 279 \return Floating Point Status/Control register value
mbotkinl 0:2cc6bb4d7fea 280 */
mbotkinl 0:2cc6bb4d7fea 281 __STATIC_INLINE uint32_t __get_FPSCR(void)
mbotkinl 0:2cc6bb4d7fea 282 {
mbotkinl 0:2cc6bb4d7fea 283 #if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
mbotkinl 0:2cc6bb4d7fea 284 register uint32_t __regfpscr __ASM("fpscr");
mbotkinl 0:2cc6bb4d7fea 285 return(__regfpscr);
mbotkinl 0:2cc6bb4d7fea 286 #else
mbotkinl 0:2cc6bb4d7fea 287 return(0);
mbotkinl 0:2cc6bb4d7fea 288 #endif
mbotkinl 0:2cc6bb4d7fea 289 }
mbotkinl 0:2cc6bb4d7fea 290
mbotkinl 0:2cc6bb4d7fea 291
mbotkinl 0:2cc6bb4d7fea 292 /** \brief Set FPSCR
mbotkinl 0:2cc6bb4d7fea 293
mbotkinl 0:2cc6bb4d7fea 294 This function assigns the given value to the Floating Point Status/Control register.
mbotkinl 0:2cc6bb4d7fea 295
mbotkinl 0:2cc6bb4d7fea 296 \param [in] fpscr Floating Point Status/Control value to set
mbotkinl 0:2cc6bb4d7fea 297 */
mbotkinl 0:2cc6bb4d7fea 298 __STATIC_INLINE void __set_FPSCR(uint32_t fpscr)
mbotkinl 0:2cc6bb4d7fea 299 {
mbotkinl 0:2cc6bb4d7fea 300 #if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
mbotkinl 0:2cc6bb4d7fea 301 register uint32_t __regfpscr __ASM("fpscr");
mbotkinl 0:2cc6bb4d7fea 302 __regfpscr = (fpscr);
mbotkinl 0:2cc6bb4d7fea 303 #endif
mbotkinl 0:2cc6bb4d7fea 304 }
mbotkinl 0:2cc6bb4d7fea 305
mbotkinl 0:2cc6bb4d7fea 306 #endif /* (__CORTEX_M == 0x04) */
mbotkinl 0:2cc6bb4d7fea 307
mbotkinl 0:2cc6bb4d7fea 308
mbotkinl 0:2cc6bb4d7fea 309 #elif defined ( __ICCARM__ ) /*------------------ ICC Compiler -------------------*/
mbotkinl 0:2cc6bb4d7fea 310 /* IAR iccarm specific functions */
mbotkinl 0:2cc6bb4d7fea 311
mbotkinl 0:2cc6bb4d7fea 312 #include <cmsis_iar.h>
mbotkinl 0:2cc6bb4d7fea 313
mbotkinl 0:2cc6bb4d7fea 314
mbotkinl 0:2cc6bb4d7fea 315 #elif defined ( __TMS470__ ) /*---------------- TI CCS Compiler ------------------*/
mbotkinl 0:2cc6bb4d7fea 316 /* TI CCS specific functions */
mbotkinl 0:2cc6bb4d7fea 317
mbotkinl 0:2cc6bb4d7fea 318 #include <cmsis_ccs.h>
mbotkinl 0:2cc6bb4d7fea 319
mbotkinl 0:2cc6bb4d7fea 320
mbotkinl 0:2cc6bb4d7fea 321 #elif defined ( __GNUC__ ) /*------------------ GNU Compiler ---------------------*/
mbotkinl 0:2cc6bb4d7fea 322 /* GNU gcc specific functions */
mbotkinl 0:2cc6bb4d7fea 323
mbotkinl 0:2cc6bb4d7fea 324 /** \brief Enable IRQ Interrupts
mbotkinl 0:2cc6bb4d7fea 325
mbotkinl 0:2cc6bb4d7fea 326 This function enables IRQ interrupts by clearing the I-bit in the CPSR.
mbotkinl 0:2cc6bb4d7fea 327 Can only be executed in Privileged modes.
mbotkinl 0:2cc6bb4d7fea 328 */
mbotkinl 0:2cc6bb4d7fea 329 __attribute__( ( always_inline ) ) __STATIC_INLINE void __enable_irq(void)
mbotkinl 0:2cc6bb4d7fea 330 {
mbotkinl 0:2cc6bb4d7fea 331 __ASM volatile ("cpsie i" : : : "memory");
mbotkinl 0:2cc6bb4d7fea 332 }
mbotkinl 0:2cc6bb4d7fea 333
mbotkinl 0:2cc6bb4d7fea 334
mbotkinl 0:2cc6bb4d7fea 335 /** \brief Disable IRQ Interrupts
mbotkinl 0:2cc6bb4d7fea 336
mbotkinl 0:2cc6bb4d7fea 337 This function disables IRQ interrupts by setting the I-bit in the CPSR.
mbotkinl 0:2cc6bb4d7fea 338 Can only be executed in Privileged modes.
mbotkinl 0:2cc6bb4d7fea 339 */
mbotkinl 0:2cc6bb4d7fea 340 __attribute__( ( always_inline ) ) __STATIC_INLINE void __disable_irq(void)
mbotkinl 0:2cc6bb4d7fea 341 {
mbotkinl 0:2cc6bb4d7fea 342 __ASM volatile ("cpsid i" : : : "memory");
mbotkinl 0:2cc6bb4d7fea 343 }
mbotkinl 0:2cc6bb4d7fea 344
mbotkinl 0:2cc6bb4d7fea 345
mbotkinl 0:2cc6bb4d7fea 346 /** \brief Get Control Register
mbotkinl 0:2cc6bb4d7fea 347
mbotkinl 0:2cc6bb4d7fea 348 This function returns the content of the Control Register.
mbotkinl 0:2cc6bb4d7fea 349
mbotkinl 0:2cc6bb4d7fea 350 \return Control Register value
mbotkinl 0:2cc6bb4d7fea 351 */
mbotkinl 0:2cc6bb4d7fea 352 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_CONTROL(void)
mbotkinl 0:2cc6bb4d7fea 353 {
mbotkinl 0:2cc6bb4d7fea 354 uint32_t result;
mbotkinl 0:2cc6bb4d7fea 355
mbotkinl 0:2cc6bb4d7fea 356 __ASM volatile ("MRS %0, control" : "=r" (result) );
mbotkinl 0:2cc6bb4d7fea 357 return(result);
mbotkinl 0:2cc6bb4d7fea 358 }
mbotkinl 0:2cc6bb4d7fea 359
mbotkinl 0:2cc6bb4d7fea 360
mbotkinl 0:2cc6bb4d7fea 361 /** \brief Set Control Register
mbotkinl 0:2cc6bb4d7fea 362
mbotkinl 0:2cc6bb4d7fea 363 This function writes the given value to the Control Register.
mbotkinl 0:2cc6bb4d7fea 364
mbotkinl 0:2cc6bb4d7fea 365 \param [in] control Control Register value to set
mbotkinl 0:2cc6bb4d7fea 366 */
mbotkinl 0:2cc6bb4d7fea 367 __attribute__( ( always_inline ) ) __STATIC_INLINE void __set_CONTROL(uint32_t control)
mbotkinl 0:2cc6bb4d7fea 368 {
mbotkinl 0:2cc6bb4d7fea 369 __ASM volatile ("MSR control, %0" : : "r" (control) : "memory");
mbotkinl 0:2cc6bb4d7fea 370 }
mbotkinl 0:2cc6bb4d7fea 371
mbotkinl 0:2cc6bb4d7fea 372
mbotkinl 0:2cc6bb4d7fea 373 /** \brief Get IPSR Register
mbotkinl 0:2cc6bb4d7fea 374
mbotkinl 0:2cc6bb4d7fea 375 This function returns the content of the IPSR Register.
mbotkinl 0:2cc6bb4d7fea 376
mbotkinl 0:2cc6bb4d7fea 377 \return IPSR Register value
mbotkinl 0:2cc6bb4d7fea 378 */
mbotkinl 0:2cc6bb4d7fea 379 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_IPSR(void)
mbotkinl 0:2cc6bb4d7fea 380 {
mbotkinl 0:2cc6bb4d7fea 381 uint32_t result;
mbotkinl 0:2cc6bb4d7fea 382
mbotkinl 0:2cc6bb4d7fea 383 __ASM volatile ("MRS %0, ipsr" : "=r" (result) );
mbotkinl 0:2cc6bb4d7fea 384 return(result);
mbotkinl 0:2cc6bb4d7fea 385 }
mbotkinl 0:2cc6bb4d7fea 386
mbotkinl 0:2cc6bb4d7fea 387
mbotkinl 0:2cc6bb4d7fea 388 /** \brief Get APSR Register
mbotkinl 0:2cc6bb4d7fea 389
mbotkinl 0:2cc6bb4d7fea 390 This function returns the content of the APSR Register.
mbotkinl 0:2cc6bb4d7fea 391
mbotkinl 0:2cc6bb4d7fea 392 \return APSR Register value
mbotkinl 0:2cc6bb4d7fea 393 */
mbotkinl 0:2cc6bb4d7fea 394 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_APSR(void)
mbotkinl 0:2cc6bb4d7fea 395 {
mbotkinl 0:2cc6bb4d7fea 396 uint32_t result;
mbotkinl 0:2cc6bb4d7fea 397
mbotkinl 0:2cc6bb4d7fea 398 __ASM volatile ("MRS %0, apsr" : "=r" (result) );
mbotkinl 0:2cc6bb4d7fea 399 return(result);
mbotkinl 0:2cc6bb4d7fea 400 }
mbotkinl 0:2cc6bb4d7fea 401
mbotkinl 0:2cc6bb4d7fea 402
mbotkinl 0:2cc6bb4d7fea 403 /** \brief Get xPSR Register
mbotkinl 0:2cc6bb4d7fea 404
mbotkinl 0:2cc6bb4d7fea 405 This function returns the content of the xPSR Register.
mbotkinl 0:2cc6bb4d7fea 406
mbotkinl 0:2cc6bb4d7fea 407 \return xPSR Register value
mbotkinl 0:2cc6bb4d7fea 408 */
mbotkinl 0:2cc6bb4d7fea 409 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_xPSR(void)
mbotkinl 0:2cc6bb4d7fea 410 {
mbotkinl 0:2cc6bb4d7fea 411 uint32_t result;
mbotkinl 0:2cc6bb4d7fea 412
mbotkinl 0:2cc6bb4d7fea 413 __ASM volatile ("MRS %0, xpsr" : "=r" (result) );
mbotkinl 0:2cc6bb4d7fea 414 return(result);
mbotkinl 0:2cc6bb4d7fea 415 }
mbotkinl 0:2cc6bb4d7fea 416
mbotkinl 0:2cc6bb4d7fea 417
mbotkinl 0:2cc6bb4d7fea 418 /** \brief Get Process Stack Pointer
mbotkinl 0:2cc6bb4d7fea 419
mbotkinl 0:2cc6bb4d7fea 420 This function returns the current value of the Process Stack Pointer (PSP).
mbotkinl 0:2cc6bb4d7fea 421
mbotkinl 0:2cc6bb4d7fea 422 \return PSP Register value
mbotkinl 0:2cc6bb4d7fea 423 */
mbotkinl 0:2cc6bb4d7fea 424 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_PSP(void)
mbotkinl 0:2cc6bb4d7fea 425 {
mbotkinl 0:2cc6bb4d7fea 426 register uint32_t result;
mbotkinl 0:2cc6bb4d7fea 427
mbotkinl 0:2cc6bb4d7fea 428 __ASM volatile ("MRS %0, psp\n" : "=r" (result) );
mbotkinl 0:2cc6bb4d7fea 429 return(result);
mbotkinl 0:2cc6bb4d7fea 430 }
mbotkinl 0:2cc6bb4d7fea 431
mbotkinl 0:2cc6bb4d7fea 432
mbotkinl 0:2cc6bb4d7fea 433 /** \brief Set Process Stack Pointer
mbotkinl 0:2cc6bb4d7fea 434
mbotkinl 0:2cc6bb4d7fea 435 This function assigns the given value to the Process Stack Pointer (PSP).
mbotkinl 0:2cc6bb4d7fea 436
mbotkinl 0:2cc6bb4d7fea 437 \param [in] topOfProcStack Process Stack Pointer value to set
mbotkinl 0:2cc6bb4d7fea 438 */
mbotkinl 0:2cc6bb4d7fea 439 __attribute__( ( always_inline ) ) __STATIC_INLINE void __set_PSP(uint32_t topOfProcStack)
mbotkinl 0:2cc6bb4d7fea 440 {
mbotkinl 0:2cc6bb4d7fea 441 __ASM volatile ("MSR psp, %0\n" : : "r" (topOfProcStack) : "sp");
mbotkinl 0:2cc6bb4d7fea 442 }
mbotkinl 0:2cc6bb4d7fea 443
mbotkinl 0:2cc6bb4d7fea 444
mbotkinl 0:2cc6bb4d7fea 445 /** \brief Get Main Stack Pointer
mbotkinl 0:2cc6bb4d7fea 446
mbotkinl 0:2cc6bb4d7fea 447 This function returns the current value of the Main Stack Pointer (MSP).
mbotkinl 0:2cc6bb4d7fea 448
mbotkinl 0:2cc6bb4d7fea 449 \return MSP Register value
mbotkinl 0:2cc6bb4d7fea 450 */
mbotkinl 0:2cc6bb4d7fea 451 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_MSP(void)
mbotkinl 0:2cc6bb4d7fea 452 {
mbotkinl 0:2cc6bb4d7fea 453 register uint32_t result;
mbotkinl 0:2cc6bb4d7fea 454
mbotkinl 0:2cc6bb4d7fea 455 __ASM volatile ("MRS %0, msp\n" : "=r" (result) );
mbotkinl 0:2cc6bb4d7fea 456 return(result);
mbotkinl 0:2cc6bb4d7fea 457 }
mbotkinl 0:2cc6bb4d7fea 458
mbotkinl 0:2cc6bb4d7fea 459
mbotkinl 0:2cc6bb4d7fea 460 /** \brief Set Main Stack Pointer
mbotkinl 0:2cc6bb4d7fea 461
mbotkinl 0:2cc6bb4d7fea 462 This function assigns the given value to the Main Stack Pointer (MSP).
mbotkinl 0:2cc6bb4d7fea 463
mbotkinl 0:2cc6bb4d7fea 464 \param [in] topOfMainStack Main Stack Pointer value to set
mbotkinl 0:2cc6bb4d7fea 465 */
mbotkinl 0:2cc6bb4d7fea 466 __attribute__( ( always_inline ) ) __STATIC_INLINE void __set_MSP(uint32_t topOfMainStack)
mbotkinl 0:2cc6bb4d7fea 467 {
mbotkinl 0:2cc6bb4d7fea 468 __ASM volatile ("MSR msp, %0\n" : : "r" (topOfMainStack) : "sp");
mbotkinl 0:2cc6bb4d7fea 469 }
mbotkinl 0:2cc6bb4d7fea 470
mbotkinl 0:2cc6bb4d7fea 471
mbotkinl 0:2cc6bb4d7fea 472 /** \brief Get Priority Mask
mbotkinl 0:2cc6bb4d7fea 473
mbotkinl 0:2cc6bb4d7fea 474 This function returns the current state of the priority mask bit from the Priority Mask Register.
mbotkinl 0:2cc6bb4d7fea 475
mbotkinl 0:2cc6bb4d7fea 476 \return Priority Mask value
mbotkinl 0:2cc6bb4d7fea 477 */
mbotkinl 0:2cc6bb4d7fea 478 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_PRIMASK(void)
mbotkinl 0:2cc6bb4d7fea 479 {
mbotkinl 0:2cc6bb4d7fea 480 uint32_t result;
mbotkinl 0:2cc6bb4d7fea 481
mbotkinl 0:2cc6bb4d7fea 482 __ASM volatile ("MRS %0, primask" : "=r" (result) );
mbotkinl 0:2cc6bb4d7fea 483 return(result);
mbotkinl 0:2cc6bb4d7fea 484 }
mbotkinl 0:2cc6bb4d7fea 485
mbotkinl 0:2cc6bb4d7fea 486
mbotkinl 0:2cc6bb4d7fea 487 /** \brief Set Priority Mask
mbotkinl 0:2cc6bb4d7fea 488
mbotkinl 0:2cc6bb4d7fea 489 This function assigns the given value to the Priority Mask Register.
mbotkinl 0:2cc6bb4d7fea 490
mbotkinl 0:2cc6bb4d7fea 491 \param [in] priMask Priority Mask
mbotkinl 0:2cc6bb4d7fea 492 */
mbotkinl 0:2cc6bb4d7fea 493 __attribute__( ( always_inline ) ) __STATIC_INLINE void __set_PRIMASK(uint32_t priMask)
mbotkinl 0:2cc6bb4d7fea 494 {
mbotkinl 0:2cc6bb4d7fea 495 __ASM volatile ("MSR primask, %0" : : "r" (priMask) : "memory");
mbotkinl 0:2cc6bb4d7fea 496 }
mbotkinl 0:2cc6bb4d7fea 497
mbotkinl 0:2cc6bb4d7fea 498
mbotkinl 0:2cc6bb4d7fea 499 #if (__CORTEX_M >= 0x03)
mbotkinl 0:2cc6bb4d7fea 500
mbotkinl 0:2cc6bb4d7fea 501 /** \brief Enable FIQ
mbotkinl 0:2cc6bb4d7fea 502
mbotkinl 0:2cc6bb4d7fea 503 This function enables FIQ interrupts by clearing the F-bit in the CPSR.
mbotkinl 0:2cc6bb4d7fea 504 Can only be executed in Privileged modes.
mbotkinl 0:2cc6bb4d7fea 505 */
mbotkinl 0:2cc6bb4d7fea 506 __attribute__( ( always_inline ) ) __STATIC_INLINE void __enable_fault_irq(void)
mbotkinl 0:2cc6bb4d7fea 507 {
mbotkinl 0:2cc6bb4d7fea 508 __ASM volatile ("cpsie f" : : : "memory");
mbotkinl 0:2cc6bb4d7fea 509 }
mbotkinl 0:2cc6bb4d7fea 510
mbotkinl 0:2cc6bb4d7fea 511
mbotkinl 0:2cc6bb4d7fea 512 /** \brief Disable FIQ
mbotkinl 0:2cc6bb4d7fea 513
mbotkinl 0:2cc6bb4d7fea 514 This function disables FIQ interrupts by setting the F-bit in the CPSR.
mbotkinl 0:2cc6bb4d7fea 515 Can only be executed in Privileged modes.
mbotkinl 0:2cc6bb4d7fea 516 */
mbotkinl 0:2cc6bb4d7fea 517 __attribute__( ( always_inline ) ) __STATIC_INLINE void __disable_fault_irq(void)
mbotkinl 0:2cc6bb4d7fea 518 {
mbotkinl 0:2cc6bb4d7fea 519 __ASM volatile ("cpsid f" : : : "memory");
mbotkinl 0:2cc6bb4d7fea 520 }
mbotkinl 0:2cc6bb4d7fea 521
mbotkinl 0:2cc6bb4d7fea 522
mbotkinl 0:2cc6bb4d7fea 523 /** \brief Get Base Priority
mbotkinl 0:2cc6bb4d7fea 524
mbotkinl 0:2cc6bb4d7fea 525 This function returns the current value of the Base Priority register.
mbotkinl 0:2cc6bb4d7fea 526
mbotkinl 0:2cc6bb4d7fea 527 \return Base Priority register value
mbotkinl 0:2cc6bb4d7fea 528 */
mbotkinl 0:2cc6bb4d7fea 529 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_BASEPRI(void)
mbotkinl 0:2cc6bb4d7fea 530 {
mbotkinl 0:2cc6bb4d7fea 531 uint32_t result;
mbotkinl 0:2cc6bb4d7fea 532
mbotkinl 0:2cc6bb4d7fea 533 __ASM volatile ("MRS %0, basepri_max" : "=r" (result) );
mbotkinl 0:2cc6bb4d7fea 534 return(result);
mbotkinl 0:2cc6bb4d7fea 535 }
mbotkinl 0:2cc6bb4d7fea 536
mbotkinl 0:2cc6bb4d7fea 537
mbotkinl 0:2cc6bb4d7fea 538 /** \brief Set Base Priority
mbotkinl 0:2cc6bb4d7fea 539
mbotkinl 0:2cc6bb4d7fea 540 This function assigns the given value to the Base Priority register.
mbotkinl 0:2cc6bb4d7fea 541
mbotkinl 0:2cc6bb4d7fea 542 \param [in] basePri Base Priority value to set
mbotkinl 0:2cc6bb4d7fea 543 */
mbotkinl 0:2cc6bb4d7fea 544 __attribute__( ( always_inline ) ) __STATIC_INLINE void __set_BASEPRI(uint32_t value)
mbotkinl 0:2cc6bb4d7fea 545 {
mbotkinl 0:2cc6bb4d7fea 546 __ASM volatile ("MSR basepri, %0" : : "r" (value) : "memory");
mbotkinl 0:2cc6bb4d7fea 547 }
mbotkinl 0:2cc6bb4d7fea 548
mbotkinl 0:2cc6bb4d7fea 549
mbotkinl 0:2cc6bb4d7fea 550 /** \brief Get Fault Mask
mbotkinl 0:2cc6bb4d7fea 551
mbotkinl 0:2cc6bb4d7fea 552 This function returns the current value of the Fault Mask register.
mbotkinl 0:2cc6bb4d7fea 553
mbotkinl 0:2cc6bb4d7fea 554 \return Fault Mask register value
mbotkinl 0:2cc6bb4d7fea 555 */
mbotkinl 0:2cc6bb4d7fea 556 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_FAULTMASK(void)
mbotkinl 0:2cc6bb4d7fea 557 {
mbotkinl 0:2cc6bb4d7fea 558 uint32_t result;
mbotkinl 0:2cc6bb4d7fea 559
mbotkinl 0:2cc6bb4d7fea 560 __ASM volatile ("MRS %0, faultmask" : "=r" (result) );
mbotkinl 0:2cc6bb4d7fea 561 return(result);
mbotkinl 0:2cc6bb4d7fea 562 }
mbotkinl 0:2cc6bb4d7fea 563
mbotkinl 0:2cc6bb4d7fea 564
mbotkinl 0:2cc6bb4d7fea 565 /** \brief Set Fault Mask
mbotkinl 0:2cc6bb4d7fea 566
mbotkinl 0:2cc6bb4d7fea 567 This function assigns the given value to the Fault Mask register.
mbotkinl 0:2cc6bb4d7fea 568
mbotkinl 0:2cc6bb4d7fea 569 \param [in] faultMask Fault Mask value to set
mbotkinl 0:2cc6bb4d7fea 570 */
mbotkinl 0:2cc6bb4d7fea 571 __attribute__( ( always_inline ) ) __STATIC_INLINE void __set_FAULTMASK(uint32_t faultMask)
mbotkinl 0:2cc6bb4d7fea 572 {
mbotkinl 0:2cc6bb4d7fea 573 __ASM volatile ("MSR faultmask, %0" : : "r" (faultMask) : "memory");
mbotkinl 0:2cc6bb4d7fea 574 }
mbotkinl 0:2cc6bb4d7fea 575
mbotkinl 0:2cc6bb4d7fea 576 #endif /* (__CORTEX_M >= 0x03) */
mbotkinl 0:2cc6bb4d7fea 577
mbotkinl 0:2cc6bb4d7fea 578
mbotkinl 0:2cc6bb4d7fea 579 #if (__CORTEX_M == 0x04)
mbotkinl 0:2cc6bb4d7fea 580
mbotkinl 0:2cc6bb4d7fea 581 /** \brief Get FPSCR
mbotkinl 0:2cc6bb4d7fea 582
mbotkinl 0:2cc6bb4d7fea 583 This function returns the current value of the Floating Point Status/Control register.
mbotkinl 0:2cc6bb4d7fea 584
mbotkinl 0:2cc6bb4d7fea 585 \return Floating Point Status/Control register value
mbotkinl 0:2cc6bb4d7fea 586 */
mbotkinl 0:2cc6bb4d7fea 587 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_FPSCR(void)
mbotkinl 0:2cc6bb4d7fea 588 {
mbotkinl 0:2cc6bb4d7fea 589 #if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
mbotkinl 0:2cc6bb4d7fea 590 uint32_t result;
mbotkinl 0:2cc6bb4d7fea 591
mbotkinl 0:2cc6bb4d7fea 592 /* Empty asm statement works as a scheduling barrier */
mbotkinl 0:2cc6bb4d7fea 593 __ASM volatile ("");
mbotkinl 0:2cc6bb4d7fea 594 __ASM volatile ("VMRS %0, fpscr" : "=r" (result) );
mbotkinl 0:2cc6bb4d7fea 595 __ASM volatile ("");
mbotkinl 0:2cc6bb4d7fea 596 return(result);
mbotkinl 0:2cc6bb4d7fea 597 #else
mbotkinl 0:2cc6bb4d7fea 598 return(0);
mbotkinl 0:2cc6bb4d7fea 599 #endif
mbotkinl 0:2cc6bb4d7fea 600 }
mbotkinl 0:2cc6bb4d7fea 601
mbotkinl 0:2cc6bb4d7fea 602
mbotkinl 0:2cc6bb4d7fea 603 /** \brief Set FPSCR
mbotkinl 0:2cc6bb4d7fea 604
mbotkinl 0:2cc6bb4d7fea 605 This function assigns the given value to the Floating Point Status/Control register.
mbotkinl 0:2cc6bb4d7fea 606
mbotkinl 0:2cc6bb4d7fea 607 \param [in] fpscr Floating Point Status/Control value to set
mbotkinl 0:2cc6bb4d7fea 608 */
mbotkinl 0:2cc6bb4d7fea 609 __attribute__( ( always_inline ) ) __STATIC_INLINE void __set_FPSCR(uint32_t fpscr)
mbotkinl 0:2cc6bb4d7fea 610 {
mbotkinl 0:2cc6bb4d7fea 611 #if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
mbotkinl 0:2cc6bb4d7fea 612 /* Empty asm statement works as a scheduling barrier */
mbotkinl 0:2cc6bb4d7fea 613 __ASM volatile ("");
mbotkinl 0:2cc6bb4d7fea 614 __ASM volatile ("VMSR fpscr, %0" : : "r" (fpscr) : "vfpcc");
mbotkinl 0:2cc6bb4d7fea 615 __ASM volatile ("");
mbotkinl 0:2cc6bb4d7fea 616 #endif
mbotkinl 0:2cc6bb4d7fea 617 }
mbotkinl 0:2cc6bb4d7fea 618
mbotkinl 0:2cc6bb4d7fea 619 #endif /* (__CORTEX_M == 0x04) */
mbotkinl 0:2cc6bb4d7fea 620
mbotkinl 0:2cc6bb4d7fea 621
mbotkinl 0:2cc6bb4d7fea 622 #elif defined ( __TASKING__ ) /*------------------ TASKING Compiler --------------*/
mbotkinl 0:2cc6bb4d7fea 623 /* TASKING carm specific functions */
mbotkinl 0:2cc6bb4d7fea 624
mbotkinl 0:2cc6bb4d7fea 625 /*
mbotkinl 0:2cc6bb4d7fea 626 * The CMSIS functions have been implemented as intrinsics in the compiler.
mbotkinl 0:2cc6bb4d7fea 627 * Please use "carm -?i" to get an up to date list of all instrinsics,
mbotkinl 0:2cc6bb4d7fea 628 * Including the CMSIS ones.
mbotkinl 0:2cc6bb4d7fea 629 */
mbotkinl 0:2cc6bb4d7fea 630
mbotkinl 0:2cc6bb4d7fea 631 #endif
mbotkinl 0:2cc6bb4d7fea 632
mbotkinl 0:2cc6bb4d7fea 633 /*@} end of CMSIS_Core_RegAccFunctions */
mbotkinl 0:2cc6bb4d7fea 634
mbotkinl 0:2cc6bb4d7fea 635
mbotkinl 0:2cc6bb4d7fea 636 #endif /* __CORE_CMFUNC_H */