mbed

Dependents:   DHTSensor_Test K64F_eCompass_OneNET_JW

Committer:
mbotkinl
Date:
Wed Feb 25 20:22:22 2015 +0000
Revision:
0:2cc6bb4d7fea
Working code to read Temperature and Humidity readings

Who changed what in which revision?

UserRevisionLine numberNew contents of line
mbotkinl 0:2cc6bb4d7fea 1 /**************************************************************************//**
mbotkinl 0:2cc6bb4d7fea 2 * @file core_ca9.h
mbotkinl 0:2cc6bb4d7fea 3 * @brief CMSIS Cortex-A9 Core Peripheral Access Layer Header File
mbotkinl 0:2cc6bb4d7fea 4 * @version
mbotkinl 0:2cc6bb4d7fea 5 * @date 25 March 2013
mbotkinl 0:2cc6bb4d7fea 6 *
mbotkinl 0:2cc6bb4d7fea 7 * @note
mbotkinl 0:2cc6bb4d7fea 8 *
mbotkinl 0:2cc6bb4d7fea 9 ******************************************************************************/
mbotkinl 0:2cc6bb4d7fea 10 /* Copyright (c) 2009 - 2012 ARM LIMITED
mbotkinl 0:2cc6bb4d7fea 11
mbotkinl 0:2cc6bb4d7fea 12 All rights reserved.
mbotkinl 0:2cc6bb4d7fea 13 Redistribution and use in source and binary forms, with or without
mbotkinl 0:2cc6bb4d7fea 14 modification, are permitted provided that the following conditions are met:
mbotkinl 0:2cc6bb4d7fea 15 - Redistributions of source code must retain the above copyright
mbotkinl 0:2cc6bb4d7fea 16 notice, this list of conditions and the following disclaimer.
mbotkinl 0:2cc6bb4d7fea 17 - Redistributions in binary form must reproduce the above copyright
mbotkinl 0:2cc6bb4d7fea 18 notice, this list of conditions and the following disclaimer in the
mbotkinl 0:2cc6bb4d7fea 19 documentation and/or other materials provided with the distribution.
mbotkinl 0:2cc6bb4d7fea 20 - Neither the name of ARM nor the names of its contributors may be used
mbotkinl 0:2cc6bb4d7fea 21 to endorse or promote products derived from this software without
mbotkinl 0:2cc6bb4d7fea 22 specific prior written permission.
mbotkinl 0:2cc6bb4d7fea 23 *
mbotkinl 0:2cc6bb4d7fea 24 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
mbotkinl 0:2cc6bb4d7fea 25 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
mbotkinl 0:2cc6bb4d7fea 26 IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
mbotkinl 0:2cc6bb4d7fea 27 ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
mbotkinl 0:2cc6bb4d7fea 28 LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
mbotkinl 0:2cc6bb4d7fea 29 CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
mbotkinl 0:2cc6bb4d7fea 30 SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
mbotkinl 0:2cc6bb4d7fea 31 INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
mbotkinl 0:2cc6bb4d7fea 32 CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
mbotkinl 0:2cc6bb4d7fea 33 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
mbotkinl 0:2cc6bb4d7fea 34 POSSIBILITY OF SUCH DAMAGE.
mbotkinl 0:2cc6bb4d7fea 35 ---------------------------------------------------------------------------*/
mbotkinl 0:2cc6bb4d7fea 36
mbotkinl 0:2cc6bb4d7fea 37
mbotkinl 0:2cc6bb4d7fea 38 #if defined ( __ICCARM__ )
mbotkinl 0:2cc6bb4d7fea 39 #pragma system_include /* treat file as system include file for MISRA check */
mbotkinl 0:2cc6bb4d7fea 40 #endif
mbotkinl 0:2cc6bb4d7fea 41
mbotkinl 0:2cc6bb4d7fea 42 #ifdef __cplusplus
mbotkinl 0:2cc6bb4d7fea 43 extern "C" {
mbotkinl 0:2cc6bb4d7fea 44 #endif
mbotkinl 0:2cc6bb4d7fea 45
mbotkinl 0:2cc6bb4d7fea 46 #ifndef __CORE_CA9_H_GENERIC
mbotkinl 0:2cc6bb4d7fea 47 #define __CORE_CA9_H_GENERIC
mbotkinl 0:2cc6bb4d7fea 48
mbotkinl 0:2cc6bb4d7fea 49
mbotkinl 0:2cc6bb4d7fea 50 /** \page CMSIS_MISRA_Exceptions MISRA-C:2004 Compliance Exceptions
mbotkinl 0:2cc6bb4d7fea 51 CMSIS violates the following MISRA-C:2004 rules:
mbotkinl 0:2cc6bb4d7fea 52
mbotkinl 0:2cc6bb4d7fea 53 \li Required Rule 8.5, object/function definition in header file.<br>
mbotkinl 0:2cc6bb4d7fea 54 Function definitions in header files are used to allow 'inlining'.
mbotkinl 0:2cc6bb4d7fea 55
mbotkinl 0:2cc6bb4d7fea 56 \li Required Rule 18.4, declaration of union type or object of union type: '{...}'.<br>
mbotkinl 0:2cc6bb4d7fea 57 Unions are used for effective representation of core registers.
mbotkinl 0:2cc6bb4d7fea 58
mbotkinl 0:2cc6bb4d7fea 59 \li Advisory Rule 19.7, Function-like macro defined.<br>
mbotkinl 0:2cc6bb4d7fea 60 Function-like macros are used to allow more efficient code.
mbotkinl 0:2cc6bb4d7fea 61 */
mbotkinl 0:2cc6bb4d7fea 62
mbotkinl 0:2cc6bb4d7fea 63
mbotkinl 0:2cc6bb4d7fea 64 /*******************************************************************************
mbotkinl 0:2cc6bb4d7fea 65 * CMSIS definitions
mbotkinl 0:2cc6bb4d7fea 66 ******************************************************************************/
mbotkinl 0:2cc6bb4d7fea 67 /** \ingroup Cortex_A9
mbotkinl 0:2cc6bb4d7fea 68 @{
mbotkinl 0:2cc6bb4d7fea 69 */
mbotkinl 0:2cc6bb4d7fea 70
mbotkinl 0:2cc6bb4d7fea 71 /* CMSIS CA9 definitions */
mbotkinl 0:2cc6bb4d7fea 72 #define __CA9_CMSIS_VERSION_MAIN (0x03) /*!< [31:16] CMSIS HAL main version */
mbotkinl 0:2cc6bb4d7fea 73 #define __CA9_CMSIS_VERSION_SUB (0x10) /*!< [15:0] CMSIS HAL sub version */
mbotkinl 0:2cc6bb4d7fea 74 #define __CA9_CMSIS_VERSION ((__CA9_CMSIS_VERSION_MAIN << 16) | \
mbotkinl 0:2cc6bb4d7fea 75 __CA9_CMSIS_VERSION_SUB ) /*!< CMSIS HAL version number */
mbotkinl 0:2cc6bb4d7fea 76
mbotkinl 0:2cc6bb4d7fea 77 #define __CORTEX_A (0x09) /*!< Cortex-A Core */
mbotkinl 0:2cc6bb4d7fea 78
mbotkinl 0:2cc6bb4d7fea 79
mbotkinl 0:2cc6bb4d7fea 80 #if defined ( __CC_ARM )
mbotkinl 0:2cc6bb4d7fea 81 #define __ASM __asm /*!< asm keyword for ARM Compiler */
mbotkinl 0:2cc6bb4d7fea 82 #define __INLINE __inline /*!< inline keyword for ARM Compiler */
mbotkinl 0:2cc6bb4d7fea 83 #define __STATIC_INLINE static __inline
mbotkinl 0:2cc6bb4d7fea 84 #define __STATIC_ASM static __asm
mbotkinl 0:2cc6bb4d7fea 85
mbotkinl 0:2cc6bb4d7fea 86 #elif defined ( __ICCARM__ )
mbotkinl 0:2cc6bb4d7fea 87 #define __ASM __asm /*!< asm keyword for IAR Compiler */
mbotkinl 0:2cc6bb4d7fea 88 #define __INLINE inline /*!< inline keyword for IAR Compiler. Only available in High optimization mode! */
mbotkinl 0:2cc6bb4d7fea 89 #define __STATIC_INLINE static inline
mbotkinl 0:2cc6bb4d7fea 90 #define __STATIC_ASM static __asm
mbotkinl 0:2cc6bb4d7fea 91
mbotkinl 0:2cc6bb4d7fea 92 #elif defined ( __TMS470__ )
mbotkinl 0:2cc6bb4d7fea 93 #define __ASM __asm /*!< asm keyword for TI CCS Compiler */
mbotkinl 0:2cc6bb4d7fea 94 #define __STATIC_INLINE static inline
mbotkinl 0:2cc6bb4d7fea 95 #define __STATIC_ASM static __asm
mbotkinl 0:2cc6bb4d7fea 96
mbotkinl 0:2cc6bb4d7fea 97 #elif defined ( __GNUC__ )
mbotkinl 0:2cc6bb4d7fea 98 #define __ASM __asm /*!< asm keyword for GNU Compiler */
mbotkinl 0:2cc6bb4d7fea 99 #define __INLINE inline /*!< inline keyword for GNU Compiler */
mbotkinl 0:2cc6bb4d7fea 100 #define __STATIC_INLINE static inline
mbotkinl 0:2cc6bb4d7fea 101 #define __STATIC_ASM static __asm
mbotkinl 0:2cc6bb4d7fea 102
mbotkinl 0:2cc6bb4d7fea 103 #elif defined ( __TASKING__ )
mbotkinl 0:2cc6bb4d7fea 104 #define __ASM __asm /*!< asm keyword for TASKING Compiler */
mbotkinl 0:2cc6bb4d7fea 105 #define __INLINE inline /*!< inline keyword for TASKING Compiler */
mbotkinl 0:2cc6bb4d7fea 106 #define __STATIC_INLINE static inline
mbotkinl 0:2cc6bb4d7fea 107 #define __STATIC_ASM static __asm
mbotkinl 0:2cc6bb4d7fea 108
mbotkinl 0:2cc6bb4d7fea 109 #endif
mbotkinl 0:2cc6bb4d7fea 110
mbotkinl 0:2cc6bb4d7fea 111 /** __FPU_USED indicates whether an FPU is used or not. For this, __FPU_PRESENT has to be checked prior to making use of FPU specific registers and functions.
mbotkinl 0:2cc6bb4d7fea 112 */
mbotkinl 0:2cc6bb4d7fea 113 #if defined ( __CC_ARM )
mbotkinl 0:2cc6bb4d7fea 114 #if defined __TARGET_FPU_VFP
mbotkinl 0:2cc6bb4d7fea 115 #if (__FPU_PRESENT == 1)
mbotkinl 0:2cc6bb4d7fea 116 #define __FPU_USED 1
mbotkinl 0:2cc6bb4d7fea 117 #else
mbotkinl 0:2cc6bb4d7fea 118 #warning "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
mbotkinl 0:2cc6bb4d7fea 119 #define __FPU_USED 0
mbotkinl 0:2cc6bb4d7fea 120 #endif
mbotkinl 0:2cc6bb4d7fea 121 #else
mbotkinl 0:2cc6bb4d7fea 122 #define __FPU_USED 0
mbotkinl 0:2cc6bb4d7fea 123 #endif
mbotkinl 0:2cc6bb4d7fea 124
mbotkinl 0:2cc6bb4d7fea 125 #elif defined ( __ICCARM__ )
mbotkinl 0:2cc6bb4d7fea 126 #if defined __ARMVFP__
mbotkinl 0:2cc6bb4d7fea 127 #if (__FPU_PRESENT == 1)
mbotkinl 0:2cc6bb4d7fea 128 #define __FPU_USED 1
mbotkinl 0:2cc6bb4d7fea 129 #else
mbotkinl 0:2cc6bb4d7fea 130 #warning "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
mbotkinl 0:2cc6bb4d7fea 131 #define __FPU_USED 0
mbotkinl 0:2cc6bb4d7fea 132 #endif
mbotkinl 0:2cc6bb4d7fea 133 #else
mbotkinl 0:2cc6bb4d7fea 134 #define __FPU_USED 0
mbotkinl 0:2cc6bb4d7fea 135 #endif
mbotkinl 0:2cc6bb4d7fea 136
mbotkinl 0:2cc6bb4d7fea 137 #elif defined ( __TMS470__ )
mbotkinl 0:2cc6bb4d7fea 138 #if defined __TI_VFP_SUPPORT__
mbotkinl 0:2cc6bb4d7fea 139 #if (__FPU_PRESENT == 1)
mbotkinl 0:2cc6bb4d7fea 140 #define __FPU_USED 1
mbotkinl 0:2cc6bb4d7fea 141 #else
mbotkinl 0:2cc6bb4d7fea 142 #warning "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
mbotkinl 0:2cc6bb4d7fea 143 #define __FPU_USED 0
mbotkinl 0:2cc6bb4d7fea 144 #endif
mbotkinl 0:2cc6bb4d7fea 145 #else
mbotkinl 0:2cc6bb4d7fea 146 #define __FPU_USED 0
mbotkinl 0:2cc6bb4d7fea 147 #endif
mbotkinl 0:2cc6bb4d7fea 148
mbotkinl 0:2cc6bb4d7fea 149 #elif defined ( __GNUC__ )
mbotkinl 0:2cc6bb4d7fea 150 #if defined (__VFP_FP__) && !defined(__SOFTFP__)
mbotkinl 0:2cc6bb4d7fea 151 #if (__FPU_PRESENT == 1)
mbotkinl 0:2cc6bb4d7fea 152 #define __FPU_USED 1
mbotkinl 0:2cc6bb4d7fea 153 #else
mbotkinl 0:2cc6bb4d7fea 154 #warning "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
mbotkinl 0:2cc6bb4d7fea 155 #define __FPU_USED 0
mbotkinl 0:2cc6bb4d7fea 156 #endif
mbotkinl 0:2cc6bb4d7fea 157 #else
mbotkinl 0:2cc6bb4d7fea 158 #define __FPU_USED 0
mbotkinl 0:2cc6bb4d7fea 159 #endif
mbotkinl 0:2cc6bb4d7fea 160
mbotkinl 0:2cc6bb4d7fea 161 #elif defined ( __TASKING__ )
mbotkinl 0:2cc6bb4d7fea 162 #if defined __FPU_VFP__
mbotkinl 0:2cc6bb4d7fea 163 #if (__FPU_PRESENT == 1)
mbotkinl 0:2cc6bb4d7fea 164 #define __FPU_USED 1
mbotkinl 0:2cc6bb4d7fea 165 #else
mbotkinl 0:2cc6bb4d7fea 166 #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
mbotkinl 0:2cc6bb4d7fea 167 #define __FPU_USED 0
mbotkinl 0:2cc6bb4d7fea 168 #endif
mbotkinl 0:2cc6bb4d7fea 169 #else
mbotkinl 0:2cc6bb4d7fea 170 #define __FPU_USED 0
mbotkinl 0:2cc6bb4d7fea 171 #endif
mbotkinl 0:2cc6bb4d7fea 172 #endif
mbotkinl 0:2cc6bb4d7fea 173
mbotkinl 0:2cc6bb4d7fea 174 #include <stdint.h> /*!< standard types definitions */
mbotkinl 0:2cc6bb4d7fea 175 #include "core_caInstr.h" /*!< Core Instruction Access */
mbotkinl 0:2cc6bb4d7fea 176 #include "core_caFunc.h" /*!< Core Function Access */
mbotkinl 0:2cc6bb4d7fea 177 #include "core_cm4_simd.h" /*!< Compiler specific SIMD Intrinsics */
mbotkinl 0:2cc6bb4d7fea 178
mbotkinl 0:2cc6bb4d7fea 179 #endif /* __CORE_CA9_H_GENERIC */
mbotkinl 0:2cc6bb4d7fea 180
mbotkinl 0:2cc6bb4d7fea 181 #ifndef __CMSIS_GENERIC
mbotkinl 0:2cc6bb4d7fea 182
mbotkinl 0:2cc6bb4d7fea 183 #ifndef __CORE_CA9_H_DEPENDANT
mbotkinl 0:2cc6bb4d7fea 184 #define __CORE_CA9_H_DEPENDANT
mbotkinl 0:2cc6bb4d7fea 185
mbotkinl 0:2cc6bb4d7fea 186 /* check device defines and use defaults */
mbotkinl 0:2cc6bb4d7fea 187 #if defined __CHECK_DEVICE_DEFINES
mbotkinl 0:2cc6bb4d7fea 188 #ifndef __CA9_REV
mbotkinl 0:2cc6bb4d7fea 189 #define __CA9_REV 0x0000
mbotkinl 0:2cc6bb4d7fea 190 #warning "__CA9_REV not defined in device header file; using default!"
mbotkinl 0:2cc6bb4d7fea 191 #endif
mbotkinl 0:2cc6bb4d7fea 192
mbotkinl 0:2cc6bb4d7fea 193 #ifndef __FPU_PRESENT
mbotkinl 0:2cc6bb4d7fea 194 #define __FPU_PRESENT 1
mbotkinl 0:2cc6bb4d7fea 195 #warning "__FPU_PRESENT not defined in device header file; using default!"
mbotkinl 0:2cc6bb4d7fea 196 #endif
mbotkinl 0:2cc6bb4d7fea 197
mbotkinl 0:2cc6bb4d7fea 198 #ifndef __Vendor_SysTickConfig
mbotkinl 0:2cc6bb4d7fea 199 #define __Vendor_SysTickConfig 1
mbotkinl 0:2cc6bb4d7fea 200 #endif
mbotkinl 0:2cc6bb4d7fea 201
mbotkinl 0:2cc6bb4d7fea 202 #if __Vendor_SysTickConfig == 0
mbotkinl 0:2cc6bb4d7fea 203 #error "__Vendor_SysTickConfig set to 0, but vendor systick timer must be supplied for Cortex-A9"
mbotkinl 0:2cc6bb4d7fea 204 #endif
mbotkinl 0:2cc6bb4d7fea 205 #endif
mbotkinl 0:2cc6bb4d7fea 206
mbotkinl 0:2cc6bb4d7fea 207 /* IO definitions (access restrictions to peripheral registers) */
mbotkinl 0:2cc6bb4d7fea 208 /**
mbotkinl 0:2cc6bb4d7fea 209 \defgroup CMSIS_glob_defs CMSIS Global Defines
mbotkinl 0:2cc6bb4d7fea 210
mbotkinl 0:2cc6bb4d7fea 211 <strong>IO Type Qualifiers</strong> are used
mbotkinl 0:2cc6bb4d7fea 212 \li to specify the access to peripheral variables.
mbotkinl 0:2cc6bb4d7fea 213 \li for automatic generation of peripheral register debug information.
mbotkinl 0:2cc6bb4d7fea 214 */
mbotkinl 0:2cc6bb4d7fea 215 #ifdef __cplusplus
mbotkinl 0:2cc6bb4d7fea 216 #define __I volatile /*!< Defines 'read only' permissions */
mbotkinl 0:2cc6bb4d7fea 217 #else
mbotkinl 0:2cc6bb4d7fea 218 #define __I volatile const /*!< Defines 'read only' permissions */
mbotkinl 0:2cc6bb4d7fea 219 #endif
mbotkinl 0:2cc6bb4d7fea 220 #define __O volatile /*!< Defines 'write only' permissions */
mbotkinl 0:2cc6bb4d7fea 221 #define __IO volatile /*!< Defines 'read / write' permissions */
mbotkinl 0:2cc6bb4d7fea 222
mbotkinl 0:2cc6bb4d7fea 223 /*@} end of group Cortex_A9 */
mbotkinl 0:2cc6bb4d7fea 224
mbotkinl 0:2cc6bb4d7fea 225
mbotkinl 0:2cc6bb4d7fea 226 /*******************************************************************************
mbotkinl 0:2cc6bb4d7fea 227 * Register Abstraction
mbotkinl 0:2cc6bb4d7fea 228 ******************************************************************************/
mbotkinl 0:2cc6bb4d7fea 229 /** \defgroup CMSIS_core_register Defines and Type Definitions
mbotkinl 0:2cc6bb4d7fea 230 \brief Type definitions and defines for Cortex-A processor based devices.
mbotkinl 0:2cc6bb4d7fea 231 */
mbotkinl 0:2cc6bb4d7fea 232
mbotkinl 0:2cc6bb4d7fea 233 /** \ingroup CMSIS_core_register
mbotkinl 0:2cc6bb4d7fea 234 \defgroup CMSIS_CORE Status and Control Registers
mbotkinl 0:2cc6bb4d7fea 235 \brief Core Register type definitions.
mbotkinl 0:2cc6bb4d7fea 236 @{
mbotkinl 0:2cc6bb4d7fea 237 */
mbotkinl 0:2cc6bb4d7fea 238
mbotkinl 0:2cc6bb4d7fea 239 /** \brief Union type to access the Application Program Status Register (APSR).
mbotkinl 0:2cc6bb4d7fea 240 */
mbotkinl 0:2cc6bb4d7fea 241 typedef union
mbotkinl 0:2cc6bb4d7fea 242 {
mbotkinl 0:2cc6bb4d7fea 243 struct
mbotkinl 0:2cc6bb4d7fea 244 {
mbotkinl 0:2cc6bb4d7fea 245 uint32_t _reserved0:16; /*!< bit: 0..15 Reserved */
mbotkinl 0:2cc6bb4d7fea 246 uint32_t GE:4; /*!< bit: 16..19 Greater than or Equal flags */
mbotkinl 0:2cc6bb4d7fea 247 uint32_t reserved1:7; /*!< bit: 20..23 Reserved */
mbotkinl 0:2cc6bb4d7fea 248 uint32_t Q:1; /*!< bit: 27 Saturation condition flag */
mbotkinl 0:2cc6bb4d7fea 249 uint32_t V:1; /*!< bit: 28 Overflow condition code flag */
mbotkinl 0:2cc6bb4d7fea 250 uint32_t C:1; /*!< bit: 29 Carry condition code flag */
mbotkinl 0:2cc6bb4d7fea 251 uint32_t Z:1; /*!< bit: 30 Zero condition code flag */
mbotkinl 0:2cc6bb4d7fea 252 uint32_t N:1; /*!< bit: 31 Negative condition code flag */
mbotkinl 0:2cc6bb4d7fea 253 } b; /*!< Structure used for bit access */
mbotkinl 0:2cc6bb4d7fea 254 uint32_t w; /*!< Type used for word access */
mbotkinl 0:2cc6bb4d7fea 255 } APSR_Type;
mbotkinl 0:2cc6bb4d7fea 256
mbotkinl 0:2cc6bb4d7fea 257
mbotkinl 0:2cc6bb4d7fea 258 /*@} end of group CMSIS_CORE */
mbotkinl 0:2cc6bb4d7fea 259
mbotkinl 0:2cc6bb4d7fea 260 /*@} end of CMSIS_Core_FPUFunctions */
mbotkinl 0:2cc6bb4d7fea 261
mbotkinl 0:2cc6bb4d7fea 262
mbotkinl 0:2cc6bb4d7fea 263 #endif /* __CORE_CA9_H_GENERIC */
mbotkinl 0:2cc6bb4d7fea 264
mbotkinl 0:2cc6bb4d7fea 265 #endif /* __CMSIS_GENERIC */
mbotkinl 0:2cc6bb4d7fea 266
mbotkinl 0:2cc6bb4d7fea 267 #ifdef __cplusplus
mbotkinl 0:2cc6bb4d7fea 268 }
mbotkinl 0:2cc6bb4d7fea 269
mbotkinl 0:2cc6bb4d7fea 270
mbotkinl 0:2cc6bb4d7fea 271 #endif