Diff: TARGET_NUCLEO_L486RG/TARGET_STM/gpio_object.h

Revision:

138:093f2bd7b9eb

Parent:

135:176b8275d35d

diff -r e1686b8d5b90 -r 093f2bd7b9eb TARGET_NUCLEO_L486RG/TARGET_STM/gpio_object.h
--- a/TARGET_NUCLEO_L486RG/TARGET_STM/gpio_object.h	Tue Feb 28 16:44:21 2017 +0000
+++ b/TARGET_NUCLEO_L486RG/TARGET_STM/gpio_object.h	Tue Mar 14 16:20:51 2017 +0000
@@ -43,19 +43,20 @@
 /*
  * Note: reg_clr might actually be same as reg_set.
  * Depends on family whether BRR is available on top of BSRR
- * if BRR does not exist, family shall define GPIO_DOES_NOT_HAVE_BRR
+ * if BRR does not exist, family shall define GPIO_IP_WITHOUT_BRR
  */
 typedef struct {
-    PinName  pin;
     uint32_t mask;
     __IO uint32_t *reg_in;
     __IO uint32_t *reg_set;
     __IO uint32_t *reg_clr;
+    PinName  pin;
+    GPIO_TypeDef *gpio;
+    uint32_t ll_pin;
 } gpio_t;
 
 static inline void gpio_write(gpio_t *obj, int value)
 {
-    MBED_ASSERT(obj->pin != (PinName)NC);
     if (value) {
         *obj->reg_set = obj->mask;
     } else {
@@ -69,7 +70,6 @@
 
 static inline int gpio_read(gpio_t *obj)
 {
-    MBED_ASSERT(obj->pin != (PinName)NC);
     return ((*obj->reg_in & obj->mask) ? 1 : 0);
 }
 
@@ -78,6 +78,7 @@
     return obj->pin != (PinName)NC;
 }
 
+
 #ifdef __cplusplus
 }
 #endif