mbed official / mbed

Important changes to repositories hosted on mbed.com

Mbed hosted mercurial repositories are deprecated and are due to be permanently deleted in July 2026.

To keep a copy of this software download the repository Zip archive or clone locally using Mercurial.

It is also possible to export all your personal repositories from the account settings page.

Dependents:   hello SerialTestv11 SerialTestv12 Sierpinski ... more

TARGET_NUCLEO_F303K8/TARGET_STM/TARGET_STM32F3/device/stm32f3xx_hal_sram.h@156:ff21514d8981, 2017-11-08 (annotated)

Committer:
AnnaBridge
Date:
Wed Nov 08 17:18:06 2017 +0000
Revision:
156:ff21514d8981
Child:
168:b9e159c1930a
Reverting back to release 154 of the mbed library

Who changed what in which revision?

UserRevisionLine numberNew contents of line
AnnaBridge 156:ff21514d8981 1 /**
AnnaBridge 156:ff21514d8981 2 ******************************************************************************
AnnaBridge 156:ff21514d8981 3 * @file stm32f3xx_hal_sram.h
AnnaBridge 156:ff21514d8981 4 * @author MCD Application Team
AnnaBridge 156:ff21514d8981 5 * @version V1.4.0
AnnaBridge 156:ff21514d8981 6 * @date 16-December-2016
AnnaBridge 156:ff21514d8981 7 * @brief Header file of SRAM HAL module.
AnnaBridge 156:ff21514d8981 8 ******************************************************************************
AnnaBridge 156:ff21514d8981 9 * @attention
AnnaBridge 156:ff21514d8981 10 *
AnnaBridge 156:ff21514d8981 11 * <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
AnnaBridge 156:ff21514d8981 12 *
AnnaBridge 156:ff21514d8981 13 * Redistribution and use in source and binary forms, with or without modification,
AnnaBridge 156:ff21514d8981 14 * are permitted provided that the following conditions are met:
AnnaBridge 156:ff21514d8981 15 * 1. Redistributions of source code must retain the above copyright notice,
AnnaBridge 156:ff21514d8981 16 * this list of conditions and the following disclaimer.
AnnaBridge 156:ff21514d8981 17 * 2. Redistributions in binary form must reproduce the above copyright notice,
AnnaBridge 156:ff21514d8981 18 * this list of conditions and the following disclaimer in the documentation
AnnaBridge 156:ff21514d8981 19 * and/or other materials provided with the distribution.
AnnaBridge 156:ff21514d8981 20 * 3. Neither the name of STMicroelectronics nor the names of its contributors
AnnaBridge 156:ff21514d8981 21 * may be used to endorse or promote products derived from this software
AnnaBridge 156:ff21514d8981 22 * without specific prior written permission.
AnnaBridge 156:ff21514d8981 23 *
AnnaBridge 156:ff21514d8981 24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
AnnaBridge 156:ff21514d8981 25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
AnnaBridge 156:ff21514d8981 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
AnnaBridge 156:ff21514d8981 27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
AnnaBridge 156:ff21514d8981 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
AnnaBridge 156:ff21514d8981 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
AnnaBridge 156:ff21514d8981 30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
AnnaBridge 156:ff21514d8981 31 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
AnnaBridge 156:ff21514d8981 32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
AnnaBridge 156:ff21514d8981 33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
AnnaBridge 156:ff21514d8981 34 *
AnnaBridge 156:ff21514d8981 35 ******************************************************************************
AnnaBridge 156:ff21514d8981 36 */
AnnaBridge 156:ff21514d8981 37
AnnaBridge 156:ff21514d8981 38 /* Define to prevent recursive inclusion -------------------------------------*/
AnnaBridge 156:ff21514d8981 39 #ifndef __STM32F3xx_HAL_SRAM_H
AnnaBridge 156:ff21514d8981 40 #define __STM32F3xx_HAL_SRAM_H
AnnaBridge 156:ff21514d8981 41
AnnaBridge 156:ff21514d8981 42 #ifdef __cplusplus
AnnaBridge 156:ff21514d8981 43 extern "C" {
AnnaBridge 156:ff21514d8981 44 #endif
AnnaBridge 156:ff21514d8981 45
AnnaBridge 156:ff21514d8981 46 /* Includes ------------------------------------------------------------------*/
AnnaBridge 156:ff21514d8981 47 #if defined(STM32F302xE) || defined(STM32F303xE) || defined(STM32F398xx)
AnnaBridge 156:ff21514d8981 48 #include "stm32f3xx_ll_fmc.h"
AnnaBridge 156:ff21514d8981 49
AnnaBridge 156:ff21514d8981 50 /** @addtogroup STM32F3xx_HAL_Driver
AnnaBridge 156:ff21514d8981 51 * @{
AnnaBridge 156:ff21514d8981 52 */
AnnaBridge 156:ff21514d8981 53
AnnaBridge 156:ff21514d8981 54 /** @addtogroup SRAM
AnnaBridge 156:ff21514d8981 55 * @{
AnnaBridge 156:ff21514d8981 56 */
AnnaBridge 156:ff21514d8981 57
AnnaBridge 156:ff21514d8981 58 /* Exported typedef ----------------------------------------------------------*/
AnnaBridge 156:ff21514d8981 59
AnnaBridge 156:ff21514d8981 60 /** @defgroup SRAM_Exported_Types SRAM Exported Types
AnnaBridge 156:ff21514d8981 61 * @{
AnnaBridge 156:ff21514d8981 62 */
AnnaBridge 156:ff21514d8981 63 /**
AnnaBridge 156:ff21514d8981 64 * @brief HAL SRAM State structures definition
AnnaBridge 156:ff21514d8981 65 */
AnnaBridge 156:ff21514d8981 66 typedef enum
AnnaBridge 156:ff21514d8981 67 {
AnnaBridge 156:ff21514d8981 68 HAL_SRAM_STATE_RESET = 0x00U, /*!< SRAM not yet initialized or disabled */
AnnaBridge 156:ff21514d8981 69 HAL_SRAM_STATE_READY = 0x01U, /*!< SRAM initialized and ready for use */
AnnaBridge 156:ff21514d8981 70 HAL_SRAM_STATE_BUSY = 0x02U, /*!< SRAM internal process is ongoing */
AnnaBridge 156:ff21514d8981 71 HAL_SRAM_STATE_ERROR = 0x03U, /*!< SRAM error state */
AnnaBridge 156:ff21514d8981 72 HAL_SRAM_STATE_PROTECTED = 0x04 /*!< SRAM peripheral NORSRAM device write protected */
AnnaBridge 156:ff21514d8981 73
AnnaBridge 156:ff21514d8981 74 }HAL_SRAM_StateTypeDef;
AnnaBridge 156:ff21514d8981 75
AnnaBridge 156:ff21514d8981 76 /**
AnnaBridge 156:ff21514d8981 77 * @brief SRAM handle Structure definition
AnnaBridge 156:ff21514d8981 78 */
AnnaBridge 156:ff21514d8981 79 typedef struct
AnnaBridge 156:ff21514d8981 80 {
AnnaBridge 156:ff21514d8981 81 FMC_NORSRAM_TypeDef *Instance; /*!< Register base address */
AnnaBridge 156:ff21514d8981 82
AnnaBridge 156:ff21514d8981 83 FMC_NORSRAM_EXTENDED_TypeDef *Extended; /*!< Extended mode register base address */
AnnaBridge 156:ff21514d8981 84
AnnaBridge 156:ff21514d8981 85 FMC_NORSRAM_InitTypeDef Init; /*!< SRAM device control configuration parameters */
AnnaBridge 156:ff21514d8981 86
AnnaBridge 156:ff21514d8981 87 HAL_LockTypeDef Lock; /*!< SRAM locking object */
AnnaBridge 156:ff21514d8981 88
AnnaBridge 156:ff21514d8981 89 __IO HAL_SRAM_StateTypeDef State; /*!< SRAM device access state */
AnnaBridge 156:ff21514d8981 90
AnnaBridge 156:ff21514d8981 91 DMA_HandleTypeDef *hdma; /*!< Pointer DMA handler */
AnnaBridge 156:ff21514d8981 92
AnnaBridge 156:ff21514d8981 93 }SRAM_HandleTypeDef;
AnnaBridge 156:ff21514d8981 94
AnnaBridge 156:ff21514d8981 95 /**
AnnaBridge 156:ff21514d8981 96 * @}
AnnaBridge 156:ff21514d8981 97 */
AnnaBridge 156:ff21514d8981 98
AnnaBridge 156:ff21514d8981 99 /* Exported constants --------------------------------------------------------*/
AnnaBridge 156:ff21514d8981 100 /* Exported macro ------------------------------------------------------------*/
AnnaBridge 156:ff21514d8981 101
AnnaBridge 156:ff21514d8981 102 /** @defgroup SRAM_Exported_Macros SRAM Exported Macros
AnnaBridge 156:ff21514d8981 103 * @{
AnnaBridge 156:ff21514d8981 104 */
AnnaBridge 156:ff21514d8981 105
AnnaBridge 156:ff21514d8981 106 /** @brief Reset SRAM handle state
AnnaBridge 156:ff21514d8981 107 * @param __HANDLE__: SRAM handle
AnnaBridge 156:ff21514d8981 108 * @retval None
AnnaBridge 156:ff21514d8981 109 */
AnnaBridge 156:ff21514d8981 110 #define __HAL_SRAM_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_SRAM_STATE_RESET)
AnnaBridge 156:ff21514d8981 111
AnnaBridge 156:ff21514d8981 112 /**
AnnaBridge 156:ff21514d8981 113 * @}
AnnaBridge 156:ff21514d8981 114 */
AnnaBridge 156:ff21514d8981 115
AnnaBridge 156:ff21514d8981 116 /* Exported functions --------------------------------------------------------*/
AnnaBridge 156:ff21514d8981 117 /** @addtogroup SRAM_Exported_Functions SRAM Exported Functions
AnnaBridge 156:ff21514d8981 118 * @{
AnnaBridge 156:ff21514d8981 119 */
AnnaBridge 156:ff21514d8981 120
AnnaBridge 156:ff21514d8981 121 /** @addtogroup SRAM_Exported_Functions_Group1 Initialization and de-initialization functions
AnnaBridge 156:ff21514d8981 122 * @{
AnnaBridge 156:ff21514d8981 123 */
AnnaBridge 156:ff21514d8981 124
AnnaBridge 156:ff21514d8981 125 /* Initialization/de-initialization functions ********************************/
AnnaBridge 156:ff21514d8981 126 HAL_StatusTypeDef HAL_SRAM_Init(SRAM_HandleTypeDef *hsram, FMC_NORSRAM_TimingTypeDef *Timing, FMC_NORSRAM_TimingTypeDef *ExtTiming);
AnnaBridge 156:ff21514d8981 127 HAL_StatusTypeDef HAL_SRAM_DeInit(SRAM_HandleTypeDef *hsram);
AnnaBridge 156:ff21514d8981 128 void HAL_SRAM_MspInit(SRAM_HandleTypeDef *hsram);
AnnaBridge 156:ff21514d8981 129 void HAL_SRAM_MspDeInit(SRAM_HandleTypeDef *hsram);
AnnaBridge 156:ff21514d8981 130
AnnaBridge 156:ff21514d8981 131 void HAL_SRAM_DMA_XferCpltCallback(DMA_HandleTypeDef *hdma);
AnnaBridge 156:ff21514d8981 132 void HAL_SRAM_DMA_XferErrorCallback(DMA_HandleTypeDef *hdma);
AnnaBridge 156:ff21514d8981 133
AnnaBridge 156:ff21514d8981 134 /**
AnnaBridge 156:ff21514d8981 135 * @}
AnnaBridge 156:ff21514d8981 136 */
AnnaBridge 156:ff21514d8981 137
AnnaBridge 156:ff21514d8981 138 /** @addtogroup SRAM_Exported_Functions_Group2 Input Output and memory control functions
AnnaBridge 156:ff21514d8981 139 * @{
AnnaBridge 156:ff21514d8981 140 */
AnnaBridge 156:ff21514d8981 141
AnnaBridge 156:ff21514d8981 142 /* I/O operation functions ***************************************************/
AnnaBridge 156:ff21514d8981 143 HAL_StatusTypeDef HAL_SRAM_Read_8b(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint8_t *pDstBuffer, uint32_t BufferSize);
AnnaBridge 156:ff21514d8981 144 HAL_StatusTypeDef HAL_SRAM_Write_8b(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint8_t *pSrcBuffer, uint32_t BufferSize);
AnnaBridge 156:ff21514d8981 145 HAL_StatusTypeDef HAL_SRAM_Read_16b(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint16_t *pDstBuffer, uint32_t BufferSize);
AnnaBridge 156:ff21514d8981 146 HAL_StatusTypeDef HAL_SRAM_Write_16b(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint16_t *pSrcBuffer, uint32_t BufferSize);
AnnaBridge 156:ff21514d8981 147 HAL_StatusTypeDef HAL_SRAM_Read_32b(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint32_t *pDstBuffer, uint32_t BufferSize);
AnnaBridge 156:ff21514d8981 148 HAL_StatusTypeDef HAL_SRAM_Write_32b(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint32_t *pSrcBuffer, uint32_t BufferSize);
AnnaBridge 156:ff21514d8981 149 HAL_StatusTypeDef HAL_SRAM_Read_DMA(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint32_t *pDstBuffer, uint32_t BufferSize);
AnnaBridge 156:ff21514d8981 150 HAL_StatusTypeDef HAL_SRAM_Write_DMA(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint32_t *pSrcBuffer, uint32_t BufferSize);
AnnaBridge 156:ff21514d8981 151
AnnaBridge 156:ff21514d8981 152 /**
AnnaBridge 156:ff21514d8981 153 * @}
AnnaBridge 156:ff21514d8981 154 */
AnnaBridge 156:ff21514d8981 155
AnnaBridge 156:ff21514d8981 156 /** @addtogroup SRAM_Exported_Functions_Group3 Control functions
AnnaBridge 156:ff21514d8981 157 * @{
AnnaBridge 156:ff21514d8981 158 */
AnnaBridge 156:ff21514d8981 159
AnnaBridge 156:ff21514d8981 160 /* SRAM Control functions ****************************************************/
AnnaBridge 156:ff21514d8981 161 HAL_StatusTypeDef HAL_SRAM_WriteOperation_Enable(SRAM_HandleTypeDef *hsram);
AnnaBridge 156:ff21514d8981 162 HAL_StatusTypeDef HAL_SRAM_WriteOperation_Disable(SRAM_HandleTypeDef *hsram);
AnnaBridge 156:ff21514d8981 163
AnnaBridge 156:ff21514d8981 164 /**
AnnaBridge 156:ff21514d8981 165 * @}
AnnaBridge 156:ff21514d8981 166 */
AnnaBridge 156:ff21514d8981 167
AnnaBridge 156:ff21514d8981 168 /** @addtogroup SRAM_Exported_Functions_Group4 Peripheral State functions
AnnaBridge 156:ff21514d8981 169 * @{
AnnaBridge 156:ff21514d8981 170 */
AnnaBridge 156:ff21514d8981 171
AnnaBridge 156:ff21514d8981 172 /* SRAM Peripheral State functions ********************************************/
AnnaBridge 156:ff21514d8981 173 HAL_SRAM_StateTypeDef HAL_SRAM_GetState(SRAM_HandleTypeDef *hsram);
AnnaBridge 156:ff21514d8981 174
AnnaBridge 156:ff21514d8981 175 /**
AnnaBridge 156:ff21514d8981 176 * @}
AnnaBridge 156:ff21514d8981 177 */
AnnaBridge 156:ff21514d8981 178
AnnaBridge 156:ff21514d8981 179 /**
AnnaBridge 156:ff21514d8981 180 * @}
AnnaBridge 156:ff21514d8981 181 */
AnnaBridge 156:ff21514d8981 182
AnnaBridge 156:ff21514d8981 183 /**
AnnaBridge 156:ff21514d8981 184 * @}
AnnaBridge 156:ff21514d8981 185 */
AnnaBridge 156:ff21514d8981 186
AnnaBridge 156:ff21514d8981 187 /**
AnnaBridge 156:ff21514d8981 188 * @}
AnnaBridge 156:ff21514d8981 189 */
AnnaBridge 156:ff21514d8981 190
AnnaBridge 156:ff21514d8981 191 #endif /* STM32F302xE || STM32F303xE || STM32F398xx */
AnnaBridge 156:ff21514d8981 192
AnnaBridge 156:ff21514d8981 193 #ifdef __cplusplus
AnnaBridge 156:ff21514d8981 194 }
AnnaBridge 156:ff21514d8981 195 #endif
AnnaBridge 156:ff21514d8981 196
AnnaBridge 156:ff21514d8981 197 #endif /* __STM32F3xx_HAL_SRAM_H */
AnnaBridge 156:ff21514d8981 198
AnnaBridge 156:ff21514d8981 199 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/