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Dependents:   hello SerialTestv11 SerialTestv12 Sierpinski ... more

TARGET_NUCLEO_F042K6/stm32f0xx_hal_dma_ex.h@122:f9eeca106725, 2016-07-07 (annotated)

Committer:
Kojto
Date:
Thu Jul 07 14:34:11 2016 +0100
Revision:
122:f9eeca106725
Parent:
109:9296ab0bfc11 
Release 122 of the mbed library



Changes:

- new targets - Nucleo L432KC, Beetle, Nucleo F446ZE, Nucleo L011K4

- Thread safety addition - mbed API should contain a statement about thread safety

- critical section API addition

- CAS API (core_util_atomic_incr/decr)

- DEVICE_ are generated from targets.json file, device.h deprecated

- Callback replaces FunctionPointer to provide std like interface

- mbed HAL API docs improvements

- toolchain - prexif attributes with MBED_

            - add new attributes - packed, weak, forcedinline, align

- target.json - contains targets definitions

- ST - L1XX - Cube update to 1.5

     - SPI clock selection fix (clock from APB domain)

     - F7 - Cube update v1.4.0

     - L0 -  baudrate init fix

     - L1 - Cube update v1.5

     - F3 - baudrate init fix, 3 targets CAN support

     - F4 - Cube update v1.12.0, 3 targets CAN support

     - L4XX - Cube update v1.5.1

     - F0 - update Cube to v1.5.0

     - L4 - 2 targets (L476RG/VG) CAN support

- NXP - pwm clock fix for KSDK2 MCU

      - LPC2368 - remove ARM toolchain support - due to regression

      - KSDK2 - fix SPI , I2C address and repeat start

- Silabs - some fixes backported from mbed 3

- Renesas - RZ_A1H - SystemCoreClockUpdate addition

Who changed what in which revision?

UserRevisionLine numberNew contents of line
Kojto 109:9296ab0bfc11 1 /**
Kojto 109:9296ab0bfc11 2 ******************************************************************************
Kojto 109:9296ab0bfc11 3 * @file stm32f0xx_hal_dma_ex.h
Kojto 109:9296ab0bfc11 4 * @author MCD Application Team
Kojto 122:f9eeca106725 5 * @version V1.4.0
Kojto 122:f9eeca106725 6 * @date 27-May-2016
Kojto 109:9296ab0bfc11 7 * @brief Header file of DMA HAL Extension module.
Kojto 109:9296ab0bfc11 8 ******************************************************************************
Kojto 109:9296ab0bfc11 9 * @attention
Kojto 109:9296ab0bfc11 10 *
Kojto 122:f9eeca106725 11 * <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
Kojto 109:9296ab0bfc11 12 *
Kojto 109:9296ab0bfc11 13 * Redistribution and use in source and binary forms, with or without modification,
Kojto 109:9296ab0bfc11 14 * are permitted provided that the following conditions are met:
Kojto 109:9296ab0bfc11 15 * 1. Redistributions of source code must retain the above copyright notice,
Kojto 109:9296ab0bfc11 16 * this list of conditions and the following disclaimer.
Kojto 109:9296ab0bfc11 17 * 2. Redistributions in binary form must reproduce the above copyright notice,
Kojto 109:9296ab0bfc11 18 * this list of conditions and the following disclaimer in the documentation
Kojto 109:9296ab0bfc11 19 * and/or other materials provided with the distribution.
Kojto 109:9296ab0bfc11 20 * 3. Neither the name of STMicroelectronics nor the names of its contributors
Kojto 109:9296ab0bfc11 21 * may be used to endorse or promote products derived from this software
Kojto 109:9296ab0bfc11 22 * without specific prior written permission.
Kojto 109:9296ab0bfc11 23 *
Kojto 109:9296ab0bfc11 24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
Kojto 109:9296ab0bfc11 25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
Kojto 109:9296ab0bfc11 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
Kojto 109:9296ab0bfc11 27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
Kojto 109:9296ab0bfc11 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
Kojto 109:9296ab0bfc11 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
Kojto 109:9296ab0bfc11 30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
Kojto 109:9296ab0bfc11 31 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
Kojto 109:9296ab0bfc11 32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
Kojto 109:9296ab0bfc11 33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
Kojto 109:9296ab0bfc11 34 *
Kojto 109:9296ab0bfc11 35 ******************************************************************************
Kojto 109:9296ab0bfc11 36 */
Kojto 109:9296ab0bfc11 37
Kojto 109:9296ab0bfc11 38 /* Define to prevent recursive inclusion -------------------------------------*/
Kojto 109:9296ab0bfc11 39 #ifndef __STM32F0xx_HAL_DMA_EX_H
Kojto 109:9296ab0bfc11 40 #define __STM32F0xx_HAL_DMA_EX_H
Kojto 109:9296ab0bfc11 41
Kojto 109:9296ab0bfc11 42 #ifdef __cplusplus
Kojto 109:9296ab0bfc11 43 extern "C" {
Kojto 109:9296ab0bfc11 44 #endif
Kojto 109:9296ab0bfc11 45
Kojto 109:9296ab0bfc11 46 /* Includes ------------------------------------------------------------------*/
Kojto 109:9296ab0bfc11 47 #include "stm32f0xx_hal_def.h"
Kojto 109:9296ab0bfc11 48
Kojto 109:9296ab0bfc11 49 /** @addtogroup STM32F0xx_HAL_Driver
Kojto 109:9296ab0bfc11 50 * @{
Kojto 109:9296ab0bfc11 51 */
Kojto 109:9296ab0bfc11 52
Kojto 109:9296ab0bfc11 53 /** @defgroup DMAEx DMAEx
Kojto 109:9296ab0bfc11 54 * @brief DMA HAL module driver
Kojto 109:9296ab0bfc11 55 * @{
Kojto 109:9296ab0bfc11 56 */
Kojto 109:9296ab0bfc11 57
Kojto 109:9296ab0bfc11 58 /* Exported types ------------------------------------------------------------*/
Kojto 109:9296ab0bfc11 59 /* Exported constants --------------------------------------------------------*/
Kojto 109:9296ab0bfc11 60 #if defined(STM32F091xC) || defined(STM32F098xx) || defined(STM32F030xC)
Kojto 109:9296ab0bfc11 61 /** @defgroup DMAEx_Exported_Constants DMAEx Exported Constants
Kojto 109:9296ab0bfc11 62 * @{
Kojto 109:9296ab0bfc11 63 */
Kojto 109:9296ab0bfc11 64 #define DMA1_CHANNEL1_RMP 0x00000000 /*!< Internal define for remaping on STM32F09x/30xC */
Kojto 109:9296ab0bfc11 65 #define DMA1_CHANNEL2_RMP 0x10000000 /*!< Internal define for remaping on STM32F09x/30xC */
Kojto 109:9296ab0bfc11 66 #define DMA1_CHANNEL3_RMP 0x20000000 /*!< Internal define for remaping on STM32F09x/30xC */
Kojto 109:9296ab0bfc11 67 #define DMA1_CHANNEL4_RMP 0x30000000 /*!< Internal define for remaping on STM32F09x/30xC */
Kojto 109:9296ab0bfc11 68 #define DMA1_CHANNEL5_RMP 0x40000000 /*!< Internal define for remaping on STM32F09x/30xC */
Kojto 109:9296ab0bfc11 69 #if !defined(STM32F030xC)
Kojto 109:9296ab0bfc11 70 #define DMA1_CHANNEL6_RMP 0x50000000 /*!< Internal define for remaping on STM32F09x/30xC */
Kojto 109:9296ab0bfc11 71 #define DMA1_CHANNEL7_RMP 0x60000000 /*!< Internal define for remaping on STM32F09x/30xC */
Kojto 109:9296ab0bfc11 72 #define DMA2_CHANNEL1_RMP 0x00000000 /*!< Internal define for remaping on STM32F09x/30xC */
Kojto 109:9296ab0bfc11 73 #define DMA2_CHANNEL2_RMP 0x10000000 /*!< Internal define for remaping on STM32F09x/30xC */
Kojto 109:9296ab0bfc11 74 #define DMA2_CHANNEL3_RMP 0x20000000 /*!< Internal define for remaping on STM32F09x/30xC */
Kojto 109:9296ab0bfc11 75 #define DMA2_CHANNEL4_RMP 0x30000000 /*!< Internal define for remaping on STM32F09x/30xC */
Kojto 109:9296ab0bfc11 76 #define DMA2_CHANNEL5_RMP 0x40000000 /*!< Internal define for remaping on STM32F09x/30xC */
Kojto 109:9296ab0bfc11 77 #endif /* !defined(STM32F030xC) */
Kojto 109:9296ab0bfc11 78
Kojto 109:9296ab0bfc11 79 /****************** DMA1 remap bit field definition********************/
Kojto 109:9296ab0bfc11 80 /* DMA1 - Channel 1 */
Kojto 109:9296ab0bfc11 81 #define HAL_DMA1_CH1_DEFAULT (uint32_t) (DMA1_CHANNEL1_RMP | DMA1_CSELR_DEFAULT) /*!< Default remap position for DMA1 */
Kojto 109:9296ab0bfc11 82 #define HAL_DMA1_CH1_ADC (uint32_t) (DMA1_CHANNEL1_RMP | DMA1_CSELR_CH1_ADC) /*!< Remap ADC on DMA1 Channel 1*/
Kojto 109:9296ab0bfc11 83 #define HAL_DMA1_CH1_TIM17_CH1 (uint32_t) (DMA1_CHANNEL1_RMP | DMA1_CSELR_CH1_TIM17_CH1) /*!< Remap TIM17 channel 1 on DMA1 channel 1 */
Kojto 109:9296ab0bfc11 84 #define HAL_DMA1_CH1_TIM17_UP (uint32_t) (DMA1_CHANNEL1_RMP | DMA1_CSELR_CH1_TIM17_UP) /*!< Remap TIM17 up on DMA1 channel 1 */
Kojto 109:9296ab0bfc11 85 #define HAL_DMA1_CH1_USART1_RX (uint32_t) (DMA1_CHANNEL1_RMP | DMA1_CSELR_CH1_USART1_RX) /*!< Remap USART1 Rx on DMA1 channel 1 */
Kojto 109:9296ab0bfc11 86 #define HAL_DMA1_CH1_USART2_RX (uint32_t) (DMA1_CHANNEL1_RMP | DMA1_CSELR_CH1_USART2_RX) /*!< Remap USART2 Rx on DMA1 channel 1 */
Kojto 109:9296ab0bfc11 87 #define HAL_DMA1_CH1_USART3_RX (uint32_t) (DMA1_CHANNEL1_RMP | DMA1_CSELR_CH1_USART3_RX) /*!< Remap USART3 Rx on DMA1 channel 1 */
Kojto 109:9296ab0bfc11 88 #define HAL_DMA1_CH1_USART4_RX (uint32_t) (DMA1_CHANNEL1_RMP | DMA1_CSELR_CH1_USART4_RX) /*!< Remap USART4 Rx on DMA1 channel 1 */
Kojto 109:9296ab0bfc11 89 #define HAL_DMA1_CH1_USART5_RX (uint32_t) (DMA1_CHANNEL1_RMP | DMA1_CSELR_CH1_USART5_RX) /*!< Remap USART5 Rx on DMA1 channel 1 */
Kojto 109:9296ab0bfc11 90 #define HAL_DMA1_CH1_USART6_RX (uint32_t) (DMA1_CHANNEL1_RMP | DMA1_CSELR_CH1_USART6_RX) /*!< Remap USART6 Rx on DMA1 channel 1 */
Kojto 109:9296ab0bfc11 91 #if !defined(STM32F030xC)
Kojto 109:9296ab0bfc11 92 #define HAL_DMA1_CH1_USART7_RX (uint32_t) (DMA1_CHANNEL1_RMP | DMA1_CSELR_CH1_USART7_RX) /*!< Remap USART7 Rx on DMA1 channel 1 */
Kojto 109:9296ab0bfc11 93 #define HAL_DMA1_CH1_USART8_RX (uint32_t) (DMA1_CHANNEL1_RMP | DMA1_CSELR_CH1_USART8_RX) /*!< Remap USART8 Rx on DMA1 channel 1 */
Kojto 109:9296ab0bfc11 94 #endif /* !defined(STM32F030xC) */
Kojto 109:9296ab0bfc11 95
Kojto 109:9296ab0bfc11 96 /* DMA1 - Channel 2 */
Kojto 109:9296ab0bfc11 97 #define HAL_DMA1_CH2_DEFAULT (uint32_t) (DMA1_CHANNEL2_RMP | DMA1_CSELR_DEFAULT) /*!< Default remap position for DMA1 */
Kojto 109:9296ab0bfc11 98 #define HAL_DMA1_CH2_ADC (uint32_t) (DMA1_CHANNEL2_RMP | DMA1_CSELR_CH2_ADC) /*!< Remap ADC on DMA1 channel 2 */
Kojto 109:9296ab0bfc11 99 #define HAL_DMA1_CH2_I2C1_TX (uint32_t) (DMA1_CHANNEL2_RMP | DMA1_CSELR_CH2_I2C1_TX) /*!< Remap I2C1 Tx on DMA1 channel 2 */
Kojto 109:9296ab0bfc11 100 #define HAL_DMA1_CH2_SPI1_RX (uint32_t) (DMA1_CHANNEL2_RMP | DMA1_CSELR_CH2_SPI1_RX) /*!< Remap SPI1 Rx on DMA1 channel 2 */
Kojto 109:9296ab0bfc11 101 #define HAL_DMA1_CH2_TIM1_CH1 (uint32_t) (DMA1_CHANNEL2_RMP | DMA1_CSELR_CH2_TIM1_CH1) /*!< Remap TIM1 channel 1 on DMA1 channel 2 */
Kojto 109:9296ab0bfc11 102 #define HAL_DMA1_CH2_TIM17_CH1 (uint32_t) (DMA1_CHANNEL2_RMP | DMA1_CSELR_CH2_TIM17_CH1) /*!< Remap TIM17 channel 1 on DMA1 channel 2 */
Kojto 109:9296ab0bfc11 103 #define HAL_DMA1_CH2_TIM17_UP (uint32_t) (DMA1_CHANNEL2_RMP | DMA1_CSELR_CH2_TIM17_UP) /*!< Remap TIM17 up on DMA1 channel 2 */
Kojto 109:9296ab0bfc11 104 #define HAL_DMA1_CH2_USART1_TX (uint32_t) (DMA1_CHANNEL2_RMP | DMA1_CSELR_CH2_USART1_TX) /*!< Remap USART1 Tx on DMA1 channel 2 */
Kojto 109:9296ab0bfc11 105 #define HAL_DMA1_CH2_USART2_TX (uint32_t) (DMA1_CHANNEL2_RMP | DMA1_CSELR_CH2_USART2_TX) /*!< Remap USART2 Tx on DMA1 channel 2 */
Kojto 109:9296ab0bfc11 106 #define HAL_DMA1_CH2_USART3_TX (uint32_t) (DMA1_CHANNEL2_RMP | DMA1_CSELR_CH2_USART3_TX) /*!< Remap USART3 Tx on DMA1 channel 2 */
Kojto 109:9296ab0bfc11 107 #define HAL_DMA1_CH2_USART4_TX (uint32_t) (DMA1_CHANNEL2_RMP | DMA1_CSELR_CH2_USART4_TX) /*!< Remap USART4 Tx on DMA1 channel 2 */
Kojto 109:9296ab0bfc11 108 #define HAL_DMA1_CH2_USART5_TX (uint32_t) (DMA1_CHANNEL2_RMP | DMA1_CSELR_CH2_USART5_TX) /*!< Remap USART5 Tx on DMA1 channel 2 */
Kojto 109:9296ab0bfc11 109 #define HAL_DMA1_CH2_USART6_TX (uint32_t) (DMA1_CHANNEL2_RMP | DMA1_CSELR_CH2_USART6_TX) /*!< Remap USART6 Tx on DMA1 channel 2 */
Kojto 109:9296ab0bfc11 110 #if !defined(STM32F030xC)
Kojto 109:9296ab0bfc11 111 #define HAL_DMA1_CH2_USART7_TX (uint32_t) (DMA1_CHANNEL2_RMP | DMA1_CSELR_CH2_USART7_TX) /*!< Remap USART7 Tx on DMA1 channel 2 */
Kojto 109:9296ab0bfc11 112 #define HAL_DMA1_CH2_USART8_TX (uint32_t) (DMA1_CHANNEL2_RMP | DMA1_CSELR_CH2_USART8_TX) /*!< Remap USART8 Tx on DMA1 channel 2 */
Kojto 109:9296ab0bfc11 113 #endif /* !defined(STM32F030xC) */
Kojto 109:9296ab0bfc11 114
Kojto 109:9296ab0bfc11 115 /* DMA1 - Channel 3 */
Kojto 109:9296ab0bfc11 116 #define HAL_DMA1_CH3_DEFAULT (uint32_t) (DMA1_CHANNEL3_RMP | DMA1_CSELR_DEFAULT) /*!< Default remap position for DMA1 */
Kojto 109:9296ab0bfc11 117 #define HAL_DMA1_CH3_TIM6_UP (uint32_t) (DMA1_CHANNEL3_RMP | DMA1_CSELR_CH3_TIM6_UP) /*!< Remap TIM6 up on DMA1 channel 3 */
Kojto 109:9296ab0bfc11 118 #if !defined(STM32F030xC)
Kojto 109:9296ab0bfc11 119 #define HAL_DMA1_CH3_DAC_CH1 (uint32_t) (DMA1_CHANNEL3_RMP | DMA1_CSELR_CH3_DAC_CH1) /*!< Remap DAC Channel 1on DMA1 channel 3 */
Kojto 109:9296ab0bfc11 120 #endif /* !defined(STM32F030xC) */
Kojto 109:9296ab0bfc11 121 #define HAL_DMA1_CH3_I2C1_RX (uint32_t) (DMA1_CHANNEL3_RMP | DMA1_CSELR_CH3_I2C1_RX) /*!< Remap I2C1 Rx on DMA1 channel 3 */
Kojto 109:9296ab0bfc11 122 #define HAL_DMA1_CH3_SPI1_TX (uint32_t) (DMA1_CHANNEL3_RMP | DMA1_CSELR_CH3_SPI1_TX) /*!< Remap SPI1 Tx on DMA1 channel 3 */
Kojto 109:9296ab0bfc11 123 #define HAL_DMA1_CH3_TIM1_CH2 (uint32_t) (DMA1_CHANNEL3_RMP | DMA1_CSELR_CH3_TIM1_CH2) /*!< Remap TIM1 channel 2 on DMA1 channel 3 */
Kojto 109:9296ab0bfc11 124 #if !defined(STM32F030xC)
Kojto 109:9296ab0bfc11 125 #define HAL_DMA1_CH3_TIM2_CH2 (uint32_t) (DMA1_CHANNEL3_RMP | DMA1_CSELR_CH3_TIM2_CH2) /*!< Remap TIM2 channel 2 on DMA1 channel 3 */
Kojto 109:9296ab0bfc11 126 #endif /* !defined(STM32F030xC) */
Kojto 109:9296ab0bfc11 127 #define HAL_DMA1_CH3_TIM16_CH1 (uint32_t) (DMA1_CHANNEL3_RMP | DMA1_CSELR_CH3_TIM16_CH1) /*!< Remap TIM16 channel 1 on DMA1 channel 3 */
Kojto 109:9296ab0bfc11 128 #define HAL_DMA1_CH3_TIM16_UP (uint32_t) (DMA1_CHANNEL3_RMP | DMA1_CSELR_CH3_TIM16_UP) /*!< Remap TIM16 up on DMA1 channel 3 */
Kojto 109:9296ab0bfc11 129 #define HAL_DMA1_CH3_USART1_RX (uint32_t) (DMA1_CHANNEL3_RMP | DMA1_CSELR_CH3_USART1_RX) /*!< Remap USART1 Rx on DMA1 channel 3 */
Kojto 109:9296ab0bfc11 130 #define HAL_DMA1_CH3_USART2_RX (uint32_t) (DMA1_CHANNEL3_RMP | DMA1_CSELR_CH3_USART2_RX) /*!< Remap USART2 Rx on DMA1 channel 3 */
Kojto 109:9296ab0bfc11 131 #define HAL_DMA1_CH3_USART3_RX (uint32_t) (DMA1_CHANNEL3_RMP | DMA1_CSELR_CH3_USART3_RX) /*!< Remap USART3 Rx on DMA1 channel 3 */
Kojto 109:9296ab0bfc11 132 #define HAL_DMA1_CH3_USART4_RX (uint32_t) (DMA1_CHANNEL3_RMP | DMA1_CSELR_CH3_USART4_RX) /*!< Remap USART4 Rx on DMA1 channel 3 */
Kojto 109:9296ab0bfc11 133 #define HAL_DMA1_CH3_USART5_RX (uint32_t) (DMA1_CHANNEL3_RMP | DMA1_CSELR_CH3_USART5_RX) /*!< Remap USART5 Rx on DMA1 channel 3 */
Kojto 109:9296ab0bfc11 134 #define HAL_DMA1_CH3_USART6_RX (uint32_t) (DMA1_CHANNEL3_RMP | DMA1_CSELR_CH3_USART6_RX) /*!< Remap USART6 Rx on DMA1 channel 3 */
Kojto 109:9296ab0bfc11 135 #if !defined(STM32F030xC)
Kojto 109:9296ab0bfc11 136 #define HAL_DMA1_CH3_USART7_RX (uint32_t) (DMA1_CHANNEL3_RMP | DMA1_CSELR_CH3_USART7_RX) /*!< Remap USART7 Rx on DMA1 channel 3 */
Kojto 109:9296ab0bfc11 137 #define HAL_DMA1_CH3_USART8_RX (uint32_t) (DMA1_CHANNEL3_RMP | DMA1_CSELR_CH3_USART8_RX) /*!< Remap USART8 Rx on DMA1 channel 3 */
Kojto 109:9296ab0bfc11 138 #endif /* !defined(STM32F030xC) */
Kojto 109:9296ab0bfc11 139
Kojto 109:9296ab0bfc11 140 /* DMA1 - Channel 4 */
Kojto 109:9296ab0bfc11 141 #define HAL_DMA1_CH4_DEFAULT (uint32_t) (DMA1_CHANNEL4_RMP | DMA1_CSELR_DEFAULT) /*!< Default remap position for DMA1 */
Kojto 109:9296ab0bfc11 142 #define HAL_DMA1_CH4_TIM7_UP (uint32_t) (DMA1_CHANNEL4_RMP | DMA1_CSELR_CH4_TIM7_UP) /*!< Remap TIM7 up on DMA1 channel 4 */
Kojto 109:9296ab0bfc11 143 #if !defined(STM32F030xC)
Kojto 109:9296ab0bfc11 144 #define HAL_DMA1_CH4_DAC_CH2 (uint32_t) (DMA1_CHANNEL4_RMP | DMA1_CSELR_CH4_DAC_CH2) /*!< Remap DAC Channel 2 on DMA1 channel 4 */
Kojto 109:9296ab0bfc11 145 #endif /* !defined(STM32F030xC) */
Kojto 109:9296ab0bfc11 146 #define HAL_DMA1_CH4_I2C2_TX (uint32_t) (DMA1_CHANNEL4_RMP | DMA1_CSELR_CH4_I2C2_TX) /*!< Remap I2C2 Tx on DMA1 channel 4 */
Kojto 109:9296ab0bfc11 147 #define HAL_DMA1_CH4_SPI2_RX (uint32_t) (DMA1_CHANNEL4_RMP | DMA1_CSELR_CH4_SPI2_RX) /*!< Remap SPI2 Rx on DMA1 channel 4 */
Kojto 109:9296ab0bfc11 148 #if !defined(STM32F030xC)
Kojto 109:9296ab0bfc11 149 #define HAL_DMA1_CH4_TIM2_CH4 (uint32_t) (DMA1_CHANNEL4_RMP | DMA1_CSELR_CH4_TIM2_CH4) /*!< Remap TIM2 channel 4 on DMA1 channel 4 */
Kojto 109:9296ab0bfc11 150 #endif /* !defined(STM32F030xC) */
Kojto 109:9296ab0bfc11 151 #define HAL_DMA1_CH4_TIM3_CH1 (uint32_t) (DMA1_CHANNEL4_RMP | DMA1_CSELR_CH4_TIM3_CH1) /*!< Remap TIM3 channel 1 on DMA1 channel 4 */
Kojto 109:9296ab0bfc11 152 #define HAL_DMA1_CH4_TIM3_TRIG (uint32_t) (DMA1_CHANNEL4_RMP | DMA1_CSELR_CH4_TIM3_TRIG) /*!< Remap TIM3 Trig on DMA1 channel 4 */
Kojto 109:9296ab0bfc11 153 #define HAL_DMA1_CH4_TIM16_CH1 (uint32_t) (DMA1_CHANNEL4_RMP | DMA1_CSELR_CH4_TIM16_CH1) /*!< Remap TIM16 channel 1 on DMA1 channel 4 */
Kojto 109:9296ab0bfc11 154 #define HAL_DMA1_CH4_TIM16_UP (uint32_t) (DMA1_CHANNEL4_RMP | DMA1_CSELR_CH4_TIM16_UP) /*!< Remap TIM16 up on DMA1 channel 4 */
Kojto 109:9296ab0bfc11 155 #define HAL_DMA1_CH4_USART1_TX (uint32_t) (DMA1_CHANNEL4_RMP | DMA1_CSELR_CH4_USART1_TX) /*!< Remap USART1 Tx on DMA1 channel 4 */
Kojto 109:9296ab0bfc11 156 #define HAL_DMA1_CH4_USART2_TX (uint32_t) (DMA1_CHANNEL4_RMP | DMA1_CSELR_CH4_USART2_TX) /*!< Remap USART2 Tx on DMA1 channel 4 */
Kojto 109:9296ab0bfc11 157 #define HAL_DMA1_CH4_USART3_TX (uint32_t) (DMA1_CHANNEL4_RMP | DMA1_CSELR_CH4_USART3_TX) /*!< Remap USART3 Tx on DMA1 channel 4 */
Kojto 109:9296ab0bfc11 158 #define HAL_DMA1_CH4_USART4_TX (uint32_t) (DMA1_CHANNEL4_RMP | DMA1_CSELR_CH4_USART4_TX) /*!< Remap USART4 Tx on DMA1 channel 4 */
Kojto 109:9296ab0bfc11 159 #define HAL_DMA1_CH4_USART5_TX (uint32_t) (DMA1_CHANNEL4_RMP | DMA1_CSELR_CH4_USART5_TX) /*!< Remap USART5 Tx on DMA1 channel 4 */
Kojto 109:9296ab0bfc11 160 #define HAL_DMA1_CH4_USART6_TX (uint32_t) (DMA1_CHANNEL4_RMP | DMA1_CSELR_CH4_USART6_TX) /*!< Remap USART6 Tx on DMA1 channel 4 */
Kojto 109:9296ab0bfc11 161 #if !defined(STM32F030xC)
Kojto 109:9296ab0bfc11 162 #define HAL_DMA1_CH4_USART7_TX (uint32_t) (DMA1_CHANNEL4_RMP | DMA1_CSELR_CH4_USART7_TX) /*!< Remap USART7 Tx on DMA1 channel 4 */
Kojto 109:9296ab0bfc11 163 #define HAL_DMA1_CH4_USART8_TX (uint32_t) (DMA1_CHANNEL4_RMP | DMA1_CSELR_CH4_USART8_TX) /*!< Remap USART8 Tx on DMA1 channel 4 */
Kojto 109:9296ab0bfc11 164 #endif /* !defined(STM32F030xC) */
Kojto 109:9296ab0bfc11 165
Kojto 109:9296ab0bfc11 166 /* DMA1 - Channel 5 */
Kojto 109:9296ab0bfc11 167 #define HAL_DMA1_CH5_DEFAULT (uint32_t) (DMA1_CHANNEL5_RMP | DMA1_CSELR_DEFAULT) /*!< Default remap position for DMA1 */
Kojto 109:9296ab0bfc11 168 #define HAL_DMA1_CH5_I2C2_RX (uint32_t) (DMA1_CHANNEL5_RMP | DMA1_CSELR_CH5_I2C2_RX) /*!< Remap I2C2 Rx on DMA1 channel 5 */
Kojto 109:9296ab0bfc11 169 #define HAL_DMA1_CH5_SPI2_TX (uint32_t) (DMA1_CHANNEL5_RMP | DMA1_CSELR_CH5_SPI2_TX) /*!< Remap SPI1 Tx on DMA1 channel 5 */
Kojto 109:9296ab0bfc11 170 #define HAL_DMA1_CH5_TIM1_CH3 (uint32_t) (DMA1_CHANNEL5_RMP | DMA1_CSELR_CH5_TIM1_CH3) /*!< Remap TIM1 channel 3 on DMA1 channel 5 */
Kojto 109:9296ab0bfc11 171 #define HAL_DMA1_CH5_USART1_RX (uint32_t) (DMA1_CHANNEL5_RMP | DMA1_CSELR_CH5_USART1_RX) /*!< Remap USART1 Rx on DMA1 channel 5 */
Kojto 109:9296ab0bfc11 172 #define HAL_DMA1_CH5_USART2_RX (uint32_t) (DMA1_CHANNEL5_RMP | DMA1_CSELR_CH5_USART2_RX) /*!< Remap USART2 Rx on DMA1 channel 5 */
Kojto 109:9296ab0bfc11 173 #define HAL_DMA1_CH5_USART3_RX (uint32_t) (DMA1_CHANNEL5_RMP | DMA1_CSELR_CH5_USART3_RX) /*!< Remap USART3 Rx on DMA1 channel 5 */
Kojto 109:9296ab0bfc11 174 #define HAL_DMA1_CH5_USART4_RX (uint32_t) (DMA1_CHANNEL5_RMP | DMA1_CSELR_CH5_USART4_RX) /*!< Remap USART4 Rx on DMA1 channel 5 */
Kojto 109:9296ab0bfc11 175 #define HAL_DMA1_CH5_USART5_RX (uint32_t) (DMA1_CHANNEL5_RMP | DMA1_CSELR_CH5_USART5_RX) /*!< Remap USART5 Rx on DMA1 channel 5 */
Kojto 109:9296ab0bfc11 176 #define HAL_DMA1_CH5_USART6_RX (uint32_t) (DMA1_CHANNEL5_RMP | DMA1_CSELR_CH5_USART6_RX) /*!< Remap USART6 Rx on DMA1 channel 5 */
Kojto 109:9296ab0bfc11 177 #if !defined(STM32F030xC)
Kojto 109:9296ab0bfc11 178 #define HAL_DMA1_CH5_USART7_RX (uint32_t) (DMA1_CHANNEL5_RMP | DMA1_CSELR_CH5_USART7_RX) /*!< Remap USART7 Rx on DMA1 channel 5 */
Kojto 109:9296ab0bfc11 179 #define HAL_DMA1_CH5_USART8_RX (uint32_t) (DMA1_CHANNEL5_RMP | DMA1_CSELR_CH5_USART8_RX) /*!< Remap USART8 Rx on DMA1 channel 5 */
Kojto 109:9296ab0bfc11 180 #endif /* !defined(STM32F030xC) */
Kojto 109:9296ab0bfc11 181
Kojto 109:9296ab0bfc11 182 #if !defined(STM32F030xC)
Kojto 109:9296ab0bfc11 183 /* DMA1 - Channel 6 */
Kojto 109:9296ab0bfc11 184 #define HAL_DMA1_CH6_DEFAULT (uint32_t) (DMA1_CHANNEL6_RMP | DMA1_CSELR_DEFAULT) /*!< Default remap position for DMA1 */
Kojto 109:9296ab0bfc11 185 #define HAL_DMA1_CH6_I2C1_TX (uint32_t) (DMA1_CHANNEL6_RMP | DMA1_CSELR_CH6_I2C1_TX) /*!< Remap I2C1 Tx on DMA1 channel 6 */
Kojto 109:9296ab0bfc11 186 #define HAL_DMA1_CH6_SPI2_RX (uint32_t) (DMA1_CHANNEL6_RMP | DMA1_CSELR_CH6_SPI2_RX) /*!< Remap SPI2 Rx on DMA1 channel 6 */
Kojto 109:9296ab0bfc11 187 #define HAL_DMA1_CH6_TIM1_CH1 (uint32_t) (DMA1_CHANNEL6_RMP | DMA1_CSELR_CH6_TIM1_CH1) /*!< Remap TIM1 channel 1 on DMA1 channel 6 */
Kojto 109:9296ab0bfc11 188 #define HAL_DMA1_CH6_TIM1_CH2 (uint32_t) (DMA1_CHANNEL6_RMP | DMA1_CSELR_CH6_TIM1_CH2) /*!< Remap TIM1 channel 2 on DMA1 channel 6 */
Kojto 109:9296ab0bfc11 189 #define HAL_DMA1_CH6_TIM1_CH3 (uint32_t) (DMA1_CHANNEL6_RMP | DMA1_CSELR_CH6_TIM1_CH3) /*!< Remap TIM1 channel 3 on DMA1 channel 6 */
Kojto 109:9296ab0bfc11 190 #define HAL_DMA1_CH6_TIM3_CH1 (uint32_t) (DMA1_CHANNEL6_RMP | DMA1_CSELR_CH6_TIM3_CH1) /*!< Remap TIM3 channel 1 on DMA1 channel 6 */
Kojto 109:9296ab0bfc11 191 #define HAL_DMA1_CH6_TIM3_TRIG (uint32_t) (DMA1_CHANNEL6_RMP | DMA1_CSELR_CH6_TIM3_TRIG) /*!< Remap TIM3 Trig on DMA1 channel 6 */
Kojto 109:9296ab0bfc11 192 #define HAL_DMA1_CH6_TIM16_CH1 (uint32_t) (DMA1_CHANNEL6_RMP | DMA1_CSELR_CH6_TIM16_CH1) /*!< Remap TIM16 channel 1 on DMA1 channel 6 */
Kojto 109:9296ab0bfc11 193 #define HAL_DMA1_CH6_TIM16_UP (uint32_t) (DMA1_CHANNEL6_RMP | DMA1_CSELR_CH6_TIM16_UP) /*!< Remap TIM16 up on DMA1 channel 6 */
Kojto 109:9296ab0bfc11 194 #define HAL_DMA1_CH6_USART1_RX (uint32_t) (DMA1_CHANNEL6_RMP | DMA1_CSELR_CH6_USART1_RX) /*!< Remap USART1 Rx on DMA1 channel 6 */
Kojto 109:9296ab0bfc11 195 #define HAL_DMA1_CH6_USART2_RX (uint32_t) (DMA1_CHANNEL6_RMP | DMA1_CSELR_CH6_USART2_RX) /*!< Remap USART2 Rx on DMA1 channel 6 */
Kojto 109:9296ab0bfc11 196 #define HAL_DMA1_CH6_USART3_RX (uint32_t) (DMA1_CHANNEL6_RMP | DMA1_CSELR_CH6_USART3_RX) /*!< Remap USART3 Rx on DMA1 channel 6 */
Kojto 109:9296ab0bfc11 197 #define HAL_DMA1_CH6_USART4_RX (uint32_t) (DMA1_CHANNEL6_RMP | DMA1_CSELR_CH6_USART4_RX) /*!< Remap USART4 Rx on DMA1 channel 6 */
Kojto 109:9296ab0bfc11 198 #define HAL_DMA1_CH6_USART5_RX (uint32_t) (DMA1_CHANNEL6_RMP | DMA1_CSELR_CH6_USART5_RX) /*!< Remap USART5 Rx on DMA1 channel 6 */
Kojto 109:9296ab0bfc11 199 #define HAL_DMA1_CH6_USART6_RX (uint32_t) (DMA1_CHANNEL6_RMP | DMA1_CSELR_CH6_USART6_RX) /*!< Remap USART6 Rx on DMA1 channel 6 */
Kojto 109:9296ab0bfc11 200 #define HAL_DMA1_CH6_USART7_RX (uint32_t) (DMA1_CHANNEL6_RMP | DMA1_CSELR_CH6_USART7_RX) /*!< Remap USART7 Rx on DMA1 channel 6 */
Kojto 109:9296ab0bfc11 201 #define HAL_DMA1_CH6_USART8_RX (uint32_t) (DMA1_CHANNEL6_RMP | DMA1_CSELR_CH6_USART8_RX) /*!< Remap USART8 Rx on DMA1 channel 6 */
Kojto 109:9296ab0bfc11 202 /* DMA1 - Channel 7 */
Kojto 109:9296ab0bfc11 203 #define HAL_DMA1_CH7_DEFAULT (uint32_t) (DMA1_CHANNEL7_RMP | DMA1_CSELR_DEFAULT) /*!< Default remap position for DMA1 */
Kojto 109:9296ab0bfc11 204 #define HAL_DMA1_CH7_I2C1_RX (uint32_t) (DMA1_CHANNEL7_RMP | DMA1_CSELR_CH7_I2C1_RX) /*!< Remap I2C1 Rx on DMA1 channel 7 */
Kojto 109:9296ab0bfc11 205 #define HAL_DMA1_CH7_SPI2_TX (uint32_t) (DMA1_CHANNEL7_RMP | DMA1_CSELR_CH7_SPI2_TX) /*!< Remap SPI2 Tx on DMA1 channel 7 */
Kojto 109:9296ab0bfc11 206 #define HAL_DMA1_CH7_TIM2_CH2 (uint32_t) (DMA1_CHANNEL7_RMP | DMA1_CSELR_CH7_TIM2_CH2) /*!< Remap TIM2 channel 2 on DMA1 channel 7 */
Kojto 109:9296ab0bfc11 207 #define HAL_DMA1_CH7_TIM2_CH4 (uint32_t) (DMA1_CHANNEL7_RMP | DMA1_CSELR_CH7_TIM2_CH4) /*!< Remap TIM2 channel 4 on DMA1 channel 7 */
Kojto 109:9296ab0bfc11 208 #define HAL_DMA1_CH7_TIM17_CH1 (uint32_t) (DMA1_CHANNEL7_RMP | DMA1_CSELR_CH7_TIM17_CH1) /*!< Remap TIM17 channel 1 on DMA1 channel 7 */
Kojto 109:9296ab0bfc11 209 #define HAL_DMA1_CH7_TIM17_UP (uint32_t) (DMA1_CHANNEL7_RMP | DMA1_CSELR_CH7_TIM17_UP) /*!< Remap TIM17 up on DMA1 channel 7 */
Kojto 109:9296ab0bfc11 210 #define HAL_DMA1_CH7_USART1_TX (uint32_t) (DMA1_CHANNEL7_RMP | DMA1_CSELR_CH7_USART1_TX) /*!< Remap USART1 Tx on DMA1 channel 7 */
Kojto 109:9296ab0bfc11 211 #define HAL_DMA1_CH7_USART2_TX (uint32_t) (DMA1_CHANNEL7_RMP | DMA1_CSELR_CH7_USART2_TX) /*!< Remap USART2 Tx on DMA1 channel 7 */
Kojto 109:9296ab0bfc11 212 #define HAL_DMA1_CH7_USART3_TX (uint32_t) (DMA1_CHANNEL7_RMP | DMA1_CSELR_CH7_USART3_TX) /*!< Remap USART3 Tx on DMA1 channel 7 */
Kojto 109:9296ab0bfc11 213 #define HAL_DMA1_CH7_USART4_TX (uint32_t) (DMA1_CHANNEL7_RMP | DMA1_CSELR_CH7_USART4_TX) /*!< Remap USART4 Tx on DMA1 channel 7 */
Kojto 109:9296ab0bfc11 214 #define HAL_DMA1_CH7_USART5_TX (uint32_t) (DMA1_CHANNEL7_RMP | DMA1_CSELR_CH7_USART5_TX) /*!< Remap USART5 Tx on DMA1 channel 7 */
Kojto 109:9296ab0bfc11 215 #define HAL_DMA1_CH7_USART6_TX (uint32_t) (DMA1_CHANNEL7_RMP | DMA1_CSELR_CH7_USART6_TX) /*!< Remap USART6 Tx on DMA1 channel 7 */
Kojto 109:9296ab0bfc11 216 #define HAL_DMA1_CH7_USART7_TX (uint32_t) (DMA1_CHANNEL7_RMP | DMA1_CSELR_CH7_USART7_TX) /*!< Remap USART7 Tx on DMA1 channel 7 */
Kojto 109:9296ab0bfc11 217 #define HAL_DMA1_CH7_USART8_TX (uint32_t) (DMA1_CHANNEL7_RMP | DMA1_CSELR_CH7_USART8_TX) /*!< Remap USART8 Tx on DMA1 channel 7 */
Kojto 109:9296ab0bfc11 218
Kojto 109:9296ab0bfc11 219 /****************** DMA2 remap bit field definition********************/
Kojto 109:9296ab0bfc11 220 /* DMA2 - Channel 1 */
Kojto 109:9296ab0bfc11 221 #define HAL_DMA2_CH1_DEFAULT (uint32_t) (DMA2_CHANNEL1_RMP | DMA2_CSELR_DEFAULT) /*!< Default remap position for DMA2 */
Kojto 109:9296ab0bfc11 222 #define HAL_DMA2_CH1_I2C2_TX (uint32_t) (DMA2_CHANNEL1_RMP | DMA2_CSELR_CH1_I2C2_TX) /*!< Remap I2C2 TX on DMA2 channel 1 */
Kojto 109:9296ab0bfc11 223 #define HAL_DMA2_CH1_USART1_TX (uint32_t) (DMA2_CHANNEL1_RMP | DMA2_CSELR_CH1_USART1_TX) /*!< Remap USART1 Tx on DMA2 channel 1 */
Kojto 109:9296ab0bfc11 224 #define HAL_DMA2_CH1_USART2_TX (uint32_t) (DMA2_CHANNEL1_RMP | DMA2_CSELR_CH1_USART2_TX) /*!< Remap USART2 Tx on DMA2 channel 1 */
Kojto 109:9296ab0bfc11 225 #define HAL_DMA2_CH1_USART3_TX (uint32_t) (DMA2_CHANNEL1_RMP | DMA2_CSELR_CH1_USART3_TX) /*!< Remap USART3 Tx on DMA2 channel 1 */
Kojto 109:9296ab0bfc11 226 #define HAL_DMA2_CH1_USART4_TX (uint32_t) (DMA2_CHANNEL1_RMP | DMA2_CSELR_CH1_USART4_TX) /*!< Remap USART4 Tx on DMA2 channel 1 */
Kojto 109:9296ab0bfc11 227 #define HAL_DMA2_CH1_USART5_TX (uint32_t) (DMA2_CHANNEL1_RMP | DMA2_CSELR_CH1_USART5_TX) /*!< Remap USART5 Tx on DMA2 channel 1 */
Kojto 109:9296ab0bfc11 228 #define HAL_DMA2_CH1_USART6_TX (uint32_t) (DMA2_CHANNEL1_RMP | DMA2_CSELR_CH1_USART6_TX) /*!< Remap USART6 Tx on DMA2 channel 1 */
Kojto 109:9296ab0bfc11 229 #define HAL_DMA2_CH1_USART7_TX (uint32_t) (DMA2_CHANNEL1_RMP | DMA2_CSELR_CH1_USART7_TX) /*!< Remap USART7 Tx on DMA2 channel 1 */
Kojto 109:9296ab0bfc11 230 #define HAL_DMA2_CH1_USART8_TX (uint32_t) (DMA2_CHANNEL1_RMP | DMA2_CSELR_CH1_USART8_TX) /*!< Remap USART8 Tx on DMA2 channel 1 */
Kojto 109:9296ab0bfc11 231 /* DMA2 - Channel 2 */
Kojto 109:9296ab0bfc11 232 #define HAL_DMA2_CH2_DEFAULT (uint32_t) (DMA2_CHANNEL2_RMP | DMA2_CSELR_DEFAULT) /*!< Default remap position for DMA2 */
Kojto 109:9296ab0bfc11 233 #define HAL_DMA2_CH2_I2C2_RX (uint32_t) (DMA2_CHANNEL2_RMP | DMA2_CSELR_CH2_I2C2_RX) /*!< Remap I2C2 Rx on DMA2 channel 2 */
Kojto 109:9296ab0bfc11 234 #define HAL_DMA2_CH2_USART1_RX (uint32_t) (DMA2_CHANNEL2_RMP | DMA2_CSELR_CH2_USART1_RX) /*!< Remap USART1 Rx on DMA2 channel 2 */
Kojto 109:9296ab0bfc11 235 #define HAL_DMA2_CH2_USART2_RX (uint32_t) (DMA2_CHANNEL2_RMP | DMA2_CSELR_CH2_USART2_RX) /*!< Remap USART2 Rx on DMA2 channel 2 */
Kojto 109:9296ab0bfc11 236 #define HAL_DMA2_CH2_USART3_RX (uint32_t) (DMA2_CHANNEL2_RMP | DMA2_CSELR_CH2_USART3_RX) /*!< Remap USART3 Rx on DMA2 channel 2 */
Kojto 109:9296ab0bfc11 237 #define HAL_DMA2_CH2_USART4_RX (uint32_t) (DMA2_CHANNEL2_RMP | DMA2_CSELR_CH2_USART4_RX) /*!< Remap USART4 Rx on DMA2 channel 2 */
Kojto 109:9296ab0bfc11 238 #define HAL_DMA2_CH2_USART5_RX (uint32_t) (DMA2_CHANNEL2_RMP | DMA2_CSELR_CH2_USART5_RX) /*!< Remap USART5 Rx on DMA2 channel 2 */
Kojto 109:9296ab0bfc11 239 #define HAL_DMA2_CH2_USART6_RX (uint32_t) (DMA2_CHANNEL2_RMP | DMA2_CSELR_CH2_USART6_RX) /*!< Remap USART6 Rx on DMA2 channel 2 */
Kojto 109:9296ab0bfc11 240 #define HAL_DMA2_CH2_USART7_RX (uint32_t) (DMA2_CHANNEL2_RMP | DMA2_CSELR_CH2_USART7_RX) /*!< Remap USART7 Rx on DMA2 channel 2 */
Kojto 109:9296ab0bfc11 241 #define HAL_DMA2_CH2_USART8_RX (uint32_t) (DMA2_CHANNEL2_RMP | DMA2_CSELR_CH2_USART8_RX) /*!< Remap USART8 Rx on DMA2 channel 2 */
Kojto 109:9296ab0bfc11 242 /* DMA2 - Channel 3 */
Kojto 109:9296ab0bfc11 243 #define HAL_DMA2_CH3_DEFAULT (uint32_t) (DMA2_CHANNEL3_RMP | DMA2_CSELR_DEFAULT) /*!< Default remap position for DMA2 */
Kojto 109:9296ab0bfc11 244 #define HAL_DMA2_CH3_TIM6_UP (uint32_t) (DMA2_CHANNEL3_RMP | DMA2_CSELR_CH3_TIM6_UP) /*!< Remap TIM6 up on DMA2 channel 3 */
Kojto 109:9296ab0bfc11 245 #define HAL_DMA2_CH3_DAC_CH1 (uint32_t) (DMA2_CHANNEL3_RMP | DMA2_CSELR_CH3_DAC_CH1) /*!< Remap DAC channel 1 on DMA2 channel 3 */
Kojto 109:9296ab0bfc11 246 #define HAL_DMA2_CH3_SPI1_RX (uint32_t) (DMA2_CHANNEL3_RMP | DMA2_CSELR_CH3_SPI1_RX) /*!< Remap SPI1 Rx on DMA2 channel 3 */
Kojto 109:9296ab0bfc11 247 #define HAL_DMA2_CH3_USART1_RX (uint32_t) (DMA2_CHANNEL3_RMP | DMA2_CSELR_CH3_USART1_RX) /*!< Remap USART1 Rx on DMA2 channel 3 */
Kojto 109:9296ab0bfc11 248 #define HAL_DMA2_CH3_USART2_RX (uint32_t) (DMA2_CHANNEL3_RMP | DMA2_CSELR_CH3_USART2_RX) /*!< Remap USART2 Rx on DMA2 channel 3 */
Kojto 109:9296ab0bfc11 249 #define HAL_DMA2_CH3_USART3_RX (uint32_t) (DMA2_CHANNEL3_RMP | DMA2_CSELR_CH3_USART3_RX) /*!< Remap USART3 Rx on DMA2 channel 3 */
Kojto 109:9296ab0bfc11 250 #define HAL_DMA2_CH3_USART4_RX (uint32_t) (DMA2_CHANNEL3_RMP | DMA2_CSELR_CH3_USART4_RX) /*!< Remap USART4 Rx on DMA2 channel 3 */
Kojto 109:9296ab0bfc11 251 #define HAL_DMA2_CH3_USART5_RX (uint32_t) (DMA2_CHANNEL3_RMP | DMA2_CSELR_CH3_USART5_RX) /*!< Remap USART5 Rx on DMA2 channel 3 */
Kojto 109:9296ab0bfc11 252 #define HAL_DMA2_CH3_USART6_RX (uint32_t) (DMA2_CHANNEL3_RMP | DMA2_CSELR_CH3_USART6_RX) /*!< Remap USART6 Rx on DMA2 channel 3 */
Kojto 109:9296ab0bfc11 253 #define HAL_DMA2_CH3_USART7_RX (uint32_t) (DMA2_CHANNEL3_RMP | DMA2_CSELR_CH3_USART7_RX) /*!< Remap USART7 Rx on DMA2 channel 3 */
Kojto 109:9296ab0bfc11 254 #define HAL_DMA2_CH3_USART8_RX (uint32_t) (DMA2_CHANNEL3_RMP | DMA2_CSELR_CH3_USART8_RX) /*!< Remap USART8 Rx on DMA2 channel 3 */
Kojto 109:9296ab0bfc11 255 /* DMA2 - Channel 4 */
Kojto 109:9296ab0bfc11 256 #define HAL_DMA2_CH4_DEFAULT (uint32_t) (DMA2_CHANNEL4_RMP | DMA2_CSELR_DEFAULT) /*!< Default remap position for DMA2 */
Kojto 109:9296ab0bfc11 257 #define HAL_DMA2_CH4_TIM7_UP (uint32_t) (DMA2_CHANNEL4_RMP | DMA2_CSELR_CH4_TIM7_UP) /*!< Remap TIM7 up on DMA2 channel 4 */
Kojto 109:9296ab0bfc11 258 #define HAL_DMA2_CH4_DAC_CH2 (uint32_t) (DMA2_CHANNEL4_RMP | DMA2_CSELR_CH4_DAC_CH2) /*!< Remap DAC channel 2 on DMA2 channel 4 */
Kojto 109:9296ab0bfc11 259 #define HAL_DMA2_CH4_SPI1_TX (uint32_t) (DMA2_CHANNEL4_RMP | DMA2_CSELR_CH4_SPI1_TX) /*!< Remap SPI1 Tx on DMA2 channel 4 */
Kojto 109:9296ab0bfc11 260 #define HAL_DMA2_CH4_USART1_TX (uint32_t) (DMA2_CHANNEL4_RMP | DMA2_CSELR_CH4_USART1_TX) /*!< Remap USART1 Tx on DMA2 channel 4 */
Kojto 109:9296ab0bfc11 261 #define HAL_DMA2_CH4_USART2_TX (uint32_t) (DMA2_CHANNEL4_RMP | DMA2_CSELR_CH4_USART2_TX) /*!< Remap USART2 Tx on DMA2 channel 4 */
Kojto 109:9296ab0bfc11 262 #define HAL_DMA2_CH4_USART3_TX (uint32_t) (DMA2_CHANNEL4_RMP | DMA2_CSELR_CH4_USART3_TX) /*!< Remap USART3 Tx on DMA2 channel 4 */
Kojto 109:9296ab0bfc11 263 #define HAL_DMA2_CH4_USART4_TX (uint32_t) (DMA2_CHANNEL4_RMP | DMA2_CSELR_CH4_USART4_TX) /*!< Remap USART4 Tx on DMA2 channel 4 */
Kojto 109:9296ab0bfc11 264 #define HAL_DMA2_CH4_USART5_TX (uint32_t) (DMA2_CHANNEL4_RMP | DMA2_CSELR_CH4_USART5_TX) /*!< Remap USART5 Tx on DMA2 channel 4 */
Kojto 109:9296ab0bfc11 265 #define HAL_DMA2_CH4_USART6_TX (uint32_t) (DMA2_CHANNEL4_RMP | DMA2_CSELR_CH4_USART6_TX) /*!< Remap USART6 Tx on DMA2 channel 4 */
Kojto 109:9296ab0bfc11 266 #define HAL_DMA2_CH4_USART7_TX (uint32_t) (DMA2_CHANNEL4_RMP | DMA2_CSELR_CH4_USART7_TX) /*!< Remap USART7 Tx on DMA2 channel 4 */
Kojto 109:9296ab0bfc11 267 #define HAL_DMA2_CH4_USART8_TX (uint32_t) (DMA2_CHANNEL4_RMP | DMA2_CSELR_CH4_USART8_TX) /*!< Remap USART8 Tx on DMA2 channel 4 */
Kojto 109:9296ab0bfc11 268 /* DMA2 - Channel 5 */
Kojto 109:9296ab0bfc11 269 #define HAL_DMA2_CH5_DEFAULT (uint32_t) (DMA2_CHANNEL5_RMP | DMA2_CSELR_DEFAULT) /*!< Default remap position for DMA2 */
Kojto 109:9296ab0bfc11 270 #define HAL_DMA2_CH5_ADC (uint32_t) (DMA2_CHANNEL5_RMP | DMA2_CSELR_CH5_ADC) /*!< Remap ADC on DMA2 channel 5 */
Kojto 109:9296ab0bfc11 271 #define HAL_DMA2_CH5_USART1_TX (uint32_t) (DMA2_CHANNEL5_RMP | DMA2_CSELR_CH5_USART1_TX) /*!< Remap USART1 Tx on DMA2 channel 5 */
Kojto 109:9296ab0bfc11 272 #define HAL_DMA2_CH5_USART2_TX (uint32_t) (DMA2_CHANNEL5_RMP | DMA2_CSELR_CH5_USART2_TX) /*!< Remap USART2 Tx on DMA2 channel 5 */
Kojto 109:9296ab0bfc11 273 #define HAL_DMA2_CH5_USART3_TX (uint32_t) (DMA2_CHANNEL5_RMP | DMA2_CSELR_CH5_USART3_TX) /*!< Remap USART3 Tx on DMA2 channel 5 */
Kojto 109:9296ab0bfc11 274 #define HAL_DMA2_CH5_USART4_TX (uint32_t) (DMA2_CHANNEL5_RMP | DMA2_CSELR_CH5_USART4_TX) /*!< Remap USART4 Tx on DMA2 channel 5 */
Kojto 109:9296ab0bfc11 275 #define HAL_DMA2_CH5_USART5_TX (uint32_t) (DMA2_CHANNEL5_RMP | DMA2_CSELR_CH5_USART5_TX) /*!< Remap USART5 Tx on DMA2 channel 5 */
Kojto 109:9296ab0bfc11 276 #define HAL_DMA2_CH5_USART6_TX (uint32_t) (DMA2_CHANNEL5_RMP | DMA2_CSELR_CH5_USART6_TX) /*!< Remap USART6 Tx on DMA2 channel 5 */
Kojto 109:9296ab0bfc11 277 #define HAL_DMA2_CH5_USART7_TX (uint32_t) (DMA2_CHANNEL5_RMP | DMA2_CSELR_CH5_USART7_TX) /*!< Remap USART7 Tx on DMA2 channel 5 */
Kojto 109:9296ab0bfc11 278 #define HAL_DMA2_CH5_USART8_TX (uint32_t) (DMA2_CHANNEL5_RMP | DMA2_CSELR_CH5_USART8_TX) /*!< Remap USART8 Tx on DMA2 channel 5 */
Kojto 109:9296ab0bfc11 279 #endif /* !defined(STM32F030xC) */
Kojto 109:9296ab0bfc11 280
Kojto 109:9296ab0bfc11 281 #if defined(STM32F091xC) || defined(STM32F098xx)
Kojto 109:9296ab0bfc11 282 #define IS_HAL_DMA1_REMAP(REQUEST) (((REQUEST) == HAL_DMA1_CH1_DEFAULT) ||\
Kojto 109:9296ab0bfc11 283 ((REQUEST) == HAL_DMA1_CH1_ADC) ||\
Kojto 109:9296ab0bfc11 284 ((REQUEST) == HAL_DMA1_CH1_TIM17_CH1) ||\
Kojto 109:9296ab0bfc11 285 ((REQUEST) == HAL_DMA1_CH1_TIM17_UP) ||\
Kojto 109:9296ab0bfc11 286 ((REQUEST) == HAL_DMA1_CH1_USART1_RX) ||\
Kojto 109:9296ab0bfc11 287 ((REQUEST) == HAL_DMA1_CH1_USART2_RX) ||\
Kojto 109:9296ab0bfc11 288 ((REQUEST) == HAL_DMA1_CH1_USART3_RX) ||\
Kojto 109:9296ab0bfc11 289 ((REQUEST) == HAL_DMA1_CH1_USART4_RX) ||\
Kojto 109:9296ab0bfc11 290 ((REQUEST) == HAL_DMA1_CH1_USART5_RX) ||\
Kojto 109:9296ab0bfc11 291 ((REQUEST) == HAL_DMA1_CH1_USART6_RX) ||\
Kojto 109:9296ab0bfc11 292 ((REQUEST) == HAL_DMA1_CH1_USART7_RX) ||\
Kojto 109:9296ab0bfc11 293 ((REQUEST) == HAL_DMA1_CH1_USART8_RX) ||\
Kojto 109:9296ab0bfc11 294 ((REQUEST) == HAL_DMA1_CH2_DEFAULT) ||\
Kojto 109:9296ab0bfc11 295 ((REQUEST) == HAL_DMA1_CH2_ADC) ||\
Kojto 109:9296ab0bfc11 296 ((REQUEST) == HAL_DMA1_CH2_I2C1_TX) ||\
Kojto 109:9296ab0bfc11 297 ((REQUEST) == HAL_DMA1_CH2_SPI1_RX) ||\
Kojto 109:9296ab0bfc11 298 ((REQUEST) == HAL_DMA1_CH2_TIM1_CH1) ||\
Kojto 109:9296ab0bfc11 299 ((REQUEST) == HAL_DMA1_CH2_I2C1_TX) ||\
Kojto 109:9296ab0bfc11 300 ((REQUEST) == HAL_DMA1_CH2_TIM17_CH1) ||\
Kojto 109:9296ab0bfc11 301 ((REQUEST) == HAL_DMA1_CH2_TIM17_UP) ||\
Kojto 109:9296ab0bfc11 302 ((REQUEST) == HAL_DMA1_CH2_USART1_TX) ||\
Kojto 109:9296ab0bfc11 303 ((REQUEST) == HAL_DMA1_CH2_USART2_TX) ||\
Kojto 109:9296ab0bfc11 304 ((REQUEST) == HAL_DMA1_CH2_USART3_TX) ||\
Kojto 109:9296ab0bfc11 305 ((REQUEST) == HAL_DMA1_CH2_USART4_TX) ||\
Kojto 109:9296ab0bfc11 306 ((REQUEST) == HAL_DMA1_CH2_USART5_TX) ||\
Kojto 109:9296ab0bfc11 307 ((REQUEST) == HAL_DMA1_CH2_USART6_TX) ||\
Kojto 109:9296ab0bfc11 308 ((REQUEST) == HAL_DMA1_CH2_USART7_TX) ||\
Kojto 109:9296ab0bfc11 309 ((REQUEST) == HAL_DMA1_CH2_USART8_TX) ||\
Kojto 109:9296ab0bfc11 310 ((REQUEST) == HAL_DMA1_CH3_DEFAULT) ||\
Kojto 109:9296ab0bfc11 311 ((REQUEST) == HAL_DMA1_CH3_TIM6_UP) ||\
Kojto 109:9296ab0bfc11 312 ((REQUEST) == HAL_DMA1_CH3_DAC_CH1) ||\
Kojto 109:9296ab0bfc11 313 ((REQUEST) == HAL_DMA1_CH3_I2C1_RX) ||\
Kojto 109:9296ab0bfc11 314 ((REQUEST) == HAL_DMA1_CH3_SPI1_TX) ||\
Kojto 109:9296ab0bfc11 315 ((REQUEST) == HAL_DMA1_CH3_TIM1_CH2) ||\
Kojto 109:9296ab0bfc11 316 ((REQUEST) == HAL_DMA1_CH3_TIM2_CH2) ||\
Kojto 109:9296ab0bfc11 317 ((REQUEST) == HAL_DMA1_CH3_TIM16_CH1) ||\
Kojto 109:9296ab0bfc11 318 ((REQUEST) == HAL_DMA1_CH3_TIM16_UP) ||\
Kojto 109:9296ab0bfc11 319 ((REQUEST) == HAL_DMA1_CH3_USART1_RX) ||\
Kojto 109:9296ab0bfc11 320 ((REQUEST) == HAL_DMA1_CH3_USART2_RX) ||\
Kojto 109:9296ab0bfc11 321 ((REQUEST) == HAL_DMA1_CH3_USART3_RX) ||\
Kojto 109:9296ab0bfc11 322 ((REQUEST) == HAL_DMA1_CH3_USART4_RX) ||\
Kojto 109:9296ab0bfc11 323 ((REQUEST) == HAL_DMA1_CH3_USART5_RX) ||\
Kojto 109:9296ab0bfc11 324 ((REQUEST) == HAL_DMA1_CH3_USART6_RX) ||\
Kojto 109:9296ab0bfc11 325 ((REQUEST) == HAL_DMA1_CH3_USART7_RX) ||\
Kojto 109:9296ab0bfc11 326 ((REQUEST) == HAL_DMA1_CH3_USART8_RX) ||\
Kojto 109:9296ab0bfc11 327 ((REQUEST) == HAL_DMA1_CH4_DEFAULT) ||\
Kojto 109:9296ab0bfc11 328 ((REQUEST) == HAL_DMA1_CH4_TIM7_UP) ||\
Kojto 109:9296ab0bfc11 329 ((REQUEST) == HAL_DMA1_CH4_DAC_CH2) ||\
Kojto 109:9296ab0bfc11 330 ((REQUEST) == HAL_DMA1_CH4_I2C2_TX) ||\
Kojto 109:9296ab0bfc11 331 ((REQUEST) == HAL_DMA1_CH4_SPI2_RX) ||\
Kojto 109:9296ab0bfc11 332 ((REQUEST) == HAL_DMA1_CH4_TIM2_CH4) ||\
Kojto 109:9296ab0bfc11 333 ((REQUEST) == HAL_DMA1_CH4_TIM3_CH1) ||\
Kojto 109:9296ab0bfc11 334 ((REQUEST) == HAL_DMA1_CH4_TIM3_TRIG) ||\
Kojto 109:9296ab0bfc11 335 ((REQUEST) == HAL_DMA1_CH4_TIM16_CH1) ||\
Kojto 109:9296ab0bfc11 336 ((REQUEST) == HAL_DMA1_CH4_TIM16_UP) ||\
Kojto 109:9296ab0bfc11 337 ((REQUEST) == HAL_DMA1_CH4_USART1_TX) ||\
Kojto 109:9296ab0bfc11 338 ((REQUEST) == HAL_DMA1_CH4_USART2_TX) ||\
Kojto 109:9296ab0bfc11 339 ((REQUEST) == HAL_DMA1_CH4_USART3_TX) ||\
Kojto 109:9296ab0bfc11 340 ((REQUEST) == HAL_DMA1_CH4_USART4_TX) ||\
Kojto 109:9296ab0bfc11 341 ((REQUEST) == HAL_DMA1_CH4_USART5_TX) ||\
Kojto 109:9296ab0bfc11 342 ((REQUEST) == HAL_DMA1_CH4_USART6_TX) ||\
Kojto 109:9296ab0bfc11 343 ((REQUEST) == HAL_DMA1_CH4_USART7_TX) ||\
Kojto 109:9296ab0bfc11 344 ((REQUEST) == HAL_DMA1_CH4_USART8_TX) ||\
Kojto 109:9296ab0bfc11 345 ((REQUEST) == HAL_DMA1_CH5_DEFAULT) ||\
Kojto 109:9296ab0bfc11 346 ((REQUEST) == HAL_DMA1_CH5_I2C2_RX) ||\
Kojto 109:9296ab0bfc11 347 ((REQUEST) == HAL_DMA1_CH5_SPI2_TX) ||\
Kojto 109:9296ab0bfc11 348 ((REQUEST) == HAL_DMA1_CH5_TIM1_CH3) ||\
Kojto 109:9296ab0bfc11 349 ((REQUEST) == HAL_DMA1_CH5_USART1_RX) ||\
Kojto 109:9296ab0bfc11 350 ((REQUEST) == HAL_DMA1_CH5_USART2_RX) ||\
Kojto 109:9296ab0bfc11 351 ((REQUEST) == HAL_DMA1_CH5_USART3_RX) ||\
Kojto 109:9296ab0bfc11 352 ((REQUEST) == HAL_DMA1_CH5_USART4_RX) ||\
Kojto 109:9296ab0bfc11 353 ((REQUEST) == HAL_DMA1_CH5_USART5_RX) ||\
Kojto 109:9296ab0bfc11 354 ((REQUEST) == HAL_DMA1_CH5_USART6_RX) ||\
Kojto 109:9296ab0bfc11 355 ((REQUEST) == HAL_DMA1_CH5_USART7_RX) ||\
Kojto 109:9296ab0bfc11 356 ((REQUEST) == HAL_DMA1_CH5_USART8_RX) ||\
Kojto 109:9296ab0bfc11 357 ((REQUEST) == HAL_DMA1_CH6_DEFAULT) ||\
Kojto 109:9296ab0bfc11 358 ((REQUEST) == HAL_DMA1_CH6_I2C1_TX) ||\
Kojto 109:9296ab0bfc11 359 ((REQUEST) == HAL_DMA1_CH6_SPI2_RX) ||\
Kojto 109:9296ab0bfc11 360 ((REQUEST) == HAL_DMA1_CH6_TIM1_CH1) ||\
Kojto 109:9296ab0bfc11 361 ((REQUEST) == HAL_DMA1_CH6_TIM1_CH2) ||\
Kojto 109:9296ab0bfc11 362 ((REQUEST) == HAL_DMA1_CH6_TIM1_CH3) ||\
Kojto 109:9296ab0bfc11 363 ((REQUEST) == HAL_DMA1_CH6_TIM3_CH1) ||\
Kojto 109:9296ab0bfc11 364 ((REQUEST) == HAL_DMA1_CH6_TIM3_TRIG) ||\
Kojto 109:9296ab0bfc11 365 ((REQUEST) == HAL_DMA1_CH6_TIM16_CH1) ||\
Kojto 109:9296ab0bfc11 366 ((REQUEST) == HAL_DMA1_CH6_TIM16_UP) ||\
Kojto 109:9296ab0bfc11 367 ((REQUEST) == HAL_DMA1_CH6_USART1_RX) ||\
Kojto 109:9296ab0bfc11 368 ((REQUEST) == HAL_DMA1_CH6_USART2_RX) ||\
Kojto 109:9296ab0bfc11 369 ((REQUEST) == HAL_DMA1_CH6_USART3_RX) ||\
Kojto 109:9296ab0bfc11 370 ((REQUEST) == HAL_DMA1_CH6_USART4_RX) ||\
Kojto 109:9296ab0bfc11 371 ((REQUEST) == HAL_DMA1_CH6_USART5_RX) ||\
Kojto 109:9296ab0bfc11 372 ((REQUEST) == HAL_DMA1_CH6_USART6_RX) ||\
Kojto 109:9296ab0bfc11 373 ((REQUEST) == HAL_DMA1_CH6_USART7_RX) ||\
Kojto 109:9296ab0bfc11 374 ((REQUEST) == HAL_DMA1_CH6_USART8_RX) ||\
Kojto 109:9296ab0bfc11 375 ((REQUEST) == HAL_DMA1_CH7_DEFAULT) ||\
Kojto 109:9296ab0bfc11 376 ((REQUEST) == HAL_DMA1_CH7_I2C1_RX) ||\
Kojto 109:9296ab0bfc11 377 ((REQUEST) == HAL_DMA1_CH7_SPI2_TX) ||\
Kojto 109:9296ab0bfc11 378 ((REQUEST) == HAL_DMA1_CH7_TIM2_CH2) ||\
Kojto 109:9296ab0bfc11 379 ((REQUEST) == HAL_DMA1_CH7_TIM2_CH4) ||\
Kojto 109:9296ab0bfc11 380 ((REQUEST) == HAL_DMA1_CH7_TIM17_CH1) ||\
Kojto 109:9296ab0bfc11 381 ((REQUEST) == HAL_DMA1_CH7_TIM17_UP) ||\
Kojto 109:9296ab0bfc11 382 ((REQUEST) == HAL_DMA1_CH7_USART1_TX) ||\
Kojto 109:9296ab0bfc11 383 ((REQUEST) == HAL_DMA1_CH7_USART2_TX) ||\
Kojto 109:9296ab0bfc11 384 ((REQUEST) == HAL_DMA1_CH7_USART3_TX) ||\
Kojto 109:9296ab0bfc11 385 ((REQUEST) == HAL_DMA1_CH7_USART4_TX) ||\
Kojto 109:9296ab0bfc11 386 ((REQUEST) == HAL_DMA1_CH7_USART5_TX) ||\
Kojto 109:9296ab0bfc11 387 ((REQUEST) == HAL_DMA1_CH7_USART6_TX) ||\
Kojto 109:9296ab0bfc11 388 ((REQUEST) == HAL_DMA1_CH7_USART7_TX) ||\
Kojto 109:9296ab0bfc11 389 ((REQUEST) == HAL_DMA1_CH7_USART8_TX))
Kojto 109:9296ab0bfc11 390
Kojto 109:9296ab0bfc11 391 #define IS_HAL_DMA2_REMAP(REQUEST) (((REQUEST) == HAL_DMA2_CH1_DEFAULT) ||\
Kojto 109:9296ab0bfc11 392 ((REQUEST) == HAL_DMA2_CH1_I2C2_TX) ||\
Kojto 109:9296ab0bfc11 393 ((REQUEST) == HAL_DMA2_CH1_USART1_TX) ||\
Kojto 109:9296ab0bfc11 394 ((REQUEST) == HAL_DMA2_CH1_USART2_TX) ||\
Kojto 109:9296ab0bfc11 395 ((REQUEST) == HAL_DMA2_CH1_USART3_TX) ||\
Kojto 109:9296ab0bfc11 396 ((REQUEST) == HAL_DMA2_CH1_USART4_TX) ||\
Kojto 109:9296ab0bfc11 397 ((REQUEST) == HAL_DMA2_CH1_USART5_TX) ||\
Kojto 109:9296ab0bfc11 398 ((REQUEST) == HAL_DMA2_CH1_USART6_TX) ||\
Kojto 109:9296ab0bfc11 399 ((REQUEST) == HAL_DMA2_CH1_USART7_TX) ||\
Kojto 109:9296ab0bfc11 400 ((REQUEST) == HAL_DMA2_CH1_USART8_TX) ||\
Kojto 109:9296ab0bfc11 401 ((REQUEST) == HAL_DMA2_CH2_DEFAULT) ||\
Kojto 109:9296ab0bfc11 402 ((REQUEST) == HAL_DMA2_CH2_I2C2_RX) ||\
Kojto 109:9296ab0bfc11 403 ((REQUEST) == HAL_DMA2_CH2_USART1_RX) ||\
Kojto 109:9296ab0bfc11 404 ((REQUEST) == HAL_DMA2_CH2_USART2_RX) ||\
Kojto 109:9296ab0bfc11 405 ((REQUEST) == HAL_DMA2_CH2_USART3_RX) ||\
Kojto 109:9296ab0bfc11 406 ((REQUEST) == HAL_DMA2_CH2_USART4_RX) ||\
Kojto 109:9296ab0bfc11 407 ((REQUEST) == HAL_DMA2_CH2_USART5_RX) ||\
Kojto 109:9296ab0bfc11 408 ((REQUEST) == HAL_DMA2_CH2_USART6_RX) ||\
Kojto 109:9296ab0bfc11 409 ((REQUEST) == HAL_DMA2_CH2_USART7_RX) ||\
Kojto 109:9296ab0bfc11 410 ((REQUEST) == HAL_DMA2_CH2_USART8_RX) ||\
Kojto 109:9296ab0bfc11 411 ((REQUEST) == HAL_DMA2_CH3_DEFAULT) ||\
Kojto 109:9296ab0bfc11 412 ((REQUEST) == HAL_DMA2_CH3_TIM6_UP) ||\
Kojto 109:9296ab0bfc11 413 ((REQUEST) == HAL_DMA2_CH3_DAC_CH1) ||\
Kojto 109:9296ab0bfc11 414 ((REQUEST) == HAL_DMA2_CH3_SPI1_RX) ||\
Kojto 109:9296ab0bfc11 415 ((REQUEST) == HAL_DMA2_CH3_USART1_RX) ||\
Kojto 109:9296ab0bfc11 416 ((REQUEST) == HAL_DMA2_CH3_USART2_RX) ||\
Kojto 109:9296ab0bfc11 417 ((REQUEST) == HAL_DMA2_CH3_USART3_RX) ||\
Kojto 109:9296ab0bfc11 418 ((REQUEST) == HAL_DMA2_CH3_USART4_RX) ||\
Kojto 109:9296ab0bfc11 419 ((REQUEST) == HAL_DMA2_CH3_USART5_RX) ||\
Kojto 109:9296ab0bfc11 420 ((REQUEST) == HAL_DMA2_CH3_USART6_RX) ||\
Kojto 109:9296ab0bfc11 421 ((REQUEST) == HAL_DMA2_CH3_USART7_RX) ||\
Kojto 109:9296ab0bfc11 422 ((REQUEST) == HAL_DMA2_CH3_USART8_RX) ||\
Kojto 109:9296ab0bfc11 423 ((REQUEST) == HAL_DMA2_CH4_DEFAULT) ||\
Kojto 109:9296ab0bfc11 424 ((REQUEST) == HAL_DMA2_CH4_TIM7_UP) ||\
Kojto 109:9296ab0bfc11 425 ((REQUEST) == HAL_DMA2_CH4_DAC_CH2) ||\
Kojto 109:9296ab0bfc11 426 ((REQUEST) == HAL_DMA2_CH4_SPI1_TX) ||\
Kojto 109:9296ab0bfc11 427 ((REQUEST) == HAL_DMA2_CH4_USART1_TX) ||\
Kojto 109:9296ab0bfc11 428 ((REQUEST) == HAL_DMA2_CH4_USART2_TX) ||\
Kojto 109:9296ab0bfc11 429 ((REQUEST) == HAL_DMA2_CH4_USART3_TX) ||\
Kojto 109:9296ab0bfc11 430 ((REQUEST) == HAL_DMA2_CH4_USART4_TX) ||\
Kojto 109:9296ab0bfc11 431 ((REQUEST) == HAL_DMA2_CH4_USART5_TX) ||\
Kojto 109:9296ab0bfc11 432 ((REQUEST) == HAL_DMA2_CH4_USART6_TX) ||\
Kojto 109:9296ab0bfc11 433 ((REQUEST) == HAL_DMA2_CH4_USART7_TX) ||\
Kojto 109:9296ab0bfc11 434 ((REQUEST) == HAL_DMA2_CH4_USART8_TX) ||\
Kojto 109:9296ab0bfc11 435 ((REQUEST) == HAL_DMA2_CH5_DEFAULT) ||\
Kojto 109:9296ab0bfc11 436 ((REQUEST) == HAL_DMA2_CH5_ADC) ||\
Kojto 109:9296ab0bfc11 437 ((REQUEST) == HAL_DMA2_CH5_USART1_TX) ||\
Kojto 109:9296ab0bfc11 438 ((REQUEST) == HAL_DMA2_CH5_USART2_TX) ||\
Kojto 109:9296ab0bfc11 439 ((REQUEST) == HAL_DMA2_CH5_USART3_TX) ||\
Kojto 109:9296ab0bfc11 440 ((REQUEST) == HAL_DMA2_CH5_USART4_TX) ||\
Kojto 109:9296ab0bfc11 441 ((REQUEST) == HAL_DMA2_CH5_USART5_TX) ||\
Kojto 109:9296ab0bfc11 442 ((REQUEST) == HAL_DMA2_CH5_USART6_TX) ||\
Kojto 109:9296ab0bfc11 443 ((REQUEST) == HAL_DMA2_CH5_USART7_TX) ||\
Kojto 109:9296ab0bfc11 444 ((REQUEST) == HAL_DMA2_CH5_USART8_TX ))
Kojto 109:9296ab0bfc11 445 #endif /* STM32F091xC || STM32F098xx */
Kojto 109:9296ab0bfc11 446
Kojto 109:9296ab0bfc11 447 #if defined(STM32F030xC)
Kojto 109:9296ab0bfc11 448 #define IS_HAL_DMA1_REMAP(REQUEST) (((REQUEST) == HAL_DMA1_CH1_DEFAULT) ||\
Kojto 109:9296ab0bfc11 449 ((REQUEST) == HAL_DMA1_CH1_ADC) ||\
Kojto 109:9296ab0bfc11 450 ((REQUEST) == HAL_DMA1_CH1_TIM17_CH1) ||\
Kojto 109:9296ab0bfc11 451 ((REQUEST) == HAL_DMA1_CH1_TIM17_UP) ||\
Kojto 109:9296ab0bfc11 452 ((REQUEST) == HAL_DMA1_CH1_USART1_RX) ||\
Kojto 109:9296ab0bfc11 453 ((REQUEST) == HAL_DMA1_CH1_USART2_RX) ||\
Kojto 109:9296ab0bfc11 454 ((REQUEST) == HAL_DMA1_CH1_USART3_RX) ||\
Kojto 109:9296ab0bfc11 455 ((REQUEST) == HAL_DMA1_CH1_USART4_RX) ||\
Kojto 109:9296ab0bfc11 456 ((REQUEST) == HAL_DMA1_CH1_USART5_RX) ||\
Kojto 109:9296ab0bfc11 457 ((REQUEST) == HAL_DMA1_CH1_USART6_RX) ||\
Kojto 109:9296ab0bfc11 458 ((REQUEST) == HAL_DMA1_CH2_DEFAULT) ||\
Kojto 109:9296ab0bfc11 459 ((REQUEST) == HAL_DMA1_CH2_ADC) ||\
Kojto 109:9296ab0bfc11 460 ((REQUEST) == HAL_DMA1_CH2_I2C1_TX) ||\
Kojto 109:9296ab0bfc11 461 ((REQUEST) == HAL_DMA1_CH2_SPI1_RX) ||\
Kojto 109:9296ab0bfc11 462 ((REQUEST) == HAL_DMA1_CH2_TIM1_CH1) ||\
Kojto 109:9296ab0bfc11 463 ((REQUEST) == HAL_DMA1_CH2_I2C1_TX) ||\
Kojto 109:9296ab0bfc11 464 ((REQUEST) == HAL_DMA1_CH2_TIM17_CH1) ||\
Kojto 109:9296ab0bfc11 465 ((REQUEST) == HAL_DMA1_CH2_TIM17_UP) ||\
Kojto 109:9296ab0bfc11 466 ((REQUEST) == HAL_DMA1_CH2_USART1_TX) ||\
Kojto 109:9296ab0bfc11 467 ((REQUEST) == HAL_DMA1_CH2_USART2_TX) ||\
Kojto 109:9296ab0bfc11 468 ((REQUEST) == HAL_DMA1_CH2_USART3_TX) ||\
Kojto 109:9296ab0bfc11 469 ((REQUEST) == HAL_DMA1_CH2_USART4_TX) ||\
Kojto 109:9296ab0bfc11 470 ((REQUEST) == HAL_DMA1_CH2_USART5_TX) ||\
Kojto 109:9296ab0bfc11 471 ((REQUEST) == HAL_DMA1_CH2_USART6_TX) ||\
Kojto 109:9296ab0bfc11 472 ((REQUEST) == HAL_DMA1_CH3_DEFAULT) ||\
Kojto 109:9296ab0bfc11 473 ((REQUEST) == HAL_DMA1_CH3_TIM6_UP) ||\
Kojto 109:9296ab0bfc11 474 ((REQUEST) == HAL_DMA1_CH3_I2C1_RX) ||\
Kojto 109:9296ab0bfc11 475 ((REQUEST) == HAL_DMA1_CH3_SPI1_TX) ||\
Kojto 109:9296ab0bfc11 476 ((REQUEST) == HAL_DMA1_CH3_TIM1_CH2) ||\
Kojto 109:9296ab0bfc11 477 ((REQUEST) == HAL_DMA1_CH3_TIM16_CH1) ||\
Kojto 109:9296ab0bfc11 478 ((REQUEST) == HAL_DMA1_CH3_TIM16_UP) ||\
Kojto 109:9296ab0bfc11 479 ((REQUEST) == HAL_DMA1_CH3_USART1_RX) ||\
Kojto 109:9296ab0bfc11 480 ((REQUEST) == HAL_DMA1_CH3_USART2_RX) ||\
Kojto 109:9296ab0bfc11 481 ((REQUEST) == HAL_DMA1_CH3_USART3_RX) ||\
Kojto 109:9296ab0bfc11 482 ((REQUEST) == HAL_DMA1_CH3_USART4_RX) ||\
Kojto 109:9296ab0bfc11 483 ((REQUEST) == HAL_DMA1_CH3_USART5_RX) ||\
Kojto 109:9296ab0bfc11 484 ((REQUEST) == HAL_DMA1_CH3_USART6_RX) ||\
Kojto 109:9296ab0bfc11 485 ((REQUEST) == HAL_DMA1_CH4_DEFAULT) ||\
Kojto 109:9296ab0bfc11 486 ((REQUEST) == HAL_DMA1_CH4_TIM7_UP) ||\
Kojto 109:9296ab0bfc11 487 ((REQUEST) == HAL_DMA1_CH4_I2C2_TX) ||\
Kojto 109:9296ab0bfc11 488 ((REQUEST) == HAL_DMA1_CH4_SPI2_RX) ||\
Kojto 109:9296ab0bfc11 489 ((REQUEST) == HAL_DMA1_CH4_TIM3_CH1) ||\
Kojto 109:9296ab0bfc11 490 ((REQUEST) == HAL_DMA1_CH4_TIM3_TRIG) ||\
Kojto 109:9296ab0bfc11 491 ((REQUEST) == HAL_DMA1_CH4_TIM16_CH1) ||\
Kojto 109:9296ab0bfc11 492 ((REQUEST) == HAL_DMA1_CH4_TIM16_UP) ||\
Kojto 109:9296ab0bfc11 493 ((REQUEST) == HAL_DMA1_CH4_USART1_TX) ||\
Kojto 109:9296ab0bfc11 494 ((REQUEST) == HAL_DMA1_CH4_USART2_TX) ||\
Kojto 109:9296ab0bfc11 495 ((REQUEST) == HAL_DMA1_CH4_USART3_TX) ||\
Kojto 109:9296ab0bfc11 496 ((REQUEST) == HAL_DMA1_CH4_USART4_TX) ||\
Kojto 109:9296ab0bfc11 497 ((REQUEST) == HAL_DMA1_CH4_USART5_TX) ||\
Kojto 109:9296ab0bfc11 498 ((REQUEST) == HAL_DMA1_CH4_USART6_TX) ||\
Kojto 109:9296ab0bfc11 499 ((REQUEST) == HAL_DMA1_CH5_DEFAULT) ||\
Kojto 109:9296ab0bfc11 500 ((REQUEST) == HAL_DMA1_CH5_I2C2_RX) ||\
Kojto 109:9296ab0bfc11 501 ((REQUEST) == HAL_DMA1_CH5_SPI2_TX) ||\
Kojto 109:9296ab0bfc11 502 ((REQUEST) == HAL_DMA1_CH5_TIM1_CH3) ||\
Kojto 109:9296ab0bfc11 503 ((REQUEST) == HAL_DMA1_CH5_USART1_RX) ||\
Kojto 109:9296ab0bfc11 504 ((REQUEST) == HAL_DMA1_CH5_USART2_RX) ||\
Kojto 109:9296ab0bfc11 505 ((REQUEST) == HAL_DMA1_CH5_USART3_RX) ||\
Kojto 109:9296ab0bfc11 506 ((REQUEST) == HAL_DMA1_CH5_USART4_RX) ||\
Kojto 109:9296ab0bfc11 507 ((REQUEST) == HAL_DMA1_CH5_USART5_RX) ||\
Kojto 109:9296ab0bfc11 508 ((REQUEST) == HAL_DMA1_CH5_USART6_RX))
Kojto 109:9296ab0bfc11 509 #endif /* STM32F030xC */
Kojto 109:9296ab0bfc11 510
Kojto 109:9296ab0bfc11 511 /**
Kojto 109:9296ab0bfc11 512 * @}
Kojto 109:9296ab0bfc11 513 */
Kojto 109:9296ab0bfc11 514 #endif /* STM32F091xC || STM32F098xx || STM32F030xC */
Kojto 109:9296ab0bfc11 515
Kojto 109:9296ab0bfc11 516 /* Exported macros -----------------------------------------------------------*/
Kojto 109:9296ab0bfc11 517
Kojto 109:9296ab0bfc11 518 /** @defgroup DMAEx_Exported_Macros DMAEx Exported Macros
Kojto 109:9296ab0bfc11 519 * @{
Kojto 109:9296ab0bfc11 520 */
Kojto 109:9296ab0bfc11 521 /* Interrupt & Flag management */
Kojto 109:9296ab0bfc11 522
Kojto 109:9296ab0bfc11 523 #if defined(STM32F071xB) || defined(STM32F072xB) || defined(STM32F078xx)
Kojto 109:9296ab0bfc11 524 /**
Kojto 109:9296ab0bfc11 525 * @brief Returns the current DMA Channel transfer complete flag.
Kojto 109:9296ab0bfc11 526 * @param __HANDLE__: DMA handle
Kojto 109:9296ab0bfc11 527 * @retval The specified transfer complete flag index.
Kojto 109:9296ab0bfc11 528 */
Kojto 109:9296ab0bfc11 529 #define __HAL_DMA_GET_TC_FLAG_INDEX(__HANDLE__) \
Kojto 109:9296ab0bfc11 530 (((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel1))? DMA_FLAG_TC1 :\
Kojto 109:9296ab0bfc11 531 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel2))? DMA_FLAG_TC2 :\
Kojto 109:9296ab0bfc11 532 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel3))? DMA_FLAG_TC3 :\
Kojto 109:9296ab0bfc11 533 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel4))? DMA_FLAG_TC4 :\
Kojto 109:9296ab0bfc11 534 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel5))? DMA_FLAG_TC5 :\
Kojto 109:9296ab0bfc11 535 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel6))? DMA_FLAG_TC6 :\
Kojto 109:9296ab0bfc11 536 DMA_FLAG_TC7)
Kojto 109:9296ab0bfc11 537
Kojto 109:9296ab0bfc11 538 /**
Kojto 109:9296ab0bfc11 539 * @brief Returns the current DMA Channel half transfer complete flag.
Kojto 109:9296ab0bfc11 540 * @param __HANDLE__: DMA handle
Kojto 109:9296ab0bfc11 541 * @retval The specified half transfer complete flag index.
Kojto 109:9296ab0bfc11 542 */
Kojto 109:9296ab0bfc11 543 #define __HAL_DMA_GET_HT_FLAG_INDEX(__HANDLE__)\
Kojto 109:9296ab0bfc11 544 (((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel1))? DMA_FLAG_HT1 :\
Kojto 109:9296ab0bfc11 545 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel2))? DMA_FLAG_HT2 :\
Kojto 109:9296ab0bfc11 546 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel3))? DMA_FLAG_HT3 :\
Kojto 109:9296ab0bfc11 547 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel4))? DMA_FLAG_HT4 :\
Kojto 109:9296ab0bfc11 548 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel5))? DMA_FLAG_HT5 :\
Kojto 109:9296ab0bfc11 549 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel6))? DMA_FLAG_HT6 :\
Kojto 109:9296ab0bfc11 550 DMA_FLAG_HT7)
Kojto 109:9296ab0bfc11 551
Kojto 109:9296ab0bfc11 552 /**
Kojto 109:9296ab0bfc11 553 * @brief Returns the current DMA Channel transfer error flag.
Kojto 109:9296ab0bfc11 554 * @param __HANDLE__: DMA handle
Kojto 109:9296ab0bfc11 555 * @retval The specified transfer error flag index.
Kojto 109:9296ab0bfc11 556 */
Kojto 109:9296ab0bfc11 557 #define __HAL_DMA_GET_TE_FLAG_INDEX(__HANDLE__)\
Kojto 109:9296ab0bfc11 558 (((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel1))? DMA_FLAG_TE1 :\
Kojto 109:9296ab0bfc11 559 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel2))? DMA_FLAG_TE2 :\
Kojto 109:9296ab0bfc11 560 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel3))? DMA_FLAG_TE3 :\
Kojto 109:9296ab0bfc11 561 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel4))? DMA_FLAG_TE4 :\
Kojto 109:9296ab0bfc11 562 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel5))? DMA_FLAG_TE5 :\
Kojto 109:9296ab0bfc11 563 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel6))? DMA_FLAG_TE6 :\
Kojto 109:9296ab0bfc11 564 DMA_FLAG_TE7)
Kojto 109:9296ab0bfc11 565
Kojto 109:9296ab0bfc11 566 /**
Kojto 122:f9eeca106725 567 * @brief Return the current DMA Channel Global interrupt flag.
Kojto 122:f9eeca106725 568 * @param __HANDLE__: DMA handle
Kojto 122:f9eeca106725 569 * @retval The specified transfer error flag index.
Kojto 122:f9eeca106725 570 */
Kojto 122:f9eeca106725 571 #define __HAL_DMA_GET_GI_FLAG_INDEX(__HANDLE__)\
Kojto 122:f9eeca106725 572 (((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel1))? DMA_FLAG_GL1 :\
Kojto 122:f9eeca106725 573 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel2))? DMA_FLAG_GL2 :\
Kojto 122:f9eeca106725 574 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel3))? DMA_FLAG_GL3 :\
Kojto 122:f9eeca106725 575 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel4))? DMA_FLAG_GL4 :\
Kojto 122:f9eeca106725 576 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel5))? DMA_FLAG_GL5 :\
Kojto 122:f9eeca106725 577 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel6))? DMA_FLAG_GL6 :\
Kojto 122:f9eeca106725 578 DMA_FLAG_GL7)
Kojto 122:f9eeca106725 579
Kojto 122:f9eeca106725 580 /**
Kojto 109:9296ab0bfc11 581 * @brief Get the DMA Channel pending flags.
Kojto 109:9296ab0bfc11 582 * @param __HANDLE__: DMA handle
Kojto 109:9296ab0bfc11 583 * @param __FLAG__: Get the specified flag.
Kojto 109:9296ab0bfc11 584 * This parameter can be any combination of the following values:
Kojto 109:9296ab0bfc11 585 * @arg DMA_FLAG_TCx: Transfer complete flag
Kojto 109:9296ab0bfc11 586 * @arg DMA_FLAG_HTx: Half transfer complete flag
Kojto 109:9296ab0bfc11 587 * @arg DMA_FLAG_TEx: Transfer error flag
Kojto 109:9296ab0bfc11 588 * Where x can be 1_7 to select the DMA Channel flag.
Kojto 109:9296ab0bfc11 589 * @retval The state of FLAG (SET or RESET).
Kojto 109:9296ab0bfc11 590 */
Kojto 109:9296ab0bfc11 591
Kojto 109:9296ab0bfc11 592 #define __HAL_DMA_GET_FLAG(__HANDLE__, __FLAG__) (DMA1->ISR & (__FLAG__))
Kojto 109:9296ab0bfc11 593
Kojto 109:9296ab0bfc11 594 /**
Kojto 109:9296ab0bfc11 595 * @brief Clears the DMA Channel pending flags.
Kojto 109:9296ab0bfc11 596 * @param __HANDLE__: DMA handle
Kojto 109:9296ab0bfc11 597 * @param __FLAG__: specifies the flag to clear.
Kojto 109:9296ab0bfc11 598 * This parameter can be any combination of the following values:
Kojto 109:9296ab0bfc11 599 * @arg DMA_FLAG_TCx: Transfer complete flag
Kojto 109:9296ab0bfc11 600 * @arg DMA_FLAG_HTx: Half transfer complete flag
Kojto 109:9296ab0bfc11 601 * @arg DMA_FLAG_TEx: Transfer error flag
Kojto 109:9296ab0bfc11 602 * Where x can be 1_7 to select the DMA Channel flag.
Kojto 109:9296ab0bfc11 603 * @retval None
Kojto 109:9296ab0bfc11 604 */
Kojto 109:9296ab0bfc11 605 #define __HAL_DMA_CLEAR_FLAG(__HANDLE__, __FLAG__) (DMA1->IFCR = (__FLAG__))
Kojto 109:9296ab0bfc11 606
Kojto 109:9296ab0bfc11 607 #elif defined(STM32F091xC) || defined(STM32F098xx)
Kojto 109:9296ab0bfc11 608 /**
Kojto 109:9296ab0bfc11 609 * @brief Returns the current DMA Channel transfer complete flag.
Kojto 109:9296ab0bfc11 610 * @param __HANDLE__: DMA handle
Kojto 109:9296ab0bfc11 611 * @retval The specified transfer complete flag index.
Kojto 109:9296ab0bfc11 612 */
Kojto 109:9296ab0bfc11 613 #define __HAL_DMA_GET_TC_FLAG_INDEX(__HANDLE__) \
Kojto 109:9296ab0bfc11 614 (((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel1))? DMA_FLAG_TC1 :\
Kojto 109:9296ab0bfc11 615 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel2))? DMA_FLAG_TC2 :\
Kojto 109:9296ab0bfc11 616 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel3))? DMA_FLAG_TC3 :\
Kojto 109:9296ab0bfc11 617 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel4))? DMA_FLAG_TC4 :\
Kojto 109:9296ab0bfc11 618 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel5))? DMA_FLAG_TC5 :\
Kojto 109:9296ab0bfc11 619 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel6))? DMA_FLAG_TC6 :\
Kojto 109:9296ab0bfc11 620 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel7))? DMA_FLAG_TC7 :\
Kojto 109:9296ab0bfc11 621 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel1))? DMA_FLAG_TC1 :\
Kojto 109:9296ab0bfc11 622 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel2))? DMA_FLAG_TC2 :\
Kojto 109:9296ab0bfc11 623 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel3))? DMA_FLAG_TC3 :\
Kojto 109:9296ab0bfc11 624 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel4))? DMA_FLAG_TC4 :\
Kojto 109:9296ab0bfc11 625 DMA_FLAG_TC5)
Kojto 109:9296ab0bfc11 626
Kojto 109:9296ab0bfc11 627 /**
Kojto 109:9296ab0bfc11 628 * @brief Returns the current DMA Channel half transfer complete flag.
Kojto 109:9296ab0bfc11 629 * @param __HANDLE__: DMA handle
Kojto 109:9296ab0bfc11 630 * @retval The specified half transfer complete flag index.
Kojto 109:9296ab0bfc11 631 */
Kojto 109:9296ab0bfc11 632 #define __HAL_DMA_GET_HT_FLAG_INDEX(__HANDLE__)\
Kojto 109:9296ab0bfc11 633 (((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel1))? DMA_FLAG_HT1 :\
Kojto 109:9296ab0bfc11 634 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel2))? DMA_FLAG_HT2 :\
Kojto 109:9296ab0bfc11 635 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel3))? DMA_FLAG_HT3 :\
Kojto 109:9296ab0bfc11 636 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel4))? DMA_FLAG_HT4 :\
Kojto 109:9296ab0bfc11 637 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel5))? DMA_FLAG_HT5 :\
Kojto 109:9296ab0bfc11 638 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel6))? DMA_FLAG_HT6 :\
Kojto 109:9296ab0bfc11 639 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel7))? DMA_FLAG_HT7 :\
Kojto 109:9296ab0bfc11 640 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel1))? DMA_FLAG_HT1 :\
Kojto 109:9296ab0bfc11 641 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel2))? DMA_FLAG_HT2 :\
Kojto 109:9296ab0bfc11 642 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel3))? DMA_FLAG_HT3 :\
Kojto 109:9296ab0bfc11 643 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel4))? DMA_FLAG_HT4 :\
Kojto 109:9296ab0bfc11 644 DMA_FLAG_HT5)
Kojto 109:9296ab0bfc11 645
Kojto 109:9296ab0bfc11 646 /**
Kojto 109:9296ab0bfc11 647 * @brief Returns the current DMA Channel transfer error flag.
Kojto 109:9296ab0bfc11 648 * @param __HANDLE__: DMA handle
Kojto 109:9296ab0bfc11 649 * @retval The specified transfer error flag index.
Kojto 109:9296ab0bfc11 650 */
Kojto 109:9296ab0bfc11 651 #define __HAL_DMA_GET_TE_FLAG_INDEX(__HANDLE__)\
Kojto 109:9296ab0bfc11 652 (((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel1))? DMA_FLAG_TE1 :\
Kojto 109:9296ab0bfc11 653 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel2))? DMA_FLAG_TE2 :\
Kojto 109:9296ab0bfc11 654 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel3))? DMA_FLAG_TE3 :\
Kojto 109:9296ab0bfc11 655 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel4))? DMA_FLAG_TE4 :\
Kojto 109:9296ab0bfc11 656 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel5))? DMA_FLAG_TE5 :\
Kojto 109:9296ab0bfc11 657 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel6))? DMA_FLAG_TE6 :\
Kojto 109:9296ab0bfc11 658 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel7))? DMA_FLAG_TE7 :\
Kojto 109:9296ab0bfc11 659 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel1))? DMA_FLAG_TE1 :\
Kojto 109:9296ab0bfc11 660 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel2))? DMA_FLAG_TE2 :\
Kojto 109:9296ab0bfc11 661 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel3))? DMA_FLAG_TE3 :\
Kojto 109:9296ab0bfc11 662 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel4))? DMA_FLAG_TE4 :\
Kojto 109:9296ab0bfc11 663 DMA_FLAG_TE5)
Kojto 109:9296ab0bfc11 664
Kojto 109:9296ab0bfc11 665 /**
Kojto 122:f9eeca106725 666 * @brief Return the current DMA Channel Global interrupt flag.
Kojto 122:f9eeca106725 667 * @param __HANDLE__: DMA handle
Kojto 122:f9eeca106725 668 * @retval The specified transfer error flag index.
Kojto 122:f9eeca106725 669 */
Kojto 122:f9eeca106725 670 #define __HAL_DMA_GET_GI_FLAG_INDEX(__HANDLE__)\
Kojto 122:f9eeca106725 671 (((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel1))? DMA_FLAG_GL1 :\
Kojto 122:f9eeca106725 672 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel2))? DMA_FLAG_GL2 :\
Kojto 122:f9eeca106725 673 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel3))? DMA_FLAG_GL3 :\
Kojto 122:f9eeca106725 674 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel4))? DMA_FLAG_GL4 :\
Kojto 122:f9eeca106725 675 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel5))? DMA_FLAG_GL5 :\
Kojto 122:f9eeca106725 676 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel6))? DMA_FLAG_GL6 :\
Kojto 122:f9eeca106725 677 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel7))? DMA_FLAG_GL7 :\
Kojto 122:f9eeca106725 678 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel1))? DMA_FLAG_GL1 :\
Kojto 122:f9eeca106725 679 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel2))? DMA_FLAG_GL2 :\
Kojto 122:f9eeca106725 680 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel3))? DMA_FLAG_GL3 :\
Kojto 122:f9eeca106725 681 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel4))? DMA_FLAG_GL4 :\
Kojto 122:f9eeca106725 682 DMA_FLAG_GL5)
Kojto 122:f9eeca106725 683
Kojto 122:f9eeca106725 684 /**
Kojto 109:9296ab0bfc11 685 * @brief Get the DMA Channel pending flags.
Kojto 109:9296ab0bfc11 686 * @param __HANDLE__: DMA handle
Kojto 109:9296ab0bfc11 687 * @param __FLAG__: Get the specified flag.
Kojto 109:9296ab0bfc11 688 * This parameter can be any combination of the following values:
Kojto 109:9296ab0bfc11 689 * @arg DMA_FLAG_TCx: Transfer complete flag
Kojto 109:9296ab0bfc11 690 * @arg DMA_FLAG_HTx: Half transfer complete flag
Kojto 109:9296ab0bfc11 691 * @arg DMA_FLAG_TEx: Transfer error flag
Kojto 109:9296ab0bfc11 692 * Where x can be 0_4, 1_5, 2_6 or 3_7 to select the DMA Channel flag.
Kojto 109:9296ab0bfc11 693 * @retval The state of FLAG (SET or RESET).
Kojto 109:9296ab0bfc11 694 */
Kojto 109:9296ab0bfc11 695
Kojto 109:9296ab0bfc11 696 #define __HAL_DMA_GET_FLAG(__HANDLE__, __FLAG__)\
Kojto 109:9296ab0bfc11 697 (((uint32_t)((__HANDLE__)->Instance) > (uint32_t)DMA1_Channel7)? (DMA2->ISR & (__FLAG__)) :\
Kojto 109:9296ab0bfc11 698 (DMA1->ISR & (__FLAG__)))
Kojto 109:9296ab0bfc11 699
Kojto 109:9296ab0bfc11 700 /**
Kojto 109:9296ab0bfc11 701 * @brief Clears the DMA Channel pending flags.
Kojto 109:9296ab0bfc11 702 * @param __HANDLE__: DMA handle
Kojto 109:9296ab0bfc11 703 * @param __FLAG__: specifies the flag to clear.
Kojto 109:9296ab0bfc11 704 * This parameter can be any combination of the following values:
Kojto 109:9296ab0bfc11 705 * @arg DMA_FLAG_TCx: Transfer complete flag
Kojto 109:9296ab0bfc11 706 * @arg DMA_FLAG_HTx: Half transfer complete flag
Kojto 109:9296ab0bfc11 707 * @arg DMA_FLAG_TEx: Transfer error flag
Kojto 109:9296ab0bfc11 708 * Where x can be 0_4, 1_5, 2_6 or 3_7 to select the DMA Channel flag.
Kojto 109:9296ab0bfc11 709 * @retval None
Kojto 109:9296ab0bfc11 710 */
Kojto 109:9296ab0bfc11 711 #define __HAL_DMA_CLEAR_FLAG(__HANDLE__, __FLAG__) \
Kojto 109:9296ab0bfc11 712 (((uint32_t)((__HANDLE__)->Instance) > (uint32_t)DMA1_Channel7)? (DMA2->IFCR = (__FLAG__)) :\
Kojto 109:9296ab0bfc11 713 (DMA1->IFCR = (__FLAG__)))
Kojto 109:9296ab0bfc11 714
Kojto 109:9296ab0bfc11 715 #else /* STM32F030x8_STM32F030xC_STM32F031x6_STM32F038xx_STM32F051x8_STM32F058xx_STM32F070x6_STM32F070xB Product devices */
Kojto 109:9296ab0bfc11 716 /**
Kojto 109:9296ab0bfc11 717 * @brief Returns the current DMA Channel transfer complete flag.
Kojto 109:9296ab0bfc11 718 * @param __HANDLE__: DMA handle
Kojto 109:9296ab0bfc11 719 * @retval The specified transfer complete flag index.
Kojto 109:9296ab0bfc11 720 */
Kojto 109:9296ab0bfc11 721 #define __HAL_DMA_GET_TC_FLAG_INDEX(__HANDLE__) \
Kojto 109:9296ab0bfc11 722 (((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel1))? DMA_FLAG_TC1 :\
Kojto 109:9296ab0bfc11 723 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel2))? DMA_FLAG_TC2 :\
Kojto 109:9296ab0bfc11 724 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel3))? DMA_FLAG_TC3 :\
Kojto 109:9296ab0bfc11 725 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel4))? DMA_FLAG_TC4 :\
Kojto 109:9296ab0bfc11 726 DMA_FLAG_TC5)
Kojto 109:9296ab0bfc11 727
Kojto 109:9296ab0bfc11 728 /**
Kojto 109:9296ab0bfc11 729 * @brief Returns the current DMA Channel half transfer complete flag.
Kojto 109:9296ab0bfc11 730 * @param __HANDLE__: DMA handle
Kojto 109:9296ab0bfc11 731 * @retval The specified half transfer complete flag index.
Kojto 109:9296ab0bfc11 732 */
Kojto 109:9296ab0bfc11 733 #define __HAL_DMA_GET_HT_FLAG_INDEX(__HANDLE__)\
Kojto 109:9296ab0bfc11 734 (((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel1))? DMA_FLAG_HT1 :\
Kojto 109:9296ab0bfc11 735 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel2))? DMA_FLAG_HT2 :\
Kojto 109:9296ab0bfc11 736 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel3))? DMA_FLAG_HT3 :\
Kojto 109:9296ab0bfc11 737 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel4))? DMA_FLAG_HT4 :\
Kojto 109:9296ab0bfc11 738 DMA_FLAG_HT5)
Kojto 109:9296ab0bfc11 739
Kojto 109:9296ab0bfc11 740 /**
Kojto 109:9296ab0bfc11 741 * @brief Returns the current DMA Channel transfer error flag.
Kojto 109:9296ab0bfc11 742 * @param __HANDLE__: DMA handle
Kojto 109:9296ab0bfc11 743 * @retval The specified transfer error flag index.
Kojto 109:9296ab0bfc11 744 */
Kojto 109:9296ab0bfc11 745 #define __HAL_DMA_GET_TE_FLAG_INDEX(__HANDLE__)\
Kojto 109:9296ab0bfc11 746 (((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel1))? DMA_FLAG_TE1 :\
Kojto 109:9296ab0bfc11 747 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel2))? DMA_FLAG_TE2 :\
Kojto 109:9296ab0bfc11 748 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel3))? DMA_FLAG_TE3 :\
Kojto 109:9296ab0bfc11 749 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel4))? DMA_FLAG_TE4 :\
Kojto 109:9296ab0bfc11 750 DMA_FLAG_TE5)
Kojto 109:9296ab0bfc11 751
Kojto 109:9296ab0bfc11 752 /**
Kojto 122:f9eeca106725 753 * @brief Return the current DMA Channel Global interrupt flag.
Kojto 122:f9eeca106725 754 * @param __HANDLE__: DMA handle
Kojto 122:f9eeca106725 755 * @retval The specified transfer error flag index.
Kojto 122:f9eeca106725 756 */
Kojto 122:f9eeca106725 757 #define __HAL_DMA_GET_GI_FLAG_INDEX(__HANDLE__)\
Kojto 122:f9eeca106725 758 (((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel1))? DMA_FLAG_GL1 :\
Kojto 122:f9eeca106725 759 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel2))? DMA_FLAG_GL2 :\
Kojto 122:f9eeca106725 760 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel3))? DMA_FLAG_GL3 :\
Kojto 122:f9eeca106725 761 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel4))? DMA_FLAG_GL4 :\
Kojto 122:f9eeca106725 762 DMA_FLAG_GL5)
Kojto 122:f9eeca106725 763
Kojto 122:f9eeca106725 764 /**
Kojto 109:9296ab0bfc11 765 * @brief Get the DMA Channel pending flags.
Kojto 109:9296ab0bfc11 766 * @param __HANDLE__: DMA handle
Kojto 109:9296ab0bfc11 767 * @param __FLAG__: Get the specified flag.
Kojto 109:9296ab0bfc11 768 * This parameter can be any combination of the following values:
Kojto 109:9296ab0bfc11 769 * @arg DMA_FLAG_TCx: Transfer complete flag
Kojto 109:9296ab0bfc11 770 * @arg DMA_FLAG_HTx: Half transfer complete flag
Kojto 109:9296ab0bfc11 771 * @arg DMA_FLAG_TEx: Transfer error flag
Kojto 109:9296ab0bfc11 772 * Where x can be 1_5 to select the DMA Channel flag.
Kojto 109:9296ab0bfc11 773 * @retval The state of FLAG (SET or RESET).
Kojto 109:9296ab0bfc11 774 */
Kojto 109:9296ab0bfc11 775
Kojto 109:9296ab0bfc11 776 #define __HAL_DMA_GET_FLAG(__HANDLE__, __FLAG__) (DMA1->ISR & (__FLAG__))
Kojto 109:9296ab0bfc11 777
Kojto 109:9296ab0bfc11 778 /**
Kojto 109:9296ab0bfc11 779 * @brief Clears the DMA Channel pending flags.
Kojto 109:9296ab0bfc11 780 * @param __HANDLE__: DMA handle
Kojto 109:9296ab0bfc11 781 * @param __FLAG__: specifies the flag to clear.
Kojto 109:9296ab0bfc11 782 * This parameter can be any combination of the following values:
Kojto 109:9296ab0bfc11 783 * @arg DMA_FLAG_TCx: Transfer complete flag
Kojto 109:9296ab0bfc11 784 * @arg DMA_FLAG_HTx: Half transfer complete flag
Kojto 109:9296ab0bfc11 785 * @arg DMA_FLAG_TEx: Transfer error flag
Kojto 109:9296ab0bfc11 786 * Where x can be 1_5 to select the DMA Channel flag.
Kojto 109:9296ab0bfc11 787 * @retval None
Kojto 109:9296ab0bfc11 788 */
Kojto 109:9296ab0bfc11 789 #define __HAL_DMA_CLEAR_FLAG(__HANDLE__, __FLAG__) (DMA1->IFCR = (__FLAG__))
Kojto 109:9296ab0bfc11 790
Kojto 109:9296ab0bfc11 791 #endif
Kojto 109:9296ab0bfc11 792
Kojto 109:9296ab0bfc11 793
Kojto 109:9296ab0bfc11 794 #if defined(STM32F091xC) || defined(STM32F098xx) || defined(STM32F030xC)
Kojto 109:9296ab0bfc11 795 #define __HAL_DMA1_REMAP(__REQUEST__) \
Kojto 109:9296ab0bfc11 796 do { assert_param(IS_HAL_DMA1_REMAP(__REQUEST__)); \
Kojto 109:9296ab0bfc11 797 DMA1->CSELR &= ~((uint32_t)0x0F << (uint32_t)(((__REQUEST__) >> 28) * 4)); \
Kojto 109:9296ab0bfc11 798 DMA1->CSELR |= (uint32_t)((__REQUEST__) & 0x0FFFFFFF); \
Kojto 109:9296ab0bfc11 799 }while(0)
Kojto 109:9296ab0bfc11 800
Kojto 109:9296ab0bfc11 801 #if defined(STM32F091xC) || defined(STM32F098xx)
Kojto 109:9296ab0bfc11 802 #define __HAL_DMA2_REMAP(__REQUEST__) \
Kojto 109:9296ab0bfc11 803 do { assert_param(IS_HAL_DMA2_REMAP(__REQUEST__)); \
Kojto 109:9296ab0bfc11 804 DMA2->CSELR &= ~((uint32_t)0x0F << (uint32_t)(((__REQUEST__) >> 28) * 4)); \
Kojto 109:9296ab0bfc11 805 DMA2->CSELR |= (uint32_t)((__REQUEST__) & 0x0FFFFFFF); \
Kojto 109:9296ab0bfc11 806 }while(0)
Kojto 109:9296ab0bfc11 807 #endif /* STM32F091xC || STM32F098xx */
Kojto 109:9296ab0bfc11 808
Kojto 109:9296ab0bfc11 809 #endif /* STM32F091xC || STM32F098xx || STM32F030xC */
Kojto 109:9296ab0bfc11 810
Kojto 109:9296ab0bfc11 811 /**
Kojto 109:9296ab0bfc11 812 * @}
Kojto 109:9296ab0bfc11 813 */
Kojto 109:9296ab0bfc11 814
Kojto 109:9296ab0bfc11 815 /**
Kojto 109:9296ab0bfc11 816 * @}
Kojto 109:9296ab0bfc11 817 */
Kojto 109:9296ab0bfc11 818
Kojto 109:9296ab0bfc11 819 /**
Kojto 109:9296ab0bfc11 820 * @}
Kojto 109:9296ab0bfc11 821 */
Kojto 109:9296ab0bfc11 822
Kojto 109:9296ab0bfc11 823 #ifdef __cplusplus
Kojto 109:9296ab0bfc11 824 }
Kojto 109:9296ab0bfc11 825 #endif
Kojto 109:9296ab0bfc11 826
Kojto 109:9296ab0bfc11 827 #endif /* __STM32F0xx_HAL_DMA_EX_H */
Kojto 109:9296ab0bfc11 828
Kojto 109:9296ab0bfc11 829 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/