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TARGET_NUCLEO_F767ZI/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_ll_gpio.h@163:e59c8e839560, 2018-03-20 (annotated)

Committer:
AnnaBridge
Date:
Tue Mar 20 13:30:58 2018 +0000
Revision:
163:e59c8e839560
Parent:
139:856d2700e60b 
mbed library. Release version 160

Who changed what in which revision?

UserRevisionLine numberNew contents of line
<> 139:856d2700e60b 1 /**
<> 139:856d2700e60b 2 ******************************************************************************
<> 139:856d2700e60b 3 * @file stm32f7xx_ll_gpio.h
<> 139:856d2700e60b 4 * @author MCD Application Team
<> 139:856d2700e60b 5 * @brief Header file of GPIO LL module.
<> 139:856d2700e60b 6 ******************************************************************************
<> 139:856d2700e60b 7 * @attention
<> 139:856d2700e60b 8 *
<> 139:856d2700e60b 9 * <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
<> 139:856d2700e60b 10 *
<> 139:856d2700e60b 11 * Redistribution and use in source and binary forms, with or without modification,
<> 139:856d2700e60b 12 * are permitted provided that the following conditions are met:
<> 139:856d2700e60b 13 * 1. Redistributions of source code must retain the above copyright notice,
<> 139:856d2700e60b 14 * this list of conditions and the following disclaimer.
<> 139:856d2700e60b 15 * 2. Redistributions in binary form must reproduce the above copyright notice,
<> 139:856d2700e60b 16 * this list of conditions and the following disclaimer in the documentation
<> 139:856d2700e60b 17 * and/or other materials provided with the distribution.
<> 139:856d2700e60b 18 * 3. Neither the name of STMicroelectronics nor the names of its contributors
<> 139:856d2700e60b 19 * may be used to endorse or promote products derived from this software
<> 139:856d2700e60b 20 * without specific prior written permission.
<> 139:856d2700e60b 21 *
<> 139:856d2700e60b 22 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
<> 139:856d2700e60b 23 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
<> 139:856d2700e60b 24 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
<> 139:856d2700e60b 25 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
<> 139:856d2700e60b 26 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
<> 139:856d2700e60b 27 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
<> 139:856d2700e60b 28 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
<> 139:856d2700e60b 29 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
<> 139:856d2700e60b 30 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
<> 139:856d2700e60b 31 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
<> 139:856d2700e60b 32 *
<> 139:856d2700e60b 33 ******************************************************************************
<> 139:856d2700e60b 34 */
<> 139:856d2700e60b 35
<> 139:856d2700e60b 36 /* Define to prevent recursive inclusion -------------------------------------*/
<> 139:856d2700e60b 37 #ifndef __STM32F7xx_LL_GPIO_H
<> 139:856d2700e60b 38 #define __STM32F7xx_LL_GPIO_H
<> 139:856d2700e60b 39
<> 139:856d2700e60b 40 #ifdef __cplusplus
<> 139:856d2700e60b 41 extern "C" {
<> 139:856d2700e60b 42 #endif
<> 139:856d2700e60b 43
<> 139:856d2700e60b 44 /* Includes ------------------------------------------------------------------*/
<> 139:856d2700e60b 45 #include "stm32f7xx.h"
<> 139:856d2700e60b 46
<> 139:856d2700e60b 47 /** @addtogroup STM32F7xx_LL_Driver
<> 139:856d2700e60b 48 * @{
<> 139:856d2700e60b 49 */
<> 139:856d2700e60b 50
<> 139:856d2700e60b 51 #if defined (GPIOA) || defined (GPIOB) || defined (GPIOC) || defined (GPIOD) || defined (GPIOE) || defined (GPIOF) || defined (GPIOG) || defined (GPIOH) || defined (GPIOI) || defined (GPIOJ) || defined (GPIOK)
<> 139:856d2700e60b 52
<> 139:856d2700e60b 53 /** @defgroup GPIO_LL GPIO
<> 139:856d2700e60b 54 * @{
<> 139:856d2700e60b 55 */
<> 139:856d2700e60b 56
<> 139:856d2700e60b 57 /* Private types -------------------------------------------------------------*/
<> 139:856d2700e60b 58 /* Private variables ---------------------------------------------------------*/
<> 139:856d2700e60b 59 /* Private constants ---------------------------------------------------------*/
<> 139:856d2700e60b 60 /* Private macros ------------------------------------------------------------*/
<> 139:856d2700e60b 61 #if defined(USE_FULL_LL_DRIVER)
<> 139:856d2700e60b 62 /** @defgroup GPIO_LL_Private_Macros GPIO Private Macros
<> 139:856d2700e60b 63 * @{
<> 139:856d2700e60b 64 */
<> 139:856d2700e60b 65
<> 139:856d2700e60b 66 /**
<> 139:856d2700e60b 67 * @}
<> 139:856d2700e60b 68 */
<> 139:856d2700e60b 69 #endif /*USE_FULL_LL_DRIVER*/
<> 139:856d2700e60b 70
<> 139:856d2700e60b 71 /* Exported types ------------------------------------------------------------*/
<> 139:856d2700e60b 72 #if defined(USE_FULL_LL_DRIVER)
<> 139:856d2700e60b 73 /** @defgroup GPIO_LL_ES_INIT GPIO Exported Init structures
<> 139:856d2700e60b 74 * @{
<> 139:856d2700e60b 75 */
<> 139:856d2700e60b 76
<> 139:856d2700e60b 77 /**
<> 139:856d2700e60b 78 * @brief LL GPIO Init Structure definition
<> 139:856d2700e60b 79 */
<> 139:856d2700e60b 80 typedef struct
<> 139:856d2700e60b 81 {
<> 139:856d2700e60b 82 uint32_t Pin; /*!< Specifies the GPIO pins to be configured.
<> 139:856d2700e60b 83 This parameter can be any value of @ref GPIO_LL_EC_PIN */
<> 139:856d2700e60b 84
<> 139:856d2700e60b 85 uint32_t Mode; /*!< Specifies the operating mode for the selected pins.
<> 139:856d2700e60b 86 This parameter can be a value of @ref GPIO_LL_EC_MODE.
<> 139:856d2700e60b 87
<> 139:856d2700e60b 88 GPIO HW configuration can be modified afterwards using unitary function @ref LL_GPIO_SetPinMode().*/
<> 139:856d2700e60b 89
<> 139:856d2700e60b 90 uint32_t Speed; /*!< Specifies the speed for the selected pins.
<> 139:856d2700e60b 91 This parameter can be a value of @ref GPIO_LL_EC_SPEED.
<> 139:856d2700e60b 92
<> 139:856d2700e60b 93 GPIO HW configuration can be modified afterwards using unitary function @ref LL_GPIO_SetPinSpeed().*/
<> 139:856d2700e60b 94
<> 139:856d2700e60b 95 uint32_t OutputType; /*!< Specifies the operating output type for the selected pins.
<> 139:856d2700e60b 96 This parameter can be a value of @ref GPIO_LL_EC_OUTPUT.
<> 139:856d2700e60b 97
<> 139:856d2700e60b 98 GPIO HW configuration can be modified afterwards using unitary function @ref LL_GPIO_SetPinOutputType().*/
<> 139:856d2700e60b 99
<> 139:856d2700e60b 100 uint32_t Pull; /*!< Specifies the operating Pull-up/Pull down for the selected pins.
<> 139:856d2700e60b 101 This parameter can be a value of @ref GPIO_LL_EC_PULL.
<> 139:856d2700e60b 102
<> 139:856d2700e60b 103 GPIO HW configuration can be modified afterwards using unitary function @ref LL_GPIO_SetPinPull().*/
<> 139:856d2700e60b 104
<> 139:856d2700e60b 105 uint32_t Alternate; /*!< Specifies the Peripheral to be connected to the selected pins.
<> 139:856d2700e60b 106 This parameter can be a value of @ref GPIO_LL_EC_AF.
<> 139:856d2700e60b 107
<> 139:856d2700e60b 108 GPIO HW configuration can be modified afterwards using unitary function @ref LL_GPIO_SetAFPin_0_7() and LL_GPIO_SetAFPin_8_15().*/
<> 139:856d2700e60b 109 } LL_GPIO_InitTypeDef;
<> 139:856d2700e60b 110
<> 139:856d2700e60b 111 /**
<> 139:856d2700e60b 112 * @}
<> 139:856d2700e60b 113 */
<> 139:856d2700e60b 114 #endif /* USE_FULL_LL_DRIVER */
<> 139:856d2700e60b 115
<> 139:856d2700e60b 116 /* Exported constants --------------------------------------------------------*/
<> 139:856d2700e60b 117 /** @defgroup GPIO_LL_Exported_Constants GPIO Exported Constants
<> 139:856d2700e60b 118 * @{
<> 139:856d2700e60b 119 */
<> 139:856d2700e60b 120
<> 139:856d2700e60b 121 /** @defgroup GPIO_LL_EC_PIN PIN
<> 139:856d2700e60b 122 * @{
<> 139:856d2700e60b 123 */
<> 139:856d2700e60b 124 #define LL_GPIO_PIN_0 GPIO_BSRR_BS_0 /*!< Select pin 0 */
<> 139:856d2700e60b 125 #define LL_GPIO_PIN_1 GPIO_BSRR_BS_1 /*!< Select pin 1 */
<> 139:856d2700e60b 126 #define LL_GPIO_PIN_2 GPIO_BSRR_BS_2 /*!< Select pin 2 */
<> 139:856d2700e60b 127 #define LL_GPIO_PIN_3 GPIO_BSRR_BS_3 /*!< Select pin 3 */
<> 139:856d2700e60b 128 #define LL_GPIO_PIN_4 GPIO_BSRR_BS_4 /*!< Select pin 4 */
<> 139:856d2700e60b 129 #define LL_GPIO_PIN_5 GPIO_BSRR_BS_5 /*!< Select pin 5 */
<> 139:856d2700e60b 130 #define LL_GPIO_PIN_6 GPIO_BSRR_BS_6 /*!< Select pin 6 */
<> 139:856d2700e60b 131 #define LL_GPIO_PIN_7 GPIO_BSRR_BS_7 /*!< Select pin 7 */
<> 139:856d2700e60b 132 #define LL_GPIO_PIN_8 GPIO_BSRR_BS_8 /*!< Select pin 8 */
<> 139:856d2700e60b 133 #define LL_GPIO_PIN_9 GPIO_BSRR_BS_9 /*!< Select pin 9 */
<> 139:856d2700e60b 134 #define LL_GPIO_PIN_10 GPIO_BSRR_BS_10 /*!< Select pin 10 */
<> 139:856d2700e60b 135 #define LL_GPIO_PIN_11 GPIO_BSRR_BS_11 /*!< Select pin 11 */
<> 139:856d2700e60b 136 #define LL_GPIO_PIN_12 GPIO_BSRR_BS_12 /*!< Select pin 12 */
<> 139:856d2700e60b 137 #define LL_GPIO_PIN_13 GPIO_BSRR_BS_13 /*!< Select pin 13 */
<> 139:856d2700e60b 138 #define LL_GPIO_PIN_14 GPIO_BSRR_BS_14 /*!< Select pin 14 */
<> 139:856d2700e60b 139 #define LL_GPIO_PIN_15 GPIO_BSRR_BS_15 /*!< Select pin 15 */
<> 139:856d2700e60b 140 #define LL_GPIO_PIN_ALL (GPIO_BSRR_BS_0 | GPIO_BSRR_BS_1 | GPIO_BSRR_BS_2 | \
<> 139:856d2700e60b 141 GPIO_BSRR_BS_3 | GPIO_BSRR_BS_4 | GPIO_BSRR_BS_5 | \
<> 139:856d2700e60b 142 GPIO_BSRR_BS_6 | GPIO_BSRR_BS_7 | GPIO_BSRR_BS_8 | \
<> 139:856d2700e60b 143 GPIO_BSRR_BS_9 | GPIO_BSRR_BS_10 | GPIO_BSRR_BS_11 | \
<> 139:856d2700e60b 144 GPIO_BSRR_BS_12 | GPIO_BSRR_BS_13 | GPIO_BSRR_BS_14 | \
<> 139:856d2700e60b 145 GPIO_BSRR_BS_15) /*!< Select all pins */
<> 139:856d2700e60b 146 /**
<> 139:856d2700e60b 147 * @}
<> 139:856d2700e60b 148 */
<> 139:856d2700e60b 149
<> 139:856d2700e60b 150 /** @defgroup GPIO_LL_EC_MODE Mode
<> 139:856d2700e60b 151 * @{
<> 139:856d2700e60b 152 */
<> 139:856d2700e60b 153 #define LL_GPIO_MODE_INPUT (0x00000000U) /*!< Select input mode */
<> 139:856d2700e60b 154 #define LL_GPIO_MODE_OUTPUT GPIO_MODER_MODER0_0 /*!< Select output mode */
<> 139:856d2700e60b 155 #define LL_GPIO_MODE_ALTERNATE GPIO_MODER_MODER0_1 /*!< Select alternate function mode */
<> 139:856d2700e60b 156 #define LL_GPIO_MODE_ANALOG GPIO_MODER_MODER0 /*!< Select analog mode */
<> 139:856d2700e60b 157 /**
<> 139:856d2700e60b 158 * @}
<> 139:856d2700e60b 159 */
<> 139:856d2700e60b 160
<> 139:856d2700e60b 161 /** @defgroup GPIO_LL_EC_OUTPUT Output Type
<> 139:856d2700e60b 162 * @{
<> 139:856d2700e60b 163 */
<> 139:856d2700e60b 164 #define LL_GPIO_OUTPUT_PUSHPULL (0x00000000U) /*!< Select push-pull as output type */
<> 139:856d2700e60b 165 #define LL_GPIO_OUTPUT_OPENDRAIN GPIO_OTYPER_OT_0 /*!< Select open-drain as output type */
<> 139:856d2700e60b 166 /**
<> 139:856d2700e60b 167 * @}
<> 139:856d2700e60b 168 */
<> 139:856d2700e60b 169
<> 139:856d2700e60b 170 /** @defgroup GPIO_LL_EC_SPEED Output Speed
<> 139:856d2700e60b 171 * @{
<> 139:856d2700e60b 172 */
<> 139:856d2700e60b 173 #define LL_GPIO_SPEED_FREQ_LOW (0x00000000U) /*!< Select I/O low output speed */
<> 139:856d2700e60b 174 #define LL_GPIO_SPEED_FREQ_MEDIUM GPIO_OSPEEDER_OSPEEDR0_0 /*!< Select I/O medium output speed */
<> 139:856d2700e60b 175 #define LL_GPIO_SPEED_FREQ_HIGH GPIO_OSPEEDER_OSPEEDR0_1 /*!< Select I/O fast output speed */
<> 139:856d2700e60b 176 #define LL_GPIO_SPEED_FREQ_VERY_HIGH GPIO_OSPEEDER_OSPEEDR0 /*!< Select I/O high output speed */
<> 139:856d2700e60b 177 /**
<> 139:856d2700e60b 178 * @}
<> 139:856d2700e60b 179 */
<> 139:856d2700e60b 180
<> 139:856d2700e60b 181 /** @defgroup GPIO_LL_EC_PULL Pull Up Pull Down
<> 139:856d2700e60b 182 * @{
<> 139:856d2700e60b 183 */
<> 139:856d2700e60b 184 #define LL_GPIO_PULL_NO (0x00000000U) /*!< Select I/O no pull */
<> 139:856d2700e60b 185 #define LL_GPIO_PULL_UP GPIO_PUPDR_PUPDR0_0 /*!< Select I/O pull up */
<> 139:856d2700e60b 186 #define LL_GPIO_PULL_DOWN GPIO_PUPDR_PUPDR0_1 /*!< Select I/O pull down */
<> 139:856d2700e60b 187 /**
<> 139:856d2700e60b 188 * @}
<> 139:856d2700e60b 189 */
<> 139:856d2700e60b 190
<> 139:856d2700e60b 191 /** @defgroup GPIO_LL_EC_AF Alternate Function
<> 139:856d2700e60b 192 * @{
<> 139:856d2700e60b 193 */
<> 139:856d2700e60b 194 #define LL_GPIO_AF_0 (0x0000000U) /*!< Select alternate function 0 */
<> 139:856d2700e60b 195 #define LL_GPIO_AF_1 (0x0000001U) /*!< Select alternate function 1 */
<> 139:856d2700e60b 196 #define LL_GPIO_AF_2 (0x0000002U) /*!< Select alternate function 2 */
<> 139:856d2700e60b 197 #define LL_GPIO_AF_3 (0x0000003U) /*!< Select alternate function 3 */
<> 139:856d2700e60b 198 #define LL_GPIO_AF_4 (0x0000004U) /*!< Select alternate function 4 */
<> 139:856d2700e60b 199 #define LL_GPIO_AF_5 (0x0000005U) /*!< Select alternate function 5 */
<> 139:856d2700e60b 200 #define LL_GPIO_AF_6 (0x0000006U) /*!< Select alternate function 6 */
<> 139:856d2700e60b 201 #define LL_GPIO_AF_7 (0x0000007U) /*!< Select alternate function 7 */
<> 139:856d2700e60b 202 #define LL_GPIO_AF_8 (0x0000008U) /*!< Select alternate function 8 */
<> 139:856d2700e60b 203 #define LL_GPIO_AF_9 (0x0000009U) /*!< Select alternate function 9 */
<> 139:856d2700e60b 204 #define LL_GPIO_AF_10 (0x000000AU) /*!< Select alternate function 10 */
<> 139:856d2700e60b 205 #define LL_GPIO_AF_11 (0x000000BU) /*!< Select alternate function 11 */
<> 139:856d2700e60b 206 #define LL_GPIO_AF_12 (0x000000CU) /*!< Select alternate function 12 */
<> 139:856d2700e60b 207 #define LL_GPIO_AF_13 (0x000000DU) /*!< Select alternate function 13 */
<> 139:856d2700e60b 208 #define LL_GPIO_AF_14 (0x000000EU) /*!< Select alternate function 14 */
<> 139:856d2700e60b 209 #define LL_GPIO_AF_15 (0x000000FU) /*!< Select alternate function 15 */
<> 139:856d2700e60b 210 /**
<> 139:856d2700e60b 211 * @}
<> 139:856d2700e60b 212 */
<> 139:856d2700e60b 213
<> 139:856d2700e60b 214 /**
<> 139:856d2700e60b 215 * @}
<> 139:856d2700e60b 216 */
<> 139:856d2700e60b 217
<> 139:856d2700e60b 218 /* Exported macro ------------------------------------------------------------*/
<> 139:856d2700e60b 219 /** @defgroup GPIO_LL_Exported_Macros GPIO Exported Macros
<> 139:856d2700e60b 220 * @{
<> 139:856d2700e60b 221 */
<> 139:856d2700e60b 222
<> 139:856d2700e60b 223 /** @defgroup GPIO_LL_EM_WRITE_READ Common Write and read registers Macros
<> 139:856d2700e60b 224 * @{
<> 139:856d2700e60b 225 */
<> 139:856d2700e60b 226
<> 139:856d2700e60b 227 /**
<> 139:856d2700e60b 228 * @brief Write a value in GPIO register
<> 139:856d2700e60b 229 * @param __INSTANCE__ GPIO Instance
<> 139:856d2700e60b 230 * @param __REG__ Register to be written
<> 139:856d2700e60b 231 * @param __VALUE__ Value to be written in the register
<> 139:856d2700e60b 232 * @retval None
<> 139:856d2700e60b 233 */
<> 139:856d2700e60b 234 #define LL_GPIO_WriteReg(__INSTANCE__, __REG__, __VALUE__) WRITE_REG(__INSTANCE__->__REG__, (__VALUE__))
<> 139:856d2700e60b 235
<> 139:856d2700e60b 236 /**
<> 139:856d2700e60b 237 * @brief Read a value in GPIO register
<> 139:856d2700e60b 238 * @param __INSTANCE__ GPIO Instance
<> 139:856d2700e60b 239 * @param __REG__ Register to be read
<> 139:856d2700e60b 240 * @retval Register value
<> 139:856d2700e60b 241 */
<> 139:856d2700e60b 242 #define LL_GPIO_ReadReg(__INSTANCE__, __REG__) READ_REG(__INSTANCE__->__REG__)
<> 139:856d2700e60b 243 /**
<> 139:856d2700e60b 244 * @}
<> 139:856d2700e60b 245 */
<> 139:856d2700e60b 246
<> 139:856d2700e60b 247 /**
<> 139:856d2700e60b 248 * @}
<> 139:856d2700e60b 249 */
<> 139:856d2700e60b 250
<> 139:856d2700e60b 251 /* Exported functions --------------------------------------------------------*/
<> 139:856d2700e60b 252 /** @defgroup GPIO_LL_Exported_Functions GPIO Exported Functions
<> 139:856d2700e60b 253 * @{
<> 139:856d2700e60b 254 */
<> 139:856d2700e60b 255
<> 139:856d2700e60b 256 /** @defgroup GPIO_LL_EF_Port_Configuration Port Configuration
<> 139:856d2700e60b 257 * @{
<> 139:856d2700e60b 258 */
<> 139:856d2700e60b 259
<> 139:856d2700e60b 260 /**
<> 139:856d2700e60b 261 * @brief Configure gpio mode for a dedicated pin on dedicated port.
<> 139:856d2700e60b 262 * @note I/O mode can be Input mode, General purpose output, Alternate function mode or Analog.
<> 139:856d2700e60b 263 * @note Warning: only one pin can be passed as parameter.
<> 139:856d2700e60b 264 * @rmtoll MODER MODEy LL_GPIO_SetPinMode
<> 139:856d2700e60b 265 * @param GPIOx GPIO Port
<> 139:856d2700e60b 266 * @param Pin This parameter can be one of the following values:
<> 139:856d2700e60b 267 * @arg @ref LL_GPIO_PIN_0
<> 139:856d2700e60b 268 * @arg @ref LL_GPIO_PIN_1
<> 139:856d2700e60b 269 * @arg @ref LL_GPIO_PIN_2
<> 139:856d2700e60b 270 * @arg @ref LL_GPIO_PIN_3
<> 139:856d2700e60b 271 * @arg @ref LL_GPIO_PIN_4
<> 139:856d2700e60b 272 * @arg @ref LL_GPIO_PIN_5
<> 139:856d2700e60b 273 * @arg @ref LL_GPIO_PIN_6
<> 139:856d2700e60b 274 * @arg @ref LL_GPIO_PIN_7
<> 139:856d2700e60b 275 * @arg @ref LL_GPIO_PIN_8
<> 139:856d2700e60b 276 * @arg @ref LL_GPIO_PIN_9
<> 139:856d2700e60b 277 * @arg @ref LL_GPIO_PIN_10
<> 139:856d2700e60b 278 * @arg @ref LL_GPIO_PIN_11
<> 139:856d2700e60b 279 * @arg @ref LL_GPIO_PIN_12
<> 139:856d2700e60b 280 * @arg @ref LL_GPIO_PIN_13
<> 139:856d2700e60b 281 * @arg @ref LL_GPIO_PIN_14
<> 139:856d2700e60b 282 * @arg @ref LL_GPIO_PIN_15
<> 139:856d2700e60b 283 * @param Mode This parameter can be one of the following values:
<> 139:856d2700e60b 284 * @arg @ref LL_GPIO_MODE_INPUT
<> 139:856d2700e60b 285 * @arg @ref LL_GPIO_MODE_OUTPUT
<> 139:856d2700e60b 286 * @arg @ref LL_GPIO_MODE_ALTERNATE
<> 139:856d2700e60b 287 * @arg @ref LL_GPIO_MODE_ANALOG
<> 139:856d2700e60b 288 * @retval None
<> 139:856d2700e60b 289 */
<> 139:856d2700e60b 290 __STATIC_INLINE void LL_GPIO_SetPinMode(GPIO_TypeDef *GPIOx, uint32_t Pin, uint32_t Mode)
<> 139:856d2700e60b 291 {
<> 139:856d2700e60b 292 MODIFY_REG(GPIOx->MODER, (GPIO_MODER_MODER0 << (POSITION_VAL(Pin) * 2U)), (Mode << (POSITION_VAL(Pin) * 2U)));
<> 139:856d2700e60b 293 }
<> 139:856d2700e60b 294
<> 139:856d2700e60b 295 /**
<> 139:856d2700e60b 296 * @brief Return gpio mode for a dedicated pin on dedicated port.
<> 139:856d2700e60b 297 * @note I/O mode can be Input mode, General purpose output, Alternate function mode or Analog.
<> 139:856d2700e60b 298 * @note Warning: only one pin can be passed as parameter.
<> 139:856d2700e60b 299 * @rmtoll MODER MODEy LL_GPIO_GetPinMode
<> 139:856d2700e60b 300 * @param GPIOx GPIO Port
<> 139:856d2700e60b 301 * @param Pin This parameter can be one of the following values:
<> 139:856d2700e60b 302 * @arg @ref LL_GPIO_PIN_0
<> 139:856d2700e60b 303 * @arg @ref LL_GPIO_PIN_1
<> 139:856d2700e60b 304 * @arg @ref LL_GPIO_PIN_2
<> 139:856d2700e60b 305 * @arg @ref LL_GPIO_PIN_3
<> 139:856d2700e60b 306 * @arg @ref LL_GPIO_PIN_4
<> 139:856d2700e60b 307 * @arg @ref LL_GPIO_PIN_5
<> 139:856d2700e60b 308 * @arg @ref LL_GPIO_PIN_6
<> 139:856d2700e60b 309 * @arg @ref LL_GPIO_PIN_7
<> 139:856d2700e60b 310 * @arg @ref LL_GPIO_PIN_8
<> 139:856d2700e60b 311 * @arg @ref LL_GPIO_PIN_9
<> 139:856d2700e60b 312 * @arg @ref LL_GPIO_PIN_10
<> 139:856d2700e60b 313 * @arg @ref LL_GPIO_PIN_11
<> 139:856d2700e60b 314 * @arg @ref LL_GPIO_PIN_12
<> 139:856d2700e60b 315 * @arg @ref LL_GPIO_PIN_13
<> 139:856d2700e60b 316 * @arg @ref LL_GPIO_PIN_14
<> 139:856d2700e60b 317 * @arg @ref LL_GPIO_PIN_15
<> 139:856d2700e60b 318 * @retval Returned value can be one of the following values:
<> 139:856d2700e60b 319 * @arg @ref LL_GPIO_MODE_INPUT
<> 139:856d2700e60b 320 * @arg @ref LL_GPIO_MODE_OUTPUT
<> 139:856d2700e60b 321 * @arg @ref LL_GPIO_MODE_ALTERNATE
<> 139:856d2700e60b 322 * @arg @ref LL_GPIO_MODE_ANALOG
<> 139:856d2700e60b 323 */
<> 139:856d2700e60b 324 __STATIC_INLINE uint32_t LL_GPIO_GetPinMode(GPIO_TypeDef *GPIOx, uint32_t Pin)
<> 139:856d2700e60b 325 {
<> 139:856d2700e60b 326 return (uint32_t)(READ_BIT(GPIOx->MODER,
<> 139:856d2700e60b 327 (GPIO_MODER_MODER0 << (POSITION_VAL(Pin) * 2U))) >> (POSITION_VAL(Pin) * 2U));
<> 139:856d2700e60b 328 }
<> 139:856d2700e60b 329
<> 139:856d2700e60b 330 /**
<> 139:856d2700e60b 331 * @brief Configure gpio output type for several pins on dedicated port.
<> 139:856d2700e60b 332 * @note Output type as to be set when gpio pin is in output or
<> 139:856d2700e60b 333 * alternate modes. Possible type are Push-pull or Open-drain.
<> 139:856d2700e60b 334 * @rmtoll OTYPER OTy LL_GPIO_SetPinOutputType
<> 139:856d2700e60b 335 * @param GPIOx GPIO Port
<> 139:856d2700e60b 336 * @param PinMask This parameter can be a combination of the following values:
<> 139:856d2700e60b 337 * @arg @ref LL_GPIO_PIN_0
<> 139:856d2700e60b 338 * @arg @ref LL_GPIO_PIN_1
<> 139:856d2700e60b 339 * @arg @ref LL_GPIO_PIN_2
<> 139:856d2700e60b 340 * @arg @ref LL_GPIO_PIN_3
<> 139:856d2700e60b 341 * @arg @ref LL_GPIO_PIN_4
<> 139:856d2700e60b 342 * @arg @ref LL_GPIO_PIN_5
<> 139:856d2700e60b 343 * @arg @ref LL_GPIO_PIN_6
<> 139:856d2700e60b 344 * @arg @ref LL_GPIO_PIN_7
<> 139:856d2700e60b 345 * @arg @ref LL_GPIO_PIN_8
<> 139:856d2700e60b 346 * @arg @ref LL_GPIO_PIN_9
<> 139:856d2700e60b 347 * @arg @ref LL_GPIO_PIN_10
<> 139:856d2700e60b 348 * @arg @ref LL_GPIO_PIN_11
<> 139:856d2700e60b 349 * @arg @ref LL_GPIO_PIN_12
<> 139:856d2700e60b 350 * @arg @ref LL_GPIO_PIN_13
<> 139:856d2700e60b 351 * @arg @ref LL_GPIO_PIN_14
<> 139:856d2700e60b 352 * @arg @ref LL_GPIO_PIN_15
<> 139:856d2700e60b 353 * @arg @ref LL_GPIO_PIN_ALL
<> 139:856d2700e60b 354 * @param OutputType This parameter can be one of the following values:
<> 139:856d2700e60b 355 * @arg @ref LL_GPIO_OUTPUT_PUSHPULL
<> 139:856d2700e60b 356 * @arg @ref LL_GPIO_OUTPUT_OPENDRAIN
<> 139:856d2700e60b 357 * @retval None
<> 139:856d2700e60b 358 */
<> 139:856d2700e60b 359 __STATIC_INLINE void LL_GPIO_SetPinOutputType(GPIO_TypeDef *GPIOx, uint32_t PinMask, uint32_t OutputType)
<> 139:856d2700e60b 360 {
<> 139:856d2700e60b 361 MODIFY_REG(GPIOx->OTYPER, PinMask, (PinMask * OutputType));
<> 139:856d2700e60b 362 }
<> 139:856d2700e60b 363
<> 139:856d2700e60b 364 /**
<> 139:856d2700e60b 365 * @brief Return gpio output type for several pins on dedicated port.
<> 139:856d2700e60b 366 * @note Output type as to be set when gpio pin is in output or
<> 139:856d2700e60b 367 * alternate modes. Possible type are Push-pull or Open-drain.
<> 139:856d2700e60b 368 * @note Warning: only one pin can be passed as parameter.
<> 139:856d2700e60b 369 * @rmtoll OTYPER OTy LL_GPIO_GetPinOutputType
<> 139:856d2700e60b 370 * @param GPIOx GPIO Port
<> 139:856d2700e60b 371 * @param Pin This parameter can be one of the following values:
<> 139:856d2700e60b 372 * @arg @ref LL_GPIO_PIN_0
<> 139:856d2700e60b 373 * @arg @ref LL_GPIO_PIN_1
<> 139:856d2700e60b 374 * @arg @ref LL_GPIO_PIN_2
<> 139:856d2700e60b 375 * @arg @ref LL_GPIO_PIN_3
<> 139:856d2700e60b 376 * @arg @ref LL_GPIO_PIN_4
<> 139:856d2700e60b 377 * @arg @ref LL_GPIO_PIN_5
<> 139:856d2700e60b 378 * @arg @ref LL_GPIO_PIN_6
<> 139:856d2700e60b 379 * @arg @ref LL_GPIO_PIN_7
<> 139:856d2700e60b 380 * @arg @ref LL_GPIO_PIN_8
<> 139:856d2700e60b 381 * @arg @ref LL_GPIO_PIN_9
<> 139:856d2700e60b 382 * @arg @ref LL_GPIO_PIN_10
<> 139:856d2700e60b 383 * @arg @ref LL_GPIO_PIN_11
<> 139:856d2700e60b 384 * @arg @ref LL_GPIO_PIN_12
<> 139:856d2700e60b 385 * @arg @ref LL_GPIO_PIN_13
<> 139:856d2700e60b 386 * @arg @ref LL_GPIO_PIN_14
<> 139:856d2700e60b 387 * @arg @ref LL_GPIO_PIN_15
<> 139:856d2700e60b 388 * @arg @ref LL_GPIO_PIN_ALL
<> 139:856d2700e60b 389 * @retval Returned value can be one of the following values:
<> 139:856d2700e60b 390 * @arg @ref LL_GPIO_OUTPUT_PUSHPULL
<> 139:856d2700e60b 391 * @arg @ref LL_GPIO_OUTPUT_OPENDRAIN
<> 139:856d2700e60b 392 */
<> 139:856d2700e60b 393 __STATIC_INLINE uint32_t LL_GPIO_GetPinOutputType(GPIO_TypeDef *GPIOx, uint32_t Pin)
<> 139:856d2700e60b 394 {
<> 139:856d2700e60b 395 return (uint32_t)(READ_BIT(GPIOx->OTYPER, Pin) >> POSITION_VAL(Pin));
<> 139:856d2700e60b 396 }
<> 139:856d2700e60b 397
<> 139:856d2700e60b 398 /**
<> 139:856d2700e60b 399 * @brief Configure gpio speed for a dedicated pin on dedicated port.
<> 139:856d2700e60b 400 * @note I/O speed can be Low, Medium, Fast or High speed.
<> 139:856d2700e60b 401 * @note Warning: only one pin can be passed as parameter.
<> 139:856d2700e60b 402 * @note Refer to datasheet for frequency specifications and the power
<> 139:856d2700e60b 403 * supply and load conditions for each speed.
<> 139:856d2700e60b 404 * @rmtoll OSPEEDR OSPEEDy LL_GPIO_SetPinSpeed
<> 139:856d2700e60b 405 * @param GPIOx GPIO Port
<> 139:856d2700e60b 406 * @param Pin This parameter can be one of the following values:
<> 139:856d2700e60b 407 * @arg @ref LL_GPIO_PIN_0
<> 139:856d2700e60b 408 * @arg @ref LL_GPIO_PIN_1
<> 139:856d2700e60b 409 * @arg @ref LL_GPIO_PIN_2
<> 139:856d2700e60b 410 * @arg @ref LL_GPIO_PIN_3
<> 139:856d2700e60b 411 * @arg @ref LL_GPIO_PIN_4
<> 139:856d2700e60b 412 * @arg @ref LL_GPIO_PIN_5
<> 139:856d2700e60b 413 * @arg @ref LL_GPIO_PIN_6
<> 139:856d2700e60b 414 * @arg @ref LL_GPIO_PIN_7
<> 139:856d2700e60b 415 * @arg @ref LL_GPIO_PIN_8
<> 139:856d2700e60b 416 * @arg @ref LL_GPIO_PIN_9
<> 139:856d2700e60b 417 * @arg @ref LL_GPIO_PIN_10
<> 139:856d2700e60b 418 * @arg @ref LL_GPIO_PIN_11
<> 139:856d2700e60b 419 * @arg @ref LL_GPIO_PIN_12
<> 139:856d2700e60b 420 * @arg @ref LL_GPIO_PIN_13
<> 139:856d2700e60b 421 * @arg @ref LL_GPIO_PIN_14
<> 139:856d2700e60b 422 * @arg @ref LL_GPIO_PIN_15
<> 139:856d2700e60b 423 * @param Speed This parameter can be one of the following values:
<> 139:856d2700e60b 424 * @arg @ref LL_GPIO_SPEED_FREQ_LOW
<> 139:856d2700e60b 425 * @arg @ref LL_GPIO_SPEED_FREQ_MEDIUM
<> 139:856d2700e60b 426 * @arg @ref LL_GPIO_SPEED_FREQ_HIGH
<> 139:856d2700e60b 427 * @arg @ref LL_GPIO_SPEED_FREQ_VERY_HIGH
<> 139:856d2700e60b 428 * @retval None
<> 139:856d2700e60b 429 */
<> 139:856d2700e60b 430 __STATIC_INLINE void LL_GPIO_SetPinSpeed(GPIO_TypeDef *GPIOx, uint32_t Pin, uint32_t Speed)
<> 139:856d2700e60b 431 {
<> 139:856d2700e60b 432 MODIFY_REG(GPIOx->OSPEEDR, (GPIO_OSPEEDER_OSPEEDR0 << (POSITION_VAL(Pin) * 2U)),
<> 139:856d2700e60b 433 (Speed << (POSITION_VAL(Pin) * 2U)));
<> 139:856d2700e60b 434 }
<> 139:856d2700e60b 435
<> 139:856d2700e60b 436 /**
<> 139:856d2700e60b 437 * @brief Return gpio speed for a dedicated pin on dedicated port.
<> 139:856d2700e60b 438 * @note I/O speed can be Low, Medium, Fast or High speed.
<> 139:856d2700e60b 439 * @note Warning: only one pin can be passed as parameter.
<> 139:856d2700e60b 440 * @note Refer to datasheet for frequency specifications and the power
<> 139:856d2700e60b 441 * supply and load conditions for each speed.
<> 139:856d2700e60b 442 * @rmtoll OSPEEDR OSPEEDy LL_GPIO_GetPinSpeed
<> 139:856d2700e60b 443 * @param GPIOx GPIO Port
<> 139:856d2700e60b 444 * @param Pin This parameter can be one of the following values:
<> 139:856d2700e60b 445 * @arg @ref LL_GPIO_PIN_0
<> 139:856d2700e60b 446 * @arg @ref LL_GPIO_PIN_1
<> 139:856d2700e60b 447 * @arg @ref LL_GPIO_PIN_2
<> 139:856d2700e60b 448 * @arg @ref LL_GPIO_PIN_3
<> 139:856d2700e60b 449 * @arg @ref LL_GPIO_PIN_4
<> 139:856d2700e60b 450 * @arg @ref LL_GPIO_PIN_5
<> 139:856d2700e60b 451 * @arg @ref LL_GPIO_PIN_6
<> 139:856d2700e60b 452 * @arg @ref LL_GPIO_PIN_7
<> 139:856d2700e60b 453 * @arg @ref LL_GPIO_PIN_8
<> 139:856d2700e60b 454 * @arg @ref LL_GPIO_PIN_9
<> 139:856d2700e60b 455 * @arg @ref LL_GPIO_PIN_10
<> 139:856d2700e60b 456 * @arg @ref LL_GPIO_PIN_11
<> 139:856d2700e60b 457 * @arg @ref LL_GPIO_PIN_12
<> 139:856d2700e60b 458 * @arg @ref LL_GPIO_PIN_13
<> 139:856d2700e60b 459 * @arg @ref LL_GPIO_PIN_14
<> 139:856d2700e60b 460 * @arg @ref LL_GPIO_PIN_15
<> 139:856d2700e60b 461 * @retval Returned value can be one of the following values:
<> 139:856d2700e60b 462 * @arg @ref LL_GPIO_SPEED_FREQ_LOW
<> 139:856d2700e60b 463 * @arg @ref LL_GPIO_SPEED_FREQ_MEDIUM
<> 139:856d2700e60b 464 * @arg @ref LL_GPIO_SPEED_FREQ_HIGH
<> 139:856d2700e60b 465 * @arg @ref LL_GPIO_SPEED_FREQ_VERY_HIGH
<> 139:856d2700e60b 466 */
<> 139:856d2700e60b 467 __STATIC_INLINE uint32_t LL_GPIO_GetPinSpeed(GPIO_TypeDef *GPIOx, uint32_t Pin)
<> 139:856d2700e60b 468 {
<> 139:856d2700e60b 469 return (uint32_t)(READ_BIT(GPIOx->OSPEEDR,
<> 139:856d2700e60b 470 (GPIO_OSPEEDER_OSPEEDR0 << (POSITION_VAL(Pin) * 2U))) >> (POSITION_VAL(Pin) * 2U));
<> 139:856d2700e60b 471 }
<> 139:856d2700e60b 472
<> 139:856d2700e60b 473 /**
<> 139:856d2700e60b 474 * @brief Configure gpio pull-up or pull-down for a dedicated pin on a dedicated port.
<> 139:856d2700e60b 475 * @note Warning: only one pin can be passed as parameter.
<> 139:856d2700e60b 476 * @rmtoll PUPDR PUPDy LL_GPIO_SetPinPull
<> 139:856d2700e60b 477 * @param GPIOx GPIO Port
<> 139:856d2700e60b 478 * @param Pin This parameter can be one of the following values:
<> 139:856d2700e60b 479 * @arg @ref LL_GPIO_PIN_0
<> 139:856d2700e60b 480 * @arg @ref LL_GPIO_PIN_1
<> 139:856d2700e60b 481 * @arg @ref LL_GPIO_PIN_2
<> 139:856d2700e60b 482 * @arg @ref LL_GPIO_PIN_3
<> 139:856d2700e60b 483 * @arg @ref LL_GPIO_PIN_4
<> 139:856d2700e60b 484 * @arg @ref LL_GPIO_PIN_5
<> 139:856d2700e60b 485 * @arg @ref LL_GPIO_PIN_6
<> 139:856d2700e60b 486 * @arg @ref LL_GPIO_PIN_7
<> 139:856d2700e60b 487 * @arg @ref LL_GPIO_PIN_8
<> 139:856d2700e60b 488 * @arg @ref LL_GPIO_PIN_9
<> 139:856d2700e60b 489 * @arg @ref LL_GPIO_PIN_10
<> 139:856d2700e60b 490 * @arg @ref LL_GPIO_PIN_11
<> 139:856d2700e60b 491 * @arg @ref LL_GPIO_PIN_12
<> 139:856d2700e60b 492 * @arg @ref LL_GPIO_PIN_13
<> 139:856d2700e60b 493 * @arg @ref LL_GPIO_PIN_14
<> 139:856d2700e60b 494 * @arg @ref LL_GPIO_PIN_15
<> 139:856d2700e60b 495 * @param Pull This parameter can be one of the following values:
<> 139:856d2700e60b 496 * @arg @ref LL_GPIO_PULL_NO
<> 139:856d2700e60b 497 * @arg @ref LL_GPIO_PULL_UP
<> 139:856d2700e60b 498 * @arg @ref LL_GPIO_PULL_DOWN
<> 139:856d2700e60b 499 * @retval None
<> 139:856d2700e60b 500 */
<> 139:856d2700e60b 501 __STATIC_INLINE void LL_GPIO_SetPinPull(GPIO_TypeDef *GPIOx, uint32_t Pin, uint32_t Pull)
<> 139:856d2700e60b 502 {
<> 139:856d2700e60b 503 MODIFY_REG(GPIOx->PUPDR, (GPIO_PUPDR_PUPDR0 << (POSITION_VAL(Pin) * 2U)), (Pull << (POSITION_VAL(Pin) * 2U)));
<> 139:856d2700e60b 504 }
<> 139:856d2700e60b 505
<> 139:856d2700e60b 506 /**
<> 139:856d2700e60b 507 * @brief Return gpio pull-up or pull-down for a dedicated pin on a dedicated port
<> 139:856d2700e60b 508 * @note Warning: only one pin can be passed as parameter.
<> 139:856d2700e60b 509 * @rmtoll PUPDR PUPDy LL_GPIO_GetPinPull
<> 139:856d2700e60b 510 * @param GPIOx GPIO Port
<> 139:856d2700e60b 511 * @param Pin This parameter can be one of the following values:
<> 139:856d2700e60b 512 * @arg @ref LL_GPIO_PIN_0
<> 139:856d2700e60b 513 * @arg @ref LL_GPIO_PIN_1
<> 139:856d2700e60b 514 * @arg @ref LL_GPIO_PIN_2
<> 139:856d2700e60b 515 * @arg @ref LL_GPIO_PIN_3
<> 139:856d2700e60b 516 * @arg @ref LL_GPIO_PIN_4
<> 139:856d2700e60b 517 * @arg @ref LL_GPIO_PIN_5
<> 139:856d2700e60b 518 * @arg @ref LL_GPIO_PIN_6
<> 139:856d2700e60b 519 * @arg @ref LL_GPIO_PIN_7
<> 139:856d2700e60b 520 * @arg @ref LL_GPIO_PIN_8
<> 139:856d2700e60b 521 * @arg @ref LL_GPIO_PIN_9
<> 139:856d2700e60b 522 * @arg @ref LL_GPIO_PIN_10
<> 139:856d2700e60b 523 * @arg @ref LL_GPIO_PIN_11
<> 139:856d2700e60b 524 * @arg @ref LL_GPIO_PIN_12
<> 139:856d2700e60b 525 * @arg @ref LL_GPIO_PIN_13
<> 139:856d2700e60b 526 * @arg @ref LL_GPIO_PIN_14
<> 139:856d2700e60b 527 * @arg @ref LL_GPIO_PIN_15
<> 139:856d2700e60b 528 * @retval Returned value can be one of the following values:
<> 139:856d2700e60b 529 * @arg @ref LL_GPIO_PULL_NO
<> 139:856d2700e60b 530 * @arg @ref LL_GPIO_PULL_UP
<> 139:856d2700e60b 531 * @arg @ref LL_GPIO_PULL_DOWN
<> 139:856d2700e60b 532 */
<> 139:856d2700e60b 533 __STATIC_INLINE uint32_t LL_GPIO_GetPinPull(GPIO_TypeDef *GPIOx, uint32_t Pin)
<> 139:856d2700e60b 534 {
<> 139:856d2700e60b 535 return (uint32_t)(READ_BIT(GPIOx->PUPDR,
<> 139:856d2700e60b 536 (GPIO_PUPDR_PUPDR0 << (POSITION_VAL(Pin) * 2U))) >> (POSITION_VAL(Pin) * 2U));
<> 139:856d2700e60b 537 }
<> 139:856d2700e60b 538
<> 139:856d2700e60b 539 /**
<> 139:856d2700e60b 540 * @brief Configure gpio alternate function of a dedicated pin from 0 to 7 for a dedicated port.
<> 139:856d2700e60b 541 * @note Possible values are from AF0 to AF15 depending on target.
<> 139:856d2700e60b 542 * @note Warning: only one pin can be passed as parameter.
<> 139:856d2700e60b 543 * @rmtoll AFRL AFSELy LL_GPIO_SetAFPin_0_7
<> 139:856d2700e60b 544 * @param GPIOx GPIO Port
<> 139:856d2700e60b 545 * @param Pin This parameter can be one of the following values:
<> 139:856d2700e60b 546 * @arg @ref LL_GPIO_PIN_0
<> 139:856d2700e60b 547 * @arg @ref LL_GPIO_PIN_1
<> 139:856d2700e60b 548 * @arg @ref LL_GPIO_PIN_2
<> 139:856d2700e60b 549 * @arg @ref LL_GPIO_PIN_3
<> 139:856d2700e60b 550 * @arg @ref LL_GPIO_PIN_4
<> 139:856d2700e60b 551 * @arg @ref LL_GPIO_PIN_5
<> 139:856d2700e60b 552 * @arg @ref LL_GPIO_PIN_6
<> 139:856d2700e60b 553 * @arg @ref LL_GPIO_PIN_7
<> 139:856d2700e60b 554 * @param Alternate This parameter can be one of the following values:
<> 139:856d2700e60b 555 * @arg @ref LL_GPIO_AF_0
<> 139:856d2700e60b 556 * @arg @ref LL_GPIO_AF_1
<> 139:856d2700e60b 557 * @arg @ref LL_GPIO_AF_2
<> 139:856d2700e60b 558 * @arg @ref LL_GPIO_AF_3
<> 139:856d2700e60b 559 * @arg @ref LL_GPIO_AF_4
<> 139:856d2700e60b 560 * @arg @ref LL_GPIO_AF_5
<> 139:856d2700e60b 561 * @arg @ref LL_GPIO_AF_6
<> 139:856d2700e60b 562 * @arg @ref LL_GPIO_AF_7
<> 139:856d2700e60b 563 * @arg @ref LL_GPIO_AF_8
<> 139:856d2700e60b 564 * @arg @ref LL_GPIO_AF_9
<> 139:856d2700e60b 565 * @arg @ref LL_GPIO_AF_10
<> 139:856d2700e60b 566 * @arg @ref LL_GPIO_AF_11
<> 139:856d2700e60b 567 * @arg @ref LL_GPIO_AF_12
<> 139:856d2700e60b 568 * @arg @ref LL_GPIO_AF_13
<> 139:856d2700e60b 569 * @arg @ref LL_GPIO_AF_14
<> 139:856d2700e60b 570 * @arg @ref LL_GPIO_AF_15
<> 139:856d2700e60b 571 * @retval None
<> 139:856d2700e60b 572 */
<> 139:856d2700e60b 573 __STATIC_INLINE void LL_GPIO_SetAFPin_0_7(GPIO_TypeDef *GPIOx, uint32_t Pin, uint32_t Alternate)
<> 139:856d2700e60b 574 {
<> 139:856d2700e60b 575 MODIFY_REG(GPIOx->AFR[0], (GPIO_AFRL_AFRL0 << (POSITION_VAL(Pin) * 4U)),
<> 139:856d2700e60b 576 (Alternate << (POSITION_VAL(Pin) * 4U)));
<> 139:856d2700e60b 577 }
<> 139:856d2700e60b 578
<> 139:856d2700e60b 579 /**
<> 139:856d2700e60b 580 * @brief Return gpio alternate function of a dedicated pin from 0 to 7 for a dedicated port.
<> 139:856d2700e60b 581 * @rmtoll AFRL AFSELy LL_GPIO_GetAFPin_0_7
<> 139:856d2700e60b 582 * @param GPIOx GPIO Port
<> 139:856d2700e60b 583 * @param Pin This parameter can be one of the following values:
<> 139:856d2700e60b 584 * @arg @ref LL_GPIO_PIN_0
<> 139:856d2700e60b 585 * @arg @ref LL_GPIO_PIN_1
<> 139:856d2700e60b 586 * @arg @ref LL_GPIO_PIN_2
<> 139:856d2700e60b 587 * @arg @ref LL_GPIO_PIN_3
<> 139:856d2700e60b 588 * @arg @ref LL_GPIO_PIN_4
<> 139:856d2700e60b 589 * @arg @ref LL_GPIO_PIN_5
<> 139:856d2700e60b 590 * @arg @ref LL_GPIO_PIN_6
<> 139:856d2700e60b 591 * @arg @ref LL_GPIO_PIN_7
<> 139:856d2700e60b 592 * @retval Returned value can be one of the following values:
<> 139:856d2700e60b 593 * @arg @ref LL_GPIO_AF_0
<> 139:856d2700e60b 594 * @arg @ref LL_GPIO_AF_1
<> 139:856d2700e60b 595 * @arg @ref LL_GPIO_AF_2
<> 139:856d2700e60b 596 * @arg @ref LL_GPIO_AF_3
<> 139:856d2700e60b 597 * @arg @ref LL_GPIO_AF_4
<> 139:856d2700e60b 598 * @arg @ref LL_GPIO_AF_5
<> 139:856d2700e60b 599 * @arg @ref LL_GPIO_AF_6
<> 139:856d2700e60b 600 * @arg @ref LL_GPIO_AF_7
<> 139:856d2700e60b 601 * @arg @ref LL_GPIO_AF_8
<> 139:856d2700e60b 602 * @arg @ref LL_GPIO_AF_9
<> 139:856d2700e60b 603 * @arg @ref LL_GPIO_AF_10
<> 139:856d2700e60b 604 * @arg @ref LL_GPIO_AF_11
<> 139:856d2700e60b 605 * @arg @ref LL_GPIO_AF_12
<> 139:856d2700e60b 606 * @arg @ref LL_GPIO_AF_13
<> 139:856d2700e60b 607 * @arg @ref LL_GPIO_AF_14
<> 139:856d2700e60b 608 * @arg @ref LL_GPIO_AF_15
<> 139:856d2700e60b 609 */
<> 139:856d2700e60b 610 __STATIC_INLINE uint32_t LL_GPIO_GetAFPin_0_7(GPIO_TypeDef *GPIOx, uint32_t Pin)
<> 139:856d2700e60b 611 {
<> 139:856d2700e60b 612 return (uint32_t)(READ_BIT(GPIOx->AFR[0],
<> 139:856d2700e60b 613 (GPIO_AFRL_AFRL0 << (POSITION_VAL(Pin) * 4U))) >> (POSITION_VAL(Pin) * 4U));
<> 139:856d2700e60b 614 }
<> 139:856d2700e60b 615
<> 139:856d2700e60b 616 /**
<> 139:856d2700e60b 617 * @brief Configure gpio alternate function of a dedicated pin from 8 to 15 for a dedicated port.
<> 139:856d2700e60b 618 * @note Possible values are from AF0 to AF15 depending on target.
<> 139:856d2700e60b 619 * @note Warning: only one pin can be passed as parameter.
<> 139:856d2700e60b 620 * @rmtoll AFRH AFSELy LL_GPIO_SetAFPin_8_15
<> 139:856d2700e60b 621 * @param GPIOx GPIO Port
<> 139:856d2700e60b 622 * @param Pin This parameter can be one of the following values:
<> 139:856d2700e60b 623 * @arg @ref LL_GPIO_PIN_8
<> 139:856d2700e60b 624 * @arg @ref LL_GPIO_PIN_9
<> 139:856d2700e60b 625 * @arg @ref LL_GPIO_PIN_10
<> 139:856d2700e60b 626 * @arg @ref LL_GPIO_PIN_11
<> 139:856d2700e60b 627 * @arg @ref LL_GPIO_PIN_12
<> 139:856d2700e60b 628 * @arg @ref LL_GPIO_PIN_13
<> 139:856d2700e60b 629 * @arg @ref LL_GPIO_PIN_14
<> 139:856d2700e60b 630 * @arg @ref LL_GPIO_PIN_15
<> 139:856d2700e60b 631 * @param Alternate This parameter can be one of the following values:
<> 139:856d2700e60b 632 * @arg @ref LL_GPIO_AF_0
<> 139:856d2700e60b 633 * @arg @ref LL_GPIO_AF_1
<> 139:856d2700e60b 634 * @arg @ref LL_GPIO_AF_2
<> 139:856d2700e60b 635 * @arg @ref LL_GPIO_AF_3
<> 139:856d2700e60b 636 * @arg @ref LL_GPIO_AF_4
<> 139:856d2700e60b 637 * @arg @ref LL_GPIO_AF_5
<> 139:856d2700e60b 638 * @arg @ref LL_GPIO_AF_6
<> 139:856d2700e60b 639 * @arg @ref LL_GPIO_AF_7
<> 139:856d2700e60b 640 * @arg @ref LL_GPIO_AF_8
<> 139:856d2700e60b 641 * @arg @ref LL_GPIO_AF_9
<> 139:856d2700e60b 642 * @arg @ref LL_GPIO_AF_10
<> 139:856d2700e60b 643 * @arg @ref LL_GPIO_AF_11
<> 139:856d2700e60b 644 * @arg @ref LL_GPIO_AF_12
<> 139:856d2700e60b 645 * @arg @ref LL_GPIO_AF_13
<> 139:856d2700e60b 646 * @arg @ref LL_GPIO_AF_14
<> 139:856d2700e60b 647 * @arg @ref LL_GPIO_AF_15
<> 139:856d2700e60b 648 * @retval None
<> 139:856d2700e60b 649 */
<> 139:856d2700e60b 650 __STATIC_INLINE void LL_GPIO_SetAFPin_8_15(GPIO_TypeDef *GPIOx, uint32_t Pin, uint32_t Alternate)
<> 139:856d2700e60b 651 {
<> 139:856d2700e60b 652 MODIFY_REG(GPIOx->AFR[1], (GPIO_AFRH_AFRH0 << (POSITION_VAL(Pin >> 8U) * 4U)),
<> 139:856d2700e60b 653 (Alternate << (POSITION_VAL(Pin >> 8U) * 4U)));
<> 139:856d2700e60b 654 }
<> 139:856d2700e60b 655
<> 139:856d2700e60b 656 /**
<> 139:856d2700e60b 657 * @brief Return gpio alternate function of a dedicated pin from 8 to 15 for a dedicated port.
<> 139:856d2700e60b 658 * @note Possible values are from AF0 to AF15 depending on target.
<> 139:856d2700e60b 659 * @rmtoll AFRH AFSELy LL_GPIO_GetAFPin_8_15
<> 139:856d2700e60b 660 * @param GPIOx GPIO Port
<> 139:856d2700e60b 661 * @param Pin This parameter can be one of the following values:
<> 139:856d2700e60b 662 * @arg @ref LL_GPIO_PIN_8
<> 139:856d2700e60b 663 * @arg @ref LL_GPIO_PIN_9
<> 139:856d2700e60b 664 * @arg @ref LL_GPIO_PIN_10
<> 139:856d2700e60b 665 * @arg @ref LL_GPIO_PIN_11
<> 139:856d2700e60b 666 * @arg @ref LL_GPIO_PIN_12
<> 139:856d2700e60b 667 * @arg @ref LL_GPIO_PIN_13
<> 139:856d2700e60b 668 * @arg @ref LL_GPIO_PIN_14
<> 139:856d2700e60b 669 * @arg @ref LL_GPIO_PIN_15
<> 139:856d2700e60b 670 * @retval Returned value can be one of the following values:
<> 139:856d2700e60b 671 * @arg @ref LL_GPIO_AF_0
<> 139:856d2700e60b 672 * @arg @ref LL_GPIO_AF_1
<> 139:856d2700e60b 673 * @arg @ref LL_GPIO_AF_2
<> 139:856d2700e60b 674 * @arg @ref LL_GPIO_AF_3
<> 139:856d2700e60b 675 * @arg @ref LL_GPIO_AF_4
<> 139:856d2700e60b 676 * @arg @ref LL_GPIO_AF_5
<> 139:856d2700e60b 677 * @arg @ref LL_GPIO_AF_6
<> 139:856d2700e60b 678 * @arg @ref LL_GPIO_AF_7
<> 139:856d2700e60b 679 * @arg @ref LL_GPIO_AF_8
<> 139:856d2700e60b 680 * @arg @ref LL_GPIO_AF_9
<> 139:856d2700e60b 681 * @arg @ref LL_GPIO_AF_10
<> 139:856d2700e60b 682 * @arg @ref LL_GPIO_AF_11
<> 139:856d2700e60b 683 * @arg @ref LL_GPIO_AF_12
<> 139:856d2700e60b 684 * @arg @ref LL_GPIO_AF_13
<> 139:856d2700e60b 685 * @arg @ref LL_GPIO_AF_14
<> 139:856d2700e60b 686 * @arg @ref LL_GPIO_AF_15
<> 139:856d2700e60b 687 */
<> 139:856d2700e60b 688 __STATIC_INLINE uint32_t LL_GPIO_GetAFPin_8_15(GPIO_TypeDef *GPIOx, uint32_t Pin)
<> 139:856d2700e60b 689 {
<> 139:856d2700e60b 690 return (uint32_t)(READ_BIT(GPIOx->AFR[1],
<> 139:856d2700e60b 691 (GPIO_AFRH_AFRH0 << (POSITION_VAL(Pin >> 8U) * 4U))) >> (POSITION_VAL(Pin >> 8U) * 4U));
<> 139:856d2700e60b 692 }
<> 139:856d2700e60b 693
<> 139:856d2700e60b 694
<> 139:856d2700e60b 695 /**
<> 139:856d2700e60b 696 * @brief Lock configuration of several pins for a dedicated port.
<> 139:856d2700e60b 697 * @note When the lock sequence has been applied on a port bit, the
<> 139:856d2700e60b 698 * value of this port bit can no longer be modified until the
<> 139:856d2700e60b 699 * next reset.
<> 139:856d2700e60b 700 * @note Each lock bit freezes a specific configuration register
<> 139:856d2700e60b 701 * (control and alternate function registers).
<> 139:856d2700e60b 702 * @rmtoll LCKR LCKK LL_GPIO_LockPin
<> 139:856d2700e60b 703 * @param GPIOx GPIO Port
<> 139:856d2700e60b 704 * @param PinMask This parameter can be a combination of the following values:
<> 139:856d2700e60b 705 * @arg @ref LL_GPIO_PIN_0
<> 139:856d2700e60b 706 * @arg @ref LL_GPIO_PIN_1
<> 139:856d2700e60b 707 * @arg @ref LL_GPIO_PIN_2
<> 139:856d2700e60b 708 * @arg @ref LL_GPIO_PIN_3
<> 139:856d2700e60b 709 * @arg @ref LL_GPIO_PIN_4
<> 139:856d2700e60b 710 * @arg @ref LL_GPIO_PIN_5
<> 139:856d2700e60b 711 * @arg @ref LL_GPIO_PIN_6
<> 139:856d2700e60b 712 * @arg @ref LL_GPIO_PIN_7
<> 139:856d2700e60b 713 * @arg @ref LL_GPIO_PIN_8
<> 139:856d2700e60b 714 * @arg @ref LL_GPIO_PIN_9
<> 139:856d2700e60b 715 * @arg @ref LL_GPIO_PIN_10
<> 139:856d2700e60b 716 * @arg @ref LL_GPIO_PIN_11
<> 139:856d2700e60b 717 * @arg @ref LL_GPIO_PIN_12
<> 139:856d2700e60b 718 * @arg @ref LL_GPIO_PIN_13
<> 139:856d2700e60b 719 * @arg @ref LL_GPIO_PIN_14
<> 139:856d2700e60b 720 * @arg @ref LL_GPIO_PIN_15
<> 139:856d2700e60b 721 * @arg @ref LL_GPIO_PIN_ALL
<> 139:856d2700e60b 722 * @retval None
<> 139:856d2700e60b 723 */
<> 139:856d2700e60b 724 __STATIC_INLINE void LL_GPIO_LockPin(GPIO_TypeDef *GPIOx, uint32_t PinMask)
<> 139:856d2700e60b 725 {
<> 139:856d2700e60b 726 __IO uint32_t temp;
<> 139:856d2700e60b 727 WRITE_REG(GPIOx->LCKR, GPIO_LCKR_LCKK | PinMask);
<> 139:856d2700e60b 728 WRITE_REG(GPIOx->LCKR, PinMask);
<> 139:856d2700e60b 729 WRITE_REG(GPIOx->LCKR, GPIO_LCKR_LCKK | PinMask);
<> 139:856d2700e60b 730 temp = READ_REG(GPIOx->LCKR);
<> 139:856d2700e60b 731 (void) temp;
<> 139:856d2700e60b 732 }
<> 139:856d2700e60b 733
<> 139:856d2700e60b 734 /**
<> 139:856d2700e60b 735 * @brief Return 1 if all pins passed as parameter, of a dedicated port, are locked. else Return 0.
<> 139:856d2700e60b 736 * @rmtoll LCKR LCKy LL_GPIO_IsPinLocked
<> 139:856d2700e60b 737 * @param GPIOx GPIO Port
<> 139:856d2700e60b 738 * @param PinMask This parameter can be a combination of the following values:
<> 139:856d2700e60b 739 * @arg @ref LL_GPIO_PIN_0
<> 139:856d2700e60b 740 * @arg @ref LL_GPIO_PIN_1
<> 139:856d2700e60b 741 * @arg @ref LL_GPIO_PIN_2
<> 139:856d2700e60b 742 * @arg @ref LL_GPIO_PIN_3
<> 139:856d2700e60b 743 * @arg @ref LL_GPIO_PIN_4
<> 139:856d2700e60b 744 * @arg @ref LL_GPIO_PIN_5
<> 139:856d2700e60b 745 * @arg @ref LL_GPIO_PIN_6
<> 139:856d2700e60b 746 * @arg @ref LL_GPIO_PIN_7
<> 139:856d2700e60b 747 * @arg @ref LL_GPIO_PIN_8
<> 139:856d2700e60b 748 * @arg @ref LL_GPIO_PIN_9
<> 139:856d2700e60b 749 * @arg @ref LL_GPIO_PIN_10
<> 139:856d2700e60b 750 * @arg @ref LL_GPIO_PIN_11
<> 139:856d2700e60b 751 * @arg @ref LL_GPIO_PIN_12
<> 139:856d2700e60b 752 * @arg @ref LL_GPIO_PIN_13
<> 139:856d2700e60b 753 * @arg @ref LL_GPIO_PIN_14
<> 139:856d2700e60b 754 * @arg @ref LL_GPIO_PIN_15
<> 139:856d2700e60b 755 * @arg @ref LL_GPIO_PIN_ALL
<> 139:856d2700e60b 756 * @retval State of bit (1 or 0).
<> 139:856d2700e60b 757 */
<> 139:856d2700e60b 758 __STATIC_INLINE uint32_t LL_GPIO_IsPinLocked(GPIO_TypeDef *GPIOx, uint32_t PinMask)
<> 139:856d2700e60b 759 {
<> 139:856d2700e60b 760 return (READ_BIT(GPIOx->LCKR, PinMask) == (PinMask));
<> 139:856d2700e60b 761 }
<> 139:856d2700e60b 762
<> 139:856d2700e60b 763 /**
<> 139:856d2700e60b 764 * @brief Return 1 if one of the pin of a dedicated port is locked. else return 0.
<> 139:856d2700e60b 765 * @rmtoll LCKR LCKK LL_GPIO_IsAnyPinLocked
<> 139:856d2700e60b 766 * @param GPIOx GPIO Port
<> 139:856d2700e60b 767 * @retval State of bit (1 or 0).
<> 139:856d2700e60b 768 */
<> 139:856d2700e60b 769 __STATIC_INLINE uint32_t LL_GPIO_IsAnyPinLocked(GPIO_TypeDef *GPIOx)
<> 139:856d2700e60b 770 {
<> 139:856d2700e60b 771 return (READ_BIT(GPIOx->LCKR, GPIO_LCKR_LCKK) == (GPIO_LCKR_LCKK));
<> 139:856d2700e60b 772 }
<> 139:856d2700e60b 773
<> 139:856d2700e60b 774 /**
<> 139:856d2700e60b 775 * @}
<> 139:856d2700e60b 776 */
<> 139:856d2700e60b 777
<> 139:856d2700e60b 778 /** @defgroup GPIO_LL_EF_Data_Access Data Access
<> 139:856d2700e60b 779 * @{
<> 139:856d2700e60b 780 */
<> 139:856d2700e60b 781
<> 139:856d2700e60b 782 /**
<> 139:856d2700e60b 783 * @brief Return full input data register value for a dedicated port.
<> 139:856d2700e60b 784 * @rmtoll IDR IDy LL_GPIO_ReadInputPort
<> 139:856d2700e60b 785 * @param GPIOx GPIO Port
<> 139:856d2700e60b 786 * @retval Input data register value of port
<> 139:856d2700e60b 787 */
<> 139:856d2700e60b 788 __STATIC_INLINE uint32_t LL_GPIO_ReadInputPort(GPIO_TypeDef *GPIOx)
<> 139:856d2700e60b 789 {
<> 139:856d2700e60b 790 return (uint32_t)(READ_REG(GPIOx->IDR));
<> 139:856d2700e60b 791 }
<> 139:856d2700e60b 792
<> 139:856d2700e60b 793 /**
<> 139:856d2700e60b 794 * @brief Return if input data level for several pins of dedicated port is high or low.
<> 139:856d2700e60b 795 * @rmtoll IDR IDy LL_GPIO_IsInputPinSet
<> 139:856d2700e60b 796 * @param GPIOx GPIO Port
<> 139:856d2700e60b 797 * @param PinMask This parameter can be a combination of the following values:
<> 139:856d2700e60b 798 * @arg @ref LL_GPIO_PIN_0
<> 139:856d2700e60b 799 * @arg @ref LL_GPIO_PIN_1
<> 139:856d2700e60b 800 * @arg @ref LL_GPIO_PIN_2
<> 139:856d2700e60b 801 * @arg @ref LL_GPIO_PIN_3
<> 139:856d2700e60b 802 * @arg @ref LL_GPIO_PIN_4
<> 139:856d2700e60b 803 * @arg @ref LL_GPIO_PIN_5
<> 139:856d2700e60b 804 * @arg @ref LL_GPIO_PIN_6
<> 139:856d2700e60b 805 * @arg @ref LL_GPIO_PIN_7
<> 139:856d2700e60b 806 * @arg @ref LL_GPIO_PIN_8
<> 139:856d2700e60b 807 * @arg @ref LL_GPIO_PIN_9
<> 139:856d2700e60b 808 * @arg @ref LL_GPIO_PIN_10
<> 139:856d2700e60b 809 * @arg @ref LL_GPIO_PIN_11
<> 139:856d2700e60b 810 * @arg @ref LL_GPIO_PIN_12
<> 139:856d2700e60b 811 * @arg @ref LL_GPIO_PIN_13
<> 139:856d2700e60b 812 * @arg @ref LL_GPIO_PIN_14
<> 139:856d2700e60b 813 * @arg @ref LL_GPIO_PIN_15
<> 139:856d2700e60b 814 * @arg @ref LL_GPIO_PIN_ALL
<> 139:856d2700e60b 815 * @retval State of bit (1 or 0).
<> 139:856d2700e60b 816 */
<> 139:856d2700e60b 817 __STATIC_INLINE uint32_t LL_GPIO_IsInputPinSet(GPIO_TypeDef *GPIOx, uint32_t PinMask)
<> 139:856d2700e60b 818 {
<> 139:856d2700e60b 819 return (READ_BIT(GPIOx->IDR, PinMask) == (PinMask));
<> 139:856d2700e60b 820 }
<> 139:856d2700e60b 821
<> 139:856d2700e60b 822 /**
<> 139:856d2700e60b 823 * @brief Write output data register for the port.
<> 139:856d2700e60b 824 * @rmtoll ODR ODy LL_GPIO_WriteOutputPort
<> 139:856d2700e60b 825 * @param GPIOx GPIO Port
<> 139:856d2700e60b 826 * @param PortValue Level value for each pin of the port
<> 139:856d2700e60b 827 * @retval None
<> 139:856d2700e60b 828 */
<> 139:856d2700e60b 829 __STATIC_INLINE void LL_GPIO_WriteOutputPort(GPIO_TypeDef *GPIOx, uint32_t PortValue)
<> 139:856d2700e60b 830 {
<> 139:856d2700e60b 831 WRITE_REG(GPIOx->ODR, PortValue);
<> 139:856d2700e60b 832 }
<> 139:856d2700e60b 833
<> 139:856d2700e60b 834 /**
<> 139:856d2700e60b 835 * @brief Return full output data register value for a dedicated port.
<> 139:856d2700e60b 836 * @rmtoll ODR ODy LL_GPIO_ReadOutputPort
<> 139:856d2700e60b 837 * @param GPIOx GPIO Port
<> 139:856d2700e60b 838 * @retval Output data register value of port
<> 139:856d2700e60b 839 */
<> 139:856d2700e60b 840 __STATIC_INLINE uint32_t LL_GPIO_ReadOutputPort(GPIO_TypeDef *GPIOx)
<> 139:856d2700e60b 841 {
<> 139:856d2700e60b 842 return (uint32_t)(READ_REG(GPIOx->ODR));
<> 139:856d2700e60b 843 }
<> 139:856d2700e60b 844
<> 139:856d2700e60b 845 /**
<> 139:856d2700e60b 846 * @brief Return if input data level for several pins of dedicated port is high or low.
<> 139:856d2700e60b 847 * @rmtoll ODR ODy LL_GPIO_IsOutputPinSet
<> 139:856d2700e60b 848 * @param GPIOx GPIO Port
<> 139:856d2700e60b 849 * @param PinMask This parameter can be a combination of the following values:
<> 139:856d2700e60b 850 * @arg @ref LL_GPIO_PIN_0
<> 139:856d2700e60b 851 * @arg @ref LL_GPIO_PIN_1
<> 139:856d2700e60b 852 * @arg @ref LL_GPIO_PIN_2
<> 139:856d2700e60b 853 * @arg @ref LL_GPIO_PIN_3
<> 139:856d2700e60b 854 * @arg @ref LL_GPIO_PIN_4
<> 139:856d2700e60b 855 * @arg @ref LL_GPIO_PIN_5
<> 139:856d2700e60b 856 * @arg @ref LL_GPIO_PIN_6
<> 139:856d2700e60b 857 * @arg @ref LL_GPIO_PIN_7
<> 139:856d2700e60b 858 * @arg @ref LL_GPIO_PIN_8
<> 139:856d2700e60b 859 * @arg @ref LL_GPIO_PIN_9
<> 139:856d2700e60b 860 * @arg @ref LL_GPIO_PIN_10
<> 139:856d2700e60b 861 * @arg @ref LL_GPIO_PIN_11
<> 139:856d2700e60b 862 * @arg @ref LL_GPIO_PIN_12
<> 139:856d2700e60b 863 * @arg @ref LL_GPIO_PIN_13
<> 139:856d2700e60b 864 * @arg @ref LL_GPIO_PIN_14
<> 139:856d2700e60b 865 * @arg @ref LL_GPIO_PIN_15
<> 139:856d2700e60b 866 * @arg @ref LL_GPIO_PIN_ALL
<> 139:856d2700e60b 867 * @retval State of bit (1 or 0).
<> 139:856d2700e60b 868 */
<> 139:856d2700e60b 869 __STATIC_INLINE uint32_t LL_GPIO_IsOutputPinSet(GPIO_TypeDef *GPIOx, uint32_t PinMask)
<> 139:856d2700e60b 870 {
<> 139:856d2700e60b 871 return (READ_BIT(GPIOx->ODR, PinMask) == (PinMask));
<> 139:856d2700e60b 872 }
<> 139:856d2700e60b 873
<> 139:856d2700e60b 874 /**
<> 139:856d2700e60b 875 * @brief Set several pins to high level on dedicated gpio port.
<> 139:856d2700e60b 876 * @rmtoll BSRR BSy LL_GPIO_SetOutputPin
<> 139:856d2700e60b 877 * @param GPIOx GPIO Port
<> 139:856d2700e60b 878 * @param PinMask This parameter can be a combination of the following values:
<> 139:856d2700e60b 879 * @arg @ref LL_GPIO_PIN_0
<> 139:856d2700e60b 880 * @arg @ref LL_GPIO_PIN_1
<> 139:856d2700e60b 881 * @arg @ref LL_GPIO_PIN_2
<> 139:856d2700e60b 882 * @arg @ref LL_GPIO_PIN_3
<> 139:856d2700e60b 883 * @arg @ref LL_GPIO_PIN_4
<> 139:856d2700e60b 884 * @arg @ref LL_GPIO_PIN_5
<> 139:856d2700e60b 885 * @arg @ref LL_GPIO_PIN_6
<> 139:856d2700e60b 886 * @arg @ref LL_GPIO_PIN_7
<> 139:856d2700e60b 887 * @arg @ref LL_GPIO_PIN_8
<> 139:856d2700e60b 888 * @arg @ref LL_GPIO_PIN_9
<> 139:856d2700e60b 889 * @arg @ref LL_GPIO_PIN_10
<> 139:856d2700e60b 890 * @arg @ref LL_GPIO_PIN_11
<> 139:856d2700e60b 891 * @arg @ref LL_GPIO_PIN_12
<> 139:856d2700e60b 892 * @arg @ref LL_GPIO_PIN_13
<> 139:856d2700e60b 893 * @arg @ref LL_GPIO_PIN_14
<> 139:856d2700e60b 894 * @arg @ref LL_GPIO_PIN_15
<> 139:856d2700e60b 895 * @arg @ref LL_GPIO_PIN_ALL
<> 139:856d2700e60b 896 * @retval None
<> 139:856d2700e60b 897 */
<> 139:856d2700e60b 898 __STATIC_INLINE void LL_GPIO_SetOutputPin(GPIO_TypeDef *GPIOx, uint32_t PinMask)
<> 139:856d2700e60b 899 {
<> 139:856d2700e60b 900 WRITE_REG(GPIOx->BSRR, PinMask);
<> 139:856d2700e60b 901 }
<> 139:856d2700e60b 902
<> 139:856d2700e60b 903 /**
<> 139:856d2700e60b 904 * @brief Set several pins to low level on dedicated gpio port.
<> 139:856d2700e60b 905 * @rmtoll BSRR BRy LL_GPIO_ResetOutputPin
<> 139:856d2700e60b 906 * @param GPIOx GPIO Port
<> 139:856d2700e60b 907 * @param PinMask This parameter can be a combination of the following values:
<> 139:856d2700e60b 908 * @arg @ref LL_GPIO_PIN_0
<> 139:856d2700e60b 909 * @arg @ref LL_GPIO_PIN_1
<> 139:856d2700e60b 910 * @arg @ref LL_GPIO_PIN_2
<> 139:856d2700e60b 911 * @arg @ref LL_GPIO_PIN_3
<> 139:856d2700e60b 912 * @arg @ref LL_GPIO_PIN_4
<> 139:856d2700e60b 913 * @arg @ref LL_GPIO_PIN_5
<> 139:856d2700e60b 914 * @arg @ref LL_GPIO_PIN_6
<> 139:856d2700e60b 915 * @arg @ref LL_GPIO_PIN_7
<> 139:856d2700e60b 916 * @arg @ref LL_GPIO_PIN_8
<> 139:856d2700e60b 917 * @arg @ref LL_GPIO_PIN_9
<> 139:856d2700e60b 918 * @arg @ref LL_GPIO_PIN_10
<> 139:856d2700e60b 919 * @arg @ref LL_GPIO_PIN_11
<> 139:856d2700e60b 920 * @arg @ref LL_GPIO_PIN_12
<> 139:856d2700e60b 921 * @arg @ref LL_GPIO_PIN_13
<> 139:856d2700e60b 922 * @arg @ref LL_GPIO_PIN_14
<> 139:856d2700e60b 923 * @arg @ref LL_GPIO_PIN_15
<> 139:856d2700e60b 924 * @arg @ref LL_GPIO_PIN_ALL
<> 139:856d2700e60b 925 * @retval None
<> 139:856d2700e60b 926 */
<> 139:856d2700e60b 927 __STATIC_INLINE void LL_GPIO_ResetOutputPin(GPIO_TypeDef *GPIOx, uint32_t PinMask)
<> 139:856d2700e60b 928 {
<> 139:856d2700e60b 929 WRITE_REG(GPIOx->BSRR, (PinMask << 16));
<> 139:856d2700e60b 930 }
<> 139:856d2700e60b 931
<> 139:856d2700e60b 932 /**
<> 139:856d2700e60b 933 * @brief Toggle data value for several pin of dedicated port.
<> 139:856d2700e60b 934 * @rmtoll ODR ODy LL_GPIO_TogglePin
<> 139:856d2700e60b 935 * @param GPIOx GPIO Port
<> 139:856d2700e60b 936 * @param PinMask This parameter can be a combination of the following values:
<> 139:856d2700e60b 937 * @arg @ref LL_GPIO_PIN_0
<> 139:856d2700e60b 938 * @arg @ref LL_GPIO_PIN_1
<> 139:856d2700e60b 939 * @arg @ref LL_GPIO_PIN_2
<> 139:856d2700e60b 940 * @arg @ref LL_GPIO_PIN_3
<> 139:856d2700e60b 941 * @arg @ref LL_GPIO_PIN_4
<> 139:856d2700e60b 942 * @arg @ref LL_GPIO_PIN_5
<> 139:856d2700e60b 943 * @arg @ref LL_GPIO_PIN_6
<> 139:856d2700e60b 944 * @arg @ref LL_GPIO_PIN_7
<> 139:856d2700e60b 945 * @arg @ref LL_GPIO_PIN_8
<> 139:856d2700e60b 946 * @arg @ref LL_GPIO_PIN_9
<> 139:856d2700e60b 947 * @arg @ref LL_GPIO_PIN_10
<> 139:856d2700e60b 948 * @arg @ref LL_GPIO_PIN_11
<> 139:856d2700e60b 949 * @arg @ref LL_GPIO_PIN_12
<> 139:856d2700e60b 950 * @arg @ref LL_GPIO_PIN_13
<> 139:856d2700e60b 951 * @arg @ref LL_GPIO_PIN_14
<> 139:856d2700e60b 952 * @arg @ref LL_GPIO_PIN_15
<> 139:856d2700e60b 953 * @arg @ref LL_GPIO_PIN_ALL
<> 139:856d2700e60b 954 * @retval None
<> 139:856d2700e60b 955 */
<> 139:856d2700e60b 956 __STATIC_INLINE void LL_GPIO_TogglePin(GPIO_TypeDef *GPIOx, uint32_t PinMask)
<> 139:856d2700e60b 957 {
<> 139:856d2700e60b 958 WRITE_REG(GPIOx->ODR, READ_REG(GPIOx->ODR) ^ PinMask);
<> 139:856d2700e60b 959 }
<> 139:856d2700e60b 960
<> 139:856d2700e60b 961 /**
<> 139:856d2700e60b 962 * @}
<> 139:856d2700e60b 963 */
<> 139:856d2700e60b 964
<> 139:856d2700e60b 965 #if defined(USE_FULL_LL_DRIVER)
<> 139:856d2700e60b 966 /** @defgroup GPIO_LL_EF_Init Initialization and de-initialization functions
<> 139:856d2700e60b 967 * @{
<> 139:856d2700e60b 968 */
<> 139:856d2700e60b 969
<> 139:856d2700e60b 970 ErrorStatus LL_GPIO_DeInit(GPIO_TypeDef *GPIOx);
<> 139:856d2700e60b 971 ErrorStatus LL_GPIO_Init(GPIO_TypeDef *GPIOx, LL_GPIO_InitTypeDef *GPIO_InitStruct);
<> 139:856d2700e60b 972 void LL_GPIO_StructInit(LL_GPIO_InitTypeDef *GPIO_InitStruct);
<> 139:856d2700e60b 973
<> 139:856d2700e60b 974 /**
<> 139:856d2700e60b 975 * @}
<> 139:856d2700e60b 976 */
<> 139:856d2700e60b 977 #endif /* USE_FULL_LL_DRIVER */
<> 139:856d2700e60b 978
<> 139:856d2700e60b 979 /**
<> 139:856d2700e60b 980 * @}
<> 139:856d2700e60b 981 */
<> 139:856d2700e60b 982
<> 139:856d2700e60b 983 /**
<> 139:856d2700e60b 984 * @}
<> 139:856d2700e60b 985 */
<> 139:856d2700e60b 986
<> 139:856d2700e60b 987 #endif /* defined (GPIOA) || defined (GPIOB) || defined (GPIOC) || defined (GPIOD) || defined (GPIOE) || defined (GPIOF) || defined (GPIOG) || defined (GPIOH) || defined (GPIOI) || defined (GPIOJ) || defined (GPIOK) */
<> 139:856d2700e60b 988 /**
<> 139:856d2700e60b 989 * @}
<> 139:856d2700e60b 990 */
<> 139:856d2700e60b 991
<> 139:856d2700e60b 992 #ifdef __cplusplus
<> 139:856d2700e60b 993 }
<> 139:856d2700e60b 994 #endif
<> 139:856d2700e60b 995
<> 139:856d2700e60b 996 #endif /* __STM32F7xx_LL_GPIO_H */
<> 139:856d2700e60b 997
<> 139:856d2700e60b 998 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/