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Dependents: hello SerialTestv11 SerialTestv12 Sierpinski ... more
TARGET_NUCLEO_F303RE/stm32f3xx_hal_tim_ex.h@123:b0220dba8be7, 2016-08-12 (annotated)
- Committer:
- Kojto
- Date:
- Fri Aug 12 13:04:35 2016 +0200
- Revision:
- 123:b0220dba8be7
- Parent:
- 122:f9eeca106725
Release 123 of the mbed library
Changes:
- new targets: nucleo_f207zg, beetle, nrf51_dk, hexiwear,
nuvoton nuc472, vk rz a1h
- ST - fix timer interrupt handler, sleep api fix
- NXP - lpc15xx us ticker fix
- Nordic - analogin fixes, LF clock init addition, enable i2c async
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
Kojto | 93:e188a91d3eaa | 1 | /** |
Kojto | 93:e188a91d3eaa | 2 | ****************************************************************************** |
Kojto | 93:e188a91d3eaa | 3 | * @file stm32f3xx_hal_tim_ex.h |
Kojto | 93:e188a91d3eaa | 4 | * @author MCD Application Team |
Kojto | 123:b0220dba8be7 | 5 | * @version V1.3.0 |
Kojto | 123:b0220dba8be7 | 6 | * @date 01-July-2016 |
Kojto | 93:e188a91d3eaa | 7 | * @brief Header file of TIM HAL Extended module. |
Kojto | 93:e188a91d3eaa | 8 | ****************************************************************************** |
Kojto | 93:e188a91d3eaa | 9 | * @attention |
Kojto | 93:e188a91d3eaa | 10 | * |
Kojto | 122:f9eeca106725 | 11 | * <h2><center>© COPYRIGHT(c) 2016 STMicroelectronics</center></h2> |
Kojto | 93:e188a91d3eaa | 12 | * |
Kojto | 93:e188a91d3eaa | 13 | * Redistribution and use in source and binary forms, with or without modification, |
Kojto | 93:e188a91d3eaa | 14 | * are permitted provided that the following conditions are met: |
Kojto | 93:e188a91d3eaa | 15 | * 1. Redistributions of source code must retain the above copyright notice, |
Kojto | 93:e188a91d3eaa | 16 | * this list of conditions and the following disclaimer. |
Kojto | 93:e188a91d3eaa | 17 | * 2. Redistributions in binary form must reproduce the above copyright notice, |
Kojto | 93:e188a91d3eaa | 18 | * this list of conditions and the following disclaimer in the documentation |
Kojto | 93:e188a91d3eaa | 19 | * and/or other materials provided with the distribution. |
Kojto | 93:e188a91d3eaa | 20 | * 3. Neither the name of STMicroelectronics nor the names of its contributors |
Kojto | 93:e188a91d3eaa | 21 | * may be used to endorse or promote products derived from this software |
Kojto | 93:e188a91d3eaa | 22 | * without specific prior written permission. |
Kojto | 93:e188a91d3eaa | 23 | * |
Kojto | 93:e188a91d3eaa | 24 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
Kojto | 93:e188a91d3eaa | 25 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
Kojto | 93:e188a91d3eaa | 26 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
Kojto | 93:e188a91d3eaa | 27 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
Kojto | 93:e188a91d3eaa | 28 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
Kojto | 93:e188a91d3eaa | 29 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
Kojto | 93:e188a91d3eaa | 30 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
Kojto | 93:e188a91d3eaa | 31 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
Kojto | 93:e188a91d3eaa | 32 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
Kojto | 93:e188a91d3eaa | 33 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
Kojto | 93:e188a91d3eaa | 34 | * |
Kojto | 93:e188a91d3eaa | 35 | ****************************************************************************** |
Kojto | 122:f9eeca106725 | 36 | */ |
Kojto | 93:e188a91d3eaa | 37 | |
Kojto | 93:e188a91d3eaa | 38 | /* Define to prevent recursive inclusion -------------------------------------*/ |
Kojto | 93:e188a91d3eaa | 39 | #ifndef __STM32F3xx_HAL_TIM_EX_H |
Kojto | 93:e188a91d3eaa | 40 | #define __STM32F3xx_HAL_TIM_EX_H |
Kojto | 93:e188a91d3eaa | 41 | |
Kojto | 93:e188a91d3eaa | 42 | #ifdef __cplusplus |
Kojto | 93:e188a91d3eaa | 43 | extern "C" { |
Kojto | 93:e188a91d3eaa | 44 | #endif |
Kojto | 93:e188a91d3eaa | 45 | |
Kojto | 93:e188a91d3eaa | 46 | /* Includes ------------------------------------------------------------------*/ |
Kojto | 93:e188a91d3eaa | 47 | #include "stm32f3xx_hal_def.h" |
Kojto | 93:e188a91d3eaa | 48 | |
Kojto | 93:e188a91d3eaa | 49 | /** @addtogroup STM32F3xx_HAL_Driver |
Kojto | 93:e188a91d3eaa | 50 | * @{ |
Kojto | 93:e188a91d3eaa | 51 | */ |
Kojto | 93:e188a91d3eaa | 52 | |
Kojto | 93:e188a91d3eaa | 53 | /** @addtogroup TIMEx |
Kojto | 93:e188a91d3eaa | 54 | * @{ |
Kojto | 122:f9eeca106725 | 55 | */ |
Kojto | 93:e188a91d3eaa | 56 | |
Kojto | 122:f9eeca106725 | 57 | /* Exported types ------------------------------------------------------------*/ |
Kojto | 122:f9eeca106725 | 58 | /** @defgroup TIMEx_Exported_Types TIMEx Exported Types |
Kojto | 93:e188a91d3eaa | 59 | * @{ |
Kojto | 93:e188a91d3eaa | 60 | */ |
Kojto | 93:e188a91d3eaa | 61 | |
Kojto | 122:f9eeca106725 | 62 | /** |
Kojto | 122:f9eeca106725 | 63 | * @brief TIM Hall sensor Configuration Structure definition |
Kojto | 93:e188a91d3eaa | 64 | */ |
Kojto | 93:e188a91d3eaa | 65 | |
Kojto | 93:e188a91d3eaa | 66 | typedef struct |
Kojto | 93:e188a91d3eaa | 67 | { |
Kojto | 122:f9eeca106725 | 68 | |
Kojto | 93:e188a91d3eaa | 69 | uint32_t IC1Polarity; /*!< Specifies the active edge of the input signal. |
Kojto | 93:e188a91d3eaa | 70 | This parameter can be a value of @ref TIM_Input_Capture_Polarity */ |
Kojto | 122:f9eeca106725 | 71 | |
Kojto | 93:e188a91d3eaa | 72 | uint32_t IC1Prescaler; /*!< Specifies the Input Capture Prescaler. |
Kojto | 93:e188a91d3eaa | 73 | This parameter can be a value of @ref TIM_Input_Capture_Prescaler */ |
Kojto | 122:f9eeca106725 | 74 | |
Kojto | 93:e188a91d3eaa | 75 | uint32_t IC1Filter; /*!< Specifies the input capture filter. |
Kojto | 122:f9eeca106725 | 76 | This parameter can be a number between Min_Data = 0x0 and Max_Data = 0xF */ |
Kojto | 122:f9eeca106725 | 77 | uint32_t Commutation_Delay; /*!< Specifies the pulse value to be loaded into the Capture Compare Register. |
Kojto | 122:f9eeca106725 | 78 | This parameter can be a number between Min_Data = 0x0000 and Max_Data = 0xFFFF */ |
Kojto | 93:e188a91d3eaa | 79 | } TIM_HallSensor_InitTypeDef; |
Kojto | 93:e188a91d3eaa | 80 | |
Kojto | 93:e188a91d3eaa | 81 | #if defined(STM32F373xC) || defined(STM32F378xx) |
Kojto | 122:f9eeca106725 | 82 | /** |
Kojto | 122:f9eeca106725 | 83 | * @brief TIM Master configuration Structure definition |
Kojto | 93:e188a91d3eaa | 84 | * @note STM32F373xC and STM32F378xx: timer instances provide a single TRGO |
Kojto | 93:e188a91d3eaa | 85 | * output |
Kojto | 122:f9eeca106725 | 86 | */ |
Kojto | 93:e188a91d3eaa | 87 | typedef struct { |
Kojto | 122:f9eeca106725 | 88 | uint32_t MasterOutputTrigger; /*!< Trigger output (TRGO) selection |
Kojto | 122:f9eeca106725 | 89 | This parameter can be a value of @ref TIM_Master_Mode_Selection */ |
Kojto | 122:f9eeca106725 | 90 | uint32_t MasterSlaveMode; /*!< Master/slave mode selection |
Kojto | 93:e188a91d3eaa | 91 | This parameter can be a value of @ref TIM_Master_Slave_Mode */ |
Kojto | 93:e188a91d3eaa | 92 | }TIM_MasterConfigTypeDef; |
Kojto | 93:e188a91d3eaa | 93 | |
Kojto | 122:f9eeca106725 | 94 | /** |
Kojto | 122:f9eeca106725 | 95 | * @brief TIM Break and Dead time configuration Structure definition |
Kojto | 93:e188a91d3eaa | 96 | * @note STM32F373xC and STM32F378xx: single break input with configurable polarity. |
Kojto | 122:f9eeca106725 | 97 | */ |
Kojto | 93:e188a91d3eaa | 98 | typedef struct |
Kojto | 93:e188a91d3eaa | 99 | { |
Kojto | 122:f9eeca106725 | 100 | uint32_t OffStateRunMode; /*!< TIM off state in run mode |
Kojto | 93:e188a91d3eaa | 101 | This parameter can be a value of @ref TIM_OSSR_Off_State_Selection_for_Run_mode_state */ |
Kojto | 122:f9eeca106725 | 102 | uint32_t OffStateIDLEMode; /*!< TIM off state in IDLE mode |
Kojto | 93:e188a91d3eaa | 103 | This parameter can be a value of @ref TIM_OSSI_Off_State_Selection_for_Idle_mode_state */ |
Kojto | 122:f9eeca106725 | 104 | uint32_t LockLevel; /*!< TIM Lock level |
Kojto | 122:f9eeca106725 | 105 | This parameter can be a value of @ref TIM_Lock_level */ |
Kojto | 122:f9eeca106725 | 106 | uint32_t DeadTime; /*!< TIM dead Time |
Kojto | 93:e188a91d3eaa | 107 | This parameter can be a number between Min_Data = 0x00 and Max_Data = 0xFF */ |
Kojto | 122:f9eeca106725 | 108 | uint32_t BreakState; /*!< TIM Break State |
Kojto | 93:e188a91d3eaa | 109 | This parameter can be a value of @ref TIM_Break_Input_enable_disable */ |
Kojto | 122:f9eeca106725 | 110 | uint32_t BreakPolarity; /*!< TIM Break input polarity |
Kojto | 93:e188a91d3eaa | 111 | This parameter can be a value of @ref TIM_Break_Polarity */ |
Kojto | 122:f9eeca106725 | 112 | uint32_t AutomaticOutput; /*!< TIM Automatic Output Enable state |
Kojto | 122:f9eeca106725 | 113 | This parameter can be a value of @ref TIM_AOE_Bit_Set_Reset */ |
Kojto | 93:e188a91d3eaa | 114 | } TIM_BreakDeadTimeConfigTypeDef; |
Kojto | 93:e188a91d3eaa | 115 | |
Kojto | 93:e188a91d3eaa | 116 | #endif /* STM32F373xC || STM32F378xx */ |
Kojto | 93:e188a91d3eaa | 117 | |
Kojto | 93:e188a91d3eaa | 118 | #if defined(STM32F302xE) || defined(STM32F303xE) || defined(STM32F398xx) || \ |
Kojto | 93:e188a91d3eaa | 119 | defined(STM32F302xC) || defined(STM32F303xC) || defined(STM32F358xx) || \ |
Kojto | 93:e188a91d3eaa | 120 | defined(STM32F303x8) || defined(STM32F334x8) || defined(STM32F328xx) || \ |
Kojto | 93:e188a91d3eaa | 121 | defined(STM32F301x8) || defined(STM32F302x8) || defined(STM32F318xx) |
Kojto | 122:f9eeca106725 | 122 | /** |
Kojto | 122:f9eeca106725 | 123 | * @brief TIM Break input(s) and Dead time configuration Structure definition |
Kojto | 122:f9eeca106725 | 124 | * @note 2 break inputs can be configured (BKIN and BKIN2) with configurable |
Kojto | 93:e188a91d3eaa | 125 | * filter and polarity. |
Kojto | 122:f9eeca106725 | 126 | */ |
Kojto | 93:e188a91d3eaa | 127 | typedef struct |
Kojto | 93:e188a91d3eaa | 128 | { |
Kojto | 122:f9eeca106725 | 129 | uint32_t OffStateRunMode; /*!< TIM off state in run mode |
Kojto | 93:e188a91d3eaa | 130 | This parameter can be a value of @ref TIM_OSSR_Off_State_Selection_for_Run_mode_state */ |
Kojto | 122:f9eeca106725 | 131 | uint32_t OffStateIDLEMode; /*!< TIM off state in IDLE mode |
Kojto | 93:e188a91d3eaa | 132 | This parameter can be a value of @ref TIM_OSSI_Off_State_Selection_for_Idle_mode_state */ |
Kojto | 122:f9eeca106725 | 133 | uint32_t LockLevel; /*!< TIM Lock level |
Kojto | 122:f9eeca106725 | 134 | This parameter can be a value of @ref TIM_Lock_level */ |
Kojto | 122:f9eeca106725 | 135 | uint32_t DeadTime; /*!< TIM dead Time |
Kojto | 93:e188a91d3eaa | 136 | This parameter can be a number between Min_Data = 0x00 and Max_Data = 0xFF */ |
Kojto | 122:f9eeca106725 | 137 | uint32_t BreakState; /*!< TIM Break State |
Kojto | 93:e188a91d3eaa | 138 | This parameter can be a value of @ref TIM_Break_Input_enable_disable */ |
Kojto | 122:f9eeca106725 | 139 | uint32_t BreakPolarity; /*!< TIM Break input polarity |
Kojto | 93:e188a91d3eaa | 140 | This parameter can be a value of @ref TIM_Break_Polarity */ |
Kojto | 93:e188a91d3eaa | 141 | uint32_t BreakFilter; /*!< Specifies the brek input filter. |
Kojto | 122:f9eeca106725 | 142 | This parameter can be a number between Min_Data = 0x0 and Max_Data = 0xF */ |
Kojto | 122:f9eeca106725 | 143 | uint32_t Break2State; /*!< TIM Break2 State |
Kojto | 93:e188a91d3eaa | 144 | This parameter can be a value of @ref TIMEx_Break2_Input_enable_disable */ |
Kojto | 122:f9eeca106725 | 145 | uint32_t Break2Polarity; /*!< TIM Break2 input polarity |
Kojto | 93:e188a91d3eaa | 146 | This parameter can be a value of @ref TIMEx_Break2_Polarity */ |
Kojto | 93:e188a91d3eaa | 147 | uint32_t Break2Filter; /*!< TIM break2 input filter. |
Kojto | 122:f9eeca106725 | 148 | This parameter can be a number between Min_Data = 0x0 and Max_Data = 0xF */ |
Kojto | 122:f9eeca106725 | 149 | uint32_t AutomaticOutput; /*!< TIM Automatic Output Enable state |
Kojto | 122:f9eeca106725 | 150 | This parameter can be a value of @ref TIM_AOE_Bit_Set_Reset */ |
Kojto | 93:e188a91d3eaa | 151 | } TIM_BreakDeadTimeConfigTypeDef; |
Kojto | 93:e188a91d3eaa | 152 | |
Kojto | 122:f9eeca106725 | 153 | /** |
Kojto | 122:f9eeca106725 | 154 | * @brief TIM Master configuration Structure definition |
Kojto | 93:e188a91d3eaa | 155 | * @note Advanced timers provide TRGO2 internal line which is redirected |
Kojto | 122:f9eeca106725 | 156 | * to the ADC |
Kojto | 122:f9eeca106725 | 157 | */ |
Kojto | 93:e188a91d3eaa | 158 | typedef struct { |
Kojto | 122:f9eeca106725 | 159 | uint32_t MasterOutputTrigger; /*!< Trigger output (TRGO) selection |
Kojto | 122:f9eeca106725 | 160 | This parameter can be a value of @ref TIM_Master_Mode_Selection */ |
Kojto | 122:f9eeca106725 | 161 | uint32_t MasterOutputTrigger2; /*!< Trigger output2 (TRGO2) selection |
Kojto | 93:e188a91d3eaa | 162 | This parameter can be a value of @ref TIMEx_Master_Mode_Selection_2 */ |
Kojto | 122:f9eeca106725 | 163 | uint32_t MasterSlaveMode; /*!< Master/slave mode selection |
Kojto | 93:e188a91d3eaa | 164 | This parameter can be a value of @ref TIM_Master_Slave_Mode */ |
Kojto | 93:e188a91d3eaa | 165 | }TIM_MasterConfigTypeDef; |
Kojto | 93:e188a91d3eaa | 166 | #endif /* STM32F302xE || STM32F303xE || STM32F398xx || */ |
Kojto | 93:e188a91d3eaa | 167 | /* STM32F302xC || STM32F303xC || STM32F358xx || */ |
Kojto | 93:e188a91d3eaa | 168 | /* STM32F303x8 || STM32F334x8 || STM32F328xx || */ |
Kojto | 93:e188a91d3eaa | 169 | /* STM32F301x8 || STM32F302x8 || STM32F318xx */ |
Kojto | 93:e188a91d3eaa | 170 | /** |
Kojto | 93:e188a91d3eaa | 171 | * @} |
Kojto | 93:e188a91d3eaa | 172 | */ |
Kojto | 93:e188a91d3eaa | 173 | |
Kojto | 93:e188a91d3eaa | 174 | /* Exported constants --------------------------------------------------------*/ |
Kojto | 122:f9eeca106725 | 175 | /** @defgroup TIMEx_Exported_Constants TIMEx Exported Constants |
Kojto | 93:e188a91d3eaa | 176 | * @{ |
Kojto | 93:e188a91d3eaa | 177 | */ |
Kojto | 93:e188a91d3eaa | 178 | |
Kojto | 93:e188a91d3eaa | 179 | #if defined(STM32F373xC) || defined(STM32F378xx) |
Kojto | 122:f9eeca106725 | 180 | /** @defgroup TIMEx_Channel TIMEx Channel |
Kojto | 93:e188a91d3eaa | 181 | * @{ |
Kojto | 93:e188a91d3eaa | 182 | */ |
Kojto | 93:e188a91d3eaa | 183 | #define TIM_CHANNEL_1 ((uint32_t)0x0000) |
Kojto | 93:e188a91d3eaa | 184 | #define TIM_CHANNEL_2 ((uint32_t)0x0004) |
Kojto | 93:e188a91d3eaa | 185 | #define TIM_CHANNEL_3 ((uint32_t)0x0008) |
Kojto | 93:e188a91d3eaa | 186 | #define TIM_CHANNEL_4 ((uint32_t)0x000C) |
Kojto | 93:e188a91d3eaa | 187 | #define TIM_CHANNEL_ALL ((uint32_t)0x0018) |
Kojto | 93:e188a91d3eaa | 188 | /** |
Kojto | 93:e188a91d3eaa | 189 | * @} |
Kojto | 122:f9eeca106725 | 190 | */ |
Kojto | 93:e188a91d3eaa | 191 | |
Kojto | 122:f9eeca106725 | 192 | /** @defgroup TIMEx_Output_Compare_and_PWM_modes TIMEx Output Compare and PWM Modes |
Kojto | 93:e188a91d3eaa | 193 | * @{ |
Kojto | 93:e188a91d3eaa | 194 | */ |
Kojto | 93:e188a91d3eaa | 195 | #define TIM_OCMODE_TIMING ((uint32_t)0x0000) |
Kojto | 93:e188a91d3eaa | 196 | #define TIM_OCMODE_ACTIVE ((uint32_t)TIM_CCMR1_OC1M_0) |
Kojto | 93:e188a91d3eaa | 197 | #define TIM_OCMODE_INACTIVE ((uint32_t)TIM_CCMR1_OC1M_1) |
Kojto | 93:e188a91d3eaa | 198 | #define TIM_OCMODE_TOGGLE ((uint32_t)TIM_CCMR1_OC1M_0 | TIM_CCMR1_OC1M_1) |
Kojto | 93:e188a91d3eaa | 199 | #define TIM_OCMODE_PWM1 ((uint32_t)TIM_CCMR1_OC1M_1 | TIM_CCMR1_OC1M_2) |
Kojto | 93:e188a91d3eaa | 200 | #define TIM_OCMODE_PWM2 ((uint32_t)TIM_CCMR1_OC1M) |
Kojto | 93:e188a91d3eaa | 201 | #define TIM_OCMODE_FORCED_ACTIVE ((uint32_t)TIM_CCMR1_OC1M_0 | TIM_CCMR1_OC1M_2) |
Kojto | 93:e188a91d3eaa | 202 | #define TIM_OCMODE_FORCED_INACTIVE ((uint32_t)TIM_CCMR1_OC1M_2) |
Kojto | 93:e188a91d3eaa | 203 | /** |
Kojto | 93:e188a91d3eaa | 204 | * @} |
Kojto | 93:e188a91d3eaa | 205 | */ |
Kojto | 93:e188a91d3eaa | 206 | |
Kojto | 122:f9eeca106725 | 207 | /** @defgroup TIMEx_ClearInput_Source TIMEx Clear Input Source |
Kojto | 93:e188a91d3eaa | 208 | * @{ |
Kojto | 93:e188a91d3eaa | 209 | */ |
Kojto | 122:f9eeca106725 | 210 | #define TIM_CLEARINPUTSOURCE_ETR ((uint32_t)0x0001) |
Kojto | 93:e188a91d3eaa | 211 | #define TIM_CLEARINPUTSOURCE_NONE ((uint32_t)0x0000) |
Kojto | 122:f9eeca106725 | 212 | /** |
Kojto | 122:f9eeca106725 | 213 | * @} |
Kojto | 122:f9eeca106725 | 214 | */ |
Kojto | 93:e188a91d3eaa | 215 | |
Kojto | 122:f9eeca106725 | 216 | /** @defgroup TIMEx_Slave_Mode TIMEx Slave Mode |
Kojto | 122:f9eeca106725 | 217 | * @{ |
Kojto | 122:f9eeca106725 | 218 | */ |
Kojto | 122:f9eeca106725 | 219 | #define TIM_SLAVEMODE_DISABLE ((uint32_t)0x0000) |
Kojto | 122:f9eeca106725 | 220 | #define TIM_SLAVEMODE_RESET ((uint32_t)(TIM_SMCR_SMS_2)) |
Kojto | 122:f9eeca106725 | 221 | #define TIM_SLAVEMODE_GATED ((uint32_t)(TIM_SMCR_SMS_2 | TIM_SMCR_SMS_0)) |
Kojto | 122:f9eeca106725 | 222 | #define TIM_SLAVEMODE_TRIGGER ((uint32_t)(TIM_SMCR_SMS_2 | TIM_SMCR_SMS_1)) |
Kojto | 122:f9eeca106725 | 223 | #define TIM_SLAVEMODE_EXTERNAL1 ((uint32_t)(TIM_SMCR_SMS_2 | TIM_SMCR_SMS_1 | TIM_SMCR_SMS_0)) |
Kojto | 93:e188a91d3eaa | 224 | /** |
Kojto | 93:e188a91d3eaa | 225 | * @} |
Kojto | 93:e188a91d3eaa | 226 | */ |
Kojto | 93:e188a91d3eaa | 227 | |
Kojto | 122:f9eeca106725 | 228 | /** @defgroup TIMEx_Event_Source TIMEx Event Source |
Kojto | 93:e188a91d3eaa | 229 | * @{ |
Kojto | 93:e188a91d3eaa | 230 | */ |
Kojto | 122:f9eeca106725 | 231 | #define TIM_EVENTSOURCE_UPDATE TIM_EGR_UG /*!< Reinitialize the counter and generates an update of the registers */ |
Kojto | 122:f9eeca106725 | 232 | #define TIM_EVENTSOURCE_CC1 TIM_EGR_CC1G /*!< A capture/compare event is generated on channel 1 */ |
Kojto | 122:f9eeca106725 | 233 | #define TIM_EVENTSOURCE_CC2 TIM_EGR_CC2G /*!< A capture/compare event is generated on channel 2 */ |
Kojto | 122:f9eeca106725 | 234 | #define TIM_EVENTSOURCE_CC3 TIM_EGR_CC3G /*!< A capture/compare event is generated on channel 3 */ |
Kojto | 122:f9eeca106725 | 235 | #define TIM_EVENTSOURCE_CC4 TIM_EGR_CC4G /*!< A capture/compare event is generated on channel 4 */ |
Kojto | 122:f9eeca106725 | 236 | #define TIM_EVENTSOURCE_COM TIM_EGR_COMG /*!< A commutation event is generated */ |
Kojto | 122:f9eeca106725 | 237 | #define TIM_EVENTSOURCE_TRIGGER TIM_EGR_TG /*!< A trigger event is generated */ |
Kojto | 122:f9eeca106725 | 238 | #define TIM_EVENTSOURCE_BREAK TIM_EGR_BG /*!< A break event is generated */ |
Kojto | 93:e188a91d3eaa | 239 | /** |
Kojto | 93:e188a91d3eaa | 240 | * @} |
Kojto | 93:e188a91d3eaa | 241 | */ |
Kojto | 93:e188a91d3eaa | 242 | |
Kojto | 122:f9eeca106725 | 243 | /** @defgroup TIMEx_DMA_Base_address TIMEx DMA BAse Address |
Kojto | 122:f9eeca106725 | 244 | * @{ |
Kojto | 122:f9eeca106725 | 245 | */ |
Kojto | 122:f9eeca106725 | 246 | #define TIM_DMABASE_CR1 (0x00000000) |
Kojto | 122:f9eeca106725 | 247 | #define TIM_DMABASE_CR2 (0x00000001) |
Kojto | 122:f9eeca106725 | 248 | #define TIM_DMABASE_SMCR (0x00000002) |
Kojto | 122:f9eeca106725 | 249 | #define TIM_DMABASE_DIER (0x00000003) |
Kojto | 122:f9eeca106725 | 250 | #define TIM_DMABASE_SR (0x00000004) |
Kojto | 122:f9eeca106725 | 251 | #define TIM_DMABASE_EGR (0x00000005) |
Kojto | 122:f9eeca106725 | 252 | #define TIM_DMABASE_CCMR1 (0x00000006) |
Kojto | 122:f9eeca106725 | 253 | #define TIM_DMABASE_CCMR2 (0x00000007) |
Kojto | 122:f9eeca106725 | 254 | #define TIM_DMABASE_CCER (0x00000008) |
Kojto | 122:f9eeca106725 | 255 | #define TIM_DMABASE_CNT (0x00000009) |
Kojto | 122:f9eeca106725 | 256 | #define TIM_DMABASE_PSC (0x0000000A) |
Kojto | 122:f9eeca106725 | 257 | #define TIM_DMABASE_ARR (0x0000000B) |
Kojto | 122:f9eeca106725 | 258 | #define TIM_DMABASE_RCR (0x0000000C) |
Kojto | 122:f9eeca106725 | 259 | #define TIM_DMABASE_CCR1 (0x0000000D) |
Kojto | 122:f9eeca106725 | 260 | #define TIM_DMABASE_CCR2 (0x0000000E) |
Kojto | 122:f9eeca106725 | 261 | #define TIM_DMABASE_CCR3 (0x0000000F) |
Kojto | 122:f9eeca106725 | 262 | #define TIM_DMABASE_CCR4 (0x00000010) |
Kojto | 122:f9eeca106725 | 263 | #define TIM_DMABASE_BDTR (0x00000011) |
Kojto | 122:f9eeca106725 | 264 | #define TIM_DMABASE_DCR (0x00000012) |
Kojto | 122:f9eeca106725 | 265 | #define TIM_DMABASE_OR (0x00000013) |
Kojto | 93:e188a91d3eaa | 266 | /** |
Kojto | 93:e188a91d3eaa | 267 | * @} |
Kojto | 122:f9eeca106725 | 268 | */ |
Kojto | 93:e188a91d3eaa | 269 | #endif /* STM32F373xC || STM32F378xx */ |
Kojto | 93:e188a91d3eaa | 270 | |
Kojto | 93:e188a91d3eaa | 271 | #if defined(STM32F302xE) || defined(STM32F303xE) || defined(STM32F398xx) || \ |
Kojto | 93:e188a91d3eaa | 272 | defined(STM32F302xC) || defined(STM32F303xC) || defined(STM32F358xx) || \ |
Kojto | 93:e188a91d3eaa | 273 | defined(STM32F303x8) || defined(STM32F334x8) || defined(STM32F328xx) || \ |
Kojto | 93:e188a91d3eaa | 274 | defined(STM32F301x8) || defined(STM32F302x8) || defined(STM32F318xx) |
Kojto | 122:f9eeca106725 | 275 | /** @defgroup TIMEx_Channel TIMEx Channel |
Kojto | 93:e188a91d3eaa | 276 | * @{ |
Kojto | 93:e188a91d3eaa | 277 | */ |
Kojto | 93:e188a91d3eaa | 278 | #define TIM_CHANNEL_1 ((uint32_t)0x0000) |
Kojto | 93:e188a91d3eaa | 279 | #define TIM_CHANNEL_2 ((uint32_t)0x0004) |
Kojto | 93:e188a91d3eaa | 280 | #define TIM_CHANNEL_3 ((uint32_t)0x0008) |
Kojto | 93:e188a91d3eaa | 281 | #define TIM_CHANNEL_4 ((uint32_t)0x000C) |
Kojto | 93:e188a91d3eaa | 282 | #define TIM_CHANNEL_5 ((uint32_t)0x0010) |
Kojto | 93:e188a91d3eaa | 283 | #define TIM_CHANNEL_6 ((uint32_t)0x0014) |
Kojto | 93:e188a91d3eaa | 284 | #define TIM_CHANNEL_ALL ((uint32_t)0x003C) |
Kojto | 93:e188a91d3eaa | 285 | /** |
Kojto | 93:e188a91d3eaa | 286 | * @} |
Kojto | 122:f9eeca106725 | 287 | */ |
Kojto | 93:e188a91d3eaa | 288 | |
Kojto | 122:f9eeca106725 | 289 | /** @defgroup TIMEx_Output_Compare_and_PWM_modes TIMEx Output Compare and PWM Modes |
Kojto | 93:e188a91d3eaa | 290 | * @{ |
Kojto | 93:e188a91d3eaa | 291 | */ |
Kojto | 93:e188a91d3eaa | 292 | #define TIM_OCMODE_TIMING ((uint32_t)0x0000) |
Kojto | 93:e188a91d3eaa | 293 | #define TIM_OCMODE_ACTIVE ((uint32_t)TIM_CCMR1_OC1M_0) |
Kojto | 93:e188a91d3eaa | 294 | #define TIM_OCMODE_INACTIVE ((uint32_t)TIM_CCMR1_OC1M_1) |
Kojto | 93:e188a91d3eaa | 295 | #define TIM_OCMODE_TOGGLE ((uint32_t)TIM_CCMR1_OC1M_1 | TIM_CCMR1_OC1M_0) |
Kojto | 93:e188a91d3eaa | 296 | #define TIM_OCMODE_PWM1 ((uint32_t)TIM_CCMR1_OC1M_2 | TIM_CCMR1_OC1M_1) |
Kojto | 93:e188a91d3eaa | 297 | #define TIM_OCMODE_PWM2 ((uint32_t)TIM_CCMR1_OC1M_2 | TIM_CCMR1_OC1M_1 | TIM_CCMR1_OC1M_0) |
Kojto | 93:e188a91d3eaa | 298 | #define TIM_OCMODE_FORCED_ACTIVE ((uint32_t)TIM_CCMR1_OC1M_2 | TIM_CCMR1_OC1M_0) |
Kojto | 93:e188a91d3eaa | 299 | #define TIM_OCMODE_FORCED_INACTIVE ((uint32_t)TIM_CCMR1_OC1M_2) |
Kojto | 93:e188a91d3eaa | 300 | |
Kojto | 93:e188a91d3eaa | 301 | #define TIM_OCMODE_RETRIGERRABLE_OPM1 ((uint32_t)TIM_CCMR1_OC1M_3) |
Kojto | 93:e188a91d3eaa | 302 | #define TIM_OCMODE_RETRIGERRABLE_OPM2 ((uint32_t)TIM_CCMR1_OC1M_3 | TIM_CCMR1_OC1M_0) |
Kojto | 93:e188a91d3eaa | 303 | #define TIM_OCMODE_COMBINED_PWM1 ((uint32_t)TIM_CCMR1_OC1M_3 | TIM_CCMR1_OC1M_2) |
Kojto | 93:e188a91d3eaa | 304 | #define TIM_OCMODE_COMBINED_PWM2 ((uint32_t)TIM_CCMR1_OC1M_3 | TIM_CCMR1_OC1M_0 | TIM_CCMR1_OC1M_2) |
Kojto | 93:e188a91d3eaa | 305 | #define TIM_OCMODE_ASSYMETRIC_PWM1 ((uint32_t)TIM_CCMR1_OC1M_3 | TIM_CCMR1_OC1M_1 | TIM_CCMR1_OC1M_2) |
Kojto | 93:e188a91d3eaa | 306 | #define TIM_OCMODE_ASSYMETRIC_PWM2 ((uint32_t)TIM_CCMR1_OC1M_3 | TIM_CCMR1_OC1M) |
Kojto | 93:e188a91d3eaa | 307 | |
Kojto | 122:f9eeca106725 | 308 | /** |
Kojto | 122:f9eeca106725 | 309 | * @} |
Kojto | 122:f9eeca106725 | 310 | */ |
Kojto | 122:f9eeca106725 | 311 | |
Kojto | 122:f9eeca106725 | 312 | /** @defgroup TIMEx_ClearInput_Source TIMEx Clear Input Source |
Kojto | 122:f9eeca106725 | 313 | * @{ |
Kojto | 122:f9eeca106725 | 314 | */ |
Kojto | 122:f9eeca106725 | 315 | #define TIM_CLEARINPUTSOURCE_ETR ((uint32_t)0x0001) |
Kojto | 122:f9eeca106725 | 316 | #define TIM_CLEARINPUTSOURCE_OCREFCLR ((uint32_t)0x0002) |
Kojto | 122:f9eeca106725 | 317 | #define TIM_CLEARINPUTSOURCE_NONE ((uint32_t)0x0000) |
Kojto | 122:f9eeca106725 | 318 | /** |
Kojto | 122:f9eeca106725 | 319 | * @} |
Kojto | 122:f9eeca106725 | 320 | */ |
Kojto | 122:f9eeca106725 | 321 | |
Kojto | 122:f9eeca106725 | 322 | /** @defgroup TIMEx_Break2_Input_enable_disable TIMEX Break input 2 Enable |
Kojto | 122:f9eeca106725 | 323 | * @{ |
Kojto | 122:f9eeca106725 | 324 | */ |
Kojto | 122:f9eeca106725 | 325 | #define TIM_BREAK2_DISABLE ((uint32_t)0x00000000) |
Kojto | 122:f9eeca106725 | 326 | #define TIM_BREAK2_ENABLE ((uint32_t)TIM_BDTR_BK2E) |
Kojto | 122:f9eeca106725 | 327 | /** |
Kojto | 122:f9eeca106725 | 328 | * @} |
Kojto | 122:f9eeca106725 | 329 | */ |
Kojto | 122:f9eeca106725 | 330 | |
Kojto | 122:f9eeca106725 | 331 | /** @defgroup TIMEx_Break2_Polarity TIMEx Break Input 2 Polarity |
Kojto | 122:f9eeca106725 | 332 | * @{ |
Kojto | 122:f9eeca106725 | 333 | */ |
Kojto | 122:f9eeca106725 | 334 | #define TIM_BREAK2POLARITY_LOW ((uint32_t)0x00000000) |
Kojto | 122:f9eeca106725 | 335 | #define TIM_BREAK2POLARITY_HIGH ((uint32_t)TIM_BDTR_BK2P) |
Kojto | 122:f9eeca106725 | 336 | /** |
Kojto | 122:f9eeca106725 | 337 | * @} |
Kojto | 122:f9eeca106725 | 338 | */ |
Kojto | 122:f9eeca106725 | 339 | |
Kojto | 122:f9eeca106725 | 340 | /** @defgroup TIMEx_Master_Mode_Selection_2 TIMEx Master Mode Selection 2 (TRGO2) |
Kojto | 122:f9eeca106725 | 341 | * @{ |
Kojto | 122:f9eeca106725 | 342 | */ |
Kojto | 122:f9eeca106725 | 343 | #define TIM_TRGO2_RESET ((uint32_t)0x00000000) |
Kojto | 122:f9eeca106725 | 344 | #define TIM_TRGO2_ENABLE ((uint32_t)(TIM_CR2_MMS2_0)) |
Kojto | 122:f9eeca106725 | 345 | #define TIM_TRGO2_UPDATE ((uint32_t)(TIM_CR2_MMS2_1)) |
Kojto | 122:f9eeca106725 | 346 | #define TIM_TRGO2_OC1 ((uint32_t)(TIM_CR2_MMS2_1 | TIM_CR2_MMS2_0)) |
Kojto | 122:f9eeca106725 | 347 | #define TIM_TRGO2_OC1REF ((uint32_t)(TIM_CR2_MMS2_2)) |
Kojto | 122:f9eeca106725 | 348 | #define TIM_TRGO2_OC2REF ((uint32_t)(TIM_CR2_MMS2_2 | TIM_CR2_MMS2_0)) |
Kojto | 122:f9eeca106725 | 349 | #define TIM_TRGO2_OC3REF ((uint32_t)(TIM_CR2_MMS2_2 | TIM_CR2_MMS2_1)) |
Kojto | 122:f9eeca106725 | 350 | #define TIM_TRGO2_OC4REF ((uint32_t)(TIM_CR2_MMS2_2 | TIM_CR2_MMS2_1 | TIM_CR2_MMS2_0)) |
Kojto | 122:f9eeca106725 | 351 | #define TIM_TRGO2_OC5REF ((uint32_t)(TIM_CR2_MMS2_3)) |
Kojto | 122:f9eeca106725 | 352 | #define TIM_TRGO2_OC6REF ((uint32_t)(TIM_CR2_MMS2_3 | TIM_CR2_MMS2_0)) |
Kojto | 122:f9eeca106725 | 353 | #define TIM_TRGO2_OC4REF_RISINGFALLING ((uint32_t)(TIM_CR2_MMS2_3 | TIM_CR2_MMS2_1)) |
Kojto | 122:f9eeca106725 | 354 | #define TIM_TRGO2_OC6REF_RISINGFALLING ((uint32_t)(TIM_CR2_MMS2_3 | TIM_CR2_MMS2_1 | TIM_CR2_MMS2_0)) |
Kojto | 122:f9eeca106725 | 355 | #define TIM_TRGO2_OC4REF_RISING_OC6REF_RISING ((uint32_t)(TIM_CR2_MMS2_3 | TIM_CR2_MMS2_2)) |
Kojto | 122:f9eeca106725 | 356 | #define TIM_TRGO2_OC4REF_RISING_OC6REF_FALLING ((uint32_t)(TIM_CR2_MMS2_3 | TIM_CR2_MMS2_2 | TIM_CR2_MMS2_0)) |
Kojto | 122:f9eeca106725 | 357 | #define TIM_TRGO2_OC5REF_RISING_OC6REF_RISING ((uint32_t)(TIM_CR2_MMS2_3 | TIM_CR2_MMS2_2 |TIM_CR2_MMS2_1)) |
Kojto | 122:f9eeca106725 | 358 | #define TIM_TRGO2_OC5REF_RISING_OC6REF_FALLING ((uint32_t)(TIM_CR2_MMS2_3 | TIM_CR2_MMS2_2 | TIM_CR2_MMS2_1 | TIM_CR2_MMS2_0)) |
Kojto | 122:f9eeca106725 | 359 | /** |
Kojto | 122:f9eeca106725 | 360 | * @} |
Kojto | 122:f9eeca106725 | 361 | */ |
Kojto | 122:f9eeca106725 | 362 | |
Kojto | 122:f9eeca106725 | 363 | /** @defgroup TIMEx_Slave_Mode TIMEx Slave mode |
Kojto | 122:f9eeca106725 | 364 | * @{ |
Kojto | 122:f9eeca106725 | 365 | */ |
Kojto | 122:f9eeca106725 | 366 | #define TIM_SLAVEMODE_DISABLE ((uint32_t)0x0000) |
Kojto | 122:f9eeca106725 | 367 | #define TIM_SLAVEMODE_RESET ((uint32_t)(TIM_SMCR_SMS_2)) |
Kojto | 122:f9eeca106725 | 368 | #define TIM_SLAVEMODE_GATED ((uint32_t)(TIM_SMCR_SMS_2 | TIM_SMCR_SMS_0)) |
Kojto | 122:f9eeca106725 | 369 | #define TIM_SLAVEMODE_TRIGGER ((uint32_t)(TIM_SMCR_SMS_2 | TIM_SMCR_SMS_1)) |
Kojto | 122:f9eeca106725 | 370 | #define TIM_SLAVEMODE_EXTERNAL1 ((uint32_t)(TIM_SMCR_SMS_2 | TIM_SMCR_SMS_1 | TIM_SMCR_SMS_0)) |
Kojto | 122:f9eeca106725 | 371 | #define TIM_SLAVEMODE_COMBINED_RESETTRIGGER ((uint32_t)(TIM_SMCR_SMS_3)) |
Kojto | 122:f9eeca106725 | 372 | /** |
Kojto | 122:f9eeca106725 | 373 | * @} |
Kojto | 122:f9eeca106725 | 374 | */ |
Kojto | 122:f9eeca106725 | 375 | |
Kojto | 122:f9eeca106725 | 376 | /** @defgroup TIM_Event_Source TIMEx Event Source |
Kojto | 122:f9eeca106725 | 377 | * @{ |
Kojto | 122:f9eeca106725 | 378 | */ |
Kojto | 122:f9eeca106725 | 379 | #define TIM_EVENTSOURCE_UPDATE TIM_EGR_UG /*!< Reinitialize the counter and generates an update of the registers */ |
Kojto | 122:f9eeca106725 | 380 | #define TIM_EVENTSOURCE_CC1 TIM_EGR_CC1G /*!< A capture/compare event is generated on channel 1 */ |
Kojto | 122:f9eeca106725 | 381 | #define TIM_EVENTSOURCE_CC2 TIM_EGR_CC2G /*!< A capture/compare event is generated on channel 2 */ |
Kojto | 122:f9eeca106725 | 382 | #define TIM_EVENTSOURCE_CC3 TIM_EGR_CC3G /*!< A capture/compare event is generated on channel 3 */ |
Kojto | 122:f9eeca106725 | 383 | #define TIM_EVENTSOURCE_CC4 TIM_EGR_CC4G /*!< A capture/compare event is generated on channel 4 */ |
Kojto | 122:f9eeca106725 | 384 | #define TIM_EVENTSOURCE_COM TIM_EGR_COMG /*!< A commutation event is generated */ |
Kojto | 122:f9eeca106725 | 385 | #define TIM_EVENTSOURCE_TRIGGER TIM_EGR_TG /*!< A trigger event is generated */ |
Kojto | 122:f9eeca106725 | 386 | #define TIM_EVENTSOURCE_BREAK TIM_EGR_BG /*!< A break event is generated */ |
Kojto | 122:f9eeca106725 | 387 | #define TIM_EVENTSOURCE_BREAK2 TIM_EGR_B2G /*!< A break 2 event is generated */ |
Kojto | 122:f9eeca106725 | 388 | /** |
Kojto | 122:f9eeca106725 | 389 | * @} |
Kojto | 122:f9eeca106725 | 390 | */ |
Kojto | 122:f9eeca106725 | 391 | |
Kojto | 122:f9eeca106725 | 392 | /** @defgroup TIM_DMA_Base_address TIMEx DMA Base Address |
Kojto | 122:f9eeca106725 | 393 | * @{ |
Kojto | 122:f9eeca106725 | 394 | */ |
Kojto | 122:f9eeca106725 | 395 | #define TIM_DMABASE_CR1 (0x00000000) |
Kojto | 122:f9eeca106725 | 396 | #define TIM_DMABASE_CR2 (0x00000001) |
Kojto | 122:f9eeca106725 | 397 | #define TIM_DMABASE_SMCR (0x00000002) |
Kojto | 122:f9eeca106725 | 398 | #define TIM_DMABASE_DIER (0x00000003) |
Kojto | 122:f9eeca106725 | 399 | #define TIM_DMABASE_SR (0x00000004) |
Kojto | 122:f9eeca106725 | 400 | #define TIM_DMABASE_EGR (0x00000005) |
Kojto | 122:f9eeca106725 | 401 | #define TIM_DMABASE_CCMR1 (0x00000006) |
Kojto | 122:f9eeca106725 | 402 | #define TIM_DMABASE_CCMR2 (0x00000007) |
Kojto | 122:f9eeca106725 | 403 | #define TIM_DMABASE_CCER (0x00000008) |
Kojto | 122:f9eeca106725 | 404 | #define TIM_DMABASE_CNT (0x00000009) |
Kojto | 122:f9eeca106725 | 405 | #define TIM_DMABASE_PSC (0x0000000A) |
Kojto | 122:f9eeca106725 | 406 | #define TIM_DMABASE_ARR (0x0000000B) |
Kojto | 122:f9eeca106725 | 407 | #define TIM_DMABASE_RCR (0x0000000C) |
Kojto | 122:f9eeca106725 | 408 | #define TIM_DMABASE_CCR1 (0x0000000D) |
Kojto | 122:f9eeca106725 | 409 | #define TIM_DMABASE_CCR2 (0x0000000E) |
Kojto | 122:f9eeca106725 | 410 | #define TIM_DMABASE_CCR3 (0x0000000F) |
Kojto | 122:f9eeca106725 | 411 | #define TIM_DMABASE_CCR4 (0x00000010) |
Kojto | 122:f9eeca106725 | 412 | #define TIM_DMABASE_BDTR (0x00000011) |
Kojto | 122:f9eeca106725 | 413 | #define TIM_DMABASE_DCR (0x00000012) |
Kojto | 122:f9eeca106725 | 414 | #define TIM_DMABASE_CCMR3 (0x00000015) |
Kojto | 122:f9eeca106725 | 415 | #define TIM_DMABASE_CCR5 (0x00000016) |
Kojto | 122:f9eeca106725 | 416 | #define TIM_DMABASE_CCR6 (0x00000017) |
Kojto | 122:f9eeca106725 | 417 | #define TIM_DMABASE_OR (0x00000018) |
Kojto | 122:f9eeca106725 | 418 | /** |
Kojto | 122:f9eeca106725 | 419 | * @} |
Kojto | 122:f9eeca106725 | 420 | */ |
Kojto | 122:f9eeca106725 | 421 | #endif /* STM32F302xE || STM32F303xE || STM32F398xx || */ |
Kojto | 122:f9eeca106725 | 422 | /* STM32F302xC || STM32F303xC || STM32F358xx || */ |
Kojto | 122:f9eeca106725 | 423 | /* STM32F303x8 || STM32F334x8 || STM32F328xx || */ |
Kojto | 122:f9eeca106725 | 424 | /* STM32F301x8 || STM32F302x8 || STM32F318xx */ |
Kojto | 122:f9eeca106725 | 425 | |
Kojto | 122:f9eeca106725 | 426 | #if defined(STM32F302xE) || \ |
Kojto | 122:f9eeca106725 | 427 | defined(STM32F302xC) || \ |
Kojto | 122:f9eeca106725 | 428 | defined(STM32F303x8) || defined(STM32F334x8) || defined(STM32F328xx) || \ |
Kojto | 122:f9eeca106725 | 429 | defined(STM32F301x8) || defined(STM32F302x8) || defined(STM32F318xx) |
Kojto | 122:f9eeca106725 | 430 | /** @defgroup TIMEx_Remap TIMEx Remapping |
Kojto | 122:f9eeca106725 | 431 | * @{ |
Kojto | 122:f9eeca106725 | 432 | */ |
Kojto | 122:f9eeca106725 | 433 | #define TIM_TIM1_ADC1_NONE (0x00000000) /*!< TIM1_ETR is not connected to any AWD (analog watchdog)*/ |
Kojto | 122:f9eeca106725 | 434 | #define TIM_TIM1_ADC1_AWD1 (0x00000001) /*!< TIM1_ETR is connected to ADC1 AWD1 */ |
Kojto | 122:f9eeca106725 | 435 | #define TIM_TIM1_ADC1_AWD2 (0x00000002) /*!< TIM1_ETR is connected to ADC1 AWD2 */ |
Kojto | 122:f9eeca106725 | 436 | #define TIM_TIM1_ADC1_AWD3 (0x00000003) /*!< TIM1_ETR is connected to ADC1 AWD3 */ |
Kojto | 122:f9eeca106725 | 437 | #define TIM_TIM16_GPIO (0x00000000) /*!< TIM16 TI1 is connected to GPIO */ |
Kojto | 122:f9eeca106725 | 438 | #define TIM_TIM16_RTC (0x00000001) /*!< TIM16 TI1 is connected to RTC_clock */ |
Kojto | 122:f9eeca106725 | 439 | #define TIM_TIM16_HSE (0x00000002) /*!< TIM16 TI1 is connected to HSE/32 */ |
Kojto | 122:f9eeca106725 | 440 | #define TIM_TIM16_MCO (0x00000003) /*!< TIM16 TI1 is connected to MCO */ |
Kojto | 122:f9eeca106725 | 441 | /** |
Kojto | 122:f9eeca106725 | 442 | * @} |
Kojto | 122:f9eeca106725 | 443 | */ |
Kojto | 122:f9eeca106725 | 444 | #endif /* STM32F302xE || */ |
Kojto | 122:f9eeca106725 | 445 | /* STM32F302xC || */ |
Kojto | 122:f9eeca106725 | 446 | /* STM32F303x8 || STM32F334x8 || STM32F328xx || */ |
Kojto | 122:f9eeca106725 | 447 | /* STM32F301x8 || STM32F302x8 || STM32F318xx || */ |
Kojto | 122:f9eeca106725 | 448 | |
Kojto | 122:f9eeca106725 | 449 | #if defined(STM32F303xC) || defined(STM32F358xx) |
Kojto | 122:f9eeca106725 | 450 | /** @defgroup TIMEx_Remap TIMEx Remapping 1 |
Kojto | 122:f9eeca106725 | 451 | * @{ |
Kojto | 122:f9eeca106725 | 452 | */ |
Kojto | 122:f9eeca106725 | 453 | #define TIM_TIM1_ADC1_NONE (0x00000000) /*!< TIM1_ETR is not connected to any AWD (analog watchdog)*/ |
Kojto | 122:f9eeca106725 | 454 | #define TIM_TIM1_ADC1_AWD1 (0x00000001) /*!< TIM1_ETR is connected to ADC1 AWD1 */ |
Kojto | 122:f9eeca106725 | 455 | #define TIM_TIM1_ADC1_AWD2 (0x00000002) /*!< TIM1_ETR is connected to ADC1 AWD2 */ |
Kojto | 122:f9eeca106725 | 456 | #define TIM_TIM1_ADC1_AWD3 (0x00000003) /*!< TIM1_ETR is connected to ADC1 AWD3 */ |
Kojto | 122:f9eeca106725 | 457 | #define TIM_TIM8_ADC2_NONE (0x00000000) /*!< TIM8_ETR is not connected to any AWD (analog watchdog) */ |
Kojto | 122:f9eeca106725 | 458 | #define TIM_TIM8_ADC2_AWD1 (0x00000001) /*!< TIM8_ETR is connected to ADC2 AWD1 */ |
Kojto | 122:f9eeca106725 | 459 | #define TIM_TIM8_ADC2_AWD2 (0x00000002) /*!< TIM8_ETR is connected to ADC2 AWD2 */ |
Kojto | 122:f9eeca106725 | 460 | #define TIM_TIM8_ADC2_AWD3 (0x00000003) /*!< TIM8_ETR is connected to ADC2 AWD3 */ |
Kojto | 122:f9eeca106725 | 461 | #define TIM_TIM16_GPIO (0x00000000) /*!< TIM16 TI1 is connected to GPIO */ |
Kojto | 122:f9eeca106725 | 462 | #define TIM_TIM16_RTC (0x00000001) /*!< TIM16 TI1 is connected to RTC_clock */ |
Kojto | 122:f9eeca106725 | 463 | #define TIM_TIM16_HSE (0x00000002) /*!< TIM16 TI1 is connected to HSE/32 */ |
Kojto | 122:f9eeca106725 | 464 | #define TIM_TIM16_MCO (0x00000003) /*!< TIM16 TI1 is connected to MCO */ |
Kojto | 122:f9eeca106725 | 465 | /** |
Kojto | 122:f9eeca106725 | 466 | * @} |
Kojto | 122:f9eeca106725 | 467 | */ |
Kojto | 122:f9eeca106725 | 468 | |
Kojto | 122:f9eeca106725 | 469 | /** @defgroup TIMEx_Remap2 TIMEx Remapping 2 |
Kojto | 122:f9eeca106725 | 470 | * @{ |
Kojto | 122:f9eeca106725 | 471 | */ |
Kojto | 122:f9eeca106725 | 472 | #define TIM_TIM1_ADC4_NONE (0x00000000) /*!< TIM1_ETR is not connected to any AWD (analog watchdog)*/ |
Kojto | 122:f9eeca106725 | 473 | #define TIM_TIM1_ADC4_AWD1 (0x00000004) /*!< TIM1_ETR is connected to ADC4 AWD1 */ |
Kojto | 122:f9eeca106725 | 474 | #define TIM_TIM1_ADC4_AWD2 (0x00000008) /*!< TIM1_ETR is connected to ADC4 AWD2 */ |
Kojto | 122:f9eeca106725 | 475 | #define TIM_TIM1_ADC4_AWD3 (0x0000000C) /*!< TIM1_ETR is connected to ADC4 AWD3 */ |
Kojto | 122:f9eeca106725 | 476 | #define TIM_TIM8_ADC3_NONE (0x00000000) /*!< TIM8_ETR is not connected to any AWD (analog watchdog) */ |
Kojto | 122:f9eeca106725 | 477 | #define TIM_TIM8_ADC3_AWD1 (0x00000004) /*!< TIM8_ETR is connected to ADC3 AWD1 */ |
Kojto | 122:f9eeca106725 | 478 | #define TIM_TIM8_ADC3_AWD2 (0x00000008) /*!< TIM8_ETR is connected to ADC3 AWD2 */ |
Kojto | 122:f9eeca106725 | 479 | #define TIM_TIM8_ADC3_AWD3 (0x0000000C) /*!< TIM8_ETR is connected to ADC3 AWD3 */ |
Kojto | 122:f9eeca106725 | 480 | #define TIM_TIM16_NONE (0x00000000) /*!< Non significant value for TIM16 */ |
Kojto | 122:f9eeca106725 | 481 | /** |
Kojto | 122:f9eeca106725 | 482 | * @} |
Kojto | 122:f9eeca106725 | 483 | */ |
Kojto | 122:f9eeca106725 | 484 | #endif /* STM32F303xC || STM32F358xx */ |
Kojto | 122:f9eeca106725 | 485 | |
Kojto | 122:f9eeca106725 | 486 | #if defined(STM32F303xE) || defined(STM32F398xx) |
Kojto | 122:f9eeca106725 | 487 | /** @defgroup TIMEx_Remap TIMEx Remapping 1 |
Kojto | 122:f9eeca106725 | 488 | * @{ |
Kojto | 122:f9eeca106725 | 489 | */ |
Kojto | 122:f9eeca106725 | 490 | #define TIM_TIM1_ADC1_NONE (0x00000000) /*!< TIM1_ETR is not connected to any AWD (analog watchdog)*/ |
Kojto | 122:f9eeca106725 | 491 | #define TIM_TIM1_ADC1_AWD1 (0x00000001) /*!< TIM1_ETR is connected to ADC1 AWD1 */ |
Kojto | 122:f9eeca106725 | 492 | #define TIM_TIM1_ADC1_AWD2 (0x00000002) /*!< TIM1_ETR is connected to ADC1 AWD2 */ |
Kojto | 122:f9eeca106725 | 493 | #define TIM_TIM1_ADC1_AWD3 (0x00000003) /*!< TIM1_ETR is connected to ADC1 AWD3 */ |
Kojto | 122:f9eeca106725 | 494 | #define TIM_TIM8_ADC2_NONE (0x00000000) /*!< TIM8_ETR is not connected to any AWD (analog watchdog) */ |
Kojto | 122:f9eeca106725 | 495 | #define TIM_TIM8_ADC2_AWD1 (0x00000001) /*!< TIM8_ETR is connected to ADC2 AWD1 */ |
Kojto | 122:f9eeca106725 | 496 | #define TIM_TIM8_ADC2_AWD2 (0x00000002) /*!< TIM8_ETR is connected to ADC2 AWD2 */ |
Kojto | 122:f9eeca106725 | 497 | #define TIM_TIM8_ADC2_AWD3 (0x00000003) /*!< TIM8_ETR is connected to ADC2 AWD3 */ |
Kojto | 122:f9eeca106725 | 498 | #define TIM_TIM16_GPIO (0x00000000) /*!< TIM16 TI1 is connected to GPIO */ |
Kojto | 122:f9eeca106725 | 499 | #define TIM_TIM16_RTC (0x00000001) /*!< TIM16 TI1 is connected to RTC_clock */ |
Kojto | 122:f9eeca106725 | 500 | #define TIM_TIM16_HSE (0x00000002) /*!< TIM16 TI1 is connected to HSE/32 */ |
Kojto | 122:f9eeca106725 | 501 | #define TIM_TIM16_MCO (0x00000003) /*!< TIM16 TI1 is connected to MCO */ |
Kojto | 122:f9eeca106725 | 502 | #define TIM_TIM20_ADC3_NONE (0x00000000) /*!< TIM20_ETR is not connected to any AWD (analog watchdog) */ |
Kojto | 122:f9eeca106725 | 503 | #define TIM_TIM20_ADC3_AWD1 (0x00000001) /*!< TIM20_ETR is connected to ADC3 AWD1 */ |
Kojto | 122:f9eeca106725 | 504 | #define TIM_TIM20_ADC3_AWD2 (0x00000002) /*!< TIM20_ETR is connected to ADC3 AWD2 */ |
Kojto | 122:f9eeca106725 | 505 | #define TIM_TIM20_ADC3_AWD3 (0x00000003) /*!< TIM20_ETR is connected to ADC3 AWD3 */ |
Kojto | 122:f9eeca106725 | 506 | /** |
Kojto | 122:f9eeca106725 | 507 | * @} |
Kojto | 122:f9eeca106725 | 508 | */ |
Kojto | 122:f9eeca106725 | 509 | |
Kojto | 122:f9eeca106725 | 510 | /** @defgroup TIMEx_Remap2 TIMEx Remapping 2 |
Kojto | 122:f9eeca106725 | 511 | * @{ |
Kojto | 122:f9eeca106725 | 512 | */ |
Kojto | 122:f9eeca106725 | 513 | #define TIM_TIM1_ADC4_NONE (0x00000000) /*!< TIM1_ETR is not connected to any AWD (analog watchdog)*/ |
Kojto | 122:f9eeca106725 | 514 | #define TIM_TIM1_ADC4_AWD1 (0x00000004) /*!< TIM1_ETR is connected to ADC4 AWD1 */ |
Kojto | 122:f9eeca106725 | 515 | #define TIM_TIM1_ADC4_AWD2 (0x00000008) /*!< TIM1_ETR is connected to ADC4 AWD2 */ |
Kojto | 122:f9eeca106725 | 516 | #define TIM_TIM1_ADC4_AWD3 (0x0000000C) /*!< TIM1_ETR is connected to ADC4 AWD3 */ |
Kojto | 122:f9eeca106725 | 517 | #define TIM_TIM8_ADC3_NONE (0x00000000) /*!< TIM8_ETR is not connected to any AWD (analog watchdog) */ |
Kojto | 122:f9eeca106725 | 518 | #define TIM_TIM8_ADC3_AWD1 (0x00000004) /*!< TIM8_ETR is connected to ADC3 AWD1 */ |
Kojto | 122:f9eeca106725 | 519 | #define TIM_TIM8_ADC3_AWD2 (0x00000008) /*!< TIM8_ETR is connected to ADC3 AWD2 */ |
Kojto | 122:f9eeca106725 | 520 | #define TIM_TIM8_ADC3_AWD3 (0x0000000C) /*!< TIM8_ETR is connected to ADC3 AWD3 */ |
Kojto | 122:f9eeca106725 | 521 | #define TIM_TIM16_NONE (0x00000000) /*!< Non significant value for TIM16 */ |
Kojto | 122:f9eeca106725 | 522 | #define TIM_TIM20_ADC4_NONE (0x00000000) /*!< TIM20_ETR is not connected to any AWD (analog watchdog) */ |
Kojto | 122:f9eeca106725 | 523 | #define TIM_TIM20_ADC4_AWD1 (0x00000004) /*!< TIM20_ETR is connected to ADC4 AWD1 */ |
Kojto | 122:f9eeca106725 | 524 | #define TIM_TIM20_ADC4_AWD2 (0x00000008) /*!< TIM20_ETR is connected to ADC4 AWD2 */ |
Kojto | 122:f9eeca106725 | 525 | #define TIM_TIM20_ADC4_AWD3 (0x0000000C) /*!< TIM20_ETR is connected to ADC4 AWD3 */ |
Kojto | 122:f9eeca106725 | 526 | /** |
Kojto | 122:f9eeca106725 | 527 | * @} |
Kojto | 122:f9eeca106725 | 528 | */ |
Kojto | 122:f9eeca106725 | 529 | #endif /* STM32F303xE || STM32F398xx */ |
Kojto | 122:f9eeca106725 | 530 | |
Kojto | 122:f9eeca106725 | 531 | |
Kojto | 122:f9eeca106725 | 532 | #if defined(STM32F373xC) || defined(STM32F378xx) |
Kojto | 122:f9eeca106725 | 533 | /** @defgroup TIMEx_Remap TIMEx remapping |
Kojto | 122:f9eeca106725 | 534 | * @{ |
Kojto | 122:f9eeca106725 | 535 | */ |
Kojto | 122:f9eeca106725 | 536 | #define TIM_TIM2_TIM8_TRGO (0x00000000) /*!< TIM8 TRGOUT is connected to TIM2_ITR1 */ |
Kojto | 122:f9eeca106725 | 537 | #define TIM_TIM2_ETH_PTP (0x00000400) /*!< PTP trigger output is connected to TIM2_ITR1 */ |
Kojto | 122:f9eeca106725 | 538 | #define TIM_TIM2_USBFS_SOF (0x00000800) /*!< OTG FS SOF is connected to the TIM2_ITR1 input */ |
Kojto | 122:f9eeca106725 | 539 | #define TIM_TIM2_USBHS_SOF (0x00000C00) /*!< OTG HS SOF is connected to the TIM2_ITR1 input */ |
Kojto | 122:f9eeca106725 | 540 | #define TIM_TIM14_GPIO (0x00000000) /*!< TIM14 TI1 is connected to GPIO */ |
Kojto | 122:f9eeca106725 | 541 | #define TIM_TIM14_RTC (0x00000001) /*!< TIM14 TI1 is connected to RTC_clock */ |
Kojto | 122:f9eeca106725 | 542 | #define TIM_TIM14_HSE (0x00000002) /*!< TIM14 TI1 is connected to HSE/32 */ |
Kojto | 122:f9eeca106725 | 543 | #define TIM_TIM14_MCO (0x00000003) /*!< TIM14 TI1 is connected to MCO */ |
Kojto | 122:f9eeca106725 | 544 | /** |
Kojto | 122:f9eeca106725 | 545 | * @} |
Kojto | 122:f9eeca106725 | 546 | */ |
Kojto | 122:f9eeca106725 | 547 | #endif /* STM32F373xC || STM32F378xx */ |
Kojto | 122:f9eeca106725 | 548 | |
Kojto | 122:f9eeca106725 | 549 | #if defined(STM32F302xE) || defined(STM32F303xE) || defined(STM32F398xx) || \ |
Kojto | 122:f9eeca106725 | 550 | defined(STM32F302xC) || defined(STM32F303xC) || defined(STM32F358xx) || \ |
Kojto | 122:f9eeca106725 | 551 | defined(STM32F303x8) || defined(STM32F334x8) || defined(STM32F328xx) || \ |
Kojto | 122:f9eeca106725 | 552 | defined(STM32F301x8) || defined(STM32F302x8) || defined(STM32F318xx) |
Kojto | 122:f9eeca106725 | 553 | /** @defgroup TIMEx_Group_Channel5 Group Channel 5 and Channel 1, 2 or 3 |
Kojto | 122:f9eeca106725 | 554 | * @{ |
Kojto | 122:f9eeca106725 | 555 | */ |
Kojto | 122:f9eeca106725 | 556 | #define TIM_GROUPCH5_NONE (uint32_t)0x00000000 /*!< No effect of OC5REF on OC1REFC, OC2REFC and OC3REFC */ |
Kojto | 122:f9eeca106725 | 557 | #define TIM_GROUPCH5_OC1REFC (TIM_CCR5_GC5C1) /*!< OC1REFC is the logical AND of OC1REFC and OC5REF */ |
Kojto | 122:f9eeca106725 | 558 | #define TIM_GROUPCH5_OC2REFC (TIM_CCR5_GC5C2) /*!< OC2REFC is the logical AND of OC2REFC and OC5REF */ |
Kojto | 122:f9eeca106725 | 559 | #define TIM_GROUPCH5_OC3REFC (TIM_CCR5_GC5C3) /*!< OC3REFC is the logical AND of OC3REFC and OC5REF */ |
Kojto | 122:f9eeca106725 | 560 | /** |
Kojto | 122:f9eeca106725 | 561 | * @} |
Kojto | 122:f9eeca106725 | 562 | */ |
Kojto | 122:f9eeca106725 | 563 | #endif /* STM32F302xE || STM32F303xE || STM32F398xx || */ |
Kojto | 122:f9eeca106725 | 564 | /* STM32F302xC || STM32F303xC || STM32F358xx || */ |
Kojto | 122:f9eeca106725 | 565 | /* STM32F303x8 || STM32F334x8 || STM32F328xx || */ |
Kojto | 122:f9eeca106725 | 566 | /* STM32F301x8 || STM32F302x8 || STM32F318xx */ |
Kojto | 122:f9eeca106725 | 567 | |
Kojto | 122:f9eeca106725 | 568 | /** |
Kojto | 122:f9eeca106725 | 569 | * @} |
Kojto | 122:f9eeca106725 | 570 | */ |
Kojto | 122:f9eeca106725 | 571 | |
Kojto | 122:f9eeca106725 | 572 | |
Kojto | 122:f9eeca106725 | 573 | /* Private Macros -----------------------------------------------------------*/ |
Kojto | 122:f9eeca106725 | 574 | /** @defgroup TIM_Private_Macros TIM Private Macros |
Kojto | 122:f9eeca106725 | 575 | * @{ |
Kojto | 122:f9eeca106725 | 576 | */ |
Kojto | 122:f9eeca106725 | 577 | #if defined(STM32F373xC) || defined(STM32F378xx) |
Kojto | 122:f9eeca106725 | 578 | |
Kojto | 122:f9eeca106725 | 579 | #define IS_TIM_CHANNELS(CHANNEL) (((CHANNEL) == TIM_CHANNEL_1) || \ |
Kojto | 122:f9eeca106725 | 580 | ((CHANNEL) == TIM_CHANNEL_2) || \ |
Kojto | 122:f9eeca106725 | 581 | ((CHANNEL) == TIM_CHANNEL_3) || \ |
Kojto | 122:f9eeca106725 | 582 | ((CHANNEL) == TIM_CHANNEL_4) || \ |
Kojto | 122:f9eeca106725 | 583 | ((CHANNEL) == TIM_CHANNEL_ALL)) |
Kojto | 122:f9eeca106725 | 584 | |
Kojto | 122:f9eeca106725 | 585 | #define IS_TIM_OPM_CHANNELS(CHANNEL) (((CHANNEL) == TIM_CHANNEL_1) || \ |
Kojto | 122:f9eeca106725 | 586 | ((CHANNEL) == TIM_CHANNEL_2)) |
Kojto | 122:f9eeca106725 | 587 | |
Kojto | 122:f9eeca106725 | 588 | #define IS_TIM_COMPLEMENTARY_CHANNELS(CHANNEL) (((CHANNEL) == TIM_CHANNEL_1) || \ |
Kojto | 122:f9eeca106725 | 589 | ((CHANNEL) == TIM_CHANNEL_2) || \ |
Kojto | 122:f9eeca106725 | 590 | ((CHANNEL) == TIM_CHANNEL_3)) |
Kojto | 122:f9eeca106725 | 591 | |
Kojto | 122:f9eeca106725 | 592 | #define IS_TIM_PWM_MODE(MODE) (((MODE) == TIM_OCMODE_PWM1) || \ |
Kojto | 122:f9eeca106725 | 593 | ((MODE) == TIM_OCMODE_PWM2)) |
Kojto | 122:f9eeca106725 | 594 | |
Kojto | 122:f9eeca106725 | 595 | #define IS_TIM_OC_MODE(MODE) (((MODE) == TIM_OCMODE_TIMING) || \ |
Kojto | 122:f9eeca106725 | 596 | ((MODE) == TIM_OCMODE_ACTIVE) || \ |
Kojto | 122:f9eeca106725 | 597 | ((MODE) == TIM_OCMODE_INACTIVE) || \ |
Kojto | 122:f9eeca106725 | 598 | ((MODE) == TIM_OCMODE_TOGGLE) || \ |
Kojto | 122:f9eeca106725 | 599 | ((MODE) == TIM_OCMODE_FORCED_ACTIVE) || \ |
Kojto | 122:f9eeca106725 | 600 | ((MODE) == TIM_OCMODE_FORCED_INACTIVE)) |
Kojto | 122:f9eeca106725 | 601 | |
Kojto | 122:f9eeca106725 | 602 | #define IS_TIM_CLEARINPUT_SOURCE(SOURCE) (((SOURCE) == TIM_CLEARINPUTSOURCE_NONE) || \ |
Kojto | 122:f9eeca106725 | 603 | ((SOURCE) == TIM_CLEARINPUTSOURCE_ETR)) |
Kojto | 122:f9eeca106725 | 604 | |
Kojto | 122:f9eeca106725 | 605 | #define IS_TIM_SLAVE_MODE(MODE) (((MODE) == TIM_SLAVEMODE_DISABLE) || \ |
Kojto | 122:f9eeca106725 | 606 | ((MODE) == TIM_SLAVEMODE_RESET) || \ |
Kojto | 122:f9eeca106725 | 607 | ((MODE) == TIM_SLAVEMODE_GATED) || \ |
Kojto | 122:f9eeca106725 | 608 | ((MODE) == TIM_SLAVEMODE_TRIGGER) || \ |
Kojto | 122:f9eeca106725 | 609 | ((MODE) == TIM_SLAVEMODE_EXTERNAL1)) |
Kojto | 122:f9eeca106725 | 610 | |
Kojto | 122:f9eeca106725 | 611 | #define IS_TIM_EVENT_SOURCE(SOURCE) ((((SOURCE) & 0xFFFFFF00U) == 0x00000000) && ((SOURCE) != 0x00000000)) |
Kojto | 122:f9eeca106725 | 612 | |
Kojto | 122:f9eeca106725 | 613 | #define IS_TIM_DMA_BASE(BASE) (((BASE) == TIM_DMABASE_CR1) || \ |
Kojto | 122:f9eeca106725 | 614 | ((BASE) == TIM_DMABASE_CR2) || \ |
Kojto | 122:f9eeca106725 | 615 | ((BASE) == TIM_DMABASE_SMCR) || \ |
Kojto | 122:f9eeca106725 | 616 | ((BASE) == TIM_DMABASE_DIER) || \ |
Kojto | 122:f9eeca106725 | 617 | ((BASE) == TIM_DMABASE_SR) || \ |
Kojto | 122:f9eeca106725 | 618 | ((BASE) == TIM_DMABASE_EGR) || \ |
Kojto | 122:f9eeca106725 | 619 | ((BASE) == TIM_DMABASE_CCMR1) || \ |
Kojto | 122:f9eeca106725 | 620 | ((BASE) == TIM_DMABASE_CCMR2) || \ |
Kojto | 122:f9eeca106725 | 621 | ((BASE) == TIM_DMABASE_CCER) || \ |
Kojto | 122:f9eeca106725 | 622 | ((BASE) == TIM_DMABASE_CNT) || \ |
Kojto | 122:f9eeca106725 | 623 | ((BASE) == TIM_DMABASE_PSC) || \ |
Kojto | 122:f9eeca106725 | 624 | ((BASE) == TIM_DMABASE_ARR) || \ |
Kojto | 122:f9eeca106725 | 625 | ((BASE) == TIM_DMABASE_RCR) || \ |
Kojto | 122:f9eeca106725 | 626 | ((BASE) == TIM_DMABASE_CCR1) || \ |
Kojto | 122:f9eeca106725 | 627 | ((BASE) == TIM_DMABASE_CCR2) || \ |
Kojto | 122:f9eeca106725 | 628 | ((BASE) == TIM_DMABASE_CCR3) || \ |
Kojto | 122:f9eeca106725 | 629 | ((BASE) == TIM_DMABASE_CCR4) || \ |
Kojto | 122:f9eeca106725 | 630 | ((BASE) == TIM_DMABASE_BDTR) || \ |
Kojto | 122:f9eeca106725 | 631 | ((BASE) == TIM_DMABASE_DCR) || \ |
Kojto | 122:f9eeca106725 | 632 | ((BASE) == TIM_DMABASE_OR)) |
Kojto | 122:f9eeca106725 | 633 | |
Kojto | 122:f9eeca106725 | 634 | #endif /* STM32F373xC || STM32F378xx */ |
Kojto | 122:f9eeca106725 | 635 | |
Kojto | 122:f9eeca106725 | 636 | |
Kojto | 122:f9eeca106725 | 637 | |
Kojto | 122:f9eeca106725 | 638 | #if defined(STM32F302xE) || defined(STM32F303xE) || defined(STM32F398xx) || \ |
Kojto | 122:f9eeca106725 | 639 | defined(STM32F302xC) || defined(STM32F303xC) || defined(STM32F358xx) || \ |
Kojto | 122:f9eeca106725 | 640 | defined(STM32F303x8) || defined(STM32F334x8) || defined(STM32F328xx) || \ |
Kojto | 122:f9eeca106725 | 641 | defined(STM32F301x8) || defined(STM32F302x8) || defined(STM32F318xx) |
Kojto | 122:f9eeca106725 | 642 | |
Kojto | 122:f9eeca106725 | 643 | #define IS_TIM_CHANNELS(CHANNEL) (((CHANNEL) == TIM_CHANNEL_1) || \ |
Kojto | 122:f9eeca106725 | 644 | ((CHANNEL) == TIM_CHANNEL_2) || \ |
Kojto | 122:f9eeca106725 | 645 | ((CHANNEL) == TIM_CHANNEL_3) || \ |
Kojto | 122:f9eeca106725 | 646 | ((CHANNEL) == TIM_CHANNEL_4) || \ |
Kojto | 122:f9eeca106725 | 647 | ((CHANNEL) == TIM_CHANNEL_5) || \ |
Kojto | 122:f9eeca106725 | 648 | ((CHANNEL) == TIM_CHANNEL_6) || \ |
Kojto | 122:f9eeca106725 | 649 | ((CHANNEL) == TIM_CHANNEL_ALL)) |
Kojto | 122:f9eeca106725 | 650 | |
Kojto | 122:f9eeca106725 | 651 | #define IS_TIM_OPM_CHANNELS(CHANNEL) (((CHANNEL) == TIM_CHANNEL_1) || \ |
Kojto | 122:f9eeca106725 | 652 | ((CHANNEL) == TIM_CHANNEL_2)) |
Kojto | 122:f9eeca106725 | 653 | |
Kojto | 122:f9eeca106725 | 654 | #define IS_TIM_COMPLEMENTARY_CHANNELS(CHANNEL) (((CHANNEL) == TIM_CHANNEL_1) || \ |
Kojto | 122:f9eeca106725 | 655 | ((CHANNEL) == TIM_CHANNEL_2) || \ |
Kojto | 122:f9eeca106725 | 656 | ((CHANNEL) == TIM_CHANNEL_3)) |
Kojto | 122:f9eeca106725 | 657 | |
Kojto | 93:e188a91d3eaa | 658 | #define IS_TIM_PWM_MODE(MODE) (((MODE) == TIM_OCMODE_PWM1) || \ |
Kojto | 93:e188a91d3eaa | 659 | ((MODE) == TIM_OCMODE_PWM2) || \ |
Kojto | 93:e188a91d3eaa | 660 | ((MODE) == TIM_OCMODE_COMBINED_PWM1) || \ |
Kojto | 93:e188a91d3eaa | 661 | ((MODE) == TIM_OCMODE_COMBINED_PWM2) || \ |
Kojto | 93:e188a91d3eaa | 662 | ((MODE) == TIM_OCMODE_ASSYMETRIC_PWM1) || \ |
Kojto | 93:e188a91d3eaa | 663 | ((MODE) == TIM_OCMODE_ASSYMETRIC_PWM2)) |
Kojto | 93:e188a91d3eaa | 664 | |
Kojto | 93:e188a91d3eaa | 665 | #define IS_TIM_OC_MODE(MODE) (((MODE) == TIM_OCMODE_TIMING) || \ |
Kojto | 93:e188a91d3eaa | 666 | ((MODE) == TIM_OCMODE_ACTIVE) || \ |
Kojto | 93:e188a91d3eaa | 667 | ((MODE) == TIM_OCMODE_INACTIVE) || \ |
Kojto | 93:e188a91d3eaa | 668 | ((MODE) == TIM_OCMODE_TOGGLE) || \ |
Kojto | 93:e188a91d3eaa | 669 | ((MODE) == TIM_OCMODE_FORCED_ACTIVE) || \ |
Kojto | 93:e188a91d3eaa | 670 | ((MODE) == TIM_OCMODE_FORCED_INACTIVE) || \ |
Kojto | 93:e188a91d3eaa | 671 | ((MODE) == TIM_OCMODE_RETRIGERRABLE_OPM1) || \ |
Kojto | 93:e188a91d3eaa | 672 | ((MODE) == TIM_OCMODE_RETRIGERRABLE_OPM2)) |
Kojto | 93:e188a91d3eaa | 673 | |
Kojto | 93:e188a91d3eaa | 674 | #define IS_TIM_CLEARINPUT_SOURCE(MODE) (((MODE) == TIM_CLEARINPUTSOURCE_ETR) || \ |
Kojto | 93:e188a91d3eaa | 675 | ((MODE) == TIM_CLEARINPUTSOURCE_OCREFCLR) || \ |
Kojto | 93:e188a91d3eaa | 676 | ((MODE) == TIM_CLEARINPUTSOURCE_NONE)) |
Kojto | 93:e188a91d3eaa | 677 | |
Kojto | 93:e188a91d3eaa | 678 | #define IS_TIM_BREAK_FILTER(BRKFILTER) ((BRKFILTER) <= 0xF) |
Kojto | 93:e188a91d3eaa | 679 | |
Kojto | 93:e188a91d3eaa | 680 | #define IS_TIM_BREAK2_STATE(STATE) (((STATE) == TIM_BREAK2_ENABLE) || \ |
Kojto | 93:e188a91d3eaa | 681 | ((STATE) == TIM_BREAK2_DISABLE)) |
Kojto | 93:e188a91d3eaa | 682 | |
Kojto | 93:e188a91d3eaa | 683 | #define IS_TIM_BREAK2_POLARITY(POLARITY) (((POLARITY) == TIM_BREAK2POLARITY_LOW) || \ |
Kojto | 93:e188a91d3eaa | 684 | ((POLARITY) == TIM_BREAK2POLARITY_HIGH)) |
Kojto | 93:e188a91d3eaa | 685 | |
Kojto | 93:e188a91d3eaa | 686 | #define IS_TIM_TRGO2_SOURCE(SOURCE) (((SOURCE) == TIM_TRGO2_RESET) || \ |
Kojto | 93:e188a91d3eaa | 687 | ((SOURCE) == TIM_TRGO2_ENABLE) || \ |
Kojto | 93:e188a91d3eaa | 688 | ((SOURCE) == TIM_TRGO2_UPDATE) || \ |
Kojto | 93:e188a91d3eaa | 689 | ((SOURCE) == TIM_TRGO2_OC1) || \ |
Kojto | 93:e188a91d3eaa | 690 | ((SOURCE) == TIM_TRGO2_OC1REF) || \ |
Kojto | 93:e188a91d3eaa | 691 | ((SOURCE) == TIM_TRGO2_OC2REF) || \ |
Kojto | 93:e188a91d3eaa | 692 | ((SOURCE) == TIM_TRGO2_OC3REF) || \ |
Kojto | 93:e188a91d3eaa | 693 | ((SOURCE) == TIM_TRGO2_OC3REF) || \ |
Kojto | 93:e188a91d3eaa | 694 | ((SOURCE) == TIM_TRGO2_OC4REF) || \ |
Kojto | 93:e188a91d3eaa | 695 | ((SOURCE) == TIM_TRGO2_OC5REF) || \ |
Kojto | 93:e188a91d3eaa | 696 | ((SOURCE) == TIM_TRGO2_OC6REF) || \ |
Kojto | 93:e188a91d3eaa | 697 | ((SOURCE) == TIM_TRGO2_OC4REF_RISINGFALLING) || \ |
Kojto | 93:e188a91d3eaa | 698 | ((SOURCE) == TIM_TRGO2_OC6REF_RISINGFALLING) || \ |
Kojto | 93:e188a91d3eaa | 699 | ((SOURCE) == TIM_TRGO2_OC4REF_RISING_OC6REF_RISING) || \ |
Kojto | 93:e188a91d3eaa | 700 | ((SOURCE) == TIM_TRGO2_OC4REF_RISING_OC6REF_FALLING) || \ |
Kojto | 93:e188a91d3eaa | 701 | ((SOURCE) == TIM_TRGO2_OC5REF_RISING_OC6REF_RISING) || \ |
Kojto | 93:e188a91d3eaa | 702 | ((SOURCE) == TIM_TRGO2_OC5REF_RISING_OC6REF_FALLING)) |
Kojto | 93:e188a91d3eaa | 703 | |
Kojto | 93:e188a91d3eaa | 704 | #define IS_TIM_SLAVE_MODE(MODE) (((MODE) == TIM_SLAVEMODE_DISABLE) || \ |
Kojto | 93:e188a91d3eaa | 705 | ((MODE) == TIM_SLAVEMODE_RESET) || \ |
Kojto | 93:e188a91d3eaa | 706 | ((MODE) == TIM_SLAVEMODE_GATED) || \ |
Kojto | 93:e188a91d3eaa | 707 | ((MODE) == TIM_SLAVEMODE_TRIGGER) || \ |
Kojto | 93:e188a91d3eaa | 708 | ((MODE) == TIM_SLAVEMODE_EXTERNAL1) || \ |
Kojto | 93:e188a91d3eaa | 709 | ((MODE) == TIM_SLAVEMODE_COMBINED_RESETTRIGGER)) |
Kojto | 93:e188a91d3eaa | 710 | |
Kojto | 122:f9eeca106725 | 711 | #define IS_TIM_EVENT_SOURCE(SOURCE) ((((SOURCE) & 0xFFFFFE00U) == 0x00000000) && ((SOURCE) != 0x00000000)) |
Kojto | 122:f9eeca106725 | 712 | |
Kojto | 122:f9eeca106725 | 713 | #define IS_TIM_DMA_BASE(BASE) (((BASE) == TIM_DMABASE_CR1) || \ |
Kojto | 122:f9eeca106725 | 714 | ((BASE) == TIM_DMABASE_CR2) || \ |
Kojto | 122:f9eeca106725 | 715 | ((BASE) == TIM_DMABASE_SMCR) || \ |
Kojto | 122:f9eeca106725 | 716 | ((BASE) == TIM_DMABASE_DIER) || \ |
Kojto | 122:f9eeca106725 | 717 | ((BASE) == TIM_DMABASE_SR) || \ |
Kojto | 122:f9eeca106725 | 718 | ((BASE) == TIM_DMABASE_EGR) || \ |
Kojto | 122:f9eeca106725 | 719 | ((BASE) == TIM_DMABASE_CCMR1) || \ |
Kojto | 122:f9eeca106725 | 720 | ((BASE) == TIM_DMABASE_CCMR2) || \ |
Kojto | 122:f9eeca106725 | 721 | ((BASE) == TIM_DMABASE_CCER) || \ |
Kojto | 122:f9eeca106725 | 722 | ((BASE) == TIM_DMABASE_CNT) || \ |
Kojto | 122:f9eeca106725 | 723 | ((BASE) == TIM_DMABASE_PSC) || \ |
Kojto | 122:f9eeca106725 | 724 | ((BASE) == TIM_DMABASE_ARR) || \ |
Kojto | 122:f9eeca106725 | 725 | ((BASE) == TIM_DMABASE_RCR) || \ |
Kojto | 122:f9eeca106725 | 726 | ((BASE) == TIM_DMABASE_CCR1) || \ |
Kojto | 122:f9eeca106725 | 727 | ((BASE) == TIM_DMABASE_CCR2) || \ |
Kojto | 122:f9eeca106725 | 728 | ((BASE) == TIM_DMABASE_CCR3) || \ |
Kojto | 122:f9eeca106725 | 729 | ((BASE) == TIM_DMABASE_CCR4) || \ |
Kojto | 122:f9eeca106725 | 730 | ((BASE) == TIM_DMABASE_BDTR) || \ |
Kojto | 122:f9eeca106725 | 731 | ((BASE) == TIM_DMABASE_CCMR3) || \ |
Kojto | 122:f9eeca106725 | 732 | ((BASE) == TIM_DMABASE_CCR5) || \ |
Kojto | 122:f9eeca106725 | 733 | ((BASE) == TIM_DMABASE_CCR6) || \ |
Kojto | 122:f9eeca106725 | 734 | ((BASE) == TIM_DMABASE_OR)) |
Kojto | 122:f9eeca106725 | 735 | |
Kojto | 93:e188a91d3eaa | 736 | #endif /* STM32F302xE || STM32F303xE || STM32F398xx || */ |
Kojto | 93:e188a91d3eaa | 737 | /* STM32F302xC || STM32F303xC || STM32F358xx || */ |
Kojto | 93:e188a91d3eaa | 738 | /* STM32F303x8 || STM32F334x8 || STM32F328xx || */ |
Kojto | 93:e188a91d3eaa | 739 | /* STM32F301x8 || STM32F302x8 || STM32F318xx */ |
Kojto | 93:e188a91d3eaa | 740 | |
Kojto | 93:e188a91d3eaa | 741 | #if defined(STM32F302xE) || \ |
Kojto | 93:e188a91d3eaa | 742 | defined(STM32F302xC) || \ |
Kojto | 93:e188a91d3eaa | 743 | defined(STM32F303x8) || defined(STM32F334x8) || defined(STM32F328xx) || \ |
Kojto | 93:e188a91d3eaa | 744 | defined(STM32F301x8) || defined(STM32F302x8) || defined(STM32F318xx) |
Kojto | 93:e188a91d3eaa | 745 | |
Kojto | 93:e188a91d3eaa | 746 | #define IS_TIM_REMAP(REMAP) (((REMAP) == TIM_TIM1_ADC1_NONE) ||\ |
Kojto | 93:e188a91d3eaa | 747 | ((REMAP) == TIM_TIM1_ADC1_AWD1) ||\ |
Kojto | 93:e188a91d3eaa | 748 | ((REMAP) == TIM_TIM1_ADC1_AWD2) ||\ |
Kojto | 93:e188a91d3eaa | 749 | ((REMAP) == TIM_TIM1_ADC1_AWD3) ||\ |
Kojto | 93:e188a91d3eaa | 750 | ((REMAP) == TIM_TIM16_GPIO) ||\ |
Kojto | 93:e188a91d3eaa | 751 | ((REMAP) == TIM_TIM16_RTC) ||\ |
Kojto | 93:e188a91d3eaa | 752 | ((REMAP) == TIM_TIM16_HSE) ||\ |
Kojto | 93:e188a91d3eaa | 753 | ((REMAP) == TIM_TIM16_MCO)) |
Kojto | 122:f9eeca106725 | 754 | |
Kojto | 93:e188a91d3eaa | 755 | #endif /* STM32F302xE || */ |
Kojto | 93:e188a91d3eaa | 756 | /* STM32F302xC || */ |
Kojto | 93:e188a91d3eaa | 757 | /* STM32F303x8 || STM32F334x8 || STM32F328xx || */ |
Kojto | 93:e188a91d3eaa | 758 | /* STM32F301x8 || STM32F302x8 || STM32F318xx || */ |
Kojto | 93:e188a91d3eaa | 759 | |
Kojto | 93:e188a91d3eaa | 760 | #if defined(STM32F303xC) || defined(STM32F358xx) |
Kojto | 93:e188a91d3eaa | 761 | |
Kojto | 93:e188a91d3eaa | 762 | #define IS_TIM_REMAP(REMAP1) (((REMAP1) == TIM_TIM1_ADC1_NONE) ||\ |
Kojto | 93:e188a91d3eaa | 763 | ((REMAP1) == TIM_TIM1_ADC1_AWD1) ||\ |
Kojto | 93:e188a91d3eaa | 764 | ((REMAP1) == TIM_TIM1_ADC1_AWD2) ||\ |
Kojto | 93:e188a91d3eaa | 765 | ((REMAP1) == TIM_TIM1_ADC1_AWD3) ||\ |
Kojto | 93:e188a91d3eaa | 766 | ((REMAP1) == TIM_TIM8_ADC2_NONE) ||\ |
Kojto | 93:e188a91d3eaa | 767 | ((REMAP1) == TIM_TIM8_ADC2_AWD1) ||\ |
Kojto | 93:e188a91d3eaa | 768 | ((REMAP1) == TIM_TIM8_ADC2_AWD2) ||\ |
Kojto | 93:e188a91d3eaa | 769 | ((REMAP1) == TIM_TIM8_ADC2_AWD3) ||\ |
Kojto | 93:e188a91d3eaa | 770 | ((REMAP1) == TIM_TIM16_GPIO) ||\ |
Kojto | 93:e188a91d3eaa | 771 | ((REMAP1) == TIM_TIM16_RTC) ||\ |
Kojto | 93:e188a91d3eaa | 772 | ((REMAP1) == TIM_TIM16_HSE) ||\ |
Kojto | 93:e188a91d3eaa | 773 | ((REMAP1) == TIM_TIM16_MCO)) |
Kojto | 93:e188a91d3eaa | 774 | |
Kojto | 93:e188a91d3eaa | 775 | #define IS_TIM_REMAP2(REMAP2) (((REMAP2) == TIM_TIM1_ADC4_NONE) ||\ |
Kojto | 93:e188a91d3eaa | 776 | ((REMAP2) == TIM_TIM1_ADC4_AWD1) ||\ |
Kojto | 93:e188a91d3eaa | 777 | ((REMAP2) == TIM_TIM1_ADC4_AWD2) ||\ |
Kojto | 93:e188a91d3eaa | 778 | ((REMAP2) == TIM_TIM1_ADC4_AWD3) ||\ |
Kojto | 93:e188a91d3eaa | 779 | ((REMAP2) == TIM_TIM8_ADC3_NONE) ||\ |
Kojto | 93:e188a91d3eaa | 780 | ((REMAP2) == TIM_TIM8_ADC3_AWD1) ||\ |
Kojto | 93:e188a91d3eaa | 781 | ((REMAP2) == TIM_TIM8_ADC3_AWD2) ||\ |
Kojto | 93:e188a91d3eaa | 782 | ((REMAP2) == TIM_TIM8_ADC3_AWD3) ||\ |
Kojto | 93:e188a91d3eaa | 783 | ((REMAP2) == TIM_TIM16_NONE)) |
Kojto | 122:f9eeca106725 | 784 | |
Kojto | 93:e188a91d3eaa | 785 | #endif /* STM32F303xC || STM32F358xx */ |
Kojto | 93:e188a91d3eaa | 786 | |
Kojto | 93:e188a91d3eaa | 787 | #if defined(STM32F303xE) || defined(STM32F398xx) |
Kojto | 93:e188a91d3eaa | 788 | |
Kojto | 93:e188a91d3eaa | 789 | #define IS_TIM_REMAP(REMAP1) (((REMAP1) == TIM_TIM1_ADC1_NONE) ||\ |
Kojto | 93:e188a91d3eaa | 790 | ((REMAP1) == TIM_TIM1_ADC1_AWD1) ||\ |
Kojto | 93:e188a91d3eaa | 791 | ((REMAP1) == TIM_TIM1_ADC1_AWD2) ||\ |
Kojto | 93:e188a91d3eaa | 792 | ((REMAP1) == TIM_TIM1_ADC1_AWD3) ||\ |
Kojto | 93:e188a91d3eaa | 793 | ((REMAP1) == TIM_TIM8_ADC2_NONE) ||\ |
Kojto | 93:e188a91d3eaa | 794 | ((REMAP1) == TIM_TIM8_ADC2_AWD1) ||\ |
Kojto | 93:e188a91d3eaa | 795 | ((REMAP1) == TIM_TIM8_ADC2_AWD2) ||\ |
Kojto | 93:e188a91d3eaa | 796 | ((REMAP1) == TIM_TIM8_ADC2_AWD3) ||\ |
Kojto | 93:e188a91d3eaa | 797 | ((REMAP1) == TIM_TIM16_GPIO) ||\ |
Kojto | 93:e188a91d3eaa | 798 | ((REMAP1) == TIM_TIM16_RTC) ||\ |
Kojto | 93:e188a91d3eaa | 799 | ((REMAP1) == TIM_TIM16_HSE) ||\ |
Kojto | 93:e188a91d3eaa | 800 | ((REMAP1) == TIM_TIM16_MCO) ||\ |
Kojto | 93:e188a91d3eaa | 801 | ((REMAP1) == TIM_TIM20_ADC3_NONE) ||\ |
Kojto | 93:e188a91d3eaa | 802 | ((REMAP1) == TIM_TIM20_ADC3_AWD1) ||\ |
Kojto | 93:e188a91d3eaa | 803 | ((REMAP1) == TIM_TIM20_ADC3_AWD2) ||\ |
Kojto | 93:e188a91d3eaa | 804 | ((REMAP1) == TIM_TIM20_ADC3_AWD3)) |
Kojto | 93:e188a91d3eaa | 805 | |
Kojto | 93:e188a91d3eaa | 806 | #define IS_TIM_REMAP2(REMAP2) (((REMAP2) == TIM_TIM1_ADC4_NONE) ||\ |
Kojto | 93:e188a91d3eaa | 807 | ((REMAP2) == TIM_TIM1_ADC4_AWD1) ||\ |
Kojto | 93:e188a91d3eaa | 808 | ((REMAP2) == TIM_TIM1_ADC4_AWD2) ||\ |
Kojto | 93:e188a91d3eaa | 809 | ((REMAP2) == TIM_TIM1_ADC4_AWD3) ||\ |
Kojto | 93:e188a91d3eaa | 810 | ((REMAP2) == TIM_TIM8_ADC3_NONE) ||\ |
Kojto | 93:e188a91d3eaa | 811 | ((REMAP2) == TIM_TIM8_ADC3_AWD1) ||\ |
Kojto | 93:e188a91d3eaa | 812 | ((REMAP2) == TIM_TIM8_ADC3_AWD2) ||\ |
Kojto | 93:e188a91d3eaa | 813 | ((REMAP2) == TIM_TIM8_ADC3_AWD3) ||\ |
Kojto | 93:e188a91d3eaa | 814 | ((REMAP2) == TIM_TIM16_NONE) ||\ |
Kojto | 93:e188a91d3eaa | 815 | ((REMAP2) == TIM_TIM20_ADC4_NONE) ||\ |
Kojto | 93:e188a91d3eaa | 816 | ((REMAP2) == TIM_TIM20_ADC4_AWD1) ||\ |
Kojto | 93:e188a91d3eaa | 817 | ((REMAP2) == TIM_TIM20_ADC4_AWD2) ||\ |
Kojto | 93:e188a91d3eaa | 818 | ((REMAP2) == TIM_TIM20_ADC4_AWD3)) |
Kojto | 122:f9eeca106725 | 819 | |
Kojto | 93:e188a91d3eaa | 820 | #endif /* STM32F303xE || STM32F398xx */ |
Kojto | 93:e188a91d3eaa | 821 | |
Kojto | 93:e188a91d3eaa | 822 | #if defined(STM32F373xC) || defined(STM32F378xx) |
Kojto | 93:e188a91d3eaa | 823 | |
Kojto | 93:e188a91d3eaa | 824 | #define IS_TIM_REMAP(REMAP) (((REMAP) == TIM_TIM2_TIM8_TRGO) ||\ |
Kojto | 93:e188a91d3eaa | 825 | ((REMAP) == TIM_TIM2_ETH_PTP) ||\ |
Kojto | 93:e188a91d3eaa | 826 | ((REMAP) == TIM_TIM2_USBFS_SOF) ||\ |
Kojto | 93:e188a91d3eaa | 827 | ((REMAP) == TIM_TIM2_USBHS_SOF) ||\ |
Kojto | 93:e188a91d3eaa | 828 | ((REMAP) == TIM_TIM14_GPIO) ||\ |
Kojto | 93:e188a91d3eaa | 829 | ((REMAP) == TIM_TIM14_RTC) ||\ |
Kojto | 93:e188a91d3eaa | 830 | ((REMAP) == TIM_TIM14_HSE) ||\ |
Kojto | 93:e188a91d3eaa | 831 | ((REMAP) == TIM_TIM14_MCO)) |
Kojto | 93:e188a91d3eaa | 832 | |
Kojto | 93:e188a91d3eaa | 833 | #endif /* STM32F373xC || STM32F378xx */ |
Kojto | 93:e188a91d3eaa | 834 | |
Kojto | 122:f9eeca106725 | 835 | |
Kojto | 93:e188a91d3eaa | 836 | #if defined(STM32F302xE) || defined(STM32F303xE) || defined(STM32F398xx) || \ |
Kojto | 93:e188a91d3eaa | 837 | defined(STM32F302xC) || defined(STM32F303xC) || defined(STM32F358xx) || \ |
Kojto | 93:e188a91d3eaa | 838 | defined(STM32F303x8) || defined(STM32F334x8) || defined(STM32F328xx) || \ |
Kojto | 93:e188a91d3eaa | 839 | defined(STM32F301x8) || defined(STM32F302x8) || defined(STM32F318xx) |
Kojto | 93:e188a91d3eaa | 840 | |
Kojto | 93:e188a91d3eaa | 841 | #define IS_TIM_GROUPCH5(OCREF) ((((OCREF) & 0x1FFFFFFF) == 0x00000000)) |
Kojto | 122:f9eeca106725 | 842 | |
Kojto | 93:e188a91d3eaa | 843 | #endif /* STM32F302xE || STM32F303xE || STM32F398xx || */ |
Kojto | 93:e188a91d3eaa | 844 | /* STM32F302xC || STM32F303xC || STM32F358xx || */ |
Kojto | 93:e188a91d3eaa | 845 | /* STM32F303x8 || STM32F334x8 || STM32F328xx || */ |
Kojto | 93:e188a91d3eaa | 846 | /* STM32F301x8 || STM32F302x8 || STM32F318xx */ |
Kojto | 122:f9eeca106725 | 847 | |
Kojto | 93:e188a91d3eaa | 848 | #define IS_TIM_DEADTIME(DEADTIME) ((DEADTIME) <= 0xFF) |
Kojto | 93:e188a91d3eaa | 849 | |
Kojto | 93:e188a91d3eaa | 850 | /** |
Kojto | 93:e188a91d3eaa | 851 | * @} |
Kojto | 122:f9eeca106725 | 852 | */ |
Kojto | 122:f9eeca106725 | 853 | /* End of private macros -----------------------------------------------------*/ |
Kojto | 122:f9eeca106725 | 854 | |
Kojto | 93:e188a91d3eaa | 855 | |
Kojto | 93:e188a91d3eaa | 856 | /* Exported macro ------------------------------------------------------------*/ |
Kojto | 122:f9eeca106725 | 857 | /** @defgroup TIMEx_Exported_Macros TIMEx Exported Macros |
Kojto | 93:e188a91d3eaa | 858 | * @{ |
Kojto | 122:f9eeca106725 | 859 | */ |
Kojto | 93:e188a91d3eaa | 860 | |
Kojto | 93:e188a91d3eaa | 861 | #if defined(STM32F373xC) || defined(STM32F378xx) |
Kojto | 93:e188a91d3eaa | 862 | /** |
Kojto | 93:e188a91d3eaa | 863 | * @brief Sets the TIM Capture Compare Register value on runtime without |
Kojto | 93:e188a91d3eaa | 864 | * calling another time ConfigChannel function. |
Kojto | 93:e188a91d3eaa | 865 | * @param __HANDLE__: TIM handle. |
Kojto | 122:f9eeca106725 | 866 | * @param __CHANNEL__: TIM Channels to be configured. |
Kojto | 93:e188a91d3eaa | 867 | * This parameter can be one of the following values: |
Kojto | 93:e188a91d3eaa | 868 | * @arg TIM_CHANNEL_1: TIM Channel 1 selected |
Kojto | 93:e188a91d3eaa | 869 | * @arg TIM_CHANNEL_2: TIM Channel 2 selected |
Kojto | 93:e188a91d3eaa | 870 | * @arg TIM_CHANNEL_3: TIM Channel 3 selected |
Kojto | 93:e188a91d3eaa | 871 | * @arg TIM_CHANNEL_4: TIM Channel 4 selected |
Kojto | 93:e188a91d3eaa | 872 | * @param __COMPARE__: specifies the Capture Compare register new value. |
Kojto | 93:e188a91d3eaa | 873 | * @retval None |
Kojto | 93:e188a91d3eaa | 874 | */ |
Kojto | 122:f9eeca106725 | 875 | #define __HAL_TIM_SET_COMPARE(__HANDLE__, __CHANNEL__, __COMPARE__) \ |
Kojto | 93:e188a91d3eaa | 876 | (*(__IO uint32_t *)(&((__HANDLE__)->Instance->CCR1) + ((__CHANNEL__) >> 2)) = (__COMPARE__)) |
Kojto | 93:e188a91d3eaa | 877 | |
Kojto | 93:e188a91d3eaa | 878 | /** |
Kojto | 93:e188a91d3eaa | 879 | * @brief Gets the TIM Capture Compare Register value on runtime |
Kojto | 93:e188a91d3eaa | 880 | * @param __HANDLE__: TIM handle. |
Kojto | 122:f9eeca106725 | 881 | * @param __CHANNEL__: TIM Channel associated with the capture compare register |
Kojto | 93:e188a91d3eaa | 882 | * This parameter can be one of the following values: |
Kojto | 93:e188a91d3eaa | 883 | * @arg TIM_CHANNEL_1: get capture/compare 1 register value |
Kojto | 93:e188a91d3eaa | 884 | * @arg TIM_CHANNEL_2: get capture/compare 2 register value |
Kojto | 93:e188a91d3eaa | 885 | * @arg TIM_CHANNEL_3: get capture/compare 3 register value |
Kojto | 93:e188a91d3eaa | 886 | * @arg TIM_CHANNEL_4: get capture/compare 4 register value |
Kojto | 93:e188a91d3eaa | 887 | * @retval None |
Kojto | 93:e188a91d3eaa | 888 | */ |
Kojto | 122:f9eeca106725 | 889 | #define __HAL_TIM_GET_COMPARE(__HANDLE__, __CHANNEL__) \ |
Kojto | 93:e188a91d3eaa | 890 | (*(__IO uint32_t *)(&((__HANDLE__)->Instance->CCR1) + ((__CHANNEL__) >> 2))) |
Kojto | 93:e188a91d3eaa | 891 | #endif /* STM32F373xC || STM32F378xx */ |
Kojto | 122:f9eeca106725 | 892 | |
Kojto | 93:e188a91d3eaa | 893 | #if defined(STM32F302xE) || defined(STM32F303xE) || defined(STM32F398xx) || \ |
Kojto | 93:e188a91d3eaa | 894 | defined(STM32F302xC) || defined(STM32F303xC) || defined(STM32F358xx) || \ |
Kojto | 93:e188a91d3eaa | 895 | defined(STM32F303x8) || defined(STM32F334x8) || defined(STM32F328xx) || \ |
Kojto | 93:e188a91d3eaa | 896 | defined(STM32F301x8) || defined(STM32F302x8) || defined(STM32F318xx) |
Kojto | 93:e188a91d3eaa | 897 | /** |
Kojto | 93:e188a91d3eaa | 898 | * @brief Sets the TIM Capture Compare Register value on runtime without |
Kojto | 93:e188a91d3eaa | 899 | * calling another time ConfigChannel function. |
Kojto | 93:e188a91d3eaa | 900 | * @param __HANDLE__: TIM handle. |
Kojto | 122:f9eeca106725 | 901 | * @param __CHANNEL__: TIM Channels to be configured. |
Kojto | 93:e188a91d3eaa | 902 | * This parameter can be one of the following values: |
Kojto | 93:e188a91d3eaa | 903 | * @arg TIM_CHANNEL_1: TIM Channel 1 selected |
Kojto | 93:e188a91d3eaa | 904 | * @arg TIM_CHANNEL_2: TIM Channel 2 selected |
Kojto | 93:e188a91d3eaa | 905 | * @arg TIM_CHANNEL_3: TIM Channel 3 selected |
Kojto | 93:e188a91d3eaa | 906 | * @arg TIM_CHANNEL_4: TIM Channel 4 selected |
Kojto | 93:e188a91d3eaa | 907 | * @arg TIM_CHANNEL_5: TIM Channel 5 selected |
Kojto | 93:e188a91d3eaa | 908 | * @arg TIM_CHANNEL_6: TIM Channel 6 selected |
Kojto | 93:e188a91d3eaa | 909 | * @param __COMPARE__: specifies the Capture Compare register new value. |
Kojto | 93:e188a91d3eaa | 910 | * @retval None |
Kojto | 93:e188a91d3eaa | 911 | */ |
Kojto | 122:f9eeca106725 | 912 | #define __HAL_TIM_SET_COMPARE(__HANDLE__, __CHANNEL__, __COMPARE__) \ |
Kojto | 93:e188a91d3eaa | 913 | (((__CHANNEL__) == TIM_CHANNEL_1) ? ((__HANDLE__)->Instance->CCR1 = (__COMPARE__)) :\ |
Kojto | 93:e188a91d3eaa | 914 | ((__CHANNEL__) == TIM_CHANNEL_2) ? ((__HANDLE__)->Instance->CCR2 = (__COMPARE__)) :\ |
Kojto | 93:e188a91d3eaa | 915 | ((__CHANNEL__) == TIM_CHANNEL_3) ? ((__HANDLE__)->Instance->CCR3 = (__COMPARE__)) :\ |
Kojto | 93:e188a91d3eaa | 916 | ((__CHANNEL__) == TIM_CHANNEL_4) ? ((__HANDLE__)->Instance->CCR4 = (__COMPARE__)) :\ |
Kojto | 93:e188a91d3eaa | 917 | ((__CHANNEL__) == TIM_CHANNEL_5) ? ((__HANDLE__)->Instance->CCR5 = (__COMPARE__)) :\ |
Kojto | 122:f9eeca106725 | 918 | ((__HANDLE__)->Instance->CCR6 = (__COMPARE__))) |
Kojto | 93:e188a91d3eaa | 919 | |
Kojto | 93:e188a91d3eaa | 920 | /** |
Kojto | 93:e188a91d3eaa | 921 | * @brief Gets the TIM Capture Compare Register value on runtime |
Kojto | 93:e188a91d3eaa | 922 | * @param __HANDLE__: TIM handle. |
Kojto | 122:f9eeca106725 | 923 | * @param __CHANNEL__: TIM Channel associated with the capture compare register |
Kojto | 93:e188a91d3eaa | 924 | * This parameter can be one of the following values: |
Kojto | 93:e188a91d3eaa | 925 | * @arg TIM_CHANNEL_1: get capture/compare 1 register value |
Kojto | 93:e188a91d3eaa | 926 | * @arg TIM_CHANNEL_2: get capture/compare 2 register value |
Kojto | 93:e188a91d3eaa | 927 | * @arg TIM_CHANNEL_3: get capture/compare 3 register value |
Kojto | 93:e188a91d3eaa | 928 | * @arg TIM_CHANNEL_4: get capture/compare 4 register value |
Kojto | 93:e188a91d3eaa | 929 | * @arg TIM_CHANNEL_5: get capture/compare 5 register value |
Kojto | 93:e188a91d3eaa | 930 | * @arg TIM_CHANNEL_6: get capture/compare 6 register value |
Kojto | 93:e188a91d3eaa | 931 | * @retval None |
Kojto | 93:e188a91d3eaa | 932 | */ |
Kojto | 122:f9eeca106725 | 933 | #define __HAL_TIM_GET_COMPARE(__HANDLE__, __CHANNEL__) \ |
Kojto | 93:e188a91d3eaa | 934 | (((__CHANNEL__) == TIM_CHANNEL_1) ? ((__HANDLE__)->Instance->CCR1) :\ |
Kojto | 93:e188a91d3eaa | 935 | ((__CHANNEL__) == TIM_CHANNEL_2) ? ((__HANDLE__)->Instance->CCR2) :\ |
Kojto | 93:e188a91d3eaa | 936 | ((__CHANNEL__) == TIM_CHANNEL_3) ? ((__HANDLE__)->Instance->CCR3) :\ |
Kojto | 93:e188a91d3eaa | 937 | ((__CHANNEL__) == TIM_CHANNEL_4) ? ((__HANDLE__)->Instance->CCR4) :\ |
Kojto | 93:e188a91d3eaa | 938 | ((__CHANNEL__) == TIM_CHANNEL_5) ? ((__HANDLE__)->Instance->CCR5) :\ |
Kojto | 93:e188a91d3eaa | 939 | ((__HANDLE__)->Instance->CCR6)) |
Kojto | 93:e188a91d3eaa | 940 | #endif /* STM32F302xE || STM32F303xE || STM32F398xx || */ |
Kojto | 93:e188a91d3eaa | 941 | /* STM32F302xC || STM32F303xC || STM32F358xx || */ |
Kojto | 93:e188a91d3eaa | 942 | /* STM32F303x8 || STM32F334x8 || STM32F328xx || */ |
Kojto | 93:e188a91d3eaa | 943 | /* STM32F301x8 || STM32F302x8 || STM32F318xx */ |
Kojto | 93:e188a91d3eaa | 944 | /** |
Kojto | 93:e188a91d3eaa | 945 | * @} |
Kojto | 122:f9eeca106725 | 946 | */ |
Kojto | 93:e188a91d3eaa | 947 | |
Kojto | 93:e188a91d3eaa | 948 | /* Exported functions --------------------------------------------------------*/ |
Kojto | 122:f9eeca106725 | 949 | /** @addtogroup TIMEx_Exported_Functions |
Kojto | 93:e188a91d3eaa | 950 | * @{ |
Kojto | 93:e188a91d3eaa | 951 | */ |
Kojto | 93:e188a91d3eaa | 952 | |
Kojto | 122:f9eeca106725 | 953 | /** @addtogroup TIMEx_Exported_Functions_Group1 |
Kojto | 93:e188a91d3eaa | 954 | * @{ |
Kojto | 93:e188a91d3eaa | 955 | */ |
Kojto | 93:e188a91d3eaa | 956 | /* Timer Hall Sensor functions **********************************************/ |
Kojto | 93:e188a91d3eaa | 957 | HAL_StatusTypeDef HAL_TIMEx_HallSensor_Init(TIM_HandleTypeDef *htim, TIM_HallSensor_InitTypeDef* sConfig); |
Kojto | 93:e188a91d3eaa | 958 | HAL_StatusTypeDef HAL_TIMEx_HallSensor_DeInit(TIM_HandleTypeDef *htim); |
Kojto | 93:e188a91d3eaa | 959 | |
Kojto | 93:e188a91d3eaa | 960 | void HAL_TIMEx_HallSensor_MspInit(TIM_HandleTypeDef *htim); |
Kojto | 93:e188a91d3eaa | 961 | void HAL_TIMEx_HallSensor_MspDeInit(TIM_HandleTypeDef *htim); |
Kojto | 93:e188a91d3eaa | 962 | |
Kojto | 93:e188a91d3eaa | 963 | /* Blocking mode: Polling */ |
Kojto | 93:e188a91d3eaa | 964 | HAL_StatusTypeDef HAL_TIMEx_HallSensor_Start(TIM_HandleTypeDef *htim); |
Kojto | 93:e188a91d3eaa | 965 | HAL_StatusTypeDef HAL_TIMEx_HallSensor_Stop(TIM_HandleTypeDef *htim); |
Kojto | 93:e188a91d3eaa | 966 | /* Non-Blocking mode: Interrupt */ |
Kojto | 93:e188a91d3eaa | 967 | HAL_StatusTypeDef HAL_TIMEx_HallSensor_Start_IT(TIM_HandleTypeDef *htim); |
Kojto | 93:e188a91d3eaa | 968 | HAL_StatusTypeDef HAL_TIMEx_HallSensor_Stop_IT(TIM_HandleTypeDef *htim); |
Kojto | 93:e188a91d3eaa | 969 | /* Non-Blocking mode: DMA */ |
Kojto | 93:e188a91d3eaa | 970 | HAL_StatusTypeDef HAL_TIMEx_HallSensor_Start_DMA(TIM_HandleTypeDef *htim, uint32_t *pData, uint16_t Length); |
Kojto | 93:e188a91d3eaa | 971 | HAL_StatusTypeDef HAL_TIMEx_HallSensor_Stop_DMA(TIM_HandleTypeDef *htim); |
Kojto | 93:e188a91d3eaa | 972 | /** |
Kojto | 93:e188a91d3eaa | 973 | * @} |
Kojto | 93:e188a91d3eaa | 974 | */ |
Kojto | 93:e188a91d3eaa | 975 | |
Kojto | 122:f9eeca106725 | 976 | /** @addtogroup TIMEx_Exported_Functions_Group2 |
Kojto | 93:e188a91d3eaa | 977 | * @{ |
Kojto | 93:e188a91d3eaa | 978 | */ |
Kojto | 93:e188a91d3eaa | 979 | /* Timer Complementary Output Compare functions *****************************/ |
Kojto | 93:e188a91d3eaa | 980 | /* Blocking mode: Polling */ |
Kojto | 93:e188a91d3eaa | 981 | HAL_StatusTypeDef HAL_TIMEx_OCN_Start(TIM_HandleTypeDef *htim, uint32_t Channel); |
Kojto | 93:e188a91d3eaa | 982 | HAL_StatusTypeDef HAL_TIMEx_OCN_Stop(TIM_HandleTypeDef *htim, uint32_t Channel); |
Kojto | 93:e188a91d3eaa | 983 | |
Kojto | 93:e188a91d3eaa | 984 | /* Non-Blocking mode: Interrupt */ |
Kojto | 93:e188a91d3eaa | 985 | HAL_StatusTypeDef HAL_TIMEx_OCN_Start_IT(TIM_HandleTypeDef *htim, uint32_t Channel); |
Kojto | 93:e188a91d3eaa | 986 | HAL_StatusTypeDef HAL_TIMEx_OCN_Stop_IT(TIM_HandleTypeDef *htim, uint32_t Channel); |
Kojto | 93:e188a91d3eaa | 987 | |
Kojto | 93:e188a91d3eaa | 988 | /* Non-Blocking mode: DMA */ |
Kojto | 93:e188a91d3eaa | 989 | HAL_StatusTypeDef HAL_TIMEx_OCN_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channel, uint32_t *pData, uint16_t Length); |
Kojto | 93:e188a91d3eaa | 990 | HAL_StatusTypeDef HAL_TIMEx_OCN_Stop_DMA(TIM_HandleTypeDef *htim, uint32_t Channel); |
Kojto | 93:e188a91d3eaa | 991 | /** |
Kojto | 93:e188a91d3eaa | 992 | * @} |
Kojto | 93:e188a91d3eaa | 993 | */ |
Kojto | 93:e188a91d3eaa | 994 | |
Kojto | 122:f9eeca106725 | 995 | /** @addtogroup TIMEx_Exported_Functions_Group3 |
Kojto | 93:e188a91d3eaa | 996 | * @{ |
Kojto | 93:e188a91d3eaa | 997 | */ |
Kojto | 93:e188a91d3eaa | 998 | /* Timer Complementary PWM functions ****************************************/ |
Kojto | 93:e188a91d3eaa | 999 | /* Blocking mode: Polling */ |
Kojto | 93:e188a91d3eaa | 1000 | HAL_StatusTypeDef HAL_TIMEx_PWMN_Start(TIM_HandleTypeDef *htim, uint32_t Channel); |
Kojto | 93:e188a91d3eaa | 1001 | HAL_StatusTypeDef HAL_TIMEx_PWMN_Stop(TIM_HandleTypeDef *htim, uint32_t Channel); |
Kojto | 93:e188a91d3eaa | 1002 | |
Kojto | 93:e188a91d3eaa | 1003 | /* Non-Blocking mode: Interrupt */ |
Kojto | 93:e188a91d3eaa | 1004 | HAL_StatusTypeDef HAL_TIMEx_PWMN_Start_IT(TIM_HandleTypeDef *htim, uint32_t Channel); |
Kojto | 93:e188a91d3eaa | 1005 | HAL_StatusTypeDef HAL_TIMEx_PWMN_Stop_IT(TIM_HandleTypeDef *htim, uint32_t Channel); |
Kojto | 93:e188a91d3eaa | 1006 | /* Non-Blocking mode: DMA */ |
Kojto | 93:e188a91d3eaa | 1007 | HAL_StatusTypeDef HAL_TIMEx_PWMN_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channel, uint32_t *pData, uint16_t Length); |
Kojto | 93:e188a91d3eaa | 1008 | HAL_StatusTypeDef HAL_TIMEx_PWMN_Stop_DMA(TIM_HandleTypeDef *htim, uint32_t Channel); |
Kojto | 93:e188a91d3eaa | 1009 | /** |
Kojto | 93:e188a91d3eaa | 1010 | * @} |
Kojto | 93:e188a91d3eaa | 1011 | */ |
Kojto | 93:e188a91d3eaa | 1012 | |
Kojto | 122:f9eeca106725 | 1013 | /** @addtogroup TIMEx_Exported_Functions_Group4 |
Kojto | 93:e188a91d3eaa | 1014 | * @{ |
Kojto | 93:e188a91d3eaa | 1015 | */ |
Kojto | 93:e188a91d3eaa | 1016 | /* Timer Complementary One Pulse functions **********************************/ |
Kojto | 93:e188a91d3eaa | 1017 | /* Blocking mode: Polling */ |
Kojto | 93:e188a91d3eaa | 1018 | HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Start(TIM_HandleTypeDef *htim, uint32_t OutputChannel); |
Kojto | 93:e188a91d3eaa | 1019 | HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Stop(TIM_HandleTypeDef *htim, uint32_t OutputChannel); |
Kojto | 93:e188a91d3eaa | 1020 | |
Kojto | 93:e188a91d3eaa | 1021 | /* Non-Blocking mode: Interrupt */ |
Kojto | 93:e188a91d3eaa | 1022 | HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Start_IT(TIM_HandleTypeDef *htim, uint32_t OutputChannel); |
Kojto | 93:e188a91d3eaa | 1023 | HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Stop_IT(TIM_HandleTypeDef *htim, uint32_t OutputChannel); |
Kojto | 93:e188a91d3eaa | 1024 | /** |
Kojto | 93:e188a91d3eaa | 1025 | * @} |
Kojto | 93:e188a91d3eaa | 1026 | */ |
Kojto | 93:e188a91d3eaa | 1027 | |
Kojto | 122:f9eeca106725 | 1028 | /** @addtogroup TIMEx_Exported_Functions_Group5 |
Kojto | 93:e188a91d3eaa | 1029 | * @{ |
Kojto | 93:e188a91d3eaa | 1030 | */ |
Kojto | 93:e188a91d3eaa | 1031 | /* Extended Control functions ************************************************/ |
Kojto | 93:e188a91d3eaa | 1032 | HAL_StatusTypeDef HAL_TIMEx_ConfigCommutationEvent(TIM_HandleTypeDef *htim, uint32_t InputTrigger, uint32_t CommutationSource); |
Kojto | 93:e188a91d3eaa | 1033 | HAL_StatusTypeDef HAL_TIMEx_ConfigCommutationEvent_IT(TIM_HandleTypeDef *htim, uint32_t InputTrigger, uint32_t CommutationSource); |
Kojto | 93:e188a91d3eaa | 1034 | HAL_StatusTypeDef HAL_TIMEx_ConfigCommutationEvent_DMA(TIM_HandleTypeDef *htim, uint32_t InputTrigger, uint32_t CommutationSource); |
Kojto | 93:e188a91d3eaa | 1035 | HAL_StatusTypeDef HAL_TIMEx_MasterConfigSynchronization(TIM_HandleTypeDef *htim, TIM_MasterConfigTypeDef * sMasterConfig); |
Kojto | 93:e188a91d3eaa | 1036 | HAL_StatusTypeDef HAL_TIMEx_ConfigBreakDeadTime(TIM_HandleTypeDef *htim, TIM_BreakDeadTimeConfigTypeDef *sBreakDeadTimeConfig); |
Kojto | 93:e188a91d3eaa | 1037 | |
Kojto | 93:e188a91d3eaa | 1038 | #if defined(STM32F303xE) || defined(STM32F398xx) || \ |
Kojto | 93:e188a91d3eaa | 1039 | defined(STM32F303xC) || defined(STM32F358xx) |
Kojto | 93:e188a91d3eaa | 1040 | HAL_StatusTypeDef HAL_TIMEx_RemapConfig(TIM_HandleTypeDef *htim, uint32_t Remap1, uint32_t Remap2); |
Kojto | 93:e188a91d3eaa | 1041 | #endif /* STM32F303xE || STM32F398xx || */ |
Kojto | 93:e188a91d3eaa | 1042 | /* STM32F303xC || STM32F358xx */ |
Kojto | 93:e188a91d3eaa | 1043 | |
Kojto | 93:e188a91d3eaa | 1044 | #if defined(STM32F302xE) || \ |
Kojto | 93:e188a91d3eaa | 1045 | defined(STM32F302xC) || \ |
Kojto | 93:e188a91d3eaa | 1046 | defined(STM32F303x8) || defined(STM32F334x8) || defined(STM32F328xx) || \ |
Kojto | 93:e188a91d3eaa | 1047 | defined(STM32F301x8) || defined(STM32F302x8) || defined(STM32F318xx) || \ |
Kojto | 93:e188a91d3eaa | 1048 | defined(STM32F373xC) || defined(STM32F378xx) |
Kojto | 93:e188a91d3eaa | 1049 | HAL_StatusTypeDef HAL_TIMEx_RemapConfig(TIM_HandleTypeDef *htim, uint32_t Remap); |
Kojto | 93:e188a91d3eaa | 1050 | #endif /* STM32F302xE || */ |
Kojto | 93:e188a91d3eaa | 1051 | /* STM32F302xC || */ |
Kojto | 93:e188a91d3eaa | 1052 | /* STM32F303x8 || STM32F334x8 || STM32F328xx || */ |
Kojto | 93:e188a91d3eaa | 1053 | /* STM32F301x8 || STM32F302x8 || STM32F318xx || */ |
Kojto | 93:e188a91d3eaa | 1054 | /* STM32F373xC || STM32F378xx */ |
Kojto | 93:e188a91d3eaa | 1055 | |
Kojto | 93:e188a91d3eaa | 1056 | #if defined(STM32F302xE) || defined(STM32F303xE) || defined(STM32F398xx) || \ |
Kojto | 93:e188a91d3eaa | 1057 | defined(STM32F302xC) || defined(STM32F303xC) || defined(STM32F358xx) || \ |
Kojto | 93:e188a91d3eaa | 1058 | defined(STM32F303x8) || defined(STM32F334x8) || defined(STM32F328xx) || \ |
Kojto | 93:e188a91d3eaa | 1059 | defined(STM32F301x8) || defined(STM32F302x8) || defined(STM32F318xx) |
Kojto | 93:e188a91d3eaa | 1060 | HAL_StatusTypeDef HAL_TIMEx_GroupChannel5(TIM_HandleTypeDef *htim, uint32_t Channels); |
Kojto | 93:e188a91d3eaa | 1061 | #endif /* STM32F302xE || STM32F303xE || STM32F398xx || */ |
Kojto | 93:e188a91d3eaa | 1062 | /* STM32F302xC || STM32F303xC || STM32F358xx || */ |
Kojto | 93:e188a91d3eaa | 1063 | /* STM32F303x8 || STM32F334x8 || STM32F328xx || */ |
Kojto | 93:e188a91d3eaa | 1064 | /* STM32F301x8 || STM32F302x8 || STM32F318xx */ |
Kojto | 93:e188a91d3eaa | 1065 | /** |
Kojto | 93:e188a91d3eaa | 1066 | * @} |
Kojto | 93:e188a91d3eaa | 1067 | */ |
Kojto | 93:e188a91d3eaa | 1068 | |
Kojto | 122:f9eeca106725 | 1069 | /** @addtogroup TIMEx_Exported_Functions_Group6 |
Kojto | 93:e188a91d3eaa | 1070 | * @{ |
Kojto | 93:e188a91d3eaa | 1071 | */ |
Kojto | 93:e188a91d3eaa | 1072 | /* Extended Callback *********************************************************/ |
Kojto | 93:e188a91d3eaa | 1073 | void HAL_TIMEx_CommutationCallback(TIM_HandleTypeDef *htim); |
Kojto | 93:e188a91d3eaa | 1074 | void HAL_TIMEx_BreakCallback(TIM_HandleTypeDef *htim); |
Kojto | 93:e188a91d3eaa | 1075 | /** |
Kojto | 93:e188a91d3eaa | 1076 | * @} |
Kojto | 93:e188a91d3eaa | 1077 | */ |
Kojto | 93:e188a91d3eaa | 1078 | |
Kojto | 122:f9eeca106725 | 1079 | /** @addtogroup TIMEx_Exported_Functions_Group7 |
Kojto | 93:e188a91d3eaa | 1080 | * @{ |
Kojto | 93:e188a91d3eaa | 1081 | */ |
Kojto | 93:e188a91d3eaa | 1082 | /* Extended Peripheral State functions **************************************/ |
Kojto | 93:e188a91d3eaa | 1083 | HAL_TIM_StateTypeDef HAL_TIMEx_HallSensor_GetState(TIM_HandleTypeDef *htim); |
Kojto | 93:e188a91d3eaa | 1084 | /** |
Kojto | 93:e188a91d3eaa | 1085 | * @} |
Kojto | 93:e188a91d3eaa | 1086 | */ |
Kojto | 93:e188a91d3eaa | 1087 | |
Kojto | 93:e188a91d3eaa | 1088 | /** |
Kojto | 93:e188a91d3eaa | 1089 | * @} |
Kojto | 122:f9eeca106725 | 1090 | */ |
Kojto | 122:f9eeca106725 | 1091 | /* End of exported functions -------------------------------------------------*/ |
Kojto | 93:e188a91d3eaa | 1092 | |
Kojto | 122:f9eeca106725 | 1093 | /* Private functions----------------------------------------------------------*/ |
Kojto | 122:f9eeca106725 | 1094 | /** @defgroup TIMEx_Private_Functions TIMEx Private Functions |
Kojto | 122:f9eeca106725 | 1095 | * @{ |
Kojto | 122:f9eeca106725 | 1096 | */ |
Kojto | 122:f9eeca106725 | 1097 | void TIMEx_DMACommutationCplt(DMA_HandleTypeDef *hdma); |
Kojto | 93:e188a91d3eaa | 1098 | /** |
Kojto | 93:e188a91d3eaa | 1099 | * @} |
Kojto | 122:f9eeca106725 | 1100 | */ |
Kojto | 122:f9eeca106725 | 1101 | /* End of private functions --------------------------------------------------*/ |
Kojto | 93:e188a91d3eaa | 1102 | |
Kojto | 93:e188a91d3eaa | 1103 | /** |
Kojto | 93:e188a91d3eaa | 1104 | * @} |
Kojto | 93:e188a91d3eaa | 1105 | */ |
Kojto | 122:f9eeca106725 | 1106 | |
Kojto | 122:f9eeca106725 | 1107 | /** |
Kojto | 122:f9eeca106725 | 1108 | * @} |
Kojto | 122:f9eeca106725 | 1109 | */ |
Kojto | 122:f9eeca106725 | 1110 | |
Kojto | 93:e188a91d3eaa | 1111 | #ifdef __cplusplus |
Kojto | 93:e188a91d3eaa | 1112 | } |
Kojto | 93:e188a91d3eaa | 1113 | #endif |
Kojto | 93:e188a91d3eaa | 1114 | |
Kojto | 93:e188a91d3eaa | 1115 | |
Kojto | 93:e188a91d3eaa | 1116 | #endif /* __STM32F3xx_HAL_TIM_EX_H */ |
Kojto | 93:e188a91d3eaa | 1117 | |
Kojto | 93:e188a91d3eaa | 1118 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |