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TARGET_MTB_USI_WM_BN_BM_22/TARGET_STM/TARGET_STM32F4/device/stm32f4xx_hal_irda.h@169:a7c7b631e539, 2018-06-22 (annotated)
- Committer:
- Anna Bridge
- Date:
- Fri Jun 22 15:38:59 2018 +0100
- Revision:
- 169:a7c7b631e539
- Parent:
- 167:84c0a372a020
mbed library. Release version 162
Who changed what in which revision?
| User | Revision | Line number | New contents of line |
|---|---|---|---|
| AnnaBridge | 167:84c0a372a020 | 1 | /** |
| AnnaBridge | 167:84c0a372a020 | 2 | ****************************************************************************** |
| AnnaBridge | 167:84c0a372a020 | 3 | * @file stm32f4xx_hal_irda.h |
| AnnaBridge | 167:84c0a372a020 | 4 | * @author MCD Application Team |
| AnnaBridge | 167:84c0a372a020 | 5 | * @brief Header file of IRDA HAL module. |
| AnnaBridge | 167:84c0a372a020 | 6 | ****************************************************************************** |
| AnnaBridge | 167:84c0a372a020 | 7 | * @attention |
| AnnaBridge | 167:84c0a372a020 | 8 | * |
| AnnaBridge | 167:84c0a372a020 | 9 | * <h2><center>© COPYRIGHT(c) 2017 STMicroelectronics</center></h2> |
| AnnaBridge | 167:84c0a372a020 | 10 | * |
| AnnaBridge | 167:84c0a372a020 | 11 | * Redistribution and use in source and binary forms, with or without modification, |
| AnnaBridge | 167:84c0a372a020 | 12 | * are permitted provided that the following conditions are met: |
| AnnaBridge | 167:84c0a372a020 | 13 | * 1. Redistributions of source code must retain the above copyright notice, |
| AnnaBridge | 167:84c0a372a020 | 14 | * this list of conditions and the following disclaimer. |
| AnnaBridge | 167:84c0a372a020 | 15 | * 2. Redistributions in binary form must reproduce the above copyright notice, |
| AnnaBridge | 167:84c0a372a020 | 16 | * this list of conditions and the following disclaimer in the documentation |
| AnnaBridge | 167:84c0a372a020 | 17 | * and/or other materials provided with the distribution. |
| AnnaBridge | 167:84c0a372a020 | 18 | * 3. Neither the name of STMicroelectronics nor the names of its contributors |
| AnnaBridge | 167:84c0a372a020 | 19 | * may be used to endorse or promote products derived from this software |
| AnnaBridge | 167:84c0a372a020 | 20 | * without specific prior written permission. |
| AnnaBridge | 167:84c0a372a020 | 21 | * |
| AnnaBridge | 167:84c0a372a020 | 22 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
| AnnaBridge | 167:84c0a372a020 | 23 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
| AnnaBridge | 167:84c0a372a020 | 24 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
| AnnaBridge | 167:84c0a372a020 | 25 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
| AnnaBridge | 167:84c0a372a020 | 26 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
| AnnaBridge | 167:84c0a372a020 | 27 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
| AnnaBridge | 167:84c0a372a020 | 28 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
| AnnaBridge | 167:84c0a372a020 | 29 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
| AnnaBridge | 167:84c0a372a020 | 30 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
| AnnaBridge | 167:84c0a372a020 | 31 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
| AnnaBridge | 167:84c0a372a020 | 32 | * |
| AnnaBridge | 167:84c0a372a020 | 33 | ****************************************************************************** |
| AnnaBridge | 167:84c0a372a020 | 34 | */ |
| AnnaBridge | 167:84c0a372a020 | 35 | |
| AnnaBridge | 167:84c0a372a020 | 36 | /* Define to prevent recursive inclusion -------------------------------------*/ |
| AnnaBridge | 167:84c0a372a020 | 37 | #ifndef __STM32F4xx_HAL_IRDA_H |
| AnnaBridge | 167:84c0a372a020 | 38 | #define __STM32F4xx_HAL_IRDA_H |
| AnnaBridge | 167:84c0a372a020 | 39 | |
| AnnaBridge | 167:84c0a372a020 | 40 | #ifdef __cplusplus |
| AnnaBridge | 167:84c0a372a020 | 41 | extern "C" { |
| AnnaBridge | 167:84c0a372a020 | 42 | #endif |
| AnnaBridge | 167:84c0a372a020 | 43 | |
| AnnaBridge | 167:84c0a372a020 | 44 | /* Includes ------------------------------------------------------------------*/ |
| AnnaBridge | 167:84c0a372a020 | 45 | #include "stm32f4xx_hal_def.h" |
| AnnaBridge | 167:84c0a372a020 | 46 | |
| AnnaBridge | 167:84c0a372a020 | 47 | /** @addtogroup STM32F4xx_HAL_Driver |
| AnnaBridge | 167:84c0a372a020 | 48 | * @{ |
| AnnaBridge | 167:84c0a372a020 | 49 | */ |
| AnnaBridge | 167:84c0a372a020 | 50 | |
| AnnaBridge | 167:84c0a372a020 | 51 | /** @addtogroup IRDA |
| AnnaBridge | 167:84c0a372a020 | 52 | * @{ |
| AnnaBridge | 167:84c0a372a020 | 53 | */ |
| AnnaBridge | 167:84c0a372a020 | 54 | |
| AnnaBridge | 167:84c0a372a020 | 55 | /* Exported types ------------------------------------------------------------*/ |
| AnnaBridge | 167:84c0a372a020 | 56 | /** @defgroup IRDA_Exported_Types IRDA Exported Types |
| AnnaBridge | 167:84c0a372a020 | 57 | * @{ |
| AnnaBridge | 167:84c0a372a020 | 58 | */ |
| AnnaBridge | 167:84c0a372a020 | 59 | /** |
| AnnaBridge | 167:84c0a372a020 | 60 | * @brief IRDA Init Structure definition |
| AnnaBridge | 167:84c0a372a020 | 61 | */ |
| AnnaBridge | 167:84c0a372a020 | 62 | typedef struct |
| AnnaBridge | 167:84c0a372a020 | 63 | { |
| AnnaBridge | 167:84c0a372a020 | 64 | uint32_t BaudRate; /*!< This member configures the IRDA communication baud rate. |
| AnnaBridge | 167:84c0a372a020 | 65 | The baud rate is computed using the following formula: |
| AnnaBridge | 167:84c0a372a020 | 66 | - IntegerDivider = ((PCLKx) / (8 * (hirda->Init.BaudRate))) |
| AnnaBridge | 167:84c0a372a020 | 67 | - FractionalDivider = ((IntegerDivider - ((uint32_t) IntegerDivider)) * 8) + 0.5 */ |
| AnnaBridge | 167:84c0a372a020 | 68 | |
| AnnaBridge | 167:84c0a372a020 | 69 | uint32_t WordLength; /*!< Specifies the number of data bits transmitted or received in a frame. |
| AnnaBridge | 167:84c0a372a020 | 70 | This parameter can be a value of @ref IRDA_Word_Length */ |
| AnnaBridge | 167:84c0a372a020 | 71 | |
| AnnaBridge | 167:84c0a372a020 | 72 | uint32_t Parity; /*!< Specifies the parity mode. |
| AnnaBridge | 167:84c0a372a020 | 73 | This parameter can be a value of @ref IRDA_Parity |
| AnnaBridge | 167:84c0a372a020 | 74 | @note When parity is enabled, the computed parity is inserted |
| AnnaBridge | 167:84c0a372a020 | 75 | at the MSB position of the transmitted data (9th bit when |
| AnnaBridge | 167:84c0a372a020 | 76 | the word length is set to 9 data bits; 8th bit when the |
| AnnaBridge | 167:84c0a372a020 | 77 | word length is set to 8 data bits). */ |
| AnnaBridge | 167:84c0a372a020 | 78 | |
| AnnaBridge | 167:84c0a372a020 | 79 | uint32_t Mode; /*!< Specifies wether the Receive or Transmit mode is enabled or disabled. |
| AnnaBridge | 167:84c0a372a020 | 80 | This parameter can be a value of @ref IRDA_Mode */ |
| AnnaBridge | 167:84c0a372a020 | 81 | |
| AnnaBridge | 167:84c0a372a020 | 82 | uint8_t Prescaler; /*!< Specifies the Prescaler */ |
| AnnaBridge | 167:84c0a372a020 | 83 | |
| AnnaBridge | 167:84c0a372a020 | 84 | uint32_t IrDAMode; /*!< Specifies the IrDA mode |
| AnnaBridge | 167:84c0a372a020 | 85 | This parameter can be a value of @ref IRDA_Low_Power */ |
| AnnaBridge | 167:84c0a372a020 | 86 | }IRDA_InitTypeDef; |
| AnnaBridge | 167:84c0a372a020 | 87 | |
| AnnaBridge | 167:84c0a372a020 | 88 | /** |
| AnnaBridge | 167:84c0a372a020 | 89 | * @brief HAL IRDA State structures definition |
| AnnaBridge | 167:84c0a372a020 | 90 | * @note HAL IRDA State value is a combination of 2 different substates: gState and RxState. |
| AnnaBridge | 167:84c0a372a020 | 91 | * - gState contains IRDA state information related to global Handle management |
| AnnaBridge | 167:84c0a372a020 | 92 | * and also information related to Tx operations. |
| AnnaBridge | 167:84c0a372a020 | 93 | * gState value coding follow below described bitmap : |
| AnnaBridge | 167:84c0a372a020 | 94 | * b7-b6 Error information |
| AnnaBridge | 167:84c0a372a020 | 95 | * 00 : No Error |
| AnnaBridge | 167:84c0a372a020 | 96 | * 01 : (Not Used) |
| AnnaBridge | 167:84c0a372a020 | 97 | * 10 : Timeout |
| AnnaBridge | 167:84c0a372a020 | 98 | * 11 : Error |
| AnnaBridge | 167:84c0a372a020 | 99 | * b5 IP initilisation status |
| AnnaBridge | 167:84c0a372a020 | 100 | * 0 : Reset (IP not initialized) |
| AnnaBridge | 167:84c0a372a020 | 101 | * 1 : Init done (IP not initialized. HAL IRDA Init function already called) |
| AnnaBridge | 167:84c0a372a020 | 102 | * b4-b3 (not used) |
| AnnaBridge | 167:84c0a372a020 | 103 | * xx : Should be set to 00 |
| AnnaBridge | 167:84c0a372a020 | 104 | * b2 Intrinsic process state |
| AnnaBridge | 167:84c0a372a020 | 105 | * 0 : Ready |
| AnnaBridge | 167:84c0a372a020 | 106 | * 1 : Busy (IP busy with some configuration or internal operations) |
| AnnaBridge | 167:84c0a372a020 | 107 | * b1 (not used) |
| AnnaBridge | 167:84c0a372a020 | 108 | * x : Should be set to 0 |
| AnnaBridge | 167:84c0a372a020 | 109 | * b0 Tx state |
| AnnaBridge | 167:84c0a372a020 | 110 | * 0 : Ready (no Tx operation ongoing) |
| AnnaBridge | 167:84c0a372a020 | 111 | * 1 : Busy (Tx operation ongoing) |
| AnnaBridge | 167:84c0a372a020 | 112 | * - RxState contains information related to Rx operations. |
| AnnaBridge | 167:84c0a372a020 | 113 | * RxState value coding follow below described bitmap : |
| AnnaBridge | 167:84c0a372a020 | 114 | * b7-b6 (not used) |
| AnnaBridge | 167:84c0a372a020 | 115 | * xx : Should be set to 00 |
| AnnaBridge | 167:84c0a372a020 | 116 | * b5 IP initilisation status |
| AnnaBridge | 167:84c0a372a020 | 117 | * 0 : Reset (IP not initialized) |
| AnnaBridge | 167:84c0a372a020 | 118 | * 1 : Init done (IP not initialized) |
| AnnaBridge | 167:84c0a372a020 | 119 | * b4-b2 (not used) |
| AnnaBridge | 167:84c0a372a020 | 120 | * xxx : Should be set to 000 |
| AnnaBridge | 167:84c0a372a020 | 121 | * b1 Rx state |
| AnnaBridge | 167:84c0a372a020 | 122 | * 0 : Ready (no Rx operation ongoing) |
| AnnaBridge | 167:84c0a372a020 | 123 | * 1 : Busy (Rx operation ongoing) |
| AnnaBridge | 167:84c0a372a020 | 124 | * b0 (not used) |
| AnnaBridge | 167:84c0a372a020 | 125 | * x : Should be set to 0. |
| AnnaBridge | 167:84c0a372a020 | 126 | */ |
| AnnaBridge | 167:84c0a372a020 | 127 | typedef enum |
| AnnaBridge | 167:84c0a372a020 | 128 | { |
| AnnaBridge | 167:84c0a372a020 | 129 | HAL_IRDA_STATE_RESET = 0x00U, /*!< Peripheral is not yet Initialized |
| AnnaBridge | 167:84c0a372a020 | 130 | Value is allowed for gState and RxState */ |
| AnnaBridge | 167:84c0a372a020 | 131 | HAL_IRDA_STATE_READY = 0x20U, /*!< Peripheral Initialized and ready for use |
| AnnaBridge | 167:84c0a372a020 | 132 | Value is allowed for gState and RxState */ |
| AnnaBridge | 167:84c0a372a020 | 133 | HAL_IRDA_STATE_BUSY = 0x24U, /*!< An internal process is ongoing |
| AnnaBridge | 167:84c0a372a020 | 134 | Value is allowed for gState only */ |
| AnnaBridge | 167:84c0a372a020 | 135 | HAL_IRDA_STATE_BUSY_TX = 0x21U, /*!< Data Transmission process is ongoing |
| AnnaBridge | 167:84c0a372a020 | 136 | Value is allowed for gState only */ |
| AnnaBridge | 167:84c0a372a020 | 137 | HAL_IRDA_STATE_BUSY_RX = 0x22U, /*!< Data Reception process is ongoing |
| AnnaBridge | 167:84c0a372a020 | 138 | Value is allowed for RxState only */ |
| AnnaBridge | 167:84c0a372a020 | 139 | HAL_IRDA_STATE_BUSY_TX_RX = 0x23U, /*!< Data Transmission and Reception process is ongoing |
| AnnaBridge | 167:84c0a372a020 | 140 | Not to be used for neither gState nor RxState. |
| AnnaBridge | 167:84c0a372a020 | 141 | Value is result of combination (Or) between gState and RxState values */ |
| AnnaBridge | 167:84c0a372a020 | 142 | HAL_IRDA_STATE_TIMEOUT = 0xA0U, /*!< Timeout state |
| AnnaBridge | 167:84c0a372a020 | 143 | Value is allowed for gState only */ |
| AnnaBridge | 167:84c0a372a020 | 144 | HAL_IRDA_STATE_ERROR = 0xE0U /*!< Error |
| AnnaBridge | 167:84c0a372a020 | 145 | Value is allowed for gState only */ |
| AnnaBridge | 167:84c0a372a020 | 146 | }HAL_IRDA_StateTypeDef; |
| AnnaBridge | 167:84c0a372a020 | 147 | |
| AnnaBridge | 167:84c0a372a020 | 148 | /** |
| AnnaBridge | 167:84c0a372a020 | 149 | * @brief IRDA handle Structure definition |
| AnnaBridge | 167:84c0a372a020 | 150 | */ |
| AnnaBridge | 167:84c0a372a020 | 151 | typedef struct |
| AnnaBridge | 167:84c0a372a020 | 152 | { |
| AnnaBridge | 167:84c0a372a020 | 153 | USART_TypeDef *Instance; /* USART registers base address */ |
| AnnaBridge | 167:84c0a372a020 | 154 | |
| AnnaBridge | 167:84c0a372a020 | 155 | IRDA_InitTypeDef Init; /* IRDA communication parameters */ |
| AnnaBridge | 167:84c0a372a020 | 156 | |
| AnnaBridge | 167:84c0a372a020 | 157 | uint8_t *pTxBuffPtr; /* Pointer to IRDA Tx transfer Buffer */ |
| AnnaBridge | 167:84c0a372a020 | 158 | |
| AnnaBridge | 167:84c0a372a020 | 159 | uint16_t TxXferSize; /* IRDA Tx Transfer size */ |
| AnnaBridge | 167:84c0a372a020 | 160 | |
| AnnaBridge | 167:84c0a372a020 | 161 | __IO uint16_t TxXferCount; /* IRDA Tx Transfer Counter */ |
| AnnaBridge | 167:84c0a372a020 | 162 | |
| AnnaBridge | 167:84c0a372a020 | 163 | uint8_t *pRxBuffPtr; /* Pointer to IRDA Rx transfer Buffer */ |
| AnnaBridge | 167:84c0a372a020 | 164 | |
| AnnaBridge | 167:84c0a372a020 | 165 | uint16_t RxXferSize; /* IRDA Rx Transfer size */ |
| AnnaBridge | 167:84c0a372a020 | 166 | |
| AnnaBridge | 167:84c0a372a020 | 167 | __IO uint16_t RxXferCount; /* IRDA Rx Transfer Counter */ |
| AnnaBridge | 167:84c0a372a020 | 168 | |
| AnnaBridge | 167:84c0a372a020 | 169 | DMA_HandleTypeDef *hdmatx; /* IRDA Tx DMA Handle parameters */ |
| AnnaBridge | 167:84c0a372a020 | 170 | |
| AnnaBridge | 167:84c0a372a020 | 171 | DMA_HandleTypeDef *hdmarx; /* IRDA Rx DMA Handle parameters */ |
| AnnaBridge | 167:84c0a372a020 | 172 | |
| AnnaBridge | 167:84c0a372a020 | 173 | HAL_LockTypeDef Lock; /* Locking object */ |
| AnnaBridge | 167:84c0a372a020 | 174 | |
| AnnaBridge | 167:84c0a372a020 | 175 | __IO HAL_IRDA_StateTypeDef gState; /* IRDA state information related to global Handle management |
| AnnaBridge | 167:84c0a372a020 | 176 | and also related to Tx operations. |
| AnnaBridge | 167:84c0a372a020 | 177 | This parameter can be a value of @ref HAL_IRDA_StateTypeDef */ |
| AnnaBridge | 167:84c0a372a020 | 178 | |
| AnnaBridge | 167:84c0a372a020 | 179 | __IO HAL_IRDA_StateTypeDef RxState; /* IRDA state information related to Rx operations. |
| AnnaBridge | 167:84c0a372a020 | 180 | This parameter can be a value of @ref HAL_IRDA_StateTypeDef */ |
| AnnaBridge | 167:84c0a372a020 | 181 | |
| AnnaBridge | 167:84c0a372a020 | 182 | __IO uint32_t ErrorCode; /* IRDA Error code */ |
| AnnaBridge | 167:84c0a372a020 | 183 | |
| AnnaBridge | 167:84c0a372a020 | 184 | }IRDA_HandleTypeDef; |
| AnnaBridge | 167:84c0a372a020 | 185 | /** |
| AnnaBridge | 167:84c0a372a020 | 186 | * @} |
| AnnaBridge | 167:84c0a372a020 | 187 | */ |
| AnnaBridge | 167:84c0a372a020 | 188 | |
| AnnaBridge | 167:84c0a372a020 | 189 | /* Exported constants --------------------------------------------------------*/ |
| AnnaBridge | 167:84c0a372a020 | 190 | /** @defgroup IRDA_Exported_Constants IRDA Exported constants |
| AnnaBridge | 167:84c0a372a020 | 191 | * @{ |
| AnnaBridge | 167:84c0a372a020 | 192 | */ |
| AnnaBridge | 167:84c0a372a020 | 193 | /** @defgroup IRDA_Error_Code IRDA Error Code |
| AnnaBridge | 167:84c0a372a020 | 194 | * @brief IRDA Error Code |
| AnnaBridge | 167:84c0a372a020 | 195 | * @{ |
| AnnaBridge | 167:84c0a372a020 | 196 | */ |
| AnnaBridge | 167:84c0a372a020 | 197 | #define HAL_IRDA_ERROR_NONE 0x00000000U /*!< No error */ |
| AnnaBridge | 167:84c0a372a020 | 198 | #define HAL_IRDA_ERROR_PE 0x00000001U /*!< Parity error */ |
| AnnaBridge | 167:84c0a372a020 | 199 | #define HAL_IRDA_ERROR_NE 0x00000002U /*!< Noise error */ |
| AnnaBridge | 167:84c0a372a020 | 200 | #define HAL_IRDA_ERROR_FE 0x00000004U /*!< Frame error */ |
| AnnaBridge | 167:84c0a372a020 | 201 | #define HAL_IRDA_ERROR_ORE 0x00000008U /*!< Overrun error */ |
| AnnaBridge | 167:84c0a372a020 | 202 | #define HAL_IRDA_ERROR_DMA 0x00000010U /*!< DMA transfer error */ |
| AnnaBridge | 167:84c0a372a020 | 203 | /** |
| AnnaBridge | 167:84c0a372a020 | 204 | * @} |
| AnnaBridge | 167:84c0a372a020 | 205 | */ |
| AnnaBridge | 167:84c0a372a020 | 206 | |
| AnnaBridge | 167:84c0a372a020 | 207 | /** @defgroup IRDA_Word_Length IRDA Word Length |
| AnnaBridge | 167:84c0a372a020 | 208 | * @{ |
| AnnaBridge | 167:84c0a372a020 | 209 | */ |
| AnnaBridge | 167:84c0a372a020 | 210 | #define IRDA_WORDLENGTH_8B 0x00000000U |
| AnnaBridge | 167:84c0a372a020 | 211 | #define IRDA_WORDLENGTH_9B ((uint32_t)USART_CR1_M) |
| AnnaBridge | 167:84c0a372a020 | 212 | /** |
| AnnaBridge | 167:84c0a372a020 | 213 | * @} |
| AnnaBridge | 167:84c0a372a020 | 214 | */ |
| AnnaBridge | 167:84c0a372a020 | 215 | |
| AnnaBridge | 167:84c0a372a020 | 216 | /** @defgroup IRDA_Parity IRDA Parity |
| AnnaBridge | 167:84c0a372a020 | 217 | * @{ |
| AnnaBridge | 167:84c0a372a020 | 218 | */ |
| AnnaBridge | 167:84c0a372a020 | 219 | #define IRDA_PARITY_NONE 0x00000000U |
| AnnaBridge | 167:84c0a372a020 | 220 | #define IRDA_PARITY_EVEN ((uint32_t)USART_CR1_PCE) |
| AnnaBridge | 167:84c0a372a020 | 221 | #define IRDA_PARITY_ODD ((uint32_t)(USART_CR1_PCE | USART_CR1_PS)) |
| AnnaBridge | 167:84c0a372a020 | 222 | /** |
| AnnaBridge | 167:84c0a372a020 | 223 | * @} |
| AnnaBridge | 167:84c0a372a020 | 224 | */ |
| AnnaBridge | 167:84c0a372a020 | 225 | |
| AnnaBridge | 167:84c0a372a020 | 226 | /** @defgroup IRDA_Mode IRDA Transfer Mode |
| AnnaBridge | 167:84c0a372a020 | 227 | * @{ |
| AnnaBridge | 167:84c0a372a020 | 228 | */ |
| AnnaBridge | 167:84c0a372a020 | 229 | #define IRDA_MODE_RX ((uint32_t)USART_CR1_RE) |
| AnnaBridge | 167:84c0a372a020 | 230 | #define IRDA_MODE_TX ((uint32_t)USART_CR1_TE) |
| AnnaBridge | 167:84c0a372a020 | 231 | #define IRDA_MODE_TX_RX ((uint32_t)(USART_CR1_TE |USART_CR1_RE)) |
| AnnaBridge | 167:84c0a372a020 | 232 | /** |
| AnnaBridge | 167:84c0a372a020 | 233 | * @} |
| AnnaBridge | 167:84c0a372a020 | 234 | */ |
| AnnaBridge | 167:84c0a372a020 | 235 | |
| AnnaBridge | 167:84c0a372a020 | 236 | /** @defgroup IRDA_Low_Power IRDA Low Power |
| AnnaBridge | 167:84c0a372a020 | 237 | * @{ |
| AnnaBridge | 167:84c0a372a020 | 238 | */ |
| AnnaBridge | 167:84c0a372a020 | 239 | #define IRDA_POWERMODE_LOWPOWER ((uint32_t)USART_CR3_IRLP) |
| AnnaBridge | 167:84c0a372a020 | 240 | #define IRDA_POWERMODE_NORMAL 0x00000000U |
| AnnaBridge | 167:84c0a372a020 | 241 | /** |
| AnnaBridge | 167:84c0a372a020 | 242 | * @} |
| AnnaBridge | 167:84c0a372a020 | 243 | */ |
| AnnaBridge | 167:84c0a372a020 | 244 | |
| AnnaBridge | 167:84c0a372a020 | 245 | /** @defgroup IRDA_Flags IRDA Flags |
| AnnaBridge | 167:84c0a372a020 | 246 | * Elements values convention: 0xXXXX |
| AnnaBridge | 167:84c0a372a020 | 247 | * - 0xXXXX : Flag mask in the SR register |
| AnnaBridge | 167:84c0a372a020 | 248 | * @{ |
| AnnaBridge | 167:84c0a372a020 | 249 | */ |
| AnnaBridge | 167:84c0a372a020 | 250 | #define IRDA_FLAG_TXE 0x00000080U |
| AnnaBridge | 167:84c0a372a020 | 251 | #define IRDA_FLAG_TC 0x00000040U |
| AnnaBridge | 167:84c0a372a020 | 252 | #define IRDA_FLAG_RXNE 0x00000020U |
| AnnaBridge | 167:84c0a372a020 | 253 | #define IRDA_FLAG_IDLE 0x00000010U |
| AnnaBridge | 167:84c0a372a020 | 254 | #define IRDA_FLAG_ORE 0x00000008U |
| AnnaBridge | 167:84c0a372a020 | 255 | #define IRDA_FLAG_NE 0x00000004U |
| AnnaBridge | 167:84c0a372a020 | 256 | #define IRDA_FLAG_FE 0x00000002U |
| AnnaBridge | 167:84c0a372a020 | 257 | #define IRDA_FLAG_PE 0x00000001U |
| AnnaBridge | 167:84c0a372a020 | 258 | /** |
| AnnaBridge | 167:84c0a372a020 | 259 | * @} |
| AnnaBridge | 167:84c0a372a020 | 260 | */ |
| AnnaBridge | 167:84c0a372a020 | 261 | |
| AnnaBridge | 167:84c0a372a020 | 262 | /** @defgroup IRDA_Interrupt_definition IRDA Interrupt Definitions |
| AnnaBridge | 167:84c0a372a020 | 263 | * Elements values convention: 0xY000XXXX |
| AnnaBridge | 167:84c0a372a020 | 264 | * - XXXX : Interrupt mask in the XX register |
| AnnaBridge | 167:84c0a372a020 | 265 | * - Y : Interrupt source register (2bits) |
| AnnaBridge | 167:84c0a372a020 | 266 | * - 01: CR1 register |
| AnnaBridge | 167:84c0a372a020 | 267 | * - 10: CR2 register |
| AnnaBridge | 167:84c0a372a020 | 268 | * - 11: CR3 register |
| AnnaBridge | 167:84c0a372a020 | 269 | * @{ |
| AnnaBridge | 167:84c0a372a020 | 270 | */ |
| AnnaBridge | 167:84c0a372a020 | 271 | #define IRDA_IT_PE ((uint32_t)(IRDA_CR1_REG_INDEX << 28U | USART_CR1_PEIE)) |
| AnnaBridge | 167:84c0a372a020 | 272 | #define IRDA_IT_TXE ((uint32_t)(IRDA_CR1_REG_INDEX << 28U | USART_CR1_TXEIE)) |
| AnnaBridge | 167:84c0a372a020 | 273 | #define IRDA_IT_TC ((uint32_t)(IRDA_CR1_REG_INDEX << 28U | USART_CR1_TCIE)) |
| AnnaBridge | 167:84c0a372a020 | 274 | #define IRDA_IT_RXNE ((uint32_t)(IRDA_CR1_REG_INDEX << 28U | USART_CR1_RXNEIE)) |
| AnnaBridge | 167:84c0a372a020 | 275 | #define IRDA_IT_IDLE ((uint32_t)(IRDA_CR1_REG_INDEX << 28U | USART_CR1_IDLEIE)) |
| AnnaBridge | 167:84c0a372a020 | 276 | |
| AnnaBridge | 167:84c0a372a020 | 277 | #define IRDA_IT_LBD ((uint32_t)(IRDA_CR2_REG_INDEX << 28U | USART_CR2_LBDIE)) |
| AnnaBridge | 167:84c0a372a020 | 278 | |
| AnnaBridge | 167:84c0a372a020 | 279 | #define IRDA_IT_CTS ((uint32_t)(IRDA_CR3_REG_INDEX << 28U | USART_CR3_CTSIE)) |
| AnnaBridge | 167:84c0a372a020 | 280 | #define IRDA_IT_ERR ((uint32_t)(IRDA_CR3_REG_INDEX << 28U | USART_CR3_EIE)) |
| AnnaBridge | 167:84c0a372a020 | 281 | /** |
| AnnaBridge | 167:84c0a372a020 | 282 | * @} |
| AnnaBridge | 167:84c0a372a020 | 283 | */ |
| AnnaBridge | 167:84c0a372a020 | 284 | |
| AnnaBridge | 167:84c0a372a020 | 285 | /** |
| AnnaBridge | 167:84c0a372a020 | 286 | * @} |
| AnnaBridge | 167:84c0a372a020 | 287 | */ |
| AnnaBridge | 167:84c0a372a020 | 288 | |
| AnnaBridge | 167:84c0a372a020 | 289 | /* Exported macro ------------------------------------------------------------*/ |
| AnnaBridge | 167:84c0a372a020 | 290 | /** @defgroup IRDA_Exported_Macros IRDA Exported Macros |
| AnnaBridge | 167:84c0a372a020 | 291 | * @{ |
| AnnaBridge | 167:84c0a372a020 | 292 | */ |
| AnnaBridge | 167:84c0a372a020 | 293 | |
| AnnaBridge | 167:84c0a372a020 | 294 | /** @brief Reset IRDA handle gstate & RxState |
| AnnaBridge | 167:84c0a372a020 | 295 | * @param __HANDLE__ specifies the USART Handle. |
| AnnaBridge | 167:84c0a372a020 | 296 | * This parameter can be USARTx where x: 1, 2, 3, 4, 5, 6, 7 or 8 to select the USART or |
| AnnaBridge | 167:84c0a372a020 | 297 | * UART peripheral. |
| AnnaBridge | 167:84c0a372a020 | 298 | * @retval None |
| AnnaBridge | 167:84c0a372a020 | 299 | */ |
| AnnaBridge | 167:84c0a372a020 | 300 | #define __HAL_IRDA_RESET_HANDLE_STATE(__HANDLE__) do{ \ |
| AnnaBridge | 167:84c0a372a020 | 301 | (__HANDLE__)->gState = HAL_IRDA_STATE_RESET; \ |
| AnnaBridge | 167:84c0a372a020 | 302 | (__HANDLE__)->RxState = HAL_IRDA_STATE_RESET; \ |
| AnnaBridge | 167:84c0a372a020 | 303 | } while(0U) |
| AnnaBridge | 167:84c0a372a020 | 304 | |
| AnnaBridge | 167:84c0a372a020 | 305 | /** @brief Flushs the IRDA DR register |
| AnnaBridge | 167:84c0a372a020 | 306 | * @param __HANDLE__ specifies the USART Handle. |
| AnnaBridge | 167:84c0a372a020 | 307 | * This parameter can be USARTx where x: 1, 2, 3, 4, 5, 6, 7 or 8 to select the USART or |
| AnnaBridge | 167:84c0a372a020 | 308 | * UART peripheral. |
| AnnaBridge | 167:84c0a372a020 | 309 | */ |
| AnnaBridge | 167:84c0a372a020 | 310 | #define __HAL_IRDA_FLUSH_DRREGISTER(__HANDLE__) ((__HANDLE__)->Instance->DR) |
| AnnaBridge | 167:84c0a372a020 | 311 | |
| AnnaBridge | 167:84c0a372a020 | 312 | /** @brief Checks whether the specified IRDA flag is set or not. |
| AnnaBridge | 167:84c0a372a020 | 313 | * @param __HANDLE__ specifies the USART Handle. |
| AnnaBridge | 167:84c0a372a020 | 314 | * This parameter can be USARTx where x: 1, 2, 3, 4, 5, 6, 7 or 8 to select the USART or |
| AnnaBridge | 167:84c0a372a020 | 315 | * UART peripheral. |
| AnnaBridge | 167:84c0a372a020 | 316 | * @param __FLAG__ specifies the flag to check. |
| AnnaBridge | 167:84c0a372a020 | 317 | * This parameter can be one of the following values: |
| AnnaBridge | 167:84c0a372a020 | 318 | * @arg IRDA_FLAG_TXE: Transmit data register empty flag |
| AnnaBridge | 167:84c0a372a020 | 319 | * @arg IRDA_FLAG_TC: Transmission Complete flag |
| AnnaBridge | 167:84c0a372a020 | 320 | * @arg IRDA_FLAG_RXNE: Receive data register not empty flag |
| AnnaBridge | 167:84c0a372a020 | 321 | * @arg IRDA_FLAG_IDLE: Idle Line detection flag |
| AnnaBridge | 167:84c0a372a020 | 322 | * @arg IRDA_FLAG_ORE: OverRun Error flag |
| AnnaBridge | 167:84c0a372a020 | 323 | * @arg IRDA_FLAG_NE: Noise Error flag |
| AnnaBridge | 167:84c0a372a020 | 324 | * @arg IRDA_FLAG_FE: Framing Error flag |
| AnnaBridge | 167:84c0a372a020 | 325 | * @arg IRDA_FLAG_PE: Parity Error flag |
| AnnaBridge | 167:84c0a372a020 | 326 | * @retval The new state of __FLAG__ (TRUE or FALSE). |
| AnnaBridge | 167:84c0a372a020 | 327 | */ |
| AnnaBridge | 167:84c0a372a020 | 328 | #define __HAL_IRDA_GET_FLAG(__HANDLE__, __FLAG__) (((__HANDLE__)->Instance->SR & (__FLAG__)) == (__FLAG__)) |
| AnnaBridge | 167:84c0a372a020 | 329 | |
| AnnaBridge | 167:84c0a372a020 | 330 | /** @brief Clears the specified IRDA pending flag. |
| AnnaBridge | 167:84c0a372a020 | 331 | * @param __HANDLE__ specifies the USART Handle. |
| AnnaBridge | 167:84c0a372a020 | 332 | * This parameter can be USARTx where x: 1, 2, 3, 4, 5, 6, 7 or 8 to select the USART or |
| AnnaBridge | 167:84c0a372a020 | 333 | * UART peripheral. |
| AnnaBridge | 167:84c0a372a020 | 334 | * @param __FLAG__ specifies the flag to check. |
| AnnaBridge | 167:84c0a372a020 | 335 | * This parameter can be any combination of the following values: |
| AnnaBridge | 167:84c0a372a020 | 336 | * @arg IRDA_FLAG_TC: Transmission Complete flag. |
| AnnaBridge | 167:84c0a372a020 | 337 | * @arg IRDA_FLAG_RXNE: Receive data register not empty flag. |
| AnnaBridge | 167:84c0a372a020 | 338 | * |
| AnnaBridge | 167:84c0a372a020 | 339 | * @note PE (Parity error), FE (Framing error), NE (Noise error), ORE (OverRun |
| AnnaBridge | 167:84c0a372a020 | 340 | * error) and IDLE (Idle line detected) flags are cleared by software |
| AnnaBridge | 167:84c0a372a020 | 341 | * sequence: a read operation to USART_SR register followed by a read |
| AnnaBridge | 167:84c0a372a020 | 342 | * operation to USART_DR register. |
| AnnaBridge | 167:84c0a372a020 | 343 | * @note RXNE flag can be also cleared by a read to the USART_DR register. |
| AnnaBridge | 167:84c0a372a020 | 344 | * @note TC flag can be also cleared by software sequence: a read operation to |
| AnnaBridge | 167:84c0a372a020 | 345 | * USART_SR register followed by a write operation to USART_DR register. |
| AnnaBridge | 167:84c0a372a020 | 346 | * @note TXE flag is cleared only by a write to the USART_DR register. |
| AnnaBridge | 167:84c0a372a020 | 347 | * |
| AnnaBridge | 167:84c0a372a020 | 348 | * @retval None |
| AnnaBridge | 167:84c0a372a020 | 349 | */ |
| AnnaBridge | 167:84c0a372a020 | 350 | #define __HAL_IRDA_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->SR = ~(__FLAG__)) |
| AnnaBridge | 167:84c0a372a020 | 351 | |
| AnnaBridge | 167:84c0a372a020 | 352 | /** @brief Clear the IRDA PE pending flag. |
| AnnaBridge | 167:84c0a372a020 | 353 | * @param __HANDLE__ specifies the USART Handle. |
| AnnaBridge | 167:84c0a372a020 | 354 | * This parameter can be USARTx where x: 1, 2, 3, 4, 5, 6, 7 or 8 to select the USART or |
| AnnaBridge | 167:84c0a372a020 | 355 | * UART peripheral. |
| AnnaBridge | 167:84c0a372a020 | 356 | * @retval None |
| AnnaBridge | 167:84c0a372a020 | 357 | */ |
| AnnaBridge | 167:84c0a372a020 | 358 | #define __HAL_IRDA_CLEAR_PEFLAG(__HANDLE__) \ |
| AnnaBridge | 167:84c0a372a020 | 359 | do{ \ |
| AnnaBridge | 167:84c0a372a020 | 360 | __IO uint32_t tmpreg = 0x00U; \ |
| AnnaBridge | 167:84c0a372a020 | 361 | tmpreg = (__HANDLE__)->Instance->SR; \ |
| AnnaBridge | 167:84c0a372a020 | 362 | UNUSED(tmpreg); \ |
| AnnaBridge | 167:84c0a372a020 | 363 | } while(0U) |
| AnnaBridge | 167:84c0a372a020 | 364 | |
| AnnaBridge | 167:84c0a372a020 | 365 | /** @brief Clear the IRDA FE pending flag. |
| AnnaBridge | 167:84c0a372a020 | 366 | * @param __HANDLE__ specifies the USART Handle. |
| AnnaBridge | 167:84c0a372a020 | 367 | * This parameter can be USARTx where x: 1, 2, 3, 4, 5, 6, 7 or 8 to select the USART or |
| AnnaBridge | 167:84c0a372a020 | 368 | * UART peripheral. |
| AnnaBridge | 167:84c0a372a020 | 369 | * @retval None |
| AnnaBridge | 167:84c0a372a020 | 370 | */ |
| AnnaBridge | 167:84c0a372a020 | 371 | #define __HAL_IRDA_CLEAR_FEFLAG(__HANDLE__) __HAL_IRDA_CLEAR_PEFLAG(__HANDLE__) |
| AnnaBridge | 167:84c0a372a020 | 372 | |
| AnnaBridge | 167:84c0a372a020 | 373 | /** @brief Clear the IRDA NE pending flag. |
| AnnaBridge | 167:84c0a372a020 | 374 | * @param __HANDLE__ specifies the USART Handle. |
| AnnaBridge | 167:84c0a372a020 | 375 | * This parameter can be USARTx where x: 1, 2, 3, 4, 5, 6, 7 or 8 to select the USART or |
| AnnaBridge | 167:84c0a372a020 | 376 | * UART peripheral. |
| AnnaBridge | 167:84c0a372a020 | 377 | * @retval None |
| AnnaBridge | 167:84c0a372a020 | 378 | */ |
| AnnaBridge | 167:84c0a372a020 | 379 | #define __HAL_IRDA_CLEAR_NEFLAG(__HANDLE__) __HAL_IRDA_CLEAR_PEFLAG(__HANDLE__) |
| AnnaBridge | 167:84c0a372a020 | 380 | |
| AnnaBridge | 167:84c0a372a020 | 381 | /** @brief Clear the IRDA ORE pending flag. |
| AnnaBridge | 167:84c0a372a020 | 382 | * @param __HANDLE__ specifies the USART Handle. |
| AnnaBridge | 167:84c0a372a020 | 383 | * This parameter can be USARTx where x: 1, 2, 3, 4, 5, 6, 7 or 8 to select the USART or |
| AnnaBridge | 167:84c0a372a020 | 384 | * UART peripheral. |
| AnnaBridge | 167:84c0a372a020 | 385 | * @retval None |
| AnnaBridge | 167:84c0a372a020 | 386 | */ |
| AnnaBridge | 167:84c0a372a020 | 387 | #define __HAL_IRDA_CLEAR_OREFLAG(__HANDLE__) __HAL_IRDA_CLEAR_PEFLAG(__HANDLE__) |
| AnnaBridge | 167:84c0a372a020 | 388 | |
| AnnaBridge | 167:84c0a372a020 | 389 | /** @brief Clear the IRDA IDLE pending flag. |
| AnnaBridge | 167:84c0a372a020 | 390 | * @param __HANDLE__ specifies the USART Handle. |
| AnnaBridge | 167:84c0a372a020 | 391 | * This parameter can be USARTx where x: 1, 2, 3, 4, 5, 6, 7 or 8 to select the USART or |
| AnnaBridge | 167:84c0a372a020 | 392 | * UART peripheral. |
| AnnaBridge | 167:84c0a372a020 | 393 | * @retval None |
| AnnaBridge | 167:84c0a372a020 | 394 | */ |
| AnnaBridge | 167:84c0a372a020 | 395 | #define __HAL_IRDA_CLEAR_IDLEFLAG(__HANDLE__) __HAL_IRDA_CLEAR_PEFLAG(__HANDLE__) |
| AnnaBridge | 167:84c0a372a020 | 396 | |
| AnnaBridge | 167:84c0a372a020 | 397 | /** @brief Enables or disables the specified IRDA interrupt. |
| AnnaBridge | 167:84c0a372a020 | 398 | * @param __HANDLE__ specifies the USART Handle. |
| AnnaBridge | 167:84c0a372a020 | 399 | * This parameter can be USARTx where x: 1, 2, 3, 4, 5, 6, 7 or 8 to select the USART or |
| AnnaBridge | 167:84c0a372a020 | 400 | * UART peripheral. |
| AnnaBridge | 167:84c0a372a020 | 401 | * @param __INTERRUPT__ specifies the IRDA interrupt source to check. |
| AnnaBridge | 167:84c0a372a020 | 402 | * This parameter can be one of the following values: |
| AnnaBridge | 167:84c0a372a020 | 403 | * @arg IRDA_IT_TXE: Transmit Data Register empty interrupt |
| AnnaBridge | 167:84c0a372a020 | 404 | * @arg IRDA_IT_TC: Transmission complete interrupt |
| AnnaBridge | 167:84c0a372a020 | 405 | * @arg IRDA_IT_RXNE: Receive Data register not empty interrupt |
| AnnaBridge | 167:84c0a372a020 | 406 | * @arg IRDA_IT_IDLE: Idle line detection interrupt |
| AnnaBridge | 167:84c0a372a020 | 407 | * @arg IRDA_IT_PE: Parity Error interrupt |
| AnnaBridge | 167:84c0a372a020 | 408 | * @arg IRDA_IT_ERR: Error interrupt(Frame error, noise error, overrun error) |
| AnnaBridge | 167:84c0a372a020 | 409 | * @retval None |
| AnnaBridge | 167:84c0a372a020 | 410 | */ |
| AnnaBridge | 167:84c0a372a020 | 411 | #define __HAL_IRDA_ENABLE_IT(__HANDLE__, __INTERRUPT__) ((((__INTERRUPT__) >> 28U) == 1U)? ((__HANDLE__)->Instance->CR1 |= ((__INTERRUPT__) & IRDA_IT_MASK)): \ |
| AnnaBridge | 167:84c0a372a020 | 412 | (((__INTERRUPT__) >> 28U) == 2U)? ((__HANDLE__)->Instance->CR2 |= ((__INTERRUPT__) & IRDA_IT_MASK)): \ |
| AnnaBridge | 167:84c0a372a020 | 413 | ((__HANDLE__)->Instance->CR3 |= ((__INTERRUPT__) & IRDA_IT_MASK))) |
| AnnaBridge | 167:84c0a372a020 | 414 | #define __HAL_IRDA_DISABLE_IT(__HANDLE__, __INTERRUPT__) ((((__INTERRUPT__) >> 28U) == 1U)? ((__HANDLE__)->Instance->CR1 &= ~((__INTERRUPT__) & IRDA_IT_MASK)): \ |
| AnnaBridge | 167:84c0a372a020 | 415 | (((__INTERRUPT__) >> 28U) == 2U)? ((__HANDLE__)->Instance->CR2 &= ~((__INTERRUPT__) & IRDA_IT_MASK)): \ |
| AnnaBridge | 167:84c0a372a020 | 416 | ((__HANDLE__)->Instance->CR3 &= ~ ((__INTERRUPT__) & IRDA_IT_MASK))) |
| AnnaBridge | 167:84c0a372a020 | 417 | |
| AnnaBridge | 167:84c0a372a020 | 418 | /** @brief Checks whether the specified IRDA interrupt has occurred or not. |
| AnnaBridge | 167:84c0a372a020 | 419 | * @param __HANDLE__ specifies the USART Handle. |
| AnnaBridge | 167:84c0a372a020 | 420 | * This parameter can be USARTx where x: 1, 2, 3, 4, 5, 6, 7 or 8 to select the USART or |
| AnnaBridge | 167:84c0a372a020 | 421 | * UART peripheral. |
| AnnaBridge | 167:84c0a372a020 | 422 | * @param __IT__ specifies the IRDA interrupt source to check. |
| AnnaBridge | 167:84c0a372a020 | 423 | * This parameter can be one of the following values: |
| AnnaBridge | 167:84c0a372a020 | 424 | * @arg IRDA_IT_TXE: Transmit Data Register empty interrupt |
| AnnaBridge | 167:84c0a372a020 | 425 | * @arg IRDA_IT_TC: Transmission complete interrupt |
| AnnaBridge | 167:84c0a372a020 | 426 | * @arg IRDA_IT_RXNE: Receive Data register not empty interrupt |
| AnnaBridge | 167:84c0a372a020 | 427 | * @arg IRDA_IT_IDLE: Idle line detection interrupt |
| AnnaBridge | 167:84c0a372a020 | 428 | * @arg USART_IT_ERR: Error interrupt |
| AnnaBridge | 167:84c0a372a020 | 429 | * @arg IRDA_IT_PE: Parity Error interrupt |
| AnnaBridge | 167:84c0a372a020 | 430 | * @retval The new state of __IT__ (TRUE or FALSE). |
| AnnaBridge | 167:84c0a372a020 | 431 | */ |
| AnnaBridge | 167:84c0a372a020 | 432 | #define __HAL_IRDA_GET_IT_SOURCE(__HANDLE__, __IT__) (((((__IT__) >> 28U) == 1U)? (__HANDLE__)->Instance->CR1:(((((uint32_t)(__IT__)) >> 28U) == 2U)? \ |
| AnnaBridge | 167:84c0a372a020 | 433 | (__HANDLE__)->Instance->CR2 : (__HANDLE__)->Instance->CR3)) & (((uint32_t)(__IT__)) & IRDA_IT_MASK)) |
| AnnaBridge | 167:84c0a372a020 | 434 | |
| AnnaBridge | 167:84c0a372a020 | 435 | /** @brief Macro to enable the IRDA's one bit sample method |
| AnnaBridge | 167:84c0a372a020 | 436 | * @param __HANDLE__ specifies the IRDA Handle. |
| AnnaBridge | 167:84c0a372a020 | 437 | * @retval None |
| AnnaBridge | 167:84c0a372a020 | 438 | */ |
| AnnaBridge | 167:84c0a372a020 | 439 | #define __HAL_IRDA_ONE_BIT_SAMPLE_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR3|= USART_CR3_ONEBIT) |
| AnnaBridge | 167:84c0a372a020 | 440 | |
| AnnaBridge | 167:84c0a372a020 | 441 | /** @brief Macro to disable the IRDA's one bit sample method |
| AnnaBridge | 167:84c0a372a020 | 442 | * @param __HANDLE__ specifies the IRDA Handle. |
| AnnaBridge | 167:84c0a372a020 | 443 | * @retval None |
| AnnaBridge | 167:84c0a372a020 | 444 | */ |
| AnnaBridge | 167:84c0a372a020 | 445 | #define __HAL_IRDA_ONE_BIT_SAMPLE_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR3 &= (uint16_t)~((uint16_t)USART_CR3_ONEBIT)) |
| AnnaBridge | 167:84c0a372a020 | 446 | |
| AnnaBridge | 167:84c0a372a020 | 447 | /** @brief Enable UART/USART associated to IRDA Handle |
| AnnaBridge | 167:84c0a372a020 | 448 | * @param __HANDLE__ specifies the IRDA Handle. |
| AnnaBridge | 167:84c0a372a020 | 449 | * IRDA Handle selects the USARTx or UARTy peripheral |
| AnnaBridge | 167:84c0a372a020 | 450 | * (USART,UART availability and x,y values depending on device). |
| AnnaBridge | 167:84c0a372a020 | 451 | * @retval None |
| AnnaBridge | 167:84c0a372a020 | 452 | */ |
| AnnaBridge | 167:84c0a372a020 | 453 | #define __HAL_IRDA_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR1 |= USART_CR1_UE) |
| AnnaBridge | 167:84c0a372a020 | 454 | |
| AnnaBridge | 167:84c0a372a020 | 455 | /** @brief Disable UART/USART associated to IRDA Handle |
| AnnaBridge | 167:84c0a372a020 | 456 | * @param __HANDLE__ specifies the IRDA Handle. |
| AnnaBridge | 167:84c0a372a020 | 457 | * IRDA Handle selects the USARTx or UARTy peripheral |
| AnnaBridge | 167:84c0a372a020 | 458 | * (USART,UART availability and x,y values depending on device). |
| AnnaBridge | 167:84c0a372a020 | 459 | * @retval None |
| AnnaBridge | 167:84c0a372a020 | 460 | */ |
| AnnaBridge | 167:84c0a372a020 | 461 | #define __HAL_IRDA_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR1 &= ~USART_CR1_UE) |
| AnnaBridge | 167:84c0a372a020 | 462 | |
| AnnaBridge | 167:84c0a372a020 | 463 | /** |
| AnnaBridge | 167:84c0a372a020 | 464 | * @} |
| AnnaBridge | 167:84c0a372a020 | 465 | */ |
| AnnaBridge | 167:84c0a372a020 | 466 | |
| AnnaBridge | 167:84c0a372a020 | 467 | /* Exported functions --------------------------------------------------------*/ |
| AnnaBridge | 167:84c0a372a020 | 468 | /** @addtogroup IRDA_Exported_Functions |
| AnnaBridge | 167:84c0a372a020 | 469 | * @{ |
| AnnaBridge | 167:84c0a372a020 | 470 | */ |
| AnnaBridge | 167:84c0a372a020 | 471 | |
| AnnaBridge | 167:84c0a372a020 | 472 | /** @addtogroup IRDA_Exported_Functions_Group1 |
| AnnaBridge | 167:84c0a372a020 | 473 | * @{ |
| AnnaBridge | 167:84c0a372a020 | 474 | */ |
| AnnaBridge | 167:84c0a372a020 | 475 | /* Initialization/de-initialization functions **********************************/ |
| AnnaBridge | 167:84c0a372a020 | 476 | HAL_StatusTypeDef HAL_IRDA_Init(IRDA_HandleTypeDef *hirda); |
| AnnaBridge | 167:84c0a372a020 | 477 | HAL_StatusTypeDef HAL_IRDA_DeInit(IRDA_HandleTypeDef *hirda); |
| AnnaBridge | 167:84c0a372a020 | 478 | void HAL_IRDA_MspInit(IRDA_HandleTypeDef *hirda); |
| AnnaBridge | 167:84c0a372a020 | 479 | void HAL_IRDA_MspDeInit(IRDA_HandleTypeDef *hirda); |
| AnnaBridge | 167:84c0a372a020 | 480 | /** |
| AnnaBridge | 167:84c0a372a020 | 481 | * @} |
| AnnaBridge | 167:84c0a372a020 | 482 | */ |
| AnnaBridge | 167:84c0a372a020 | 483 | |
| AnnaBridge | 167:84c0a372a020 | 484 | /** @addtogroup IRDA_Exported_Functions_Group2 |
| AnnaBridge | 167:84c0a372a020 | 485 | * @{ |
| AnnaBridge | 167:84c0a372a020 | 486 | */ |
| AnnaBridge | 167:84c0a372a020 | 487 | /* IO operation functions *******************************************************/ |
| AnnaBridge | 167:84c0a372a020 | 488 | HAL_StatusTypeDef HAL_IRDA_Transmit(IRDA_HandleTypeDef *hirda, uint8_t *pData, uint16_t Size, uint32_t Timeout); |
| AnnaBridge | 167:84c0a372a020 | 489 | HAL_StatusTypeDef HAL_IRDA_Receive(IRDA_HandleTypeDef *hirda, uint8_t *pData, uint16_t Size, uint32_t Timeout); |
| AnnaBridge | 167:84c0a372a020 | 490 | HAL_StatusTypeDef HAL_IRDA_Transmit_IT(IRDA_HandleTypeDef *hirda, uint8_t *pData, uint16_t Size); |
| AnnaBridge | 167:84c0a372a020 | 491 | HAL_StatusTypeDef HAL_IRDA_Receive_IT(IRDA_HandleTypeDef *hirda, uint8_t *pData, uint16_t Size); |
| AnnaBridge | 167:84c0a372a020 | 492 | HAL_StatusTypeDef HAL_IRDA_Transmit_DMA(IRDA_HandleTypeDef *hirda, uint8_t *pData, uint16_t Size); |
| AnnaBridge | 167:84c0a372a020 | 493 | HAL_StatusTypeDef HAL_IRDA_Receive_DMA(IRDA_HandleTypeDef *hirda, uint8_t *pData, uint16_t Size); |
| AnnaBridge | 167:84c0a372a020 | 494 | HAL_StatusTypeDef HAL_IRDA_DMAPause(IRDA_HandleTypeDef *hirda); |
| AnnaBridge | 167:84c0a372a020 | 495 | HAL_StatusTypeDef HAL_IRDA_DMAResume(IRDA_HandleTypeDef *hirda); |
| AnnaBridge | 167:84c0a372a020 | 496 | HAL_StatusTypeDef HAL_IRDA_DMAStop(IRDA_HandleTypeDef *hirda); |
| AnnaBridge | 167:84c0a372a020 | 497 | /* Transfer Abort functions */ |
| AnnaBridge | 167:84c0a372a020 | 498 | HAL_StatusTypeDef HAL_IRDA_Abort(IRDA_HandleTypeDef *hirda); |
| AnnaBridge | 167:84c0a372a020 | 499 | HAL_StatusTypeDef HAL_IRDA_AbortTransmit(IRDA_HandleTypeDef *hirda); |
| AnnaBridge | 167:84c0a372a020 | 500 | HAL_StatusTypeDef HAL_IRDA_AbortReceive(IRDA_HandleTypeDef *hirda); |
| AnnaBridge | 167:84c0a372a020 | 501 | HAL_StatusTypeDef HAL_IRDA_Abort_IT(IRDA_HandleTypeDef *hirda); |
| AnnaBridge | 167:84c0a372a020 | 502 | HAL_StatusTypeDef HAL_IRDA_AbortTransmit_IT(IRDA_HandleTypeDef *hirda); |
| AnnaBridge | 167:84c0a372a020 | 503 | HAL_StatusTypeDef HAL_IRDA_AbortReceive_IT(IRDA_HandleTypeDef *hirda); |
| AnnaBridge | 167:84c0a372a020 | 504 | |
| AnnaBridge | 167:84c0a372a020 | 505 | void HAL_IRDA_IRQHandler(IRDA_HandleTypeDef *hirda); |
| AnnaBridge | 167:84c0a372a020 | 506 | void HAL_IRDA_TxCpltCallback(IRDA_HandleTypeDef *hirda); |
| AnnaBridge | 167:84c0a372a020 | 507 | void HAL_IRDA_RxCpltCallback(IRDA_HandleTypeDef *hirda); |
| AnnaBridge | 167:84c0a372a020 | 508 | void HAL_IRDA_TxHalfCpltCallback(IRDA_HandleTypeDef *hirda); |
| AnnaBridge | 167:84c0a372a020 | 509 | void HAL_IRDA_RxHalfCpltCallback(IRDA_HandleTypeDef *hirda); |
| AnnaBridge | 167:84c0a372a020 | 510 | void HAL_IRDA_ErrorCallback(IRDA_HandleTypeDef *hirda); |
| AnnaBridge | 167:84c0a372a020 | 511 | void HAL_IRDA_AbortCpltCallback(IRDA_HandleTypeDef *hirda); |
| AnnaBridge | 167:84c0a372a020 | 512 | void HAL_IRDA_AbortTransmitCpltCallback(IRDA_HandleTypeDef *hirda); |
| AnnaBridge | 167:84c0a372a020 | 513 | void HAL_IRDA_AbortReceiveCpltCallback(IRDA_HandleTypeDef *hirda); |
| AnnaBridge | 167:84c0a372a020 | 514 | /** |
| AnnaBridge | 167:84c0a372a020 | 515 | * @} |
| AnnaBridge | 167:84c0a372a020 | 516 | */ |
| AnnaBridge | 167:84c0a372a020 | 517 | |
| AnnaBridge | 167:84c0a372a020 | 518 | /** @addtogroup IRDA_Exported_Functions_Group3 |
| AnnaBridge | 167:84c0a372a020 | 519 | * @{ |
| AnnaBridge | 167:84c0a372a020 | 520 | */ |
| AnnaBridge | 167:84c0a372a020 | 521 | /* Peripheral State functions **************************************************/ |
| AnnaBridge | 167:84c0a372a020 | 522 | HAL_IRDA_StateTypeDef HAL_IRDA_GetState(IRDA_HandleTypeDef *hirda); |
| AnnaBridge | 167:84c0a372a020 | 523 | uint32_t HAL_IRDA_GetError(IRDA_HandleTypeDef *hirda); |
| AnnaBridge | 167:84c0a372a020 | 524 | /** |
| AnnaBridge | 167:84c0a372a020 | 525 | * @} |
| AnnaBridge | 167:84c0a372a020 | 526 | */ |
| AnnaBridge | 167:84c0a372a020 | 527 | |
| AnnaBridge | 167:84c0a372a020 | 528 | /** |
| AnnaBridge | 167:84c0a372a020 | 529 | * @} |
| AnnaBridge | 167:84c0a372a020 | 530 | */ |
| AnnaBridge | 167:84c0a372a020 | 531 | |
| AnnaBridge | 167:84c0a372a020 | 532 | /* Private types -------------------------------------------------------------*/ |
| AnnaBridge | 167:84c0a372a020 | 533 | /* Private variables ---------------------------------------------------------*/ |
| AnnaBridge | 167:84c0a372a020 | 534 | /* Private constants ---------------------------------------------------------*/ |
| AnnaBridge | 167:84c0a372a020 | 535 | /** @defgroup IRDA_Private_Constants IRDA Private Constants |
| AnnaBridge | 167:84c0a372a020 | 536 | * @{ |
| AnnaBridge | 167:84c0a372a020 | 537 | */ |
| AnnaBridge | 167:84c0a372a020 | 538 | |
| AnnaBridge | 167:84c0a372a020 | 539 | /** @brief IRDA interruptions flag mask |
| AnnaBridge | 167:84c0a372a020 | 540 | * |
| AnnaBridge | 167:84c0a372a020 | 541 | */ |
| AnnaBridge | 167:84c0a372a020 | 542 | #define IRDA_IT_MASK ((uint32_t) USART_CR1_PEIE | USART_CR1_TXEIE | USART_CR1_TCIE | USART_CR1_RXNEIE | \ |
| AnnaBridge | 167:84c0a372a020 | 543 | USART_CR1_IDLEIE | USART_CR2_LBDIE | USART_CR3_CTSIE | USART_CR3_EIE ) |
| AnnaBridge | 167:84c0a372a020 | 544 | |
| AnnaBridge | 167:84c0a372a020 | 545 | #define IRDA_CR1_REG_INDEX 1U |
| AnnaBridge | 167:84c0a372a020 | 546 | #define IRDA_CR2_REG_INDEX 2U |
| AnnaBridge | 167:84c0a372a020 | 547 | #define IRDA_CR3_REG_INDEX 3U |
| AnnaBridge | 167:84c0a372a020 | 548 | /** |
| AnnaBridge | 167:84c0a372a020 | 549 | * @} |
| AnnaBridge | 167:84c0a372a020 | 550 | */ |
| AnnaBridge | 167:84c0a372a020 | 551 | |
| AnnaBridge | 167:84c0a372a020 | 552 | /* Private macros --------------------------------------------------------*/ |
| AnnaBridge | 167:84c0a372a020 | 553 | /** @defgroup IRDA_Private_Macros IRDA Private Macros |
| AnnaBridge | 167:84c0a372a020 | 554 | * @{ |
| AnnaBridge | 167:84c0a372a020 | 555 | */ |
| AnnaBridge | 167:84c0a372a020 | 556 | #define IS_IRDA_WORD_LENGTH(LENGTH) (((LENGTH) == IRDA_WORDLENGTH_8B) || \ |
| AnnaBridge | 167:84c0a372a020 | 557 | ((LENGTH) == IRDA_WORDLENGTH_9B)) |
| AnnaBridge | 167:84c0a372a020 | 558 | #define IS_IRDA_PARITY(PARITY) (((PARITY) == IRDA_PARITY_NONE) || \ |
| AnnaBridge | 167:84c0a372a020 | 559 | ((PARITY) == IRDA_PARITY_EVEN) || \ |
| AnnaBridge | 167:84c0a372a020 | 560 | ((PARITY) == IRDA_PARITY_ODD)) |
| AnnaBridge | 167:84c0a372a020 | 561 | #define IS_IRDA_MODE(MODE) ((((MODE) & 0x0000FFF3U) == 0x00U) && ((MODE) != 0x00000000U)) |
| AnnaBridge | 167:84c0a372a020 | 562 | #define IS_IRDA_POWERMODE(MODE) (((MODE) == IRDA_POWERMODE_LOWPOWER) || \ |
| AnnaBridge | 167:84c0a372a020 | 563 | ((MODE) == IRDA_POWERMODE_NORMAL)) |
| AnnaBridge | 167:84c0a372a020 | 564 | #define IS_IRDA_BAUDRATE(BAUDRATE) ((BAUDRATE) < 115201U) |
| AnnaBridge | 167:84c0a372a020 | 565 | |
| AnnaBridge | 167:84c0a372a020 | 566 | #define IRDA_DIV(_PCLK_, _BAUD_) (((_PCLK_)*25U)/(4U*(_BAUD_))) |
| AnnaBridge | 167:84c0a372a020 | 567 | #define IRDA_DIVMANT(_PCLK_, _BAUD_) (IRDA_DIV((_PCLK_), (_BAUD_))/100U) |
| AnnaBridge | 167:84c0a372a020 | 568 | #define IRDA_DIVFRAQ(_PCLK_, _BAUD_) (((IRDA_DIV((_PCLK_), (_BAUD_)) - (IRDA_DIVMANT((_PCLK_), (_BAUD_)) * 100U)) * 16U + 50U) / 100U) |
| AnnaBridge | 167:84c0a372a020 | 569 | /* UART BRR = mantissa + overflow + fraction |
| AnnaBridge | 167:84c0a372a020 | 570 | = (UART DIVMANT << 4) + (UART DIVFRAQ & 0xF0) + (UART DIVFRAQ & 0x0FU) */ |
| AnnaBridge | 167:84c0a372a020 | 571 | #define IRDA_BRR(_PCLK_, _BAUD_) (((IRDA_DIVMANT((_PCLK_), (_BAUD_)) << 4U) + \ |
| AnnaBridge | 167:84c0a372a020 | 572 | (IRDA_DIVFRAQ((_PCLK_), (_BAUD_)) & 0xF0U)) + \ |
| AnnaBridge | 167:84c0a372a020 | 573 | (IRDA_DIVFRAQ((_PCLK_), (_BAUD_)) & 0x0FU)) |
| AnnaBridge | 167:84c0a372a020 | 574 | |
| AnnaBridge | 167:84c0a372a020 | 575 | /** |
| AnnaBridge | 167:84c0a372a020 | 576 | * @} |
| AnnaBridge | 167:84c0a372a020 | 577 | */ |
| AnnaBridge | 167:84c0a372a020 | 578 | |
| AnnaBridge | 167:84c0a372a020 | 579 | /* Private functions ---------------------------------------------------------*/ |
| AnnaBridge | 167:84c0a372a020 | 580 | /** @defgroup IRDA_Private_Functions IRDA Private Functions |
| AnnaBridge | 167:84c0a372a020 | 581 | * @{ |
| AnnaBridge | 167:84c0a372a020 | 582 | */ |
| AnnaBridge | 167:84c0a372a020 | 583 | |
| AnnaBridge | 167:84c0a372a020 | 584 | /** |
| AnnaBridge | 167:84c0a372a020 | 585 | * @} |
| AnnaBridge | 167:84c0a372a020 | 586 | */ |
| AnnaBridge | 167:84c0a372a020 | 587 | |
| AnnaBridge | 167:84c0a372a020 | 588 | /** |
| AnnaBridge | 167:84c0a372a020 | 589 | * @} |
| AnnaBridge | 167:84c0a372a020 | 590 | */ |
| AnnaBridge | 167:84c0a372a020 | 591 | |
| AnnaBridge | 167:84c0a372a020 | 592 | /** |
| AnnaBridge | 167:84c0a372a020 | 593 | * @} |
| AnnaBridge | 167:84c0a372a020 | 594 | */ |
| AnnaBridge | 167:84c0a372a020 | 595 | |
| AnnaBridge | 167:84c0a372a020 | 596 | #ifdef __cplusplus |
| AnnaBridge | 167:84c0a372a020 | 597 | } |
| AnnaBridge | 167:84c0a372a020 | 598 | #endif |
| AnnaBridge | 167:84c0a372a020 | 599 | |
| AnnaBridge | 167:84c0a372a020 | 600 | #endif /* __STM32F4xx_HAL_IRDA_H */ |
| AnnaBridge | 167:84c0a372a020 | 601 | |
| AnnaBridge | 167:84c0a372a020 | 602 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |


