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TARGET_NCS36510/TOOLCHAIN_IAR/random_map.h@171:3a7713b1edbc, 2018-11-08 (annotated)

Committer:
AnnaBridge
Date:
Thu Nov 08 11:45:42 2018 +0000
Revision:
171:3a7713b1edbc
mbed library. Release version 164

Who changed what in which revision?

UserRevisionLine numberNew contents of line
AnnaBridge 171:3a7713b1edbc 1 /**
AnnaBridge 171:3a7713b1edbc 2 ******************************************************************************
AnnaBridge 171:3a7713b1edbc 3 * @file random_map.h
AnnaBridge 171:3a7713b1edbc 4 * @brief Randomizer hw module register map
AnnaBridge 171:3a7713b1edbc 5 * @internal
AnnaBridge 171:3a7713b1edbc 6 * @author ON Semiconductor
AnnaBridge 171:3a7713b1edbc 7 * $Rev: 3283 $
AnnaBridge 171:3a7713b1edbc 8 * $Date: 2015-02-26 18:52:22 +0530 (Thu, 26 Feb 2015) $
AnnaBridge 171:3a7713b1edbc 9 ******************************************************************************
AnnaBridge 171:3a7713b1edbc 10 * Copyright 2016 Semiconductor Components Industries LLC (d/b/a “ON Semiconductor”).
AnnaBridge 171:3a7713b1edbc 11 * All rights reserved. This software and/or documentation is licensed by ON Semiconductor
AnnaBridge 171:3a7713b1edbc 12 * under limited terms and conditions. The terms and conditions pertaining to the software
AnnaBridge 171:3a7713b1edbc 13 * and/or documentation are available at http://www.onsemi.com/site/pdf/ONSEMI_T&C.pdf
AnnaBridge 171:3a7713b1edbc 14 * (“ON Semiconductor Standard Terms and Conditions of Sale, Section 8 Software”) and
AnnaBridge 171:3a7713b1edbc 15 * if applicable the software license agreement. Do not use this software and/or
AnnaBridge 171:3a7713b1edbc 16 * documentation unless you have carefully read and you agree to the limited terms and
AnnaBridge 171:3a7713b1edbc 17 * conditions. By using this software and/or documentation, you agree to the limited
AnnaBridge 171:3a7713b1edbc 18 * terms and conditions.
AnnaBridge 171:3a7713b1edbc 19 *
AnnaBridge 171:3a7713b1edbc 20 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
AnnaBridge 171:3a7713b1edbc 21 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
AnnaBridge 171:3a7713b1edbc 22 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
AnnaBridge 171:3a7713b1edbc 23 * ON SEMICONDUCTOR SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL,
AnnaBridge 171:3a7713b1edbc 24 * INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
AnnaBridge 171:3a7713b1edbc 25 * @endinternal
AnnaBridge 171:3a7713b1edbc 26 *
AnnaBridge 171:3a7713b1edbc 27 * @ingroup random
AnnaBridge 171:3a7713b1edbc 28 *
AnnaBridge 171:3a7713b1edbc 29 * @details
AnnaBridge 171:3a7713b1edbc 30 */
AnnaBridge 171:3a7713b1edbc 31
AnnaBridge 171:3a7713b1edbc 32 #ifndef RANDOM_MAP_H_
AnnaBridge 171:3a7713b1edbc 33 #define RANDOM_MAP_H_
AnnaBridge 171:3a7713b1edbc 34
AnnaBridge 171:3a7713b1edbc 35 /*************************************************************************************************
AnnaBridge 171:3a7713b1edbc 36 * *
AnnaBridge 171:3a7713b1edbc 37 * Header files *
AnnaBridge 171:3a7713b1edbc 38 * *
AnnaBridge 171:3a7713b1edbc 39 *************************************************************************************************/
AnnaBridge 171:3a7713b1edbc 40
AnnaBridge 171:3a7713b1edbc 41 #include "architecture.h"
AnnaBridge 171:3a7713b1edbc 42
AnnaBridge 171:3a7713b1edbc 43 /**************************************************************************************************
AnnaBridge 171:3a7713b1edbc 44 * *
AnnaBridge 171:3a7713b1edbc 45 * Type definitions *
AnnaBridge 171:3a7713b1edbc 46 * *
AnnaBridge 171:3a7713b1edbc 47 **************************************************************************************************/
AnnaBridge 171:3a7713b1edbc 48
AnnaBridge 171:3a7713b1edbc 49 /** Random Number Generator Control HW Structure Overlay */
AnnaBridge 171:3a7713b1edbc 50 typedef struct {
AnnaBridge 171:3a7713b1edbc 51 __IO uint32_t WR_SEED_RD_RAND; /* Seed set & random read reg - 0x40011000 */
AnnaBridge 171:3a7713b1edbc 52 union {
AnnaBridge 171:3a7713b1edbc 53 struct {
AnnaBridge 171:3a7713b1edbc 54 __IO uint32_t MODE :1; /**<Mode Register, 0 – LSFR is updated on every rising edge of PCLK, 1 – LSFR is only updated on a read event of the LSFR register */
AnnaBridge 171:3a7713b1edbc 55 __IO uint32_t BYTE_SWAP :1; /**<Byte Swap Control, 0 – 32-bit byte swap, 1 – 64-bit byte swap */
AnnaBridge 171:3a7713b1edbc 56 __IO uint32_t MEATSTABLE_SPEED :1; /**<Meta-stable Latch TRNG Speed Control, 0 – Slow mode, 1 – Fast mode */
AnnaBridge 171:3a7713b1edbc 57 __IO uint32_t WHITENOISE_EN :1; /**<White Noise TRNG Enable, 0 – Disabled, 1 – Enabled */
AnnaBridge 171:3a7713b1edbc 58 __IO uint32_t METASTABLE_LATCH_EN :1; /**<Meta-stable Latch TRNG Enable, 0 – Disabled, 1 – Enabled */
AnnaBridge 171:3a7713b1edbc 59 __IO uint32_t JIC :1; /**<JIC */
AnnaBridge 171:3a7713b1edbc 60 } BITS;
AnnaBridge 171:3a7713b1edbc 61 __IO uint32_t WORD;
AnnaBridge 171:3a7713b1edbc 62 } CONTROL; /* Control register - 0x40011004 */
AnnaBridge 171:3a7713b1edbc 63 union {
AnnaBridge 171:3a7713b1edbc 64 struct {
AnnaBridge 171:3a7713b1edbc 65 __IO uint32_t BYTE_0 :8; /**<Byte #0*/
AnnaBridge 171:3a7713b1edbc 66 __IO uint32_t BYTE_1 :8; /**<Byte #1*/
AnnaBridge 171:3a7713b1edbc 67 __IO uint32_t BYTE_2 :8; /**<Byte #2*/
AnnaBridge 171:3a7713b1edbc 68 __IO uint32_t BYTE_3 :8; /**<Byte #3*/
AnnaBridge 171:3a7713b1edbc 69 } BITS;
AnnaBridge 171:3a7713b1edbc 70 __IO uint32_t WORD;
AnnaBridge 171:3a7713b1edbc 71 } WRITE_BUF_LSW; /* Byte swap write buffer – Least significant word - 0x40011008 */
AnnaBridge 171:3a7713b1edbc 72 union {
AnnaBridge 171:3a7713b1edbc 73 struct {
AnnaBridge 171:3a7713b1edbc 74 __IO uint32_t BYTE_4 :8; /**<Byte #4*/
AnnaBridge 171:3a7713b1edbc 75 __IO uint32_t BYTE_5 :8; /**<Byte #5*/
AnnaBridge 171:3a7713b1edbc 76 __IO uint32_t BYTE_6 :8; /**<Byte #6*/
AnnaBridge 171:3a7713b1edbc 77 __IO uint32_t BYTE_7 :8; /**<Byte #7*/
AnnaBridge 171:3a7713b1edbc 78 } BITS;
AnnaBridge 171:3a7713b1edbc 79 __IO uint32_t WORD;
AnnaBridge 171:3a7713b1edbc 80 } WRITE_BUF_MSW; /* Byte swap write buffer – Most significant word - 0x4001100C */
AnnaBridge 171:3a7713b1edbc 81 union {
AnnaBridge 171:3a7713b1edbc 82 struct {
AnnaBridge 171:3a7713b1edbc 83 __IO uint32_t BYTE_7_3 :8; /**<Byte Swap Control == 1? Byte #7 : Byte #3*/
AnnaBridge 171:3a7713b1edbc 84 __IO uint32_t BYTE_6_2 :8; /**<Byte Swap Control == 1? Byte #6 : Byte #2*/
AnnaBridge 171:3a7713b1edbc 85 __IO uint32_t BYTE_5_1 :8; /**<Byte Swap Control == 1? Byte #5 : Byte #1*/
AnnaBridge 171:3a7713b1edbc 86 __IO uint32_t BYTE_4_0 :8; /**<Byte Swap Control == 1? Byte #4 : Byte #0*/
AnnaBridge 171:3a7713b1edbc 87 } BITS;
AnnaBridge 171:3a7713b1edbc 88 __IO uint32_t WORD;
AnnaBridge 171:3a7713b1edbc 89 } READ_BUF_LSW; /* Byte swap read buffer – Least significant word - 0x40011010 */
AnnaBridge 171:3a7713b1edbc 90 union {
AnnaBridge 171:3a7713b1edbc 91 struct {
AnnaBridge 171:3a7713b1edbc 92 __IO uint32_t BYTE_3 :8; /**<Byte #3*/
AnnaBridge 171:3a7713b1edbc 93 __IO uint32_t BYTE_2 :8; /**<Byte #2*/
AnnaBridge 171:3a7713b1edbc 94 __IO uint32_t BYTE_1 :8; /**<Byte #1*/
AnnaBridge 171:3a7713b1edbc 95 __IO uint32_t BYTE_0 :8; /**<Byte #0*/
AnnaBridge 171:3a7713b1edbc 96 } BITS;
AnnaBridge 171:3a7713b1edbc 97 __IO uint32_t WORD;
AnnaBridge 171:3a7713b1edbc 98 } READ_BUF_MSW; /* Byte swap read buffer – Most significant word - 0x40011014 */
AnnaBridge 171:3a7713b1edbc 99 __I uint32_t METASTABLE_LATCH_VAL; /* Meta-stable latch TRNG value - 0x40011018 */
AnnaBridge 171:3a7713b1edbc 100 __I uint32_t WHITENOISE_VAL; /* White noise TRNG value - 0x4001101C */
AnnaBridge 171:3a7713b1edbc 101 } RandReg_t, *RandReg_pt;
AnnaBridge 171:3a7713b1edbc 102
AnnaBridge 171:3a7713b1edbc 103 #endif /* RANDOM_MAP_H_ */