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TARGET_NUCLEO_L496ZG_P/TARGET_STM/TARGET_STM32L4/device/stm32l4xx_ll_crs.h@158:1c57384330a6, 2017-11-23 (annotated)

Committer:
AnnaBridge
Date:
Thu Nov 23 11:44:04 2017 +0000
Revision:
158:1c57384330a6
Child:
161:aa5281ff4a02
mbed library. Release version 156

Who changed what in which revision?

UserRevisionLine numberNew contents of line
AnnaBridge 158:1c57384330a6 1 /**
AnnaBridge 158:1c57384330a6 2 ******************************************************************************
AnnaBridge 158:1c57384330a6 3 * @file stm32l4xx_ll_crs.h
AnnaBridge 158:1c57384330a6 4 * @author MCD Application Team
AnnaBridge 158:1c57384330a6 5 * @version V1.7.1
AnnaBridge 158:1c57384330a6 6 * @date 21-April-2017
AnnaBridge 158:1c57384330a6 7 * @brief Header file of CRS LL module.
AnnaBridge 158:1c57384330a6 8 ******************************************************************************
AnnaBridge 158:1c57384330a6 9 * @attention
AnnaBridge 158:1c57384330a6 10 *
AnnaBridge 158:1c57384330a6 11 * <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
AnnaBridge 158:1c57384330a6 12 *
AnnaBridge 158:1c57384330a6 13 * Redistribution and use in source and binary forms, with or without modification,
AnnaBridge 158:1c57384330a6 14 * are permitted provided that the following conditions are met:
AnnaBridge 158:1c57384330a6 15 * 1. Redistributions of source code must retain the above copyright notice,
AnnaBridge 158:1c57384330a6 16 * this list of conditions and the following disclaimer.
AnnaBridge 158:1c57384330a6 17 * 2. Redistributions in binary form must reproduce the above copyright notice,
AnnaBridge 158:1c57384330a6 18 * this list of conditions and the following disclaimer in the documentation
AnnaBridge 158:1c57384330a6 19 * and/or other materials provided with the distribution.
AnnaBridge 158:1c57384330a6 20 * 3. Neither the name of STMicroelectronics nor the names of its contributors
AnnaBridge 158:1c57384330a6 21 * may be used to endorse or promote products derived from this software
AnnaBridge 158:1c57384330a6 22 * without specific prior written permission.
AnnaBridge 158:1c57384330a6 23 *
AnnaBridge 158:1c57384330a6 24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
AnnaBridge 158:1c57384330a6 25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
AnnaBridge 158:1c57384330a6 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
AnnaBridge 158:1c57384330a6 27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
AnnaBridge 158:1c57384330a6 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
AnnaBridge 158:1c57384330a6 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
AnnaBridge 158:1c57384330a6 30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
AnnaBridge 158:1c57384330a6 31 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
AnnaBridge 158:1c57384330a6 32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
AnnaBridge 158:1c57384330a6 33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
AnnaBridge 158:1c57384330a6 34 *
AnnaBridge 158:1c57384330a6 35 ******************************************************************************
AnnaBridge 158:1c57384330a6 36 */
AnnaBridge 158:1c57384330a6 37
AnnaBridge 158:1c57384330a6 38 /* Define to prevent recursive inclusion -------------------------------------*/
AnnaBridge 158:1c57384330a6 39 #ifndef __STM32L4xx_LL_CRS_H
AnnaBridge 158:1c57384330a6 40 #define __STM32L4xx_LL_CRS_H
AnnaBridge 158:1c57384330a6 41
AnnaBridge 158:1c57384330a6 42 #ifdef __cplusplus
AnnaBridge 158:1c57384330a6 43 extern "C" {
AnnaBridge 158:1c57384330a6 44 #endif
AnnaBridge 158:1c57384330a6 45
AnnaBridge 158:1c57384330a6 46 /* Includes ------------------------------------------------------------------*/
AnnaBridge 158:1c57384330a6 47 #include "stm32l4xx.h"
AnnaBridge 158:1c57384330a6 48
AnnaBridge 158:1c57384330a6 49 /** @addtogroup STM32L4xx_LL_Driver
AnnaBridge 158:1c57384330a6 50 * @{
AnnaBridge 158:1c57384330a6 51 */
AnnaBridge 158:1c57384330a6 52
AnnaBridge 158:1c57384330a6 53 #if defined(CRS)
AnnaBridge 158:1c57384330a6 54
AnnaBridge 158:1c57384330a6 55 /** @defgroup CRS_LL CRS
AnnaBridge 158:1c57384330a6 56 * @{
AnnaBridge 158:1c57384330a6 57 */
AnnaBridge 158:1c57384330a6 58
AnnaBridge 158:1c57384330a6 59 /* Private types -------------------------------------------------------------*/
AnnaBridge 158:1c57384330a6 60 /* Private variables ---------------------------------------------------------*/
AnnaBridge 158:1c57384330a6 61 /* Private constants ---------------------------------------------------------*/
AnnaBridge 158:1c57384330a6 62 /* Private macros ------------------------------------------------------------*/
AnnaBridge 158:1c57384330a6 63
AnnaBridge 158:1c57384330a6 64 /* Exported types ------------------------------------------------------------*/
AnnaBridge 158:1c57384330a6 65 /* Exported constants --------------------------------------------------------*/
AnnaBridge 158:1c57384330a6 66 /** @defgroup CRS_LL_Exported_Constants CRS Exported Constants
AnnaBridge 158:1c57384330a6 67 * @{
AnnaBridge 158:1c57384330a6 68 */
AnnaBridge 158:1c57384330a6 69
AnnaBridge 158:1c57384330a6 70 /** @defgroup CRS_LL_EC_GET_FLAG Get Flags Defines
AnnaBridge 158:1c57384330a6 71 * @brief Flags defines which can be used with LL_CRS_ReadReg function
AnnaBridge 158:1c57384330a6 72 * @{
AnnaBridge 158:1c57384330a6 73 */
AnnaBridge 158:1c57384330a6 74 #define LL_CRS_ISR_SYNCOKF CRS_ISR_SYNCOKF
AnnaBridge 158:1c57384330a6 75 #define LL_CRS_ISR_SYNCWARNF CRS_ISR_SYNCWARNF
AnnaBridge 158:1c57384330a6 76 #define LL_CRS_ISR_ERRF CRS_ISR_ERRF
AnnaBridge 158:1c57384330a6 77 #define LL_CRS_ISR_ESYNCF CRS_ISR_ESYNCF
AnnaBridge 158:1c57384330a6 78 #define LL_CRS_ISR_SYNCERR CRS_ISR_SYNCERR
AnnaBridge 158:1c57384330a6 79 #define LL_CRS_ISR_SYNCMISS CRS_ISR_SYNCMISS
AnnaBridge 158:1c57384330a6 80 #define LL_CRS_ISR_TRIMOVF CRS_ISR_TRIMOVF
AnnaBridge 158:1c57384330a6 81 /**
AnnaBridge 158:1c57384330a6 82 * @}
AnnaBridge 158:1c57384330a6 83 */
AnnaBridge 158:1c57384330a6 84
AnnaBridge 158:1c57384330a6 85 /** @defgroup CRS_LL_EC_IT IT Defines
AnnaBridge 158:1c57384330a6 86 * @brief IT defines which can be used with LL_CRS_ReadReg and LL_CRS_WriteReg functions
AnnaBridge 158:1c57384330a6 87 * @{
AnnaBridge 158:1c57384330a6 88 */
AnnaBridge 158:1c57384330a6 89 #define LL_CRS_CR_SYNCOKIE CRS_CR_SYNCOKIE
AnnaBridge 158:1c57384330a6 90 #define LL_CRS_CR_SYNCWARNIE CRS_CR_SYNCWARNIE
AnnaBridge 158:1c57384330a6 91 #define LL_CRS_CR_ERRIE CRS_CR_ERRIE
AnnaBridge 158:1c57384330a6 92 #define LL_CRS_CR_ESYNCIE CRS_CR_ESYNCIE
AnnaBridge 158:1c57384330a6 93 /**
AnnaBridge 158:1c57384330a6 94 * @}
AnnaBridge 158:1c57384330a6 95 */
AnnaBridge 158:1c57384330a6 96
AnnaBridge 158:1c57384330a6 97 /** @defgroup CRS_LL_EC_SYNC_DIV Synchronization Signal Divider
AnnaBridge 158:1c57384330a6 98 * @{
AnnaBridge 158:1c57384330a6 99 */
AnnaBridge 158:1c57384330a6 100 #define LL_CRS_SYNC_DIV_1 ((uint32_t)0x00U) /*!< Synchro Signal not divided (default) */
AnnaBridge 158:1c57384330a6 101 #define LL_CRS_SYNC_DIV_2 CRS_CFGR_SYNCDIV_0 /*!< Synchro Signal divided by 2 */
AnnaBridge 158:1c57384330a6 102 #define LL_CRS_SYNC_DIV_4 CRS_CFGR_SYNCDIV_1 /*!< Synchro Signal divided by 4 */
AnnaBridge 158:1c57384330a6 103 #define LL_CRS_SYNC_DIV_8 (CRS_CFGR_SYNCDIV_1 | CRS_CFGR_SYNCDIV_0) /*!< Synchro Signal divided by 8 */
AnnaBridge 158:1c57384330a6 104 #define LL_CRS_SYNC_DIV_16 CRS_CFGR_SYNCDIV_2 /*!< Synchro Signal divided by 16 */
AnnaBridge 158:1c57384330a6 105 #define LL_CRS_SYNC_DIV_32 (CRS_CFGR_SYNCDIV_2 | CRS_CFGR_SYNCDIV_0) /*!< Synchro Signal divided by 32 */
AnnaBridge 158:1c57384330a6 106 #define LL_CRS_SYNC_DIV_64 (CRS_CFGR_SYNCDIV_2 | CRS_CFGR_SYNCDIV_1) /*!< Synchro Signal divided by 64 */
AnnaBridge 158:1c57384330a6 107 #define LL_CRS_SYNC_DIV_128 CRS_CFGR_SYNCDIV /*!< Synchro Signal divided by 128 */
AnnaBridge 158:1c57384330a6 108 /**
AnnaBridge 158:1c57384330a6 109 * @}
AnnaBridge 158:1c57384330a6 110 */
AnnaBridge 158:1c57384330a6 111
AnnaBridge 158:1c57384330a6 112 /** @defgroup CRS_LL_EC_SYNC_SOURCE Synchronization Signal Source
AnnaBridge 158:1c57384330a6 113 * @{
AnnaBridge 158:1c57384330a6 114 */
AnnaBridge 158:1c57384330a6 115 #define LL_CRS_SYNC_SOURCE_GPIO ((uint32_t)0x00U) /*!< Synchro Signal soucre GPIO */
AnnaBridge 158:1c57384330a6 116 #define LL_CRS_SYNC_SOURCE_LSE CRS_CFGR_SYNCSRC_0 /*!< Synchro Signal source LSE */
AnnaBridge 158:1c57384330a6 117 #define LL_CRS_SYNC_SOURCE_USB CRS_CFGR_SYNCSRC_1 /*!< Synchro Signal source USB SOF (default)*/
AnnaBridge 158:1c57384330a6 118 /**
AnnaBridge 158:1c57384330a6 119 * @}
AnnaBridge 158:1c57384330a6 120 */
AnnaBridge 158:1c57384330a6 121
AnnaBridge 158:1c57384330a6 122 /** @defgroup CRS_LL_EC_SYNC_POLARITY Synchronization Signal Polarity
AnnaBridge 158:1c57384330a6 123 * @{
AnnaBridge 158:1c57384330a6 124 */
AnnaBridge 158:1c57384330a6 125 #define LL_CRS_SYNC_POLARITY_RISING ((uint32_t)0x00U) /*!< Synchro Active on rising edge (default) */
AnnaBridge 158:1c57384330a6 126 #define LL_CRS_SYNC_POLARITY_FALLING CRS_CFGR_SYNCPOL /*!< Synchro Active on falling edge */
AnnaBridge 158:1c57384330a6 127 /**
AnnaBridge 158:1c57384330a6 128 * @}
AnnaBridge 158:1c57384330a6 129 */
AnnaBridge 158:1c57384330a6 130
AnnaBridge 158:1c57384330a6 131 /** @defgroup CRS_LL_EC_FREQERRORDIR Frequency Error Direction
AnnaBridge 158:1c57384330a6 132 * @{
AnnaBridge 158:1c57384330a6 133 */
AnnaBridge 158:1c57384330a6 134 #define LL_CRS_FREQ_ERROR_DIR_UP ((uint32_t)0x00U) /*!< Upcounting direction, the actual frequency is above the target */
AnnaBridge 158:1c57384330a6 135 #define LL_CRS_FREQ_ERROR_DIR_DOWN ((uint32_t)CRS_ISR_FEDIR) /*!< Downcounting direction, the actual frequency is below the target */
AnnaBridge 158:1c57384330a6 136 /**
AnnaBridge 158:1c57384330a6 137 * @}
AnnaBridge 158:1c57384330a6 138 */
AnnaBridge 158:1c57384330a6 139
AnnaBridge 158:1c57384330a6 140 /** @defgroup CRS_LL_EC_DEFAULTVALUES Default Values
AnnaBridge 158:1c57384330a6 141 * @{
AnnaBridge 158:1c57384330a6 142 */
AnnaBridge 158:1c57384330a6 143 /**
AnnaBridge 158:1c57384330a6 144 * @brief Reset value of the RELOAD field
AnnaBridge 158:1c57384330a6 145 * @note The reset value of the RELOAD field corresponds to a target frequency of 48 MHz
AnnaBridge 158:1c57384330a6 146 * and a synchronization signal frequency of 1 kHz (SOF signal from USB)
AnnaBridge 158:1c57384330a6 147 */
AnnaBridge 158:1c57384330a6 148 #define LL_CRS_RELOADVALUE_DEFAULT ((uint32_t)0xBB7FU)
AnnaBridge 158:1c57384330a6 149
AnnaBridge 158:1c57384330a6 150 /**
AnnaBridge 158:1c57384330a6 151 * @brief Reset value of Frequency error limit.
AnnaBridge 158:1c57384330a6 152 */
AnnaBridge 158:1c57384330a6 153 #define LL_CRS_ERRORLIMIT_DEFAULT ((uint32_t)0x22U)
AnnaBridge 158:1c57384330a6 154
AnnaBridge 158:1c57384330a6 155 /**
AnnaBridge 158:1c57384330a6 156 * @brief Reset value of the HSI48 Calibration field
AnnaBridge 158:1c57384330a6 157 * @note The default value is 32, which corresponds to the middle of the trimming interval.
AnnaBridge 158:1c57384330a6 158 * The trimming step is around 67 kHz between two consecutive TRIM steps.
AnnaBridge 158:1c57384330a6 159 * A higher TRIM value corresponds to a higher output frequency
AnnaBridge 158:1c57384330a6 160 */
AnnaBridge 158:1c57384330a6 161 #define LL_CRS_HSI48CALIBRATION_DEFAULT ((uint32_t)0x20U)
AnnaBridge 158:1c57384330a6 162 /**
AnnaBridge 158:1c57384330a6 163 * @}
AnnaBridge 158:1c57384330a6 164 */
AnnaBridge 158:1c57384330a6 165
AnnaBridge 158:1c57384330a6 166 /**
AnnaBridge 158:1c57384330a6 167 * @}
AnnaBridge 158:1c57384330a6 168 */
AnnaBridge 158:1c57384330a6 169
AnnaBridge 158:1c57384330a6 170 /* Exported macro ------------------------------------------------------------*/
AnnaBridge 158:1c57384330a6 171 /** @defgroup CRS_LL_Exported_Macros CRS Exported Macros
AnnaBridge 158:1c57384330a6 172 * @{
AnnaBridge 158:1c57384330a6 173 */
AnnaBridge 158:1c57384330a6 174
AnnaBridge 158:1c57384330a6 175 /** @defgroup CRS_LL_EM_WRITE_READ Common Write and read registers Macros
AnnaBridge 158:1c57384330a6 176 * @{
AnnaBridge 158:1c57384330a6 177 */
AnnaBridge 158:1c57384330a6 178
AnnaBridge 158:1c57384330a6 179 /**
AnnaBridge 158:1c57384330a6 180 * @brief Write a value in CRS register
AnnaBridge 158:1c57384330a6 181 * @param __INSTANCE__ CRS Instance
AnnaBridge 158:1c57384330a6 182 * @param __REG__ Register to be written
AnnaBridge 158:1c57384330a6 183 * @param __VALUE__ Value to be written in the register
AnnaBridge 158:1c57384330a6 184 * @retval None
AnnaBridge 158:1c57384330a6 185 */
AnnaBridge 158:1c57384330a6 186 #define LL_CRS_WriteReg(__INSTANCE__, __REG__, __VALUE__) WRITE_REG(__INSTANCE__->__REG__, (__VALUE__))
AnnaBridge 158:1c57384330a6 187
AnnaBridge 158:1c57384330a6 188 /**
AnnaBridge 158:1c57384330a6 189 * @brief Read a value in CRS register
AnnaBridge 158:1c57384330a6 190 * @param __INSTANCE__ CRS Instance
AnnaBridge 158:1c57384330a6 191 * @param __REG__ Register to be read
AnnaBridge 158:1c57384330a6 192 * @retval Register value
AnnaBridge 158:1c57384330a6 193 */
AnnaBridge 158:1c57384330a6 194 #define LL_CRS_ReadReg(__INSTANCE__, __REG__) READ_REG(__INSTANCE__->__REG__)
AnnaBridge 158:1c57384330a6 195 /**
AnnaBridge 158:1c57384330a6 196 * @}
AnnaBridge 158:1c57384330a6 197 */
AnnaBridge 158:1c57384330a6 198
AnnaBridge 158:1c57384330a6 199 /** @defgroup CRS_LL_EM_Exported_Macros_Calculate_Reload Exported_Macros_Calculate_Reload
AnnaBridge 158:1c57384330a6 200 * @{
AnnaBridge 158:1c57384330a6 201 */
AnnaBridge 158:1c57384330a6 202
AnnaBridge 158:1c57384330a6 203 /**
AnnaBridge 158:1c57384330a6 204 * @brief Macro to calculate reload value to be set in CRS register according to target and sync frequencies
AnnaBridge 158:1c57384330a6 205 * @note The RELOAD value should be selected according to the ratio between
AnnaBridge 158:1c57384330a6 206 * the target frequency and the frequency of the synchronization source after
AnnaBridge 158:1c57384330a6 207 * prescaling. It is then decreased by one in order to reach the expected
AnnaBridge 158:1c57384330a6 208 * synchronization on the zero value. The formula is the following:
AnnaBridge 158:1c57384330a6 209 * RELOAD = (fTARGET / fSYNC) -1
AnnaBridge 158:1c57384330a6 210 * @param __FTARGET__ Target frequency (value in Hz)
AnnaBridge 158:1c57384330a6 211 * @param __FSYNC__ Synchronization signal frequency (value in Hz)
AnnaBridge 158:1c57384330a6 212 * @retval Reload value (in Hz)
AnnaBridge 158:1c57384330a6 213 */
AnnaBridge 158:1c57384330a6 214 #define __LL_CRS_CALC_CALCULATE_RELOADVALUE(__FTARGET__, __FSYNC__) (((__FTARGET__) / (__FSYNC__)) - 1U)
AnnaBridge 158:1c57384330a6 215
AnnaBridge 158:1c57384330a6 216 /**
AnnaBridge 158:1c57384330a6 217 * @}
AnnaBridge 158:1c57384330a6 218 */
AnnaBridge 158:1c57384330a6 219
AnnaBridge 158:1c57384330a6 220 /**
AnnaBridge 158:1c57384330a6 221 * @}
AnnaBridge 158:1c57384330a6 222 */
AnnaBridge 158:1c57384330a6 223
AnnaBridge 158:1c57384330a6 224 /* Exported functions --------------------------------------------------------*/
AnnaBridge 158:1c57384330a6 225 /** @defgroup CRS_LL_Exported_Functions CRS Exported Functions
AnnaBridge 158:1c57384330a6 226 * @{
AnnaBridge 158:1c57384330a6 227 */
AnnaBridge 158:1c57384330a6 228
AnnaBridge 158:1c57384330a6 229 /** @defgroup CRS_LL_EF_Configuration Configuration
AnnaBridge 158:1c57384330a6 230 * @{
AnnaBridge 158:1c57384330a6 231 */
AnnaBridge 158:1c57384330a6 232
AnnaBridge 158:1c57384330a6 233 /**
AnnaBridge 158:1c57384330a6 234 * @brief Enable Frequency error counter
AnnaBridge 158:1c57384330a6 235 * @note When this bit is set, the CRS_CFGR register is write-protected and cannot be modified
AnnaBridge 158:1c57384330a6 236 * @rmtoll CR CEN LL_CRS_EnableFreqErrorCounter
AnnaBridge 158:1c57384330a6 237 * @retval None
AnnaBridge 158:1c57384330a6 238 */
AnnaBridge 158:1c57384330a6 239 __STATIC_INLINE void LL_CRS_EnableFreqErrorCounter(void)
AnnaBridge 158:1c57384330a6 240 {
AnnaBridge 158:1c57384330a6 241 SET_BIT(CRS->CR, CRS_CR_CEN);
AnnaBridge 158:1c57384330a6 242 }
AnnaBridge 158:1c57384330a6 243
AnnaBridge 158:1c57384330a6 244 /**
AnnaBridge 158:1c57384330a6 245 * @brief Disable Frequency error counter
AnnaBridge 158:1c57384330a6 246 * @rmtoll CR CEN LL_CRS_DisableFreqErrorCounter
AnnaBridge 158:1c57384330a6 247 * @retval None
AnnaBridge 158:1c57384330a6 248 */
AnnaBridge 158:1c57384330a6 249 __STATIC_INLINE void LL_CRS_DisableFreqErrorCounter(void)
AnnaBridge 158:1c57384330a6 250 {
AnnaBridge 158:1c57384330a6 251 CLEAR_BIT(CRS->CR, CRS_CR_CEN);
AnnaBridge 158:1c57384330a6 252 }
AnnaBridge 158:1c57384330a6 253
AnnaBridge 158:1c57384330a6 254 /**
AnnaBridge 158:1c57384330a6 255 * @brief Check if Frequency error counter is enabled or not
AnnaBridge 158:1c57384330a6 256 * @rmtoll CR CEN LL_CRS_IsEnabledFreqErrorCounter
AnnaBridge 158:1c57384330a6 257 * @retval State of bit (1 or 0).
AnnaBridge 158:1c57384330a6 258 */
AnnaBridge 158:1c57384330a6 259 __STATIC_INLINE uint32_t LL_CRS_IsEnabledFreqErrorCounter(void)
AnnaBridge 158:1c57384330a6 260 {
AnnaBridge 158:1c57384330a6 261 return (READ_BIT(CRS->CR, CRS_CR_CEN) == (CRS_CR_CEN));
AnnaBridge 158:1c57384330a6 262 }
AnnaBridge 158:1c57384330a6 263
AnnaBridge 158:1c57384330a6 264 /**
AnnaBridge 158:1c57384330a6 265 * @brief Enable Automatic trimming counter
AnnaBridge 158:1c57384330a6 266 * @rmtoll CR AUTOTRIMEN LL_CRS_EnableAutoTrimming
AnnaBridge 158:1c57384330a6 267 * @retval None
AnnaBridge 158:1c57384330a6 268 */
AnnaBridge 158:1c57384330a6 269 __STATIC_INLINE void LL_CRS_EnableAutoTrimming(void)
AnnaBridge 158:1c57384330a6 270 {
AnnaBridge 158:1c57384330a6 271 SET_BIT(CRS->CR, CRS_CR_AUTOTRIMEN);
AnnaBridge 158:1c57384330a6 272 }
AnnaBridge 158:1c57384330a6 273
AnnaBridge 158:1c57384330a6 274 /**
AnnaBridge 158:1c57384330a6 275 * @brief Disable Automatic trimming counter
AnnaBridge 158:1c57384330a6 276 * @rmtoll CR AUTOTRIMEN LL_CRS_DisableAutoTrimming
AnnaBridge 158:1c57384330a6 277 * @retval None
AnnaBridge 158:1c57384330a6 278 */
AnnaBridge 158:1c57384330a6 279 __STATIC_INLINE void LL_CRS_DisableAutoTrimming(void)
AnnaBridge 158:1c57384330a6 280 {
AnnaBridge 158:1c57384330a6 281 CLEAR_BIT(CRS->CR, CRS_CR_AUTOTRIMEN);
AnnaBridge 158:1c57384330a6 282 }
AnnaBridge 158:1c57384330a6 283
AnnaBridge 158:1c57384330a6 284 /**
AnnaBridge 158:1c57384330a6 285 * @brief Check if Automatic trimming is enabled or not
AnnaBridge 158:1c57384330a6 286 * @rmtoll CR AUTOTRIMEN LL_CRS_IsEnabledAutoTrimming
AnnaBridge 158:1c57384330a6 287 * @retval State of bit (1 or 0).
AnnaBridge 158:1c57384330a6 288 */
AnnaBridge 158:1c57384330a6 289 __STATIC_INLINE uint32_t LL_CRS_IsEnabledAutoTrimming(void)
AnnaBridge 158:1c57384330a6 290 {
AnnaBridge 158:1c57384330a6 291 return (READ_BIT(CRS->CR, CRS_CR_AUTOTRIMEN) == (CRS_CR_AUTOTRIMEN));
AnnaBridge 158:1c57384330a6 292 }
AnnaBridge 158:1c57384330a6 293
AnnaBridge 158:1c57384330a6 294 /**
AnnaBridge 158:1c57384330a6 295 * @brief Set HSI48 oscillator smooth trimming
AnnaBridge 158:1c57384330a6 296 * @note When the AUTOTRIMEN bit is set, this field is controlled by hardware and is read-only
AnnaBridge 158:1c57384330a6 297 * @rmtoll CR TRIM LL_CRS_SetHSI48SmoothTrimming
AnnaBridge 158:1c57384330a6 298 * @param Value a number between Min_Data = 0 and Max_Data = 63
AnnaBridge 158:1c57384330a6 299 * @note Default value can be set thanks to @ref LL_CRS_HSI48CALIBRATION_DEFAULT
AnnaBridge 158:1c57384330a6 300 * @retval None
AnnaBridge 158:1c57384330a6 301 */
AnnaBridge 158:1c57384330a6 302 __STATIC_INLINE void LL_CRS_SetHSI48SmoothTrimming(uint32_t Value)
AnnaBridge 158:1c57384330a6 303 {
AnnaBridge 158:1c57384330a6 304 MODIFY_REG(CRS->CR, CRS_CR_TRIM, Value << CRS_CR_TRIM_Pos);
AnnaBridge 158:1c57384330a6 305 }
AnnaBridge 158:1c57384330a6 306
AnnaBridge 158:1c57384330a6 307 /**
AnnaBridge 158:1c57384330a6 308 * @brief Get HSI48 oscillator smooth trimming
AnnaBridge 158:1c57384330a6 309 * @rmtoll CR TRIM LL_CRS_GetHSI48SmoothTrimming
AnnaBridge 158:1c57384330a6 310 * @retval a number between Min_Data = 0 and Max_Data = 63
AnnaBridge 158:1c57384330a6 311 */
AnnaBridge 158:1c57384330a6 312 __STATIC_INLINE uint32_t LL_CRS_GetHSI48SmoothTrimming(void)
AnnaBridge 158:1c57384330a6 313 {
AnnaBridge 158:1c57384330a6 314 return (uint32_t)(READ_BIT(CRS->CR, CRS_CR_TRIM) >> CRS_CR_TRIM_Pos);
AnnaBridge 158:1c57384330a6 315 }
AnnaBridge 158:1c57384330a6 316
AnnaBridge 158:1c57384330a6 317 /**
AnnaBridge 158:1c57384330a6 318 * @brief Set counter reload value
AnnaBridge 158:1c57384330a6 319 * @rmtoll CFGR RELOAD LL_CRS_SetReloadCounter
AnnaBridge 158:1c57384330a6 320 * @param Value a number between Min_Data = 0 and Max_Data = 0xFFFF
AnnaBridge 158:1c57384330a6 321 * @note Default value can be set thanks to @ref LL_CRS_RELOADVALUE_DEFAULT
AnnaBridge 158:1c57384330a6 322 * Otherwise it can be calculated in using macro @ref __LL_CRS_CALC_CALCULATE_RELOADVALUE (_FTARGET_, _FSYNC_)
AnnaBridge 158:1c57384330a6 323 * @retval None
AnnaBridge 158:1c57384330a6 324 */
AnnaBridge 158:1c57384330a6 325 __STATIC_INLINE void LL_CRS_SetReloadCounter(uint32_t Value)
AnnaBridge 158:1c57384330a6 326 {
AnnaBridge 158:1c57384330a6 327 MODIFY_REG(CRS->CFGR, CRS_CFGR_RELOAD, Value);
AnnaBridge 158:1c57384330a6 328 }
AnnaBridge 158:1c57384330a6 329
AnnaBridge 158:1c57384330a6 330 /**
AnnaBridge 158:1c57384330a6 331 * @brief Get counter reload value
AnnaBridge 158:1c57384330a6 332 * @rmtoll CFGR RELOAD LL_CRS_GetReloadCounter
AnnaBridge 158:1c57384330a6 333 * @retval a number between Min_Data = 0 and Max_Data = 0xFFFF
AnnaBridge 158:1c57384330a6 334 */
AnnaBridge 158:1c57384330a6 335 __STATIC_INLINE uint32_t LL_CRS_GetReloadCounter(void)
AnnaBridge 158:1c57384330a6 336 {
AnnaBridge 158:1c57384330a6 337 return (uint32_t)(READ_BIT(CRS->CFGR, CRS_CFGR_RELOAD));
AnnaBridge 158:1c57384330a6 338 }
AnnaBridge 158:1c57384330a6 339
AnnaBridge 158:1c57384330a6 340 /**
AnnaBridge 158:1c57384330a6 341 * @brief Set frequency error limit
AnnaBridge 158:1c57384330a6 342 * @rmtoll CFGR FELIM LL_CRS_SetFreqErrorLimit
AnnaBridge 158:1c57384330a6 343 * @param Value a number between Min_Data = 0 and Max_Data = 255
AnnaBridge 158:1c57384330a6 344 * @note Default value can be set thanks to @ref LL_CRS_ERRORLIMIT_DEFAULT
AnnaBridge 158:1c57384330a6 345 * @retval None
AnnaBridge 158:1c57384330a6 346 */
AnnaBridge 158:1c57384330a6 347 __STATIC_INLINE void LL_CRS_SetFreqErrorLimit(uint32_t Value)
AnnaBridge 158:1c57384330a6 348 {
AnnaBridge 158:1c57384330a6 349 MODIFY_REG(CRS->CFGR, CRS_CFGR_FELIM, Value << CRS_CFGR_FELIM_Pos);
AnnaBridge 158:1c57384330a6 350 }
AnnaBridge 158:1c57384330a6 351
AnnaBridge 158:1c57384330a6 352 /**
AnnaBridge 158:1c57384330a6 353 * @brief Get frequency error limit
AnnaBridge 158:1c57384330a6 354 * @rmtoll CFGR FELIM LL_CRS_GetFreqErrorLimit
AnnaBridge 158:1c57384330a6 355 * @retval A number between Min_Data = 0 and Max_Data = 255
AnnaBridge 158:1c57384330a6 356 */
AnnaBridge 158:1c57384330a6 357 __STATIC_INLINE uint32_t LL_CRS_GetFreqErrorLimit(void)
AnnaBridge 158:1c57384330a6 358 {
AnnaBridge 158:1c57384330a6 359 return (uint32_t)(READ_BIT(CRS->CFGR, CRS_CFGR_FELIM) >> CRS_CFGR_FELIM_Pos);
AnnaBridge 158:1c57384330a6 360 }
AnnaBridge 158:1c57384330a6 361
AnnaBridge 158:1c57384330a6 362 /**
AnnaBridge 158:1c57384330a6 363 * @brief Set division factor for SYNC signal
AnnaBridge 158:1c57384330a6 364 * @rmtoll CFGR SYNCDIV LL_CRS_SetSyncDivider
AnnaBridge 158:1c57384330a6 365 * @param Divider This parameter can be one of the following values:
AnnaBridge 158:1c57384330a6 366 * @arg @ref LL_CRS_SYNC_DIV_1
AnnaBridge 158:1c57384330a6 367 * @arg @ref LL_CRS_SYNC_DIV_2
AnnaBridge 158:1c57384330a6 368 * @arg @ref LL_CRS_SYNC_DIV_4
AnnaBridge 158:1c57384330a6 369 * @arg @ref LL_CRS_SYNC_DIV_8
AnnaBridge 158:1c57384330a6 370 * @arg @ref LL_CRS_SYNC_DIV_16
AnnaBridge 158:1c57384330a6 371 * @arg @ref LL_CRS_SYNC_DIV_32
AnnaBridge 158:1c57384330a6 372 * @arg @ref LL_CRS_SYNC_DIV_64
AnnaBridge 158:1c57384330a6 373 * @arg @ref LL_CRS_SYNC_DIV_128
AnnaBridge 158:1c57384330a6 374 * @retval None
AnnaBridge 158:1c57384330a6 375 */
AnnaBridge 158:1c57384330a6 376 __STATIC_INLINE void LL_CRS_SetSyncDivider(uint32_t Divider)
AnnaBridge 158:1c57384330a6 377 {
AnnaBridge 158:1c57384330a6 378 MODIFY_REG(CRS->CFGR, CRS_CFGR_SYNCDIV, Divider);
AnnaBridge 158:1c57384330a6 379 }
AnnaBridge 158:1c57384330a6 380
AnnaBridge 158:1c57384330a6 381 /**
AnnaBridge 158:1c57384330a6 382 * @brief Get division factor for SYNC signal
AnnaBridge 158:1c57384330a6 383 * @rmtoll CFGR SYNCDIV LL_CRS_GetSyncDivider
AnnaBridge 158:1c57384330a6 384 * @retval Returned value can be one of the following values:
AnnaBridge 158:1c57384330a6 385 * @arg @ref LL_CRS_SYNC_DIV_1
AnnaBridge 158:1c57384330a6 386 * @arg @ref LL_CRS_SYNC_DIV_2
AnnaBridge 158:1c57384330a6 387 * @arg @ref LL_CRS_SYNC_DIV_4
AnnaBridge 158:1c57384330a6 388 * @arg @ref LL_CRS_SYNC_DIV_8
AnnaBridge 158:1c57384330a6 389 * @arg @ref LL_CRS_SYNC_DIV_16
AnnaBridge 158:1c57384330a6 390 * @arg @ref LL_CRS_SYNC_DIV_32
AnnaBridge 158:1c57384330a6 391 * @arg @ref LL_CRS_SYNC_DIV_64
AnnaBridge 158:1c57384330a6 392 * @arg @ref LL_CRS_SYNC_DIV_128
AnnaBridge 158:1c57384330a6 393 */
AnnaBridge 158:1c57384330a6 394 __STATIC_INLINE uint32_t LL_CRS_GetSyncDivider(void)
AnnaBridge 158:1c57384330a6 395 {
AnnaBridge 158:1c57384330a6 396 return (uint32_t)(READ_BIT(CRS->CFGR, CRS_CFGR_SYNCDIV));
AnnaBridge 158:1c57384330a6 397 }
AnnaBridge 158:1c57384330a6 398
AnnaBridge 158:1c57384330a6 399 /**
AnnaBridge 158:1c57384330a6 400 * @brief Set SYNC signal source
AnnaBridge 158:1c57384330a6 401 * @rmtoll CFGR SYNCSRC LL_CRS_SetSyncSignalSource
AnnaBridge 158:1c57384330a6 402 * @param Source This parameter can be one of the following values:
AnnaBridge 158:1c57384330a6 403 * @arg @ref LL_CRS_SYNC_SOURCE_GPIO
AnnaBridge 158:1c57384330a6 404 * @arg @ref LL_CRS_SYNC_SOURCE_LSE
AnnaBridge 158:1c57384330a6 405 * @arg @ref LL_CRS_SYNC_SOURCE_USB
AnnaBridge 158:1c57384330a6 406 * @retval None
AnnaBridge 158:1c57384330a6 407 */
AnnaBridge 158:1c57384330a6 408 __STATIC_INLINE void LL_CRS_SetSyncSignalSource(uint32_t Source)
AnnaBridge 158:1c57384330a6 409 {
AnnaBridge 158:1c57384330a6 410 MODIFY_REG(CRS->CFGR, CRS_CFGR_SYNCSRC, Source);
AnnaBridge 158:1c57384330a6 411 }
AnnaBridge 158:1c57384330a6 412
AnnaBridge 158:1c57384330a6 413 /**
AnnaBridge 158:1c57384330a6 414 * @brief Get SYNC signal source
AnnaBridge 158:1c57384330a6 415 * @rmtoll CFGR SYNCSRC LL_CRS_GetSyncSignalSource
AnnaBridge 158:1c57384330a6 416 * @retval Returned value can be one of the following values:
AnnaBridge 158:1c57384330a6 417 * @arg @ref LL_CRS_SYNC_SOURCE_GPIO
AnnaBridge 158:1c57384330a6 418 * @arg @ref LL_CRS_SYNC_SOURCE_LSE
AnnaBridge 158:1c57384330a6 419 * @arg @ref LL_CRS_SYNC_SOURCE_USB
AnnaBridge 158:1c57384330a6 420 */
AnnaBridge 158:1c57384330a6 421 __STATIC_INLINE uint32_t LL_CRS_GetSyncSignalSource(void)
AnnaBridge 158:1c57384330a6 422 {
AnnaBridge 158:1c57384330a6 423 return (uint32_t)(READ_BIT(CRS->CFGR, CRS_CFGR_SYNCSRC));
AnnaBridge 158:1c57384330a6 424 }
AnnaBridge 158:1c57384330a6 425
AnnaBridge 158:1c57384330a6 426 /**
AnnaBridge 158:1c57384330a6 427 * @brief Set input polarity for the SYNC signal source
AnnaBridge 158:1c57384330a6 428 * @rmtoll CFGR SYNCPOL LL_CRS_SetSyncPolarity
AnnaBridge 158:1c57384330a6 429 * @param Polarity This parameter can be one of the following values:
AnnaBridge 158:1c57384330a6 430 * @arg @ref LL_CRS_SYNC_POLARITY_RISING
AnnaBridge 158:1c57384330a6 431 * @arg @ref LL_CRS_SYNC_POLARITY_FALLING
AnnaBridge 158:1c57384330a6 432 * @retval None
AnnaBridge 158:1c57384330a6 433 */
AnnaBridge 158:1c57384330a6 434 __STATIC_INLINE void LL_CRS_SetSyncPolarity(uint32_t Polarity)
AnnaBridge 158:1c57384330a6 435 {
AnnaBridge 158:1c57384330a6 436 MODIFY_REG(CRS->CFGR, CRS_CFGR_SYNCPOL, Polarity);
AnnaBridge 158:1c57384330a6 437 }
AnnaBridge 158:1c57384330a6 438
AnnaBridge 158:1c57384330a6 439 /**
AnnaBridge 158:1c57384330a6 440 * @brief Get input polarity for the SYNC signal source
AnnaBridge 158:1c57384330a6 441 * @rmtoll CFGR SYNCPOL LL_CRS_GetSyncPolarity
AnnaBridge 158:1c57384330a6 442 * @retval Returned value can be one of the following values:
AnnaBridge 158:1c57384330a6 443 * @arg @ref LL_CRS_SYNC_POLARITY_RISING
AnnaBridge 158:1c57384330a6 444 * @arg @ref LL_CRS_SYNC_POLARITY_FALLING
AnnaBridge 158:1c57384330a6 445 */
AnnaBridge 158:1c57384330a6 446 __STATIC_INLINE uint32_t LL_CRS_GetSyncPolarity(void)
AnnaBridge 158:1c57384330a6 447 {
AnnaBridge 158:1c57384330a6 448 return (uint32_t)(READ_BIT(CRS->CFGR, CRS_CFGR_SYNCPOL));
AnnaBridge 158:1c57384330a6 449 }
AnnaBridge 158:1c57384330a6 450
AnnaBridge 158:1c57384330a6 451 /**
AnnaBridge 158:1c57384330a6 452 * @brief Configure CRS for the synchronization
AnnaBridge 158:1c57384330a6 453 * @rmtoll CR TRIM LL_CRS_ConfigSynchronization\n
AnnaBridge 158:1c57384330a6 454 * CFGR RELOAD LL_CRS_ConfigSynchronization\n
AnnaBridge 158:1c57384330a6 455 * CFGR FELIM LL_CRS_ConfigSynchronization\n
AnnaBridge 158:1c57384330a6 456 * CFGR SYNCDIV LL_CRS_ConfigSynchronization\n
AnnaBridge 158:1c57384330a6 457 * CFGR SYNCSRC LL_CRS_ConfigSynchronization\n
AnnaBridge 158:1c57384330a6 458 * CFGR SYNCPOL LL_CRS_ConfigSynchronization
AnnaBridge 158:1c57384330a6 459 * @param HSI48CalibrationValue a number between Min_Data = 0 and Max_Data = 63
AnnaBridge 158:1c57384330a6 460 * @param ErrorLimitValue a number between Min_Data = 0 and Max_Data = 0xFFFF
AnnaBridge 158:1c57384330a6 461 * @param ReloadValue a number between Min_Data = 0 and Max_Data = 255
AnnaBridge 158:1c57384330a6 462 * @param Settings This parameter can be a combination of the following values:
AnnaBridge 158:1c57384330a6 463 * @arg @ref LL_CRS_SYNC_DIV_1 or @ref LL_CRS_SYNC_DIV_2 or @ref LL_CRS_SYNC_DIV_4 or @ref LL_CRS_SYNC_DIV_8
AnnaBridge 158:1c57384330a6 464 * or @ref LL_CRS_SYNC_DIV_16 or @ref LL_CRS_SYNC_DIV_32 or @ref LL_CRS_SYNC_DIV_64 or @ref LL_CRS_SYNC_DIV_128
AnnaBridge 158:1c57384330a6 465 * @arg @ref LL_CRS_SYNC_SOURCE_GPIO or @ref LL_CRS_SYNC_SOURCE_LSE or @ref LL_CRS_SYNC_SOURCE_USB
AnnaBridge 158:1c57384330a6 466 * @arg @ref LL_CRS_SYNC_POLARITY_RISING or @ref LL_CRS_SYNC_POLARITY_FALLING
AnnaBridge 158:1c57384330a6 467 * @retval None
AnnaBridge 158:1c57384330a6 468 */
AnnaBridge 158:1c57384330a6 469 __STATIC_INLINE void LL_CRS_ConfigSynchronization(uint32_t HSI48CalibrationValue, uint32_t ErrorLimitValue, uint32_t ReloadValue, uint32_t Settings)
AnnaBridge 158:1c57384330a6 470 {
AnnaBridge 158:1c57384330a6 471 MODIFY_REG(CRS->CR, CRS_CR_TRIM, HSI48CalibrationValue);
AnnaBridge 158:1c57384330a6 472 MODIFY_REG(CRS->CFGR,
AnnaBridge 158:1c57384330a6 473 CRS_CFGR_RELOAD | CRS_CFGR_FELIM | CRS_CFGR_SYNCDIV | CRS_CFGR_SYNCSRC | CRS_CFGR_SYNCPOL,
AnnaBridge 158:1c57384330a6 474 ReloadValue | (ErrorLimitValue << CRS_CFGR_FELIM_Pos) | Settings);
AnnaBridge 158:1c57384330a6 475 }
AnnaBridge 158:1c57384330a6 476
AnnaBridge 158:1c57384330a6 477 /**
AnnaBridge 158:1c57384330a6 478 * @}
AnnaBridge 158:1c57384330a6 479 */
AnnaBridge 158:1c57384330a6 480
AnnaBridge 158:1c57384330a6 481 /** @defgroup CRS_LL_EF_CRS_Management CRS_Management
AnnaBridge 158:1c57384330a6 482 * @{
AnnaBridge 158:1c57384330a6 483 */
AnnaBridge 158:1c57384330a6 484
AnnaBridge 158:1c57384330a6 485 /**
AnnaBridge 158:1c57384330a6 486 * @brief Generate software SYNC event
AnnaBridge 158:1c57384330a6 487 * @rmtoll CR SWSYNC LL_CRS_GenerateEvent_SWSYNC
AnnaBridge 158:1c57384330a6 488 * @retval None
AnnaBridge 158:1c57384330a6 489 */
AnnaBridge 158:1c57384330a6 490 __STATIC_INLINE void LL_CRS_GenerateEvent_SWSYNC(void)
AnnaBridge 158:1c57384330a6 491 {
AnnaBridge 158:1c57384330a6 492 SET_BIT(CRS->CR, CRS_CR_SWSYNC);
AnnaBridge 158:1c57384330a6 493 }
AnnaBridge 158:1c57384330a6 494
AnnaBridge 158:1c57384330a6 495 /**
AnnaBridge 158:1c57384330a6 496 * @brief Get the frequency error direction latched in the time of the last
AnnaBridge 158:1c57384330a6 497 * SYNC event
AnnaBridge 158:1c57384330a6 498 * @rmtoll ISR FEDIR LL_CRS_GetFreqErrorDirection
AnnaBridge 158:1c57384330a6 499 * @retval Returned value can be one of the following values:
AnnaBridge 158:1c57384330a6 500 * @arg @ref LL_CRS_FREQ_ERROR_DIR_UP
AnnaBridge 158:1c57384330a6 501 * @arg @ref LL_CRS_FREQ_ERROR_DIR_DOWN
AnnaBridge 158:1c57384330a6 502 */
AnnaBridge 158:1c57384330a6 503 __STATIC_INLINE uint32_t LL_CRS_GetFreqErrorDirection(void)
AnnaBridge 158:1c57384330a6 504 {
AnnaBridge 158:1c57384330a6 505 return (uint32_t)(READ_BIT(CRS->ISR, CRS_ISR_FEDIR));
AnnaBridge 158:1c57384330a6 506 }
AnnaBridge 158:1c57384330a6 507
AnnaBridge 158:1c57384330a6 508 /**
AnnaBridge 158:1c57384330a6 509 * @brief Get the frequency error counter value latched in the time of the last SYNC event
AnnaBridge 158:1c57384330a6 510 * @rmtoll ISR FECAP LL_CRS_GetFreqErrorCapture
AnnaBridge 158:1c57384330a6 511 * @retval A number between Min_Data = 0x0000 and Max_Data = 0xFFFF
AnnaBridge 158:1c57384330a6 512 */
AnnaBridge 158:1c57384330a6 513 __STATIC_INLINE uint32_t LL_CRS_GetFreqErrorCapture(void)
AnnaBridge 158:1c57384330a6 514 {
AnnaBridge 158:1c57384330a6 515 return (uint32_t)(READ_BIT(CRS->ISR, CRS_ISR_FECAP) >> CRS_ISR_FECAP_Pos);
AnnaBridge 158:1c57384330a6 516 }
AnnaBridge 158:1c57384330a6 517
AnnaBridge 158:1c57384330a6 518 /**
AnnaBridge 158:1c57384330a6 519 * @}
AnnaBridge 158:1c57384330a6 520 */
AnnaBridge 158:1c57384330a6 521
AnnaBridge 158:1c57384330a6 522 /** @defgroup CRS_LL_EF_FLAG_Management FLAG_Management
AnnaBridge 158:1c57384330a6 523 * @{
AnnaBridge 158:1c57384330a6 524 */
AnnaBridge 158:1c57384330a6 525
AnnaBridge 158:1c57384330a6 526 /**
AnnaBridge 158:1c57384330a6 527 * @brief Check if SYNC event OK signal occurred or not
AnnaBridge 158:1c57384330a6 528 * @rmtoll ISR SYNCOKF LL_CRS_IsActiveFlag_SYNCOK
AnnaBridge 158:1c57384330a6 529 * @retval State of bit (1 or 0).
AnnaBridge 158:1c57384330a6 530 */
AnnaBridge 158:1c57384330a6 531 __STATIC_INLINE uint32_t LL_CRS_IsActiveFlag_SYNCOK(void)
AnnaBridge 158:1c57384330a6 532 {
AnnaBridge 158:1c57384330a6 533 return (READ_BIT(CRS->ISR, CRS_ISR_SYNCOKF) == (CRS_ISR_SYNCOKF));
AnnaBridge 158:1c57384330a6 534 }
AnnaBridge 158:1c57384330a6 535
AnnaBridge 158:1c57384330a6 536 /**
AnnaBridge 158:1c57384330a6 537 * @brief Check if SYNC warning signal occurred or not
AnnaBridge 158:1c57384330a6 538 * @rmtoll ISR SYNCWARNF LL_CRS_IsActiveFlag_SYNCWARN
AnnaBridge 158:1c57384330a6 539 * @retval State of bit (1 or 0).
AnnaBridge 158:1c57384330a6 540 */
AnnaBridge 158:1c57384330a6 541 __STATIC_INLINE uint32_t LL_CRS_IsActiveFlag_SYNCWARN(void)
AnnaBridge 158:1c57384330a6 542 {
AnnaBridge 158:1c57384330a6 543 return (READ_BIT(CRS->ISR, CRS_ISR_SYNCWARNF) == (CRS_ISR_SYNCWARNF));
AnnaBridge 158:1c57384330a6 544 }
AnnaBridge 158:1c57384330a6 545
AnnaBridge 158:1c57384330a6 546 /**
AnnaBridge 158:1c57384330a6 547 * @brief Check if Synchronization or trimming error signal occurred or not
AnnaBridge 158:1c57384330a6 548 * @rmtoll ISR ERRF LL_CRS_IsActiveFlag_ERR
AnnaBridge 158:1c57384330a6 549 * @retval State of bit (1 or 0).
AnnaBridge 158:1c57384330a6 550 */
AnnaBridge 158:1c57384330a6 551 __STATIC_INLINE uint32_t LL_CRS_IsActiveFlag_ERR(void)
AnnaBridge 158:1c57384330a6 552 {
AnnaBridge 158:1c57384330a6 553 return (READ_BIT(CRS->ISR, CRS_ISR_ERRF) == (CRS_ISR_ERRF));
AnnaBridge 158:1c57384330a6 554 }
AnnaBridge 158:1c57384330a6 555
AnnaBridge 158:1c57384330a6 556 /**
AnnaBridge 158:1c57384330a6 557 * @brief Check if Expected SYNC signal occurred or not
AnnaBridge 158:1c57384330a6 558 * @rmtoll ISR ESYNCF LL_CRS_IsActiveFlag_ESYNC
AnnaBridge 158:1c57384330a6 559 * @retval State of bit (1 or 0).
AnnaBridge 158:1c57384330a6 560 */
AnnaBridge 158:1c57384330a6 561 __STATIC_INLINE uint32_t LL_CRS_IsActiveFlag_ESYNC(void)
AnnaBridge 158:1c57384330a6 562 {
AnnaBridge 158:1c57384330a6 563 return (READ_BIT(CRS->ISR, CRS_ISR_ESYNCF) == (CRS_ISR_ESYNCF));
AnnaBridge 158:1c57384330a6 564 }
AnnaBridge 158:1c57384330a6 565
AnnaBridge 158:1c57384330a6 566 /**
AnnaBridge 158:1c57384330a6 567 * @brief Check if SYNC error signal occurred or not
AnnaBridge 158:1c57384330a6 568 * @rmtoll ISR SYNCERR LL_CRS_IsActiveFlag_SYNCERR
AnnaBridge 158:1c57384330a6 569 * @retval State of bit (1 or 0).
AnnaBridge 158:1c57384330a6 570 */
AnnaBridge 158:1c57384330a6 571 __STATIC_INLINE uint32_t LL_CRS_IsActiveFlag_SYNCERR(void)
AnnaBridge 158:1c57384330a6 572 {
AnnaBridge 158:1c57384330a6 573 return (READ_BIT(CRS->ISR, CRS_ISR_SYNCERR) == (CRS_ISR_SYNCERR));
AnnaBridge 158:1c57384330a6 574 }
AnnaBridge 158:1c57384330a6 575
AnnaBridge 158:1c57384330a6 576 /**
AnnaBridge 158:1c57384330a6 577 * @brief Check if SYNC missed error signal occurred or not
AnnaBridge 158:1c57384330a6 578 * @rmtoll ISR SYNCMISS LL_CRS_IsActiveFlag_SYNCMISS
AnnaBridge 158:1c57384330a6 579 * @retval State of bit (1 or 0).
AnnaBridge 158:1c57384330a6 580 */
AnnaBridge 158:1c57384330a6 581 __STATIC_INLINE uint32_t LL_CRS_IsActiveFlag_SYNCMISS(void)
AnnaBridge 158:1c57384330a6 582 {
AnnaBridge 158:1c57384330a6 583 return (READ_BIT(CRS->ISR, CRS_ISR_SYNCMISS) == (CRS_ISR_SYNCMISS));
AnnaBridge 158:1c57384330a6 584 }
AnnaBridge 158:1c57384330a6 585
AnnaBridge 158:1c57384330a6 586 /**
AnnaBridge 158:1c57384330a6 587 * @brief Check if Trimming overflow or underflow occurred or not
AnnaBridge 158:1c57384330a6 588 * @rmtoll ISR TRIMOVF LL_CRS_IsActiveFlag_TRIMOVF
AnnaBridge 158:1c57384330a6 589 * @retval State of bit (1 or 0).
AnnaBridge 158:1c57384330a6 590 */
AnnaBridge 158:1c57384330a6 591 __STATIC_INLINE uint32_t LL_CRS_IsActiveFlag_TRIMOVF(void)
AnnaBridge 158:1c57384330a6 592 {
AnnaBridge 158:1c57384330a6 593 return (READ_BIT(CRS->ISR, CRS_ISR_TRIMOVF) == (CRS_ISR_TRIMOVF));
AnnaBridge 158:1c57384330a6 594 }
AnnaBridge 158:1c57384330a6 595
AnnaBridge 158:1c57384330a6 596 /**
AnnaBridge 158:1c57384330a6 597 * @brief Clear the SYNC event OK flag
AnnaBridge 158:1c57384330a6 598 * @rmtoll ICR SYNCOKC LL_CRS_ClearFlag_SYNCOK
AnnaBridge 158:1c57384330a6 599 * @retval None
AnnaBridge 158:1c57384330a6 600 */
AnnaBridge 158:1c57384330a6 601 __STATIC_INLINE void LL_CRS_ClearFlag_SYNCOK(void)
AnnaBridge 158:1c57384330a6 602 {
AnnaBridge 158:1c57384330a6 603 WRITE_REG(CRS->ICR, CRS_ICR_SYNCOKC);
AnnaBridge 158:1c57384330a6 604 }
AnnaBridge 158:1c57384330a6 605
AnnaBridge 158:1c57384330a6 606 /**
AnnaBridge 158:1c57384330a6 607 * @brief Clear the SYNC warning flag
AnnaBridge 158:1c57384330a6 608 * @rmtoll ICR SYNCWARNC LL_CRS_ClearFlag_SYNCWARN
AnnaBridge 158:1c57384330a6 609 * @retval None
AnnaBridge 158:1c57384330a6 610 */
AnnaBridge 158:1c57384330a6 611 __STATIC_INLINE void LL_CRS_ClearFlag_SYNCWARN(void)
AnnaBridge 158:1c57384330a6 612 {
AnnaBridge 158:1c57384330a6 613 WRITE_REG(CRS->ICR, CRS_ICR_SYNCWARNC);
AnnaBridge 158:1c57384330a6 614 }
AnnaBridge 158:1c57384330a6 615
AnnaBridge 158:1c57384330a6 616 /**
AnnaBridge 158:1c57384330a6 617 * @brief Clear TRIMOVF, SYNCMISS and SYNCERR bits and consequently also
AnnaBridge 158:1c57384330a6 618 * the ERR flag
AnnaBridge 158:1c57384330a6 619 * @rmtoll ICR ERRC LL_CRS_ClearFlag_ERR
AnnaBridge 158:1c57384330a6 620 * @retval None
AnnaBridge 158:1c57384330a6 621 */
AnnaBridge 158:1c57384330a6 622 __STATIC_INLINE void LL_CRS_ClearFlag_ERR(void)
AnnaBridge 158:1c57384330a6 623 {
AnnaBridge 158:1c57384330a6 624 WRITE_REG(CRS->ICR, CRS_ICR_ERRC);
AnnaBridge 158:1c57384330a6 625 }
AnnaBridge 158:1c57384330a6 626
AnnaBridge 158:1c57384330a6 627 /**
AnnaBridge 158:1c57384330a6 628 * @brief Clear Expected SYNC flag
AnnaBridge 158:1c57384330a6 629 * @rmtoll ICR ESYNCC LL_CRS_ClearFlag_ESYNC
AnnaBridge 158:1c57384330a6 630 * @retval None
AnnaBridge 158:1c57384330a6 631 */
AnnaBridge 158:1c57384330a6 632 __STATIC_INLINE void LL_CRS_ClearFlag_ESYNC(void)
AnnaBridge 158:1c57384330a6 633 {
AnnaBridge 158:1c57384330a6 634 WRITE_REG(CRS->ICR, CRS_ICR_ESYNCC);
AnnaBridge 158:1c57384330a6 635 }
AnnaBridge 158:1c57384330a6 636
AnnaBridge 158:1c57384330a6 637 /**
AnnaBridge 158:1c57384330a6 638 * @}
AnnaBridge 158:1c57384330a6 639 */
AnnaBridge 158:1c57384330a6 640
AnnaBridge 158:1c57384330a6 641 /** @defgroup CRS_LL_EF_IT_Management IT_Management
AnnaBridge 158:1c57384330a6 642 * @{
AnnaBridge 158:1c57384330a6 643 */
AnnaBridge 158:1c57384330a6 644
AnnaBridge 158:1c57384330a6 645 /**
AnnaBridge 158:1c57384330a6 646 * @brief Enable SYNC event OK interrupt
AnnaBridge 158:1c57384330a6 647 * @rmtoll CR SYNCOKIE LL_CRS_EnableIT_SYNCOK
AnnaBridge 158:1c57384330a6 648 * @retval None
AnnaBridge 158:1c57384330a6 649 */
AnnaBridge 158:1c57384330a6 650 __STATIC_INLINE void LL_CRS_EnableIT_SYNCOK(void)
AnnaBridge 158:1c57384330a6 651 {
AnnaBridge 158:1c57384330a6 652 SET_BIT(CRS->CR, CRS_CR_SYNCOKIE);
AnnaBridge 158:1c57384330a6 653 }
AnnaBridge 158:1c57384330a6 654
AnnaBridge 158:1c57384330a6 655 /**
AnnaBridge 158:1c57384330a6 656 * @brief Disable SYNC event OK interrupt
AnnaBridge 158:1c57384330a6 657 * @rmtoll CR SYNCOKIE LL_CRS_DisableIT_SYNCOK
AnnaBridge 158:1c57384330a6 658 * @retval None
AnnaBridge 158:1c57384330a6 659 */
AnnaBridge 158:1c57384330a6 660 __STATIC_INLINE void LL_CRS_DisableIT_SYNCOK(void)
AnnaBridge 158:1c57384330a6 661 {
AnnaBridge 158:1c57384330a6 662 CLEAR_BIT(CRS->CR, CRS_CR_SYNCOKIE);
AnnaBridge 158:1c57384330a6 663 }
AnnaBridge 158:1c57384330a6 664
AnnaBridge 158:1c57384330a6 665 /**
AnnaBridge 158:1c57384330a6 666 * @brief Check if SYNC event OK interrupt is enabled or not
AnnaBridge 158:1c57384330a6 667 * @rmtoll CR SYNCOKIE LL_CRS_IsEnabledIT_SYNCOK
AnnaBridge 158:1c57384330a6 668 * @retval State of bit (1 or 0).
AnnaBridge 158:1c57384330a6 669 */
AnnaBridge 158:1c57384330a6 670 __STATIC_INLINE uint32_t LL_CRS_IsEnabledIT_SYNCOK(void)
AnnaBridge 158:1c57384330a6 671 {
AnnaBridge 158:1c57384330a6 672 return (READ_BIT(CRS->CR, CRS_CR_SYNCOKIE) == (CRS_CR_SYNCOKIE));
AnnaBridge 158:1c57384330a6 673 }
AnnaBridge 158:1c57384330a6 674
AnnaBridge 158:1c57384330a6 675 /**
AnnaBridge 158:1c57384330a6 676 * @brief Enable SYNC warning interrupt
AnnaBridge 158:1c57384330a6 677 * @rmtoll CR SYNCWARNIE LL_CRS_EnableIT_SYNCWARN
AnnaBridge 158:1c57384330a6 678 * @retval None
AnnaBridge 158:1c57384330a6 679 */
AnnaBridge 158:1c57384330a6 680 __STATIC_INLINE void LL_CRS_EnableIT_SYNCWARN(void)
AnnaBridge 158:1c57384330a6 681 {
AnnaBridge 158:1c57384330a6 682 SET_BIT(CRS->CR, CRS_CR_SYNCWARNIE);
AnnaBridge 158:1c57384330a6 683 }
AnnaBridge 158:1c57384330a6 684
AnnaBridge 158:1c57384330a6 685 /**
AnnaBridge 158:1c57384330a6 686 * @brief Disable SYNC warning interrupt
AnnaBridge 158:1c57384330a6 687 * @rmtoll CR SYNCWARNIE LL_CRS_DisableIT_SYNCWARN
AnnaBridge 158:1c57384330a6 688 * @retval None
AnnaBridge 158:1c57384330a6 689 */
AnnaBridge 158:1c57384330a6 690 __STATIC_INLINE void LL_CRS_DisableIT_SYNCWARN(void)
AnnaBridge 158:1c57384330a6 691 {
AnnaBridge 158:1c57384330a6 692 CLEAR_BIT(CRS->CR, CRS_CR_SYNCWARNIE);
AnnaBridge 158:1c57384330a6 693 }
AnnaBridge 158:1c57384330a6 694
AnnaBridge 158:1c57384330a6 695 /**
AnnaBridge 158:1c57384330a6 696 * @brief Check if SYNC warning interrupt is enabled or not
AnnaBridge 158:1c57384330a6 697 * @rmtoll CR SYNCWARNIE LL_CRS_IsEnabledIT_SYNCWARN
AnnaBridge 158:1c57384330a6 698 * @retval State of bit (1 or 0).
AnnaBridge 158:1c57384330a6 699 */
AnnaBridge 158:1c57384330a6 700 __STATIC_INLINE uint32_t LL_CRS_IsEnabledIT_SYNCWARN(void)
AnnaBridge 158:1c57384330a6 701 {
AnnaBridge 158:1c57384330a6 702 return (READ_BIT(CRS->CR, CRS_CR_SYNCWARNIE) == (CRS_CR_SYNCWARNIE));
AnnaBridge 158:1c57384330a6 703 }
AnnaBridge 158:1c57384330a6 704
AnnaBridge 158:1c57384330a6 705 /**
AnnaBridge 158:1c57384330a6 706 * @brief Enable Synchronization or trimming error interrupt
AnnaBridge 158:1c57384330a6 707 * @rmtoll CR ERRIE LL_CRS_EnableIT_ERR
AnnaBridge 158:1c57384330a6 708 * @retval None
AnnaBridge 158:1c57384330a6 709 */
AnnaBridge 158:1c57384330a6 710 __STATIC_INLINE void LL_CRS_EnableIT_ERR(void)
AnnaBridge 158:1c57384330a6 711 {
AnnaBridge 158:1c57384330a6 712 SET_BIT(CRS->CR, CRS_CR_ERRIE);
AnnaBridge 158:1c57384330a6 713 }
AnnaBridge 158:1c57384330a6 714
AnnaBridge 158:1c57384330a6 715 /**
AnnaBridge 158:1c57384330a6 716 * @brief Disable Synchronization or trimming error interrupt
AnnaBridge 158:1c57384330a6 717 * @rmtoll CR ERRIE LL_CRS_DisableIT_ERR
AnnaBridge 158:1c57384330a6 718 * @retval None
AnnaBridge 158:1c57384330a6 719 */
AnnaBridge 158:1c57384330a6 720 __STATIC_INLINE void LL_CRS_DisableIT_ERR(void)
AnnaBridge 158:1c57384330a6 721 {
AnnaBridge 158:1c57384330a6 722 CLEAR_BIT(CRS->CR, CRS_CR_ERRIE);
AnnaBridge 158:1c57384330a6 723 }
AnnaBridge 158:1c57384330a6 724
AnnaBridge 158:1c57384330a6 725 /**
AnnaBridge 158:1c57384330a6 726 * @brief Check if Synchronization or trimming error interrupt is enabled or not
AnnaBridge 158:1c57384330a6 727 * @rmtoll CR ERRIE LL_CRS_IsEnabledIT_ERR
AnnaBridge 158:1c57384330a6 728 * @retval State of bit (1 or 0).
AnnaBridge 158:1c57384330a6 729 */
AnnaBridge 158:1c57384330a6 730 __STATIC_INLINE uint32_t LL_CRS_IsEnabledIT_ERR(void)
AnnaBridge 158:1c57384330a6 731 {
AnnaBridge 158:1c57384330a6 732 return (READ_BIT(CRS->CR, CRS_CR_ERRIE) == (CRS_CR_ERRIE));
AnnaBridge 158:1c57384330a6 733 }
AnnaBridge 158:1c57384330a6 734
AnnaBridge 158:1c57384330a6 735 /**
AnnaBridge 158:1c57384330a6 736 * @brief Enable Expected SYNC interrupt
AnnaBridge 158:1c57384330a6 737 * @rmtoll CR ESYNCIE LL_CRS_EnableIT_ESYNC
AnnaBridge 158:1c57384330a6 738 * @retval None
AnnaBridge 158:1c57384330a6 739 */
AnnaBridge 158:1c57384330a6 740 __STATIC_INLINE void LL_CRS_EnableIT_ESYNC(void)
AnnaBridge 158:1c57384330a6 741 {
AnnaBridge 158:1c57384330a6 742 SET_BIT(CRS->CR, CRS_CR_ESYNCIE);
AnnaBridge 158:1c57384330a6 743 }
AnnaBridge 158:1c57384330a6 744
AnnaBridge 158:1c57384330a6 745 /**
AnnaBridge 158:1c57384330a6 746 * @brief Disable Expected SYNC interrupt
AnnaBridge 158:1c57384330a6 747 * @rmtoll CR ESYNCIE LL_CRS_DisableIT_ESYNC
AnnaBridge 158:1c57384330a6 748 * @retval None
AnnaBridge 158:1c57384330a6 749 */
AnnaBridge 158:1c57384330a6 750 __STATIC_INLINE void LL_CRS_DisableIT_ESYNC(void)
AnnaBridge 158:1c57384330a6 751 {
AnnaBridge 158:1c57384330a6 752 CLEAR_BIT(CRS->CR, CRS_CR_ESYNCIE);
AnnaBridge 158:1c57384330a6 753 }
AnnaBridge 158:1c57384330a6 754
AnnaBridge 158:1c57384330a6 755 /**
AnnaBridge 158:1c57384330a6 756 * @brief Check if Expected SYNC interrupt is enabled or not
AnnaBridge 158:1c57384330a6 757 * @rmtoll CR ESYNCIE LL_CRS_IsEnabledIT_ESYNC
AnnaBridge 158:1c57384330a6 758 * @retval State of bit (1 or 0).
AnnaBridge 158:1c57384330a6 759 */
AnnaBridge 158:1c57384330a6 760 __STATIC_INLINE uint32_t LL_CRS_IsEnabledIT_ESYNC(void)
AnnaBridge 158:1c57384330a6 761 {
AnnaBridge 158:1c57384330a6 762 return (READ_BIT(CRS->CR, CRS_CR_ESYNCIE) == (CRS_CR_ESYNCIE));
AnnaBridge 158:1c57384330a6 763 }
AnnaBridge 158:1c57384330a6 764
AnnaBridge 158:1c57384330a6 765 /**
AnnaBridge 158:1c57384330a6 766 * @}
AnnaBridge 158:1c57384330a6 767 */
AnnaBridge 158:1c57384330a6 768
AnnaBridge 158:1c57384330a6 769 #if defined(USE_FULL_LL_DRIVER)
AnnaBridge 158:1c57384330a6 770 /** @defgroup CRS_LL_EF_Init Initialization and de-initialization functions
AnnaBridge 158:1c57384330a6 771 * @{
AnnaBridge 158:1c57384330a6 772 */
AnnaBridge 158:1c57384330a6 773
AnnaBridge 158:1c57384330a6 774 ErrorStatus LL_CRS_DeInit(void);
AnnaBridge 158:1c57384330a6 775
AnnaBridge 158:1c57384330a6 776 /**
AnnaBridge 158:1c57384330a6 777 * @}
AnnaBridge 158:1c57384330a6 778 */
AnnaBridge 158:1c57384330a6 779 #endif /* USE_FULL_LL_DRIVER */
AnnaBridge 158:1c57384330a6 780
AnnaBridge 158:1c57384330a6 781 /**
AnnaBridge 158:1c57384330a6 782 * @}
AnnaBridge 158:1c57384330a6 783 */
AnnaBridge 158:1c57384330a6 784
AnnaBridge 158:1c57384330a6 785 /**
AnnaBridge 158:1c57384330a6 786 * @}
AnnaBridge 158:1c57384330a6 787 */
AnnaBridge 158:1c57384330a6 788
AnnaBridge 158:1c57384330a6 789 #endif /* defined(CRS) */
AnnaBridge 158:1c57384330a6 790
AnnaBridge 158:1c57384330a6 791 /**
AnnaBridge 158:1c57384330a6 792 * @}
AnnaBridge 158:1c57384330a6 793 */
AnnaBridge 158:1c57384330a6 794
AnnaBridge 158:1c57384330a6 795 #ifdef __cplusplus
AnnaBridge 158:1c57384330a6 796 }
AnnaBridge 158:1c57384330a6 797 #endif
AnnaBridge 158:1c57384330a6 798
AnnaBridge 158:1c57384330a6 799 #endif /* __STM32L4xx_LL_CRS_H */
AnnaBridge 158:1c57384330a6 800
AnnaBridge 158:1c57384330a6 801 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/