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TARGET_NUCLEO_F303ZE/TARGET_STM/TARGET_STM32F3/device/stm32f3xx_ll_utils.h@138:093f2bd7b9eb, 2017-03-14 (annotated)
- Committer:
- <>
- Date:
- Tue Mar 14 16:20:51 2017 +0000
- Revision:
- 138:093f2bd7b9eb
- Parent:
- 135:176b8275d35d
- Child:
- 168:b9e159c1930a
Release 138 of the mbed library
Ports for Upcoming Targets
Fixes and Changes
3716: fix for issue #3715: correction in startup files for ARM and IAR, alignment of system_stm32f429xx.c files https://github.com/ARMmbed/mbed-os/pull/3716
3741: STM32 remove warning in hal_tick_32b.c file https://github.com/ARMmbed/mbed-os/pull/3741
3780: STM32L4 : Fix GPIO G port compatibility https://github.com/ARMmbed/mbed-os/pull/3780
3831: NCS36510: SPISLAVE enabled (Conflict resolved) https://github.com/ARMmbed/mbed-os/pull/3831
3836: Allow to redefine nRF's PSTORAGE_NUM_OF_PAGES outside of the mbed-os https://github.com/ARMmbed/mbed-os/pull/3836
3840: STM32: gpio SPEED - always set High Speed by default https://github.com/ARMmbed/mbed-os/pull/3840
3844: STM32 GPIO: Typo correction. Update comment (GPIO_IP_WITHOUT_BRR) https://github.com/ARMmbed/mbed-os/pull/3844
3850: STM32: change spi error to debug warning https://github.com/ARMmbed/mbed-os/pull/3850
3860: Define GPIO_IP_WITHOUT_BRR for xDot platform https://github.com/ARMmbed/mbed-os/pull/3860
3880: DISCO_F469NI: allow the use of CAN2 instance when CAN1 is not activated https://github.com/ARMmbed/mbed-os/pull/3880
3795: Fix pwm period calc https://github.com/ARMmbed/mbed-os/pull/3795
3828: STM32 CAN API: correct format and type https://github.com/ARMmbed/mbed-os/pull/3828
3842: TARGET_NRF: corrected spi_init() to properly handle re-initialization https://github.com/ARMmbed/mbed-os/pull/3842
3843: STM32L476xG: set APB2 clock to 80MHz (instead of 40MHz) https://github.com/ARMmbed/mbed-os/pull/3843
3879: NUCLEO_F446ZE: Add missing AnalogIn pins on PF_3, PF_5 and PF_10. https://github.com/ARMmbed/mbed-os/pull/3879
3902: Fix heap and stack size for NUCLEO_F746ZG https://github.com/ARMmbed/mbed-os/pull/3902
3829: can_write(): return error code when no tx mailboxes are available https://github.com/ARMmbed/mbed-os/pull/3829
Who changed what in which revision?
| User | Revision | Line number | New contents of line |
|---|---|---|---|
| <> | 135:176b8275d35d | 1 | /** |
| <> | 135:176b8275d35d | 2 | ****************************************************************************** |
| <> | 135:176b8275d35d | 3 | * @file stm32f3xx_ll_utils.h |
| <> | 135:176b8275d35d | 4 | * @author MCD Application Team |
| <> | 135:176b8275d35d | 5 | * @version V1.4.0 |
| <> | 135:176b8275d35d | 6 | * @date 16-December-2016 |
| <> | 135:176b8275d35d | 7 | * @brief Header file of UTILS LL module. |
| <> | 135:176b8275d35d | 8 | @verbatim |
| <> | 135:176b8275d35d | 9 | ============================================================================== |
| <> | 135:176b8275d35d | 10 | ##### How to use this driver ##### |
| <> | 135:176b8275d35d | 11 | ============================================================================== |
| <> | 135:176b8275d35d | 12 | [..] |
| <> | 135:176b8275d35d | 13 | The LL UTILS driver contains a set of generic APIs that can be |
| <> | 135:176b8275d35d | 14 | used by user: |
| <> | 135:176b8275d35d | 15 | (+) Device electronic signature |
| <> | 135:176b8275d35d | 16 | (+) Timing functions |
| <> | 135:176b8275d35d | 17 | (+) PLL configuration functions |
| <> | 135:176b8275d35d | 18 | |
| <> | 135:176b8275d35d | 19 | @endverbatim |
| <> | 135:176b8275d35d | 20 | ****************************************************************************** |
| <> | 135:176b8275d35d | 21 | * @attention |
| <> | 135:176b8275d35d | 22 | * |
| <> | 135:176b8275d35d | 23 | * <h2><center>© COPYRIGHT(c) 2016 STMicroelectronics</center></h2> |
| <> | 135:176b8275d35d | 24 | * |
| <> | 135:176b8275d35d | 25 | * Redistribution and use in source and binary forms, with or without modification, |
| <> | 135:176b8275d35d | 26 | * are permitted provided that the following conditions are met: |
| <> | 135:176b8275d35d | 27 | * 1. Redistributions of source code must retain the above copyright notice, |
| <> | 135:176b8275d35d | 28 | * this list of conditions and the following disclaimer. |
| <> | 135:176b8275d35d | 29 | * 2. Redistributions in binary form must reproduce the above copyright notice, |
| <> | 135:176b8275d35d | 30 | * this list of conditions and the following disclaimer in the documentation |
| <> | 135:176b8275d35d | 31 | * and/or other materials provided with the distribution. |
| <> | 135:176b8275d35d | 32 | * 3. Neither the name of STMicroelectronics nor the names of its contributors |
| <> | 135:176b8275d35d | 33 | * may be used to endorse or promote products derived from this software |
| <> | 135:176b8275d35d | 34 | * without specific prior written permission. |
| <> | 135:176b8275d35d | 35 | * |
| <> | 135:176b8275d35d | 36 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
| <> | 135:176b8275d35d | 37 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
| <> | 135:176b8275d35d | 38 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
| <> | 135:176b8275d35d | 39 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
| <> | 135:176b8275d35d | 40 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
| <> | 135:176b8275d35d | 41 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
| <> | 135:176b8275d35d | 42 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
| <> | 135:176b8275d35d | 43 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
| <> | 135:176b8275d35d | 44 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
| <> | 135:176b8275d35d | 45 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
| <> | 135:176b8275d35d | 46 | * |
| <> | 135:176b8275d35d | 47 | ****************************************************************************** |
| <> | 135:176b8275d35d | 48 | */ |
| <> | 135:176b8275d35d | 49 | |
| <> | 135:176b8275d35d | 50 | /* Define to prevent recursive inclusion -------------------------------------*/ |
| <> | 135:176b8275d35d | 51 | #ifndef __STM32F3xx_LL_UTILS_H |
| <> | 135:176b8275d35d | 52 | #define __STM32F3xx_LL_UTILS_H |
| <> | 135:176b8275d35d | 53 | |
| <> | 135:176b8275d35d | 54 | #ifdef __cplusplus |
| <> | 135:176b8275d35d | 55 | extern "C" { |
| <> | 135:176b8275d35d | 56 | #endif |
| <> | 135:176b8275d35d | 57 | |
| <> | 135:176b8275d35d | 58 | /* Includes ------------------------------------------------------------------*/ |
| <> | 135:176b8275d35d | 59 | #include "stm32f3xx.h" |
| <> | 135:176b8275d35d | 60 | |
| <> | 135:176b8275d35d | 61 | /** @addtogroup STM32F3xx_LL_Driver |
| <> | 135:176b8275d35d | 62 | * @{ |
| <> | 135:176b8275d35d | 63 | */ |
| <> | 135:176b8275d35d | 64 | |
| <> | 135:176b8275d35d | 65 | /** @defgroup UTILS_LL UTILS |
| <> | 135:176b8275d35d | 66 | * @{ |
| <> | 135:176b8275d35d | 67 | */ |
| <> | 135:176b8275d35d | 68 | |
| <> | 135:176b8275d35d | 69 | /* Private types -------------------------------------------------------------*/ |
| <> | 135:176b8275d35d | 70 | /* Private variables ---------------------------------------------------------*/ |
| <> | 135:176b8275d35d | 71 | |
| <> | 135:176b8275d35d | 72 | /* Private constants ---------------------------------------------------------*/ |
| <> | 135:176b8275d35d | 73 | /** @defgroup UTILS_LL_Private_Constants UTILS Private Constants |
| <> | 135:176b8275d35d | 74 | * @{ |
| <> | 135:176b8275d35d | 75 | */ |
| <> | 135:176b8275d35d | 76 | |
| <> | 135:176b8275d35d | 77 | /* Max delay can be used in LL_mDelay */ |
| <> | 135:176b8275d35d | 78 | #define LL_MAX_DELAY 0xFFFFFFFFU |
| <> | 135:176b8275d35d | 79 | |
| <> | 135:176b8275d35d | 80 | /** |
| <> | 135:176b8275d35d | 81 | * @brief Unique device ID register base address |
| <> | 135:176b8275d35d | 82 | */ |
| <> | 135:176b8275d35d | 83 | #define UID_BASE_ADDRESS UID_BASE |
| <> | 135:176b8275d35d | 84 | |
| <> | 135:176b8275d35d | 85 | /** |
| <> | 135:176b8275d35d | 86 | * @brief Flash size data register base address |
| <> | 135:176b8275d35d | 87 | */ |
| <> | 135:176b8275d35d | 88 | #define FLASHSIZE_BASE_ADDRESS FLASHSIZE_BASE |
| <> | 135:176b8275d35d | 89 | |
| <> | 135:176b8275d35d | 90 | /** |
| <> | 135:176b8275d35d | 91 | * @brief Package data register base address |
| <> | 135:176b8275d35d | 92 | */ |
| <> | 135:176b8275d35d | 93 | #define PACKAGE_BASE_ADDRESS PACKAGE_BASE |
| <> | 135:176b8275d35d | 94 | |
| <> | 135:176b8275d35d | 95 | /** |
| <> | 135:176b8275d35d | 96 | * @} |
| <> | 135:176b8275d35d | 97 | */ |
| <> | 135:176b8275d35d | 98 | |
| <> | 135:176b8275d35d | 99 | /* Private macros ------------------------------------------------------------*/ |
| <> | 135:176b8275d35d | 100 | /** @defgroup UTILS_LL_Private_Macros UTILS Private Macros |
| <> | 135:176b8275d35d | 101 | * @{ |
| <> | 135:176b8275d35d | 102 | */ |
| <> | 135:176b8275d35d | 103 | /** |
| <> | 135:176b8275d35d | 104 | * @} |
| <> | 135:176b8275d35d | 105 | */ |
| <> | 135:176b8275d35d | 106 | /* Exported types ------------------------------------------------------------*/ |
| <> | 135:176b8275d35d | 107 | /** @defgroup UTILS_LL_ES_INIT UTILS Exported structures |
| <> | 135:176b8275d35d | 108 | * @{ |
| <> | 135:176b8275d35d | 109 | */ |
| <> | 135:176b8275d35d | 110 | /** |
| <> | 135:176b8275d35d | 111 | * @brief UTILS PLL structure definition |
| <> | 135:176b8275d35d | 112 | */ |
| <> | 135:176b8275d35d | 113 | typedef struct |
| <> | 135:176b8275d35d | 114 | { |
| <> | 135:176b8275d35d | 115 | uint32_t PLLMul; /*!< Multiplication factor for PLL VCO input clock. |
| <> | 135:176b8275d35d | 116 | This parameter can be a value of @ref RCC_LL_EC_PLL_MUL |
| <> | 135:176b8275d35d | 117 | |
| <> | 135:176b8275d35d | 118 | This feature can be modified afterwards using unitary function |
| <> | 135:176b8275d35d | 119 | @ref LL_RCC_PLL_ConfigDomain_SYS(). */ |
| <> | 135:176b8275d35d | 120 | |
| <> | 135:176b8275d35d | 121 | #if defined(RCC_PLLSRC_PREDIV1_SUPPORT) |
| <> | 135:176b8275d35d | 122 | uint32_t PLLDiv; /*!< Division factor for PLL VCO output clock. |
| <> | 135:176b8275d35d | 123 | This parameter can be a value of @ref RCC_LL_EC_PREDIV_DIV |
| <> | 135:176b8275d35d | 124 | |
| <> | 135:176b8275d35d | 125 | This feature can be modified afterwards using unitary function |
| <> | 135:176b8275d35d | 126 | @ref LL_RCC_PLL_ConfigDomain_SYS(). */ |
| <> | 135:176b8275d35d | 127 | #else |
| <> | 135:176b8275d35d | 128 | uint32_t Prediv; /*!< Division factor for HSE used as PLL clock source. |
| <> | 135:176b8275d35d | 129 | This parameter can be a value of @ref RCC_LL_EC_PREDIV_DIV |
| <> | 135:176b8275d35d | 130 | |
| <> | 135:176b8275d35d | 131 | This feature can be modified afterwards using unitary function |
| <> | 135:176b8275d35d | 132 | @ref LL_RCC_PLL_ConfigDomain_SYS(). */ |
| <> | 135:176b8275d35d | 133 | #endif /* RCC_PLLSRC_PREDIV1_SUPPORT */ |
| <> | 135:176b8275d35d | 134 | } LL_UTILS_PLLInitTypeDef; |
| <> | 135:176b8275d35d | 135 | |
| <> | 135:176b8275d35d | 136 | /** |
| <> | 135:176b8275d35d | 137 | * @brief UTILS System, AHB and APB buses clock configuration structure definition |
| <> | 135:176b8275d35d | 138 | */ |
| <> | 135:176b8275d35d | 139 | typedef struct |
| <> | 135:176b8275d35d | 140 | { |
| <> | 135:176b8275d35d | 141 | uint32_t AHBCLKDivider; /*!< The AHB clock (HCLK) divider. This clock is derived from the system clock (SYSCLK). |
| <> | 135:176b8275d35d | 142 | This parameter can be a value of @ref RCC_LL_EC_SYSCLK_DIV |
| <> | 135:176b8275d35d | 143 | |
| <> | 135:176b8275d35d | 144 | This feature can be modified afterwards using unitary function |
| <> | 135:176b8275d35d | 145 | @ref LL_RCC_SetAHBPrescaler(). */ |
| <> | 135:176b8275d35d | 146 | |
| <> | 135:176b8275d35d | 147 | uint32_t APB1CLKDivider; /*!< The APB1 clock (PCLK1) divider. This clock is derived from the AHB clock (HCLK). |
| <> | 135:176b8275d35d | 148 | This parameter can be a value of @ref RCC_LL_EC_APB1_DIV |
| <> | 135:176b8275d35d | 149 | |
| <> | 135:176b8275d35d | 150 | This feature can be modified afterwards using unitary function |
| <> | 135:176b8275d35d | 151 | @ref LL_RCC_SetAPB1Prescaler(). */ |
| <> | 135:176b8275d35d | 152 | |
| <> | 135:176b8275d35d | 153 | uint32_t APB2CLKDivider; /*!< The APB2 clock (PCLK2) divider. This clock is derived from the AHB clock (HCLK). |
| <> | 135:176b8275d35d | 154 | This parameter can be a value of @ref RCC_LL_EC_APB2_DIV |
| <> | 135:176b8275d35d | 155 | |
| <> | 135:176b8275d35d | 156 | This feature can be modified afterwards using unitary function |
| <> | 135:176b8275d35d | 157 | @ref LL_RCC_SetAPB2Prescaler(). */ |
| <> | 135:176b8275d35d | 158 | |
| <> | 135:176b8275d35d | 159 | } LL_UTILS_ClkInitTypeDef; |
| <> | 135:176b8275d35d | 160 | |
| <> | 135:176b8275d35d | 161 | /** |
| <> | 135:176b8275d35d | 162 | * @} |
| <> | 135:176b8275d35d | 163 | */ |
| <> | 135:176b8275d35d | 164 | |
| <> | 135:176b8275d35d | 165 | /* Exported constants --------------------------------------------------------*/ |
| <> | 135:176b8275d35d | 166 | /** @defgroup UTILS_LL_Exported_Constants UTILS Exported Constants |
| <> | 135:176b8275d35d | 167 | * @{ |
| <> | 135:176b8275d35d | 168 | */ |
| <> | 135:176b8275d35d | 169 | |
| <> | 135:176b8275d35d | 170 | /** @defgroup UTILS_EC_HSE_BYPASS HSE Bypass activation |
| <> | 135:176b8275d35d | 171 | * @{ |
| <> | 135:176b8275d35d | 172 | */ |
| <> | 135:176b8275d35d | 173 | #define LL_UTILS_HSEBYPASS_OFF 0x00000000U /*!< HSE Bypass is not enabled */ |
| <> | 135:176b8275d35d | 174 | #define LL_UTILS_HSEBYPASS_ON 0x00000001U /*!< HSE Bypass is enabled */ |
| <> | 135:176b8275d35d | 175 | /** |
| <> | 135:176b8275d35d | 176 | * @} |
| <> | 135:176b8275d35d | 177 | */ |
| <> | 135:176b8275d35d | 178 | |
| <> | 135:176b8275d35d | 179 | |
| <> | 135:176b8275d35d | 180 | /** |
| <> | 135:176b8275d35d | 181 | * @} |
| <> | 135:176b8275d35d | 182 | */ |
| <> | 135:176b8275d35d | 183 | |
| <> | 135:176b8275d35d | 184 | /* Exported macro ------------------------------------------------------------*/ |
| <> | 135:176b8275d35d | 185 | |
| <> | 135:176b8275d35d | 186 | /* Exported functions --------------------------------------------------------*/ |
| <> | 135:176b8275d35d | 187 | /** @defgroup UTILS_LL_Exported_Functions UTILS Exported Functions |
| <> | 135:176b8275d35d | 188 | * @{ |
| <> | 135:176b8275d35d | 189 | */ |
| <> | 135:176b8275d35d | 190 | |
| <> | 135:176b8275d35d | 191 | /** @defgroup UTILS_EF_DEVICE_ELECTRONIC_SIGNATURE DEVICE ELECTRONIC SIGNATURE |
| <> | 135:176b8275d35d | 192 | * @{ |
| <> | 135:176b8275d35d | 193 | */ |
| <> | 135:176b8275d35d | 194 | |
| <> | 135:176b8275d35d | 195 | /** |
| <> | 135:176b8275d35d | 196 | * @brief Get Word0 of the unique device identifier (UID based on 96 bits) |
| <> | 135:176b8275d35d | 197 | * @retval UID[31:0]: X and Y coordinates on the wafer expressed in BCD format |
| <> | 135:176b8275d35d | 198 | */ |
| <> | 135:176b8275d35d | 199 | __STATIC_INLINE uint32_t LL_GetUID_Word0(void) |
| <> | 135:176b8275d35d | 200 | { |
| <> | 135:176b8275d35d | 201 | return (uint32_t)(READ_REG(*((uint32_t *)UID_BASE_ADDRESS))); |
| <> | 135:176b8275d35d | 202 | } |
| <> | 135:176b8275d35d | 203 | |
| <> | 135:176b8275d35d | 204 | /** |
| <> | 135:176b8275d35d | 205 | * @brief Get Word1 of the unique device identifier (UID based on 96 bits) |
| <> | 135:176b8275d35d | 206 | * @retval UID[63:32]: Wafer number (UID[39:32]) & LOT_NUM[23:0] (UID[63:40]) |
| <> | 135:176b8275d35d | 207 | */ |
| <> | 135:176b8275d35d | 208 | __STATIC_INLINE uint32_t LL_GetUID_Word1(void) |
| <> | 135:176b8275d35d | 209 | { |
| <> | 135:176b8275d35d | 210 | return (uint32_t)(READ_REG(*((uint32_t *)(UID_BASE_ADDRESS + 4U)))); |
| <> | 135:176b8275d35d | 211 | } |
| <> | 135:176b8275d35d | 212 | |
| <> | 135:176b8275d35d | 213 | /** |
| <> | 135:176b8275d35d | 214 | * @brief Get Word2 of the unique device identifier (UID based on 96 bits) |
| <> | 135:176b8275d35d | 215 | * @retval UID[95:64]: Lot number (ASCII encoded) - LOT_NUM[55:24] |
| <> | 135:176b8275d35d | 216 | */ |
| <> | 135:176b8275d35d | 217 | __STATIC_INLINE uint32_t LL_GetUID_Word2(void) |
| <> | 135:176b8275d35d | 218 | { |
| <> | 135:176b8275d35d | 219 | return (uint32_t)(READ_REG(*((uint32_t *)(UID_BASE_ADDRESS + 8U)))); |
| <> | 135:176b8275d35d | 220 | } |
| <> | 135:176b8275d35d | 221 | |
| <> | 135:176b8275d35d | 222 | /** |
| <> | 135:176b8275d35d | 223 | * @brief Get Flash memory size |
| <> | 135:176b8275d35d | 224 | * @note This bitfield indicates the size of the device Flash memory expressed in |
| <> | 135:176b8275d35d | 225 | * Kbytes. As an example, 0x040 corresponds to 64 Kbytes. |
| <> | 135:176b8275d35d | 226 | * @retval FLASH_SIZE[15:0]: Flash memory size |
| <> | 135:176b8275d35d | 227 | */ |
| <> | 135:176b8275d35d | 228 | __STATIC_INLINE uint32_t LL_GetFlashSize(void) |
| <> | 135:176b8275d35d | 229 | { |
| <> | 135:176b8275d35d | 230 | return (uint16_t)(READ_REG(*((uint32_t *)FLASHSIZE_BASE_ADDRESS))); |
| <> | 135:176b8275d35d | 231 | } |
| <> | 135:176b8275d35d | 232 | |
| <> | 135:176b8275d35d | 233 | |
| <> | 135:176b8275d35d | 234 | /** |
| <> | 135:176b8275d35d | 235 | * @} |
| <> | 135:176b8275d35d | 236 | */ |
| <> | 135:176b8275d35d | 237 | |
| <> | 135:176b8275d35d | 238 | /** @defgroup UTILS_LL_EF_DELAY DELAY |
| <> | 135:176b8275d35d | 239 | * @{ |
| <> | 135:176b8275d35d | 240 | */ |
| <> | 135:176b8275d35d | 241 | |
| <> | 135:176b8275d35d | 242 | /** |
| <> | 135:176b8275d35d | 243 | * @brief This function configures the Cortex-M SysTick source of the time base. |
| <> | 135:176b8275d35d | 244 | * @param HCLKFrequency HCLK frequency in Hz (can be calculated thanks to RCC helper macro) |
| <> | 135:176b8275d35d | 245 | * @note When a RTOS is used, it is recommended to avoid changing the SysTick |
| <> | 135:176b8275d35d | 246 | * configuration by calling this function, for a delay use rather osDelay RTOS service. |
| <> | 135:176b8275d35d | 247 | * @param Ticks Number of ticks |
| <> | 135:176b8275d35d | 248 | * @retval None |
| <> | 135:176b8275d35d | 249 | */ |
| <> | 135:176b8275d35d | 250 | __STATIC_INLINE void LL_InitTick(uint32_t HCLKFrequency, uint32_t Ticks) |
| <> | 135:176b8275d35d | 251 | { |
| <> | 135:176b8275d35d | 252 | /* Configure the SysTick to have interrupt in 1ms time base */ |
| <> | 135:176b8275d35d | 253 | SysTick->LOAD = (uint32_t)((HCLKFrequency / Ticks) - 1UL); /* set reload register */ |
| <> | 135:176b8275d35d | 254 | SysTick->VAL = 0UL; /* Load the SysTick Counter Value */ |
| <> | 135:176b8275d35d | 255 | SysTick->CTRL = SysTick_CTRL_CLKSOURCE_Msk | |
| <> | 135:176b8275d35d | 256 | SysTick_CTRL_ENABLE_Msk; /* Enable the Systick Timer */ |
| <> | 135:176b8275d35d | 257 | } |
| <> | 135:176b8275d35d | 258 | |
| <> | 135:176b8275d35d | 259 | void LL_Init1msTick(uint32_t HCLKFrequency); |
| <> | 135:176b8275d35d | 260 | void LL_mDelay(uint32_t Delay); |
| <> | 135:176b8275d35d | 261 | |
| <> | 135:176b8275d35d | 262 | /** |
| <> | 135:176b8275d35d | 263 | * @} |
| <> | 135:176b8275d35d | 264 | */ |
| <> | 135:176b8275d35d | 265 | |
| <> | 135:176b8275d35d | 266 | /** @defgroup UTILS_EF_SYSTEM SYSTEM |
| <> | 135:176b8275d35d | 267 | * @{ |
| <> | 135:176b8275d35d | 268 | */ |
| <> | 135:176b8275d35d | 269 | |
| <> | 135:176b8275d35d | 270 | void LL_SetSystemCoreClock(uint32_t HCLKFrequency); |
| <> | 135:176b8275d35d | 271 | ErrorStatus LL_PLL_ConfigSystemClock_HSI(LL_UTILS_PLLInitTypeDef *UTILS_PLLInitStruct, |
| <> | 135:176b8275d35d | 272 | LL_UTILS_ClkInitTypeDef *UTILS_ClkInitStruct); |
| <> | 135:176b8275d35d | 273 | ErrorStatus LL_PLL_ConfigSystemClock_HSE(uint32_t HSEFrequency, uint32_t HSEBypass, |
| <> | 135:176b8275d35d | 274 | LL_UTILS_PLLInitTypeDef *UTILS_PLLInitStruct, LL_UTILS_ClkInitTypeDef *UTILS_ClkInitStruct); |
| <> | 135:176b8275d35d | 275 | |
| <> | 135:176b8275d35d | 276 | /** |
| <> | 135:176b8275d35d | 277 | * @} |
| <> | 135:176b8275d35d | 278 | */ |
| <> | 135:176b8275d35d | 279 | |
| <> | 135:176b8275d35d | 280 | /** |
| <> | 135:176b8275d35d | 281 | * @} |
| <> | 135:176b8275d35d | 282 | */ |
| <> | 135:176b8275d35d | 283 | |
| <> | 135:176b8275d35d | 284 | /** |
| <> | 135:176b8275d35d | 285 | * @} |
| <> | 135:176b8275d35d | 286 | */ |
| <> | 135:176b8275d35d | 287 | |
| <> | 135:176b8275d35d | 288 | /** |
| <> | 135:176b8275d35d | 289 | * @} |
| <> | 135:176b8275d35d | 290 | */ |
| <> | 135:176b8275d35d | 291 | |
| <> | 135:176b8275d35d | 292 | #ifdef __cplusplus |
| <> | 135:176b8275d35d | 293 | } |
| <> | 135:176b8275d35d | 294 | #endif |
| <> | 135:176b8275d35d | 295 | |
| <> | 135:176b8275d35d | 296 | #endif /* __STM32F3xx_LL_UTILS_H */ |
| <> | 135:176b8275d35d | 297 | |
| <> | 135:176b8275d35d | 298 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |
