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TARGET_NUCLEO_L053R8/TARGET_STM/TARGET_STM32L0/device/stm32l0xx_ll_pwr.h@136:ef9c61f8c49f, 2017-02-14 (annotated)

Committer:
Kojto
Date:
Tue Feb 14 11:24:20 2017 +0000
Revision:
136:ef9c61f8c49f
Child:
167:84c0a372a020
Release 136 of the mbed library



Ports for Upcoming Targets





Fixes and Changes



3432: Target STM USBHOST support https://github.com/ARMmbed/mbed-os/pull/3432

3181: NUCLEO_F207ZG extending PeripheralPins.c: all available alternate functions can be used now https://github.com/ARMmbed/mbed-os/pull/3181

3626: NUCLEO_F412ZG : Add USB Device +Host https://github.com/ARMmbed/mbed-os/pull/3626

3628: Fix warnings https://github.com/ARMmbed/mbed-os/pull/3628

3629: STM32: L0 LL layer https://github.com/ARMmbed/mbed-os/pull/3629

3632: IDE Export support for platform VK_RZ_A1H https://github.com/ARMmbed/mbed-os/pull/3632

3642: Missing IRQ pin fix for platform VK_RZ_A1H https://github.com/ARMmbed/mbed-os/pull/3642

3664: Fix ncs36510 sleep definitions https://github.com/ARMmbed/mbed-os/pull/3664

3655: [STM32F4] Modify folder structure https://github.com/ARMmbed/mbed-os/pull/3655

3657: [STM32L4] Modify folder structure https://github.com/ARMmbed/mbed-os/pull/3657

3658: [STM32F3] Modify folder structure https://github.com/ARMmbed/mbed-os/pull/3658

3685: STM32: I2C: reset state machine https://github.com/ARMmbed/mbed-os/pull/3685

3692: uVisor: Standardize available legacy heap and stack https://github.com/ARMmbed/mbed-os/pull/3692

3621: Fix for #2884, LPC824: export to LPCXpresso, target running with wron https://github.com/ARMmbed/mbed-os/pull/3621

3649: [STM32F7] Modify folder structure  https://github.com/ARMmbed/mbed-os/pull/3649

3695: Enforce device_name is valid in targets.json https://github.com/ARMmbed/mbed-os/pull/3695

3723: NCS36510: spi_format function bug fix https://github.com/ARMmbed/mbed-os/pull/3723

Who changed what in which revision?

UserRevisionLine numberNew contents of line
Kojto 136:ef9c61f8c49f 1 /**
Kojto 136:ef9c61f8c49f 2 ******************************************************************************
Kojto 136:ef9c61f8c49f 3 * @file stm32l0xx_ll_pwr.h
Kojto 136:ef9c61f8c49f 4 * @author MCD Application Team
Kojto 136:ef9c61f8c49f 5 * @version V1.7.0
Kojto 136:ef9c61f8c49f 6 * @date 31-May-2016
Kojto 136:ef9c61f8c49f 7 * @brief Header file of PWR LL module.
Kojto 136:ef9c61f8c49f 8 ******************************************************************************
Kojto 136:ef9c61f8c49f 9 * @attention
Kojto 136:ef9c61f8c49f 10 *
Kojto 136:ef9c61f8c49f 11 * <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
Kojto 136:ef9c61f8c49f 12 *
Kojto 136:ef9c61f8c49f 13 * Redistribution and use in source and binary forms, with or without modification,
Kojto 136:ef9c61f8c49f 14 * are permitted provided that the following conditions are met:
Kojto 136:ef9c61f8c49f 15 * 1. Redistributions of source code must retain the above copyright notice,
Kojto 136:ef9c61f8c49f 16 * this list of conditions and the following disclaimer.
Kojto 136:ef9c61f8c49f 17 * 2. Redistributions in binary form must reproduce the above copyright notice,
Kojto 136:ef9c61f8c49f 18 * this list of conditions and the following disclaimer in the documentation
Kojto 136:ef9c61f8c49f 19 * and/or other materials provided with the distribution.
Kojto 136:ef9c61f8c49f 20 * 3. Neither the name of STMicroelectronics nor the names of its contributors
Kojto 136:ef9c61f8c49f 21 * may be used to endorse or promote products derived from this software
Kojto 136:ef9c61f8c49f 22 * without specific prior written permission.
Kojto 136:ef9c61f8c49f 23 *
Kojto 136:ef9c61f8c49f 24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
Kojto 136:ef9c61f8c49f 25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
Kojto 136:ef9c61f8c49f 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
Kojto 136:ef9c61f8c49f 27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
Kojto 136:ef9c61f8c49f 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
Kojto 136:ef9c61f8c49f 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
Kojto 136:ef9c61f8c49f 30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
Kojto 136:ef9c61f8c49f 31 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
Kojto 136:ef9c61f8c49f 32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
Kojto 136:ef9c61f8c49f 33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
Kojto 136:ef9c61f8c49f 34 *
Kojto 136:ef9c61f8c49f 35 ******************************************************************************
Kojto 136:ef9c61f8c49f 36 */
Kojto 136:ef9c61f8c49f 37
Kojto 136:ef9c61f8c49f 38 /* Define to prevent recursive inclusion -------------------------------------*/
Kojto 136:ef9c61f8c49f 39 #ifndef __STM32L0xx_LL_PWR_H
Kojto 136:ef9c61f8c49f 40 #define __STM32L0xx_LL_PWR_H
Kojto 136:ef9c61f8c49f 41
Kojto 136:ef9c61f8c49f 42 #ifdef __cplusplus
Kojto 136:ef9c61f8c49f 43 extern "C" {
Kojto 136:ef9c61f8c49f 44 #endif
Kojto 136:ef9c61f8c49f 45
Kojto 136:ef9c61f8c49f 46 /* Includes ------------------------------------------------------------------*/
Kojto 136:ef9c61f8c49f 47 #include "stm32l0xx.h"
Kojto 136:ef9c61f8c49f 48
Kojto 136:ef9c61f8c49f 49 /** @addtogroup STM32L0xx_LL_Driver
Kojto 136:ef9c61f8c49f 50 * @{
Kojto 136:ef9c61f8c49f 51 */
Kojto 136:ef9c61f8c49f 52
Kojto 136:ef9c61f8c49f 53 #if defined(PWR)
Kojto 136:ef9c61f8c49f 54
Kojto 136:ef9c61f8c49f 55 /** @defgroup PWR_LL PWR
Kojto 136:ef9c61f8c49f 56 * @{
Kojto 136:ef9c61f8c49f 57 */
Kojto 136:ef9c61f8c49f 58
Kojto 136:ef9c61f8c49f 59 /* Private types -------------------------------------------------------------*/
Kojto 136:ef9c61f8c49f 60 /* Private variables ---------------------------------------------------------*/
Kojto 136:ef9c61f8c49f 61
Kojto 136:ef9c61f8c49f 62 /* Private constants ---------------------------------------------------------*/
Kojto 136:ef9c61f8c49f 63
Kojto 136:ef9c61f8c49f 64 /* Private macros ------------------------------------------------------------*/
Kojto 136:ef9c61f8c49f 65
Kojto 136:ef9c61f8c49f 66 /* Exported types ------------------------------------------------------------*/
Kojto 136:ef9c61f8c49f 67 /* Exported constants --------------------------------------------------------*/
Kojto 136:ef9c61f8c49f 68 /** @defgroup PWR_LL_Exported_Constants PWR Exported Constants
Kojto 136:ef9c61f8c49f 69 * @{
Kojto 136:ef9c61f8c49f 70 */
Kojto 136:ef9c61f8c49f 71
Kojto 136:ef9c61f8c49f 72 /** @defgroup PWR_LL_EC_CLEAR_FLAG Clear Flags Defines
Kojto 136:ef9c61f8c49f 73 * @brief Flags defines which can be used with LL_PWR_WriteReg function
Kojto 136:ef9c61f8c49f 74 * @{
Kojto 136:ef9c61f8c49f 75 */
Kojto 136:ef9c61f8c49f 76 #define LL_PWR_CR_CSBF PWR_CR_CSBF /*!< Clear standby flag */
Kojto 136:ef9c61f8c49f 77 #define LL_PWR_CR_CWUF PWR_CR_CWUF /*!< Clear wakeup flag */
Kojto 136:ef9c61f8c49f 78 /**
Kojto 136:ef9c61f8c49f 79 * @}
Kojto 136:ef9c61f8c49f 80 */
Kojto 136:ef9c61f8c49f 81
Kojto 136:ef9c61f8c49f 82 /** @defgroup PWR_LL_EC_GET_FLAG Get Flags Defines
Kojto 136:ef9c61f8c49f 83 * @brief Flags defines which can be used with LL_PWR_ReadReg function
Kojto 136:ef9c61f8c49f 84 * @{
Kojto 136:ef9c61f8c49f 85 */
Kojto 136:ef9c61f8c49f 86 #define LL_PWR_CSR_WUF PWR_CSR_WUF /*!< Wakeup flag */
Kojto 136:ef9c61f8c49f 87 #define LL_PWR_CSR_SBF PWR_CSR_SBF /*!< Standby flag */
Kojto 136:ef9c61f8c49f 88 #if defined (PWR_PVD_SUPPORT)
Kojto 136:ef9c61f8c49f 89 #define LL_PWR_CSR_PVDO PWR_CSR_PVDO /*!< Power voltage detector output flag */
Kojto 136:ef9c61f8c49f 90 #endif
Kojto 136:ef9c61f8c49f 91 #if defined (PWR_CSR_VREFINTRDYF)
Kojto 136:ef9c61f8c49f 92 #define LL_PWR_CSR_VREFINTRDYF PWR_CSR_VREFINTRDYF /*!< VREFINT ready flag */
Kojto 136:ef9c61f8c49f 93 #endif
Kojto 136:ef9c61f8c49f 94 #define LL_PWR_CSR_VOSF PWR_CSR_VOSF /*!< Voltage scaling select flag */
Kojto 136:ef9c61f8c49f 95 #define LL_PWR_CSR_REGLPF PWR_CSR_REGLPF /*!< Regulator low power flag */
Kojto 136:ef9c61f8c49f 96 #define LL_PWR_CSR_EWUP1 PWR_CSR_EWUP1 /*!< Enable WKUP pin 1 */
Kojto 136:ef9c61f8c49f 97 #define LL_PWR_CSR_EWUP2 PWR_CSR_EWUP2 /*!< Enable WKUP pin 2 */
Kojto 136:ef9c61f8c49f 98 #if defined (PWR_CSR_EWUP3)
Kojto 136:ef9c61f8c49f 99 #define LL_PWR_CSR_EWUP3 PWR_CSR_EWUP3 /*!< Enable WKUP pin 3 */
Kojto 136:ef9c61f8c49f 100 #endif /* PWR_CSR_EWUP3 */
Kojto 136:ef9c61f8c49f 101 /**
Kojto 136:ef9c61f8c49f 102 * @}
Kojto 136:ef9c61f8c49f 103 */
Kojto 136:ef9c61f8c49f 104
Kojto 136:ef9c61f8c49f 105 /** @defgroup PWR_LL_EC_REGU_VOLTAGE Regulator Voltage
Kojto 136:ef9c61f8c49f 106 * @{
Kojto 136:ef9c61f8c49f 107 */
Kojto 136:ef9c61f8c49f 108 #define LL_PWR_REGU_VOLTAGE_SCALE1 (PWR_CR_VOS_0) /*!< 1.8V (range 1) */
Kojto 136:ef9c61f8c49f 109 #define LL_PWR_REGU_VOLTAGE_SCALE2 (PWR_CR_VOS_1) /*!< 1.5V (range 2) */
Kojto 136:ef9c61f8c49f 110 #define LL_PWR_REGU_VOLTAGE_SCALE3 (PWR_CR_VOS_0 | PWR_CR_VOS_1) /*!< 1.2V (range 3) */
Kojto 136:ef9c61f8c49f 111 /**
Kojto 136:ef9c61f8c49f 112 * @}
Kojto 136:ef9c61f8c49f 113 */
Kojto 136:ef9c61f8c49f 114
Kojto 136:ef9c61f8c49f 115 /** @defgroup PWR_LL_EC_MODE_PWR Mode Power
Kojto 136:ef9c61f8c49f 116 * @{
Kojto 136:ef9c61f8c49f 117 */
Kojto 136:ef9c61f8c49f 118 #define LL_PWR_MODE_STOP ((uint32_t)0x00000000U) /*!< Enter Stop mode when the CPU enters deepsleep */
Kojto 136:ef9c61f8c49f 119 #define LL_PWR_MODE_STANDBY (PWR_CR_PDDS) /*!< Enter Standby mode when the CPU enters deepsleep */
Kojto 136:ef9c61f8c49f 120 /**
Kojto 136:ef9c61f8c49f 121 * @}
Kojto 136:ef9c61f8c49f 122 */
Kojto 136:ef9c61f8c49f 123
Kojto 136:ef9c61f8c49f 124 /** @defgroup PWR_LL_EC_REGU_MODE_LP_MODES Regulator Mode In Low Power Modes
Kojto 136:ef9c61f8c49f 125 * @{
Kojto 136:ef9c61f8c49f 126 */
Kojto 136:ef9c61f8c49f 127 #define LL_PWR_REGU_LPMODES_MAIN ((uint32_t)0x00000000U) /*!< Voltage regulator in main mode during deepsleep/sleep/low-power run mode */
Kojto 136:ef9c61f8c49f 128 #define LL_PWR_REGU_LPMODES_LOW_POWER (PWR_CR_LPSDSR) /*!< Voltage regulator in low-power mode during deepsleep/sleep/low-power run mode */
Kojto 136:ef9c61f8c49f 129 /**
Kojto 136:ef9c61f8c49f 130 * @}
Kojto 136:ef9c61f8c49f 131 */
Kojto 136:ef9c61f8c49f 132
Kojto 136:ef9c61f8c49f 133 #if defined(PWR_CR_LPDS)
Kojto 136:ef9c61f8c49f 134 /** @defgroup PWR_LL_EC_REGU_MODE_DS_MODE Regulator Mode In Deep Sleep Mode
Kojto 136:ef9c61f8c49f 135 * @{
Kojto 136:ef9c61f8c49f 136 */
Kojto 136:ef9c61f8c49f 137 #define LL_PWR_REGU_DSMODE_MAIN ((uint32_t)0x00000000U) /*!< Voltage regulator in main mode during deepsleep mode when PWR_CR_LPSDSR = 0 */
Kojto 136:ef9c61f8c49f 138 #define LL_PWR_REGU_DSMODE_LOW_POWER (PWR_CR_LPDS) /*!< Voltage regulator in low-power mode during deepsleep mode when PWR_CR_LPSDSR = 0 */
Kojto 136:ef9c61f8c49f 139 /**
Kojto 136:ef9c61f8c49f 140 * @}
Kojto 136:ef9c61f8c49f 141 */
Kojto 136:ef9c61f8c49f 142 #endif /* PWR_CR_LPDS */
Kojto 136:ef9c61f8c49f 143
Kojto 136:ef9c61f8c49f 144 #if defined (PWR_PVD_SUPPORT)
Kojto 136:ef9c61f8c49f 145 /** @defgroup PWR_LL_EC_PVDLEVEL Power Voltage Detector Level
Kojto 136:ef9c61f8c49f 146 * @{
Kojto 136:ef9c61f8c49f 147 */
Kojto 136:ef9c61f8c49f 148 #define LL_PWR_PVDLEVEL_0 (PWR_CR_PLS_LEV0) /*!< Voltage threshold detected by PVD 1.9 V */
Kojto 136:ef9c61f8c49f 149 #define LL_PWR_PVDLEVEL_1 (PWR_CR_PLS_LEV1) /*!< Voltage threshold detected by PVD 2.1 V */
Kojto 136:ef9c61f8c49f 150 #define LL_PWR_PVDLEVEL_2 (PWR_CR_PLS_LEV2) /*!< Voltage threshold detected by PVD 2.3 V */
Kojto 136:ef9c61f8c49f 151 #define LL_PWR_PVDLEVEL_3 (PWR_CR_PLS_LEV3) /*!< Voltage threshold detected by PVD 2.5 V */
Kojto 136:ef9c61f8c49f 152 #define LL_PWR_PVDLEVEL_4 (PWR_CR_PLS_LEV4) /*!< Voltage threshold detected by PVD 2.7 V */
Kojto 136:ef9c61f8c49f 153 #define LL_PWR_PVDLEVEL_5 (PWR_CR_PLS_LEV5) /*!< Voltage threshold detected by PVD 2.9 V */
Kojto 136:ef9c61f8c49f 154 #define LL_PWR_PVDLEVEL_6 (PWR_CR_PLS_LEV6) /*!< Voltage threshold detected by PVD 3.1 V */
Kojto 136:ef9c61f8c49f 155 #define LL_PWR_PVDLEVEL_7 (PWR_CR_PLS_LEV7) /*!< External input analog voltage (Compare internally to VREFINT) */
Kojto 136:ef9c61f8c49f 156 /**
Kojto 136:ef9c61f8c49f 157 * @}
Kojto 136:ef9c61f8c49f 158 */
Kojto 136:ef9c61f8c49f 159 #endif
Kojto 136:ef9c61f8c49f 160
Kojto 136:ef9c61f8c49f 161 /** @defgroup PWR_LL_EC_WAKEUP_PIN Wakeup Pins
Kojto 136:ef9c61f8c49f 162 * @{
Kojto 136:ef9c61f8c49f 163 */
Kojto 136:ef9c61f8c49f 164 #define LL_PWR_WAKEUP_PIN1 (PWR_CSR_EWUP1) /*!< WKUP pin 1 : PA0 */
Kojto 136:ef9c61f8c49f 165 #define LL_PWR_WAKEUP_PIN2 (PWR_CSR_EWUP2) /*!< WKUP pin 2 : PC13 */
Kojto 136:ef9c61f8c49f 166 #if defined (PWR_CSR_EWUP3)
Kojto 136:ef9c61f8c49f 167 #define LL_PWR_WAKEUP_PIN3 (PWR_CSR_EWUP3) /*!< WKUP pin 3 : PE6 or PA2 according to device */
Kojto 136:ef9c61f8c49f 168 #endif /* PWR_CSR_EWUP3 */
Kojto 136:ef9c61f8c49f 169 /**
Kojto 136:ef9c61f8c49f 170 * @}
Kojto 136:ef9c61f8c49f 171 */
Kojto 136:ef9c61f8c49f 172
Kojto 136:ef9c61f8c49f 173 /**
Kojto 136:ef9c61f8c49f 174 * @}
Kojto 136:ef9c61f8c49f 175 */
Kojto 136:ef9c61f8c49f 176
Kojto 136:ef9c61f8c49f 177
Kojto 136:ef9c61f8c49f 178 /* Exported macro ------------------------------------------------------------*/
Kojto 136:ef9c61f8c49f 179 /** @defgroup PWR_LL_Exported_Macros PWR Exported Macros
Kojto 136:ef9c61f8c49f 180 * @{
Kojto 136:ef9c61f8c49f 181 */
Kojto 136:ef9c61f8c49f 182
Kojto 136:ef9c61f8c49f 183 /** @defgroup PWR_LL_EM_WRITE_READ Common write and read registers Macros
Kojto 136:ef9c61f8c49f 184 * @{
Kojto 136:ef9c61f8c49f 185 */
Kojto 136:ef9c61f8c49f 186
Kojto 136:ef9c61f8c49f 187 /**
Kojto 136:ef9c61f8c49f 188 * @brief Write a value in PWR register
Kojto 136:ef9c61f8c49f 189 * @param __REG__ Register to be written
Kojto 136:ef9c61f8c49f 190 * @param __VALUE__ Value to be written in the register
Kojto 136:ef9c61f8c49f 191 * @retval None
Kojto 136:ef9c61f8c49f 192 */
Kojto 136:ef9c61f8c49f 193 #define LL_PWR_WriteReg(__REG__, __VALUE__) WRITE_REG(PWR->__REG__, (__VALUE__))
Kojto 136:ef9c61f8c49f 194
Kojto 136:ef9c61f8c49f 195 /**
Kojto 136:ef9c61f8c49f 196 * @brief Read a value in PWR register
Kojto 136:ef9c61f8c49f 197 * @param __REG__ Register to be read
Kojto 136:ef9c61f8c49f 198 * @retval Register value
Kojto 136:ef9c61f8c49f 199 */
Kojto 136:ef9c61f8c49f 200 #define LL_PWR_ReadReg(__REG__) READ_REG(PWR->__REG__)
Kojto 136:ef9c61f8c49f 201 /**
Kojto 136:ef9c61f8c49f 202 * @}
Kojto 136:ef9c61f8c49f 203 */
Kojto 136:ef9c61f8c49f 204
Kojto 136:ef9c61f8c49f 205 /**
Kojto 136:ef9c61f8c49f 206 * @}
Kojto 136:ef9c61f8c49f 207 */
Kojto 136:ef9c61f8c49f 208
Kojto 136:ef9c61f8c49f 209
Kojto 136:ef9c61f8c49f 210 /* Exported functions --------------------------------------------------------*/
Kojto 136:ef9c61f8c49f 211 /** @defgroup PWR_LL_Exported_Functions PWR Exported Functions
Kojto 136:ef9c61f8c49f 212 * @{
Kojto 136:ef9c61f8c49f 213 */
Kojto 136:ef9c61f8c49f 214
Kojto 136:ef9c61f8c49f 215 /** @defgroup PWR_LL_EF_Configuration Configuration
Kojto 136:ef9c61f8c49f 216 * @{
Kojto 136:ef9c61f8c49f 217 */
Kojto 136:ef9c61f8c49f 218
Kojto 136:ef9c61f8c49f 219 /**
Kojto 136:ef9c61f8c49f 220 * @brief Switch the regulator from main mode to low-power mode
Kojto 136:ef9c61f8c49f 221 * @rmtoll CR LPRUN LL_PWR_EnableLowPowerRunMode
Kojto 136:ef9c61f8c49f 222 * @note Remind to set the regulator to low power before enabling
Kojto 136:ef9c61f8c49f 223 * LowPower run mode (bit @ref LL_PWR_REGU_LPMODES_LOW_POWER).
Kojto 136:ef9c61f8c49f 224 * @retval None
Kojto 136:ef9c61f8c49f 225 */
Kojto 136:ef9c61f8c49f 226 __STATIC_INLINE void LL_PWR_EnableLowPowerRunMode(void)
Kojto 136:ef9c61f8c49f 227 {
Kojto 136:ef9c61f8c49f 228 SET_BIT(PWR->CR, PWR_CR_LPRUN);
Kojto 136:ef9c61f8c49f 229 }
Kojto 136:ef9c61f8c49f 230
Kojto 136:ef9c61f8c49f 231 /**
Kojto 136:ef9c61f8c49f 232 * @brief Switch the regulator from low-power mode to main mode
Kojto 136:ef9c61f8c49f 233 * @rmtoll CR LPRUN LL_PWR_DisableLowPowerRunMode
Kojto 136:ef9c61f8c49f 234 * @retval None
Kojto 136:ef9c61f8c49f 235 */
Kojto 136:ef9c61f8c49f 236 __STATIC_INLINE void LL_PWR_DisableLowPowerRunMode(void)
Kojto 136:ef9c61f8c49f 237 {
Kojto 136:ef9c61f8c49f 238 CLEAR_BIT(PWR->CR, PWR_CR_LPRUN);
Kojto 136:ef9c61f8c49f 239 }
Kojto 136:ef9c61f8c49f 240
Kojto 136:ef9c61f8c49f 241 /**
Kojto 136:ef9c61f8c49f 242 * @brief Check if the regulator is in low-power mode
Kojto 136:ef9c61f8c49f 243 * @rmtoll CR LPRUN LL_PWR_IsEnabledLowPowerRunMode
Kojto 136:ef9c61f8c49f 244 * @retval State of bit (1 or 0).
Kojto 136:ef9c61f8c49f 245 */
Kojto 136:ef9c61f8c49f 246 __STATIC_INLINE uint32_t LL_PWR_IsEnabledLowPowerRunMode(void)
Kojto 136:ef9c61f8c49f 247 {
Kojto 136:ef9c61f8c49f 248 return (READ_BIT(PWR->CR, PWR_CR_LPRUN) == (PWR_CR_LPRUN));
Kojto 136:ef9c61f8c49f 249 }
Kojto 136:ef9c61f8c49f 250
Kojto 136:ef9c61f8c49f 251 /**
Kojto 136:ef9c61f8c49f 252 * @brief Set voltage regulator to low-power and switch from
Kojto 136:ef9c61f8c49f 253 * run main mode to run low-power mode.
Kojto 136:ef9c61f8c49f 254 * @rmtoll CR LPSDSR LL_PWR_EnterLowPowerRunMode\n
Kojto 136:ef9c61f8c49f 255 * CR LPRUN LL_PWR_EnterLowPowerRunMode
Kojto 136:ef9c61f8c49f 256 * @note This "high level" function is introduced to provide functional
Kojto 136:ef9c61f8c49f 257 * compatibility with other families. Notice that the two registers
Kojto 136:ef9c61f8c49f 258 * have to be written sequentially, so this function is not atomic.
Kojto 136:ef9c61f8c49f 259 * To assure atomicity you can call separately the following functions:
Kojto 136:ef9c61f8c49f 260 * - @ref LL_PWR_SetRegulModeLP(@ref LL_PWR_REGU_LPMODES_LOW_POWER);
Kojto 136:ef9c61f8c49f 261 * - @ref LL_PWR_EnableLowPowerRunMode();
Kojto 136:ef9c61f8c49f 262 * @retval None
Kojto 136:ef9c61f8c49f 263 */
Kojto 136:ef9c61f8c49f 264 __STATIC_INLINE void LL_PWR_EnterLowPowerRunMode(void)
Kojto 136:ef9c61f8c49f 265 {
Kojto 136:ef9c61f8c49f 266 SET_BIT(PWR->CR, PWR_CR_LPSDSR); /* => LL_PWR_SetRegulModeLP(LL_PWR_REGU_LPMODES_LOW_POWER) */
Kojto 136:ef9c61f8c49f 267 SET_BIT(PWR->CR, PWR_CR_LPRUN); /* => LL_PWR_EnableLowPowerRunMode() */
Kojto 136:ef9c61f8c49f 268 }
Kojto 136:ef9c61f8c49f 269
Kojto 136:ef9c61f8c49f 270 /**
Kojto 136:ef9c61f8c49f 271 * @brief Set voltage regulator to main and switch from
Kojto 136:ef9c61f8c49f 272 * run main mode to low-power mode.
Kojto 136:ef9c61f8c49f 273 * @rmtoll CR LPSDSR LL_PWR_ExitLowPowerRunMode\n
Kojto 136:ef9c61f8c49f 274 * CR LPRUN LL_PWR_ExitLowPowerRunMode
Kojto 136:ef9c61f8c49f 275 * @note This "high level" function is introduced to provide functional
Kojto 136:ef9c61f8c49f 276 * compatibility with other families. Notice that the two registers
Kojto 136:ef9c61f8c49f 277 * have to be written sequentially, so this function is not atomic.
Kojto 136:ef9c61f8c49f 278 * To assure atomicity you can call separately the following functions:
Kojto 136:ef9c61f8c49f 279 * - @ref LL_PWR_DisableLowPowerRunMode();
Kojto 136:ef9c61f8c49f 280 * - @ref LL_PWR_SetRegulModeLP(@ref LL_PWR_REGU_LPMODES_MAIN);
Kojto 136:ef9c61f8c49f 281 * @retval None
Kojto 136:ef9c61f8c49f 282 */
Kojto 136:ef9c61f8c49f 283 __STATIC_INLINE void LL_PWR_ExitLowPowerRunMode(void)
Kojto 136:ef9c61f8c49f 284 {
Kojto 136:ef9c61f8c49f 285 CLEAR_BIT(PWR->CR, PWR_CR_LPRUN); /* => LL_PWR_DisableLowPowerRunMode() */
Kojto 136:ef9c61f8c49f 286 CLEAR_BIT(PWR->CR, PWR_CR_LPSDSR); /* => LL_PWR_SetRegulModeLP(LL_PWR_REGU_LPMODES_MAIN) */
Kojto 136:ef9c61f8c49f 287 }
Kojto 136:ef9c61f8c49f 288
Kojto 136:ef9c61f8c49f 289 /**
Kojto 136:ef9c61f8c49f 290 * @brief Set the main internal regulator output voltage
Kojto 136:ef9c61f8c49f 291 * @rmtoll CR VOS LL_PWR_SetRegulVoltageScaling
Kojto 136:ef9c61f8c49f 292 * @param VoltageScaling This parameter can be one of the following values:
Kojto 136:ef9c61f8c49f 293 * @arg @ref LL_PWR_REGU_VOLTAGE_SCALE1
Kojto 136:ef9c61f8c49f 294 * @arg @ref LL_PWR_REGU_VOLTAGE_SCALE2
Kojto 136:ef9c61f8c49f 295 * @arg @ref LL_PWR_REGU_VOLTAGE_SCALE3
Kojto 136:ef9c61f8c49f 296 * @retval None
Kojto 136:ef9c61f8c49f 297 */
Kojto 136:ef9c61f8c49f 298 __STATIC_INLINE void LL_PWR_SetRegulVoltageScaling(uint32_t VoltageScaling)
Kojto 136:ef9c61f8c49f 299 {
Kojto 136:ef9c61f8c49f 300 MODIFY_REG(PWR->CR, PWR_CR_VOS, VoltageScaling);
Kojto 136:ef9c61f8c49f 301 }
Kojto 136:ef9c61f8c49f 302
Kojto 136:ef9c61f8c49f 303 /**
Kojto 136:ef9c61f8c49f 304 * @brief Get the main internal regulator output voltage
Kojto 136:ef9c61f8c49f 305 * @rmtoll CR VOS LL_PWR_GetRegulVoltageScaling
Kojto 136:ef9c61f8c49f 306 * @retval Returned value can be one of the following values:
Kojto 136:ef9c61f8c49f 307 * @arg @ref LL_PWR_REGU_VOLTAGE_SCALE1
Kojto 136:ef9c61f8c49f 308 * @arg @ref LL_PWR_REGU_VOLTAGE_SCALE2
Kojto 136:ef9c61f8c49f 309 * @arg @ref LL_PWR_REGU_VOLTAGE_SCALE3
Kojto 136:ef9c61f8c49f 310 */
Kojto 136:ef9c61f8c49f 311 __STATIC_INLINE uint32_t LL_PWR_GetRegulVoltageScaling(void)
Kojto 136:ef9c61f8c49f 312 {
Kojto 136:ef9c61f8c49f 313 return (uint32_t)(READ_BIT(PWR->CR, PWR_CR_VOS));
Kojto 136:ef9c61f8c49f 314 }
Kojto 136:ef9c61f8c49f 315
Kojto 136:ef9c61f8c49f 316 /**
Kojto 136:ef9c61f8c49f 317 * @brief Enable access to the backup domain
Kojto 136:ef9c61f8c49f 318 * @rmtoll CR DBP LL_PWR_EnableBkUpAccess
Kojto 136:ef9c61f8c49f 319 * @retval None
Kojto 136:ef9c61f8c49f 320 */
Kojto 136:ef9c61f8c49f 321 __STATIC_INLINE void LL_PWR_EnableBkUpAccess(void)
Kojto 136:ef9c61f8c49f 322 {
Kojto 136:ef9c61f8c49f 323 SET_BIT(PWR->CR, PWR_CR_DBP);
Kojto 136:ef9c61f8c49f 324 }
Kojto 136:ef9c61f8c49f 325
Kojto 136:ef9c61f8c49f 326 /**
Kojto 136:ef9c61f8c49f 327 * @brief Disable access to the backup domain
Kojto 136:ef9c61f8c49f 328 * @rmtoll CR DBP LL_PWR_DisableBkUpAccess
Kojto 136:ef9c61f8c49f 329 * @retval None
Kojto 136:ef9c61f8c49f 330 */
Kojto 136:ef9c61f8c49f 331 __STATIC_INLINE void LL_PWR_DisableBkUpAccess(void)
Kojto 136:ef9c61f8c49f 332 {
Kojto 136:ef9c61f8c49f 333 CLEAR_BIT(PWR->CR, PWR_CR_DBP);
Kojto 136:ef9c61f8c49f 334 }
Kojto 136:ef9c61f8c49f 335
Kojto 136:ef9c61f8c49f 336 /**
Kojto 136:ef9c61f8c49f 337 * @brief Check if the backup domain is enabled
Kojto 136:ef9c61f8c49f 338 * @rmtoll CR DBP LL_PWR_IsEnabledBkUpAccess
Kojto 136:ef9c61f8c49f 339 * @retval State of bit (1 or 0).
Kojto 136:ef9c61f8c49f 340 */
Kojto 136:ef9c61f8c49f 341 __STATIC_INLINE uint32_t LL_PWR_IsEnabledBkUpAccess(void)
Kojto 136:ef9c61f8c49f 342 {
Kojto 136:ef9c61f8c49f 343 return (READ_BIT(PWR->CR, PWR_CR_DBP) == (PWR_CR_DBP));
Kojto 136:ef9c61f8c49f 344 }
Kojto 136:ef9c61f8c49f 345
Kojto 136:ef9c61f8c49f 346 /**
Kojto 136:ef9c61f8c49f 347 * @brief Set voltage regulator mode during low power modes
Kojto 136:ef9c61f8c49f 348 * @rmtoll CR LPSDSR LL_PWR_SetRegulModeLP
Kojto 136:ef9c61f8c49f 349 * @param RegulMode This parameter can be one of the following values:
Kojto 136:ef9c61f8c49f 350 * @arg @ref LL_PWR_REGU_LPMODES_MAIN
Kojto 136:ef9c61f8c49f 351 * @arg @ref LL_PWR_REGU_LPMODES_LOW_POWER
Kojto 136:ef9c61f8c49f 352 * @retval None
Kojto 136:ef9c61f8c49f 353 */
Kojto 136:ef9c61f8c49f 354 __STATIC_INLINE void LL_PWR_SetRegulModeLP(uint32_t RegulMode)
Kojto 136:ef9c61f8c49f 355 {
Kojto 136:ef9c61f8c49f 356 MODIFY_REG(PWR->CR, PWR_CR_LPSDSR, RegulMode);
Kojto 136:ef9c61f8c49f 357 }
Kojto 136:ef9c61f8c49f 358
Kojto 136:ef9c61f8c49f 359 /**
Kojto 136:ef9c61f8c49f 360 * @brief Get voltage regulator mode during low power modes
Kojto 136:ef9c61f8c49f 361 * @rmtoll CR LPSDSR LL_PWR_GetRegulModeLP
Kojto 136:ef9c61f8c49f 362 * @retval Returned value can be one of the following values:
Kojto 136:ef9c61f8c49f 363 * @arg @ref LL_PWR_REGU_LPMODES_MAIN
Kojto 136:ef9c61f8c49f 364 * @arg @ref LL_PWR_REGU_LPMODES_LOW_POWER
Kojto 136:ef9c61f8c49f 365 */
Kojto 136:ef9c61f8c49f 366 __STATIC_INLINE uint32_t LL_PWR_GetRegulModeLP(void)
Kojto 136:ef9c61f8c49f 367 {
Kojto 136:ef9c61f8c49f 368 return (uint32_t)(READ_BIT(PWR->CR, PWR_CR_LPSDSR));
Kojto 136:ef9c61f8c49f 369 }
Kojto 136:ef9c61f8c49f 370
Kojto 136:ef9c61f8c49f 371 #if defined(PWR_CR_LPDS)
Kojto 136:ef9c61f8c49f 372 /**
Kojto 136:ef9c61f8c49f 373 * @brief Set voltage regulator mode during deep sleep mode
Kojto 136:ef9c61f8c49f 374 * @rmtoll CR LPDS LL_PWR_SetRegulModeDS
Kojto 136:ef9c61f8c49f 375 * @param RegulMode This parameter can be one of the following values:
Kojto 136:ef9c61f8c49f 376 * @arg @ref LL_PWR_REGU_DSMODE_MAIN
Kojto 136:ef9c61f8c49f 377 * @arg @ref LL_PWR_REGU_DSMODE_LOW_POWER
Kojto 136:ef9c61f8c49f 378 * @retval None
Kojto 136:ef9c61f8c49f 379 */
Kojto 136:ef9c61f8c49f 380 __STATIC_INLINE void LL_PWR_SetRegulModeDS(uint32_t RegulMode)
Kojto 136:ef9c61f8c49f 381 {
Kojto 136:ef9c61f8c49f 382 MODIFY_REG(PWR->CR, PWR_CR_LPDS, RegulMode);
Kojto 136:ef9c61f8c49f 383 }
Kojto 136:ef9c61f8c49f 384
Kojto 136:ef9c61f8c49f 385 /**
Kojto 136:ef9c61f8c49f 386 * @brief Get voltage regulator mode during deep sleep mode
Kojto 136:ef9c61f8c49f 387 * @rmtoll CR LPDS LL_PWR_GetRegulModeDS
Kojto 136:ef9c61f8c49f 388 * @retval Returned value can be one of the following values:
Kojto 136:ef9c61f8c49f 389 * @arg @ref LL_PWR_REGU_DSMODE_MAIN
Kojto 136:ef9c61f8c49f 390 * @arg @ref LL_PWR_REGU_DSMODE_LOW_POWER
Kojto 136:ef9c61f8c49f 391 */
Kojto 136:ef9c61f8c49f 392 __STATIC_INLINE uint32_t LL_PWR_GetRegulModeDS(void)
Kojto 136:ef9c61f8c49f 393 {
Kojto 136:ef9c61f8c49f 394 return (uint32_t)(READ_BIT(PWR->CR, PWR_CR_LPDS));
Kojto 136:ef9c61f8c49f 395 }
Kojto 136:ef9c61f8c49f 396 #endif /* PWR_CR_LPDS */
Kojto 136:ef9c61f8c49f 397
Kojto 136:ef9c61f8c49f 398 /**
Kojto 136:ef9c61f8c49f 399 * @brief Set power down mode when CPU enters deepsleep
Kojto 136:ef9c61f8c49f 400 * @rmtoll CR PDDS LL_PWR_SetPowerMode
Kojto 136:ef9c61f8c49f 401 * @param PDMode This parameter can be one of the following values:
Kojto 136:ef9c61f8c49f 402 * @arg @ref LL_PWR_MODE_STOP
Kojto 136:ef9c61f8c49f 403 * @arg @ref LL_PWR_MODE_STANDBY
Kojto 136:ef9c61f8c49f 404 * @note Set the regulator to low power (bit @ref LL_PWR_REGU_LPMODES_LOW_POWER)
Kojto 136:ef9c61f8c49f 405 * before setting MODE_STOP. If the regulator remains in "main mode",
Kojto 136:ef9c61f8c49f 406 * it consumes more power without providing any additional feature.
Kojto 136:ef9c61f8c49f 407 * In MODE_STANDBY the regulator is automatically off.
Kojto 136:ef9c61f8c49f 408 * @retval None
Kojto 136:ef9c61f8c49f 409 */
Kojto 136:ef9c61f8c49f 410 __STATIC_INLINE void LL_PWR_SetPowerMode(uint32_t PDMode)
Kojto 136:ef9c61f8c49f 411 {
Kojto 136:ef9c61f8c49f 412 MODIFY_REG(PWR->CR, PWR_CR_PDDS, PDMode);
Kojto 136:ef9c61f8c49f 413 }
Kojto 136:ef9c61f8c49f 414
Kojto 136:ef9c61f8c49f 415 /**
Kojto 136:ef9c61f8c49f 416 * @brief Get power down mode when CPU enters deepsleep
Kojto 136:ef9c61f8c49f 417 * @rmtoll CR PDDS LL_PWR_GetPowerMode
Kojto 136:ef9c61f8c49f 418 * @retval Returned value can be one of the following values:
Kojto 136:ef9c61f8c49f 419 * @arg @ref LL_PWR_MODE_STOP
Kojto 136:ef9c61f8c49f 420 * @arg @ref LL_PWR_MODE_STANDBY
Kojto 136:ef9c61f8c49f 421 */
Kojto 136:ef9c61f8c49f 422 __STATIC_INLINE uint32_t LL_PWR_GetPowerMode(void)
Kojto 136:ef9c61f8c49f 423 {
Kojto 136:ef9c61f8c49f 424 return (uint32_t)(READ_BIT(PWR->CR, PWR_CR_PDDS));
Kojto 136:ef9c61f8c49f 425 }
Kojto 136:ef9c61f8c49f 426
Kojto 136:ef9c61f8c49f 427 #if defined (PWR_PVD_SUPPORT)
Kojto 136:ef9c61f8c49f 428 /**
Kojto 136:ef9c61f8c49f 429 * @brief Configure the voltage threshold detected by the Power Voltage Detector
Kojto 136:ef9c61f8c49f 430 * @rmtoll CR PLS LL_PWR_SetPVDLevel
Kojto 136:ef9c61f8c49f 431 * @param PVDLevel This parameter can be one of the following values:
Kojto 136:ef9c61f8c49f 432 * @arg @ref LL_PWR_PVDLEVEL_0
Kojto 136:ef9c61f8c49f 433 * @arg @ref LL_PWR_PVDLEVEL_1
Kojto 136:ef9c61f8c49f 434 * @arg @ref LL_PWR_PVDLEVEL_2
Kojto 136:ef9c61f8c49f 435 * @arg @ref LL_PWR_PVDLEVEL_3
Kojto 136:ef9c61f8c49f 436 * @arg @ref LL_PWR_PVDLEVEL_4
Kojto 136:ef9c61f8c49f 437 * @arg @ref LL_PWR_PVDLEVEL_5
Kojto 136:ef9c61f8c49f 438 * @arg @ref LL_PWR_PVDLEVEL_6
Kojto 136:ef9c61f8c49f 439 * @arg @ref LL_PWR_PVDLEVEL_7
Kojto 136:ef9c61f8c49f 440 * @retval None
Kojto 136:ef9c61f8c49f 441 */
Kojto 136:ef9c61f8c49f 442 __STATIC_INLINE void LL_PWR_SetPVDLevel(uint32_t PVDLevel)
Kojto 136:ef9c61f8c49f 443 {
Kojto 136:ef9c61f8c49f 444 MODIFY_REG(PWR->CR, PWR_CR_PLS, PVDLevel);
Kojto 136:ef9c61f8c49f 445 }
Kojto 136:ef9c61f8c49f 446
Kojto 136:ef9c61f8c49f 447 /**
Kojto 136:ef9c61f8c49f 448 * @brief Get the voltage threshold detection
Kojto 136:ef9c61f8c49f 449 * @rmtoll CR PLS LL_PWR_GetPVDLevel
Kojto 136:ef9c61f8c49f 450 * @retval Returned value can be one of the following values:
Kojto 136:ef9c61f8c49f 451 * @arg @ref LL_PWR_PVDLEVEL_0
Kojto 136:ef9c61f8c49f 452 * @arg @ref LL_PWR_PVDLEVEL_1
Kojto 136:ef9c61f8c49f 453 * @arg @ref LL_PWR_PVDLEVEL_2
Kojto 136:ef9c61f8c49f 454 * @arg @ref LL_PWR_PVDLEVEL_3
Kojto 136:ef9c61f8c49f 455 * @arg @ref LL_PWR_PVDLEVEL_4
Kojto 136:ef9c61f8c49f 456 * @arg @ref LL_PWR_PVDLEVEL_5
Kojto 136:ef9c61f8c49f 457 * @arg @ref LL_PWR_PVDLEVEL_6
Kojto 136:ef9c61f8c49f 458 * @arg @ref LL_PWR_PVDLEVEL_7
Kojto 136:ef9c61f8c49f 459 */
Kojto 136:ef9c61f8c49f 460 __STATIC_INLINE uint32_t LL_PWR_GetPVDLevel(void)
Kojto 136:ef9c61f8c49f 461 {
Kojto 136:ef9c61f8c49f 462 return (uint32_t)(READ_BIT(PWR->CR, PWR_CR_PLS));
Kojto 136:ef9c61f8c49f 463 }
Kojto 136:ef9c61f8c49f 464
Kojto 136:ef9c61f8c49f 465 /**
Kojto 136:ef9c61f8c49f 466 * @brief Enable Power Voltage Detector
Kojto 136:ef9c61f8c49f 467 * @rmtoll CR PVDE LL_PWR_EnablePVD
Kojto 136:ef9c61f8c49f 468 * @retval None
Kojto 136:ef9c61f8c49f 469 */
Kojto 136:ef9c61f8c49f 470 __STATIC_INLINE void LL_PWR_EnablePVD(void)
Kojto 136:ef9c61f8c49f 471 {
Kojto 136:ef9c61f8c49f 472 SET_BIT(PWR->CR, PWR_CR_PVDE);
Kojto 136:ef9c61f8c49f 473 }
Kojto 136:ef9c61f8c49f 474
Kojto 136:ef9c61f8c49f 475 /**
Kojto 136:ef9c61f8c49f 476 * @brief Disable Power Voltage Detector
Kojto 136:ef9c61f8c49f 477 * @rmtoll CR PVDE LL_PWR_DisablePVD
Kojto 136:ef9c61f8c49f 478 * @retval None
Kojto 136:ef9c61f8c49f 479 */
Kojto 136:ef9c61f8c49f 480 __STATIC_INLINE void LL_PWR_DisablePVD(void)
Kojto 136:ef9c61f8c49f 481 {
Kojto 136:ef9c61f8c49f 482 CLEAR_BIT(PWR->CR, PWR_CR_PVDE);
Kojto 136:ef9c61f8c49f 483 }
Kojto 136:ef9c61f8c49f 484
Kojto 136:ef9c61f8c49f 485 /**
Kojto 136:ef9c61f8c49f 486 * @brief Check if Power Voltage Detector is enabled
Kojto 136:ef9c61f8c49f 487 * @rmtoll CR PVDE LL_PWR_IsEnabledPVD
Kojto 136:ef9c61f8c49f 488 * @retval State of bit (1 or 0).
Kojto 136:ef9c61f8c49f 489 */
Kojto 136:ef9c61f8c49f 490 __STATIC_INLINE uint32_t LL_PWR_IsEnabledPVD(void)
Kojto 136:ef9c61f8c49f 491 {
Kojto 136:ef9c61f8c49f 492 return (READ_BIT(PWR->CR, PWR_CR_PVDE) == (PWR_CR_PVDE));
Kojto 136:ef9c61f8c49f 493 }
Kojto 136:ef9c61f8c49f 494 #endif
Kojto 136:ef9c61f8c49f 495
Kojto 136:ef9c61f8c49f 496 /**
Kojto 136:ef9c61f8c49f 497 * @brief Enable the WakeUp PINx functionality
Kojto 136:ef9c61f8c49f 498 * @rmtoll CSR EWUP1 LL_PWR_EnableWakeUpPin\n
Kojto 136:ef9c61f8c49f 499 * CSR EWUP2 LL_PWR_EnableWakeUpPin\n
Kojto 136:ef9c61f8c49f 500 * CSR EWUP3 LL_PWR_EnableWakeUpPin
Kojto 136:ef9c61f8c49f 501 * @param WakeUpPin This parameter can be one of the following values:
Kojto 136:ef9c61f8c49f 502 * @arg @ref LL_PWR_WAKEUP_PIN1
Kojto 136:ef9c61f8c49f 503 * @arg @ref LL_PWR_WAKEUP_PIN2
Kojto 136:ef9c61f8c49f 504 * @arg @ref LL_PWR_WAKEUP_PIN3 (*)
Kojto 136:ef9c61f8c49f 505 *
Kojto 136:ef9c61f8c49f 506 * (*) not available on all devices
Kojto 136:ef9c61f8c49f 507 * @retval None
Kojto 136:ef9c61f8c49f 508 */
Kojto 136:ef9c61f8c49f 509 __STATIC_INLINE void LL_PWR_EnableWakeUpPin(uint32_t WakeUpPin)
Kojto 136:ef9c61f8c49f 510 {
Kojto 136:ef9c61f8c49f 511 SET_BIT(PWR->CSR, WakeUpPin);
Kojto 136:ef9c61f8c49f 512 }
Kojto 136:ef9c61f8c49f 513
Kojto 136:ef9c61f8c49f 514 /**
Kojto 136:ef9c61f8c49f 515 * @brief Disable the WakeUp PINx functionality
Kojto 136:ef9c61f8c49f 516 * @rmtoll CSR EWUP1 LL_PWR_DisableWakeUpPin\n
Kojto 136:ef9c61f8c49f 517 * CSR EWUP2 LL_PWR_DisableWakeUpPin\n
Kojto 136:ef9c61f8c49f 518 * CSR EWUP3 LL_PWR_DisableWakeUpPin
Kojto 136:ef9c61f8c49f 519 * @param WakeUpPin This parameter can be one of the following values:
Kojto 136:ef9c61f8c49f 520 * @arg @ref LL_PWR_WAKEUP_PIN1
Kojto 136:ef9c61f8c49f 521 * @arg @ref LL_PWR_WAKEUP_PIN2
Kojto 136:ef9c61f8c49f 522 * @arg @ref LL_PWR_WAKEUP_PIN3 (*)
Kojto 136:ef9c61f8c49f 523 *
Kojto 136:ef9c61f8c49f 524 * (*) not available on all devices
Kojto 136:ef9c61f8c49f 525 * @retval None
Kojto 136:ef9c61f8c49f 526 */
Kojto 136:ef9c61f8c49f 527 __STATIC_INLINE void LL_PWR_DisableWakeUpPin(uint32_t WakeUpPin)
Kojto 136:ef9c61f8c49f 528 {
Kojto 136:ef9c61f8c49f 529 CLEAR_BIT(PWR->CSR, WakeUpPin);
Kojto 136:ef9c61f8c49f 530 }
Kojto 136:ef9c61f8c49f 531
Kojto 136:ef9c61f8c49f 532 /**
Kojto 136:ef9c61f8c49f 533 * @brief Check if the WakeUp PINx functionality is enabled
Kojto 136:ef9c61f8c49f 534 * @rmtoll CSR EWUP1 LL_PWR_IsEnabledWakeUpPin\n
Kojto 136:ef9c61f8c49f 535 * CSR EWUP2 LL_PWR_IsEnabledWakeUpPin\n
Kojto 136:ef9c61f8c49f 536 * CSR EWUP3 LL_PWR_IsEnabledWakeUpPin
Kojto 136:ef9c61f8c49f 537 * @param WakeUpPin This parameter can be one of the following values:
Kojto 136:ef9c61f8c49f 538 * @arg @ref LL_PWR_WAKEUP_PIN1
Kojto 136:ef9c61f8c49f 539 * @arg @ref LL_PWR_WAKEUP_PIN2
Kojto 136:ef9c61f8c49f 540 * @arg @ref LL_PWR_WAKEUP_PIN3 (*)
Kojto 136:ef9c61f8c49f 541 *
Kojto 136:ef9c61f8c49f 542 * (*) not available on all devices
Kojto 136:ef9c61f8c49f 543 * @retval State of bit (1 or 0).
Kojto 136:ef9c61f8c49f 544 */
Kojto 136:ef9c61f8c49f 545 __STATIC_INLINE uint32_t LL_PWR_IsEnabledWakeUpPin(uint32_t WakeUpPin)
Kojto 136:ef9c61f8c49f 546 {
Kojto 136:ef9c61f8c49f 547 return (READ_BIT(PWR->CSR, WakeUpPin) == (WakeUpPin));
Kojto 136:ef9c61f8c49f 548 }
Kojto 136:ef9c61f8c49f 549
Kojto 136:ef9c61f8c49f 550 /**
Kojto 136:ef9c61f8c49f 551 * @brief Enable ultra low-power mode by enabling VREFINT switch off in low-power modes
Kojto 136:ef9c61f8c49f 552 * @rmtoll CR ULP LL_PWR_EnableUltraLowPower
Kojto 136:ef9c61f8c49f 553 * @retval None
Kojto 136:ef9c61f8c49f 554 */
Kojto 136:ef9c61f8c49f 555 __STATIC_INLINE void LL_PWR_EnableUltraLowPower(void)
Kojto 136:ef9c61f8c49f 556 {
Kojto 136:ef9c61f8c49f 557 SET_BIT(PWR->CR, PWR_CR_ULP);
Kojto 136:ef9c61f8c49f 558 }
Kojto 136:ef9c61f8c49f 559
Kojto 136:ef9c61f8c49f 560 /**
Kojto 136:ef9c61f8c49f 561 * @brief Disable ultra low-power mode by disabling VREFINT switch off in low-power modes
Kojto 136:ef9c61f8c49f 562 * @rmtoll CR ULP LL_PWR_DisableUltraLowPower
Kojto 136:ef9c61f8c49f 563 * @retval None
Kojto 136:ef9c61f8c49f 564 */
Kojto 136:ef9c61f8c49f 565 __STATIC_INLINE void LL_PWR_DisableUltraLowPower(void)
Kojto 136:ef9c61f8c49f 566 {
Kojto 136:ef9c61f8c49f 567 CLEAR_BIT(PWR->CR, PWR_CR_ULP);
Kojto 136:ef9c61f8c49f 568 }
Kojto 136:ef9c61f8c49f 569
Kojto 136:ef9c61f8c49f 570 /**
Kojto 136:ef9c61f8c49f 571 * @brief Check if ultra low-power mode is enabled by checking if VREFINT switch off in low-power modes is enabled
Kojto 136:ef9c61f8c49f 572 * @rmtoll CR ULP LL_PWR_IsEnabledUltraLowPower
Kojto 136:ef9c61f8c49f 573 * @retval State of bit (1 or 0).
Kojto 136:ef9c61f8c49f 574 */
Kojto 136:ef9c61f8c49f 575 __STATIC_INLINE uint32_t LL_PWR_IsEnabledUltraLowPower(void)
Kojto 136:ef9c61f8c49f 576 {
Kojto 136:ef9c61f8c49f 577 return (READ_BIT(PWR->CR, PWR_CR_ULP) == (PWR_CR_ULP));
Kojto 136:ef9c61f8c49f 578 }
Kojto 136:ef9c61f8c49f 579
Kojto 136:ef9c61f8c49f 580 /**
Kojto 136:ef9c61f8c49f 581 * @brief Enable fast wakeup by ignoring VREFINT startup time when exiting from low-power mode
Kojto 136:ef9c61f8c49f 582 * @rmtoll CR FWU LL_PWR_EnableFastWakeUp
Kojto 136:ef9c61f8c49f 583 * @note Works in conjunction with ultra low power mode.
Kojto 136:ef9c61f8c49f 584 * @retval None
Kojto 136:ef9c61f8c49f 585 */
Kojto 136:ef9c61f8c49f 586 __STATIC_INLINE void LL_PWR_EnableFastWakeUp(void)
Kojto 136:ef9c61f8c49f 587 {
Kojto 136:ef9c61f8c49f 588 SET_BIT(PWR->CR, PWR_CR_FWU);
Kojto 136:ef9c61f8c49f 589 }
Kojto 136:ef9c61f8c49f 590
Kojto 136:ef9c61f8c49f 591 /**
Kojto 136:ef9c61f8c49f 592 * @brief Disable fast wakeup by waiting VREFINT startup time when exiting from low-power mode
Kojto 136:ef9c61f8c49f 593 * @rmtoll CR FWU LL_PWR_DisableFastWakeUp
Kojto 136:ef9c61f8c49f 594 * @note Works in conjunction with ultra low power mode.
Kojto 136:ef9c61f8c49f 595 * @retval None
Kojto 136:ef9c61f8c49f 596 */
Kojto 136:ef9c61f8c49f 597 __STATIC_INLINE void LL_PWR_DisableFastWakeUp(void)
Kojto 136:ef9c61f8c49f 598 {
Kojto 136:ef9c61f8c49f 599 CLEAR_BIT(PWR->CR, PWR_CR_FWU);
Kojto 136:ef9c61f8c49f 600 }
Kojto 136:ef9c61f8c49f 601
Kojto 136:ef9c61f8c49f 602 /**
Kojto 136:ef9c61f8c49f 603 * @brief Check if fast wakeup is enabled by checking if VREFINT startup time when exiting from low-power mode is ignored
Kojto 136:ef9c61f8c49f 604 * @rmtoll CR FWU LL_PWR_IsEnabledFastWakeUp
Kojto 136:ef9c61f8c49f 605 * @retval State of bit (1 or 0).
Kojto 136:ef9c61f8c49f 606 */
Kojto 136:ef9c61f8c49f 607 __STATIC_INLINE uint32_t LL_PWR_IsEnabledFastWakeUp(void)
Kojto 136:ef9c61f8c49f 608 {
Kojto 136:ef9c61f8c49f 609 return (READ_BIT(PWR->CR, PWR_CR_FWU) == (PWR_CR_FWU));
Kojto 136:ef9c61f8c49f 610 }
Kojto 136:ef9c61f8c49f 611
Kojto 136:ef9c61f8c49f 612 /**
Kojto 136:ef9c61f8c49f 613 * @brief Enable non-volatile memory (Flash and EEPROM) keeping off feature when exiting from low-power mode
Kojto 136:ef9c61f8c49f 614 * @rmtoll CR DS_EE_KOFF LL_PWR_EnableNVMKeptOff
Kojto 136:ef9c61f8c49f 615 * @note When enabled, after entering low-power mode (Stop or Standby only), if RUN_PD of FLASH_ACR register
Kojto 136:ef9c61f8c49f 616 * is also set, the Flash memory will not be woken up when exiting from deepsleep mode.
Kojto 136:ef9c61f8c49f 617 * When enabled, the EEPROM will not be woken up when exiting from low-power mode (if the bit RUN_PD is set)
Kojto 136:ef9c61f8c49f 618 * @retval None
Kojto 136:ef9c61f8c49f 619 */
Kojto 136:ef9c61f8c49f 620 __STATIC_INLINE void LL_PWR_EnableNVMKeptOff(void)
Kojto 136:ef9c61f8c49f 621 {
Kojto 136:ef9c61f8c49f 622 SET_BIT(PWR->CR, PWR_CR_DSEEKOFF);
Kojto 136:ef9c61f8c49f 623 }
Kojto 136:ef9c61f8c49f 624
Kojto 136:ef9c61f8c49f 625 /**
Kojto 136:ef9c61f8c49f 626 * @brief Disable non-volatile memory (Flash and EEPROM) keeping off feature when exiting from low-power mode
Kojto 136:ef9c61f8c49f 627 * @rmtoll CR DS_EE_KOFF LL_PWR_DisableNVMKeptOff
Kojto 136:ef9c61f8c49f 628 * @note When disabled, Flash memory is woken up when exiting from deepsleep mode even if the bit RUN_PD is set
Kojto 136:ef9c61f8c49f 629 * @retval None
Kojto 136:ef9c61f8c49f 630 */
Kojto 136:ef9c61f8c49f 631 __STATIC_INLINE void LL_PWR_DisableNVMKeptOff(void)
Kojto 136:ef9c61f8c49f 632 {
Kojto 136:ef9c61f8c49f 633 CLEAR_BIT(PWR->CR, PWR_CR_DSEEKOFF);
Kojto 136:ef9c61f8c49f 634 }
Kojto 136:ef9c61f8c49f 635
Kojto 136:ef9c61f8c49f 636 /**
Kojto 136:ef9c61f8c49f 637 * @brief Check if non-volatile memory (Flash and EEPROM) keeping off feature when exiting from low-power mode is enabled
Kojto 136:ef9c61f8c49f 638 * @rmtoll CR DS_EE_KOFF LL_PWR_IsEnabledNVMKeptOff
Kojto 136:ef9c61f8c49f 639 * @retval State of bit (1 or 0).
Kojto 136:ef9c61f8c49f 640 */
Kojto 136:ef9c61f8c49f 641 __STATIC_INLINE uint32_t LL_PWR_IsEnabledNVMKeptOff(void)
Kojto 136:ef9c61f8c49f 642 {
Kojto 136:ef9c61f8c49f 643 return (READ_BIT(PWR->CR, PWR_CR_DSEEKOFF) == (PWR_CR_DSEEKOFF));
Kojto 136:ef9c61f8c49f 644 }
Kojto 136:ef9c61f8c49f 645
Kojto 136:ef9c61f8c49f 646 /**
Kojto 136:ef9c61f8c49f 647 * @}
Kojto 136:ef9c61f8c49f 648 */
Kojto 136:ef9c61f8c49f 649
Kojto 136:ef9c61f8c49f 650 /** @defgroup PWR_LL_EF_FLAG_Management FLAG_Management
Kojto 136:ef9c61f8c49f 651 * @{
Kojto 136:ef9c61f8c49f 652 */
Kojto 136:ef9c61f8c49f 653
Kojto 136:ef9c61f8c49f 654 /**
Kojto 136:ef9c61f8c49f 655 * @brief Get Wake-up Flag
Kojto 136:ef9c61f8c49f 656 * @rmtoll CSR WUF LL_PWR_IsActiveFlag_WU
Kojto 136:ef9c61f8c49f 657 * @retval State of bit (1 or 0).
Kojto 136:ef9c61f8c49f 658 */
Kojto 136:ef9c61f8c49f 659 __STATIC_INLINE uint32_t LL_PWR_IsActiveFlag_WU(void)
Kojto 136:ef9c61f8c49f 660 {
Kojto 136:ef9c61f8c49f 661 return (READ_BIT(PWR->CSR, PWR_CSR_WUF) == (PWR_CSR_WUF));
Kojto 136:ef9c61f8c49f 662 }
Kojto 136:ef9c61f8c49f 663
Kojto 136:ef9c61f8c49f 664 /**
Kojto 136:ef9c61f8c49f 665 * @brief Get Standby Flag
Kojto 136:ef9c61f8c49f 666 * @rmtoll CSR SBF LL_PWR_IsActiveFlag_SB
Kojto 136:ef9c61f8c49f 667 * @retval State of bit (1 or 0).
Kojto 136:ef9c61f8c49f 668 */
Kojto 136:ef9c61f8c49f 669 __STATIC_INLINE uint32_t LL_PWR_IsActiveFlag_SB(void)
Kojto 136:ef9c61f8c49f 670 {
Kojto 136:ef9c61f8c49f 671 return (READ_BIT(PWR->CSR, PWR_CSR_SBF) == (PWR_CSR_SBF));
Kojto 136:ef9c61f8c49f 672 }
Kojto 136:ef9c61f8c49f 673
Kojto 136:ef9c61f8c49f 674 #if defined (PWR_PVD_SUPPORT)
Kojto 136:ef9c61f8c49f 675 /**
Kojto 136:ef9c61f8c49f 676 * @brief Indicate whether VDD voltage is below the selected PVD threshold
Kojto 136:ef9c61f8c49f 677 * @rmtoll CSR PVDO LL_PWR_IsActiveFlag_PVDO
Kojto 136:ef9c61f8c49f 678 * @retval State of bit (1 or 0).
Kojto 136:ef9c61f8c49f 679 */
Kojto 136:ef9c61f8c49f 680 __STATIC_INLINE uint32_t LL_PWR_IsActiveFlag_PVDO(void)
Kojto 136:ef9c61f8c49f 681 {
Kojto 136:ef9c61f8c49f 682 return (READ_BIT(PWR->CSR, PWR_CSR_PVDO) == (PWR_CSR_PVDO));
Kojto 136:ef9c61f8c49f 683 }
Kojto 136:ef9c61f8c49f 684 #endif
Kojto 136:ef9c61f8c49f 685
Kojto 136:ef9c61f8c49f 686 #if defined (PWR_CSR_VREFINTRDYF)
Kojto 136:ef9c61f8c49f 687 /**
Kojto 136:ef9c61f8c49f 688 * @brief Get Internal Reference VrefInt Flag
Kojto 136:ef9c61f8c49f 689 * @rmtoll CSR VREFINTRDYF LL_PWR_IsActiveFlag_VREFINTRDY
Kojto 136:ef9c61f8c49f 690 * @retval State of bit (1 or 0).
Kojto 136:ef9c61f8c49f 691 */
Kojto 136:ef9c61f8c49f 692 __STATIC_INLINE uint32_t LL_PWR_IsActiveFlag_VREFINTRDY(void)
Kojto 136:ef9c61f8c49f 693 {
Kojto 136:ef9c61f8c49f 694 return (READ_BIT(PWR->CSR, PWR_CSR_VREFINTRDYF) == (PWR_CSR_VREFINTRDYF));
Kojto 136:ef9c61f8c49f 695 }
Kojto 136:ef9c61f8c49f 696 #endif
Kojto 136:ef9c61f8c49f 697
Kojto 136:ef9c61f8c49f 698 /**
Kojto 136:ef9c61f8c49f 699 * @brief Indicate whether the regulator is ready in the selected voltage range or if its output voltage is still changing to the required voltage level
Kojto 136:ef9c61f8c49f 700 * @rmtoll CSR VOSF LL_PWR_IsActiveFlag_VOSF
Kojto 136:ef9c61f8c49f 701 * @retval State of bit (1 or 0).
Kojto 136:ef9c61f8c49f 702 */
Kojto 136:ef9c61f8c49f 703 __STATIC_INLINE uint32_t LL_PWR_IsActiveFlag_VOSF(void)
Kojto 136:ef9c61f8c49f 704 {
Kojto 136:ef9c61f8c49f 705 return (READ_BIT(PWR->CSR, PWR_CSR_VOSF) == (PWR_CSR_VOSF));
Kojto 136:ef9c61f8c49f 706 }
Kojto 136:ef9c61f8c49f 707
Kojto 136:ef9c61f8c49f 708 /**
Kojto 136:ef9c61f8c49f 709 * @brief Indicate whether the regulator is ready in main mode or is in low-power mode
Kojto 136:ef9c61f8c49f 710 * @rmtoll CSR REGLPF LL_PWR_IsActiveFlag_REGLPF
Kojto 136:ef9c61f8c49f 711 * @note Take care, return value "0" means the regulator is ready. Return value "1" means the output voltage range is still changing.
Kojto 136:ef9c61f8c49f 712 * @retval State of bit (1 or 0).
Kojto 136:ef9c61f8c49f 713 */
Kojto 136:ef9c61f8c49f 714 __STATIC_INLINE uint32_t LL_PWR_IsActiveFlag_REGLPF(void)
Kojto 136:ef9c61f8c49f 715 {
Kojto 136:ef9c61f8c49f 716 return (READ_BIT(PWR->CSR, PWR_CSR_REGLPF) == (PWR_CSR_REGLPF));
Kojto 136:ef9c61f8c49f 717 }
Kojto 136:ef9c61f8c49f 718
Kojto 136:ef9c61f8c49f 719 /**
Kojto 136:ef9c61f8c49f 720 * @brief Clear Standby Flag
Kojto 136:ef9c61f8c49f 721 * @rmtoll CR CSBF LL_PWR_ClearFlag_SB
Kojto 136:ef9c61f8c49f 722 * @retval None
Kojto 136:ef9c61f8c49f 723 */
Kojto 136:ef9c61f8c49f 724 __STATIC_INLINE void LL_PWR_ClearFlag_SB(void)
Kojto 136:ef9c61f8c49f 725 {
Kojto 136:ef9c61f8c49f 726 SET_BIT(PWR->CR, PWR_CR_CSBF);
Kojto 136:ef9c61f8c49f 727 }
Kojto 136:ef9c61f8c49f 728
Kojto 136:ef9c61f8c49f 729 /**
Kojto 136:ef9c61f8c49f 730 * @brief Clear Wake-up Flags
Kojto 136:ef9c61f8c49f 731 * @rmtoll CR CWUF LL_PWR_ClearFlag_WU
Kojto 136:ef9c61f8c49f 732 * @retval None
Kojto 136:ef9c61f8c49f 733 */
Kojto 136:ef9c61f8c49f 734 __STATIC_INLINE void LL_PWR_ClearFlag_WU(void)
Kojto 136:ef9c61f8c49f 735 {
Kojto 136:ef9c61f8c49f 736 SET_BIT(PWR->CR, PWR_CR_CWUF);
Kojto 136:ef9c61f8c49f 737 }
Kojto 136:ef9c61f8c49f 738
Kojto 136:ef9c61f8c49f 739
Kojto 136:ef9c61f8c49f 740 #if defined(USE_FULL_LL_DRIVER)
Kojto 136:ef9c61f8c49f 741 /** @defgroup PWR_LL_EF_Init De-initialization function
Kojto 136:ef9c61f8c49f 742 * @{
Kojto 136:ef9c61f8c49f 743 */
Kojto 136:ef9c61f8c49f 744 ErrorStatus LL_PWR_DeInit(void);
Kojto 136:ef9c61f8c49f 745 /**
Kojto 136:ef9c61f8c49f 746 * @}
Kojto 136:ef9c61f8c49f 747 */
Kojto 136:ef9c61f8c49f 748 #endif /* USE_FULL_LL_DRIVER */
Kojto 136:ef9c61f8c49f 749
Kojto 136:ef9c61f8c49f 750 /**
Kojto 136:ef9c61f8c49f 751 * @}
Kojto 136:ef9c61f8c49f 752 */
Kojto 136:ef9c61f8c49f 753
Kojto 136:ef9c61f8c49f 754 /**
Kojto 136:ef9c61f8c49f 755 * @}
Kojto 136:ef9c61f8c49f 756 */
Kojto 136:ef9c61f8c49f 757
Kojto 136:ef9c61f8c49f 758 /**
Kojto 136:ef9c61f8c49f 759 * @}
Kojto 136:ef9c61f8c49f 760 */
Kojto 136:ef9c61f8c49f 761
Kojto 136:ef9c61f8c49f 762 #endif /* defined(PWR) */
Kojto 136:ef9c61f8c49f 763
Kojto 136:ef9c61f8c49f 764 /**
Kojto 136:ef9c61f8c49f 765 * @}
Kojto 136:ef9c61f8c49f 766 */
Kojto 136:ef9c61f8c49f 767
Kojto 136:ef9c61f8c49f 768 #ifdef __cplusplus
Kojto 136:ef9c61f8c49f 769 }
Kojto 136:ef9c61f8c49f 770 #endif
Kojto 136:ef9c61f8c49f 771
Kojto 136:ef9c61f8c49f 772 #endif /* __STM32L0xx_LL_PWR_H */
Kojto 136:ef9c61f8c49f 773
Kojto 136:ef9c61f8c49f 774 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/