mbed official / mbed

Important changes to repositories hosted on mbed.com

Mbed hosted mercurial repositories are deprecated and are due to be permanently deleted in July 2026.

To keep a copy of this software download the repository Zip archive or clone locally using Mercurial.

It is also possible to export all your personal repositories from the account settings page.

Dependents:   hello SerialTestv11 SerialTestv12 Sierpinski ... more

TARGET_NUCLEO_F103RB/TARGET_STM/TARGET_STM32F1/device/stm32f1xx_hal_sram.h@170:e95d10626187, 2018-09-06 (annotated)

Committer:
AnnaBridge
Date:
Thu Sep 06 13:39:34 2018 +0100
Revision:
170:e95d10626187
Parent:
156:ff21514d8981 
mbed library. Release version 163

Who changed what in which revision?

UserRevisionLine numberNew contents of line
AnnaBridge 156:ff21514d8981 1 /**
AnnaBridge 156:ff21514d8981 2 ******************************************************************************
AnnaBridge 156:ff21514d8981 3 * @file stm32f1xx_hal_sram.h
AnnaBridge 156:ff21514d8981 4 * @author MCD Application Team
AnnaBridge 156:ff21514d8981 5 * @brief Header file of SRAM HAL module.
AnnaBridge 156:ff21514d8981 6 ******************************************************************************
AnnaBridge 156:ff21514d8981 7 * @attention
AnnaBridge 156:ff21514d8981 8 *
AnnaBridge 156:ff21514d8981 9 * <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
AnnaBridge 156:ff21514d8981 10 *
AnnaBridge 156:ff21514d8981 11 * Redistribution and use in source and binary forms, with or without modification,
AnnaBridge 156:ff21514d8981 12 * are permitted provided that the following conditions are met:
AnnaBridge 156:ff21514d8981 13 * 1. Redistributions of source code must retain the above copyright notice,
AnnaBridge 156:ff21514d8981 14 * this list of conditions and the following disclaimer.
AnnaBridge 156:ff21514d8981 15 * 2. Redistributions in binary form must reproduce the above copyright notice,
AnnaBridge 156:ff21514d8981 16 * this list of conditions and the following disclaimer in the documentation
AnnaBridge 156:ff21514d8981 17 * and/or other materials provided with the distribution.
AnnaBridge 156:ff21514d8981 18 * 3. Neither the name of STMicroelectronics nor the names of its contributors
AnnaBridge 156:ff21514d8981 19 * may be used to endorse or promote products derived from this software
AnnaBridge 156:ff21514d8981 20 * without specific prior written permission.
AnnaBridge 156:ff21514d8981 21 *
AnnaBridge 156:ff21514d8981 22 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
AnnaBridge 156:ff21514d8981 23 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
AnnaBridge 156:ff21514d8981 24 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
AnnaBridge 156:ff21514d8981 25 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
AnnaBridge 156:ff21514d8981 26 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
AnnaBridge 156:ff21514d8981 27 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
AnnaBridge 156:ff21514d8981 28 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
AnnaBridge 156:ff21514d8981 29 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
AnnaBridge 156:ff21514d8981 30 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
AnnaBridge 156:ff21514d8981 31 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
AnnaBridge 156:ff21514d8981 32 *
AnnaBridge 156:ff21514d8981 33 ******************************************************************************
AnnaBridge 156:ff21514d8981 34 */
AnnaBridge 156:ff21514d8981 35
AnnaBridge 156:ff21514d8981 36 /* Define to prevent recursive inclusion -------------------------------------*/
AnnaBridge 156:ff21514d8981 37 #ifndef __STM32F1xx_HAL_SRAM_H
AnnaBridge 156:ff21514d8981 38 #define __STM32F1xx_HAL_SRAM_H
AnnaBridge 156:ff21514d8981 39
AnnaBridge 156:ff21514d8981 40 #ifdef __cplusplus
AnnaBridge 156:ff21514d8981 41 extern "C" {
AnnaBridge 156:ff21514d8981 42 #endif
AnnaBridge 156:ff21514d8981 43
AnnaBridge 156:ff21514d8981 44 /* Includes ------------------------------------------------------------------*/
AnnaBridge 156:ff21514d8981 45 #include "stm32f1xx_ll_fsmc.h"
AnnaBridge 156:ff21514d8981 46
AnnaBridge 156:ff21514d8981 47 /** @addtogroup STM32F1xx_HAL_Driver
AnnaBridge 156:ff21514d8981 48 * @{
AnnaBridge 156:ff21514d8981 49 */
AnnaBridge 156:ff21514d8981 50
AnnaBridge 156:ff21514d8981 51 #if defined (STM32F101xE) || defined(STM32F103xE) || defined(STM32F101xG) || defined(STM32F103xG) || defined(STM32F100xE)
AnnaBridge 156:ff21514d8981 52
AnnaBridge 156:ff21514d8981 53 /** @addtogroup SRAM
AnnaBridge 156:ff21514d8981 54 * @{
AnnaBridge 156:ff21514d8981 55 */
AnnaBridge 156:ff21514d8981 56
AnnaBridge 156:ff21514d8981 57 /* Exported typedef ----------------------------------------------------------*/
AnnaBridge 156:ff21514d8981 58
AnnaBridge 156:ff21514d8981 59 /** @defgroup SRAM_Exported_Types SRAM Exported Types
AnnaBridge 156:ff21514d8981 60 * @{
AnnaBridge 156:ff21514d8981 61 */
AnnaBridge 156:ff21514d8981 62 /**
AnnaBridge 156:ff21514d8981 63 * @brief HAL SRAM State structures definition
AnnaBridge 156:ff21514d8981 64 */
AnnaBridge 156:ff21514d8981 65 typedef enum
AnnaBridge 156:ff21514d8981 66 {
AnnaBridge 156:ff21514d8981 67 HAL_SRAM_STATE_RESET = 0x00U, /*!< SRAM not yet initialized or disabled */
AnnaBridge 156:ff21514d8981 68 HAL_SRAM_STATE_READY = 0x01U, /*!< SRAM initialized and ready for use */
AnnaBridge 156:ff21514d8981 69 HAL_SRAM_STATE_BUSY = 0x02U, /*!< SRAM internal process is ongoing */
AnnaBridge 156:ff21514d8981 70 HAL_SRAM_STATE_ERROR = 0x03U, /*!< SRAM error state */
AnnaBridge 156:ff21514d8981 71 HAL_SRAM_STATE_PROTECTED = 0x04U /*!< SRAM peripheral NORSRAM device write protected */
AnnaBridge 156:ff21514d8981 72
AnnaBridge 156:ff21514d8981 73 }HAL_SRAM_StateTypeDef;
AnnaBridge 156:ff21514d8981 74
AnnaBridge 156:ff21514d8981 75 /**
AnnaBridge 156:ff21514d8981 76 * @brief SRAM handle Structure definition
AnnaBridge 156:ff21514d8981 77 */
AnnaBridge 156:ff21514d8981 78 typedef struct
AnnaBridge 156:ff21514d8981 79 {
AnnaBridge 156:ff21514d8981 80 FSMC_NORSRAM_TypeDef *Instance; /*!< Register base address */
AnnaBridge 156:ff21514d8981 81
AnnaBridge 156:ff21514d8981 82 FSMC_NORSRAM_EXTENDED_TypeDef *Extended; /*!< Extended mode register base address */
AnnaBridge 156:ff21514d8981 83
AnnaBridge 156:ff21514d8981 84 FSMC_NORSRAM_InitTypeDef Init; /*!< SRAM device control configuration parameters */
AnnaBridge 156:ff21514d8981 85
AnnaBridge 156:ff21514d8981 86 HAL_LockTypeDef Lock; /*!< SRAM locking object */
AnnaBridge 156:ff21514d8981 87
AnnaBridge 156:ff21514d8981 88 __IO HAL_SRAM_StateTypeDef State; /*!< SRAM device access state */
AnnaBridge 156:ff21514d8981 89
AnnaBridge 156:ff21514d8981 90 DMA_HandleTypeDef *hdma; /*!< Pointer DMA handler */
AnnaBridge 156:ff21514d8981 91
AnnaBridge 156:ff21514d8981 92 }SRAM_HandleTypeDef;
AnnaBridge 156:ff21514d8981 93
AnnaBridge 156:ff21514d8981 94 /**
AnnaBridge 156:ff21514d8981 95 * @}
AnnaBridge 156:ff21514d8981 96 */
AnnaBridge 156:ff21514d8981 97
AnnaBridge 156:ff21514d8981 98 /* Exported constants --------------------------------------------------------*/
AnnaBridge 156:ff21514d8981 99 /* Exported macro ------------------------------------------------------------*/
AnnaBridge 156:ff21514d8981 100
AnnaBridge 156:ff21514d8981 101 /** @defgroup SRAM_Exported_Macros SRAM Exported Macros
AnnaBridge 156:ff21514d8981 102 * @{
AnnaBridge 156:ff21514d8981 103 */
AnnaBridge 156:ff21514d8981 104
AnnaBridge 156:ff21514d8981 105 /** @brief Reset SRAM handle state
AnnaBridge 156:ff21514d8981 106 * @param __HANDLE__: SRAM handle
AnnaBridge 156:ff21514d8981 107 * @retval None
AnnaBridge 156:ff21514d8981 108 */
AnnaBridge 156:ff21514d8981 109 #define __HAL_SRAM_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_SRAM_STATE_RESET)
AnnaBridge 156:ff21514d8981 110
AnnaBridge 156:ff21514d8981 111 /**
AnnaBridge 156:ff21514d8981 112 * @}
AnnaBridge 156:ff21514d8981 113 */
AnnaBridge 156:ff21514d8981 114
AnnaBridge 156:ff21514d8981 115 /* Exported functions --------------------------------------------------------*/
AnnaBridge 156:ff21514d8981 116
AnnaBridge 156:ff21514d8981 117 /** @addtogroup SRAM_Exported_Functions
AnnaBridge 156:ff21514d8981 118 * @{
AnnaBridge 156:ff21514d8981 119 */
AnnaBridge 156:ff21514d8981 120
AnnaBridge 156:ff21514d8981 121 /** @addtogroup SRAM_Exported_Functions_Group1
AnnaBridge 156:ff21514d8981 122 * @{
AnnaBridge 156:ff21514d8981 123 */
AnnaBridge 156:ff21514d8981 124
AnnaBridge 156:ff21514d8981 125 /* Initialization/de-initialization functions **********************************/
AnnaBridge 156:ff21514d8981 126 HAL_StatusTypeDef HAL_SRAM_Init(SRAM_HandleTypeDef *hsram, FSMC_NORSRAM_TimingTypeDef *Timing, FSMC_NORSRAM_TimingTypeDef *ExtTiming);
AnnaBridge 156:ff21514d8981 127 HAL_StatusTypeDef HAL_SRAM_DeInit(SRAM_HandleTypeDef *hsram);
AnnaBridge 156:ff21514d8981 128 void HAL_SRAM_MspInit(SRAM_HandleTypeDef *hsram);
AnnaBridge 156:ff21514d8981 129 void HAL_SRAM_MspDeInit(SRAM_HandleTypeDef *hsram);
AnnaBridge 156:ff21514d8981 130
AnnaBridge 156:ff21514d8981 131 void HAL_SRAM_DMA_XferCpltCallback(DMA_HandleTypeDef *hdma);
AnnaBridge 156:ff21514d8981 132 void HAL_SRAM_DMA_XferErrorCallback(DMA_HandleTypeDef *hdma);
AnnaBridge 156:ff21514d8981 133
AnnaBridge 156:ff21514d8981 134 /**
AnnaBridge 156:ff21514d8981 135 * @}
AnnaBridge 156:ff21514d8981 136 */
AnnaBridge 156:ff21514d8981 137
AnnaBridge 156:ff21514d8981 138 /** @addtogroup SRAM_Exported_Functions_Group2
AnnaBridge 156:ff21514d8981 139 * @{
AnnaBridge 156:ff21514d8981 140 */
AnnaBridge 156:ff21514d8981 141
AnnaBridge 156:ff21514d8981 142 /* I/O operation functions *****************************************************/
AnnaBridge 156:ff21514d8981 143 HAL_StatusTypeDef HAL_SRAM_Read_8b(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint8_t *pDstBuffer, uint32_t BufferSize);
AnnaBridge 156:ff21514d8981 144 HAL_StatusTypeDef HAL_SRAM_Write_8b(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint8_t *pSrcBuffer, uint32_t BufferSize);
AnnaBridge 156:ff21514d8981 145 HAL_StatusTypeDef HAL_SRAM_Read_16b(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint16_t *pDstBuffer, uint32_t BufferSize);
AnnaBridge 156:ff21514d8981 146 HAL_StatusTypeDef HAL_SRAM_Write_16b(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint16_t *pSrcBuffer, uint32_t BufferSize);
AnnaBridge 156:ff21514d8981 147 HAL_StatusTypeDef HAL_SRAM_Read_32b(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint32_t *pDstBuffer, uint32_t BufferSize);
AnnaBridge 156:ff21514d8981 148 HAL_StatusTypeDef HAL_SRAM_Write_32b(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint32_t *pSrcBuffer, uint32_t BufferSize);
AnnaBridge 156:ff21514d8981 149 HAL_StatusTypeDef HAL_SRAM_Read_DMA(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint32_t *pDstBuffer, uint32_t BufferSize);
AnnaBridge 156:ff21514d8981 150 HAL_StatusTypeDef HAL_SRAM_Write_DMA(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint32_t *pSrcBuffer, uint32_t BufferSize);
AnnaBridge 156:ff21514d8981 151
AnnaBridge 156:ff21514d8981 152 /**
AnnaBridge 156:ff21514d8981 153 * @}
AnnaBridge 156:ff21514d8981 154 */
AnnaBridge 156:ff21514d8981 155
AnnaBridge 156:ff21514d8981 156 /** @addtogroup SRAM_Exported_Functions_Group3
AnnaBridge 156:ff21514d8981 157 * @{
AnnaBridge 156:ff21514d8981 158 */
AnnaBridge 156:ff21514d8981 159
AnnaBridge 156:ff21514d8981 160 /* SRAM Control functions ******************************************************/
AnnaBridge 156:ff21514d8981 161 HAL_StatusTypeDef HAL_SRAM_WriteOperation_Enable(SRAM_HandleTypeDef *hsram);
AnnaBridge 156:ff21514d8981 162 HAL_StatusTypeDef HAL_SRAM_WriteOperation_Disable(SRAM_HandleTypeDef *hsram);
AnnaBridge 156:ff21514d8981 163
AnnaBridge 156:ff21514d8981 164 /**
AnnaBridge 156:ff21514d8981 165 * @}
AnnaBridge 156:ff21514d8981 166 */
AnnaBridge 156:ff21514d8981 167
AnnaBridge 156:ff21514d8981 168 /** @addtogroup SRAM_Exported_Functions_Group4
AnnaBridge 156:ff21514d8981 169 * @{
AnnaBridge 156:ff21514d8981 170 */
AnnaBridge 156:ff21514d8981 171
AnnaBridge 156:ff21514d8981 172 /* SRAM State functions *********************************************************/
AnnaBridge 156:ff21514d8981 173 HAL_SRAM_StateTypeDef HAL_SRAM_GetState(SRAM_HandleTypeDef *hsram);
AnnaBridge 156:ff21514d8981 174
AnnaBridge 156:ff21514d8981 175 /**
AnnaBridge 156:ff21514d8981 176 * @}
AnnaBridge 156:ff21514d8981 177 */
AnnaBridge 156:ff21514d8981 178
AnnaBridge 156:ff21514d8981 179 /**
AnnaBridge 156:ff21514d8981 180 * @}
AnnaBridge 156:ff21514d8981 181 */
AnnaBridge 156:ff21514d8981 182
AnnaBridge 156:ff21514d8981 183 /**
AnnaBridge 156:ff21514d8981 184 * @}
AnnaBridge 156:ff21514d8981 185 */
AnnaBridge 156:ff21514d8981 186
AnnaBridge 156:ff21514d8981 187 #endif /* STM32F101xE || STM32F103xE || STM32F101xG || STM32F103xG || STM32F100xE */
AnnaBridge 156:ff21514d8981 188
AnnaBridge 156:ff21514d8981 189 /**
AnnaBridge 156:ff21514d8981 190 * @}
AnnaBridge 156:ff21514d8981 191 */
AnnaBridge 156:ff21514d8981 192
AnnaBridge 156:ff21514d8981 193 #ifdef __cplusplus
AnnaBridge 156:ff21514d8981 194 }
AnnaBridge 156:ff21514d8981 195 #endif
AnnaBridge 156:ff21514d8981 196
AnnaBridge 156:ff21514d8981 197 #endif /* __STM32F1xx_HAL_SRAM_H */
AnnaBridge 156:ff21514d8981 198
AnnaBridge 156:ff21514d8981 199 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/