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TARGET_NUCLEO_L432KC/TARGET_STM/TARGET_STM32L4/device/stm32l4xx_ll_i2c.h@157:e7ca05fa8600, 2017-11-09 (annotated)

Committer:
AnnaBridge
Date:
Thu Nov 09 11:14:10 2017 +0000
Revision:
157:e7ca05fa8600
Parent:
156:ff21514d8981
Child:
161:aa5281ff4a02
Release 155 of the mbed library.

Who changed what in which revision?

UserRevisionLine numberNew contents of line
AnnaBridge 156:ff21514d8981 1 /**
AnnaBridge 156:ff21514d8981 2 ******************************************************************************
AnnaBridge 156:ff21514d8981 3 * @file stm32l4xx_ll_i2c.h
AnnaBridge 156:ff21514d8981 4 * @author MCD Application Team
AnnaBridge 156:ff21514d8981 5 * @version V1.7.1
AnnaBridge 156:ff21514d8981 6 * @date 21-April-2017
AnnaBridge 156:ff21514d8981 7 * @brief Header file of I2C LL module.
AnnaBridge 156:ff21514d8981 8 ******************************************************************************
AnnaBridge 156:ff21514d8981 9 * @attention
AnnaBridge 156:ff21514d8981 10 *
AnnaBridge 156:ff21514d8981 11 * <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
AnnaBridge 156:ff21514d8981 12 *
AnnaBridge 156:ff21514d8981 13 * Redistribution and use in source and binary forms, with or without modification,
AnnaBridge 156:ff21514d8981 14 * are permitted provided that the following conditions are met:
AnnaBridge 156:ff21514d8981 15 * 1. Redistributions of source code must retain the above copyright notice,
AnnaBridge 156:ff21514d8981 16 * this list of conditions and the following disclaimer.
AnnaBridge 156:ff21514d8981 17 * 2. Redistributions in binary form must reproduce the above copyright notice,
AnnaBridge 156:ff21514d8981 18 * this list of conditions and the following disclaimer in the documentation
AnnaBridge 156:ff21514d8981 19 * and/or other materials provided with the distribution.
AnnaBridge 156:ff21514d8981 20 * 3. Neither the name of STMicroelectronics nor the names of its contributors
AnnaBridge 156:ff21514d8981 21 * may be used to endorse or promote products derived from this software
AnnaBridge 156:ff21514d8981 22 * without specific prior written permission.
AnnaBridge 156:ff21514d8981 23 *
AnnaBridge 156:ff21514d8981 24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
AnnaBridge 156:ff21514d8981 25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
AnnaBridge 156:ff21514d8981 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
AnnaBridge 156:ff21514d8981 27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
AnnaBridge 156:ff21514d8981 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
AnnaBridge 156:ff21514d8981 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
AnnaBridge 156:ff21514d8981 30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
AnnaBridge 156:ff21514d8981 31 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
AnnaBridge 156:ff21514d8981 32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
AnnaBridge 156:ff21514d8981 33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
AnnaBridge 156:ff21514d8981 34 *
AnnaBridge 156:ff21514d8981 35 ******************************************************************************
AnnaBridge 156:ff21514d8981 36 */
AnnaBridge 156:ff21514d8981 37
AnnaBridge 156:ff21514d8981 38 /* Define to prevent recursive inclusion -------------------------------------*/
AnnaBridge 156:ff21514d8981 39 #ifndef __STM32L4xx_LL_I2C_H
AnnaBridge 156:ff21514d8981 40 #define __STM32L4xx_LL_I2C_H
AnnaBridge 156:ff21514d8981 41
AnnaBridge 156:ff21514d8981 42 #ifdef __cplusplus
AnnaBridge 156:ff21514d8981 43 extern "C" {
AnnaBridge 156:ff21514d8981 44 #endif
AnnaBridge 156:ff21514d8981 45
AnnaBridge 156:ff21514d8981 46 /* Includes ------------------------------------------------------------------*/
AnnaBridge 156:ff21514d8981 47 #include "stm32l4xx.h"
AnnaBridge 156:ff21514d8981 48
AnnaBridge 156:ff21514d8981 49 /** @addtogroup STM32L4xx_LL_Driver
AnnaBridge 156:ff21514d8981 50 * @{
AnnaBridge 156:ff21514d8981 51 */
AnnaBridge 156:ff21514d8981 52
AnnaBridge 156:ff21514d8981 53 #if defined (I2C1) || defined (I2C2) || defined (I2C3) || defined (I2C4)
AnnaBridge 156:ff21514d8981 54
AnnaBridge 156:ff21514d8981 55 /** @defgroup I2C_LL I2C
AnnaBridge 156:ff21514d8981 56 * @{
AnnaBridge 156:ff21514d8981 57 */
AnnaBridge 156:ff21514d8981 58
AnnaBridge 156:ff21514d8981 59 /* Private types -------------------------------------------------------------*/
AnnaBridge 156:ff21514d8981 60 /* Private variables ---------------------------------------------------------*/
AnnaBridge 156:ff21514d8981 61
AnnaBridge 156:ff21514d8981 62 /* Private constants ---------------------------------------------------------*/
AnnaBridge 156:ff21514d8981 63 /** @defgroup I2C_LL_Private_Constants I2C Private Constants
AnnaBridge 156:ff21514d8981 64 * @{
AnnaBridge 156:ff21514d8981 65 */
AnnaBridge 156:ff21514d8981 66 /**
AnnaBridge 156:ff21514d8981 67 * @}
AnnaBridge 156:ff21514d8981 68 */
AnnaBridge 156:ff21514d8981 69
AnnaBridge 156:ff21514d8981 70 /* Private macros ------------------------------------------------------------*/
AnnaBridge 156:ff21514d8981 71 #if defined(USE_FULL_LL_DRIVER)
AnnaBridge 156:ff21514d8981 72 /** @defgroup I2C_LL_Private_Macros I2C Private Macros
AnnaBridge 156:ff21514d8981 73 * @{
AnnaBridge 156:ff21514d8981 74 */
AnnaBridge 156:ff21514d8981 75 /**
AnnaBridge 156:ff21514d8981 76 * @}
AnnaBridge 156:ff21514d8981 77 */
AnnaBridge 156:ff21514d8981 78 #endif /*USE_FULL_LL_DRIVER*/
AnnaBridge 156:ff21514d8981 79
AnnaBridge 156:ff21514d8981 80 /* Exported types ------------------------------------------------------------*/
AnnaBridge 156:ff21514d8981 81 #if defined(USE_FULL_LL_DRIVER)
AnnaBridge 156:ff21514d8981 82 /** @defgroup I2C_LL_ES_INIT I2C Exported Init structure
AnnaBridge 156:ff21514d8981 83 * @{
AnnaBridge 156:ff21514d8981 84 */
AnnaBridge 156:ff21514d8981 85 typedef struct
AnnaBridge 156:ff21514d8981 86 {
AnnaBridge 156:ff21514d8981 87 uint32_t PeripheralMode; /*!< Specifies the peripheral mode.
AnnaBridge 156:ff21514d8981 88 This parameter can be a value of @ref I2C_LL_EC_PERIPHERAL_MODE
AnnaBridge 156:ff21514d8981 89
AnnaBridge 156:ff21514d8981 90 This feature can be modified afterwards using unitary function @ref LL_I2C_SetMode(). */
AnnaBridge 156:ff21514d8981 91
AnnaBridge 156:ff21514d8981 92 uint32_t Timing; /*!< Specifies the SDA setup, hold time and the SCL high, low period values.
AnnaBridge 156:ff21514d8981 93 This parameter must be set by referring to the STM32CubeMX Tool and
AnnaBridge 156:ff21514d8981 94 the helper macro @ref __LL_I2C_CONVERT_TIMINGS()
AnnaBridge 156:ff21514d8981 95
AnnaBridge 156:ff21514d8981 96 This feature can be modified afterwards using unitary function @ref LL_I2C_SetTiming(). */
AnnaBridge 156:ff21514d8981 97
AnnaBridge 156:ff21514d8981 98 uint32_t AnalogFilter; /*!< Enables or disables analog noise filter.
AnnaBridge 156:ff21514d8981 99 This parameter can be a value of @ref I2C_LL_EC_ANALOGFILTER_SELECTION
AnnaBridge 156:ff21514d8981 100
AnnaBridge 156:ff21514d8981 101 This feature can be modified afterwards using unitary functions @ref LL_I2C_EnableAnalogFilter() or LL_I2C_DisableAnalogFilter(). */
AnnaBridge 156:ff21514d8981 102
AnnaBridge 156:ff21514d8981 103 uint32_t DigitalFilter; /*!< Configures the digital noise filter.
AnnaBridge 156:ff21514d8981 104 This parameter can be a number between Min_Data = 0x00 and Max_Data = 0x0F
AnnaBridge 156:ff21514d8981 105
AnnaBridge 156:ff21514d8981 106 This feature can be modified afterwards using unitary function @ref LL_I2C_SetDigitalFilter(). */
AnnaBridge 156:ff21514d8981 107
AnnaBridge 156:ff21514d8981 108 uint32_t OwnAddress1; /*!< Specifies the device own address 1.
AnnaBridge 156:ff21514d8981 109 This parameter must be a value between Min_Data = 0x00 and Max_Data = 0x3FF
AnnaBridge 156:ff21514d8981 110
AnnaBridge 156:ff21514d8981 111 This feature can be modified afterwards using unitary function @ref LL_I2C_SetOwnAddress1(). */
AnnaBridge 156:ff21514d8981 112
AnnaBridge 156:ff21514d8981 113 uint32_t TypeAcknowledge; /*!< Specifies the ACKnowledge or Non ACKnowledge condition after the address receive match code or next received byte.
AnnaBridge 156:ff21514d8981 114 This parameter can be a value of @ref I2C_LL_EC_I2C_ACKNOWLEDGE
AnnaBridge 156:ff21514d8981 115
AnnaBridge 156:ff21514d8981 116 This feature can be modified afterwards using unitary function @ref LL_I2C_AcknowledgeNextData(). */
AnnaBridge 156:ff21514d8981 117
AnnaBridge 156:ff21514d8981 118 uint32_t OwnAddrSize; /*!< Specifies the device own address 1 size (7-bit or 10-bit).
AnnaBridge 156:ff21514d8981 119 This parameter can be a value of @ref I2C_LL_EC_OWNADDRESS1
AnnaBridge 156:ff21514d8981 120
AnnaBridge 156:ff21514d8981 121 This feature can be modified afterwards using unitary function @ref LL_I2C_SetOwnAddress1(). */
AnnaBridge 156:ff21514d8981 122 } LL_I2C_InitTypeDef;
AnnaBridge 156:ff21514d8981 123 /**
AnnaBridge 156:ff21514d8981 124 * @}
AnnaBridge 156:ff21514d8981 125 */
AnnaBridge 156:ff21514d8981 126 #endif /*USE_FULL_LL_DRIVER*/
AnnaBridge 156:ff21514d8981 127
AnnaBridge 156:ff21514d8981 128 /* Exported constants --------------------------------------------------------*/
AnnaBridge 156:ff21514d8981 129 /** @defgroup I2C_LL_Exported_Constants I2C Exported Constants
AnnaBridge 156:ff21514d8981 130 * @{
AnnaBridge 156:ff21514d8981 131 */
AnnaBridge 156:ff21514d8981 132
AnnaBridge 156:ff21514d8981 133 /** @defgroup I2C_LL_EC_CLEAR_FLAG Clear Flags Defines
AnnaBridge 156:ff21514d8981 134 * @brief Flags defines which can be used with LL_I2C_WriteReg function
AnnaBridge 156:ff21514d8981 135 * @{
AnnaBridge 156:ff21514d8981 136 */
AnnaBridge 156:ff21514d8981 137 #define LL_I2C_ICR_ADDRCF I2C_ICR_ADDRCF /*!< Address Matched flag */
AnnaBridge 156:ff21514d8981 138 #define LL_I2C_ICR_NACKCF I2C_ICR_NACKCF /*!< Not Acknowledge flag */
AnnaBridge 156:ff21514d8981 139 #define LL_I2C_ICR_STOPCF I2C_ICR_STOPCF /*!< Stop detection flag */
AnnaBridge 156:ff21514d8981 140 #define LL_I2C_ICR_BERRCF I2C_ICR_BERRCF /*!< Bus error flag */
AnnaBridge 156:ff21514d8981 141 #define LL_I2C_ICR_ARLOCF I2C_ICR_ARLOCF /*!< Arbitration Lost flag */
AnnaBridge 156:ff21514d8981 142 #define LL_I2C_ICR_OVRCF I2C_ICR_OVRCF /*!< Overrun/Underrun flag */
AnnaBridge 156:ff21514d8981 143 #define LL_I2C_ICR_PECCF I2C_ICR_PECCF /*!< PEC error flag */
AnnaBridge 156:ff21514d8981 144 #define LL_I2C_ICR_TIMOUTCF I2C_ICR_TIMOUTCF /*!< Timeout detection flag */
AnnaBridge 156:ff21514d8981 145 #define LL_I2C_ICR_ALERTCF I2C_ICR_ALERTCF /*!< Alert flag */
AnnaBridge 156:ff21514d8981 146 /**
AnnaBridge 156:ff21514d8981 147 * @}
AnnaBridge 156:ff21514d8981 148 */
AnnaBridge 156:ff21514d8981 149
AnnaBridge 156:ff21514d8981 150 /** @defgroup I2C_LL_EC_GET_FLAG Get Flags Defines
AnnaBridge 156:ff21514d8981 151 * @brief Flags defines which can be used with LL_I2C_ReadReg function
AnnaBridge 156:ff21514d8981 152 * @{
AnnaBridge 156:ff21514d8981 153 */
AnnaBridge 156:ff21514d8981 154 #define LL_I2C_ISR_TXE I2C_ISR_TXE /*!< Transmit data register empty */
AnnaBridge 156:ff21514d8981 155 #define LL_I2C_ISR_TXIS I2C_ISR_TXIS /*!< Transmit interrupt status */
AnnaBridge 156:ff21514d8981 156 #define LL_I2C_ISR_RXNE I2C_ISR_RXNE /*!< Receive data register not empty */
AnnaBridge 156:ff21514d8981 157 #define LL_I2C_ISR_ADDR I2C_ISR_ADDR /*!< Address matched (slave mode) */
AnnaBridge 156:ff21514d8981 158 #define LL_I2C_ISR_NACKF I2C_ISR_NACKF /*!< Not Acknowledge received flag */
AnnaBridge 156:ff21514d8981 159 #define LL_I2C_ISR_STOPF I2C_ISR_STOPF /*!< Stop detection flag */
AnnaBridge 156:ff21514d8981 160 #define LL_I2C_ISR_TC I2C_ISR_TC /*!< Transfer Complete (master mode) */
AnnaBridge 156:ff21514d8981 161 #define LL_I2C_ISR_TCR I2C_ISR_TCR /*!< Transfer Complete Reload */
AnnaBridge 156:ff21514d8981 162 #define LL_I2C_ISR_BERR I2C_ISR_BERR /*!< Bus error */
AnnaBridge 156:ff21514d8981 163 #define LL_I2C_ISR_ARLO I2C_ISR_ARLO /*!< Arbitration lost */
AnnaBridge 156:ff21514d8981 164 #define LL_I2C_ISR_OVR I2C_ISR_OVR /*!< Overrun/Underrun (slave mode) */
AnnaBridge 156:ff21514d8981 165 #define LL_I2C_ISR_PECERR I2C_ISR_PECERR /*!< PEC Error in reception (SMBus mode) */
AnnaBridge 156:ff21514d8981 166 #define LL_I2C_ISR_TIMEOUT I2C_ISR_TIMEOUT /*!< Timeout detection flag (SMBus mode) */
AnnaBridge 156:ff21514d8981 167 #define LL_I2C_ISR_ALERT I2C_ISR_ALERT /*!< SMBus alert (SMBus mode) */
AnnaBridge 156:ff21514d8981 168 #define LL_I2C_ISR_BUSY I2C_ISR_BUSY /*!< Bus busy */
AnnaBridge 156:ff21514d8981 169 /**
AnnaBridge 156:ff21514d8981 170 * @}
AnnaBridge 156:ff21514d8981 171 */
AnnaBridge 156:ff21514d8981 172
AnnaBridge 156:ff21514d8981 173 /** @defgroup I2C_LL_EC_IT IT Defines
AnnaBridge 156:ff21514d8981 174 * @brief IT defines which can be used with LL_I2C_ReadReg and LL_I2C_WriteReg functions
AnnaBridge 156:ff21514d8981 175 * @{
AnnaBridge 156:ff21514d8981 176 */
AnnaBridge 156:ff21514d8981 177 #define LL_I2C_CR1_TXIE I2C_CR1_TXIE /*!< TX Interrupt enable */
AnnaBridge 156:ff21514d8981 178 #define LL_I2C_CR1_RXIE I2C_CR1_RXIE /*!< RX Interrupt enable */
AnnaBridge 156:ff21514d8981 179 #define LL_I2C_CR1_ADDRIE I2C_CR1_ADDRIE /*!< Address match Interrupt enable (slave only) */
AnnaBridge 156:ff21514d8981 180 #define LL_I2C_CR1_NACKIE I2C_CR1_NACKIE /*!< Not acknowledge received Interrupt enable */
AnnaBridge 156:ff21514d8981 181 #define LL_I2C_CR1_STOPIE I2C_CR1_STOPIE /*!< STOP detection Interrupt enable */
AnnaBridge 156:ff21514d8981 182 #define LL_I2C_CR1_TCIE I2C_CR1_TCIE /*!< Transfer Complete interrupt enable */
AnnaBridge 156:ff21514d8981 183 #define LL_I2C_CR1_ERRIE I2C_CR1_ERRIE /*!< Error interrupts enable */
AnnaBridge 156:ff21514d8981 184 /**
AnnaBridge 156:ff21514d8981 185 * @}
AnnaBridge 156:ff21514d8981 186 */
AnnaBridge 156:ff21514d8981 187
AnnaBridge 156:ff21514d8981 188 /** @defgroup I2C_LL_EC_PERIPHERAL_MODE Peripheral Mode
AnnaBridge 156:ff21514d8981 189 * @{
AnnaBridge 156:ff21514d8981 190 */
AnnaBridge 156:ff21514d8981 191 #define LL_I2C_MODE_I2C 0x00000000U /*!< I2C Master or Slave mode */
AnnaBridge 156:ff21514d8981 192 #define LL_I2C_MODE_SMBUS_HOST I2C_CR1_SMBHEN /*!< SMBus Host address acknowledge */
AnnaBridge 156:ff21514d8981 193 #define LL_I2C_MODE_SMBUS_DEVICE 0x00000000U /*!< SMBus Device default mode (Default address not acknowledge) */
AnnaBridge 156:ff21514d8981 194 #define LL_I2C_MODE_SMBUS_DEVICE_ARP I2C_CR1_SMBDEN /*!< SMBus Device Default address acknowledge */
AnnaBridge 156:ff21514d8981 195 /**
AnnaBridge 156:ff21514d8981 196 * @}
AnnaBridge 156:ff21514d8981 197 */
AnnaBridge 156:ff21514d8981 198
AnnaBridge 156:ff21514d8981 199 /** @defgroup I2C_LL_EC_ANALOGFILTER_SELECTION Analog Filter Selection
AnnaBridge 156:ff21514d8981 200 * @{
AnnaBridge 156:ff21514d8981 201 */
AnnaBridge 156:ff21514d8981 202 #define LL_I2C_ANALOGFILTER_ENABLE 0x00000000U /*!< Analog filter is enabled. */
AnnaBridge 156:ff21514d8981 203 #define LL_I2C_ANALOGFILTER_DISABLE I2C_CR1_ANFOFF /*!< Analog filter is disabled. */
AnnaBridge 156:ff21514d8981 204 /**
AnnaBridge 156:ff21514d8981 205 * @}
AnnaBridge 156:ff21514d8981 206 */
AnnaBridge 156:ff21514d8981 207
AnnaBridge 156:ff21514d8981 208 /** @defgroup I2C_LL_EC_ADDRESSING_MODE Master Addressing Mode
AnnaBridge 156:ff21514d8981 209 * @{
AnnaBridge 156:ff21514d8981 210 */
AnnaBridge 156:ff21514d8981 211 #define LL_I2C_ADDRESSING_MODE_7BIT 0x00000000U /*!< Master operates in 7-bit addressing mode. */
AnnaBridge 156:ff21514d8981 212 #define LL_I2C_ADDRESSING_MODE_10BIT I2C_CR2_ADD10 /*!< Master operates in 10-bit addressing mode.*/
AnnaBridge 156:ff21514d8981 213 /**
AnnaBridge 156:ff21514d8981 214 * @}
AnnaBridge 156:ff21514d8981 215 */
AnnaBridge 156:ff21514d8981 216
AnnaBridge 156:ff21514d8981 217 /** @defgroup I2C_LL_EC_OWNADDRESS1 Own Address 1 Length
AnnaBridge 156:ff21514d8981 218 * @{
AnnaBridge 156:ff21514d8981 219 */
AnnaBridge 156:ff21514d8981 220 #define LL_I2C_OWNADDRESS1_7BIT 0x00000000U /*!< Own address 1 is a 7-bit address. */
AnnaBridge 156:ff21514d8981 221 #define LL_I2C_OWNADDRESS1_10BIT I2C_OAR1_OA1MODE /*!< Own address 1 is a 10-bit address.*/
AnnaBridge 156:ff21514d8981 222 /**
AnnaBridge 156:ff21514d8981 223 * @}
AnnaBridge 156:ff21514d8981 224 */
AnnaBridge 156:ff21514d8981 225
AnnaBridge 156:ff21514d8981 226 /** @defgroup I2C_LL_EC_OWNADDRESS2 Own Address 2 Masks
AnnaBridge 156:ff21514d8981 227 * @{
AnnaBridge 156:ff21514d8981 228 */
AnnaBridge 156:ff21514d8981 229 #define LL_I2C_OWNADDRESS2_NOMASK I2C_OAR2_OA2NOMASK /*!< Own Address2 No mask. */
AnnaBridge 156:ff21514d8981 230 #define LL_I2C_OWNADDRESS2_MASK01 I2C_OAR2_OA2MASK01 /*!< Only Address2 bits[7:2] are compared. */
AnnaBridge 156:ff21514d8981 231 #define LL_I2C_OWNADDRESS2_MASK02 I2C_OAR2_OA2MASK02 /*!< Only Address2 bits[7:3] are compared. */
AnnaBridge 156:ff21514d8981 232 #define LL_I2C_OWNADDRESS2_MASK03 I2C_OAR2_OA2MASK03 /*!< Only Address2 bits[7:4] are compared. */
AnnaBridge 156:ff21514d8981 233 #define LL_I2C_OWNADDRESS2_MASK04 I2C_OAR2_OA2MASK04 /*!< Only Address2 bits[7:5] are compared. */
AnnaBridge 156:ff21514d8981 234 #define LL_I2C_OWNADDRESS2_MASK05 I2C_OAR2_OA2MASK05 /*!< Only Address2 bits[7:6] are compared. */
AnnaBridge 156:ff21514d8981 235 #define LL_I2C_OWNADDRESS2_MASK06 I2C_OAR2_OA2MASK06 /*!< Only Address2 bits[7] are compared. */
AnnaBridge 156:ff21514d8981 236 #define LL_I2C_OWNADDRESS2_MASK07 I2C_OAR2_OA2MASK07 /*!< No comparison is done. All Address2 are acknowledged.*/
AnnaBridge 156:ff21514d8981 237 /**
AnnaBridge 156:ff21514d8981 238 * @}
AnnaBridge 156:ff21514d8981 239 */
AnnaBridge 156:ff21514d8981 240
AnnaBridge 156:ff21514d8981 241 /** @defgroup I2C_LL_EC_I2C_ACKNOWLEDGE Acknowledge Generation
AnnaBridge 156:ff21514d8981 242 * @{
AnnaBridge 156:ff21514d8981 243 */
AnnaBridge 156:ff21514d8981 244 #define LL_I2C_ACK 0x00000000U /*!< ACK is sent after current received byte. */
AnnaBridge 156:ff21514d8981 245 #define LL_I2C_NACK I2C_CR2_NACK /*!< NACK is sent after current received byte.*/
AnnaBridge 156:ff21514d8981 246 /**
AnnaBridge 156:ff21514d8981 247 * @}
AnnaBridge 156:ff21514d8981 248 */
AnnaBridge 156:ff21514d8981 249
AnnaBridge 156:ff21514d8981 250 /** @defgroup I2C_LL_EC_ADDRSLAVE Slave Address Length
AnnaBridge 156:ff21514d8981 251 * @{
AnnaBridge 156:ff21514d8981 252 */
AnnaBridge 156:ff21514d8981 253 #define LL_I2C_ADDRSLAVE_7BIT 0x00000000U /*!< Slave Address in 7-bit. */
AnnaBridge 156:ff21514d8981 254 #define LL_I2C_ADDRSLAVE_10BIT I2C_CR2_ADD10 /*!< Slave Address in 10-bit.*/
AnnaBridge 156:ff21514d8981 255 /**
AnnaBridge 156:ff21514d8981 256 * @}
AnnaBridge 156:ff21514d8981 257 */
AnnaBridge 156:ff21514d8981 258
AnnaBridge 156:ff21514d8981 259 /** @defgroup I2C_LL_EC_REQUEST Transfer Request Direction
AnnaBridge 156:ff21514d8981 260 * @{
AnnaBridge 156:ff21514d8981 261 */
AnnaBridge 156:ff21514d8981 262 #define LL_I2C_REQUEST_WRITE 0x00000000U /*!< Master request a write transfer. */
AnnaBridge 156:ff21514d8981 263 #define LL_I2C_REQUEST_READ I2C_CR2_RD_WRN /*!< Master request a read transfer. */
AnnaBridge 156:ff21514d8981 264 /**
AnnaBridge 156:ff21514d8981 265 * @}
AnnaBridge 156:ff21514d8981 266 */
AnnaBridge 156:ff21514d8981 267
AnnaBridge 156:ff21514d8981 268 /** @defgroup I2C_LL_EC_MODE Transfer End Mode
AnnaBridge 156:ff21514d8981 269 * @{
AnnaBridge 156:ff21514d8981 270 */
AnnaBridge 156:ff21514d8981 271 #define LL_I2C_MODE_RELOAD I2C_CR2_RELOAD /*!< Enable I2C Reload mode. */
AnnaBridge 156:ff21514d8981 272 #define LL_I2C_MODE_AUTOEND I2C_CR2_AUTOEND /*!< Enable I2C Automatic end mode with no HW PEC comparison. */
AnnaBridge 156:ff21514d8981 273 #define LL_I2C_MODE_SOFTEND 0x00000000U /*!< Enable I2C Software end mode with no HW PEC comparison. */
AnnaBridge 156:ff21514d8981 274 #define LL_I2C_MODE_SMBUS_RELOAD LL_I2C_MODE_RELOAD /*!< Enable SMBUS Automatic end mode with HW PEC comparison. */
AnnaBridge 156:ff21514d8981 275 #define LL_I2C_MODE_SMBUS_AUTOEND_NO_PEC LL_I2C_MODE_AUTOEND /*!< Enable SMBUS Automatic end mode with HW PEC comparison. */
AnnaBridge 156:ff21514d8981 276 #define LL_I2C_MODE_SMBUS_SOFTEND_NO_PEC LL_I2C_MODE_SOFTEND /*!< Enable SMBUS Software end mode with HW PEC comparison. */
AnnaBridge 156:ff21514d8981 277 #define LL_I2C_MODE_SMBUS_AUTOEND_WITH_PEC (uint32_t)(LL_I2C_MODE_AUTOEND | I2C_CR2_PECBYTE) /*!< Enable SMBUS Automatic end mode with HW PEC comparison. */
AnnaBridge 156:ff21514d8981 278 #define LL_I2C_MODE_SMBUS_SOFTEND_WITH_PEC (uint32_t)(LL_I2C_MODE_SOFTEND | I2C_CR2_PECBYTE) /*!< Enable SMBUS Software end mode with HW PEC comparison. */
AnnaBridge 156:ff21514d8981 279 /**
AnnaBridge 156:ff21514d8981 280 * @}
AnnaBridge 156:ff21514d8981 281 */
AnnaBridge 156:ff21514d8981 282
AnnaBridge 156:ff21514d8981 283 /** @defgroup I2C_LL_EC_GENERATE Start And Stop Generation
AnnaBridge 156:ff21514d8981 284 * @{
AnnaBridge 156:ff21514d8981 285 */
AnnaBridge 156:ff21514d8981 286 #define LL_I2C_GENERATE_NOSTARTSTOP 0x00000000U /*!< Don't Generate Stop and Start condition. */
AnnaBridge 156:ff21514d8981 287 #define LL_I2C_GENERATE_STOP I2C_CR2_STOP /*!< Generate Stop condition (Size should be set to 0). */
AnnaBridge 156:ff21514d8981 288 #define LL_I2C_GENERATE_START_READ (uint32_t)(I2C_CR2_START | I2C_CR2_RD_WRN) /*!< Generate Start for read request. */
AnnaBridge 156:ff21514d8981 289 #define LL_I2C_GENERATE_START_WRITE I2C_CR2_START /*!< Generate Start for write request. */
AnnaBridge 156:ff21514d8981 290 #define LL_I2C_GENERATE_RESTART_7BIT_READ (uint32_t)(I2C_CR2_START | I2C_CR2_RD_WRN) /*!< Generate Restart for read request, slave 7Bit address. */
AnnaBridge 156:ff21514d8981 291 #define LL_I2C_GENERATE_RESTART_7BIT_WRITE I2C_CR2_START /*!< Generate Restart for write request, slave 7Bit address. */
AnnaBridge 156:ff21514d8981 292 #define LL_I2C_GENERATE_RESTART_10BIT_READ (uint32_t)(I2C_CR2_START | I2C_CR2_RD_WRN | I2C_CR2_HEAD10R) /*!< Generate Restart for read request, slave 10Bit address. */
AnnaBridge 156:ff21514d8981 293 #define LL_I2C_GENERATE_RESTART_10BIT_WRITE I2C_CR2_START /*!< Generate Restart for write request, slave 10Bit address.*/
AnnaBridge 156:ff21514d8981 294 /**
AnnaBridge 156:ff21514d8981 295 * @}
AnnaBridge 156:ff21514d8981 296 */
AnnaBridge 156:ff21514d8981 297
AnnaBridge 156:ff21514d8981 298 /** @defgroup I2C_LL_EC_DIRECTION Read Write Direction
AnnaBridge 156:ff21514d8981 299 * @{
AnnaBridge 156:ff21514d8981 300 */
AnnaBridge 156:ff21514d8981 301 #define LL_I2C_DIRECTION_WRITE 0x00000000U /*!< Write transfer request by master, slave enters receiver mode. */
AnnaBridge 156:ff21514d8981 302 #define LL_I2C_DIRECTION_READ I2C_ISR_DIR /*!< Read transfer request by master, slave enters transmitter mode.*/
AnnaBridge 156:ff21514d8981 303 /**
AnnaBridge 156:ff21514d8981 304 * @}
AnnaBridge 156:ff21514d8981 305 */
AnnaBridge 156:ff21514d8981 306
AnnaBridge 156:ff21514d8981 307 /** @defgroup I2C_LL_EC_DMA_REG_DATA DMA Register Data
AnnaBridge 156:ff21514d8981 308 * @{
AnnaBridge 156:ff21514d8981 309 */
AnnaBridge 156:ff21514d8981 310 #define LL_I2C_DMA_REG_DATA_TRANSMIT 0x00000000U /*!< Get address of data register used for transmission */
AnnaBridge 156:ff21514d8981 311 #define LL_I2C_DMA_REG_DATA_RECEIVE 0x00000001U /*!< Get address of data register used for reception */
AnnaBridge 156:ff21514d8981 312 /**
AnnaBridge 156:ff21514d8981 313 * @}
AnnaBridge 156:ff21514d8981 314 */
AnnaBridge 156:ff21514d8981 315
AnnaBridge 156:ff21514d8981 316 /** @defgroup I2C_LL_EC_SMBUS_TIMEOUTA_MODE SMBus TimeoutA Mode SCL SDA Timeout
AnnaBridge 156:ff21514d8981 317 * @{
AnnaBridge 156:ff21514d8981 318 */
AnnaBridge 156:ff21514d8981 319 #define LL_I2C_SMBUS_TIMEOUTA_MODE_SCL_LOW 0x00000000U /*!< TimeoutA is used to detect SCL low level timeout. */
AnnaBridge 156:ff21514d8981 320 #define LL_I2C_SMBUS_TIMEOUTA_MODE_SDA_SCL_HIGH I2C_TIMEOUTR_TIDLE /*!< TimeoutA is used to detect both SCL and SDA high level timeout.*/
AnnaBridge 156:ff21514d8981 321 /**
AnnaBridge 156:ff21514d8981 322 * @}
AnnaBridge 156:ff21514d8981 323 */
AnnaBridge 156:ff21514d8981 324
AnnaBridge 156:ff21514d8981 325 /** @defgroup I2C_LL_EC_SMBUS_TIMEOUT_SELECTION SMBus Timeout Selection
AnnaBridge 156:ff21514d8981 326 * @{
AnnaBridge 156:ff21514d8981 327 */
AnnaBridge 156:ff21514d8981 328 #define LL_I2C_SMBUS_TIMEOUTA I2C_TIMEOUTR_TIMOUTEN /*!< TimeoutA enable bit */
AnnaBridge 156:ff21514d8981 329 #define LL_I2C_SMBUS_TIMEOUTB I2C_TIMEOUTR_TEXTEN /*!< TimeoutB (extended clock) enable bit */
AnnaBridge 156:ff21514d8981 330 #define LL_I2C_SMBUS_ALL_TIMEOUT (uint32_t)(I2C_TIMEOUTR_TIMOUTEN | I2C_TIMEOUTR_TEXTEN) /*!< TimeoutA and TimeoutB (extended clock) enable bits */
AnnaBridge 156:ff21514d8981 331 /**
AnnaBridge 156:ff21514d8981 332 * @}
AnnaBridge 156:ff21514d8981 333 */
AnnaBridge 156:ff21514d8981 334
AnnaBridge 156:ff21514d8981 335 /**
AnnaBridge 156:ff21514d8981 336 * @}
AnnaBridge 156:ff21514d8981 337 */
AnnaBridge 156:ff21514d8981 338
AnnaBridge 156:ff21514d8981 339 /* Exported macro ------------------------------------------------------------*/
AnnaBridge 156:ff21514d8981 340 /** @defgroup I2C_LL_Exported_Macros I2C Exported Macros
AnnaBridge 156:ff21514d8981 341 * @{
AnnaBridge 156:ff21514d8981 342 */
AnnaBridge 156:ff21514d8981 343
AnnaBridge 156:ff21514d8981 344 /** @defgroup I2C_LL_EM_WRITE_READ Common Write and read registers Macros
AnnaBridge 156:ff21514d8981 345 * @{
AnnaBridge 156:ff21514d8981 346 */
AnnaBridge 156:ff21514d8981 347
AnnaBridge 156:ff21514d8981 348 /**
AnnaBridge 156:ff21514d8981 349 * @brief Write a value in I2C register
AnnaBridge 156:ff21514d8981 350 * @param __INSTANCE__ I2C Instance
AnnaBridge 156:ff21514d8981 351 * @param __REG__ Register to be written
AnnaBridge 156:ff21514d8981 352 * @param __VALUE__ Value to be written in the register
AnnaBridge 156:ff21514d8981 353 * @retval None
AnnaBridge 156:ff21514d8981 354 */
AnnaBridge 156:ff21514d8981 355 #define LL_I2C_WriteReg(__INSTANCE__, __REG__, __VALUE__) WRITE_REG(__INSTANCE__->__REG__, (__VALUE__))
AnnaBridge 156:ff21514d8981 356
AnnaBridge 156:ff21514d8981 357 /**
AnnaBridge 156:ff21514d8981 358 * @brief Read a value in I2C register
AnnaBridge 156:ff21514d8981 359 * @param __INSTANCE__ I2C Instance
AnnaBridge 156:ff21514d8981 360 * @param __REG__ Register to be read
AnnaBridge 156:ff21514d8981 361 * @retval Register value
AnnaBridge 156:ff21514d8981 362 */
AnnaBridge 156:ff21514d8981 363 #define LL_I2C_ReadReg(__INSTANCE__, __REG__) READ_REG(__INSTANCE__->__REG__)
AnnaBridge 156:ff21514d8981 364 /**
AnnaBridge 156:ff21514d8981 365 * @}
AnnaBridge 156:ff21514d8981 366 */
AnnaBridge 156:ff21514d8981 367
AnnaBridge 156:ff21514d8981 368 /** @defgroup I2C_LL_EM_CONVERT_TIMINGS Convert SDA SCL timings
AnnaBridge 156:ff21514d8981 369 * @{
AnnaBridge 156:ff21514d8981 370 */
AnnaBridge 156:ff21514d8981 371 /**
AnnaBridge 156:ff21514d8981 372 * @brief Configure the SDA setup, hold time and the SCL high, low period.
AnnaBridge 156:ff21514d8981 373 * @param __PRESCALER__ This parameter must be a value between Min_Data=0 and Max_Data=0xF.
AnnaBridge 156:ff21514d8981 374 * @param __DATA_SETUP_TIME__ This parameter must be a value between Min_Data=0 and Max_Data=0xF. (tscldel = (SCLDEL+1)xtpresc)
AnnaBridge 156:ff21514d8981 375 * @param __DATA_HOLD_TIME__ This parameter must be a value between Min_Data=0 and Max_Data=0xF. (tsdadel = SDADELxtpresc)
AnnaBridge 156:ff21514d8981 376 * @param __CLOCK_HIGH_PERIOD__ This parameter must be a value between Min_Data=0 and Max_Data=0xFF. (tsclh = (SCLH+1)xtpresc)
AnnaBridge 156:ff21514d8981 377 * @param __CLOCK_LOW_PERIOD__ This parameter must be a value between Min_Data=0 and Max_Data=0xFF. (tscll = (SCLL+1)xtpresc)
AnnaBridge 156:ff21514d8981 378 * @retval Value between Min_Data=0 and Max_Data=0xFFFFFFFF
AnnaBridge 156:ff21514d8981 379 */
AnnaBridge 156:ff21514d8981 380 #define __LL_I2C_CONVERT_TIMINGS(__PRESCALER__, __DATA_SETUP_TIME__, __DATA_HOLD_TIME__, __CLOCK_HIGH_PERIOD__, __CLOCK_LOW_PERIOD__) \
AnnaBridge 156:ff21514d8981 381 ((((uint32_t)(__PRESCALER__) << I2C_TIMINGR_PRESC_Pos) & I2C_TIMINGR_PRESC) | \
AnnaBridge 156:ff21514d8981 382 (((uint32_t)(__DATA_SETUP_TIME__) << I2C_TIMINGR_SCLDEL_Pos) & I2C_TIMINGR_SCLDEL) | \
AnnaBridge 156:ff21514d8981 383 (((uint32_t)(__DATA_HOLD_TIME__) << I2C_TIMINGR_SDADEL_Pos) & I2C_TIMINGR_SDADEL) | \
AnnaBridge 156:ff21514d8981 384 (((uint32_t)(__CLOCK_HIGH_PERIOD__) << I2C_TIMINGR_SCLH_Pos) & I2C_TIMINGR_SCLH) | \
AnnaBridge 156:ff21514d8981 385 (((uint32_t)(__CLOCK_LOW_PERIOD__) << I2C_TIMINGR_SCLL_Pos) & I2C_TIMINGR_SCLL))
AnnaBridge 156:ff21514d8981 386 /**
AnnaBridge 156:ff21514d8981 387 * @}
AnnaBridge 156:ff21514d8981 388 */
AnnaBridge 156:ff21514d8981 389
AnnaBridge 156:ff21514d8981 390 /**
AnnaBridge 156:ff21514d8981 391 * @}
AnnaBridge 156:ff21514d8981 392 */
AnnaBridge 156:ff21514d8981 393
AnnaBridge 156:ff21514d8981 394 /* Exported functions --------------------------------------------------------*/
AnnaBridge 156:ff21514d8981 395 /** @defgroup I2C_LL_Exported_Functions I2C Exported Functions
AnnaBridge 156:ff21514d8981 396 * @{
AnnaBridge 156:ff21514d8981 397 */
AnnaBridge 156:ff21514d8981 398
AnnaBridge 156:ff21514d8981 399 /** @defgroup I2C_LL_EF_Configuration Configuration
AnnaBridge 156:ff21514d8981 400 * @{
AnnaBridge 156:ff21514d8981 401 */
AnnaBridge 156:ff21514d8981 402
AnnaBridge 156:ff21514d8981 403 /**
AnnaBridge 156:ff21514d8981 404 * @brief Enable I2C peripheral (PE = 1).
AnnaBridge 156:ff21514d8981 405 * @rmtoll CR1 PE LL_I2C_Enable
AnnaBridge 156:ff21514d8981 406 * @param I2Cx I2C Instance.
AnnaBridge 156:ff21514d8981 407 * @retval None
AnnaBridge 156:ff21514d8981 408 */
AnnaBridge 156:ff21514d8981 409 __STATIC_INLINE void LL_I2C_Enable(I2C_TypeDef *I2Cx)
AnnaBridge 156:ff21514d8981 410 {
AnnaBridge 156:ff21514d8981 411 SET_BIT(I2Cx->CR1, I2C_CR1_PE);
AnnaBridge 156:ff21514d8981 412 }
AnnaBridge 156:ff21514d8981 413
AnnaBridge 156:ff21514d8981 414 /**
AnnaBridge 156:ff21514d8981 415 * @brief Disable I2C peripheral (PE = 0).
AnnaBridge 156:ff21514d8981 416 * @note When PE = 0, the I2C SCL and SDA lines are released.
AnnaBridge 156:ff21514d8981 417 * Internal state machines and status bits are put back to their reset value.
AnnaBridge 156:ff21514d8981 418 * When cleared, PE must be kept low for at least 3 APB clock cycles.
AnnaBridge 156:ff21514d8981 419 * @rmtoll CR1 PE LL_I2C_Disable
AnnaBridge 156:ff21514d8981 420 * @param I2Cx I2C Instance.
AnnaBridge 156:ff21514d8981 421 * @retval None
AnnaBridge 156:ff21514d8981 422 */
AnnaBridge 156:ff21514d8981 423 __STATIC_INLINE void LL_I2C_Disable(I2C_TypeDef *I2Cx)
AnnaBridge 156:ff21514d8981 424 {
AnnaBridge 156:ff21514d8981 425 CLEAR_BIT(I2Cx->CR1, I2C_CR1_PE);
AnnaBridge 156:ff21514d8981 426 }
AnnaBridge 156:ff21514d8981 427
AnnaBridge 156:ff21514d8981 428 /**
AnnaBridge 156:ff21514d8981 429 * @brief Check if the I2C peripheral is enabled or disabled.
AnnaBridge 156:ff21514d8981 430 * @rmtoll CR1 PE LL_I2C_IsEnabled
AnnaBridge 156:ff21514d8981 431 * @param I2Cx I2C Instance.
AnnaBridge 156:ff21514d8981 432 * @retval State of bit (1 or 0).
AnnaBridge 156:ff21514d8981 433 */
AnnaBridge 156:ff21514d8981 434 __STATIC_INLINE uint32_t LL_I2C_IsEnabled(I2C_TypeDef *I2Cx)
AnnaBridge 156:ff21514d8981 435 {
AnnaBridge 156:ff21514d8981 436 return (READ_BIT(I2Cx->CR1, I2C_CR1_PE) == (I2C_CR1_PE));
AnnaBridge 156:ff21514d8981 437 }
AnnaBridge 156:ff21514d8981 438
AnnaBridge 156:ff21514d8981 439 /**
AnnaBridge 156:ff21514d8981 440 * @brief Configure Noise Filters (Analog and Digital).
AnnaBridge 156:ff21514d8981 441 * @note If the analog filter is also enabled, the digital filter is added to analog filter.
AnnaBridge 156:ff21514d8981 442 * The filters can only be programmed when the I2C is disabled (PE = 0).
AnnaBridge 156:ff21514d8981 443 * @rmtoll CR1 ANFOFF LL_I2C_ConfigFilters\n
AnnaBridge 156:ff21514d8981 444 * CR1 DNF LL_I2C_ConfigFilters
AnnaBridge 156:ff21514d8981 445 * @param I2Cx I2C Instance.
AnnaBridge 156:ff21514d8981 446 * @param AnalogFilter This parameter can be one of the following values:
AnnaBridge 156:ff21514d8981 447 * @arg @ref LL_I2C_ANALOGFILTER_ENABLE
AnnaBridge 156:ff21514d8981 448 * @arg @ref LL_I2C_ANALOGFILTER_DISABLE
AnnaBridge 156:ff21514d8981 449 * @param DigitalFilter This parameter must be a value between Min_Data=0x00 (Digital filter disabled) and Max_Data=0x0F (Digital filter enabled and filtering capability up to 15*ti2cclk).
AnnaBridge 156:ff21514d8981 450 * This parameter is used to configure the digital noise filter on SDA and SCL input.
AnnaBridge 156:ff21514d8981 451 * The digital filter will filter spikes with a length of up to DNF[3:0]*ti2cclk.
AnnaBridge 156:ff21514d8981 452 * @retval None
AnnaBridge 156:ff21514d8981 453 */
AnnaBridge 156:ff21514d8981 454 __STATIC_INLINE void LL_I2C_ConfigFilters(I2C_TypeDef *I2Cx, uint32_t AnalogFilter, uint32_t DigitalFilter)
AnnaBridge 156:ff21514d8981 455 {
AnnaBridge 156:ff21514d8981 456 MODIFY_REG(I2Cx->CR1, I2C_CR1_ANFOFF | I2C_CR1_DNF, AnalogFilter | (DigitalFilter << I2C_CR1_DNF_Pos));
AnnaBridge 156:ff21514d8981 457 }
AnnaBridge 156:ff21514d8981 458
AnnaBridge 156:ff21514d8981 459 /**
AnnaBridge 156:ff21514d8981 460 * @brief Configure Digital Noise Filter.
AnnaBridge 156:ff21514d8981 461 * @note If the analog filter is also enabled, the digital filter is added to analog filter.
AnnaBridge 156:ff21514d8981 462 * This filter can only be programmed when the I2C is disabled (PE = 0).
AnnaBridge 156:ff21514d8981 463 * @rmtoll CR1 DNF LL_I2C_SetDigitalFilter
AnnaBridge 156:ff21514d8981 464 * @param I2Cx I2C Instance.
AnnaBridge 156:ff21514d8981 465 * @param DigitalFilter This parameter must be a value between Min_Data=0x00 (Digital filter disabled) and Max_Data=0x0F (Digital filter enabled and filtering capability up to 15*ti2cclk).
AnnaBridge 156:ff21514d8981 466 * This parameter is used to configure the digital noise filter on SDA and SCL input.
AnnaBridge 156:ff21514d8981 467 * The digital filter will filter spikes with a length of up to DNF[3:0]*ti2cclk.
AnnaBridge 156:ff21514d8981 468 * @retval None
AnnaBridge 156:ff21514d8981 469 */
AnnaBridge 156:ff21514d8981 470 __STATIC_INLINE void LL_I2C_SetDigitalFilter(I2C_TypeDef *I2Cx, uint32_t DigitalFilter)
AnnaBridge 156:ff21514d8981 471 {
AnnaBridge 156:ff21514d8981 472 MODIFY_REG(I2Cx->CR1, I2C_CR1_DNF, DigitalFilter << I2C_CR1_DNF_Pos);
AnnaBridge 156:ff21514d8981 473 }
AnnaBridge 156:ff21514d8981 474
AnnaBridge 156:ff21514d8981 475 /**
AnnaBridge 156:ff21514d8981 476 * @brief Get the current Digital Noise Filter configuration.
AnnaBridge 156:ff21514d8981 477 * @rmtoll CR1 DNF LL_I2C_GetDigitalFilter
AnnaBridge 156:ff21514d8981 478 * @param I2Cx I2C Instance.
AnnaBridge 156:ff21514d8981 479 * @retval Value between Min_Data=0x0 and Max_Data=0xF
AnnaBridge 156:ff21514d8981 480 */
AnnaBridge 156:ff21514d8981 481 __STATIC_INLINE uint32_t LL_I2C_GetDigitalFilter(I2C_TypeDef *I2Cx)
AnnaBridge 156:ff21514d8981 482 {
AnnaBridge 156:ff21514d8981 483 return (uint32_t)(READ_BIT(I2Cx->CR1, I2C_CR1_DNF) >> I2C_CR1_DNF_Pos);
AnnaBridge 156:ff21514d8981 484 }
AnnaBridge 156:ff21514d8981 485
AnnaBridge 156:ff21514d8981 486 /**
AnnaBridge 156:ff21514d8981 487 * @brief Enable Analog Noise Filter.
AnnaBridge 156:ff21514d8981 488 * @note This filter can only be programmed when the I2C is disabled (PE = 0).
AnnaBridge 156:ff21514d8981 489 * @rmtoll CR1 ANFOFF LL_I2C_EnableAnalogFilter
AnnaBridge 156:ff21514d8981 490 * @param I2Cx I2C Instance.
AnnaBridge 156:ff21514d8981 491 * @retval None
AnnaBridge 156:ff21514d8981 492 */
AnnaBridge 156:ff21514d8981 493 __STATIC_INLINE void LL_I2C_EnableAnalogFilter(I2C_TypeDef *I2Cx)
AnnaBridge 156:ff21514d8981 494 {
AnnaBridge 156:ff21514d8981 495 CLEAR_BIT(I2Cx->CR1, I2C_CR1_ANFOFF);
AnnaBridge 156:ff21514d8981 496 }
AnnaBridge 156:ff21514d8981 497
AnnaBridge 156:ff21514d8981 498 /**
AnnaBridge 156:ff21514d8981 499 * @brief Disable Analog Noise Filter.
AnnaBridge 156:ff21514d8981 500 * @note This filter can only be programmed when the I2C is disabled (PE = 0).
AnnaBridge 156:ff21514d8981 501 * @rmtoll CR1 ANFOFF LL_I2C_DisableAnalogFilter
AnnaBridge 156:ff21514d8981 502 * @param I2Cx I2C Instance.
AnnaBridge 156:ff21514d8981 503 * @retval None
AnnaBridge 156:ff21514d8981 504 */
AnnaBridge 156:ff21514d8981 505 __STATIC_INLINE void LL_I2C_DisableAnalogFilter(I2C_TypeDef *I2Cx)
AnnaBridge 156:ff21514d8981 506 {
AnnaBridge 156:ff21514d8981 507 SET_BIT(I2Cx->CR1, I2C_CR1_ANFOFF);
AnnaBridge 156:ff21514d8981 508 }
AnnaBridge 156:ff21514d8981 509
AnnaBridge 156:ff21514d8981 510 /**
AnnaBridge 156:ff21514d8981 511 * @brief Check if Analog Noise Filter is enabled or disabled.
AnnaBridge 156:ff21514d8981 512 * @rmtoll CR1 ANFOFF LL_I2C_IsEnabledAnalogFilter
AnnaBridge 156:ff21514d8981 513 * @param I2Cx I2C Instance.
AnnaBridge 156:ff21514d8981 514 * @retval State of bit (1 or 0).
AnnaBridge 156:ff21514d8981 515 */
AnnaBridge 156:ff21514d8981 516 __STATIC_INLINE uint32_t LL_I2C_IsEnabledAnalogFilter(I2C_TypeDef *I2Cx)
AnnaBridge 156:ff21514d8981 517 {
AnnaBridge 156:ff21514d8981 518 return (READ_BIT(I2Cx->CR1, I2C_CR1_ANFOFF) != (I2C_CR1_ANFOFF));
AnnaBridge 156:ff21514d8981 519 }
AnnaBridge 156:ff21514d8981 520
AnnaBridge 156:ff21514d8981 521 /**
AnnaBridge 156:ff21514d8981 522 * @brief Enable DMA transmission requests.
AnnaBridge 156:ff21514d8981 523 * @rmtoll CR1 TXDMAEN LL_I2C_EnableDMAReq_TX
AnnaBridge 156:ff21514d8981 524 * @param I2Cx I2C Instance.
AnnaBridge 156:ff21514d8981 525 * @retval None
AnnaBridge 156:ff21514d8981 526 */
AnnaBridge 156:ff21514d8981 527 __STATIC_INLINE void LL_I2C_EnableDMAReq_TX(I2C_TypeDef *I2Cx)
AnnaBridge 156:ff21514d8981 528 {
AnnaBridge 156:ff21514d8981 529 SET_BIT(I2Cx->CR1, I2C_CR1_TXDMAEN);
AnnaBridge 156:ff21514d8981 530 }
AnnaBridge 156:ff21514d8981 531
AnnaBridge 156:ff21514d8981 532 /**
AnnaBridge 156:ff21514d8981 533 * @brief Disable DMA transmission requests.
AnnaBridge 156:ff21514d8981 534 * @rmtoll CR1 TXDMAEN LL_I2C_DisableDMAReq_TX
AnnaBridge 156:ff21514d8981 535 * @param I2Cx I2C Instance.
AnnaBridge 156:ff21514d8981 536 * @retval None
AnnaBridge 156:ff21514d8981 537 */
AnnaBridge 156:ff21514d8981 538 __STATIC_INLINE void LL_I2C_DisableDMAReq_TX(I2C_TypeDef *I2Cx)
AnnaBridge 156:ff21514d8981 539 {
AnnaBridge 156:ff21514d8981 540 CLEAR_BIT(I2Cx->CR1, I2C_CR1_TXDMAEN);
AnnaBridge 156:ff21514d8981 541 }
AnnaBridge 156:ff21514d8981 542
AnnaBridge 156:ff21514d8981 543 /**
AnnaBridge 156:ff21514d8981 544 * @brief Check if DMA transmission requests are enabled or disabled.
AnnaBridge 156:ff21514d8981 545 * @rmtoll CR1 TXDMAEN LL_I2C_IsEnabledDMAReq_TX
AnnaBridge 156:ff21514d8981 546 * @param I2Cx I2C Instance.
AnnaBridge 156:ff21514d8981 547 * @retval State of bit (1 or 0).
AnnaBridge 156:ff21514d8981 548 */
AnnaBridge 156:ff21514d8981 549 __STATIC_INLINE uint32_t LL_I2C_IsEnabledDMAReq_TX(I2C_TypeDef *I2Cx)
AnnaBridge 156:ff21514d8981 550 {
AnnaBridge 156:ff21514d8981 551 return (READ_BIT(I2Cx->CR1, I2C_CR1_TXDMAEN) == (I2C_CR1_TXDMAEN));
AnnaBridge 156:ff21514d8981 552 }
AnnaBridge 156:ff21514d8981 553
AnnaBridge 156:ff21514d8981 554 /**
AnnaBridge 156:ff21514d8981 555 * @brief Enable DMA reception requests.
AnnaBridge 156:ff21514d8981 556 * @rmtoll CR1 RXDMAEN LL_I2C_EnableDMAReq_RX
AnnaBridge 156:ff21514d8981 557 * @param I2Cx I2C Instance.
AnnaBridge 156:ff21514d8981 558 * @retval None
AnnaBridge 156:ff21514d8981 559 */
AnnaBridge 156:ff21514d8981 560 __STATIC_INLINE void LL_I2C_EnableDMAReq_RX(I2C_TypeDef *I2Cx)
AnnaBridge 156:ff21514d8981 561 {
AnnaBridge 156:ff21514d8981 562 SET_BIT(I2Cx->CR1, I2C_CR1_RXDMAEN);
AnnaBridge 156:ff21514d8981 563 }
AnnaBridge 156:ff21514d8981 564
AnnaBridge 156:ff21514d8981 565 /**
AnnaBridge 156:ff21514d8981 566 * @brief Disable DMA reception requests.
AnnaBridge 156:ff21514d8981 567 * @rmtoll CR1 RXDMAEN LL_I2C_DisableDMAReq_RX
AnnaBridge 156:ff21514d8981 568 * @param I2Cx I2C Instance.
AnnaBridge 156:ff21514d8981 569 * @retval None
AnnaBridge 156:ff21514d8981 570 */
AnnaBridge 156:ff21514d8981 571 __STATIC_INLINE void LL_I2C_DisableDMAReq_RX(I2C_TypeDef *I2Cx)
AnnaBridge 156:ff21514d8981 572 {
AnnaBridge 156:ff21514d8981 573 CLEAR_BIT(I2Cx->CR1, I2C_CR1_RXDMAEN);
AnnaBridge 156:ff21514d8981 574 }
AnnaBridge 156:ff21514d8981 575
AnnaBridge 156:ff21514d8981 576 /**
AnnaBridge 156:ff21514d8981 577 * @brief Check if DMA reception requests are enabled or disabled.
AnnaBridge 156:ff21514d8981 578 * @rmtoll CR1 RXDMAEN LL_I2C_IsEnabledDMAReq_RX
AnnaBridge 156:ff21514d8981 579 * @param I2Cx I2C Instance.
AnnaBridge 156:ff21514d8981 580 * @retval State of bit (1 or 0).
AnnaBridge 156:ff21514d8981 581 */
AnnaBridge 156:ff21514d8981 582 __STATIC_INLINE uint32_t LL_I2C_IsEnabledDMAReq_RX(I2C_TypeDef *I2Cx)
AnnaBridge 156:ff21514d8981 583 {
AnnaBridge 156:ff21514d8981 584 return (READ_BIT(I2Cx->CR1, I2C_CR1_RXDMAEN) == (I2C_CR1_RXDMAEN));
AnnaBridge 156:ff21514d8981 585 }
AnnaBridge 156:ff21514d8981 586
AnnaBridge 156:ff21514d8981 587 /**
AnnaBridge 156:ff21514d8981 588 * @brief Get the data register address used for DMA transfer
AnnaBridge 156:ff21514d8981 589 * @rmtoll TXDR TXDATA LL_I2C_DMA_GetRegAddr\n
AnnaBridge 156:ff21514d8981 590 * RXDR RXDATA LL_I2C_DMA_GetRegAddr
AnnaBridge 156:ff21514d8981 591 * @param I2Cx I2C Instance
AnnaBridge 156:ff21514d8981 592 * @param Direction This parameter can be one of the following values:
AnnaBridge 156:ff21514d8981 593 * @arg @ref LL_I2C_DMA_REG_DATA_TRANSMIT
AnnaBridge 156:ff21514d8981 594 * @arg @ref LL_I2C_DMA_REG_DATA_RECEIVE
AnnaBridge 156:ff21514d8981 595 * @retval Address of data register
AnnaBridge 156:ff21514d8981 596 */
AnnaBridge 156:ff21514d8981 597 __STATIC_INLINE uint32_t LL_I2C_DMA_GetRegAddr(I2C_TypeDef *I2Cx, uint32_t Direction)
AnnaBridge 156:ff21514d8981 598 {
AnnaBridge 156:ff21514d8981 599 register uint32_t data_reg_addr = 0U;
AnnaBridge 156:ff21514d8981 600
AnnaBridge 156:ff21514d8981 601 if (Direction == LL_I2C_DMA_REG_DATA_TRANSMIT)
AnnaBridge 156:ff21514d8981 602 {
AnnaBridge 156:ff21514d8981 603 /* return address of TXDR register */
AnnaBridge 156:ff21514d8981 604 data_reg_addr = (uint32_t) & (I2Cx->TXDR);
AnnaBridge 156:ff21514d8981 605 }
AnnaBridge 156:ff21514d8981 606 else
AnnaBridge 156:ff21514d8981 607 {
AnnaBridge 156:ff21514d8981 608 /* return address of RXDR register */
AnnaBridge 156:ff21514d8981 609 data_reg_addr = (uint32_t) & (I2Cx->RXDR);
AnnaBridge 156:ff21514d8981 610 }
AnnaBridge 156:ff21514d8981 611
AnnaBridge 156:ff21514d8981 612 return data_reg_addr;
AnnaBridge 156:ff21514d8981 613 }
AnnaBridge 156:ff21514d8981 614
AnnaBridge 156:ff21514d8981 615 /**
AnnaBridge 156:ff21514d8981 616 * @brief Enable Clock stretching.
AnnaBridge 156:ff21514d8981 617 * @note This bit can only be programmed when the I2C is disabled (PE = 0).
AnnaBridge 156:ff21514d8981 618 * @rmtoll CR1 NOSTRETCH LL_I2C_EnableClockStretching
AnnaBridge 156:ff21514d8981 619 * @param I2Cx I2C Instance.
AnnaBridge 156:ff21514d8981 620 * @retval None
AnnaBridge 156:ff21514d8981 621 */
AnnaBridge 156:ff21514d8981 622 __STATIC_INLINE void LL_I2C_EnableClockStretching(I2C_TypeDef *I2Cx)
AnnaBridge 156:ff21514d8981 623 {
AnnaBridge 156:ff21514d8981 624 CLEAR_BIT(I2Cx->CR1, I2C_CR1_NOSTRETCH);
AnnaBridge 156:ff21514d8981 625 }
AnnaBridge 156:ff21514d8981 626
AnnaBridge 156:ff21514d8981 627 /**
AnnaBridge 156:ff21514d8981 628 * @brief Disable Clock stretching.
AnnaBridge 156:ff21514d8981 629 * @note This bit can only be programmed when the I2C is disabled (PE = 0).
AnnaBridge 156:ff21514d8981 630 * @rmtoll CR1 NOSTRETCH LL_I2C_DisableClockStretching
AnnaBridge 156:ff21514d8981 631 * @param I2Cx I2C Instance.
AnnaBridge 156:ff21514d8981 632 * @retval None
AnnaBridge 156:ff21514d8981 633 */
AnnaBridge 156:ff21514d8981 634 __STATIC_INLINE void LL_I2C_DisableClockStretching(I2C_TypeDef *I2Cx)
AnnaBridge 156:ff21514d8981 635 {
AnnaBridge 156:ff21514d8981 636 SET_BIT(I2Cx->CR1, I2C_CR1_NOSTRETCH);
AnnaBridge 156:ff21514d8981 637 }
AnnaBridge 156:ff21514d8981 638
AnnaBridge 156:ff21514d8981 639 /**
AnnaBridge 156:ff21514d8981 640 * @brief Check if Clock stretching is enabled or disabled.
AnnaBridge 156:ff21514d8981 641 * @rmtoll CR1 NOSTRETCH LL_I2C_IsEnabledClockStretching
AnnaBridge 156:ff21514d8981 642 * @param I2Cx I2C Instance.
AnnaBridge 156:ff21514d8981 643 * @retval State of bit (1 or 0).
AnnaBridge 156:ff21514d8981 644 */
AnnaBridge 156:ff21514d8981 645 __STATIC_INLINE uint32_t LL_I2C_IsEnabledClockStretching(I2C_TypeDef *I2Cx)
AnnaBridge 156:ff21514d8981 646 {
AnnaBridge 156:ff21514d8981 647 return (READ_BIT(I2Cx->CR1, I2C_CR1_NOSTRETCH) != (I2C_CR1_NOSTRETCH));
AnnaBridge 156:ff21514d8981 648 }
AnnaBridge 156:ff21514d8981 649
AnnaBridge 156:ff21514d8981 650 /**
AnnaBridge 156:ff21514d8981 651 * @brief Enable hardware byte control in slave mode.
AnnaBridge 156:ff21514d8981 652 * @rmtoll CR1 SBC LL_I2C_EnableSlaveByteControl
AnnaBridge 156:ff21514d8981 653 * @param I2Cx I2C Instance.
AnnaBridge 156:ff21514d8981 654 * @retval None
AnnaBridge 156:ff21514d8981 655 */
AnnaBridge 156:ff21514d8981 656 __STATIC_INLINE void LL_I2C_EnableSlaveByteControl(I2C_TypeDef *I2Cx)
AnnaBridge 156:ff21514d8981 657 {
AnnaBridge 156:ff21514d8981 658 SET_BIT(I2Cx->CR1, I2C_CR1_SBC);
AnnaBridge 156:ff21514d8981 659 }
AnnaBridge 156:ff21514d8981 660
AnnaBridge 156:ff21514d8981 661 /**
AnnaBridge 156:ff21514d8981 662 * @brief Disable hardware byte control in slave mode.
AnnaBridge 156:ff21514d8981 663 * @rmtoll CR1 SBC LL_I2C_DisableSlaveByteControl
AnnaBridge 156:ff21514d8981 664 * @param I2Cx I2C Instance.
AnnaBridge 156:ff21514d8981 665 * @retval None
AnnaBridge 156:ff21514d8981 666 */
AnnaBridge 156:ff21514d8981 667 __STATIC_INLINE void LL_I2C_DisableSlaveByteControl(I2C_TypeDef *I2Cx)
AnnaBridge 156:ff21514d8981 668 {
AnnaBridge 156:ff21514d8981 669 CLEAR_BIT(I2Cx->CR1, I2C_CR1_SBC);
AnnaBridge 156:ff21514d8981 670 }
AnnaBridge 156:ff21514d8981 671
AnnaBridge 156:ff21514d8981 672 /**
AnnaBridge 156:ff21514d8981 673 * @brief Check if hardware byte control in slave mode is enabled or disabled.
AnnaBridge 156:ff21514d8981 674 * @rmtoll CR1 SBC LL_I2C_IsEnabledSlaveByteControl
AnnaBridge 156:ff21514d8981 675 * @param I2Cx I2C Instance.
AnnaBridge 156:ff21514d8981 676 * @retval State of bit (1 or 0).
AnnaBridge 156:ff21514d8981 677 */
AnnaBridge 156:ff21514d8981 678 __STATIC_INLINE uint32_t LL_I2C_IsEnabledSlaveByteControl(I2C_TypeDef *I2Cx)
AnnaBridge 156:ff21514d8981 679 {
AnnaBridge 156:ff21514d8981 680 return (READ_BIT(I2Cx->CR1, I2C_CR1_SBC) == (I2C_CR1_SBC));
AnnaBridge 156:ff21514d8981 681 }
AnnaBridge 156:ff21514d8981 682
AnnaBridge 156:ff21514d8981 683 /**
AnnaBridge 156:ff21514d8981 684 * @brief Enable Wakeup from STOP.
AnnaBridge 156:ff21514d8981 685 * @note Macro @ref IS_I2C_WAKEUP_FROMSTOP_INSTANCE(I2Cx) can be used to check whether or not
AnnaBridge 156:ff21514d8981 686 * WakeUpFromStop feature is supported by the I2Cx Instance.
AnnaBridge 156:ff21514d8981 687 * @note This bit can only be programmed when Digital Filter is disabled.
AnnaBridge 156:ff21514d8981 688 * @rmtoll CR1 WUPEN LL_I2C_EnableWakeUpFromStop
AnnaBridge 156:ff21514d8981 689 * @param I2Cx I2C Instance.
AnnaBridge 156:ff21514d8981 690 * @retval None
AnnaBridge 156:ff21514d8981 691 */
AnnaBridge 156:ff21514d8981 692 __STATIC_INLINE void LL_I2C_EnableWakeUpFromStop(I2C_TypeDef *I2Cx)
AnnaBridge 156:ff21514d8981 693 {
AnnaBridge 156:ff21514d8981 694 SET_BIT(I2Cx->CR1, I2C_CR1_WUPEN);
AnnaBridge 156:ff21514d8981 695 }
AnnaBridge 156:ff21514d8981 696
AnnaBridge 156:ff21514d8981 697 /**
AnnaBridge 156:ff21514d8981 698 * @brief Disable Wakeup from STOP.
AnnaBridge 156:ff21514d8981 699 * @note Macro @ref IS_I2C_WAKEUP_FROMSTOP_INSTANCE(I2Cx) can be used to check whether or not
AnnaBridge 156:ff21514d8981 700 * WakeUpFromStop feature is supported by the I2Cx Instance.
AnnaBridge 156:ff21514d8981 701 * @rmtoll CR1 WUPEN LL_I2C_DisableWakeUpFromStop
AnnaBridge 156:ff21514d8981 702 * @param I2Cx I2C Instance.
AnnaBridge 156:ff21514d8981 703 * @retval None
AnnaBridge 156:ff21514d8981 704 */
AnnaBridge 156:ff21514d8981 705 __STATIC_INLINE void LL_I2C_DisableWakeUpFromStop(I2C_TypeDef *I2Cx)
AnnaBridge 156:ff21514d8981 706 {
AnnaBridge 156:ff21514d8981 707 CLEAR_BIT(I2Cx->CR1, I2C_CR1_WUPEN);
AnnaBridge 156:ff21514d8981 708 }
AnnaBridge 156:ff21514d8981 709
AnnaBridge 156:ff21514d8981 710 /**
AnnaBridge 156:ff21514d8981 711 * @brief Check if Wakeup from STOP is enabled or disabled.
AnnaBridge 156:ff21514d8981 712 * @note Macro @ref IS_I2C_WAKEUP_FROMSTOP_INSTANCE(I2Cx) can be used to check whether or not
AnnaBridge 156:ff21514d8981 713 * WakeUpFromStop feature is supported by the I2Cx Instance.
AnnaBridge 156:ff21514d8981 714 * @rmtoll CR1 WUPEN LL_I2C_IsEnabledWakeUpFromStop
AnnaBridge 156:ff21514d8981 715 * @param I2Cx I2C Instance.
AnnaBridge 156:ff21514d8981 716 * @retval State of bit (1 or 0).
AnnaBridge 156:ff21514d8981 717 */
AnnaBridge 156:ff21514d8981 718 __STATIC_INLINE uint32_t LL_I2C_IsEnabledWakeUpFromStop(I2C_TypeDef *I2Cx)
AnnaBridge 156:ff21514d8981 719 {
AnnaBridge 156:ff21514d8981 720 return (READ_BIT(I2Cx->CR1, I2C_CR1_WUPEN) == (I2C_CR1_WUPEN));
AnnaBridge 156:ff21514d8981 721 }
AnnaBridge 156:ff21514d8981 722
AnnaBridge 156:ff21514d8981 723 /**
AnnaBridge 156:ff21514d8981 724 * @brief Enable General Call.
AnnaBridge 156:ff21514d8981 725 * @note When enabled the Address 0x00 is ACKed.
AnnaBridge 156:ff21514d8981 726 * @rmtoll CR1 GCEN LL_I2C_EnableGeneralCall
AnnaBridge 156:ff21514d8981 727 * @param I2Cx I2C Instance.
AnnaBridge 156:ff21514d8981 728 * @retval None
AnnaBridge 156:ff21514d8981 729 */
AnnaBridge 156:ff21514d8981 730 __STATIC_INLINE void LL_I2C_EnableGeneralCall(I2C_TypeDef *I2Cx)
AnnaBridge 156:ff21514d8981 731 {
AnnaBridge 156:ff21514d8981 732 SET_BIT(I2Cx->CR1, I2C_CR1_GCEN);
AnnaBridge 156:ff21514d8981 733 }
AnnaBridge 156:ff21514d8981 734
AnnaBridge 156:ff21514d8981 735 /**
AnnaBridge 156:ff21514d8981 736 * @brief Disable General Call.
AnnaBridge 156:ff21514d8981 737 * @note When disabled the Address 0x00 is NACKed.
AnnaBridge 156:ff21514d8981 738 * @rmtoll CR1 GCEN LL_I2C_DisableGeneralCall
AnnaBridge 156:ff21514d8981 739 * @param I2Cx I2C Instance.
AnnaBridge 156:ff21514d8981 740 * @retval None
AnnaBridge 156:ff21514d8981 741 */
AnnaBridge 156:ff21514d8981 742 __STATIC_INLINE void LL_I2C_DisableGeneralCall(I2C_TypeDef *I2Cx)
AnnaBridge 156:ff21514d8981 743 {
AnnaBridge 156:ff21514d8981 744 CLEAR_BIT(I2Cx->CR1, I2C_CR1_GCEN);
AnnaBridge 156:ff21514d8981 745 }
AnnaBridge 156:ff21514d8981 746
AnnaBridge 156:ff21514d8981 747 /**
AnnaBridge 156:ff21514d8981 748 * @brief Check if General Call is enabled or disabled.
AnnaBridge 156:ff21514d8981 749 * @rmtoll CR1 GCEN LL_I2C_IsEnabledGeneralCall
AnnaBridge 156:ff21514d8981 750 * @param I2Cx I2C Instance.
AnnaBridge 156:ff21514d8981 751 * @retval State of bit (1 or 0).
AnnaBridge 156:ff21514d8981 752 */
AnnaBridge 156:ff21514d8981 753 __STATIC_INLINE uint32_t LL_I2C_IsEnabledGeneralCall(I2C_TypeDef *I2Cx)
AnnaBridge 156:ff21514d8981 754 {
AnnaBridge 156:ff21514d8981 755 return (READ_BIT(I2Cx->CR1, I2C_CR1_GCEN) == (I2C_CR1_GCEN));
AnnaBridge 156:ff21514d8981 756 }
AnnaBridge 156:ff21514d8981 757
AnnaBridge 156:ff21514d8981 758 /**
AnnaBridge 156:ff21514d8981 759 * @brief Configure the Master to operate in 7-bit or 10-bit addressing mode.
AnnaBridge 156:ff21514d8981 760 * @note Changing this bit is not allowed, when the START bit is set.
AnnaBridge 156:ff21514d8981 761 * @rmtoll CR2 ADD10 LL_I2C_SetMasterAddressingMode
AnnaBridge 156:ff21514d8981 762 * @param I2Cx I2C Instance.
AnnaBridge 156:ff21514d8981 763 * @param AddressingMode This parameter can be one of the following values:
AnnaBridge 156:ff21514d8981 764 * @arg @ref LL_I2C_ADDRESSING_MODE_7BIT
AnnaBridge 156:ff21514d8981 765 * @arg @ref LL_I2C_ADDRESSING_MODE_10BIT
AnnaBridge 156:ff21514d8981 766 * @retval None
AnnaBridge 156:ff21514d8981 767 */
AnnaBridge 156:ff21514d8981 768 __STATIC_INLINE void LL_I2C_SetMasterAddressingMode(I2C_TypeDef *I2Cx, uint32_t AddressingMode)
AnnaBridge 156:ff21514d8981 769 {
AnnaBridge 156:ff21514d8981 770 MODIFY_REG(I2Cx->CR2, I2C_CR2_ADD10, AddressingMode);
AnnaBridge 156:ff21514d8981 771 }
AnnaBridge 156:ff21514d8981 772
AnnaBridge 156:ff21514d8981 773 /**
AnnaBridge 156:ff21514d8981 774 * @brief Get the Master addressing mode.
AnnaBridge 156:ff21514d8981 775 * @rmtoll CR2 ADD10 LL_I2C_GetMasterAddressingMode
AnnaBridge 156:ff21514d8981 776 * @param I2Cx I2C Instance.
AnnaBridge 156:ff21514d8981 777 * @retval Returned value can be one of the following values:
AnnaBridge 156:ff21514d8981 778 * @arg @ref LL_I2C_ADDRESSING_MODE_7BIT
AnnaBridge 156:ff21514d8981 779 * @arg @ref LL_I2C_ADDRESSING_MODE_10BIT
AnnaBridge 156:ff21514d8981 780 */
AnnaBridge 156:ff21514d8981 781 __STATIC_INLINE uint32_t LL_I2C_GetMasterAddressingMode(I2C_TypeDef *I2Cx)
AnnaBridge 156:ff21514d8981 782 {
AnnaBridge 156:ff21514d8981 783 return (uint32_t)(READ_BIT(I2Cx->CR2, I2C_CR2_ADD10));
AnnaBridge 156:ff21514d8981 784 }
AnnaBridge 156:ff21514d8981 785
AnnaBridge 156:ff21514d8981 786 /**
AnnaBridge 156:ff21514d8981 787 * @brief Set the Own Address1.
AnnaBridge 156:ff21514d8981 788 * @rmtoll OAR1 OA1 LL_I2C_SetOwnAddress1\n
AnnaBridge 156:ff21514d8981 789 * OAR1 OA1MODE LL_I2C_SetOwnAddress1
AnnaBridge 156:ff21514d8981 790 * @param I2Cx I2C Instance.
AnnaBridge 156:ff21514d8981 791 * @param OwnAddress1 This parameter must be a value between Min_Data=0 and Max_Data=0x3FF.
AnnaBridge 156:ff21514d8981 792 * @param OwnAddrSize This parameter can be one of the following values:
AnnaBridge 156:ff21514d8981 793 * @arg @ref LL_I2C_OWNADDRESS1_7BIT
AnnaBridge 156:ff21514d8981 794 * @arg @ref LL_I2C_OWNADDRESS1_10BIT
AnnaBridge 156:ff21514d8981 795 * @retval None
AnnaBridge 156:ff21514d8981 796 */
AnnaBridge 156:ff21514d8981 797 __STATIC_INLINE void LL_I2C_SetOwnAddress1(I2C_TypeDef *I2Cx, uint32_t OwnAddress1, uint32_t OwnAddrSize)
AnnaBridge 156:ff21514d8981 798 {
AnnaBridge 156:ff21514d8981 799 MODIFY_REG(I2Cx->OAR1, I2C_OAR1_OA1 | I2C_OAR1_OA1MODE, OwnAddress1 | OwnAddrSize);
AnnaBridge 156:ff21514d8981 800 }
AnnaBridge 156:ff21514d8981 801
AnnaBridge 156:ff21514d8981 802 /**
AnnaBridge 156:ff21514d8981 803 * @brief Enable acknowledge on Own Address1 match address.
AnnaBridge 156:ff21514d8981 804 * @rmtoll OAR1 OA1EN LL_I2C_EnableOwnAddress1
AnnaBridge 156:ff21514d8981 805 * @param I2Cx I2C Instance.
AnnaBridge 156:ff21514d8981 806 * @retval None
AnnaBridge 156:ff21514d8981 807 */
AnnaBridge 156:ff21514d8981 808 __STATIC_INLINE void LL_I2C_EnableOwnAddress1(I2C_TypeDef *I2Cx)
AnnaBridge 156:ff21514d8981 809 {
AnnaBridge 156:ff21514d8981 810 SET_BIT(I2Cx->OAR1, I2C_OAR1_OA1EN);
AnnaBridge 156:ff21514d8981 811 }
AnnaBridge 156:ff21514d8981 812
AnnaBridge 156:ff21514d8981 813 /**
AnnaBridge 156:ff21514d8981 814 * @brief Disable acknowledge on Own Address1 match address.
AnnaBridge 156:ff21514d8981 815 * @rmtoll OAR1 OA1EN LL_I2C_DisableOwnAddress1
AnnaBridge 156:ff21514d8981 816 * @param I2Cx I2C Instance.
AnnaBridge 156:ff21514d8981 817 * @retval None
AnnaBridge 156:ff21514d8981 818 */
AnnaBridge 156:ff21514d8981 819 __STATIC_INLINE void LL_I2C_DisableOwnAddress1(I2C_TypeDef *I2Cx)
AnnaBridge 156:ff21514d8981 820 {
AnnaBridge 156:ff21514d8981 821 CLEAR_BIT(I2Cx->OAR1, I2C_OAR1_OA1EN);
AnnaBridge 156:ff21514d8981 822 }
AnnaBridge 156:ff21514d8981 823
AnnaBridge 156:ff21514d8981 824 /**
AnnaBridge 156:ff21514d8981 825 * @brief Check if Own Address1 acknowledge is enabled or disabled.
AnnaBridge 156:ff21514d8981 826 * @rmtoll OAR1 OA1EN LL_I2C_IsEnabledOwnAddress1
AnnaBridge 156:ff21514d8981 827 * @param I2Cx I2C Instance.
AnnaBridge 156:ff21514d8981 828 * @retval State of bit (1 or 0).
AnnaBridge 156:ff21514d8981 829 */
AnnaBridge 156:ff21514d8981 830 __STATIC_INLINE uint32_t LL_I2C_IsEnabledOwnAddress1(I2C_TypeDef *I2Cx)
AnnaBridge 156:ff21514d8981 831 {
AnnaBridge 156:ff21514d8981 832 return (READ_BIT(I2Cx->OAR1, I2C_OAR1_OA1EN) == (I2C_OAR1_OA1EN));
AnnaBridge 156:ff21514d8981 833 }
AnnaBridge 156:ff21514d8981 834
AnnaBridge 156:ff21514d8981 835 /**
AnnaBridge 156:ff21514d8981 836 * @brief Set the 7bits Own Address2.
AnnaBridge 156:ff21514d8981 837 * @note This action has no effect if own address2 is enabled.
AnnaBridge 156:ff21514d8981 838 * @rmtoll OAR2 OA2 LL_I2C_SetOwnAddress2\n
AnnaBridge 156:ff21514d8981 839 * OAR2 OA2MSK LL_I2C_SetOwnAddress2
AnnaBridge 156:ff21514d8981 840 * @param I2Cx I2C Instance.
AnnaBridge 156:ff21514d8981 841 * @param OwnAddress2 Value between Min_Data=0 and Max_Data=0x7F.
AnnaBridge 156:ff21514d8981 842 * @param OwnAddrMask This parameter can be one of the following values:
AnnaBridge 156:ff21514d8981 843 * @arg @ref LL_I2C_OWNADDRESS2_NOMASK
AnnaBridge 156:ff21514d8981 844 * @arg @ref LL_I2C_OWNADDRESS2_MASK01
AnnaBridge 156:ff21514d8981 845 * @arg @ref LL_I2C_OWNADDRESS2_MASK02
AnnaBridge 156:ff21514d8981 846 * @arg @ref LL_I2C_OWNADDRESS2_MASK03
AnnaBridge 156:ff21514d8981 847 * @arg @ref LL_I2C_OWNADDRESS2_MASK04
AnnaBridge 156:ff21514d8981 848 * @arg @ref LL_I2C_OWNADDRESS2_MASK05
AnnaBridge 156:ff21514d8981 849 * @arg @ref LL_I2C_OWNADDRESS2_MASK06
AnnaBridge 156:ff21514d8981 850 * @arg @ref LL_I2C_OWNADDRESS2_MASK07
AnnaBridge 156:ff21514d8981 851 * @retval None
AnnaBridge 156:ff21514d8981 852 */
AnnaBridge 156:ff21514d8981 853 __STATIC_INLINE void LL_I2C_SetOwnAddress2(I2C_TypeDef *I2Cx, uint32_t OwnAddress2, uint32_t OwnAddrMask)
AnnaBridge 156:ff21514d8981 854 {
AnnaBridge 156:ff21514d8981 855 MODIFY_REG(I2Cx->OAR2, I2C_OAR2_OA2 | I2C_OAR2_OA2MSK, OwnAddress2 | OwnAddrMask);
AnnaBridge 156:ff21514d8981 856 }
AnnaBridge 156:ff21514d8981 857
AnnaBridge 156:ff21514d8981 858 /**
AnnaBridge 156:ff21514d8981 859 * @brief Enable acknowledge on Own Address2 match address.
AnnaBridge 156:ff21514d8981 860 * @rmtoll OAR2 OA2EN LL_I2C_EnableOwnAddress2
AnnaBridge 156:ff21514d8981 861 * @param I2Cx I2C Instance.
AnnaBridge 156:ff21514d8981 862 * @retval None
AnnaBridge 156:ff21514d8981 863 */
AnnaBridge 156:ff21514d8981 864 __STATIC_INLINE void LL_I2C_EnableOwnAddress2(I2C_TypeDef *I2Cx)
AnnaBridge 156:ff21514d8981 865 {
AnnaBridge 156:ff21514d8981 866 SET_BIT(I2Cx->OAR2, I2C_OAR2_OA2EN);
AnnaBridge 156:ff21514d8981 867 }
AnnaBridge 156:ff21514d8981 868
AnnaBridge 156:ff21514d8981 869 /**
AnnaBridge 156:ff21514d8981 870 * @brief Disable acknowledge on Own Address2 match address.
AnnaBridge 156:ff21514d8981 871 * @rmtoll OAR2 OA2EN LL_I2C_DisableOwnAddress2
AnnaBridge 156:ff21514d8981 872 * @param I2Cx I2C Instance.
AnnaBridge 156:ff21514d8981 873 * @retval None
AnnaBridge 156:ff21514d8981 874 */
AnnaBridge 156:ff21514d8981 875 __STATIC_INLINE void LL_I2C_DisableOwnAddress2(I2C_TypeDef *I2Cx)
AnnaBridge 156:ff21514d8981 876 {
AnnaBridge 156:ff21514d8981 877 CLEAR_BIT(I2Cx->OAR2, I2C_OAR2_OA2EN);
AnnaBridge 156:ff21514d8981 878 }
AnnaBridge 156:ff21514d8981 879
AnnaBridge 156:ff21514d8981 880 /**
AnnaBridge 156:ff21514d8981 881 * @brief Check if Own Address1 acknowledge is enabled or disabled.
AnnaBridge 156:ff21514d8981 882 * @rmtoll OAR2 OA2EN LL_I2C_IsEnabledOwnAddress2
AnnaBridge 156:ff21514d8981 883 * @param I2Cx I2C Instance.
AnnaBridge 156:ff21514d8981 884 * @retval State of bit (1 or 0).
AnnaBridge 156:ff21514d8981 885 */
AnnaBridge 156:ff21514d8981 886 __STATIC_INLINE uint32_t LL_I2C_IsEnabledOwnAddress2(I2C_TypeDef *I2Cx)
AnnaBridge 156:ff21514d8981 887 {
AnnaBridge 156:ff21514d8981 888 return (READ_BIT(I2Cx->OAR2, I2C_OAR2_OA2EN) == (I2C_OAR2_OA2EN));
AnnaBridge 156:ff21514d8981 889 }
AnnaBridge 156:ff21514d8981 890
AnnaBridge 156:ff21514d8981 891 /**
AnnaBridge 156:ff21514d8981 892 * @brief Configure the SDA setup, hold time and the SCL high, low period.
AnnaBridge 156:ff21514d8981 893 * @note This bit can only be programmed when the I2C is disabled (PE = 0).
AnnaBridge 156:ff21514d8981 894 * @rmtoll TIMINGR TIMINGR LL_I2C_SetTiming
AnnaBridge 156:ff21514d8981 895 * @param I2Cx I2C Instance.
AnnaBridge 156:ff21514d8981 896 * @param Timing This parameter must be a value between Min_Data=0 and Max_Data=0xFFFFFFFF.
AnnaBridge 156:ff21514d8981 897 * @note This parameter is computed with the STM32CubeMX Tool.
AnnaBridge 156:ff21514d8981 898 * @retval None
AnnaBridge 156:ff21514d8981 899 */
AnnaBridge 156:ff21514d8981 900 __STATIC_INLINE void LL_I2C_SetTiming(I2C_TypeDef *I2Cx, uint32_t Timing)
AnnaBridge 156:ff21514d8981 901 {
AnnaBridge 156:ff21514d8981 902 WRITE_REG(I2Cx->TIMINGR, Timing);
AnnaBridge 156:ff21514d8981 903 }
AnnaBridge 156:ff21514d8981 904
AnnaBridge 156:ff21514d8981 905 /**
AnnaBridge 156:ff21514d8981 906 * @brief Get the Timing Prescaler setting.
AnnaBridge 156:ff21514d8981 907 * @rmtoll TIMINGR PRESC LL_I2C_GetTimingPrescaler
AnnaBridge 156:ff21514d8981 908 * @param I2Cx I2C Instance.
AnnaBridge 156:ff21514d8981 909 * @retval Value between Min_Data=0x0 and Max_Data=0xF
AnnaBridge 156:ff21514d8981 910 */
AnnaBridge 156:ff21514d8981 911 __STATIC_INLINE uint32_t LL_I2C_GetTimingPrescaler(I2C_TypeDef *I2Cx)
AnnaBridge 156:ff21514d8981 912 {
AnnaBridge 156:ff21514d8981 913 return (uint32_t)(READ_BIT(I2Cx->TIMINGR, I2C_TIMINGR_PRESC) >> I2C_TIMINGR_PRESC_Pos);
AnnaBridge 156:ff21514d8981 914 }
AnnaBridge 156:ff21514d8981 915
AnnaBridge 156:ff21514d8981 916 /**
AnnaBridge 156:ff21514d8981 917 * @brief Get the SCL low period setting.
AnnaBridge 156:ff21514d8981 918 * @rmtoll TIMINGR SCLL LL_I2C_GetClockLowPeriod
AnnaBridge 156:ff21514d8981 919 * @param I2Cx I2C Instance.
AnnaBridge 156:ff21514d8981 920 * @retval Value between Min_Data=0x00 and Max_Data=0xFF
AnnaBridge 156:ff21514d8981 921 */
AnnaBridge 156:ff21514d8981 922 __STATIC_INLINE uint32_t LL_I2C_GetClockLowPeriod(I2C_TypeDef *I2Cx)
AnnaBridge 156:ff21514d8981 923 {
AnnaBridge 156:ff21514d8981 924 return (uint32_t)(READ_BIT(I2Cx->TIMINGR, I2C_TIMINGR_SCLL) >> I2C_TIMINGR_SCLL_Pos);
AnnaBridge 156:ff21514d8981 925 }
AnnaBridge 156:ff21514d8981 926
AnnaBridge 156:ff21514d8981 927 /**
AnnaBridge 156:ff21514d8981 928 * @brief Get the SCL high period setting.
AnnaBridge 156:ff21514d8981 929 * @rmtoll TIMINGR SCLH LL_I2C_GetClockHighPeriod
AnnaBridge 156:ff21514d8981 930 * @param I2Cx I2C Instance.
AnnaBridge 156:ff21514d8981 931 * @retval Value between Min_Data=0x00 and Max_Data=0xFF
AnnaBridge 156:ff21514d8981 932 */
AnnaBridge 156:ff21514d8981 933 __STATIC_INLINE uint32_t LL_I2C_GetClockHighPeriod(I2C_TypeDef *I2Cx)
AnnaBridge 156:ff21514d8981 934 {
AnnaBridge 156:ff21514d8981 935 return (uint32_t)(READ_BIT(I2Cx->TIMINGR, I2C_TIMINGR_SCLH) >> I2C_TIMINGR_SCLH_Pos);
AnnaBridge 156:ff21514d8981 936 }
AnnaBridge 156:ff21514d8981 937
AnnaBridge 156:ff21514d8981 938 /**
AnnaBridge 156:ff21514d8981 939 * @brief Get the SDA hold time.
AnnaBridge 156:ff21514d8981 940 * @rmtoll TIMINGR SDADEL LL_I2C_GetDataHoldTime
AnnaBridge 156:ff21514d8981 941 * @param I2Cx I2C Instance.
AnnaBridge 156:ff21514d8981 942 * @retval Value between Min_Data=0x0 and Max_Data=0xF
AnnaBridge 156:ff21514d8981 943 */
AnnaBridge 156:ff21514d8981 944 __STATIC_INLINE uint32_t LL_I2C_GetDataHoldTime(I2C_TypeDef *I2Cx)
AnnaBridge 156:ff21514d8981 945 {
AnnaBridge 156:ff21514d8981 946 return (uint32_t)(READ_BIT(I2Cx->TIMINGR, I2C_TIMINGR_SDADEL) >> I2C_TIMINGR_SDADEL_Pos);
AnnaBridge 156:ff21514d8981 947 }
AnnaBridge 156:ff21514d8981 948
AnnaBridge 156:ff21514d8981 949 /**
AnnaBridge 156:ff21514d8981 950 * @brief Get the SDA setup time.
AnnaBridge 156:ff21514d8981 951 * @rmtoll TIMINGR SCLDEL LL_I2C_GetDataSetupTime
AnnaBridge 156:ff21514d8981 952 * @param I2Cx I2C Instance.
AnnaBridge 156:ff21514d8981 953 * @retval Value between Min_Data=0x0 and Max_Data=0xF
AnnaBridge 156:ff21514d8981 954 */
AnnaBridge 156:ff21514d8981 955 __STATIC_INLINE uint32_t LL_I2C_GetDataSetupTime(I2C_TypeDef *I2Cx)
AnnaBridge 156:ff21514d8981 956 {
AnnaBridge 156:ff21514d8981 957 return (uint32_t)(READ_BIT(I2Cx->TIMINGR, I2C_TIMINGR_SCLDEL) >> I2C_TIMINGR_SCLDEL_Pos);
AnnaBridge 156:ff21514d8981 958 }
AnnaBridge 156:ff21514d8981 959
AnnaBridge 156:ff21514d8981 960 /**
AnnaBridge 156:ff21514d8981 961 * @brief Configure peripheral mode.
AnnaBridge 156:ff21514d8981 962 * @note Macro @ref IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
AnnaBridge 156:ff21514d8981 963 * SMBus feature is supported by the I2Cx Instance.
AnnaBridge 156:ff21514d8981 964 * @rmtoll CR1 SMBHEN LL_I2C_SetMode\n
AnnaBridge 156:ff21514d8981 965 * CR1 SMBDEN LL_I2C_SetMode
AnnaBridge 156:ff21514d8981 966 * @param I2Cx I2C Instance.
AnnaBridge 156:ff21514d8981 967 * @param PeripheralMode This parameter can be one of the following values:
AnnaBridge 156:ff21514d8981 968 * @arg @ref LL_I2C_MODE_I2C
AnnaBridge 156:ff21514d8981 969 * @arg @ref LL_I2C_MODE_SMBUS_HOST
AnnaBridge 156:ff21514d8981 970 * @arg @ref LL_I2C_MODE_SMBUS_DEVICE
AnnaBridge 156:ff21514d8981 971 * @arg @ref LL_I2C_MODE_SMBUS_DEVICE_ARP
AnnaBridge 156:ff21514d8981 972 * @retval None
AnnaBridge 156:ff21514d8981 973 */
AnnaBridge 156:ff21514d8981 974 __STATIC_INLINE void LL_I2C_SetMode(I2C_TypeDef *I2Cx, uint32_t PeripheralMode)
AnnaBridge 156:ff21514d8981 975 {
AnnaBridge 156:ff21514d8981 976 MODIFY_REG(I2Cx->CR1, I2C_CR1_SMBHEN | I2C_CR1_SMBDEN, PeripheralMode);
AnnaBridge 156:ff21514d8981 977 }
AnnaBridge 156:ff21514d8981 978
AnnaBridge 156:ff21514d8981 979 /**
AnnaBridge 156:ff21514d8981 980 * @brief Get peripheral mode.
AnnaBridge 156:ff21514d8981 981 * @note Macro @ref IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
AnnaBridge 156:ff21514d8981 982 * SMBus feature is supported by the I2Cx Instance.
AnnaBridge 156:ff21514d8981 983 * @rmtoll CR1 SMBHEN LL_I2C_GetMode\n
AnnaBridge 156:ff21514d8981 984 * CR1 SMBDEN LL_I2C_GetMode
AnnaBridge 156:ff21514d8981 985 * @param I2Cx I2C Instance.
AnnaBridge 156:ff21514d8981 986 * @retval Returned value can be one of the following values:
AnnaBridge 156:ff21514d8981 987 * @arg @ref LL_I2C_MODE_I2C
AnnaBridge 156:ff21514d8981 988 * @arg @ref LL_I2C_MODE_SMBUS_HOST
AnnaBridge 156:ff21514d8981 989 * @arg @ref LL_I2C_MODE_SMBUS_DEVICE
AnnaBridge 156:ff21514d8981 990 * @arg @ref LL_I2C_MODE_SMBUS_DEVICE_ARP
AnnaBridge 156:ff21514d8981 991 */
AnnaBridge 156:ff21514d8981 992 __STATIC_INLINE uint32_t LL_I2C_GetMode(I2C_TypeDef *I2Cx)
AnnaBridge 156:ff21514d8981 993 {
AnnaBridge 156:ff21514d8981 994 return (uint32_t)(READ_BIT(I2Cx->CR1, I2C_CR1_SMBHEN | I2C_CR1_SMBDEN));
AnnaBridge 156:ff21514d8981 995 }
AnnaBridge 156:ff21514d8981 996
AnnaBridge 156:ff21514d8981 997 /**
AnnaBridge 156:ff21514d8981 998 * @brief Enable SMBus alert (Host or Device mode)
AnnaBridge 156:ff21514d8981 999 * @note Macro @ref IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
AnnaBridge 156:ff21514d8981 1000 * SMBus feature is supported by the I2Cx Instance.
AnnaBridge 156:ff21514d8981 1001 * @note SMBus Device mode:
AnnaBridge 156:ff21514d8981 1002 * - SMBus Alert pin is drived low and
AnnaBridge 156:ff21514d8981 1003 * Alert Response Address Header acknowledge is enabled.
AnnaBridge 156:ff21514d8981 1004 * SMBus Host mode:
AnnaBridge 156:ff21514d8981 1005 * - SMBus Alert pin management is supported.
AnnaBridge 156:ff21514d8981 1006 * @rmtoll CR1 ALERTEN LL_I2C_EnableSMBusAlert
AnnaBridge 156:ff21514d8981 1007 * @param I2Cx I2C Instance.
AnnaBridge 156:ff21514d8981 1008 * @retval None
AnnaBridge 156:ff21514d8981 1009 */
AnnaBridge 156:ff21514d8981 1010 __STATIC_INLINE void LL_I2C_EnableSMBusAlert(I2C_TypeDef *I2Cx)
AnnaBridge 156:ff21514d8981 1011 {
AnnaBridge 156:ff21514d8981 1012 SET_BIT(I2Cx->CR1, I2C_CR1_ALERTEN);
AnnaBridge 156:ff21514d8981 1013 }
AnnaBridge 156:ff21514d8981 1014
AnnaBridge 156:ff21514d8981 1015 /**
AnnaBridge 156:ff21514d8981 1016 * @brief Disable SMBus alert (Host or Device mode)
AnnaBridge 156:ff21514d8981 1017 * @note Macro @ref IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
AnnaBridge 156:ff21514d8981 1018 * SMBus feature is supported by the I2Cx Instance.
AnnaBridge 156:ff21514d8981 1019 * @note SMBus Device mode:
AnnaBridge 156:ff21514d8981 1020 * - SMBus Alert pin is not drived (can be used as a standard GPIO) and
AnnaBridge 156:ff21514d8981 1021 * Alert Response Address Header acknowledge is disabled.
AnnaBridge 156:ff21514d8981 1022 * SMBus Host mode:
AnnaBridge 156:ff21514d8981 1023 * - SMBus Alert pin management is not supported.
AnnaBridge 156:ff21514d8981 1024 * @rmtoll CR1 ALERTEN LL_I2C_DisableSMBusAlert
AnnaBridge 156:ff21514d8981 1025 * @param I2Cx I2C Instance.
AnnaBridge 156:ff21514d8981 1026 * @retval None
AnnaBridge 156:ff21514d8981 1027 */
AnnaBridge 156:ff21514d8981 1028 __STATIC_INLINE void LL_I2C_DisableSMBusAlert(I2C_TypeDef *I2Cx)
AnnaBridge 156:ff21514d8981 1029 {
AnnaBridge 156:ff21514d8981 1030 CLEAR_BIT(I2Cx->CR1, I2C_CR1_ALERTEN);
AnnaBridge 156:ff21514d8981 1031 }
AnnaBridge 156:ff21514d8981 1032
AnnaBridge 156:ff21514d8981 1033 /**
AnnaBridge 156:ff21514d8981 1034 * @brief Check if SMBus alert (Host or Device mode) is enabled or disabled.
AnnaBridge 156:ff21514d8981 1035 * @note Macro @ref IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
AnnaBridge 156:ff21514d8981 1036 * SMBus feature is supported by the I2Cx Instance.
AnnaBridge 156:ff21514d8981 1037 * @rmtoll CR1 ALERTEN LL_I2C_IsEnabledSMBusAlert
AnnaBridge 156:ff21514d8981 1038 * @param I2Cx I2C Instance.
AnnaBridge 156:ff21514d8981 1039 * @retval State of bit (1 or 0).
AnnaBridge 156:ff21514d8981 1040 */
AnnaBridge 156:ff21514d8981 1041 __STATIC_INLINE uint32_t LL_I2C_IsEnabledSMBusAlert(I2C_TypeDef *I2Cx)
AnnaBridge 156:ff21514d8981 1042 {
AnnaBridge 156:ff21514d8981 1043 return (READ_BIT(I2Cx->CR1, I2C_CR1_ALERTEN) == (I2C_CR1_ALERTEN));
AnnaBridge 156:ff21514d8981 1044 }
AnnaBridge 156:ff21514d8981 1045
AnnaBridge 156:ff21514d8981 1046 /**
AnnaBridge 156:ff21514d8981 1047 * @brief Enable SMBus Packet Error Calculation (PEC).
AnnaBridge 156:ff21514d8981 1048 * @note Macro @ref IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
AnnaBridge 156:ff21514d8981 1049 * SMBus feature is supported by the I2Cx Instance.
AnnaBridge 156:ff21514d8981 1050 * @rmtoll CR1 PECEN LL_I2C_EnableSMBusPEC
AnnaBridge 156:ff21514d8981 1051 * @param I2Cx I2C Instance.
AnnaBridge 156:ff21514d8981 1052 * @retval None
AnnaBridge 156:ff21514d8981 1053 */
AnnaBridge 156:ff21514d8981 1054 __STATIC_INLINE void LL_I2C_EnableSMBusPEC(I2C_TypeDef *I2Cx)
AnnaBridge 156:ff21514d8981 1055 {
AnnaBridge 156:ff21514d8981 1056 SET_BIT(I2Cx->CR1, I2C_CR1_PECEN);
AnnaBridge 156:ff21514d8981 1057 }
AnnaBridge 156:ff21514d8981 1058
AnnaBridge 156:ff21514d8981 1059 /**
AnnaBridge 156:ff21514d8981 1060 * @brief Disable SMBus Packet Error Calculation (PEC).
AnnaBridge 156:ff21514d8981 1061 * @note Macro @ref IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
AnnaBridge 156:ff21514d8981 1062 * SMBus feature is supported by the I2Cx Instance.
AnnaBridge 156:ff21514d8981 1063 * @rmtoll CR1 PECEN LL_I2C_DisableSMBusPEC
AnnaBridge 156:ff21514d8981 1064 * @param I2Cx I2C Instance.
AnnaBridge 156:ff21514d8981 1065 * @retval None
AnnaBridge 156:ff21514d8981 1066 */
AnnaBridge 156:ff21514d8981 1067 __STATIC_INLINE void LL_I2C_DisableSMBusPEC(I2C_TypeDef *I2Cx)
AnnaBridge 156:ff21514d8981 1068 {
AnnaBridge 156:ff21514d8981 1069 CLEAR_BIT(I2Cx->CR1, I2C_CR1_PECEN);
AnnaBridge 156:ff21514d8981 1070 }
AnnaBridge 156:ff21514d8981 1071
AnnaBridge 156:ff21514d8981 1072 /**
AnnaBridge 156:ff21514d8981 1073 * @brief Check if SMBus Packet Error Calculation (PEC) is enabled or disabled.
AnnaBridge 156:ff21514d8981 1074 * @note Macro @ref IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
AnnaBridge 156:ff21514d8981 1075 * SMBus feature is supported by the I2Cx Instance.
AnnaBridge 156:ff21514d8981 1076 * @rmtoll CR1 PECEN LL_I2C_IsEnabledSMBusPEC
AnnaBridge 156:ff21514d8981 1077 * @param I2Cx I2C Instance.
AnnaBridge 156:ff21514d8981 1078 * @retval State of bit (1 or 0).
AnnaBridge 156:ff21514d8981 1079 */
AnnaBridge 156:ff21514d8981 1080 __STATIC_INLINE uint32_t LL_I2C_IsEnabledSMBusPEC(I2C_TypeDef *I2Cx)
AnnaBridge 156:ff21514d8981 1081 {
AnnaBridge 156:ff21514d8981 1082 return (READ_BIT(I2Cx->CR1, I2C_CR1_PECEN) == (I2C_CR1_PECEN));
AnnaBridge 156:ff21514d8981 1083 }
AnnaBridge 156:ff21514d8981 1084
AnnaBridge 156:ff21514d8981 1085 /**
AnnaBridge 156:ff21514d8981 1086 * @brief Configure the SMBus Clock Timeout.
AnnaBridge 156:ff21514d8981 1087 * @note Macro @ref IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
AnnaBridge 156:ff21514d8981 1088 * SMBus feature is supported by the I2Cx Instance.
AnnaBridge 156:ff21514d8981 1089 * @note This configuration can only be programmed when associated Timeout is disabled (TimeoutA and/orTimeoutB).
AnnaBridge 156:ff21514d8981 1090 * @rmtoll TIMEOUTR TIMEOUTA LL_I2C_ConfigSMBusTimeout\n
AnnaBridge 156:ff21514d8981 1091 * TIMEOUTR TIDLE LL_I2C_ConfigSMBusTimeout\n
AnnaBridge 156:ff21514d8981 1092 * TIMEOUTR TIMEOUTB LL_I2C_ConfigSMBusTimeout
AnnaBridge 156:ff21514d8981 1093 * @param I2Cx I2C Instance.
AnnaBridge 156:ff21514d8981 1094 * @param TimeoutA This parameter must be a value between Min_Data=0 and Max_Data=0xFFF.
AnnaBridge 156:ff21514d8981 1095 * @param TimeoutAMode This parameter can be one of the following values:
AnnaBridge 156:ff21514d8981 1096 * @arg @ref LL_I2C_SMBUS_TIMEOUTA_MODE_SCL_LOW
AnnaBridge 156:ff21514d8981 1097 * @arg @ref LL_I2C_SMBUS_TIMEOUTA_MODE_SDA_SCL_HIGH
AnnaBridge 156:ff21514d8981 1098 * @param TimeoutB
AnnaBridge 156:ff21514d8981 1099 * @retval None
AnnaBridge 156:ff21514d8981 1100 */
AnnaBridge 156:ff21514d8981 1101 __STATIC_INLINE void LL_I2C_ConfigSMBusTimeout(I2C_TypeDef *I2Cx, uint32_t TimeoutA, uint32_t TimeoutAMode,
AnnaBridge 156:ff21514d8981 1102 uint32_t TimeoutB)
AnnaBridge 156:ff21514d8981 1103 {
AnnaBridge 156:ff21514d8981 1104 MODIFY_REG(I2Cx->TIMEOUTR, I2C_TIMEOUTR_TIMEOUTA | I2C_TIMEOUTR_TIDLE | I2C_TIMEOUTR_TIMEOUTB,
AnnaBridge 156:ff21514d8981 1105 TimeoutA | TimeoutAMode | (TimeoutB << I2C_TIMEOUTR_TIMEOUTB_Pos));
AnnaBridge 156:ff21514d8981 1106 }
AnnaBridge 156:ff21514d8981 1107
AnnaBridge 156:ff21514d8981 1108 /**
AnnaBridge 156:ff21514d8981 1109 * @brief Configure the SMBus Clock TimeoutA (SCL low timeout or SCL and SDA high timeout depends on TimeoutA mode).
AnnaBridge 156:ff21514d8981 1110 * @note Macro @ref IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
AnnaBridge 156:ff21514d8981 1111 * SMBus feature is supported by the I2Cx Instance.
AnnaBridge 156:ff21514d8981 1112 * @note These bits can only be programmed when TimeoutA is disabled.
AnnaBridge 156:ff21514d8981 1113 * @rmtoll TIMEOUTR TIMEOUTA LL_I2C_SetSMBusTimeoutA
AnnaBridge 156:ff21514d8981 1114 * @param I2Cx I2C Instance.
AnnaBridge 156:ff21514d8981 1115 * @param TimeoutA This parameter must be a value between Min_Data=0 and Max_Data=0xFFF.
AnnaBridge 156:ff21514d8981 1116 * @retval None
AnnaBridge 156:ff21514d8981 1117 */
AnnaBridge 156:ff21514d8981 1118 __STATIC_INLINE void LL_I2C_SetSMBusTimeoutA(I2C_TypeDef *I2Cx, uint32_t TimeoutA)
AnnaBridge 156:ff21514d8981 1119 {
AnnaBridge 156:ff21514d8981 1120 WRITE_REG(I2Cx->TIMEOUTR, TimeoutA);
AnnaBridge 156:ff21514d8981 1121 }
AnnaBridge 156:ff21514d8981 1122
AnnaBridge 156:ff21514d8981 1123 /**
AnnaBridge 156:ff21514d8981 1124 * @brief Get the SMBus Clock TimeoutA setting.
AnnaBridge 156:ff21514d8981 1125 * @note Macro @ref IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
AnnaBridge 156:ff21514d8981 1126 * SMBus feature is supported by the I2Cx Instance.
AnnaBridge 156:ff21514d8981 1127 * @rmtoll TIMEOUTR TIMEOUTA LL_I2C_GetSMBusTimeoutA
AnnaBridge 156:ff21514d8981 1128 * @param I2Cx I2C Instance.
AnnaBridge 156:ff21514d8981 1129 * @retval Value between Min_Data=0 and Max_Data=0xFFF
AnnaBridge 156:ff21514d8981 1130 */
AnnaBridge 156:ff21514d8981 1131 __STATIC_INLINE uint32_t LL_I2C_GetSMBusTimeoutA(I2C_TypeDef *I2Cx)
AnnaBridge 156:ff21514d8981 1132 {
AnnaBridge 156:ff21514d8981 1133 return (uint32_t)(READ_BIT(I2Cx->TIMEOUTR, I2C_TIMEOUTR_TIMEOUTA));
AnnaBridge 156:ff21514d8981 1134 }
AnnaBridge 156:ff21514d8981 1135
AnnaBridge 156:ff21514d8981 1136 /**
AnnaBridge 156:ff21514d8981 1137 * @brief Set the SMBus Clock TimeoutA mode.
AnnaBridge 156:ff21514d8981 1138 * @note Macro @ref IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
AnnaBridge 156:ff21514d8981 1139 * SMBus feature is supported by the I2Cx Instance.
AnnaBridge 156:ff21514d8981 1140 * @note This bit can only be programmed when TimeoutA is disabled.
AnnaBridge 156:ff21514d8981 1141 * @rmtoll TIMEOUTR TIDLE LL_I2C_SetSMBusTimeoutAMode
AnnaBridge 156:ff21514d8981 1142 * @param I2Cx I2C Instance.
AnnaBridge 156:ff21514d8981 1143 * @param TimeoutAMode This parameter can be one of the following values:
AnnaBridge 156:ff21514d8981 1144 * @arg @ref LL_I2C_SMBUS_TIMEOUTA_MODE_SCL_LOW
AnnaBridge 156:ff21514d8981 1145 * @arg @ref LL_I2C_SMBUS_TIMEOUTA_MODE_SDA_SCL_HIGH
AnnaBridge 156:ff21514d8981 1146 * @retval None
AnnaBridge 156:ff21514d8981 1147 */
AnnaBridge 156:ff21514d8981 1148 __STATIC_INLINE void LL_I2C_SetSMBusTimeoutAMode(I2C_TypeDef *I2Cx, uint32_t TimeoutAMode)
AnnaBridge 156:ff21514d8981 1149 {
AnnaBridge 156:ff21514d8981 1150 WRITE_REG(I2Cx->TIMEOUTR, TimeoutAMode);
AnnaBridge 156:ff21514d8981 1151 }
AnnaBridge 156:ff21514d8981 1152
AnnaBridge 156:ff21514d8981 1153 /**
AnnaBridge 156:ff21514d8981 1154 * @brief Get the SMBus Clock TimeoutA mode.
AnnaBridge 156:ff21514d8981 1155 * @note Macro @ref IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
AnnaBridge 156:ff21514d8981 1156 * SMBus feature is supported by the I2Cx Instance.
AnnaBridge 156:ff21514d8981 1157 * @rmtoll TIMEOUTR TIDLE LL_I2C_GetSMBusTimeoutAMode
AnnaBridge 156:ff21514d8981 1158 * @param I2Cx I2C Instance.
AnnaBridge 156:ff21514d8981 1159 * @retval Returned value can be one of the following values:
AnnaBridge 156:ff21514d8981 1160 * @arg @ref LL_I2C_SMBUS_TIMEOUTA_MODE_SCL_LOW
AnnaBridge 156:ff21514d8981 1161 * @arg @ref LL_I2C_SMBUS_TIMEOUTA_MODE_SDA_SCL_HIGH
AnnaBridge 156:ff21514d8981 1162 */
AnnaBridge 156:ff21514d8981 1163 __STATIC_INLINE uint32_t LL_I2C_GetSMBusTimeoutAMode(I2C_TypeDef *I2Cx)
AnnaBridge 156:ff21514d8981 1164 {
AnnaBridge 156:ff21514d8981 1165 return (uint32_t)(READ_BIT(I2Cx->TIMEOUTR, I2C_TIMEOUTR_TIDLE));
AnnaBridge 156:ff21514d8981 1166 }
AnnaBridge 156:ff21514d8981 1167
AnnaBridge 156:ff21514d8981 1168 /**
AnnaBridge 156:ff21514d8981 1169 * @brief Configure the SMBus Extended Cumulative Clock TimeoutB (Master or Slave mode).
AnnaBridge 156:ff21514d8981 1170 * @note Macro @ref IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
AnnaBridge 156:ff21514d8981 1171 * SMBus feature is supported by the I2Cx Instance.
AnnaBridge 156:ff21514d8981 1172 * @note These bits can only be programmed when TimeoutB is disabled.
AnnaBridge 156:ff21514d8981 1173 * @rmtoll TIMEOUTR TIMEOUTB LL_I2C_SetSMBusTimeoutB
AnnaBridge 156:ff21514d8981 1174 * @param I2Cx I2C Instance.
AnnaBridge 156:ff21514d8981 1175 * @param TimeoutB This parameter must be a value between Min_Data=0 and Max_Data=0xFFF.
AnnaBridge 156:ff21514d8981 1176 * @retval None
AnnaBridge 156:ff21514d8981 1177 */
AnnaBridge 156:ff21514d8981 1178 __STATIC_INLINE void LL_I2C_SetSMBusTimeoutB(I2C_TypeDef *I2Cx, uint32_t TimeoutB)
AnnaBridge 156:ff21514d8981 1179 {
AnnaBridge 156:ff21514d8981 1180 WRITE_REG(I2Cx->TIMEOUTR, TimeoutB << I2C_TIMEOUTR_TIMEOUTB_Pos);
AnnaBridge 156:ff21514d8981 1181 }
AnnaBridge 156:ff21514d8981 1182
AnnaBridge 156:ff21514d8981 1183 /**
AnnaBridge 156:ff21514d8981 1184 * @brief Get the SMBus Extented Cumulative Clock TimeoutB setting.
AnnaBridge 156:ff21514d8981 1185 * @note Macro @ref IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
AnnaBridge 156:ff21514d8981 1186 * SMBus feature is supported by the I2Cx Instance.
AnnaBridge 156:ff21514d8981 1187 * @rmtoll TIMEOUTR TIMEOUTB LL_I2C_GetSMBusTimeoutB
AnnaBridge 156:ff21514d8981 1188 * @param I2Cx I2C Instance.
AnnaBridge 156:ff21514d8981 1189 * @retval Value between Min_Data=0 and Max_Data=0xFFF
AnnaBridge 156:ff21514d8981 1190 */
AnnaBridge 156:ff21514d8981 1191 __STATIC_INLINE uint32_t LL_I2C_GetSMBusTimeoutB(I2C_TypeDef *I2Cx)
AnnaBridge 156:ff21514d8981 1192 {
AnnaBridge 156:ff21514d8981 1193 return (uint32_t)(READ_BIT(I2Cx->TIMEOUTR, I2C_TIMEOUTR_TIMEOUTB) >> I2C_TIMEOUTR_TIMEOUTB_Pos);
AnnaBridge 156:ff21514d8981 1194 }
AnnaBridge 156:ff21514d8981 1195
AnnaBridge 156:ff21514d8981 1196 /**
AnnaBridge 156:ff21514d8981 1197 * @brief Enable the SMBus Clock Timeout.
AnnaBridge 156:ff21514d8981 1198 * @note Macro @ref IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
AnnaBridge 156:ff21514d8981 1199 * SMBus feature is supported by the I2Cx Instance.
AnnaBridge 156:ff21514d8981 1200 * @rmtoll TIMEOUTR TIMOUTEN LL_I2C_EnableSMBusTimeout\n
AnnaBridge 156:ff21514d8981 1201 * TIMEOUTR TEXTEN LL_I2C_EnableSMBusTimeout
AnnaBridge 156:ff21514d8981 1202 * @param I2Cx I2C Instance.
AnnaBridge 156:ff21514d8981 1203 * @param ClockTimeout This parameter can be one of the following values:
AnnaBridge 156:ff21514d8981 1204 * @arg @ref LL_I2C_SMBUS_TIMEOUTA
AnnaBridge 156:ff21514d8981 1205 * @arg @ref LL_I2C_SMBUS_TIMEOUTB
AnnaBridge 156:ff21514d8981 1206 * @arg @ref LL_I2C_SMBUS_ALL_TIMEOUT
AnnaBridge 156:ff21514d8981 1207 * @retval None
AnnaBridge 156:ff21514d8981 1208 */
AnnaBridge 156:ff21514d8981 1209 __STATIC_INLINE void LL_I2C_EnableSMBusTimeout(I2C_TypeDef *I2Cx, uint32_t ClockTimeout)
AnnaBridge 156:ff21514d8981 1210 {
AnnaBridge 156:ff21514d8981 1211 SET_BIT(I2Cx->TIMEOUTR, ClockTimeout);
AnnaBridge 156:ff21514d8981 1212 }
AnnaBridge 156:ff21514d8981 1213
AnnaBridge 156:ff21514d8981 1214 /**
AnnaBridge 156:ff21514d8981 1215 * @brief Disable the SMBus Clock Timeout.
AnnaBridge 156:ff21514d8981 1216 * @note Macro @ref IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
AnnaBridge 156:ff21514d8981 1217 * SMBus feature is supported by the I2Cx Instance.
AnnaBridge 156:ff21514d8981 1218 * @rmtoll TIMEOUTR TIMOUTEN LL_I2C_DisableSMBusTimeout\n
AnnaBridge 156:ff21514d8981 1219 * TIMEOUTR TEXTEN LL_I2C_DisableSMBusTimeout
AnnaBridge 156:ff21514d8981 1220 * @param I2Cx I2C Instance.
AnnaBridge 156:ff21514d8981 1221 * @param ClockTimeout This parameter can be one of the following values:
AnnaBridge 156:ff21514d8981 1222 * @arg @ref LL_I2C_SMBUS_TIMEOUTA
AnnaBridge 156:ff21514d8981 1223 * @arg @ref LL_I2C_SMBUS_TIMEOUTB
AnnaBridge 156:ff21514d8981 1224 * @arg @ref LL_I2C_SMBUS_ALL_TIMEOUT
AnnaBridge 156:ff21514d8981 1225 * @retval None
AnnaBridge 156:ff21514d8981 1226 */
AnnaBridge 156:ff21514d8981 1227 __STATIC_INLINE void LL_I2C_DisableSMBusTimeout(I2C_TypeDef *I2Cx, uint32_t ClockTimeout)
AnnaBridge 156:ff21514d8981 1228 {
AnnaBridge 156:ff21514d8981 1229 CLEAR_BIT(I2Cx->TIMEOUTR, ClockTimeout);
AnnaBridge 156:ff21514d8981 1230 }
AnnaBridge 156:ff21514d8981 1231
AnnaBridge 156:ff21514d8981 1232 /**
AnnaBridge 156:ff21514d8981 1233 * @brief Check if the SMBus Clock Timeout is enabled or disabled.
AnnaBridge 156:ff21514d8981 1234 * @note Macro @ref IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
AnnaBridge 156:ff21514d8981 1235 * SMBus feature is supported by the I2Cx Instance.
AnnaBridge 156:ff21514d8981 1236 * @rmtoll TIMEOUTR TIMOUTEN LL_I2C_IsEnabledSMBusTimeout\n
AnnaBridge 156:ff21514d8981 1237 * TIMEOUTR TEXTEN LL_I2C_IsEnabledSMBusTimeout
AnnaBridge 156:ff21514d8981 1238 * @param I2Cx I2C Instance.
AnnaBridge 156:ff21514d8981 1239 * @param ClockTimeout This parameter can be one of the following values:
AnnaBridge 156:ff21514d8981 1240 * @arg @ref LL_I2C_SMBUS_TIMEOUTA
AnnaBridge 156:ff21514d8981 1241 * @arg @ref LL_I2C_SMBUS_TIMEOUTB
AnnaBridge 156:ff21514d8981 1242 * @arg @ref LL_I2C_SMBUS_ALL_TIMEOUT
AnnaBridge 156:ff21514d8981 1243 * @retval State of bit (1 or 0).
AnnaBridge 156:ff21514d8981 1244 */
AnnaBridge 156:ff21514d8981 1245 __STATIC_INLINE uint32_t LL_I2C_IsEnabledSMBusTimeout(I2C_TypeDef *I2Cx, uint32_t ClockTimeout)
AnnaBridge 156:ff21514d8981 1246 {
AnnaBridge 156:ff21514d8981 1247 return (READ_BIT(I2Cx->TIMEOUTR, (I2C_TIMEOUTR_TIMOUTEN | I2C_TIMEOUTR_TEXTEN)) == (ClockTimeout));
AnnaBridge 156:ff21514d8981 1248 }
AnnaBridge 156:ff21514d8981 1249
AnnaBridge 156:ff21514d8981 1250 /**
AnnaBridge 156:ff21514d8981 1251 * @}
AnnaBridge 156:ff21514d8981 1252 */
AnnaBridge 156:ff21514d8981 1253
AnnaBridge 156:ff21514d8981 1254 /** @defgroup I2C_LL_EF_IT_Management IT_Management
AnnaBridge 156:ff21514d8981 1255 * @{
AnnaBridge 156:ff21514d8981 1256 */
AnnaBridge 156:ff21514d8981 1257
AnnaBridge 156:ff21514d8981 1258 /**
AnnaBridge 156:ff21514d8981 1259 * @brief Enable TXIS interrupt.
AnnaBridge 156:ff21514d8981 1260 * @rmtoll CR1 TXIE LL_I2C_EnableIT_TX
AnnaBridge 156:ff21514d8981 1261 * @param I2Cx I2C Instance.
AnnaBridge 156:ff21514d8981 1262 * @retval None
AnnaBridge 156:ff21514d8981 1263 */
AnnaBridge 156:ff21514d8981 1264 __STATIC_INLINE void LL_I2C_EnableIT_TX(I2C_TypeDef *I2Cx)
AnnaBridge 156:ff21514d8981 1265 {
AnnaBridge 156:ff21514d8981 1266 SET_BIT(I2Cx->CR1, I2C_CR1_TXIE);
AnnaBridge 156:ff21514d8981 1267 }
AnnaBridge 156:ff21514d8981 1268
AnnaBridge 156:ff21514d8981 1269 /**
AnnaBridge 156:ff21514d8981 1270 * @brief Disable TXIS interrupt.
AnnaBridge 156:ff21514d8981 1271 * @rmtoll CR1 TXIE LL_I2C_DisableIT_TX
AnnaBridge 156:ff21514d8981 1272 * @param I2Cx I2C Instance.
AnnaBridge 156:ff21514d8981 1273 * @retval None
AnnaBridge 156:ff21514d8981 1274 */
AnnaBridge 156:ff21514d8981 1275 __STATIC_INLINE void LL_I2C_DisableIT_TX(I2C_TypeDef *I2Cx)
AnnaBridge 156:ff21514d8981 1276 {
AnnaBridge 156:ff21514d8981 1277 CLEAR_BIT(I2Cx->CR1, I2C_CR1_TXIE);
AnnaBridge 156:ff21514d8981 1278 }
AnnaBridge 156:ff21514d8981 1279
AnnaBridge 156:ff21514d8981 1280 /**
AnnaBridge 156:ff21514d8981 1281 * @brief Check if the TXIS Interrupt is enabled or disabled.
AnnaBridge 156:ff21514d8981 1282 * @rmtoll CR1 TXIE LL_I2C_IsEnabledIT_TX
AnnaBridge 156:ff21514d8981 1283 * @param I2Cx I2C Instance.
AnnaBridge 156:ff21514d8981 1284 * @retval State of bit (1 or 0).
AnnaBridge 156:ff21514d8981 1285 */
AnnaBridge 156:ff21514d8981 1286 __STATIC_INLINE uint32_t LL_I2C_IsEnabledIT_TX(I2C_TypeDef *I2Cx)
AnnaBridge 156:ff21514d8981 1287 {
AnnaBridge 156:ff21514d8981 1288 return (READ_BIT(I2Cx->CR1, I2C_CR1_TXIE) == (I2C_CR1_TXIE));
AnnaBridge 156:ff21514d8981 1289 }
AnnaBridge 156:ff21514d8981 1290
AnnaBridge 156:ff21514d8981 1291 /**
AnnaBridge 156:ff21514d8981 1292 * @brief Enable RXNE interrupt.
AnnaBridge 156:ff21514d8981 1293 * @rmtoll CR1 RXIE LL_I2C_EnableIT_RX
AnnaBridge 156:ff21514d8981 1294 * @param I2Cx I2C Instance.
AnnaBridge 156:ff21514d8981 1295 * @retval None
AnnaBridge 156:ff21514d8981 1296 */
AnnaBridge 156:ff21514d8981 1297 __STATIC_INLINE void LL_I2C_EnableIT_RX(I2C_TypeDef *I2Cx)
AnnaBridge 156:ff21514d8981 1298 {
AnnaBridge 156:ff21514d8981 1299 SET_BIT(I2Cx->CR1, I2C_CR1_RXIE);
AnnaBridge 156:ff21514d8981 1300 }
AnnaBridge 156:ff21514d8981 1301
AnnaBridge 156:ff21514d8981 1302 /**
AnnaBridge 156:ff21514d8981 1303 * @brief Disable RXNE interrupt.
AnnaBridge 156:ff21514d8981 1304 * @rmtoll CR1 RXIE LL_I2C_DisableIT_RX
AnnaBridge 156:ff21514d8981 1305 * @param I2Cx I2C Instance.
AnnaBridge 156:ff21514d8981 1306 * @retval None
AnnaBridge 156:ff21514d8981 1307 */
AnnaBridge 156:ff21514d8981 1308 __STATIC_INLINE void LL_I2C_DisableIT_RX(I2C_TypeDef *I2Cx)
AnnaBridge 156:ff21514d8981 1309 {
AnnaBridge 156:ff21514d8981 1310 CLEAR_BIT(I2Cx->CR1, I2C_CR1_RXIE);
AnnaBridge 156:ff21514d8981 1311 }
AnnaBridge 156:ff21514d8981 1312
AnnaBridge 156:ff21514d8981 1313 /**
AnnaBridge 156:ff21514d8981 1314 * @brief Check if the RXNE Interrupt is enabled or disabled.
AnnaBridge 156:ff21514d8981 1315 * @rmtoll CR1 RXIE LL_I2C_IsEnabledIT_RX
AnnaBridge 156:ff21514d8981 1316 * @param I2Cx I2C Instance.
AnnaBridge 156:ff21514d8981 1317 * @retval State of bit (1 or 0).
AnnaBridge 156:ff21514d8981 1318 */
AnnaBridge 156:ff21514d8981 1319 __STATIC_INLINE uint32_t LL_I2C_IsEnabledIT_RX(I2C_TypeDef *I2Cx)
AnnaBridge 156:ff21514d8981 1320 {
AnnaBridge 156:ff21514d8981 1321 return (READ_BIT(I2Cx->CR1, I2C_CR1_RXIE) == (I2C_CR1_RXIE));
AnnaBridge 156:ff21514d8981 1322 }
AnnaBridge 156:ff21514d8981 1323
AnnaBridge 156:ff21514d8981 1324 /**
AnnaBridge 156:ff21514d8981 1325 * @brief Enable Address match interrupt (slave mode only).
AnnaBridge 156:ff21514d8981 1326 * @rmtoll CR1 ADDRIE LL_I2C_EnableIT_ADDR
AnnaBridge 156:ff21514d8981 1327 * @param I2Cx I2C Instance.
AnnaBridge 156:ff21514d8981 1328 * @retval None
AnnaBridge 156:ff21514d8981 1329 */
AnnaBridge 156:ff21514d8981 1330 __STATIC_INLINE void LL_I2C_EnableIT_ADDR(I2C_TypeDef *I2Cx)
AnnaBridge 156:ff21514d8981 1331 {
AnnaBridge 156:ff21514d8981 1332 SET_BIT(I2Cx->CR1, I2C_CR1_ADDRIE);
AnnaBridge 156:ff21514d8981 1333 }
AnnaBridge 156:ff21514d8981 1334
AnnaBridge 156:ff21514d8981 1335 /**
AnnaBridge 156:ff21514d8981 1336 * @brief Disable Address match interrupt (slave mode only).
AnnaBridge 156:ff21514d8981 1337 * @rmtoll CR1 ADDRIE LL_I2C_DisableIT_ADDR
AnnaBridge 156:ff21514d8981 1338 * @param I2Cx I2C Instance.
AnnaBridge 156:ff21514d8981 1339 * @retval None
AnnaBridge 156:ff21514d8981 1340 */
AnnaBridge 156:ff21514d8981 1341 __STATIC_INLINE void LL_I2C_DisableIT_ADDR(I2C_TypeDef *I2Cx)
AnnaBridge 156:ff21514d8981 1342 {
AnnaBridge 156:ff21514d8981 1343 CLEAR_BIT(I2Cx->CR1, I2C_CR1_ADDRIE);
AnnaBridge 156:ff21514d8981 1344 }
AnnaBridge 156:ff21514d8981 1345
AnnaBridge 156:ff21514d8981 1346 /**
AnnaBridge 156:ff21514d8981 1347 * @brief Check if Address match interrupt is enabled or disabled.
AnnaBridge 156:ff21514d8981 1348 * @rmtoll CR1 ADDRIE LL_I2C_IsEnabledIT_ADDR
AnnaBridge 156:ff21514d8981 1349 * @param I2Cx I2C Instance.
AnnaBridge 156:ff21514d8981 1350 * @retval State of bit (1 or 0).
AnnaBridge 156:ff21514d8981 1351 */
AnnaBridge 156:ff21514d8981 1352 __STATIC_INLINE uint32_t LL_I2C_IsEnabledIT_ADDR(I2C_TypeDef *I2Cx)
AnnaBridge 156:ff21514d8981 1353 {
AnnaBridge 156:ff21514d8981 1354 return (READ_BIT(I2Cx->CR1, I2C_CR1_ADDRIE) == (I2C_CR1_ADDRIE));
AnnaBridge 156:ff21514d8981 1355 }
AnnaBridge 156:ff21514d8981 1356
AnnaBridge 156:ff21514d8981 1357 /**
AnnaBridge 156:ff21514d8981 1358 * @brief Enable Not acknowledge received interrupt.
AnnaBridge 156:ff21514d8981 1359 * @rmtoll CR1 NACKIE LL_I2C_EnableIT_NACK
AnnaBridge 156:ff21514d8981 1360 * @param I2Cx I2C Instance.
AnnaBridge 156:ff21514d8981 1361 * @retval None
AnnaBridge 156:ff21514d8981 1362 */
AnnaBridge 156:ff21514d8981 1363 __STATIC_INLINE void LL_I2C_EnableIT_NACK(I2C_TypeDef *I2Cx)
AnnaBridge 156:ff21514d8981 1364 {
AnnaBridge 156:ff21514d8981 1365 SET_BIT(I2Cx->CR1, I2C_CR1_NACKIE);
AnnaBridge 156:ff21514d8981 1366 }
AnnaBridge 156:ff21514d8981 1367
AnnaBridge 156:ff21514d8981 1368 /**
AnnaBridge 156:ff21514d8981 1369 * @brief Disable Not acknowledge received interrupt.
AnnaBridge 156:ff21514d8981 1370 * @rmtoll CR1 NACKIE LL_I2C_DisableIT_NACK
AnnaBridge 156:ff21514d8981 1371 * @param I2Cx I2C Instance.
AnnaBridge 156:ff21514d8981 1372 * @retval None
AnnaBridge 156:ff21514d8981 1373 */
AnnaBridge 156:ff21514d8981 1374 __STATIC_INLINE void LL_I2C_DisableIT_NACK(I2C_TypeDef *I2Cx)
AnnaBridge 156:ff21514d8981 1375 {
AnnaBridge 156:ff21514d8981 1376 CLEAR_BIT(I2Cx->CR1, I2C_CR1_NACKIE);
AnnaBridge 156:ff21514d8981 1377 }
AnnaBridge 156:ff21514d8981 1378
AnnaBridge 156:ff21514d8981 1379 /**
AnnaBridge 156:ff21514d8981 1380 * @brief Check if Not acknowledge received interrupt is enabled or disabled.
AnnaBridge 156:ff21514d8981 1381 * @rmtoll CR1 NACKIE LL_I2C_IsEnabledIT_NACK
AnnaBridge 156:ff21514d8981 1382 * @param I2Cx I2C Instance.
AnnaBridge 156:ff21514d8981 1383 * @retval State of bit (1 or 0).
AnnaBridge 156:ff21514d8981 1384 */
AnnaBridge 156:ff21514d8981 1385 __STATIC_INLINE uint32_t LL_I2C_IsEnabledIT_NACK(I2C_TypeDef *I2Cx)
AnnaBridge 156:ff21514d8981 1386 {
AnnaBridge 156:ff21514d8981 1387 return (READ_BIT(I2Cx->CR1, I2C_CR1_NACKIE) == (I2C_CR1_NACKIE));
AnnaBridge 156:ff21514d8981 1388 }
AnnaBridge 156:ff21514d8981 1389
AnnaBridge 156:ff21514d8981 1390 /**
AnnaBridge 156:ff21514d8981 1391 * @brief Enable STOP detection interrupt.
AnnaBridge 156:ff21514d8981 1392 * @rmtoll CR1 STOPIE LL_I2C_EnableIT_STOP
AnnaBridge 156:ff21514d8981 1393 * @param I2Cx I2C Instance.
AnnaBridge 156:ff21514d8981 1394 * @retval None
AnnaBridge 156:ff21514d8981 1395 */
AnnaBridge 156:ff21514d8981 1396 __STATIC_INLINE void LL_I2C_EnableIT_STOP(I2C_TypeDef *I2Cx)
AnnaBridge 156:ff21514d8981 1397 {
AnnaBridge 156:ff21514d8981 1398 SET_BIT(I2Cx->CR1, I2C_CR1_STOPIE);
AnnaBridge 156:ff21514d8981 1399 }
AnnaBridge 156:ff21514d8981 1400
AnnaBridge 156:ff21514d8981 1401 /**
AnnaBridge 156:ff21514d8981 1402 * @brief Disable STOP detection interrupt.
AnnaBridge 156:ff21514d8981 1403 * @rmtoll CR1 STOPIE LL_I2C_DisableIT_STOP
AnnaBridge 156:ff21514d8981 1404 * @param I2Cx I2C Instance.
AnnaBridge 156:ff21514d8981 1405 * @retval None
AnnaBridge 156:ff21514d8981 1406 */
AnnaBridge 156:ff21514d8981 1407 __STATIC_INLINE void LL_I2C_DisableIT_STOP(I2C_TypeDef *I2Cx)
AnnaBridge 156:ff21514d8981 1408 {
AnnaBridge 156:ff21514d8981 1409 CLEAR_BIT(I2Cx->CR1, I2C_CR1_STOPIE);
AnnaBridge 156:ff21514d8981 1410 }
AnnaBridge 156:ff21514d8981 1411
AnnaBridge 156:ff21514d8981 1412 /**
AnnaBridge 156:ff21514d8981 1413 * @brief Check if STOP detection interrupt is enabled or disabled.
AnnaBridge 156:ff21514d8981 1414 * @rmtoll CR1 STOPIE LL_I2C_IsEnabledIT_STOP
AnnaBridge 156:ff21514d8981 1415 * @param I2Cx I2C Instance.
AnnaBridge 156:ff21514d8981 1416 * @retval State of bit (1 or 0).
AnnaBridge 156:ff21514d8981 1417 */
AnnaBridge 156:ff21514d8981 1418 __STATIC_INLINE uint32_t LL_I2C_IsEnabledIT_STOP(I2C_TypeDef *I2Cx)
AnnaBridge 156:ff21514d8981 1419 {
AnnaBridge 156:ff21514d8981 1420 return (READ_BIT(I2Cx->CR1, I2C_CR1_STOPIE) == (I2C_CR1_STOPIE));
AnnaBridge 156:ff21514d8981 1421 }
AnnaBridge 156:ff21514d8981 1422
AnnaBridge 156:ff21514d8981 1423 /**
AnnaBridge 156:ff21514d8981 1424 * @brief Enable Transfer Complete interrupt.
AnnaBridge 156:ff21514d8981 1425 * @note Any of these events will generate interrupt :
AnnaBridge 156:ff21514d8981 1426 * Transfer Complete (TC)
AnnaBridge 156:ff21514d8981 1427 * Transfer Complete Reload (TCR)
AnnaBridge 156:ff21514d8981 1428 * @rmtoll CR1 TCIE LL_I2C_EnableIT_TC
AnnaBridge 156:ff21514d8981 1429 * @param I2Cx I2C Instance.
AnnaBridge 156:ff21514d8981 1430 * @retval None
AnnaBridge 156:ff21514d8981 1431 */
AnnaBridge 156:ff21514d8981 1432 __STATIC_INLINE void LL_I2C_EnableIT_TC(I2C_TypeDef *I2Cx)
AnnaBridge 156:ff21514d8981 1433 {
AnnaBridge 156:ff21514d8981 1434 SET_BIT(I2Cx->CR1, I2C_CR1_TCIE);
AnnaBridge 156:ff21514d8981 1435 }
AnnaBridge 156:ff21514d8981 1436
AnnaBridge 156:ff21514d8981 1437 /**
AnnaBridge 156:ff21514d8981 1438 * @brief Disable Transfer Complete interrupt.
AnnaBridge 156:ff21514d8981 1439 * @note Any of these events will generate interrupt :
AnnaBridge 156:ff21514d8981 1440 * Transfer Complete (TC)
AnnaBridge 156:ff21514d8981 1441 * Transfer Complete Reload (TCR)
AnnaBridge 156:ff21514d8981 1442 * @rmtoll CR1 TCIE LL_I2C_DisableIT_TC
AnnaBridge 156:ff21514d8981 1443 * @param I2Cx I2C Instance.
AnnaBridge 156:ff21514d8981 1444 * @retval None
AnnaBridge 156:ff21514d8981 1445 */
AnnaBridge 156:ff21514d8981 1446 __STATIC_INLINE void LL_I2C_DisableIT_TC(I2C_TypeDef *I2Cx)
AnnaBridge 156:ff21514d8981 1447 {
AnnaBridge 156:ff21514d8981 1448 CLEAR_BIT(I2Cx->CR1, I2C_CR1_TCIE);
AnnaBridge 156:ff21514d8981 1449 }
AnnaBridge 156:ff21514d8981 1450
AnnaBridge 156:ff21514d8981 1451 /**
AnnaBridge 156:ff21514d8981 1452 * @brief Check if Transfer Complete interrupt is enabled or disabled.
AnnaBridge 156:ff21514d8981 1453 * @rmtoll CR1 TCIE LL_I2C_IsEnabledIT_TC
AnnaBridge 156:ff21514d8981 1454 * @param I2Cx I2C Instance.
AnnaBridge 156:ff21514d8981 1455 * @retval State of bit (1 or 0).
AnnaBridge 156:ff21514d8981 1456 */
AnnaBridge 156:ff21514d8981 1457 __STATIC_INLINE uint32_t LL_I2C_IsEnabledIT_TC(I2C_TypeDef *I2Cx)
AnnaBridge 156:ff21514d8981 1458 {
AnnaBridge 156:ff21514d8981 1459 return (READ_BIT(I2Cx->CR1, I2C_CR1_TCIE) == (I2C_CR1_TCIE));
AnnaBridge 156:ff21514d8981 1460 }
AnnaBridge 156:ff21514d8981 1461
AnnaBridge 156:ff21514d8981 1462 /**
AnnaBridge 156:ff21514d8981 1463 * @brief Enable Error interrupts.
AnnaBridge 156:ff21514d8981 1464 * @note Macro @ref IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
AnnaBridge 156:ff21514d8981 1465 * SMBus feature is supported by the I2Cx Instance.
AnnaBridge 156:ff21514d8981 1466 * @note Any of these errors will generate interrupt :
AnnaBridge 156:ff21514d8981 1467 * Arbitration Loss (ARLO)
AnnaBridge 156:ff21514d8981 1468 * Bus Error detection (BERR)
AnnaBridge 156:ff21514d8981 1469 * Overrun/Underrun (OVR)
AnnaBridge 156:ff21514d8981 1470 * SMBus Timeout detection (TIMEOUT)
AnnaBridge 156:ff21514d8981 1471 * SMBus PEC error detection (PECERR)
AnnaBridge 156:ff21514d8981 1472 * SMBus Alert pin event detection (ALERT)
AnnaBridge 156:ff21514d8981 1473 * @rmtoll CR1 ERRIE LL_I2C_EnableIT_ERR
AnnaBridge 156:ff21514d8981 1474 * @param I2Cx I2C Instance.
AnnaBridge 156:ff21514d8981 1475 * @retval None
AnnaBridge 156:ff21514d8981 1476 */
AnnaBridge 156:ff21514d8981 1477 __STATIC_INLINE void LL_I2C_EnableIT_ERR(I2C_TypeDef *I2Cx)
AnnaBridge 156:ff21514d8981 1478 {
AnnaBridge 156:ff21514d8981 1479 SET_BIT(I2Cx->CR1, I2C_CR1_ERRIE);
AnnaBridge 156:ff21514d8981 1480 }
AnnaBridge 156:ff21514d8981 1481
AnnaBridge 156:ff21514d8981 1482 /**
AnnaBridge 156:ff21514d8981 1483 * @brief Disable Error interrupts.
AnnaBridge 156:ff21514d8981 1484 * @note Macro @ref IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
AnnaBridge 156:ff21514d8981 1485 * SMBus feature is supported by the I2Cx Instance.
AnnaBridge 156:ff21514d8981 1486 * @note Any of these errors will generate interrupt :
AnnaBridge 156:ff21514d8981 1487 * Arbitration Loss (ARLO)
AnnaBridge 156:ff21514d8981 1488 * Bus Error detection (BERR)
AnnaBridge 156:ff21514d8981 1489 * Overrun/Underrun (OVR)
AnnaBridge 156:ff21514d8981 1490 * SMBus Timeout detection (TIMEOUT)
AnnaBridge 156:ff21514d8981 1491 * SMBus PEC error detection (PECERR)
AnnaBridge 156:ff21514d8981 1492 * SMBus Alert pin event detection (ALERT)
AnnaBridge 156:ff21514d8981 1493 * @rmtoll CR1 ERRIE LL_I2C_DisableIT_ERR
AnnaBridge 156:ff21514d8981 1494 * @param I2Cx I2C Instance.
AnnaBridge 156:ff21514d8981 1495 * @retval None
AnnaBridge 156:ff21514d8981 1496 */
AnnaBridge 156:ff21514d8981 1497 __STATIC_INLINE void LL_I2C_DisableIT_ERR(I2C_TypeDef *I2Cx)
AnnaBridge 156:ff21514d8981 1498 {
AnnaBridge 156:ff21514d8981 1499 CLEAR_BIT(I2Cx->CR1, I2C_CR1_ERRIE);
AnnaBridge 156:ff21514d8981 1500 }
AnnaBridge 156:ff21514d8981 1501
AnnaBridge 156:ff21514d8981 1502 /**
AnnaBridge 156:ff21514d8981 1503 * @brief Check if Error interrupts are enabled or disabled.
AnnaBridge 156:ff21514d8981 1504 * @rmtoll CR1 ERRIE LL_I2C_IsEnabledIT_ERR
AnnaBridge 156:ff21514d8981 1505 * @param I2Cx I2C Instance.
AnnaBridge 156:ff21514d8981 1506 * @retval State of bit (1 or 0).
AnnaBridge 156:ff21514d8981 1507 */
AnnaBridge 156:ff21514d8981 1508 __STATIC_INLINE uint32_t LL_I2C_IsEnabledIT_ERR(I2C_TypeDef *I2Cx)
AnnaBridge 156:ff21514d8981 1509 {
AnnaBridge 156:ff21514d8981 1510 return (READ_BIT(I2Cx->CR1, I2C_CR1_ERRIE) == (I2C_CR1_ERRIE));
AnnaBridge 156:ff21514d8981 1511 }
AnnaBridge 156:ff21514d8981 1512
AnnaBridge 156:ff21514d8981 1513 /**
AnnaBridge 156:ff21514d8981 1514 * @}
AnnaBridge 156:ff21514d8981 1515 */
AnnaBridge 156:ff21514d8981 1516
AnnaBridge 156:ff21514d8981 1517 /** @defgroup I2C_LL_EF_FLAG_management FLAG_management
AnnaBridge 156:ff21514d8981 1518 * @{
AnnaBridge 156:ff21514d8981 1519 */
AnnaBridge 156:ff21514d8981 1520
AnnaBridge 156:ff21514d8981 1521 /**
AnnaBridge 156:ff21514d8981 1522 * @brief Indicate the status of Transmit data register empty flag.
AnnaBridge 156:ff21514d8981 1523 * @note RESET: When next data is written in Transmit data register.
AnnaBridge 156:ff21514d8981 1524 * SET: When Transmit data register is empty.
AnnaBridge 156:ff21514d8981 1525 * @rmtoll ISR TXE LL_I2C_IsActiveFlag_TXE
AnnaBridge 156:ff21514d8981 1526 * @param I2Cx I2C Instance.
AnnaBridge 156:ff21514d8981 1527 * @retval State of bit (1 or 0).
AnnaBridge 156:ff21514d8981 1528 */
AnnaBridge 156:ff21514d8981 1529 __STATIC_INLINE uint32_t LL_I2C_IsActiveFlag_TXE(I2C_TypeDef *I2Cx)
AnnaBridge 156:ff21514d8981 1530 {
AnnaBridge 156:ff21514d8981 1531 return (READ_BIT(I2Cx->ISR, I2C_ISR_TXE) == (I2C_ISR_TXE));
AnnaBridge 156:ff21514d8981 1532 }
AnnaBridge 156:ff21514d8981 1533
AnnaBridge 156:ff21514d8981 1534 /**
AnnaBridge 156:ff21514d8981 1535 * @brief Indicate the status of Transmit interrupt flag.
AnnaBridge 156:ff21514d8981 1536 * @note RESET: When next data is written in Transmit data register.
AnnaBridge 156:ff21514d8981 1537 * SET: When Transmit data register is empty.
AnnaBridge 156:ff21514d8981 1538 * @rmtoll ISR TXIS LL_I2C_IsActiveFlag_TXIS
AnnaBridge 156:ff21514d8981 1539 * @param I2Cx I2C Instance.
AnnaBridge 156:ff21514d8981 1540 * @retval State of bit (1 or 0).
AnnaBridge 156:ff21514d8981 1541 */
AnnaBridge 156:ff21514d8981 1542 __STATIC_INLINE uint32_t LL_I2C_IsActiveFlag_TXIS(I2C_TypeDef *I2Cx)
AnnaBridge 156:ff21514d8981 1543 {
AnnaBridge 156:ff21514d8981 1544 return (READ_BIT(I2Cx->ISR, I2C_ISR_TXIS) == (I2C_ISR_TXIS));
AnnaBridge 156:ff21514d8981 1545 }
AnnaBridge 156:ff21514d8981 1546
AnnaBridge 156:ff21514d8981 1547 /**
AnnaBridge 156:ff21514d8981 1548 * @brief Indicate the status of Receive data register not empty flag.
AnnaBridge 156:ff21514d8981 1549 * @note RESET: When Receive data register is read.
AnnaBridge 156:ff21514d8981 1550 * SET: When the received data is copied in Receive data register.
AnnaBridge 156:ff21514d8981 1551 * @rmtoll ISR RXNE LL_I2C_IsActiveFlag_RXNE
AnnaBridge 156:ff21514d8981 1552 * @param I2Cx I2C Instance.
AnnaBridge 156:ff21514d8981 1553 * @retval State of bit (1 or 0).
AnnaBridge 156:ff21514d8981 1554 */
AnnaBridge 156:ff21514d8981 1555 __STATIC_INLINE uint32_t LL_I2C_IsActiveFlag_RXNE(I2C_TypeDef *I2Cx)
AnnaBridge 156:ff21514d8981 1556 {
AnnaBridge 156:ff21514d8981 1557 return (READ_BIT(I2Cx->ISR, I2C_ISR_RXNE) == (I2C_ISR_RXNE));
AnnaBridge 156:ff21514d8981 1558 }
AnnaBridge 156:ff21514d8981 1559
AnnaBridge 156:ff21514d8981 1560 /**
AnnaBridge 156:ff21514d8981 1561 * @brief Indicate the status of Address matched flag (slave mode).
AnnaBridge 156:ff21514d8981 1562 * @note RESET: Clear default value.
AnnaBridge 156:ff21514d8981 1563 * SET: When the received slave address matched with one of the enabled slave address.
AnnaBridge 156:ff21514d8981 1564 * @rmtoll ISR ADDR LL_I2C_IsActiveFlag_ADDR
AnnaBridge 156:ff21514d8981 1565 * @param I2Cx I2C Instance.
AnnaBridge 156:ff21514d8981 1566 * @retval State of bit (1 or 0).
AnnaBridge 156:ff21514d8981 1567 */
AnnaBridge 156:ff21514d8981 1568 __STATIC_INLINE uint32_t LL_I2C_IsActiveFlag_ADDR(I2C_TypeDef *I2Cx)
AnnaBridge 156:ff21514d8981 1569 {
AnnaBridge 156:ff21514d8981 1570 return (READ_BIT(I2Cx->ISR, I2C_ISR_ADDR) == (I2C_ISR_ADDR));
AnnaBridge 156:ff21514d8981 1571 }
AnnaBridge 156:ff21514d8981 1572
AnnaBridge 156:ff21514d8981 1573 /**
AnnaBridge 156:ff21514d8981 1574 * @brief Indicate the status of Not Acknowledge received flag.
AnnaBridge 156:ff21514d8981 1575 * @note RESET: Clear default value.
AnnaBridge 156:ff21514d8981 1576 * SET: When a NACK is received after a byte transmission.
AnnaBridge 156:ff21514d8981 1577 * @rmtoll ISR NACKF LL_I2C_IsActiveFlag_NACK
AnnaBridge 156:ff21514d8981 1578 * @param I2Cx I2C Instance.
AnnaBridge 156:ff21514d8981 1579 * @retval State of bit (1 or 0).
AnnaBridge 156:ff21514d8981 1580 */
AnnaBridge 156:ff21514d8981 1581 __STATIC_INLINE uint32_t LL_I2C_IsActiveFlag_NACK(I2C_TypeDef *I2Cx)
AnnaBridge 156:ff21514d8981 1582 {
AnnaBridge 156:ff21514d8981 1583 return (READ_BIT(I2Cx->ISR, I2C_ISR_NACKF) == (I2C_ISR_NACKF));
AnnaBridge 156:ff21514d8981 1584 }
AnnaBridge 156:ff21514d8981 1585
AnnaBridge 156:ff21514d8981 1586 /**
AnnaBridge 156:ff21514d8981 1587 * @brief Indicate the status of Stop detection flag.
AnnaBridge 156:ff21514d8981 1588 * @note RESET: Clear default value.
AnnaBridge 156:ff21514d8981 1589 * SET: When a Stop condition is detected.
AnnaBridge 156:ff21514d8981 1590 * @rmtoll ISR STOPF LL_I2C_IsActiveFlag_STOP
AnnaBridge 156:ff21514d8981 1591 * @param I2Cx I2C Instance.
AnnaBridge 156:ff21514d8981 1592 * @retval State of bit (1 or 0).
AnnaBridge 156:ff21514d8981 1593 */
AnnaBridge 156:ff21514d8981 1594 __STATIC_INLINE uint32_t LL_I2C_IsActiveFlag_STOP(I2C_TypeDef *I2Cx)
AnnaBridge 156:ff21514d8981 1595 {
AnnaBridge 156:ff21514d8981 1596 return (READ_BIT(I2Cx->ISR, I2C_ISR_STOPF) == (I2C_ISR_STOPF));
AnnaBridge 156:ff21514d8981 1597 }
AnnaBridge 156:ff21514d8981 1598
AnnaBridge 156:ff21514d8981 1599 /**
AnnaBridge 156:ff21514d8981 1600 * @brief Indicate the status of Transfer complete flag (master mode).
AnnaBridge 156:ff21514d8981 1601 * @note RESET: Clear default value.
AnnaBridge 156:ff21514d8981 1602 * SET: When RELOAD=0, AUTOEND=0 and NBYTES date have been transferred.
AnnaBridge 156:ff21514d8981 1603 * @rmtoll ISR TC LL_I2C_IsActiveFlag_TC
AnnaBridge 156:ff21514d8981 1604 * @param I2Cx I2C Instance.
AnnaBridge 156:ff21514d8981 1605 * @retval State of bit (1 or 0).
AnnaBridge 156:ff21514d8981 1606 */
AnnaBridge 156:ff21514d8981 1607 __STATIC_INLINE uint32_t LL_I2C_IsActiveFlag_TC(I2C_TypeDef *I2Cx)
AnnaBridge 156:ff21514d8981 1608 {
AnnaBridge 156:ff21514d8981 1609 return (READ_BIT(I2Cx->ISR, I2C_ISR_TC) == (I2C_ISR_TC));
AnnaBridge 156:ff21514d8981 1610 }
AnnaBridge 156:ff21514d8981 1611
AnnaBridge 156:ff21514d8981 1612 /**
AnnaBridge 156:ff21514d8981 1613 * @brief Indicate the status of Transfer complete flag (master mode).
AnnaBridge 156:ff21514d8981 1614 * @note RESET: Clear default value.
AnnaBridge 156:ff21514d8981 1615 * SET: When RELOAD=1 and NBYTES date have been transferred.
AnnaBridge 156:ff21514d8981 1616 * @rmtoll ISR TCR LL_I2C_IsActiveFlag_TCR
AnnaBridge 156:ff21514d8981 1617 * @param I2Cx I2C Instance.
AnnaBridge 156:ff21514d8981 1618 * @retval State of bit (1 or 0).
AnnaBridge 156:ff21514d8981 1619 */
AnnaBridge 156:ff21514d8981 1620 __STATIC_INLINE uint32_t LL_I2C_IsActiveFlag_TCR(I2C_TypeDef *I2Cx)
AnnaBridge 156:ff21514d8981 1621 {
AnnaBridge 156:ff21514d8981 1622 return (READ_BIT(I2Cx->ISR, I2C_ISR_TCR) == (I2C_ISR_TCR));
AnnaBridge 156:ff21514d8981 1623 }
AnnaBridge 156:ff21514d8981 1624
AnnaBridge 156:ff21514d8981 1625 /**
AnnaBridge 156:ff21514d8981 1626 * @brief Indicate the status of Bus error flag.
AnnaBridge 156:ff21514d8981 1627 * @note RESET: Clear default value.
AnnaBridge 156:ff21514d8981 1628 * SET: When a misplaced Start or Stop condition is detected.
AnnaBridge 156:ff21514d8981 1629 * @rmtoll ISR BERR LL_I2C_IsActiveFlag_BERR
AnnaBridge 156:ff21514d8981 1630 * @param I2Cx I2C Instance.
AnnaBridge 156:ff21514d8981 1631 * @retval State of bit (1 or 0).
AnnaBridge 156:ff21514d8981 1632 */
AnnaBridge 156:ff21514d8981 1633 __STATIC_INLINE uint32_t LL_I2C_IsActiveFlag_BERR(I2C_TypeDef *I2Cx)
AnnaBridge 156:ff21514d8981 1634 {
AnnaBridge 156:ff21514d8981 1635 return (READ_BIT(I2Cx->ISR, I2C_ISR_BERR) == (I2C_ISR_BERR));
AnnaBridge 156:ff21514d8981 1636 }
AnnaBridge 156:ff21514d8981 1637
AnnaBridge 156:ff21514d8981 1638 /**
AnnaBridge 156:ff21514d8981 1639 * @brief Indicate the status of Arbitration lost flag.
AnnaBridge 156:ff21514d8981 1640 * @note RESET: Clear default value.
AnnaBridge 156:ff21514d8981 1641 * SET: When arbitration lost.
AnnaBridge 156:ff21514d8981 1642 * @rmtoll ISR ARLO LL_I2C_IsActiveFlag_ARLO
AnnaBridge 156:ff21514d8981 1643 * @param I2Cx I2C Instance.
AnnaBridge 156:ff21514d8981 1644 * @retval State of bit (1 or 0).
AnnaBridge 156:ff21514d8981 1645 */
AnnaBridge 156:ff21514d8981 1646 __STATIC_INLINE uint32_t LL_I2C_IsActiveFlag_ARLO(I2C_TypeDef *I2Cx)
AnnaBridge 156:ff21514d8981 1647 {
AnnaBridge 156:ff21514d8981 1648 return (READ_BIT(I2Cx->ISR, I2C_ISR_ARLO) == (I2C_ISR_ARLO));
AnnaBridge 156:ff21514d8981 1649 }
AnnaBridge 156:ff21514d8981 1650
AnnaBridge 156:ff21514d8981 1651 /**
AnnaBridge 156:ff21514d8981 1652 * @brief Indicate the status of Overrun/Underrun flag (slave mode).
AnnaBridge 156:ff21514d8981 1653 * @note RESET: Clear default value.
AnnaBridge 156:ff21514d8981 1654 * SET: When an overrun/underrun error occurs (Clock Stretching Disabled).
AnnaBridge 156:ff21514d8981 1655 * @rmtoll ISR OVR LL_I2C_IsActiveFlag_OVR
AnnaBridge 156:ff21514d8981 1656 * @param I2Cx I2C Instance.
AnnaBridge 156:ff21514d8981 1657 * @retval State of bit (1 or 0).
AnnaBridge 156:ff21514d8981 1658 */
AnnaBridge 156:ff21514d8981 1659 __STATIC_INLINE uint32_t LL_I2C_IsActiveFlag_OVR(I2C_TypeDef *I2Cx)
AnnaBridge 156:ff21514d8981 1660 {
AnnaBridge 156:ff21514d8981 1661 return (READ_BIT(I2Cx->ISR, I2C_ISR_OVR) == (I2C_ISR_OVR));
AnnaBridge 156:ff21514d8981 1662 }
AnnaBridge 156:ff21514d8981 1663
AnnaBridge 156:ff21514d8981 1664 /**
AnnaBridge 156:ff21514d8981 1665 * @brief Indicate the status of SMBus PEC error flag in reception.
AnnaBridge 156:ff21514d8981 1666 * @note Macro @ref IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
AnnaBridge 156:ff21514d8981 1667 * SMBus feature is supported by the I2Cx Instance.
AnnaBridge 156:ff21514d8981 1668 * @note RESET: Clear default value.
AnnaBridge 156:ff21514d8981 1669 * SET: When the received PEC does not match with the PEC register content.
AnnaBridge 156:ff21514d8981 1670 * @rmtoll ISR PECERR LL_I2C_IsActiveSMBusFlag_PECERR
AnnaBridge 156:ff21514d8981 1671 * @param I2Cx I2C Instance.
AnnaBridge 156:ff21514d8981 1672 * @retval State of bit (1 or 0).
AnnaBridge 156:ff21514d8981 1673 */
AnnaBridge 156:ff21514d8981 1674 __STATIC_INLINE uint32_t LL_I2C_IsActiveSMBusFlag_PECERR(I2C_TypeDef *I2Cx)
AnnaBridge 156:ff21514d8981 1675 {
AnnaBridge 156:ff21514d8981 1676 return (READ_BIT(I2Cx->ISR, I2C_ISR_PECERR) == (I2C_ISR_PECERR));
AnnaBridge 156:ff21514d8981 1677 }
AnnaBridge 156:ff21514d8981 1678
AnnaBridge 156:ff21514d8981 1679 /**
AnnaBridge 156:ff21514d8981 1680 * @brief Indicate the status of SMBus Timeout detection flag.
AnnaBridge 156:ff21514d8981 1681 * @note Macro @ref IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
AnnaBridge 156:ff21514d8981 1682 * SMBus feature is supported by the I2Cx Instance.
AnnaBridge 156:ff21514d8981 1683 * @note RESET: Clear default value.
AnnaBridge 156:ff21514d8981 1684 * SET: When a timeout or extended clock timeout occurs.
AnnaBridge 156:ff21514d8981 1685 * @rmtoll ISR TIMEOUT LL_I2C_IsActiveSMBusFlag_TIMEOUT
AnnaBridge 156:ff21514d8981 1686 * @param I2Cx I2C Instance.
AnnaBridge 156:ff21514d8981 1687 * @retval State of bit (1 or 0).
AnnaBridge 156:ff21514d8981 1688 */
AnnaBridge 156:ff21514d8981 1689 __STATIC_INLINE uint32_t LL_I2C_IsActiveSMBusFlag_TIMEOUT(I2C_TypeDef *I2Cx)
AnnaBridge 156:ff21514d8981 1690 {
AnnaBridge 156:ff21514d8981 1691 return (READ_BIT(I2Cx->ISR, I2C_ISR_TIMEOUT) == (I2C_ISR_TIMEOUT));
AnnaBridge 156:ff21514d8981 1692 }
AnnaBridge 156:ff21514d8981 1693
AnnaBridge 156:ff21514d8981 1694 /**
AnnaBridge 156:ff21514d8981 1695 * @brief Indicate the status of SMBus alert flag.
AnnaBridge 156:ff21514d8981 1696 * @note Macro @ref IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
AnnaBridge 156:ff21514d8981 1697 * SMBus feature is supported by the I2Cx Instance.
AnnaBridge 156:ff21514d8981 1698 * @note RESET: Clear default value.
AnnaBridge 156:ff21514d8981 1699 * SET: When SMBus host configuration, SMBus alert enabled and
AnnaBridge 156:ff21514d8981 1700 * a falling edge event occurs on SMBA pin.
AnnaBridge 156:ff21514d8981 1701 * @rmtoll ISR ALERT LL_I2C_IsActiveSMBusFlag_ALERT
AnnaBridge 156:ff21514d8981 1702 * @param I2Cx I2C Instance.
AnnaBridge 156:ff21514d8981 1703 * @retval State of bit (1 or 0).
AnnaBridge 156:ff21514d8981 1704 */
AnnaBridge 156:ff21514d8981 1705 __STATIC_INLINE uint32_t LL_I2C_IsActiveSMBusFlag_ALERT(I2C_TypeDef *I2Cx)
AnnaBridge 156:ff21514d8981 1706 {
AnnaBridge 156:ff21514d8981 1707 return (READ_BIT(I2Cx->ISR, I2C_ISR_ALERT) == (I2C_ISR_ALERT));
AnnaBridge 156:ff21514d8981 1708 }
AnnaBridge 156:ff21514d8981 1709
AnnaBridge 156:ff21514d8981 1710 /**
AnnaBridge 156:ff21514d8981 1711 * @brief Indicate the status of Bus Busy flag.
AnnaBridge 156:ff21514d8981 1712 * @note RESET: Clear default value.
AnnaBridge 156:ff21514d8981 1713 * SET: When a Start condition is detected.
AnnaBridge 156:ff21514d8981 1714 * @rmtoll ISR BUSY LL_I2C_IsActiveFlag_BUSY
AnnaBridge 156:ff21514d8981 1715 * @param I2Cx I2C Instance.
AnnaBridge 156:ff21514d8981 1716 * @retval State of bit (1 or 0).
AnnaBridge 156:ff21514d8981 1717 */
AnnaBridge 156:ff21514d8981 1718 __STATIC_INLINE uint32_t LL_I2C_IsActiveFlag_BUSY(I2C_TypeDef *I2Cx)
AnnaBridge 156:ff21514d8981 1719 {
AnnaBridge 156:ff21514d8981 1720 return (READ_BIT(I2Cx->ISR, I2C_ISR_BUSY) == (I2C_ISR_BUSY));
AnnaBridge 156:ff21514d8981 1721 }
AnnaBridge 156:ff21514d8981 1722
AnnaBridge 156:ff21514d8981 1723 /**
AnnaBridge 156:ff21514d8981 1724 * @brief Clear Address Matched flag.
AnnaBridge 156:ff21514d8981 1725 * @rmtoll ICR ADDRCF LL_I2C_ClearFlag_ADDR
AnnaBridge 156:ff21514d8981 1726 * @param I2Cx I2C Instance.
AnnaBridge 156:ff21514d8981 1727 * @retval None
AnnaBridge 156:ff21514d8981 1728 */
AnnaBridge 156:ff21514d8981 1729 __STATIC_INLINE void LL_I2C_ClearFlag_ADDR(I2C_TypeDef *I2Cx)
AnnaBridge 156:ff21514d8981 1730 {
AnnaBridge 156:ff21514d8981 1731 SET_BIT(I2Cx->ICR, I2C_ICR_ADDRCF);
AnnaBridge 156:ff21514d8981 1732 }
AnnaBridge 156:ff21514d8981 1733
AnnaBridge 156:ff21514d8981 1734 /**
AnnaBridge 156:ff21514d8981 1735 * @brief Clear Not Acknowledge flag.
AnnaBridge 156:ff21514d8981 1736 * @rmtoll ICR NACKCF LL_I2C_ClearFlag_NACK
AnnaBridge 156:ff21514d8981 1737 * @param I2Cx I2C Instance.
AnnaBridge 156:ff21514d8981 1738 * @retval None
AnnaBridge 156:ff21514d8981 1739 */
AnnaBridge 156:ff21514d8981 1740 __STATIC_INLINE void LL_I2C_ClearFlag_NACK(I2C_TypeDef *I2Cx)
AnnaBridge 156:ff21514d8981 1741 {
AnnaBridge 156:ff21514d8981 1742 SET_BIT(I2Cx->ICR, I2C_ICR_NACKCF);
AnnaBridge 156:ff21514d8981 1743 }
AnnaBridge 156:ff21514d8981 1744
AnnaBridge 156:ff21514d8981 1745 /**
AnnaBridge 156:ff21514d8981 1746 * @brief Clear Stop detection flag.
AnnaBridge 156:ff21514d8981 1747 * @rmtoll ICR STOPCF LL_I2C_ClearFlag_STOP
AnnaBridge 156:ff21514d8981 1748 * @param I2Cx I2C Instance.
AnnaBridge 156:ff21514d8981 1749 * @retval None
AnnaBridge 156:ff21514d8981 1750 */
AnnaBridge 156:ff21514d8981 1751 __STATIC_INLINE void LL_I2C_ClearFlag_STOP(I2C_TypeDef *I2Cx)
AnnaBridge 156:ff21514d8981 1752 {
AnnaBridge 156:ff21514d8981 1753 SET_BIT(I2Cx->ICR, I2C_ICR_STOPCF);
AnnaBridge 156:ff21514d8981 1754 }
AnnaBridge 156:ff21514d8981 1755
AnnaBridge 156:ff21514d8981 1756 /**
AnnaBridge 156:ff21514d8981 1757 * @brief Clear Transmit data register empty flag (TXE).
AnnaBridge 156:ff21514d8981 1758 * @note This bit can be clear by software in order to flush the transmit data register (TXDR).
AnnaBridge 156:ff21514d8981 1759 * @rmtoll ISR TXE LL_I2C_ClearFlag_TXE
AnnaBridge 156:ff21514d8981 1760 * @param I2Cx I2C Instance.
AnnaBridge 156:ff21514d8981 1761 * @retval None
AnnaBridge 156:ff21514d8981 1762 */
AnnaBridge 156:ff21514d8981 1763 __STATIC_INLINE void LL_I2C_ClearFlag_TXE(I2C_TypeDef *I2Cx)
AnnaBridge 156:ff21514d8981 1764 {
AnnaBridge 156:ff21514d8981 1765 WRITE_REG(I2Cx->ISR, I2C_ISR_TXE);
AnnaBridge 156:ff21514d8981 1766 }
AnnaBridge 156:ff21514d8981 1767
AnnaBridge 156:ff21514d8981 1768 /**
AnnaBridge 156:ff21514d8981 1769 * @brief Clear Bus error flag.
AnnaBridge 156:ff21514d8981 1770 * @rmtoll ICR BERRCF LL_I2C_ClearFlag_BERR
AnnaBridge 156:ff21514d8981 1771 * @param I2Cx I2C Instance.
AnnaBridge 156:ff21514d8981 1772 * @retval None
AnnaBridge 156:ff21514d8981 1773 */
AnnaBridge 156:ff21514d8981 1774 __STATIC_INLINE void LL_I2C_ClearFlag_BERR(I2C_TypeDef *I2Cx)
AnnaBridge 156:ff21514d8981 1775 {
AnnaBridge 156:ff21514d8981 1776 SET_BIT(I2Cx->ICR, I2C_ICR_BERRCF);
AnnaBridge 156:ff21514d8981 1777 }
AnnaBridge 156:ff21514d8981 1778
AnnaBridge 156:ff21514d8981 1779 /**
AnnaBridge 156:ff21514d8981 1780 * @brief Clear Arbitration lost flag.
AnnaBridge 156:ff21514d8981 1781 * @rmtoll ICR ARLOCF LL_I2C_ClearFlag_ARLO
AnnaBridge 156:ff21514d8981 1782 * @param I2Cx I2C Instance.
AnnaBridge 156:ff21514d8981 1783 * @retval None
AnnaBridge 156:ff21514d8981 1784 */
AnnaBridge 156:ff21514d8981 1785 __STATIC_INLINE void LL_I2C_ClearFlag_ARLO(I2C_TypeDef *I2Cx)
AnnaBridge 156:ff21514d8981 1786 {
AnnaBridge 156:ff21514d8981 1787 SET_BIT(I2Cx->ICR, I2C_ICR_ARLOCF);
AnnaBridge 156:ff21514d8981 1788 }
AnnaBridge 156:ff21514d8981 1789
AnnaBridge 156:ff21514d8981 1790 /**
AnnaBridge 156:ff21514d8981 1791 * @brief Clear Overrun/Underrun flag.
AnnaBridge 156:ff21514d8981 1792 * @rmtoll ICR OVRCF LL_I2C_ClearFlag_OVR
AnnaBridge 156:ff21514d8981 1793 * @param I2Cx I2C Instance.
AnnaBridge 156:ff21514d8981 1794 * @retval None
AnnaBridge 156:ff21514d8981 1795 */
AnnaBridge 156:ff21514d8981 1796 __STATIC_INLINE void LL_I2C_ClearFlag_OVR(I2C_TypeDef *I2Cx)
AnnaBridge 156:ff21514d8981 1797 {
AnnaBridge 156:ff21514d8981 1798 SET_BIT(I2Cx->ICR, I2C_ICR_OVRCF);
AnnaBridge 156:ff21514d8981 1799 }
AnnaBridge 156:ff21514d8981 1800
AnnaBridge 156:ff21514d8981 1801 /**
AnnaBridge 156:ff21514d8981 1802 * @brief Clear SMBus PEC error flag.
AnnaBridge 156:ff21514d8981 1803 * @note Macro @ref IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
AnnaBridge 156:ff21514d8981 1804 * SMBus feature is supported by the I2Cx Instance.
AnnaBridge 156:ff21514d8981 1805 * @rmtoll ICR PECCF LL_I2C_ClearSMBusFlag_PECERR
AnnaBridge 156:ff21514d8981 1806 * @param I2Cx I2C Instance.
AnnaBridge 156:ff21514d8981 1807 * @retval None
AnnaBridge 156:ff21514d8981 1808 */
AnnaBridge 156:ff21514d8981 1809 __STATIC_INLINE void LL_I2C_ClearSMBusFlag_PECERR(I2C_TypeDef *I2Cx)
AnnaBridge 156:ff21514d8981 1810 {
AnnaBridge 156:ff21514d8981 1811 SET_BIT(I2Cx->ICR, I2C_ICR_PECCF);
AnnaBridge 156:ff21514d8981 1812 }
AnnaBridge 156:ff21514d8981 1813
AnnaBridge 156:ff21514d8981 1814 /**
AnnaBridge 156:ff21514d8981 1815 * @brief Clear SMBus Timeout detection flag.
AnnaBridge 156:ff21514d8981 1816 * @note Macro @ref IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
AnnaBridge 156:ff21514d8981 1817 * SMBus feature is supported by the I2Cx Instance.
AnnaBridge 156:ff21514d8981 1818 * @rmtoll ICR TIMOUTCF LL_I2C_ClearSMBusFlag_TIMEOUT
AnnaBridge 156:ff21514d8981 1819 * @param I2Cx I2C Instance.
AnnaBridge 156:ff21514d8981 1820 * @retval None
AnnaBridge 156:ff21514d8981 1821 */
AnnaBridge 156:ff21514d8981 1822 __STATIC_INLINE void LL_I2C_ClearSMBusFlag_TIMEOUT(I2C_TypeDef *I2Cx)
AnnaBridge 156:ff21514d8981 1823 {
AnnaBridge 156:ff21514d8981 1824 SET_BIT(I2Cx->ICR, I2C_ICR_TIMOUTCF);
AnnaBridge 156:ff21514d8981 1825 }
AnnaBridge 156:ff21514d8981 1826
AnnaBridge 156:ff21514d8981 1827 /**
AnnaBridge 156:ff21514d8981 1828 * @brief Clear SMBus Alert flag.
AnnaBridge 156:ff21514d8981 1829 * @note Macro @ref IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
AnnaBridge 156:ff21514d8981 1830 * SMBus feature is supported by the I2Cx Instance.
AnnaBridge 156:ff21514d8981 1831 * @rmtoll ICR ALERTCF LL_I2C_ClearSMBusFlag_ALERT
AnnaBridge 156:ff21514d8981 1832 * @param I2Cx I2C Instance.
AnnaBridge 156:ff21514d8981 1833 * @retval None
AnnaBridge 156:ff21514d8981 1834 */
AnnaBridge 156:ff21514d8981 1835 __STATIC_INLINE void LL_I2C_ClearSMBusFlag_ALERT(I2C_TypeDef *I2Cx)
AnnaBridge 156:ff21514d8981 1836 {
AnnaBridge 156:ff21514d8981 1837 SET_BIT(I2Cx->ICR, I2C_ICR_ALERTCF);
AnnaBridge 156:ff21514d8981 1838 }
AnnaBridge 156:ff21514d8981 1839
AnnaBridge 156:ff21514d8981 1840 /**
AnnaBridge 156:ff21514d8981 1841 * @}
AnnaBridge 156:ff21514d8981 1842 */
AnnaBridge 156:ff21514d8981 1843
AnnaBridge 156:ff21514d8981 1844 /** @defgroup I2C_LL_EF_Data_Management Data_Management
AnnaBridge 156:ff21514d8981 1845 * @{
AnnaBridge 156:ff21514d8981 1846 */
AnnaBridge 156:ff21514d8981 1847
AnnaBridge 156:ff21514d8981 1848 /**
AnnaBridge 156:ff21514d8981 1849 * @brief Enable automatic STOP condition generation (master mode).
AnnaBridge 156:ff21514d8981 1850 * @note Automatic end mode : a STOP condition is automatically sent when NBYTES data are transferred.
AnnaBridge 156:ff21514d8981 1851 * This bit has no effect in slave mode or when RELOAD bit is set.
AnnaBridge 156:ff21514d8981 1852 * @rmtoll CR2 AUTOEND LL_I2C_EnableAutoEndMode
AnnaBridge 156:ff21514d8981 1853 * @param I2Cx I2C Instance.
AnnaBridge 156:ff21514d8981 1854 * @retval None
AnnaBridge 156:ff21514d8981 1855 */
AnnaBridge 156:ff21514d8981 1856 __STATIC_INLINE void LL_I2C_EnableAutoEndMode(I2C_TypeDef *I2Cx)
AnnaBridge 156:ff21514d8981 1857 {
AnnaBridge 156:ff21514d8981 1858 SET_BIT(I2Cx->CR2, I2C_CR2_AUTOEND);
AnnaBridge 156:ff21514d8981 1859 }
AnnaBridge 156:ff21514d8981 1860
AnnaBridge 156:ff21514d8981 1861 /**
AnnaBridge 156:ff21514d8981 1862 * @brief Disable automatic STOP condition generation (master mode).
AnnaBridge 156:ff21514d8981 1863 * @note Software end mode : TC flag is set when NBYTES data are transferre, stretching SCL low.
AnnaBridge 156:ff21514d8981 1864 * @rmtoll CR2 AUTOEND LL_I2C_DisableAutoEndMode
AnnaBridge 156:ff21514d8981 1865 * @param I2Cx I2C Instance.
AnnaBridge 156:ff21514d8981 1866 * @retval None
AnnaBridge 156:ff21514d8981 1867 */
AnnaBridge 156:ff21514d8981 1868 __STATIC_INLINE void LL_I2C_DisableAutoEndMode(I2C_TypeDef *I2Cx)
AnnaBridge 156:ff21514d8981 1869 {
AnnaBridge 156:ff21514d8981 1870 CLEAR_BIT(I2Cx->CR2, I2C_CR2_AUTOEND);
AnnaBridge 156:ff21514d8981 1871 }
AnnaBridge 156:ff21514d8981 1872
AnnaBridge 156:ff21514d8981 1873 /**
AnnaBridge 156:ff21514d8981 1874 * @brief Check if automatic STOP condition is enabled or disabled.
AnnaBridge 156:ff21514d8981 1875 * @rmtoll CR2 AUTOEND LL_I2C_IsEnabledAutoEndMode
AnnaBridge 156:ff21514d8981 1876 * @param I2Cx I2C Instance.
AnnaBridge 156:ff21514d8981 1877 * @retval State of bit (1 or 0).
AnnaBridge 156:ff21514d8981 1878 */
AnnaBridge 156:ff21514d8981 1879 __STATIC_INLINE uint32_t LL_I2C_IsEnabledAutoEndMode(I2C_TypeDef *I2Cx)
AnnaBridge 156:ff21514d8981 1880 {
AnnaBridge 156:ff21514d8981 1881 return (READ_BIT(I2Cx->CR2, I2C_CR2_AUTOEND) == (I2C_CR2_AUTOEND));
AnnaBridge 156:ff21514d8981 1882 }
AnnaBridge 156:ff21514d8981 1883
AnnaBridge 156:ff21514d8981 1884 /**
AnnaBridge 156:ff21514d8981 1885 * @brief Enable reload mode (master mode).
AnnaBridge 156:ff21514d8981 1886 * @note The transfer is not completed after the NBYTES data transfer, NBYTES will be reloaded when TCR flag is set.
AnnaBridge 156:ff21514d8981 1887 * @rmtoll CR2 RELOAD LL_I2C_EnableReloadMode
AnnaBridge 156:ff21514d8981 1888 * @param I2Cx I2C Instance.
AnnaBridge 156:ff21514d8981 1889 * @retval None
AnnaBridge 156:ff21514d8981 1890 */
AnnaBridge 156:ff21514d8981 1891 __STATIC_INLINE void LL_I2C_EnableReloadMode(I2C_TypeDef *I2Cx)
AnnaBridge 156:ff21514d8981 1892 {
AnnaBridge 156:ff21514d8981 1893 SET_BIT(I2Cx->CR2, I2C_CR2_RELOAD);
AnnaBridge 156:ff21514d8981 1894 }
AnnaBridge 156:ff21514d8981 1895
AnnaBridge 156:ff21514d8981 1896 /**
AnnaBridge 156:ff21514d8981 1897 * @brief Disable reload mode (master mode).
AnnaBridge 156:ff21514d8981 1898 * @note The transfer is completed after the NBYTES data transfer(STOP or RESTART will follow).
AnnaBridge 156:ff21514d8981 1899 * @rmtoll CR2 RELOAD LL_I2C_DisableReloadMode
AnnaBridge 156:ff21514d8981 1900 * @param I2Cx I2C Instance.
AnnaBridge 156:ff21514d8981 1901 * @retval None
AnnaBridge 156:ff21514d8981 1902 */
AnnaBridge 156:ff21514d8981 1903 __STATIC_INLINE void LL_I2C_DisableReloadMode(I2C_TypeDef *I2Cx)
AnnaBridge 156:ff21514d8981 1904 {
AnnaBridge 156:ff21514d8981 1905 CLEAR_BIT(I2Cx->CR2, I2C_CR2_RELOAD);
AnnaBridge 156:ff21514d8981 1906 }
AnnaBridge 156:ff21514d8981 1907
AnnaBridge 156:ff21514d8981 1908 /**
AnnaBridge 156:ff21514d8981 1909 * @brief Check if reload mode is enabled or disabled.
AnnaBridge 156:ff21514d8981 1910 * @rmtoll CR2 RELOAD LL_I2C_IsEnabledReloadMode
AnnaBridge 156:ff21514d8981 1911 * @param I2Cx I2C Instance.
AnnaBridge 156:ff21514d8981 1912 * @retval State of bit (1 or 0).
AnnaBridge 156:ff21514d8981 1913 */
AnnaBridge 156:ff21514d8981 1914 __STATIC_INLINE uint32_t LL_I2C_IsEnabledReloadMode(I2C_TypeDef *I2Cx)
AnnaBridge 156:ff21514d8981 1915 {
AnnaBridge 156:ff21514d8981 1916 return (READ_BIT(I2Cx->CR2, I2C_CR2_RELOAD) == (I2C_CR2_RELOAD));
AnnaBridge 156:ff21514d8981 1917 }
AnnaBridge 156:ff21514d8981 1918
AnnaBridge 156:ff21514d8981 1919 /**
AnnaBridge 156:ff21514d8981 1920 * @brief Configure the number of bytes for transfer.
AnnaBridge 156:ff21514d8981 1921 * @note Changing these bits when START bit is set is not allowed.
AnnaBridge 156:ff21514d8981 1922 * @rmtoll CR2 NBYTES LL_I2C_SetTransferSize
AnnaBridge 156:ff21514d8981 1923 * @param I2Cx I2C Instance.
AnnaBridge 156:ff21514d8981 1924 * @param TransferSize This parameter must be a value between Min_Data=0x00 and Max_Data=0xFF.
AnnaBridge 156:ff21514d8981 1925 * @retval None
AnnaBridge 156:ff21514d8981 1926 */
AnnaBridge 156:ff21514d8981 1927 __STATIC_INLINE void LL_I2C_SetTransferSize(I2C_TypeDef *I2Cx, uint32_t TransferSize)
AnnaBridge 156:ff21514d8981 1928 {
AnnaBridge 156:ff21514d8981 1929 MODIFY_REG(I2Cx->CR2, I2C_CR2_NBYTES, TransferSize << I2C_CR2_NBYTES_Pos);
AnnaBridge 156:ff21514d8981 1930 }
AnnaBridge 156:ff21514d8981 1931
AnnaBridge 156:ff21514d8981 1932 /**
AnnaBridge 156:ff21514d8981 1933 * @brief Get the number of bytes configured for transfer.
AnnaBridge 156:ff21514d8981 1934 * @rmtoll CR2 NBYTES LL_I2C_GetTransferSize
AnnaBridge 156:ff21514d8981 1935 * @param I2Cx I2C Instance.
AnnaBridge 156:ff21514d8981 1936 * @retval Value between Min_Data=0x0 and Max_Data=0xFF
AnnaBridge 156:ff21514d8981 1937 */
AnnaBridge 156:ff21514d8981 1938 __STATIC_INLINE uint32_t LL_I2C_GetTransferSize(I2C_TypeDef *I2Cx)
AnnaBridge 156:ff21514d8981 1939 {
AnnaBridge 156:ff21514d8981 1940 return (uint32_t)(READ_BIT(I2Cx->CR2, I2C_CR2_NBYTES) >> I2C_CR2_NBYTES_Pos);
AnnaBridge 156:ff21514d8981 1941 }
AnnaBridge 156:ff21514d8981 1942
AnnaBridge 156:ff21514d8981 1943 /**
AnnaBridge 156:ff21514d8981 1944 * @brief Prepare the generation of a ACKnowledge or Non ACKnowledge condition after the address receive match code or next received byte.
AnnaBridge 156:ff21514d8981 1945 * @note Usage in Slave mode only.
AnnaBridge 156:ff21514d8981 1946 * @rmtoll CR2 NACK LL_I2C_AcknowledgeNextData
AnnaBridge 156:ff21514d8981 1947 * @param I2Cx I2C Instance.
AnnaBridge 156:ff21514d8981 1948 * @param TypeAcknowledge This parameter can be one of the following values:
AnnaBridge 156:ff21514d8981 1949 * @arg @ref LL_I2C_ACK
AnnaBridge 156:ff21514d8981 1950 * @arg @ref LL_I2C_NACK
AnnaBridge 156:ff21514d8981 1951 * @retval None
AnnaBridge 156:ff21514d8981 1952 */
AnnaBridge 156:ff21514d8981 1953 __STATIC_INLINE void LL_I2C_AcknowledgeNextData(I2C_TypeDef *I2Cx, uint32_t TypeAcknowledge)
AnnaBridge 156:ff21514d8981 1954 {
AnnaBridge 156:ff21514d8981 1955 MODIFY_REG(I2Cx->CR2, I2C_CR2_NACK, TypeAcknowledge);
AnnaBridge 156:ff21514d8981 1956 }
AnnaBridge 156:ff21514d8981 1957
AnnaBridge 156:ff21514d8981 1958 /**
AnnaBridge 156:ff21514d8981 1959 * @brief Generate a START or RESTART condition
AnnaBridge 156:ff21514d8981 1960 * @note The START bit can be set even if bus is BUSY or I2C is in slave mode.
AnnaBridge 156:ff21514d8981 1961 * This action has no effect when RELOAD is set.
AnnaBridge 156:ff21514d8981 1962 * @rmtoll CR2 START LL_I2C_GenerateStartCondition
AnnaBridge 156:ff21514d8981 1963 * @param I2Cx I2C Instance.
AnnaBridge 156:ff21514d8981 1964 * @retval None
AnnaBridge 156:ff21514d8981 1965 */
AnnaBridge 156:ff21514d8981 1966 __STATIC_INLINE void LL_I2C_GenerateStartCondition(I2C_TypeDef *I2Cx)
AnnaBridge 156:ff21514d8981 1967 {
AnnaBridge 156:ff21514d8981 1968 SET_BIT(I2Cx->CR2, I2C_CR2_START);
AnnaBridge 156:ff21514d8981 1969 }
AnnaBridge 156:ff21514d8981 1970
AnnaBridge 156:ff21514d8981 1971 /**
AnnaBridge 156:ff21514d8981 1972 * @brief Generate a STOP condition after the current byte transfer (master mode).
AnnaBridge 156:ff21514d8981 1973 * @rmtoll CR2 STOP LL_I2C_GenerateStopCondition
AnnaBridge 156:ff21514d8981 1974 * @param I2Cx I2C Instance.
AnnaBridge 156:ff21514d8981 1975 * @retval None
AnnaBridge 156:ff21514d8981 1976 */
AnnaBridge 156:ff21514d8981 1977 __STATIC_INLINE void LL_I2C_GenerateStopCondition(I2C_TypeDef *I2Cx)
AnnaBridge 156:ff21514d8981 1978 {
AnnaBridge 156:ff21514d8981 1979 SET_BIT(I2Cx->CR2, I2C_CR2_STOP);
AnnaBridge 156:ff21514d8981 1980 }
AnnaBridge 156:ff21514d8981 1981
AnnaBridge 156:ff21514d8981 1982 /**
AnnaBridge 156:ff21514d8981 1983 * @brief Enable automatic RESTART Read request condition for 10bit address header (master mode).
AnnaBridge 156:ff21514d8981 1984 * @note The master sends the complete 10bit slave address read sequence :
AnnaBridge 156:ff21514d8981 1985 * Start + 2 bytes 10bit address in Write direction + Restart + first 7 bits of 10bit address in Read direction.
AnnaBridge 156:ff21514d8981 1986 * @rmtoll CR2 HEAD10R LL_I2C_EnableAuto10BitRead
AnnaBridge 156:ff21514d8981 1987 * @param I2Cx I2C Instance.
AnnaBridge 156:ff21514d8981 1988 * @retval None
AnnaBridge 156:ff21514d8981 1989 */
AnnaBridge 156:ff21514d8981 1990 __STATIC_INLINE void LL_I2C_EnableAuto10BitRead(I2C_TypeDef *I2Cx)
AnnaBridge 156:ff21514d8981 1991 {
AnnaBridge 156:ff21514d8981 1992 CLEAR_BIT(I2Cx->CR2, I2C_CR2_HEAD10R);
AnnaBridge 156:ff21514d8981 1993 }
AnnaBridge 156:ff21514d8981 1994
AnnaBridge 156:ff21514d8981 1995 /**
AnnaBridge 156:ff21514d8981 1996 * @brief Disable automatic RESTART Read request condition for 10bit address header (master mode).
AnnaBridge 156:ff21514d8981 1997 * @note The master only sends the first 7 bits of 10bit address in Read direction.
AnnaBridge 156:ff21514d8981 1998 * @rmtoll CR2 HEAD10R LL_I2C_DisableAuto10BitRead
AnnaBridge 156:ff21514d8981 1999 * @param I2Cx I2C Instance.
AnnaBridge 156:ff21514d8981 2000 * @retval None
AnnaBridge 156:ff21514d8981 2001 */
AnnaBridge 156:ff21514d8981 2002 __STATIC_INLINE void LL_I2C_DisableAuto10BitRead(I2C_TypeDef *I2Cx)
AnnaBridge 156:ff21514d8981 2003 {
AnnaBridge 156:ff21514d8981 2004 SET_BIT(I2Cx->CR2, I2C_CR2_HEAD10R);
AnnaBridge 156:ff21514d8981 2005 }
AnnaBridge 156:ff21514d8981 2006
AnnaBridge 156:ff21514d8981 2007 /**
AnnaBridge 156:ff21514d8981 2008 * @brief Check if automatic RESTART Read request condition for 10bit address header is enabled or disabled.
AnnaBridge 156:ff21514d8981 2009 * @rmtoll CR2 HEAD10R LL_I2C_IsEnabledAuto10BitRead
AnnaBridge 156:ff21514d8981 2010 * @param I2Cx I2C Instance.
AnnaBridge 156:ff21514d8981 2011 * @retval State of bit (1 or 0).
AnnaBridge 156:ff21514d8981 2012 */
AnnaBridge 156:ff21514d8981 2013 __STATIC_INLINE uint32_t LL_I2C_IsEnabledAuto10BitRead(I2C_TypeDef *I2Cx)
AnnaBridge 156:ff21514d8981 2014 {
AnnaBridge 156:ff21514d8981 2015 return (READ_BIT(I2Cx->CR2, I2C_CR2_HEAD10R) != (I2C_CR2_HEAD10R));
AnnaBridge 156:ff21514d8981 2016 }
AnnaBridge 156:ff21514d8981 2017
AnnaBridge 156:ff21514d8981 2018 /**
AnnaBridge 156:ff21514d8981 2019 * @brief Configure the transfer direction (master mode).
AnnaBridge 156:ff21514d8981 2020 * @note Changing these bits when START bit is set is not allowed.
AnnaBridge 156:ff21514d8981 2021 * @rmtoll CR2 RD_WRN LL_I2C_SetTransferRequest
AnnaBridge 156:ff21514d8981 2022 * @param I2Cx I2C Instance.
AnnaBridge 156:ff21514d8981 2023 * @param TransferRequest This parameter can be one of the following values:
AnnaBridge 156:ff21514d8981 2024 * @arg @ref LL_I2C_REQUEST_WRITE
AnnaBridge 156:ff21514d8981 2025 * @arg @ref LL_I2C_REQUEST_READ
AnnaBridge 156:ff21514d8981 2026 * @retval None
AnnaBridge 156:ff21514d8981 2027 */
AnnaBridge 156:ff21514d8981 2028 __STATIC_INLINE void LL_I2C_SetTransferRequest(I2C_TypeDef *I2Cx, uint32_t TransferRequest)
AnnaBridge 156:ff21514d8981 2029 {
AnnaBridge 156:ff21514d8981 2030 MODIFY_REG(I2Cx->CR2, I2C_CR2_RD_WRN, TransferRequest);
AnnaBridge 156:ff21514d8981 2031 }
AnnaBridge 156:ff21514d8981 2032
AnnaBridge 156:ff21514d8981 2033 /**
AnnaBridge 156:ff21514d8981 2034 * @brief Get the transfer direction requested (master mode).
AnnaBridge 156:ff21514d8981 2035 * @rmtoll CR2 RD_WRN LL_I2C_GetTransferRequest
AnnaBridge 156:ff21514d8981 2036 * @param I2Cx I2C Instance.
AnnaBridge 156:ff21514d8981 2037 * @retval Returned value can be one of the following values:
AnnaBridge 156:ff21514d8981 2038 * @arg @ref LL_I2C_REQUEST_WRITE
AnnaBridge 156:ff21514d8981 2039 * @arg @ref LL_I2C_REQUEST_READ
AnnaBridge 156:ff21514d8981 2040 */
AnnaBridge 156:ff21514d8981 2041 __STATIC_INLINE uint32_t LL_I2C_GetTransferRequest(I2C_TypeDef *I2Cx)
AnnaBridge 156:ff21514d8981 2042 {
AnnaBridge 156:ff21514d8981 2043 return (uint32_t)(READ_BIT(I2Cx->CR2, I2C_CR2_RD_WRN));
AnnaBridge 156:ff21514d8981 2044 }
AnnaBridge 156:ff21514d8981 2045
AnnaBridge 156:ff21514d8981 2046 /**
AnnaBridge 156:ff21514d8981 2047 * @brief Configure the slave address for transfer (master mode).
AnnaBridge 156:ff21514d8981 2048 * @note Changing these bits when START bit is set is not allowed.
AnnaBridge 156:ff21514d8981 2049 * @rmtoll CR2 SADD LL_I2C_SetSlaveAddr
AnnaBridge 156:ff21514d8981 2050 * @param I2Cx I2C Instance.
AnnaBridge 156:ff21514d8981 2051 * @param SlaveAddr This parameter must be a value between Min_Data=0x00 and Max_Data=0x3F.
AnnaBridge 156:ff21514d8981 2052 * @retval None
AnnaBridge 156:ff21514d8981 2053 */
AnnaBridge 156:ff21514d8981 2054 __STATIC_INLINE void LL_I2C_SetSlaveAddr(I2C_TypeDef *I2Cx, uint32_t SlaveAddr)
AnnaBridge 156:ff21514d8981 2055 {
AnnaBridge 156:ff21514d8981 2056 MODIFY_REG(I2Cx->CR2, I2C_CR2_SADD, SlaveAddr);
AnnaBridge 156:ff21514d8981 2057 }
AnnaBridge 156:ff21514d8981 2058
AnnaBridge 156:ff21514d8981 2059 /**
AnnaBridge 156:ff21514d8981 2060 * @brief Get the slave address programmed for transfer.
AnnaBridge 156:ff21514d8981 2061 * @rmtoll CR2 SADD LL_I2C_GetSlaveAddr
AnnaBridge 156:ff21514d8981 2062 * @param I2Cx I2C Instance.
AnnaBridge 156:ff21514d8981 2063 * @retval Value between Min_Data=0x0 and Max_Data=0x3F
AnnaBridge 156:ff21514d8981 2064 */
AnnaBridge 156:ff21514d8981 2065 __STATIC_INLINE uint32_t LL_I2C_GetSlaveAddr(I2C_TypeDef *I2Cx)
AnnaBridge 156:ff21514d8981 2066 {
AnnaBridge 156:ff21514d8981 2067 return (uint32_t)(READ_BIT(I2Cx->CR2, I2C_CR2_SADD));
AnnaBridge 156:ff21514d8981 2068 }
AnnaBridge 156:ff21514d8981 2069
AnnaBridge 156:ff21514d8981 2070 /**
AnnaBridge 156:ff21514d8981 2071 * @brief Handles I2Cx communication when starting transfer or during transfer (TC or TCR flag are set).
AnnaBridge 156:ff21514d8981 2072 * @rmtoll CR2 SADD LL_I2C_HandleTransfer\n
AnnaBridge 156:ff21514d8981 2073 * CR2 ADD10 LL_I2C_HandleTransfer\n
AnnaBridge 156:ff21514d8981 2074 * CR2 RD_WRN LL_I2C_HandleTransfer\n
AnnaBridge 156:ff21514d8981 2075 * CR2 START LL_I2C_HandleTransfer\n
AnnaBridge 156:ff21514d8981 2076 * CR2 STOP LL_I2C_HandleTransfer\n
AnnaBridge 156:ff21514d8981 2077 * CR2 RELOAD LL_I2C_HandleTransfer\n
AnnaBridge 156:ff21514d8981 2078 * CR2 NBYTES LL_I2C_HandleTransfer\n
AnnaBridge 156:ff21514d8981 2079 * CR2 AUTOEND LL_I2C_HandleTransfer\n
AnnaBridge 156:ff21514d8981 2080 * CR2 HEAD10R LL_I2C_HandleTransfer
AnnaBridge 156:ff21514d8981 2081 * @param I2Cx I2C Instance.
AnnaBridge 156:ff21514d8981 2082 * @param SlaveAddr Specifies the slave address to be programmed.
AnnaBridge 156:ff21514d8981 2083 * @param SlaveAddrSize This parameter can be one of the following values:
AnnaBridge 156:ff21514d8981 2084 * @arg @ref LL_I2C_ADDRSLAVE_7BIT
AnnaBridge 156:ff21514d8981 2085 * @arg @ref LL_I2C_ADDRSLAVE_10BIT
AnnaBridge 156:ff21514d8981 2086 * @param TransferSize Specifies the number of bytes to be programmed.
AnnaBridge 156:ff21514d8981 2087 * This parameter must be a value between Min_Data=0 and Max_Data=255.
AnnaBridge 156:ff21514d8981 2088 * @param EndMode This parameter can be one of the following values:
AnnaBridge 156:ff21514d8981 2089 * @arg @ref LL_I2C_MODE_RELOAD
AnnaBridge 156:ff21514d8981 2090 * @arg @ref LL_I2C_MODE_AUTOEND
AnnaBridge 156:ff21514d8981 2091 * @arg @ref LL_I2C_MODE_SOFTEND
AnnaBridge 156:ff21514d8981 2092 * @arg @ref LL_I2C_MODE_SMBUS_RELOAD
AnnaBridge 156:ff21514d8981 2093 * @arg @ref LL_I2C_MODE_SMBUS_AUTOEND_NO_PEC
AnnaBridge 156:ff21514d8981 2094 * @arg @ref LL_I2C_MODE_SMBUS_SOFTEND_NO_PEC
AnnaBridge 156:ff21514d8981 2095 * @arg @ref LL_I2C_MODE_SMBUS_AUTOEND_WITH_PEC
AnnaBridge 156:ff21514d8981 2096 * @arg @ref LL_I2C_MODE_SMBUS_SOFTEND_WITH_PEC
AnnaBridge 156:ff21514d8981 2097 * @param Request This parameter can be one of the following values:
AnnaBridge 156:ff21514d8981 2098 * @arg @ref LL_I2C_GENERATE_NOSTARTSTOP
AnnaBridge 156:ff21514d8981 2099 * @arg @ref LL_I2C_GENERATE_STOP
AnnaBridge 156:ff21514d8981 2100 * @arg @ref LL_I2C_GENERATE_START_READ
AnnaBridge 156:ff21514d8981 2101 * @arg @ref LL_I2C_GENERATE_START_WRITE
AnnaBridge 156:ff21514d8981 2102 * @arg @ref LL_I2C_GENERATE_RESTART_7BIT_READ
AnnaBridge 156:ff21514d8981 2103 * @arg @ref LL_I2C_GENERATE_RESTART_7BIT_WRITE
AnnaBridge 156:ff21514d8981 2104 * @arg @ref LL_I2C_GENERATE_RESTART_10BIT_READ
AnnaBridge 156:ff21514d8981 2105 * @arg @ref LL_I2C_GENERATE_RESTART_10BIT_WRITE
AnnaBridge 156:ff21514d8981 2106 * @retval None
AnnaBridge 156:ff21514d8981 2107 */
AnnaBridge 156:ff21514d8981 2108 __STATIC_INLINE void LL_I2C_HandleTransfer(I2C_TypeDef *I2Cx, uint32_t SlaveAddr, uint32_t SlaveAddrSize,
AnnaBridge 156:ff21514d8981 2109 uint32_t TransferSize, uint32_t EndMode, uint32_t Request)
AnnaBridge 156:ff21514d8981 2110 {
AnnaBridge 156:ff21514d8981 2111 MODIFY_REG(I2Cx->CR2, I2C_CR2_SADD | I2C_CR2_ADD10 | I2C_CR2_RD_WRN | I2C_CR2_START | I2C_CR2_STOP | I2C_CR2_RELOAD |
AnnaBridge 156:ff21514d8981 2112 I2C_CR2_NBYTES | I2C_CR2_AUTOEND | I2C_CR2_HEAD10R,
AnnaBridge 156:ff21514d8981 2113 SlaveAddr | SlaveAddrSize | TransferSize << I2C_CR2_NBYTES_Pos | EndMode | Request);
AnnaBridge 156:ff21514d8981 2114 }
AnnaBridge 156:ff21514d8981 2115
AnnaBridge 156:ff21514d8981 2116 /**
AnnaBridge 156:ff21514d8981 2117 * @brief Indicate the value of transfer direction (slave mode).
AnnaBridge 156:ff21514d8981 2118 * @note RESET: Write transfer, Slave enters in receiver mode.
AnnaBridge 156:ff21514d8981 2119 * SET: Read transfer, Slave enters in transmitter mode.
AnnaBridge 156:ff21514d8981 2120 * @rmtoll ISR DIR LL_I2C_GetTransferDirection
AnnaBridge 156:ff21514d8981 2121 * @param I2Cx I2C Instance.
AnnaBridge 156:ff21514d8981 2122 * @retval Returned value can be one of the following values:
AnnaBridge 156:ff21514d8981 2123 * @arg @ref LL_I2C_DIRECTION_WRITE
AnnaBridge 156:ff21514d8981 2124 * @arg @ref LL_I2C_DIRECTION_READ
AnnaBridge 156:ff21514d8981 2125 */
AnnaBridge 156:ff21514d8981 2126 __STATIC_INLINE uint32_t LL_I2C_GetTransferDirection(I2C_TypeDef *I2Cx)
AnnaBridge 156:ff21514d8981 2127 {
AnnaBridge 156:ff21514d8981 2128 return (uint32_t)(READ_BIT(I2Cx->ISR, I2C_ISR_DIR));
AnnaBridge 156:ff21514d8981 2129 }
AnnaBridge 156:ff21514d8981 2130
AnnaBridge 156:ff21514d8981 2131 /**
AnnaBridge 156:ff21514d8981 2132 * @brief Return the slave matched address.
AnnaBridge 156:ff21514d8981 2133 * @rmtoll ISR ADDCODE LL_I2C_GetAddressMatchCode
AnnaBridge 156:ff21514d8981 2134 * @param I2Cx I2C Instance.
AnnaBridge 156:ff21514d8981 2135 * @retval Value between Min_Data=0x00 and Max_Data=0x3F
AnnaBridge 156:ff21514d8981 2136 */
AnnaBridge 156:ff21514d8981 2137 __STATIC_INLINE uint32_t LL_I2C_GetAddressMatchCode(I2C_TypeDef *I2Cx)
AnnaBridge 156:ff21514d8981 2138 {
AnnaBridge 156:ff21514d8981 2139 return (uint32_t)(READ_BIT(I2Cx->ISR, I2C_ISR_ADDCODE) >> I2C_ISR_ADDCODE_Pos << 1);
AnnaBridge 156:ff21514d8981 2140 }
AnnaBridge 156:ff21514d8981 2141
AnnaBridge 156:ff21514d8981 2142 /**
AnnaBridge 156:ff21514d8981 2143 * @brief Enable internal comparison of the SMBus Packet Error byte (transmission or reception mode).
AnnaBridge 156:ff21514d8981 2144 * @note Macro @ref IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
AnnaBridge 156:ff21514d8981 2145 * SMBus feature is supported by the I2Cx Instance.
AnnaBridge 156:ff21514d8981 2146 * @note This feature is cleared by hardware when the PEC byte is transferred, or when a STOP condition or an Address Matched is received.
AnnaBridge 156:ff21514d8981 2147 * This bit has no effect when RELOAD bit is set.
AnnaBridge 156:ff21514d8981 2148 * This bit has no effect in device mode when SBC bit is not set.
AnnaBridge 156:ff21514d8981 2149 * @rmtoll CR2 PECBYTE LL_I2C_EnableSMBusPECCompare
AnnaBridge 156:ff21514d8981 2150 * @param I2Cx I2C Instance.
AnnaBridge 156:ff21514d8981 2151 * @retval None
AnnaBridge 156:ff21514d8981 2152 */
AnnaBridge 156:ff21514d8981 2153 __STATIC_INLINE void LL_I2C_EnableSMBusPECCompare(I2C_TypeDef *I2Cx)
AnnaBridge 156:ff21514d8981 2154 {
AnnaBridge 156:ff21514d8981 2155 SET_BIT(I2Cx->CR2, I2C_CR2_PECBYTE);
AnnaBridge 156:ff21514d8981 2156 }
AnnaBridge 156:ff21514d8981 2157
AnnaBridge 156:ff21514d8981 2158 /**
AnnaBridge 156:ff21514d8981 2159 * @brief Check if the SMBus Packet Error byte internal comparison is requested or not.
AnnaBridge 156:ff21514d8981 2160 * @note Macro @ref IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
AnnaBridge 156:ff21514d8981 2161 * SMBus feature is supported by the I2Cx Instance.
AnnaBridge 156:ff21514d8981 2162 * @rmtoll CR2 PECBYTE LL_I2C_IsEnabledSMBusPECCompare
AnnaBridge 156:ff21514d8981 2163 * @param I2Cx I2C Instance.
AnnaBridge 156:ff21514d8981 2164 * @retval State of bit (1 or 0).
AnnaBridge 156:ff21514d8981 2165 */
AnnaBridge 156:ff21514d8981 2166 __STATIC_INLINE uint32_t LL_I2C_IsEnabledSMBusPECCompare(I2C_TypeDef *I2Cx)
AnnaBridge 156:ff21514d8981 2167 {
AnnaBridge 156:ff21514d8981 2168 return (READ_BIT(I2Cx->CR2, I2C_CR2_PECBYTE) == (I2C_CR2_PECBYTE));
AnnaBridge 156:ff21514d8981 2169 }
AnnaBridge 156:ff21514d8981 2170
AnnaBridge 156:ff21514d8981 2171 /**
AnnaBridge 156:ff21514d8981 2172 * @brief Get the SMBus Packet Error byte calculated.
AnnaBridge 156:ff21514d8981 2173 * @note Macro @ref IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
AnnaBridge 156:ff21514d8981 2174 * SMBus feature is supported by the I2Cx Instance.
AnnaBridge 156:ff21514d8981 2175 * @rmtoll PECR PEC LL_I2C_GetSMBusPEC
AnnaBridge 156:ff21514d8981 2176 * @param I2Cx I2C Instance.
AnnaBridge 156:ff21514d8981 2177 * @retval Value between Min_Data=0x00 and Max_Data=0xFF
AnnaBridge 156:ff21514d8981 2178 */
AnnaBridge 156:ff21514d8981 2179 __STATIC_INLINE uint32_t LL_I2C_GetSMBusPEC(I2C_TypeDef *I2Cx)
AnnaBridge 156:ff21514d8981 2180 {
AnnaBridge 156:ff21514d8981 2181 return (uint32_t)(READ_BIT(I2Cx->PECR, I2C_PECR_PEC));
AnnaBridge 156:ff21514d8981 2182 }
AnnaBridge 156:ff21514d8981 2183
AnnaBridge 156:ff21514d8981 2184 /**
AnnaBridge 156:ff21514d8981 2185 * @brief Read Receive Data register.
AnnaBridge 156:ff21514d8981 2186 * @rmtoll RXDR RXDATA LL_I2C_ReceiveData8
AnnaBridge 156:ff21514d8981 2187 * @param I2Cx I2C Instance.
AnnaBridge 156:ff21514d8981 2188 * @retval Value between Min_Data=0x00 and Max_Data=0xFF
AnnaBridge 156:ff21514d8981 2189 */
AnnaBridge 156:ff21514d8981 2190 __STATIC_INLINE uint8_t LL_I2C_ReceiveData8(I2C_TypeDef *I2Cx)
AnnaBridge 156:ff21514d8981 2191 {
AnnaBridge 156:ff21514d8981 2192 return (uint8_t)(READ_BIT(I2Cx->RXDR, I2C_RXDR_RXDATA));
AnnaBridge 156:ff21514d8981 2193 }
AnnaBridge 156:ff21514d8981 2194
AnnaBridge 156:ff21514d8981 2195 /**
AnnaBridge 156:ff21514d8981 2196 * @brief Write in Transmit Data Register .
AnnaBridge 156:ff21514d8981 2197 * @rmtoll TXDR TXDATA LL_I2C_TransmitData8
AnnaBridge 156:ff21514d8981 2198 * @param I2Cx I2C Instance.
AnnaBridge 156:ff21514d8981 2199 * @param Data Value between Min_Data=0x00 and Max_Data=0xFF
AnnaBridge 156:ff21514d8981 2200 * @retval None
AnnaBridge 156:ff21514d8981 2201 */
AnnaBridge 156:ff21514d8981 2202 __STATIC_INLINE void LL_I2C_TransmitData8(I2C_TypeDef *I2Cx, uint8_t Data)
AnnaBridge 156:ff21514d8981 2203 {
AnnaBridge 156:ff21514d8981 2204 WRITE_REG(I2Cx->TXDR, Data);
AnnaBridge 156:ff21514d8981 2205 }
AnnaBridge 156:ff21514d8981 2206
AnnaBridge 156:ff21514d8981 2207 /**
AnnaBridge 156:ff21514d8981 2208 * @}
AnnaBridge 156:ff21514d8981 2209 */
AnnaBridge 156:ff21514d8981 2210
AnnaBridge 156:ff21514d8981 2211 #if defined(USE_FULL_LL_DRIVER)
AnnaBridge 156:ff21514d8981 2212 /** @defgroup I2C_LL_EF_Init Initialization and de-initialization functions
AnnaBridge 156:ff21514d8981 2213 * @{
AnnaBridge 156:ff21514d8981 2214 */
AnnaBridge 156:ff21514d8981 2215
AnnaBridge 156:ff21514d8981 2216 uint32_t LL_I2C_Init(I2C_TypeDef *I2Cx, LL_I2C_InitTypeDef *I2C_InitStruct);
AnnaBridge 156:ff21514d8981 2217 uint32_t LL_I2C_DeInit(I2C_TypeDef *I2Cx);
AnnaBridge 156:ff21514d8981 2218 void LL_I2C_StructInit(LL_I2C_InitTypeDef *I2C_InitStruct);
AnnaBridge 156:ff21514d8981 2219
AnnaBridge 156:ff21514d8981 2220
AnnaBridge 156:ff21514d8981 2221 /**
AnnaBridge 156:ff21514d8981 2222 * @}
AnnaBridge 156:ff21514d8981 2223 */
AnnaBridge 156:ff21514d8981 2224 #endif /* USE_FULL_LL_DRIVER */
AnnaBridge 156:ff21514d8981 2225
AnnaBridge 156:ff21514d8981 2226 /**
AnnaBridge 156:ff21514d8981 2227 * @}
AnnaBridge 156:ff21514d8981 2228 */
AnnaBridge 156:ff21514d8981 2229
AnnaBridge 156:ff21514d8981 2230 /**
AnnaBridge 156:ff21514d8981 2231 * @}
AnnaBridge 156:ff21514d8981 2232 */
AnnaBridge 156:ff21514d8981 2233
AnnaBridge 156:ff21514d8981 2234 #endif /* I2C1 || I2C2 || I2C3 || I2C4 */
AnnaBridge 156:ff21514d8981 2235
AnnaBridge 156:ff21514d8981 2236 /**
AnnaBridge 156:ff21514d8981 2237 * @}
AnnaBridge 156:ff21514d8981 2238 */
AnnaBridge 156:ff21514d8981 2239
AnnaBridge 156:ff21514d8981 2240 #ifdef __cplusplus
AnnaBridge 156:ff21514d8981 2241 }
AnnaBridge 156:ff21514d8981 2242 #endif
AnnaBridge 156:ff21514d8981 2243
AnnaBridge 156:ff21514d8981 2244 #endif /* __STM32L4xx_LL_I2C_H */
AnnaBridge 156:ff21514d8981 2245
AnnaBridge 156:ff21514d8981 2246 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/