mbed official / mbed

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Committer:
AnnaBridge
Date:
Tue Mar 20 13:30:58 2018 +0000
Revision:
163:e59c8e839560
Parent:
146:22da6e220af6
mbed library. Release version 160

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AnnaBridge 146:22da6e220af6 1 /**
AnnaBridge 146:22da6e220af6 2 ******************************************************************************
AnnaBridge 146:22da6e220af6 3 * @file stm32f4xx_ll_rcc.h
AnnaBridge 146:22da6e220af6 4 * @author MCD Application Team
AnnaBridge 146:22da6e220af6 5 * @brief Header file of RCC LL module.
AnnaBridge 146:22da6e220af6 6 ******************************************************************************
AnnaBridge 146:22da6e220af6 7 * @attention
AnnaBridge 146:22da6e220af6 8 *
AnnaBridge 146:22da6e220af6 9 * <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
AnnaBridge 146:22da6e220af6 10 *
AnnaBridge 146:22da6e220af6 11 * Redistribution and use in source and binary forms, with or without modification,
AnnaBridge 146:22da6e220af6 12 * are permitted provided that the following conditions are met:
AnnaBridge 146:22da6e220af6 13 * 1. Redistributions of source code must retain the above copyright notice,
AnnaBridge 146:22da6e220af6 14 * this list of conditions and the following disclaimer.
AnnaBridge 146:22da6e220af6 15 * 2. Redistributions in binary form must reproduce the above copyright notice,
AnnaBridge 146:22da6e220af6 16 * this list of conditions and the following disclaimer in the documentation
AnnaBridge 146:22da6e220af6 17 * and/or other materials provided with the distribution.
AnnaBridge 146:22da6e220af6 18 * 3. Neither the name of STMicroelectronics nor the names of its contributors
AnnaBridge 146:22da6e220af6 19 * may be used to endorse or promote products derived from this software
AnnaBridge 146:22da6e220af6 20 * without specific prior written permission.
AnnaBridge 146:22da6e220af6 21 *
AnnaBridge 146:22da6e220af6 22 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
AnnaBridge 146:22da6e220af6 23 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
AnnaBridge 146:22da6e220af6 24 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
AnnaBridge 146:22da6e220af6 25 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
AnnaBridge 146:22da6e220af6 26 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
AnnaBridge 146:22da6e220af6 27 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
AnnaBridge 146:22da6e220af6 28 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
AnnaBridge 146:22da6e220af6 29 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
AnnaBridge 146:22da6e220af6 30 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
AnnaBridge 146:22da6e220af6 31 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
AnnaBridge 146:22da6e220af6 32 *
AnnaBridge 146:22da6e220af6 33 ******************************************************************************
AnnaBridge 146:22da6e220af6 34 */
AnnaBridge 146:22da6e220af6 35
AnnaBridge 146:22da6e220af6 36 /* Define to prevent recursive inclusion -------------------------------------*/
AnnaBridge 146:22da6e220af6 37 #ifndef __STM32F4xx_LL_RCC_H
AnnaBridge 146:22da6e220af6 38 #define __STM32F4xx_LL_RCC_H
AnnaBridge 146:22da6e220af6 39
AnnaBridge 146:22da6e220af6 40 #ifdef __cplusplus
AnnaBridge 146:22da6e220af6 41 extern "C" {
AnnaBridge 146:22da6e220af6 42 #endif
AnnaBridge 146:22da6e220af6 43
AnnaBridge 146:22da6e220af6 44 /* Includes ------------------------------------------------------------------*/
AnnaBridge 146:22da6e220af6 45 #include "stm32f4xx.h"
AnnaBridge 146:22da6e220af6 46
AnnaBridge 146:22da6e220af6 47 /** @addtogroup STM32F4xx_LL_Driver
AnnaBridge 146:22da6e220af6 48 * @{
AnnaBridge 146:22da6e220af6 49 */
AnnaBridge 146:22da6e220af6 50
AnnaBridge 146:22da6e220af6 51 #if defined(RCC)
AnnaBridge 146:22da6e220af6 52
AnnaBridge 146:22da6e220af6 53 /** @defgroup RCC_LL RCC
AnnaBridge 146:22da6e220af6 54 * @{
AnnaBridge 146:22da6e220af6 55 */
AnnaBridge 146:22da6e220af6 56
AnnaBridge 146:22da6e220af6 57 /* Private types -------------------------------------------------------------*/
AnnaBridge 146:22da6e220af6 58 /* Private variables ---------------------------------------------------------*/
AnnaBridge 146:22da6e220af6 59 /** @defgroup RCC_LL_Private_Variables RCC Private Variables
AnnaBridge 146:22da6e220af6 60 * @{
AnnaBridge 146:22da6e220af6 61 */
AnnaBridge 146:22da6e220af6 62
AnnaBridge 146:22da6e220af6 63 #if defined(RCC_DCKCFGR_PLLSAIDIVR)
AnnaBridge 146:22da6e220af6 64 static const uint8_t aRCC_PLLSAIDIVRPrescTable[4] = {2, 4, 8, 16};
AnnaBridge 146:22da6e220af6 65 #endif /* RCC_DCKCFGR_PLLSAIDIVR */
AnnaBridge 146:22da6e220af6 66
AnnaBridge 146:22da6e220af6 67 /**
AnnaBridge 146:22da6e220af6 68 * @}
AnnaBridge 146:22da6e220af6 69 */
AnnaBridge 146:22da6e220af6 70 /* Private constants ---------------------------------------------------------*/
AnnaBridge 146:22da6e220af6 71 /* Private macros ------------------------------------------------------------*/
AnnaBridge 146:22da6e220af6 72 #if defined(USE_FULL_LL_DRIVER)
AnnaBridge 146:22da6e220af6 73 /** @defgroup RCC_LL_Private_Macros RCC Private Macros
AnnaBridge 146:22da6e220af6 74 * @{
AnnaBridge 146:22da6e220af6 75 */
AnnaBridge 146:22da6e220af6 76 /**
AnnaBridge 146:22da6e220af6 77 * @}
AnnaBridge 146:22da6e220af6 78 */
AnnaBridge 146:22da6e220af6 79 #endif /*USE_FULL_LL_DRIVER*/
AnnaBridge 146:22da6e220af6 80 /* Exported types ------------------------------------------------------------*/
AnnaBridge 146:22da6e220af6 81 #if defined(USE_FULL_LL_DRIVER)
AnnaBridge 146:22da6e220af6 82 /** @defgroup RCC_LL_Exported_Types RCC Exported Types
AnnaBridge 146:22da6e220af6 83 * @{
AnnaBridge 146:22da6e220af6 84 */
AnnaBridge 146:22da6e220af6 85
AnnaBridge 146:22da6e220af6 86 /** @defgroup LL_ES_CLOCK_FREQ Clocks Frequency Structure
AnnaBridge 146:22da6e220af6 87 * @{
AnnaBridge 146:22da6e220af6 88 */
AnnaBridge 146:22da6e220af6 89
AnnaBridge 146:22da6e220af6 90 /**
AnnaBridge 146:22da6e220af6 91 * @brief RCC Clocks Frequency Structure
AnnaBridge 146:22da6e220af6 92 */
AnnaBridge 146:22da6e220af6 93 typedef struct
AnnaBridge 146:22da6e220af6 94 {
AnnaBridge 146:22da6e220af6 95 uint32_t SYSCLK_Frequency; /*!< SYSCLK clock frequency */
AnnaBridge 146:22da6e220af6 96 uint32_t HCLK_Frequency; /*!< HCLK clock frequency */
AnnaBridge 146:22da6e220af6 97 uint32_t PCLK1_Frequency; /*!< PCLK1 clock frequency */
AnnaBridge 146:22da6e220af6 98 uint32_t PCLK2_Frequency; /*!< PCLK2 clock frequency */
AnnaBridge 146:22da6e220af6 99 } LL_RCC_ClocksTypeDef;
AnnaBridge 146:22da6e220af6 100
AnnaBridge 146:22da6e220af6 101 /**
AnnaBridge 146:22da6e220af6 102 * @}
AnnaBridge 146:22da6e220af6 103 */
AnnaBridge 146:22da6e220af6 104
AnnaBridge 146:22da6e220af6 105 /**
AnnaBridge 146:22da6e220af6 106 * @}
AnnaBridge 146:22da6e220af6 107 */
AnnaBridge 146:22da6e220af6 108 #endif /* USE_FULL_LL_DRIVER */
AnnaBridge 146:22da6e220af6 109
AnnaBridge 146:22da6e220af6 110 /* Exported constants --------------------------------------------------------*/
AnnaBridge 146:22da6e220af6 111 /** @defgroup RCC_LL_Exported_Constants RCC Exported Constants
AnnaBridge 146:22da6e220af6 112 * @{
AnnaBridge 146:22da6e220af6 113 */
AnnaBridge 146:22da6e220af6 114
AnnaBridge 146:22da6e220af6 115 /** @defgroup RCC_LL_EC_OSC_VALUES Oscillator Values adaptation
AnnaBridge 146:22da6e220af6 116 * @brief Defines used to adapt values of different oscillators
AnnaBridge 146:22da6e220af6 117 * @note These values could be modified in the user environment according to
AnnaBridge 146:22da6e220af6 118 * HW set-up.
AnnaBridge 146:22da6e220af6 119 * @{
AnnaBridge 146:22da6e220af6 120 */
AnnaBridge 146:22da6e220af6 121 #if !defined (HSE_VALUE)
AnnaBridge 146:22da6e220af6 122 #define HSE_VALUE 25000000U /*!< Value of the HSE oscillator in Hz */
AnnaBridge 146:22da6e220af6 123 #endif /* HSE_VALUE */
AnnaBridge 146:22da6e220af6 124
AnnaBridge 146:22da6e220af6 125 #if !defined (HSI_VALUE)
AnnaBridge 146:22da6e220af6 126 #define HSI_VALUE 16000000U /*!< Value of the HSI oscillator in Hz */
AnnaBridge 146:22da6e220af6 127 #endif /* HSI_VALUE */
AnnaBridge 146:22da6e220af6 128
AnnaBridge 146:22da6e220af6 129 #if !defined (LSE_VALUE)
AnnaBridge 146:22da6e220af6 130 #define LSE_VALUE 32768U /*!< Value of the LSE oscillator in Hz */
AnnaBridge 146:22da6e220af6 131 #endif /* LSE_VALUE */
AnnaBridge 146:22da6e220af6 132
AnnaBridge 146:22da6e220af6 133 #if !defined (LSI_VALUE)
AnnaBridge 146:22da6e220af6 134 #define LSI_VALUE 32000U /*!< Value of the LSI oscillator in Hz */
AnnaBridge 146:22da6e220af6 135 #endif /* LSI_VALUE */
AnnaBridge 146:22da6e220af6 136
AnnaBridge 146:22da6e220af6 137 #if !defined (EXTERNAL_CLOCK_VALUE)
AnnaBridge 146:22da6e220af6 138 #define EXTERNAL_CLOCK_VALUE 12288000U /*!< Value of the I2S_CKIN external oscillator in Hz */
AnnaBridge 146:22da6e220af6 139 #endif /* EXTERNAL_CLOCK_VALUE */
AnnaBridge 146:22da6e220af6 140 /**
AnnaBridge 146:22da6e220af6 141 * @}
AnnaBridge 146:22da6e220af6 142 */
AnnaBridge 146:22da6e220af6 143
AnnaBridge 146:22da6e220af6 144 /** @defgroup RCC_LL_EC_CLEAR_FLAG Clear Flags Defines
AnnaBridge 146:22da6e220af6 145 * @brief Flags defines which can be used with LL_RCC_WriteReg function
AnnaBridge 146:22da6e220af6 146 * @{
AnnaBridge 146:22da6e220af6 147 */
AnnaBridge 146:22da6e220af6 148 #define LL_RCC_CIR_LSIRDYC RCC_CIR_LSIRDYC /*!< LSI Ready Interrupt Clear */
AnnaBridge 146:22da6e220af6 149 #define LL_RCC_CIR_LSERDYC RCC_CIR_LSERDYC /*!< LSE Ready Interrupt Clear */
AnnaBridge 146:22da6e220af6 150 #define LL_RCC_CIR_HSIRDYC RCC_CIR_HSIRDYC /*!< HSI Ready Interrupt Clear */
AnnaBridge 146:22da6e220af6 151 #define LL_RCC_CIR_HSERDYC RCC_CIR_HSERDYC /*!< HSE Ready Interrupt Clear */
AnnaBridge 146:22da6e220af6 152 #define LL_RCC_CIR_PLLRDYC RCC_CIR_PLLRDYC /*!< PLL Ready Interrupt Clear */
AnnaBridge 146:22da6e220af6 153 #if defined(RCC_PLLI2S_SUPPORT)
AnnaBridge 146:22da6e220af6 154 #define LL_RCC_CIR_PLLI2SRDYC RCC_CIR_PLLI2SRDYC /*!< PLLI2S Ready Interrupt Clear */
AnnaBridge 146:22da6e220af6 155 #endif /* RCC_PLLI2S_SUPPORT */
AnnaBridge 146:22da6e220af6 156 #if defined(RCC_PLLSAI_SUPPORT)
AnnaBridge 146:22da6e220af6 157 #define LL_RCC_CIR_PLLSAIRDYC RCC_CIR_PLLSAIRDYC /*!< PLLSAI Ready Interrupt Clear */
AnnaBridge 146:22da6e220af6 158 #endif /* RCC_PLLSAI_SUPPORT */
AnnaBridge 146:22da6e220af6 159 #define LL_RCC_CIR_CSSC RCC_CIR_CSSC /*!< Clock Security System Interrupt Clear */
AnnaBridge 146:22da6e220af6 160 /**
AnnaBridge 146:22da6e220af6 161 * @}
AnnaBridge 146:22da6e220af6 162 */
AnnaBridge 146:22da6e220af6 163
AnnaBridge 146:22da6e220af6 164 /** @defgroup RCC_LL_EC_GET_FLAG Get Flags Defines
AnnaBridge 146:22da6e220af6 165 * @brief Flags defines which can be used with LL_RCC_ReadReg function
AnnaBridge 146:22da6e220af6 166 * @{
AnnaBridge 146:22da6e220af6 167 */
AnnaBridge 146:22da6e220af6 168 #define LL_RCC_CIR_LSIRDYF RCC_CIR_LSIRDYF /*!< LSI Ready Interrupt flag */
AnnaBridge 146:22da6e220af6 169 #define LL_RCC_CIR_LSERDYF RCC_CIR_LSERDYF /*!< LSE Ready Interrupt flag */
AnnaBridge 146:22da6e220af6 170 #define LL_RCC_CIR_HSIRDYF RCC_CIR_HSIRDYF /*!< HSI Ready Interrupt flag */
AnnaBridge 146:22da6e220af6 171 #define LL_RCC_CIR_HSERDYF RCC_CIR_HSERDYF /*!< HSE Ready Interrupt flag */
AnnaBridge 146:22da6e220af6 172 #define LL_RCC_CIR_PLLRDYF RCC_CIR_PLLRDYF /*!< PLL Ready Interrupt flag */
AnnaBridge 146:22da6e220af6 173 #if defined(RCC_PLLI2S_SUPPORT)
AnnaBridge 146:22da6e220af6 174 #define LL_RCC_CIR_PLLI2SRDYF RCC_CIR_PLLI2SRDYF /*!< PLLI2S Ready Interrupt flag */
AnnaBridge 146:22da6e220af6 175 #endif /* RCC_PLLI2S_SUPPORT */
AnnaBridge 146:22da6e220af6 176 #if defined(RCC_PLLSAI_SUPPORT)
AnnaBridge 146:22da6e220af6 177 #define LL_RCC_CIR_PLLSAIRDYF RCC_CIR_PLLSAIRDYF /*!< PLLSAI Ready Interrupt flag */
AnnaBridge 146:22da6e220af6 178 #endif /* RCC_PLLSAI_SUPPORT */
AnnaBridge 146:22da6e220af6 179 #define LL_RCC_CIR_CSSF RCC_CIR_CSSF /*!< Clock Security System Interrupt flag */
AnnaBridge 146:22da6e220af6 180 #define LL_RCC_CSR_LPWRRSTF RCC_CSR_LPWRRSTF /*!< Low-Power reset flag */
AnnaBridge 146:22da6e220af6 181 #define LL_RCC_CSR_PINRSTF RCC_CSR_PINRSTF /*!< PIN reset flag */
AnnaBridge 146:22da6e220af6 182 #define LL_RCC_CSR_PORRSTF RCC_CSR_PORRSTF /*!< POR/PDR reset flag */
AnnaBridge 146:22da6e220af6 183 #define LL_RCC_CSR_SFTRSTF RCC_CSR_SFTRSTF /*!< Software Reset flag */
AnnaBridge 146:22da6e220af6 184 #define LL_RCC_CSR_IWDGRSTF RCC_CSR_IWDGRSTF /*!< Independent Watchdog reset flag */
AnnaBridge 146:22da6e220af6 185 #define LL_RCC_CSR_WWDGRSTF RCC_CSR_WWDGRSTF /*!< Window watchdog reset flag */
AnnaBridge 146:22da6e220af6 186 #if defined(RCC_CSR_BORRSTF)
AnnaBridge 146:22da6e220af6 187 #define LL_RCC_CSR_BORRSTF RCC_CSR_BORRSTF /*!< BOR reset flag */
AnnaBridge 146:22da6e220af6 188 #endif /* RCC_CSR_BORRSTF */
AnnaBridge 146:22da6e220af6 189 /**
AnnaBridge 146:22da6e220af6 190 * @}
AnnaBridge 146:22da6e220af6 191 */
AnnaBridge 146:22da6e220af6 192
AnnaBridge 146:22da6e220af6 193 /** @defgroup RCC_LL_EC_IT IT Defines
AnnaBridge 146:22da6e220af6 194 * @brief IT defines which can be used with LL_RCC_ReadReg and LL_RCC_WriteReg functions
AnnaBridge 146:22da6e220af6 195 * @{
AnnaBridge 146:22da6e220af6 196 */
AnnaBridge 146:22da6e220af6 197 #define LL_RCC_CIR_LSIRDYIE RCC_CIR_LSIRDYIE /*!< LSI Ready Interrupt Enable */
AnnaBridge 146:22da6e220af6 198 #define LL_RCC_CIR_LSERDYIE RCC_CIR_LSERDYIE /*!< LSE Ready Interrupt Enable */
AnnaBridge 146:22da6e220af6 199 #define LL_RCC_CIR_HSIRDYIE RCC_CIR_HSIRDYIE /*!< HSI Ready Interrupt Enable */
AnnaBridge 146:22da6e220af6 200 #define LL_RCC_CIR_HSERDYIE RCC_CIR_HSERDYIE /*!< HSE Ready Interrupt Enable */
AnnaBridge 146:22da6e220af6 201 #define LL_RCC_CIR_PLLRDYIE RCC_CIR_PLLRDYIE /*!< PLL Ready Interrupt Enable */
AnnaBridge 146:22da6e220af6 202 #if defined(RCC_PLLI2S_SUPPORT)
AnnaBridge 146:22da6e220af6 203 #define LL_RCC_CIR_PLLI2SRDYIE RCC_CIR_PLLI2SRDYIE /*!< PLLI2S Ready Interrupt Enable */
AnnaBridge 146:22da6e220af6 204 #endif /* RCC_PLLI2S_SUPPORT */
AnnaBridge 146:22da6e220af6 205 #if defined(RCC_PLLSAI_SUPPORT)
AnnaBridge 146:22da6e220af6 206 #define LL_RCC_CIR_PLLSAIRDYIE RCC_CIR_PLLSAIRDYIE /*!< PLLSAI Ready Interrupt Enable */
AnnaBridge 146:22da6e220af6 207 #endif /* RCC_PLLSAI_SUPPORT */
AnnaBridge 146:22da6e220af6 208 /**
AnnaBridge 146:22da6e220af6 209 * @}
AnnaBridge 146:22da6e220af6 210 */
AnnaBridge 146:22da6e220af6 211
AnnaBridge 146:22da6e220af6 212 /** @defgroup RCC_LL_EC_SYS_CLKSOURCE System clock switch
AnnaBridge 146:22da6e220af6 213 * @{
AnnaBridge 146:22da6e220af6 214 */
AnnaBridge 146:22da6e220af6 215 #define LL_RCC_SYS_CLKSOURCE_HSI RCC_CFGR_SW_HSI /*!< HSI selection as system clock */
AnnaBridge 146:22da6e220af6 216 #define LL_RCC_SYS_CLKSOURCE_HSE RCC_CFGR_SW_HSE /*!< HSE selection as system clock */
AnnaBridge 146:22da6e220af6 217 #define LL_RCC_SYS_CLKSOURCE_PLL RCC_CFGR_SW_PLL /*!< PLL selection as system clock */
AnnaBridge 146:22da6e220af6 218 #if defined(RCC_CFGR_SW_PLLR)
AnnaBridge 146:22da6e220af6 219 #define LL_RCC_SYS_CLKSOURCE_PLLR RCC_CFGR_SW_PLLR /*!< PLLR selection as system clock */
AnnaBridge 146:22da6e220af6 220 #endif /* RCC_CFGR_SW_PLLR */
AnnaBridge 146:22da6e220af6 221 /**
AnnaBridge 146:22da6e220af6 222 * @}
AnnaBridge 146:22da6e220af6 223 */
AnnaBridge 146:22da6e220af6 224
AnnaBridge 146:22da6e220af6 225 /** @defgroup RCC_LL_EC_SYS_CLKSOURCE_STATUS System clock switch status
AnnaBridge 146:22da6e220af6 226 * @{
AnnaBridge 146:22da6e220af6 227 */
AnnaBridge 146:22da6e220af6 228 #define LL_RCC_SYS_CLKSOURCE_STATUS_HSI RCC_CFGR_SWS_HSI /*!< HSI used as system clock */
AnnaBridge 146:22da6e220af6 229 #define LL_RCC_SYS_CLKSOURCE_STATUS_HSE RCC_CFGR_SWS_HSE /*!< HSE used as system clock */
AnnaBridge 146:22da6e220af6 230 #define LL_RCC_SYS_CLKSOURCE_STATUS_PLL RCC_CFGR_SWS_PLL /*!< PLL used as system clock */
AnnaBridge 146:22da6e220af6 231 #if defined(RCC_PLLR_SYSCLK_SUPPORT)
AnnaBridge 146:22da6e220af6 232 #define LL_RCC_SYS_CLKSOURCE_STATUS_PLLR RCC_CFGR_SWS_PLLR /*!< PLLR used as system clock */
AnnaBridge 146:22da6e220af6 233 #endif /* RCC_PLLR_SYSCLK_SUPPORT */
AnnaBridge 146:22da6e220af6 234 /**
AnnaBridge 146:22da6e220af6 235 * @}
AnnaBridge 146:22da6e220af6 236 */
AnnaBridge 146:22da6e220af6 237
AnnaBridge 146:22da6e220af6 238 /** @defgroup RCC_LL_EC_SYSCLK_DIV AHB prescaler
AnnaBridge 146:22da6e220af6 239 * @{
AnnaBridge 146:22da6e220af6 240 */
AnnaBridge 146:22da6e220af6 241 #define LL_RCC_SYSCLK_DIV_1 RCC_CFGR_HPRE_DIV1 /*!< SYSCLK not divided */
AnnaBridge 146:22da6e220af6 242 #define LL_RCC_SYSCLK_DIV_2 RCC_CFGR_HPRE_DIV2 /*!< SYSCLK divided by 2 */
AnnaBridge 146:22da6e220af6 243 #define LL_RCC_SYSCLK_DIV_4 RCC_CFGR_HPRE_DIV4 /*!< SYSCLK divided by 4 */
AnnaBridge 146:22da6e220af6 244 #define LL_RCC_SYSCLK_DIV_8 RCC_CFGR_HPRE_DIV8 /*!< SYSCLK divided by 8 */
AnnaBridge 146:22da6e220af6 245 #define LL_RCC_SYSCLK_DIV_16 RCC_CFGR_HPRE_DIV16 /*!< SYSCLK divided by 16 */
AnnaBridge 146:22da6e220af6 246 #define LL_RCC_SYSCLK_DIV_64 RCC_CFGR_HPRE_DIV64 /*!< SYSCLK divided by 64 */
AnnaBridge 146:22da6e220af6 247 #define LL_RCC_SYSCLK_DIV_128 RCC_CFGR_HPRE_DIV128 /*!< SYSCLK divided by 128 */
AnnaBridge 146:22da6e220af6 248 #define LL_RCC_SYSCLK_DIV_256 RCC_CFGR_HPRE_DIV256 /*!< SYSCLK divided by 256 */
AnnaBridge 146:22da6e220af6 249 #define LL_RCC_SYSCLK_DIV_512 RCC_CFGR_HPRE_DIV512 /*!< SYSCLK divided by 512 */
AnnaBridge 146:22da6e220af6 250 /**
AnnaBridge 146:22da6e220af6 251 * @}
AnnaBridge 146:22da6e220af6 252 */
AnnaBridge 146:22da6e220af6 253
AnnaBridge 146:22da6e220af6 254 /** @defgroup RCC_LL_EC_APB1_DIV APB low-speed prescaler (APB1)
AnnaBridge 146:22da6e220af6 255 * @{
AnnaBridge 146:22da6e220af6 256 */
AnnaBridge 146:22da6e220af6 257 #define LL_RCC_APB1_DIV_1 RCC_CFGR_PPRE1_DIV1 /*!< HCLK not divided */
AnnaBridge 146:22da6e220af6 258 #define LL_RCC_APB1_DIV_2 RCC_CFGR_PPRE1_DIV2 /*!< HCLK divided by 2 */
AnnaBridge 146:22da6e220af6 259 #define LL_RCC_APB1_DIV_4 RCC_CFGR_PPRE1_DIV4 /*!< HCLK divided by 4 */
AnnaBridge 146:22da6e220af6 260 #define LL_RCC_APB1_DIV_8 RCC_CFGR_PPRE1_DIV8 /*!< HCLK divided by 8 */
AnnaBridge 146:22da6e220af6 261 #define LL_RCC_APB1_DIV_16 RCC_CFGR_PPRE1_DIV16 /*!< HCLK divided by 16 */
AnnaBridge 146:22da6e220af6 262 /**
AnnaBridge 146:22da6e220af6 263 * @}
AnnaBridge 146:22da6e220af6 264 */
AnnaBridge 146:22da6e220af6 265
AnnaBridge 146:22da6e220af6 266 /** @defgroup RCC_LL_EC_APB2_DIV APB high-speed prescaler (APB2)
AnnaBridge 146:22da6e220af6 267 * @{
AnnaBridge 146:22da6e220af6 268 */
AnnaBridge 146:22da6e220af6 269 #define LL_RCC_APB2_DIV_1 RCC_CFGR_PPRE2_DIV1 /*!< HCLK not divided */
AnnaBridge 146:22da6e220af6 270 #define LL_RCC_APB2_DIV_2 RCC_CFGR_PPRE2_DIV2 /*!< HCLK divided by 2 */
AnnaBridge 146:22da6e220af6 271 #define LL_RCC_APB2_DIV_4 RCC_CFGR_PPRE2_DIV4 /*!< HCLK divided by 4 */
AnnaBridge 146:22da6e220af6 272 #define LL_RCC_APB2_DIV_8 RCC_CFGR_PPRE2_DIV8 /*!< HCLK divided by 8 */
AnnaBridge 146:22da6e220af6 273 #define LL_RCC_APB2_DIV_16 RCC_CFGR_PPRE2_DIV16 /*!< HCLK divided by 16 */
AnnaBridge 146:22da6e220af6 274 /**
AnnaBridge 146:22da6e220af6 275 * @}
AnnaBridge 146:22da6e220af6 276 */
AnnaBridge 146:22da6e220af6 277
AnnaBridge 146:22da6e220af6 278 /** @defgroup RCC_LL_EC_MCOxSOURCE MCO source selection
AnnaBridge 146:22da6e220af6 279 * @{
AnnaBridge 146:22da6e220af6 280 */
AnnaBridge 146:22da6e220af6 281 #define LL_RCC_MCO1SOURCE_HSI (uint32_t)(RCC_CFGR_MCO1|0x00000000U) /*!< HSI selection as MCO1 source */
AnnaBridge 146:22da6e220af6 282 #define LL_RCC_MCO1SOURCE_LSE (uint32_t)(RCC_CFGR_MCO1|(RCC_CFGR_MCO1_0 >> 16U)) /*!< LSE selection as MCO1 source */
AnnaBridge 146:22da6e220af6 283 #define LL_RCC_MCO1SOURCE_HSE (uint32_t)(RCC_CFGR_MCO1|(RCC_CFGR_MCO1_1 >> 16U)) /*!< HSE selection as MCO1 source */
AnnaBridge 146:22da6e220af6 284 #define LL_RCC_MCO1SOURCE_PLLCLK (uint32_t)(RCC_CFGR_MCO1|((RCC_CFGR_MCO1_1|RCC_CFGR_MCO1_0) >> 16U)) /*!< PLLCLK selection as MCO1 source */
AnnaBridge 146:22da6e220af6 285 #if defined(RCC_CFGR_MCO2)
AnnaBridge 146:22da6e220af6 286 #define LL_RCC_MCO2SOURCE_SYSCLK (uint32_t)(RCC_CFGR_MCO2|0x00000000U) /*!< SYSCLK selection as MCO2 source */
AnnaBridge 146:22da6e220af6 287 #define LL_RCC_MCO2SOURCE_PLLI2S (uint32_t)(RCC_CFGR_MCO2|(RCC_CFGR_MCO2_0 >> 16U)) /*!< PLLI2S selection as MCO2 source */
AnnaBridge 146:22da6e220af6 288 #define LL_RCC_MCO2SOURCE_HSE (uint32_t)(RCC_CFGR_MCO2|(RCC_CFGR_MCO2_1 >> 16U)) /*!< HSE selection as MCO2 source */
AnnaBridge 146:22da6e220af6 289 #define LL_RCC_MCO2SOURCE_PLLCLK (uint32_t)(RCC_CFGR_MCO2|((RCC_CFGR_MCO2_1|RCC_CFGR_MCO2_0) >> 16U)) /*!< PLLCLK selection as MCO2 source */
AnnaBridge 146:22da6e220af6 290 #endif /* RCC_CFGR_MCO2 */
AnnaBridge 146:22da6e220af6 291 /**
AnnaBridge 146:22da6e220af6 292 * @}
AnnaBridge 146:22da6e220af6 293 */
AnnaBridge 146:22da6e220af6 294
AnnaBridge 146:22da6e220af6 295 /** @defgroup RCC_LL_EC_MCOx_DIV MCO prescaler
AnnaBridge 146:22da6e220af6 296 * @{
AnnaBridge 146:22da6e220af6 297 */
AnnaBridge 146:22da6e220af6 298 #define LL_RCC_MCO1_DIV_1 (uint32_t)(RCC_CFGR_MCO1PRE|0x00000000U) /*!< MCO1 not divided */
AnnaBridge 146:22da6e220af6 299 #define LL_RCC_MCO1_DIV_2 (uint32_t)(RCC_CFGR_MCO1PRE|(RCC_CFGR_MCO1PRE_2 >> 16U)) /*!< MCO1 divided by 2 */
AnnaBridge 146:22da6e220af6 300 #define LL_RCC_MCO1_DIV_3 (uint32_t)(RCC_CFGR_MCO1PRE|((RCC_CFGR_MCO1PRE_2|RCC_CFGR_MCO1PRE_0) >> 16U)) /*!< MCO1 divided by 3 */
AnnaBridge 146:22da6e220af6 301 #define LL_RCC_MCO1_DIV_4 (uint32_t)(RCC_CFGR_MCO1PRE|((RCC_CFGR_MCO1PRE_2|RCC_CFGR_MCO1PRE_1) >> 16U)) /*!< MCO1 divided by 4 */
AnnaBridge 146:22da6e220af6 302 #define LL_RCC_MCO1_DIV_5 (uint32_t)(RCC_CFGR_MCO1PRE|(RCC_CFGR_MCO1PRE >> 16U)) /*!< MCO1 divided by 5 */
AnnaBridge 146:22da6e220af6 303 #if defined(RCC_CFGR_MCO2PRE)
AnnaBridge 146:22da6e220af6 304 #define LL_RCC_MCO2_DIV_1 (uint32_t)(RCC_CFGR_MCO2PRE|0x00000000U) /*!< MCO2 not divided */
AnnaBridge 146:22da6e220af6 305 #define LL_RCC_MCO2_DIV_2 (uint32_t)(RCC_CFGR_MCO2PRE|(RCC_CFGR_MCO2PRE_2 >> 16U)) /*!< MCO2 divided by 2 */
AnnaBridge 146:22da6e220af6 306 #define LL_RCC_MCO2_DIV_3 (uint32_t)(RCC_CFGR_MCO2PRE|((RCC_CFGR_MCO2PRE_2|RCC_CFGR_MCO2PRE_0) >> 16U)) /*!< MCO2 divided by 3 */
AnnaBridge 146:22da6e220af6 307 #define LL_RCC_MCO2_DIV_4 (uint32_t)(RCC_CFGR_MCO2PRE|((RCC_CFGR_MCO2PRE_2|RCC_CFGR_MCO2PRE_1) >> 16U)) /*!< MCO2 divided by 4 */
AnnaBridge 146:22da6e220af6 308 #define LL_RCC_MCO2_DIV_5 (uint32_t)(RCC_CFGR_MCO2PRE|(RCC_CFGR_MCO2PRE >> 16U)) /*!< MCO2 divided by 5 */
AnnaBridge 146:22da6e220af6 309 #endif /* RCC_CFGR_MCO2PRE */
AnnaBridge 146:22da6e220af6 310 /**
AnnaBridge 146:22da6e220af6 311 * @}
AnnaBridge 146:22da6e220af6 312 */
AnnaBridge 146:22da6e220af6 313
AnnaBridge 146:22da6e220af6 314 /** @defgroup RCC_LL_EC_RTC_HSEDIV HSE prescaler for RTC clock
AnnaBridge 146:22da6e220af6 315 * @{
AnnaBridge 146:22da6e220af6 316 */
AnnaBridge 146:22da6e220af6 317 #define LL_RCC_RTC_NOCLOCK 0x00000000U /*!< HSE not divided */
AnnaBridge 146:22da6e220af6 318 #define LL_RCC_RTC_HSE_DIV_2 RCC_CFGR_RTCPRE_1 /*!< HSE clock divided by 2 */
AnnaBridge 146:22da6e220af6 319 #define LL_RCC_RTC_HSE_DIV_3 (RCC_CFGR_RTCPRE_1|RCC_CFGR_RTCPRE_0) /*!< HSE clock divided by 3 */
AnnaBridge 146:22da6e220af6 320 #define LL_RCC_RTC_HSE_DIV_4 RCC_CFGR_RTCPRE_2 /*!< HSE clock divided by 4 */
AnnaBridge 146:22da6e220af6 321 #define LL_RCC_RTC_HSE_DIV_5 (RCC_CFGR_RTCPRE_2|RCC_CFGR_RTCPRE_0) /*!< HSE clock divided by 5 */
AnnaBridge 146:22da6e220af6 322 #define LL_RCC_RTC_HSE_DIV_6 (RCC_CFGR_RTCPRE_2|RCC_CFGR_RTCPRE_1) /*!< HSE clock divided by 6 */
AnnaBridge 146:22da6e220af6 323 #define LL_RCC_RTC_HSE_DIV_7 (RCC_CFGR_RTCPRE_2|RCC_CFGR_RTCPRE_1|RCC_CFGR_RTCPRE_0) /*!< HSE clock divided by 7 */
AnnaBridge 146:22da6e220af6 324 #define LL_RCC_RTC_HSE_DIV_8 RCC_CFGR_RTCPRE_3 /*!< HSE clock divided by 8 */
AnnaBridge 146:22da6e220af6 325 #define LL_RCC_RTC_HSE_DIV_9 (RCC_CFGR_RTCPRE_3|RCC_CFGR_RTCPRE_0) /*!< HSE clock divided by 9 */
AnnaBridge 146:22da6e220af6 326 #define LL_RCC_RTC_HSE_DIV_10 (RCC_CFGR_RTCPRE_3|RCC_CFGR_RTCPRE_1) /*!< HSE clock divided by 10 */
AnnaBridge 146:22da6e220af6 327 #define LL_RCC_RTC_HSE_DIV_11 (RCC_CFGR_RTCPRE_3|RCC_CFGR_RTCPRE_1|RCC_CFGR_RTCPRE_0) /*!< HSE clock divided by 11 */
AnnaBridge 146:22da6e220af6 328 #define LL_RCC_RTC_HSE_DIV_12 (RCC_CFGR_RTCPRE_3|RCC_CFGR_RTCPRE_2) /*!< HSE clock divided by 12 */
AnnaBridge 146:22da6e220af6 329 #define LL_RCC_RTC_HSE_DIV_13 (RCC_CFGR_RTCPRE_3|RCC_CFGR_RTCPRE_2|RCC_CFGR_RTCPRE_0) /*!< HSE clock divided by 13 */
AnnaBridge 146:22da6e220af6 330 #define LL_RCC_RTC_HSE_DIV_14 (RCC_CFGR_RTCPRE_3|RCC_CFGR_RTCPRE_2|RCC_CFGR_RTCPRE_1) /*!< HSE clock divided by 14 */
AnnaBridge 146:22da6e220af6 331 #define LL_RCC_RTC_HSE_DIV_15 (RCC_CFGR_RTCPRE_3|RCC_CFGR_RTCPRE_2|RCC_CFGR_RTCPRE_1|RCC_CFGR_RTCPRE_0) /*!< HSE clock divided by 15 */
AnnaBridge 146:22da6e220af6 332 #define LL_RCC_RTC_HSE_DIV_16 RCC_CFGR_RTCPRE_4 /*!< HSE clock divided by 16 */
AnnaBridge 146:22da6e220af6 333 #define LL_RCC_RTC_HSE_DIV_17 (RCC_CFGR_RTCPRE_4|RCC_CFGR_RTCPRE_0) /*!< HSE clock divided by 17 */
AnnaBridge 146:22da6e220af6 334 #define LL_RCC_RTC_HSE_DIV_18 (RCC_CFGR_RTCPRE_4|RCC_CFGR_RTCPRE_1) /*!< HSE clock divided by 18 */
AnnaBridge 146:22da6e220af6 335 #define LL_RCC_RTC_HSE_DIV_19 (RCC_CFGR_RTCPRE_4|RCC_CFGR_RTCPRE_1|RCC_CFGR_RTCPRE_0) /*!< HSE clock divided by 19 */
AnnaBridge 146:22da6e220af6 336 #define LL_RCC_RTC_HSE_DIV_20 (RCC_CFGR_RTCPRE_4|RCC_CFGR_RTCPRE_2) /*!< HSE clock divided by 20 */
AnnaBridge 146:22da6e220af6 337 #define LL_RCC_RTC_HSE_DIV_21 (RCC_CFGR_RTCPRE_4|RCC_CFGR_RTCPRE_2|RCC_CFGR_RTCPRE_0) /*!< HSE clock divided by 21 */
AnnaBridge 146:22da6e220af6 338 #define LL_RCC_RTC_HSE_DIV_22 (RCC_CFGR_RTCPRE_4|RCC_CFGR_RTCPRE_2|RCC_CFGR_RTCPRE_1) /*!< HSE clock divided by 22 */
AnnaBridge 146:22da6e220af6 339 #define LL_RCC_RTC_HSE_DIV_23 (RCC_CFGR_RTCPRE_4|RCC_CFGR_RTCPRE_2|RCC_CFGR_RTCPRE_1|RCC_CFGR_RTCPRE_0) /*!< HSE clock divided by 23 */
AnnaBridge 146:22da6e220af6 340 #define LL_RCC_RTC_HSE_DIV_24 (RCC_CFGR_RTCPRE_4|RCC_CFGR_RTCPRE_3) /*!< HSE clock divided by 24 */
AnnaBridge 146:22da6e220af6 341 #define LL_RCC_RTC_HSE_DIV_25 (RCC_CFGR_RTCPRE_4|RCC_CFGR_RTCPRE_3|RCC_CFGR_RTCPRE_0) /*!< HSE clock divided by 25 */
AnnaBridge 146:22da6e220af6 342 #define LL_RCC_RTC_HSE_DIV_26 (RCC_CFGR_RTCPRE_4|RCC_CFGR_RTCPRE_3|RCC_CFGR_RTCPRE_1) /*!< HSE clock divided by 26 */
AnnaBridge 146:22da6e220af6 343 #define LL_RCC_RTC_HSE_DIV_27 (RCC_CFGR_RTCPRE_4|RCC_CFGR_RTCPRE_3|RCC_CFGR_RTCPRE_1|RCC_CFGR_RTCPRE_0) /*!< HSE clock divided by 27 */
AnnaBridge 146:22da6e220af6 344 #define LL_RCC_RTC_HSE_DIV_28 (RCC_CFGR_RTCPRE_4|RCC_CFGR_RTCPRE_3|RCC_CFGR_RTCPRE_2) /*!< HSE clock divided by 28 */
AnnaBridge 146:22da6e220af6 345 #define LL_RCC_RTC_HSE_DIV_29 (RCC_CFGR_RTCPRE_4|RCC_CFGR_RTCPRE_3|RCC_CFGR_RTCPRE_2|RCC_CFGR_RTCPRE_0) /*!< HSE clock divided by 29 */
AnnaBridge 146:22da6e220af6 346 #define LL_RCC_RTC_HSE_DIV_30 (RCC_CFGR_RTCPRE_4|RCC_CFGR_RTCPRE_3|RCC_CFGR_RTCPRE_2|RCC_CFGR_RTCPRE_1) /*!< HSE clock divided by 30 */
AnnaBridge 146:22da6e220af6 347 #define LL_RCC_RTC_HSE_DIV_31 (RCC_CFGR_RTCPRE_4|RCC_CFGR_RTCPRE_3|RCC_CFGR_RTCPRE_2|RCC_CFGR_RTCPRE_1|RCC_CFGR_RTCPRE_0) /*!< HSE clock divided by 31 */
AnnaBridge 146:22da6e220af6 348 /**
AnnaBridge 146:22da6e220af6 349 * @}
AnnaBridge 146:22da6e220af6 350 */
AnnaBridge 146:22da6e220af6 351
AnnaBridge 146:22da6e220af6 352 #if defined(USE_FULL_LL_DRIVER)
AnnaBridge 146:22da6e220af6 353 /** @defgroup RCC_LL_EC_PERIPH_FREQUENCY Peripheral clock frequency
AnnaBridge 146:22da6e220af6 354 * @{
AnnaBridge 146:22da6e220af6 355 */
AnnaBridge 146:22da6e220af6 356 #define LL_RCC_PERIPH_FREQUENCY_NO 0x00000000U /*!< No clock enabled for the peripheral */
AnnaBridge 146:22da6e220af6 357 #define LL_RCC_PERIPH_FREQUENCY_NA 0xFFFFFFFFU /*!< Frequency cannot be provided as external clock */
AnnaBridge 146:22da6e220af6 358 /**
AnnaBridge 146:22da6e220af6 359 * @}
AnnaBridge 146:22da6e220af6 360 */
AnnaBridge 146:22da6e220af6 361 #endif /* USE_FULL_LL_DRIVER */
AnnaBridge 146:22da6e220af6 362
AnnaBridge 146:22da6e220af6 363 #if defined(FMPI2C1)
AnnaBridge 146:22da6e220af6 364 /** @defgroup RCC_LL_EC_FMPI2C1_CLKSOURCE Peripheral FMPI2C clock source selection
AnnaBridge 146:22da6e220af6 365 * @{
AnnaBridge 146:22da6e220af6 366 */
AnnaBridge 146:22da6e220af6 367 #define LL_RCC_FMPI2C1_CLKSOURCE_PCLK1 0x00000000U /*!< PCLK1 clock used as FMPI2C1 clock source */
AnnaBridge 146:22da6e220af6 368 #define LL_RCC_FMPI2C1_CLKSOURCE_SYSCLK RCC_DCKCFGR2_FMPI2C1SEL_0 /*!< SYSCLK clock used as FMPI2C1 clock source */
AnnaBridge 146:22da6e220af6 369 #define LL_RCC_FMPI2C1_CLKSOURCE_HSI RCC_DCKCFGR2_FMPI2C1SEL_1 /*!< HSI clock used as FMPI2C1 clock source */
AnnaBridge 146:22da6e220af6 370 /**
AnnaBridge 146:22da6e220af6 371 * @}
AnnaBridge 146:22da6e220af6 372 */
AnnaBridge 146:22da6e220af6 373 #endif /* FMPI2C1 */
AnnaBridge 146:22da6e220af6 374
AnnaBridge 146:22da6e220af6 375 #if defined(LPTIM1)
AnnaBridge 146:22da6e220af6 376 /** @defgroup RCC_LL_EC_LPTIM1_CLKSOURCE Peripheral LPTIM clock source selection
AnnaBridge 146:22da6e220af6 377 * @{
AnnaBridge 146:22da6e220af6 378 */
AnnaBridge 146:22da6e220af6 379 #define LL_RCC_LPTIM1_CLKSOURCE_PCLK1 0x00000000U /*!< PCLK1 clock used as LPTIM1 clock */
AnnaBridge 146:22da6e220af6 380 #define LL_RCC_LPTIM1_CLKSOURCE_HSI RCC_DCKCFGR2_LPTIM1SEL_0 /*!< LSI oscillator clock used as LPTIM1 clock */
AnnaBridge 146:22da6e220af6 381 #define LL_RCC_LPTIM1_CLKSOURCE_LSI RCC_DCKCFGR2_LPTIM1SEL_1 /*!< HSI oscillator clock used as LPTIM1 clock */
AnnaBridge 146:22da6e220af6 382 #define LL_RCC_LPTIM1_CLKSOURCE_LSE (uint32_t)(RCC_DCKCFGR2_LPTIM1SEL_1 | RCC_DCKCFGR2_LPTIM1SEL_0) /*!< LSE oscillator clock used as LPTIM1 clock */
AnnaBridge 146:22da6e220af6 383 /**
AnnaBridge 146:22da6e220af6 384 * @}
AnnaBridge 146:22da6e220af6 385 */
AnnaBridge 146:22da6e220af6 386 #endif /* LPTIM1 */
AnnaBridge 146:22da6e220af6 387
AnnaBridge 146:22da6e220af6 388 #if defined(SAI1)
AnnaBridge 146:22da6e220af6 389 /** @defgroup RCC_LL_EC_SAIx_CLKSOURCE Peripheral SAI clock source selection
AnnaBridge 146:22da6e220af6 390 * @{
AnnaBridge 146:22da6e220af6 391 */
AnnaBridge 146:22da6e220af6 392 #if defined(RCC_DCKCFGR_SAI1SRC)
AnnaBridge 146:22da6e220af6 393 #define LL_RCC_SAI1_CLKSOURCE_PLLSAI (uint32_t)(RCC_DCKCFGR_SAI1SRC | 0x00000000U) /*!< PLLSAI clock used as SAI1 clock source */
AnnaBridge 146:22da6e220af6 394 #define LL_RCC_SAI1_CLKSOURCE_PLLI2S (uint32_t)(RCC_DCKCFGR_SAI1SRC | (RCC_DCKCFGR_SAI1SRC_0 >> 16)) /*!< PLLI2S clock used as SAI1 clock source */
AnnaBridge 146:22da6e220af6 395 #define LL_RCC_SAI1_CLKSOURCE_PLL (uint32_t)(RCC_DCKCFGR_SAI1SRC | (RCC_DCKCFGR_SAI1SRC_1 >> 16)) /*!< PLL clock used as SAI1 clock source */
AnnaBridge 146:22da6e220af6 396 #define LL_RCC_SAI1_CLKSOURCE_PIN (uint32_t)(RCC_DCKCFGR_SAI1SRC | (RCC_DCKCFGR_SAI1SRC >> 16)) /*!< External pin clock used as SAI1 clock source */
AnnaBridge 146:22da6e220af6 397 #endif /* RCC_DCKCFGR_SAI1SRC */
AnnaBridge 146:22da6e220af6 398 #if defined(RCC_DCKCFGR_SAI2SRC)
AnnaBridge 146:22da6e220af6 399 #define LL_RCC_SAI2_CLKSOURCE_PLLSAI (uint32_t)(RCC_DCKCFGR_SAI2SRC | 0x00000000U) /*!< PLLSAI clock used as SAI2 clock source */
AnnaBridge 146:22da6e220af6 400 #define LL_RCC_SAI2_CLKSOURCE_PLLI2S (uint32_t)(RCC_DCKCFGR_SAI2SRC | (RCC_DCKCFGR_SAI2SRC_0 >> 16)) /*!< PLLI2S clock used as SAI2 clock source */
AnnaBridge 146:22da6e220af6 401 #define LL_RCC_SAI2_CLKSOURCE_PLL (uint32_t)(RCC_DCKCFGR_SAI2SRC | (RCC_DCKCFGR_SAI2SRC_1 >> 16)) /*!< PLL clock used as SAI2 clock source */
AnnaBridge 146:22da6e220af6 402 #define LL_RCC_SAI2_CLKSOURCE_PLLSRC (uint32_t)(RCC_DCKCFGR_SAI2SRC | (RCC_DCKCFGR_SAI2SRC >> 16)) /*!< PLL Main clock used as SAI2 clock source */
AnnaBridge 146:22da6e220af6 403 #endif /* RCC_DCKCFGR_SAI2SRC */
AnnaBridge 146:22da6e220af6 404 #if defined(RCC_DCKCFGR_SAI1ASRC)
AnnaBridge 146:22da6e220af6 405 #if defined(RCC_SAI1A_PLLSOURCE_SUPPORT)
AnnaBridge 146:22da6e220af6 406 #define LL_RCC_SAI1_A_CLKSOURCE_PLLI2S (uint32_t)(RCC_DCKCFGR_SAI1ASRC | 0x00000000U) /*!< PLLI2S clock used as SAI1 block A clock source */
AnnaBridge 146:22da6e220af6 407 #define LL_RCC_SAI1_A_CLKSOURCE_PIN (uint32_t)(RCC_DCKCFGR_SAI1ASRC | (RCC_DCKCFGR_SAI1ASRC_0 >> 16)) /*!< External pin used as SAI1 block A clock source */
AnnaBridge 146:22da6e220af6 408 #define LL_RCC_SAI1_A_CLKSOURCE_PLL (uint32_t)(RCC_DCKCFGR_SAI1ASRC | (RCC_DCKCFGR_SAI1ASRC_1 >> 16)) /*!< PLL clock used as SAI1 block A clock source */
AnnaBridge 146:22da6e220af6 409 #define LL_RCC_SAI1_A_CLKSOURCE_PLLSRC (uint32_t)(RCC_DCKCFGR_SAI1ASRC | (RCC_DCKCFGR_SAI1ASRC >> 16)) /*!< PLL Main clock used as SAI1 block A clock source */
AnnaBridge 146:22da6e220af6 410 #else
AnnaBridge 146:22da6e220af6 411 #define LL_RCC_SAI1_A_CLKSOURCE_PLLSAI (uint32_t)(RCC_DCKCFGR_SAI1ASRC | 0x00000000U) /*!< PLLSAI clock used as SAI1 block A clock source */
AnnaBridge 146:22da6e220af6 412 #define LL_RCC_SAI1_A_CLKSOURCE_PLLI2S (uint32_t)(RCC_DCKCFGR_SAI1ASRC | (RCC_DCKCFGR_SAI1ASRC_0 >> 16)) /*!< PLLI2S clock used as SAI1 block A clock source */
AnnaBridge 146:22da6e220af6 413 #define LL_RCC_SAI1_A_CLKSOURCE_PIN (uint32_t)(RCC_DCKCFGR_SAI1ASRC | (RCC_DCKCFGR_SAI1ASRC_1 >> 16)) /*!< External pin clock used as SAI1 block A clock source */
AnnaBridge 146:22da6e220af6 414 #endif /* RCC_SAI1A_PLLSOURCE_SUPPORT */
AnnaBridge 146:22da6e220af6 415 #endif /* RCC_DCKCFGR_SAI1ASRC */
AnnaBridge 146:22da6e220af6 416 #if defined(RCC_DCKCFGR_SAI1BSRC)
AnnaBridge 146:22da6e220af6 417 #if defined(RCC_SAI1B_PLLSOURCE_SUPPORT)
AnnaBridge 146:22da6e220af6 418 #define LL_RCC_SAI1_B_CLKSOURCE_PLLI2S (uint32_t)(RCC_DCKCFGR_SAI1BSRC | 0x00000000U) /*!< PLLI2S clock used as SAI1 block B clock source */
AnnaBridge 146:22da6e220af6 419 #define LL_RCC_SAI1_B_CLKSOURCE_PIN (uint32_t)(RCC_DCKCFGR_SAI1BSRC | (RCC_DCKCFGR_SAI1BSRC_0 >> 16)) /*!< External pin used as SAI1 block B clock source */
AnnaBridge 146:22da6e220af6 420 #define LL_RCC_SAI1_B_CLKSOURCE_PLL (uint32_t)(RCC_DCKCFGR_SAI1BSRC | (RCC_DCKCFGR_SAI1BSRC_1 >> 16)) /*!< PLL clock used as SAI1 block B clock source */
AnnaBridge 146:22da6e220af6 421 #define LL_RCC_SAI1_B_CLKSOURCE_PLLSRC (uint32_t)(RCC_DCKCFGR_SAI1BSRC | (RCC_DCKCFGR_SAI1BSRC >> 16)) /*!< PLL Main clock used as SAI1 block B clock source */
AnnaBridge 146:22da6e220af6 422 #else
AnnaBridge 146:22da6e220af6 423 #define LL_RCC_SAI1_B_CLKSOURCE_PLLSAI (uint32_t)(RCC_DCKCFGR_SAI1BSRC | 0x00000000U) /*!< PLLSAI clock used as SAI1 block B clock source */
AnnaBridge 146:22da6e220af6 424 #define LL_RCC_SAI1_B_CLKSOURCE_PLLI2S (uint32_t)(RCC_DCKCFGR_SAI1BSRC | (RCC_DCKCFGR_SAI1BSRC_0 >> 16)) /*!< PLLI2S clock used as SAI1 block B clock source */
AnnaBridge 146:22da6e220af6 425 #define LL_RCC_SAI1_B_CLKSOURCE_PIN (uint32_t)(RCC_DCKCFGR_SAI1BSRC | (RCC_DCKCFGR_SAI1BSRC_1 >> 16)) /*!< External pin clock used as SAI1 block B clock source */
AnnaBridge 146:22da6e220af6 426 #endif /* RCC_SAI1B_PLLSOURCE_SUPPORT */
AnnaBridge 146:22da6e220af6 427 #endif /* RCC_DCKCFGR_SAI1BSRC */
AnnaBridge 146:22da6e220af6 428 /**
AnnaBridge 146:22da6e220af6 429 * @}
AnnaBridge 146:22da6e220af6 430 */
AnnaBridge 146:22da6e220af6 431 #endif /* SAI1 */
AnnaBridge 146:22da6e220af6 432
AnnaBridge 146:22da6e220af6 433 #if defined(RCC_DCKCFGR_SDIOSEL) || defined(RCC_DCKCFGR2_SDIOSEL)
AnnaBridge 146:22da6e220af6 434 /** @defgroup RCC_LL_EC_SDIOx_CLKSOURCE Peripheral SDIO clock source selection
AnnaBridge 146:22da6e220af6 435 * @{
AnnaBridge 146:22da6e220af6 436 */
AnnaBridge 146:22da6e220af6 437 #define LL_RCC_SDIO_CLKSOURCE_PLL48CLK 0x00000000U /*!< PLL 48M domain clock used as SDIO clock */
AnnaBridge 146:22da6e220af6 438 #if defined(RCC_DCKCFGR_SDIOSEL)
AnnaBridge 146:22da6e220af6 439 #define LL_RCC_SDIO_CLKSOURCE_SYSCLK RCC_DCKCFGR_SDIOSEL /*!< System clock clock used as SDIO clock */
AnnaBridge 146:22da6e220af6 440 #else
AnnaBridge 146:22da6e220af6 441 #define LL_RCC_SDIO_CLKSOURCE_SYSCLK RCC_DCKCFGR2_SDIOSEL /*!< System clock clock used as SDIO clock */
AnnaBridge 146:22da6e220af6 442 #endif /* RCC_DCKCFGR_SDIOSEL */
AnnaBridge 146:22da6e220af6 443 /**
AnnaBridge 146:22da6e220af6 444 * @}
AnnaBridge 146:22da6e220af6 445 */
AnnaBridge 146:22da6e220af6 446 #endif /* RCC_DCKCFGR_SDIOSEL || RCC_DCKCFGR2_SDIOSEL */
AnnaBridge 146:22da6e220af6 447
AnnaBridge 146:22da6e220af6 448 #if defined(DSI)
AnnaBridge 146:22da6e220af6 449 /** @defgroup RCC_LL_EC_DSI_CLKSOURCE Peripheral DSI clock source selection
AnnaBridge 146:22da6e220af6 450 * @{
AnnaBridge 146:22da6e220af6 451 */
AnnaBridge 146:22da6e220af6 452 #define LL_RCC_DSI_CLKSOURCE_PHY 0x00000000U /*!< DSI-PHY clock used as DSI byte lane clock source */
AnnaBridge 146:22da6e220af6 453 #define LL_RCC_DSI_CLKSOURCE_PLL RCC_DCKCFGR_DSISEL /*!< PLL clock used as DSI byte lane clock source */
AnnaBridge 146:22da6e220af6 454 /**
AnnaBridge 146:22da6e220af6 455 * @}
AnnaBridge 146:22da6e220af6 456 */
AnnaBridge 146:22da6e220af6 457 #endif /* DSI */
AnnaBridge 146:22da6e220af6 458
AnnaBridge 146:22da6e220af6 459 #if defined(CEC)
AnnaBridge 146:22da6e220af6 460 /** @defgroup RCC_LL_EC_CEC_CLKSOURCE Peripheral CEC clock source selection
AnnaBridge 146:22da6e220af6 461 * @{
AnnaBridge 146:22da6e220af6 462 */
AnnaBridge 146:22da6e220af6 463 #define LL_RCC_CEC_CLKSOURCE_HSI_DIV488 0x00000000U /*!< HSI oscillator clock divided by 488 used as CEC clock */
AnnaBridge 146:22da6e220af6 464 #define LL_RCC_CEC_CLKSOURCE_LSE RCC_DCKCFGR2_CECSEL /*!< LSE oscillator clock used as CEC clock */
AnnaBridge 146:22da6e220af6 465 /**
AnnaBridge 146:22da6e220af6 466 * @}
AnnaBridge 146:22da6e220af6 467 */
AnnaBridge 146:22da6e220af6 468 #endif /* CEC */
AnnaBridge 146:22da6e220af6 469
AnnaBridge 146:22da6e220af6 470 /** @defgroup RCC_LL_EC_I2S1_CLKSOURCE Peripheral I2S clock source selection
AnnaBridge 146:22da6e220af6 471 * @{
AnnaBridge 146:22da6e220af6 472 */
AnnaBridge 146:22da6e220af6 473 #if defined(RCC_CFGR_I2SSRC)
AnnaBridge 146:22da6e220af6 474 #define LL_RCC_I2S1_CLKSOURCE_PLLI2S 0x00000000U /*!< I2S oscillator clock used as I2S1 clock */
AnnaBridge 146:22da6e220af6 475 #define LL_RCC_I2S1_CLKSOURCE_PIN RCC_CFGR_I2SSRC /*!< External pin clock used as I2S1 clock */
AnnaBridge 146:22da6e220af6 476 #endif /* RCC_CFGR_I2SSRC */
AnnaBridge 146:22da6e220af6 477 #if defined(RCC_DCKCFGR_I2SSRC)
AnnaBridge 146:22da6e220af6 478 #define LL_RCC_I2S1_CLKSOURCE_PLL (uint32_t)(RCC_DCKCFGR_I2SSRC | 0x00000000U) /*!< PLL clock used as I2S1 clock source */
AnnaBridge 146:22da6e220af6 479 #define LL_RCC_I2S1_CLKSOURCE_PIN (uint32_t)(RCC_DCKCFGR_I2SSRC | (RCC_DCKCFGR_I2SSRC_0 >> 16)) /*!< External pin used as I2S1 clock source */
AnnaBridge 146:22da6e220af6 480 #define LL_RCC_I2S1_CLKSOURCE_PLLSRC (uint32_t)(RCC_DCKCFGR_I2SSRC | (RCC_DCKCFGR_I2SSRC_1 >> 16)) /*!< PLL Main clock used as I2S1 clock source */
AnnaBridge 146:22da6e220af6 481 #endif /* RCC_DCKCFGR_I2SSRC */
AnnaBridge 146:22da6e220af6 482 #if defined(RCC_DCKCFGR_I2S1SRC)
AnnaBridge 146:22da6e220af6 483 #define LL_RCC_I2S1_CLKSOURCE_PLLI2S (uint32_t)(RCC_DCKCFGR_I2S1SRC | 0x00000000U) /*!< PLLI2S clock used as I2S1 clock source */
AnnaBridge 146:22da6e220af6 484 #define LL_RCC_I2S1_CLKSOURCE_PIN (uint32_t)(RCC_DCKCFGR_I2S1SRC | (RCC_DCKCFGR_I2S1SRC_0 >> 16)) /*!< External pin used as I2S1 clock source */
AnnaBridge 146:22da6e220af6 485 #define LL_RCC_I2S1_CLKSOURCE_PLL (uint32_t)(RCC_DCKCFGR_I2S1SRC | (RCC_DCKCFGR_I2S1SRC_1 >> 16)) /*!< PLL clock used as I2S1 clock source */
AnnaBridge 146:22da6e220af6 486 #define LL_RCC_I2S1_CLKSOURCE_PLLSRC (uint32_t)(RCC_DCKCFGR_I2S1SRC | (RCC_DCKCFGR_I2S1SRC >> 16)) /*!< PLL Main clock used as I2S1 clock source */
AnnaBridge 146:22da6e220af6 487 #endif /* RCC_DCKCFGR_I2S1SRC */
AnnaBridge 146:22da6e220af6 488 #if defined(RCC_DCKCFGR_I2S2SRC)
AnnaBridge 146:22da6e220af6 489 #define LL_RCC_I2S2_CLKSOURCE_PLLI2S (uint32_t)(RCC_DCKCFGR_I2S2SRC | 0x00000000U) /*!< PLLI2S clock used as I2S2 clock source */
AnnaBridge 146:22da6e220af6 490 #define LL_RCC_I2S2_CLKSOURCE_PIN (uint32_t)(RCC_DCKCFGR_I2S2SRC | (RCC_DCKCFGR_I2S2SRC_0 >> 16)) /*!< External pin used as I2S2 clock source */
AnnaBridge 146:22da6e220af6 491 #define LL_RCC_I2S2_CLKSOURCE_PLL (uint32_t)(RCC_DCKCFGR_I2S2SRC | (RCC_DCKCFGR_I2S2SRC_1 >> 16)) /*!< PLL clock used as I2S2 clock source */
AnnaBridge 146:22da6e220af6 492 #define LL_RCC_I2S2_CLKSOURCE_PLLSRC (uint32_t)(RCC_DCKCFGR_I2S2SRC | (RCC_DCKCFGR_I2S2SRC >> 16)) /*!< PLL Main clock used as I2S2 clock source */
AnnaBridge 146:22da6e220af6 493 #endif /* RCC_DCKCFGR_I2S2SRC */
AnnaBridge 146:22da6e220af6 494 /**
AnnaBridge 146:22da6e220af6 495 * @}
AnnaBridge 146:22da6e220af6 496 */
AnnaBridge 146:22da6e220af6 497
AnnaBridge 146:22da6e220af6 498 #if defined(RCC_DCKCFGR_CK48MSEL) || defined(RCC_DCKCFGR2_CK48MSEL)
AnnaBridge 146:22da6e220af6 499 /** @defgroup RCC_LL_EC_CK48M_CLKSOURCE Peripheral 48Mhz domain clock source selection
AnnaBridge 146:22da6e220af6 500 * @{
AnnaBridge 146:22da6e220af6 501 */
AnnaBridge 146:22da6e220af6 502 #if defined(RCC_DCKCFGR_CK48MSEL)
AnnaBridge 146:22da6e220af6 503 #define LL_RCC_CK48M_CLKSOURCE_PLL 0x00000000U /*!< PLL oscillator clock used as 48Mhz domain clock */
AnnaBridge 146:22da6e220af6 504 #define LL_RCC_CK48M_CLKSOURCE_PLLSAI RCC_DCKCFGR_CK48MSEL /*!< PLLSAI oscillator clock used as 48Mhz domain clock */
AnnaBridge 146:22da6e220af6 505 #endif /* RCC_DCKCFGR_CK48MSEL */
AnnaBridge 146:22da6e220af6 506 #if defined(RCC_DCKCFGR2_CK48MSEL)
AnnaBridge 146:22da6e220af6 507 #define LL_RCC_CK48M_CLKSOURCE_PLL 0x00000000U /*!< PLL oscillator clock used as 48Mhz domain clock */
AnnaBridge 146:22da6e220af6 508 #if defined(RCC_PLLSAI_SUPPORT)
AnnaBridge 146:22da6e220af6 509 #define LL_RCC_CK48M_CLKSOURCE_PLLSAI RCC_DCKCFGR2_CK48MSEL /*!< PLLSAI oscillator clock used as 48Mhz domain clock */
AnnaBridge 146:22da6e220af6 510 #endif /* RCC_PLLSAI_SUPPORT */
AnnaBridge 146:22da6e220af6 511 #if defined(RCC_PLLI2SCFGR_PLLI2SQ) && !defined(RCC_DCKCFGR_PLLI2SDIVQ)
AnnaBridge 146:22da6e220af6 512 #define LL_RCC_CK48M_CLKSOURCE_PLLI2S RCC_DCKCFGR2_CK48MSEL /*!< PLLI2S oscillator clock used as 48Mhz domain clock */
AnnaBridge 146:22da6e220af6 513 #endif /* RCC_PLLI2SCFGR_PLLI2SQ && !RCC_DCKCFGR_PLLI2SDIVQ */
AnnaBridge 146:22da6e220af6 514 #endif /* RCC_DCKCFGR2_CK48MSEL */
AnnaBridge 146:22da6e220af6 515 /**
AnnaBridge 146:22da6e220af6 516 * @}
AnnaBridge 146:22da6e220af6 517 */
AnnaBridge 146:22da6e220af6 518
AnnaBridge 146:22da6e220af6 519 #if defined(RNG)
AnnaBridge 146:22da6e220af6 520 /** @defgroup RCC_LL_EC_RNG_CLKSOURCE Peripheral RNG clock source selection
AnnaBridge 146:22da6e220af6 521 * @{
AnnaBridge 146:22da6e220af6 522 */
AnnaBridge 146:22da6e220af6 523 #define LL_RCC_RNG_CLKSOURCE_PLL LL_RCC_CK48M_CLKSOURCE_PLL /*!< PLL clock used as RNG clock source */
AnnaBridge 146:22da6e220af6 524 #if defined(RCC_PLLSAI_SUPPORT)
AnnaBridge 146:22da6e220af6 525 #define LL_RCC_RNG_CLKSOURCE_PLLSAI LL_RCC_CK48M_CLKSOURCE_PLLSAI /*!< PLLSAI clock used as RNG clock source */
AnnaBridge 146:22da6e220af6 526 #endif /* RCC_PLLSAI_SUPPORT */
AnnaBridge 146:22da6e220af6 527 #if defined(RCC_PLLI2SCFGR_PLLI2SQ) && !defined(RCC_DCKCFGR_PLLI2SDIVQ)
AnnaBridge 146:22da6e220af6 528 #define LL_RCC_RNG_CLKSOURCE_PLLI2S LL_RCC_CK48M_CLKSOURCE_PLLI2S /*!< PLLI2S clock used as RNG clock source */
AnnaBridge 146:22da6e220af6 529 #endif /* RCC_PLLI2SCFGR_PLLI2SQ && !RCC_DCKCFGR_PLLI2SDIVQ */
AnnaBridge 146:22da6e220af6 530 /**
AnnaBridge 146:22da6e220af6 531 * @}
AnnaBridge 146:22da6e220af6 532 */
AnnaBridge 146:22da6e220af6 533 #endif /* RNG */
AnnaBridge 146:22da6e220af6 534
AnnaBridge 146:22da6e220af6 535 #if defined(USB_OTG_FS) || defined(USB_OTG_HS)
AnnaBridge 146:22da6e220af6 536 /** @defgroup RCC_LL_EC_USB_CLKSOURCE Peripheral USB clock source selection
AnnaBridge 146:22da6e220af6 537 * @{
AnnaBridge 146:22da6e220af6 538 */
AnnaBridge 146:22da6e220af6 539 #define LL_RCC_USB_CLKSOURCE_PLL LL_RCC_CK48M_CLKSOURCE_PLL /*!< PLL clock used as USB clock source */
AnnaBridge 146:22da6e220af6 540 #if defined(RCC_PLLSAI_SUPPORT)
AnnaBridge 146:22da6e220af6 541 #define LL_RCC_USB_CLKSOURCE_PLLSAI LL_RCC_CK48M_CLKSOURCE_PLLSAI /*!< PLLSAI clock used as USB clock source */
AnnaBridge 146:22da6e220af6 542 #endif /* RCC_PLLSAI_SUPPORT */
AnnaBridge 146:22da6e220af6 543 #if defined(RCC_PLLI2SCFGR_PLLI2SQ) && !defined(RCC_DCKCFGR_PLLI2SDIVQ)
AnnaBridge 146:22da6e220af6 544 #define LL_RCC_USB_CLKSOURCE_PLLI2S LL_RCC_CK48M_CLKSOURCE_PLLI2S /*!< PLLI2S clock used as USB clock source */
AnnaBridge 146:22da6e220af6 545 #endif /* RCC_PLLI2SCFGR_PLLI2SQ && !RCC_DCKCFGR_PLLI2SDIVQ */
AnnaBridge 146:22da6e220af6 546 /**
AnnaBridge 146:22da6e220af6 547 * @}
AnnaBridge 146:22da6e220af6 548 */
AnnaBridge 146:22da6e220af6 549 #endif /* USB_OTG_FS || USB_OTG_HS */
AnnaBridge 146:22da6e220af6 550
AnnaBridge 146:22da6e220af6 551 #endif /* RCC_DCKCFGR_CK48MSEL || RCC_DCKCFGR2_CK48MSEL */
AnnaBridge 146:22da6e220af6 552
AnnaBridge 146:22da6e220af6 553 #if defined(DFSDM1_Channel0) || defined(DFSDM2_Channel0)
AnnaBridge 146:22da6e220af6 554 /** @defgroup RCC_LL_EC_DFSDM1_AUDIO_CLKSOURCE Peripheral DFSDM Audio clock source selection
AnnaBridge 146:22da6e220af6 555 * @{
AnnaBridge 146:22da6e220af6 556 */
AnnaBridge 146:22da6e220af6 557 #define LL_RCC_DFSDM1_AUDIO_CLKSOURCE_I2S1 (uint32_t)(RCC_DCKCFGR_CKDFSDM1ASEL | 0x00000000U) /*!< I2S1 clock used as DFSDM1 Audio clock source */
AnnaBridge 146:22da6e220af6 558 #define LL_RCC_DFSDM1_AUDIO_CLKSOURCE_I2S2 (uint32_t)(RCC_DCKCFGR_CKDFSDM1ASEL | (RCC_DCKCFGR_CKDFSDM1ASEL << 16)) /*!< I2S2 clock used as DFSDM1 Audio clock source */
AnnaBridge 146:22da6e220af6 559 #if defined(DFSDM2_Channel0)
AnnaBridge 146:22da6e220af6 560 #define LL_RCC_DFSDM2_AUDIO_CLKSOURCE_I2S1 (uint32_t)(RCC_DCKCFGR_CKDFSDM2ASEL | 0x00000000U) /*!< I2S1 clock used as DFSDM2 Audio clock source */
AnnaBridge 146:22da6e220af6 561 #define LL_RCC_DFSDM2_AUDIO_CLKSOURCE_I2S2 (uint32_t)(RCC_DCKCFGR_CKDFSDM2ASEL | (RCC_DCKCFGR_CKDFSDM2ASEL << 16)) /*!< I2S2 clock used as DFSDM2 Audio clock source */
AnnaBridge 146:22da6e220af6 562 #endif /* DFSDM2_Channel0 */
AnnaBridge 146:22da6e220af6 563 /**
AnnaBridge 146:22da6e220af6 564 * @}
AnnaBridge 146:22da6e220af6 565 */
AnnaBridge 146:22da6e220af6 566
AnnaBridge 146:22da6e220af6 567 /** @defgroup RCC_LL_EC_DFSDM1_CLKSOURCE Peripheral DFSDM clock source selection
AnnaBridge 146:22da6e220af6 568 * @{
AnnaBridge 146:22da6e220af6 569 */
AnnaBridge 146:22da6e220af6 570 #define LL_RCC_DFSDM1_CLKSOURCE_PCLK2 0x00000000U /*!< PCLK2 clock used as DFSDM1 clock */
AnnaBridge 146:22da6e220af6 571 #define LL_RCC_DFSDM1_CLKSOURCE_SYSCLK RCC_DCKCFGR_CKDFSDM1SEL /*!< System clock used as DFSDM1 clock */
AnnaBridge 146:22da6e220af6 572 #if defined(DFSDM2_Channel0)
AnnaBridge 146:22da6e220af6 573 #define LL_RCC_DFSDM2_CLKSOURCE_PCLK2 0x00000000U /*!< PCLK2 clock used as DFSDM2 clock */
AnnaBridge 146:22da6e220af6 574 #define LL_RCC_DFSDM2_CLKSOURCE_SYSCLK RCC_DCKCFGR_CKDFSDM1SEL /*!< System clock used as DFSDM2 clock */
AnnaBridge 146:22da6e220af6 575 #endif /* DFSDM2_Channel0 */
AnnaBridge 146:22da6e220af6 576 /**
AnnaBridge 146:22da6e220af6 577 * @}
AnnaBridge 146:22da6e220af6 578 */
AnnaBridge 146:22da6e220af6 579 #endif /* DFSDM1_Channel0 || DFSDM2_Channel0 */
AnnaBridge 146:22da6e220af6 580
AnnaBridge 146:22da6e220af6 581 #if defined(FMPI2C1)
AnnaBridge 146:22da6e220af6 582 /** @defgroup RCC_LL_EC_FMPI2C1 Peripheral FMPI2C get clock source
AnnaBridge 146:22da6e220af6 583 * @{
AnnaBridge 146:22da6e220af6 584 */
AnnaBridge 146:22da6e220af6 585 #define LL_RCC_FMPI2C1_CLKSOURCE RCC_DCKCFGR2_FMPI2C1SEL /*!< FMPI2C1 Clock source selection */
AnnaBridge 146:22da6e220af6 586 /**
AnnaBridge 146:22da6e220af6 587 * @}
AnnaBridge 146:22da6e220af6 588 */
AnnaBridge 146:22da6e220af6 589 #endif /* FMPI2C1 */
AnnaBridge 146:22da6e220af6 590
AnnaBridge 146:22da6e220af6 591 #if defined(SPDIFRX)
AnnaBridge 146:22da6e220af6 592 /** @defgroup RCC_LL_EC_SPDIFRX_CLKSOURCE Peripheral SPDIFRX clock source selection
AnnaBridge 146:22da6e220af6 593 * @{
AnnaBridge 146:22da6e220af6 594 */
AnnaBridge 146:22da6e220af6 595 #define LL_RCC_SPDIFRX1_CLKSOURCE_PLL 0x00000000U /*!< PLL clock used as SPDIFRX clock source */
AnnaBridge 146:22da6e220af6 596 #define LL_RCC_SPDIFRX1_CLKSOURCE_PLLI2S RCC_DCKCFGR2_SPDIFRXSEL /*!< PLLI2S clock used as SPDIFRX clock source */
AnnaBridge 146:22da6e220af6 597 /**
AnnaBridge 146:22da6e220af6 598 * @}
AnnaBridge 146:22da6e220af6 599 */
AnnaBridge 146:22da6e220af6 600 #endif /* SPDIFRX */
AnnaBridge 146:22da6e220af6 601
AnnaBridge 146:22da6e220af6 602 #if defined(LPTIM1)
AnnaBridge 146:22da6e220af6 603 /** @defgroup RCC_LL_EC_LPTIM1 Peripheral LPTIM get clock source
AnnaBridge 146:22da6e220af6 604 * @{
AnnaBridge 146:22da6e220af6 605 */
AnnaBridge 146:22da6e220af6 606 #define LL_RCC_LPTIM1_CLKSOURCE RCC_DCKCFGR2_LPTIM1SEL /*!< LPTIM1 Clock source selection */
AnnaBridge 146:22da6e220af6 607 /**
AnnaBridge 146:22da6e220af6 608 * @}
AnnaBridge 146:22da6e220af6 609 */
AnnaBridge 146:22da6e220af6 610 #endif /* LPTIM1 */
AnnaBridge 146:22da6e220af6 611
AnnaBridge 146:22da6e220af6 612 #if defined(SAI1)
AnnaBridge 146:22da6e220af6 613 /** @defgroup RCC_LL_EC_SAIx Peripheral SAI get clock source
AnnaBridge 146:22da6e220af6 614 * @{
AnnaBridge 146:22da6e220af6 615 */
AnnaBridge 146:22da6e220af6 616 #if defined(RCC_DCKCFGR_SAI1ASRC)
AnnaBridge 146:22da6e220af6 617 #define LL_RCC_SAI1_A_CLKSOURCE RCC_DCKCFGR_SAI1ASRC /*!< SAI1 block A Clock source selection */
AnnaBridge 146:22da6e220af6 618 #endif /* RCC_DCKCFGR_SAI1ASRC */
AnnaBridge 146:22da6e220af6 619 #if defined(RCC_DCKCFGR_SAI1BSRC)
AnnaBridge 146:22da6e220af6 620 #define LL_RCC_SAI1_B_CLKSOURCE RCC_DCKCFGR_SAI1BSRC /*!< SAI1 block B Clock source selection */
AnnaBridge 146:22da6e220af6 621 #endif /* RCC_DCKCFGR_SAI1BSRC */
AnnaBridge 146:22da6e220af6 622 #if defined(RCC_DCKCFGR_SAI1SRC)
AnnaBridge 146:22da6e220af6 623 #define LL_RCC_SAI1_CLKSOURCE RCC_DCKCFGR_SAI1SRC /*!< SAI1 Clock source selection */
AnnaBridge 146:22da6e220af6 624 #endif /* RCC_DCKCFGR_SAI1SRC */
AnnaBridge 146:22da6e220af6 625 #if defined(RCC_DCKCFGR_SAI2SRC)
AnnaBridge 146:22da6e220af6 626 #define LL_RCC_SAI2_CLKSOURCE RCC_DCKCFGR_SAI2SRC /*!< SAI2 Clock source selection */
AnnaBridge 146:22da6e220af6 627 #endif /* RCC_DCKCFGR_SAI2SRC */
AnnaBridge 146:22da6e220af6 628 /**
AnnaBridge 146:22da6e220af6 629 * @}
AnnaBridge 146:22da6e220af6 630 */
AnnaBridge 146:22da6e220af6 631 #endif /* SAI1 */
AnnaBridge 146:22da6e220af6 632
AnnaBridge 146:22da6e220af6 633 #if defined(SDIO)
AnnaBridge 146:22da6e220af6 634 /** @defgroup RCC_LL_EC_SDIOx Peripheral SDIO get clock source
AnnaBridge 146:22da6e220af6 635 * @{
AnnaBridge 146:22da6e220af6 636 */
AnnaBridge 146:22da6e220af6 637 #if defined(RCC_DCKCFGR_SDIOSEL)
AnnaBridge 146:22da6e220af6 638 #define LL_RCC_SDIO_CLKSOURCE RCC_DCKCFGR_SDIOSEL /*!< SDIO Clock source selection */
AnnaBridge 146:22da6e220af6 639 #elif defined(RCC_DCKCFGR2_SDIOSEL)
AnnaBridge 146:22da6e220af6 640 #define LL_RCC_SDIO_CLKSOURCE RCC_DCKCFGR2_SDIOSEL /*!< SDIO Clock source selection */
AnnaBridge 146:22da6e220af6 641 #else
AnnaBridge 146:22da6e220af6 642 #define LL_RCC_SDIO_CLKSOURCE RCC_PLLCFGR_PLLQ /*!< SDIO Clock source selection */
AnnaBridge 146:22da6e220af6 643 #endif
AnnaBridge 146:22da6e220af6 644 /**
AnnaBridge 146:22da6e220af6 645 * @}
AnnaBridge 146:22da6e220af6 646 */
AnnaBridge 146:22da6e220af6 647 #endif /* SDIO */
AnnaBridge 146:22da6e220af6 648
AnnaBridge 146:22da6e220af6 649 #if defined(RCC_DCKCFGR_CK48MSEL) || defined(RCC_DCKCFGR2_CK48MSEL)
AnnaBridge 146:22da6e220af6 650 /** @defgroup RCC_LL_EC_CK48M Peripheral CK48M get clock source
AnnaBridge 146:22da6e220af6 651 * @{
AnnaBridge 146:22da6e220af6 652 */
AnnaBridge 146:22da6e220af6 653 #if defined(RCC_DCKCFGR_CK48MSEL)
AnnaBridge 146:22da6e220af6 654 #define LL_RCC_CK48M_CLKSOURCE RCC_DCKCFGR_CK48MSEL /*!< CK48M Domain clock source selection */
AnnaBridge 146:22da6e220af6 655 #endif /* RCC_DCKCFGR_CK48MSEL */
AnnaBridge 146:22da6e220af6 656 #if defined(RCC_DCKCFGR2_CK48MSEL)
AnnaBridge 146:22da6e220af6 657 #define LL_RCC_CK48M_CLKSOURCE RCC_DCKCFGR2_CK48MSEL /*!< CK48M Domain clock source selection */
AnnaBridge 146:22da6e220af6 658 #endif /* RCC_DCKCFGR_CK48MSEL */
AnnaBridge 146:22da6e220af6 659 /**
AnnaBridge 146:22da6e220af6 660 * @}
AnnaBridge 146:22da6e220af6 661 */
AnnaBridge 146:22da6e220af6 662 #endif /* RCC_DCKCFGR_CK48MSEL || RCC_DCKCFGR2_CK48MSEL */
AnnaBridge 146:22da6e220af6 663
AnnaBridge 146:22da6e220af6 664 #if defined(RNG)
AnnaBridge 146:22da6e220af6 665 /** @defgroup RCC_LL_EC_RNG Peripheral RNG get clock source
AnnaBridge 146:22da6e220af6 666 * @{
AnnaBridge 146:22da6e220af6 667 */
AnnaBridge 146:22da6e220af6 668 #if defined(RCC_DCKCFGR_CK48MSEL) || defined(RCC_DCKCFGR2_CK48MSEL)
AnnaBridge 146:22da6e220af6 669 #define LL_RCC_RNG_CLKSOURCE LL_RCC_CK48M_CLKSOURCE /*!< RNG Clock source selection */
AnnaBridge 146:22da6e220af6 670 #else
AnnaBridge 146:22da6e220af6 671 #define LL_RCC_RNG_CLKSOURCE RCC_PLLCFGR_PLLQ /*!< RNG Clock source selection */
AnnaBridge 146:22da6e220af6 672 #endif /* RCC_DCKCFGR_CK48MSEL || RCC_DCKCFGR2_CK48MSEL */
AnnaBridge 146:22da6e220af6 673 /**
AnnaBridge 146:22da6e220af6 674 * @}
AnnaBridge 146:22da6e220af6 675 */
AnnaBridge 146:22da6e220af6 676 #endif /* RNG */
AnnaBridge 146:22da6e220af6 677
AnnaBridge 146:22da6e220af6 678 #if defined(USB_OTG_FS) || defined(USB_OTG_HS)
AnnaBridge 146:22da6e220af6 679 /** @defgroup RCC_LL_EC_USB Peripheral USB get clock source
AnnaBridge 146:22da6e220af6 680 * @{
AnnaBridge 146:22da6e220af6 681 */
AnnaBridge 146:22da6e220af6 682 #if defined(RCC_DCKCFGR_CK48MSEL) || defined(RCC_DCKCFGR2_CK48MSEL)
AnnaBridge 146:22da6e220af6 683 #define LL_RCC_USB_CLKSOURCE LL_RCC_CK48M_CLKSOURCE /*!< USB Clock source selection */
AnnaBridge 146:22da6e220af6 684 #else
AnnaBridge 146:22da6e220af6 685 #define LL_RCC_USB_CLKSOURCE RCC_PLLCFGR_PLLQ /*!< USB Clock source selection */
AnnaBridge 146:22da6e220af6 686 #endif /* RCC_DCKCFGR_CK48MSEL || RCC_DCKCFGR2_CK48MSEL */
AnnaBridge 146:22da6e220af6 687 /**
AnnaBridge 146:22da6e220af6 688 * @}
AnnaBridge 146:22da6e220af6 689 */
AnnaBridge 146:22da6e220af6 690 #endif /* USB_OTG_FS || USB_OTG_HS */
AnnaBridge 146:22da6e220af6 691
AnnaBridge 146:22da6e220af6 692 #if defined(CEC)
AnnaBridge 146:22da6e220af6 693 /** @defgroup RCC_LL_EC_CEC Peripheral CEC get clock source
AnnaBridge 146:22da6e220af6 694 * @{
AnnaBridge 146:22da6e220af6 695 */
AnnaBridge 146:22da6e220af6 696 #define LL_RCC_CEC_CLKSOURCE RCC_DCKCFGR2_CECSEL /*!< CEC Clock source selection */
AnnaBridge 146:22da6e220af6 697 /**
AnnaBridge 146:22da6e220af6 698 * @}
AnnaBridge 146:22da6e220af6 699 */
AnnaBridge 146:22da6e220af6 700 #endif /* CEC */
AnnaBridge 146:22da6e220af6 701
AnnaBridge 146:22da6e220af6 702 /** @defgroup RCC_LL_EC_I2S1 Peripheral I2S get clock source
AnnaBridge 146:22da6e220af6 703 * @{
AnnaBridge 146:22da6e220af6 704 */
AnnaBridge 146:22da6e220af6 705 #if defined(RCC_CFGR_I2SSRC)
AnnaBridge 146:22da6e220af6 706 #define LL_RCC_I2S1_CLKSOURCE RCC_CFGR_I2SSRC /*!< I2S1 Clock source selection */
AnnaBridge 146:22da6e220af6 707 #endif /* RCC_CFGR_I2SSRC */
AnnaBridge 146:22da6e220af6 708 #if defined(RCC_DCKCFGR_I2SSRC)
AnnaBridge 146:22da6e220af6 709 #define LL_RCC_I2S1_CLKSOURCE RCC_DCKCFGR_I2SSRC /*!< I2S1 Clock source selection */
AnnaBridge 146:22da6e220af6 710 #endif /* RCC_DCKCFGR_I2SSRC */
AnnaBridge 146:22da6e220af6 711 #if defined(RCC_DCKCFGR_I2S1SRC)
AnnaBridge 146:22da6e220af6 712 #define LL_RCC_I2S1_CLKSOURCE RCC_DCKCFGR_I2S1SRC /*!< I2S1 Clock source selection */
AnnaBridge 146:22da6e220af6 713 #endif /* RCC_DCKCFGR_I2S1SRC */
AnnaBridge 146:22da6e220af6 714 #if defined(RCC_DCKCFGR_I2S2SRC)
AnnaBridge 146:22da6e220af6 715 #define LL_RCC_I2S2_CLKSOURCE RCC_DCKCFGR_I2S2SRC /*!< I2S2 Clock source selection */
AnnaBridge 146:22da6e220af6 716 #endif /* RCC_DCKCFGR_I2S2SRC */
AnnaBridge 146:22da6e220af6 717 /**
AnnaBridge 146:22da6e220af6 718 * @}
AnnaBridge 146:22da6e220af6 719 */
AnnaBridge 146:22da6e220af6 720
AnnaBridge 146:22da6e220af6 721 #if defined(DFSDM1_Channel0) || defined(DFSDM2_Channel0)
AnnaBridge 146:22da6e220af6 722 /** @defgroup RCC_LL_EC_DFSDM_AUDIO Peripheral DFSDM Audio get clock source
AnnaBridge 146:22da6e220af6 723 * @{
AnnaBridge 146:22da6e220af6 724 */
AnnaBridge 146:22da6e220af6 725 #define LL_RCC_DFSDM1_AUDIO_CLKSOURCE RCC_DCKCFGR_CKDFSDM1ASEL /*!< DFSDM1 Audio Clock source selection */
AnnaBridge 146:22da6e220af6 726 #if defined(DFSDM2_Channel0)
AnnaBridge 146:22da6e220af6 727 #define LL_RCC_DFSDM2_AUDIO_CLKSOURCE RCC_DCKCFGR_CKDFSDM2ASEL /*!< DFSDM2 Audio Clock source selection */
AnnaBridge 146:22da6e220af6 728 #endif /* DFSDM2_Channel0 */
AnnaBridge 146:22da6e220af6 729 /**
AnnaBridge 146:22da6e220af6 730 * @}
AnnaBridge 146:22da6e220af6 731 */
AnnaBridge 146:22da6e220af6 732
AnnaBridge 146:22da6e220af6 733 /** @defgroup RCC_LL_EC_DFSDM Peripheral DFSDM get clock source
AnnaBridge 146:22da6e220af6 734 * @{
AnnaBridge 146:22da6e220af6 735 */
AnnaBridge 146:22da6e220af6 736 #define LL_RCC_DFSDM1_CLKSOURCE RCC_DCKCFGR_CKDFSDM1SEL /*!< DFSDM1 Clock source selection */
AnnaBridge 146:22da6e220af6 737 #if defined(DFSDM2_Channel0)
AnnaBridge 146:22da6e220af6 738 #define LL_RCC_DFSDM2_CLKSOURCE RCC_DCKCFGR_CKDFSDM1SEL /*!< DFSDM2 Clock source selection */
AnnaBridge 146:22da6e220af6 739 #endif /* DFSDM2_Channel0 */
AnnaBridge 146:22da6e220af6 740 /**
AnnaBridge 146:22da6e220af6 741 * @}
AnnaBridge 146:22da6e220af6 742 */
AnnaBridge 146:22da6e220af6 743 #endif /* DFSDM1_Channel0 || DFSDM2_Channel0 */
AnnaBridge 146:22da6e220af6 744
AnnaBridge 146:22da6e220af6 745 #if defined(SPDIFRX)
AnnaBridge 146:22da6e220af6 746 /** @defgroup RCC_LL_EC_SPDIFRX Peripheral SPDIFRX get clock source
AnnaBridge 146:22da6e220af6 747 * @{
AnnaBridge 146:22da6e220af6 748 */
AnnaBridge 146:22da6e220af6 749 #define LL_RCC_SPDIFRX1_CLKSOURCE RCC_DCKCFGR2_SPDIFRXSEL /*!< SPDIFRX Clock source selection */
AnnaBridge 146:22da6e220af6 750 /**
AnnaBridge 146:22da6e220af6 751 * @}
AnnaBridge 146:22da6e220af6 752 */
AnnaBridge 146:22da6e220af6 753 #endif /* SPDIFRX */
AnnaBridge 146:22da6e220af6 754
AnnaBridge 146:22da6e220af6 755 #if defined(DSI)
AnnaBridge 146:22da6e220af6 756 /** @defgroup RCC_LL_EC_DSI Peripheral DSI get clock source
AnnaBridge 146:22da6e220af6 757 * @{
AnnaBridge 146:22da6e220af6 758 */
AnnaBridge 146:22da6e220af6 759 #define LL_RCC_DSI_CLKSOURCE RCC_DCKCFGR_DSISEL /*!< DSI Clock source selection */
AnnaBridge 146:22da6e220af6 760 /**
AnnaBridge 146:22da6e220af6 761 * @}
AnnaBridge 146:22da6e220af6 762 */
AnnaBridge 146:22da6e220af6 763 #endif /* DSI */
AnnaBridge 146:22da6e220af6 764
AnnaBridge 146:22da6e220af6 765 #if defined(LTDC)
AnnaBridge 146:22da6e220af6 766 /** @defgroup RCC_LL_EC_LTDC Peripheral LTDC get clock source
AnnaBridge 146:22da6e220af6 767 * @{
AnnaBridge 146:22da6e220af6 768 */
AnnaBridge 146:22da6e220af6 769 #define LL_RCC_LTDC_CLKSOURCE RCC_DCKCFGR_PLLSAIDIVR /*!< LTDC Clock source selection */
AnnaBridge 146:22da6e220af6 770 /**
AnnaBridge 146:22da6e220af6 771 * @}
AnnaBridge 146:22da6e220af6 772 */
AnnaBridge 146:22da6e220af6 773 #endif /* LTDC */
AnnaBridge 146:22da6e220af6 774
AnnaBridge 146:22da6e220af6 775
AnnaBridge 146:22da6e220af6 776 /** @defgroup RCC_LL_EC_RTC_CLKSOURCE RTC clock source selection
AnnaBridge 146:22da6e220af6 777 * @{
AnnaBridge 146:22da6e220af6 778 */
AnnaBridge 146:22da6e220af6 779 #define LL_RCC_RTC_CLKSOURCE_NONE 0x00000000U /*!< No clock used as RTC clock */
AnnaBridge 146:22da6e220af6 780 #define LL_RCC_RTC_CLKSOURCE_LSE RCC_BDCR_RTCSEL_0 /*!< LSE oscillator clock used as RTC clock */
AnnaBridge 146:22da6e220af6 781 #define LL_RCC_RTC_CLKSOURCE_LSI RCC_BDCR_RTCSEL_1 /*!< LSI oscillator clock used as RTC clock */
AnnaBridge 146:22da6e220af6 782 #define LL_RCC_RTC_CLKSOURCE_HSE RCC_BDCR_RTCSEL /*!< HSE oscillator clock divided by HSE prescaler used as RTC clock */
AnnaBridge 146:22da6e220af6 783 /**
AnnaBridge 146:22da6e220af6 784 * @}
AnnaBridge 146:22da6e220af6 785 */
AnnaBridge 146:22da6e220af6 786
AnnaBridge 146:22da6e220af6 787 #if defined(RCC_DCKCFGR_TIMPRE)
AnnaBridge 146:22da6e220af6 788 /** @defgroup RCC_LL_EC_TIM_CLKPRESCALER Timers clocks prescalers selection
AnnaBridge 146:22da6e220af6 789 * @{
AnnaBridge 146:22da6e220af6 790 */
AnnaBridge 146:22da6e220af6 791 #define LL_RCC_TIM_PRESCALER_TWICE 0x00000000U /*!< Timers clock to twice PCLK */
AnnaBridge 146:22da6e220af6 792 #define LL_RCC_TIM_PRESCALER_FOUR_TIMES RCC_DCKCFGR_TIMPRE /*!< Timers clock to four time PCLK */
AnnaBridge 146:22da6e220af6 793 /**
AnnaBridge 146:22da6e220af6 794 * @}
AnnaBridge 146:22da6e220af6 795 */
AnnaBridge 146:22da6e220af6 796 #endif /* RCC_DCKCFGR_TIMPRE */
AnnaBridge 146:22da6e220af6 797
AnnaBridge 146:22da6e220af6 798 /** @defgroup RCC_LL_EC_PLLSOURCE PLL, PLLI2S and PLLSAI entry clock source
AnnaBridge 146:22da6e220af6 799 * @{
AnnaBridge 146:22da6e220af6 800 */
AnnaBridge 146:22da6e220af6 801 #define LL_RCC_PLLSOURCE_HSI RCC_PLLCFGR_PLLSRC_HSI /*!< HSI16 clock selected as PLL entry clock source */
AnnaBridge 146:22da6e220af6 802 #define LL_RCC_PLLSOURCE_HSE RCC_PLLCFGR_PLLSRC_HSE /*!< HSE clock selected as PLL entry clock source */
AnnaBridge 146:22da6e220af6 803 #if defined(RCC_PLLI2SCFGR_PLLI2SSRC)
AnnaBridge 146:22da6e220af6 804 #define LL_RCC_PLLI2SSOURCE_PIN (RCC_PLLI2SCFGR_PLLI2SSRC | 0x80U) /*!< I2S External pin input clock selected as PLLI2S entry clock source */
AnnaBridge 146:22da6e220af6 805 #endif /* RCC_PLLI2SCFGR_PLLI2SSRC */
AnnaBridge 146:22da6e220af6 806 /**
AnnaBridge 146:22da6e220af6 807 * @}
AnnaBridge 146:22da6e220af6 808 */
AnnaBridge 146:22da6e220af6 809
AnnaBridge 146:22da6e220af6 810 /** @defgroup RCC_LL_EC_PLLM_DIV PLL, PLLI2S and PLLSAI division factor
AnnaBridge 146:22da6e220af6 811 * @{
AnnaBridge 146:22da6e220af6 812 */
AnnaBridge 146:22da6e220af6 813 #define LL_RCC_PLLM_DIV_2 (RCC_PLLCFGR_PLLM_1) /*!< PLL, PLLI2S and PLLSAI division factor by 2 */
AnnaBridge 146:22da6e220af6 814 #define LL_RCC_PLLM_DIV_3 (RCC_PLLCFGR_PLLM_1 | RCC_PLLCFGR_PLLM_0) /*!< PLL, PLLI2S and PLLSAI division factor by 3 */
AnnaBridge 146:22da6e220af6 815 #define LL_RCC_PLLM_DIV_4 (RCC_PLLCFGR_PLLM_2) /*!< PLL, PLLI2S and PLLSAI division factor by 4 */
AnnaBridge 146:22da6e220af6 816 #define LL_RCC_PLLM_DIV_5 (RCC_PLLCFGR_PLLM_2 | RCC_PLLCFGR_PLLM_0) /*!< PLL, PLLI2S and PLLSAI division factor by 5 */
AnnaBridge 146:22da6e220af6 817 #define LL_RCC_PLLM_DIV_6 (RCC_PLLCFGR_PLLM_2 | RCC_PLLCFGR_PLLM_1) /*!< PLL, PLLI2S and PLLSAI division factor by 6 */
AnnaBridge 146:22da6e220af6 818 #define LL_RCC_PLLM_DIV_7 (RCC_PLLCFGR_PLLM_2 | RCC_PLLCFGR_PLLM_1 | RCC_PLLCFGR_PLLM_0) /*!< PLL, PLLI2S and PLLSAI division factor by 7 */
AnnaBridge 146:22da6e220af6 819 #define LL_RCC_PLLM_DIV_8 (RCC_PLLCFGR_PLLM_3) /*!< PLL, PLLI2S and PLLSAI division factor by 8 */
AnnaBridge 146:22da6e220af6 820 #define LL_RCC_PLLM_DIV_9 (RCC_PLLCFGR_PLLM_3 | RCC_PLLCFGR_PLLM_0) /*!< PLL, PLLI2S and PLLSAI division factor by 9 */
AnnaBridge 146:22da6e220af6 821 #define LL_RCC_PLLM_DIV_10 (RCC_PLLCFGR_PLLM_3 | RCC_PLLCFGR_PLLM_1) /*!< PLL, PLLI2S and PLLSAI division factor by 10 */
AnnaBridge 146:22da6e220af6 822 #define LL_RCC_PLLM_DIV_11 (RCC_PLLCFGR_PLLM_3 | RCC_PLLCFGR_PLLM_1 | RCC_PLLCFGR_PLLM_0) /*!< PLL, PLLI2S and PLLSAI division factor by 11 */
AnnaBridge 146:22da6e220af6 823 #define LL_RCC_PLLM_DIV_12 (RCC_PLLCFGR_PLLM_3 | RCC_PLLCFGR_PLLM_2) /*!< PLL, PLLI2S and PLLSAI division factor by 12 */
AnnaBridge 146:22da6e220af6 824 #define LL_RCC_PLLM_DIV_13 (RCC_PLLCFGR_PLLM_3 | RCC_PLLCFGR_PLLM_2 | RCC_PLLCFGR_PLLM_0) /*!< PLL, PLLI2S and PLLSAI division factor by 13 */
AnnaBridge 146:22da6e220af6 825 #define LL_RCC_PLLM_DIV_14 (RCC_PLLCFGR_PLLM_3 | RCC_PLLCFGR_PLLM_2 | RCC_PLLCFGR_PLLM_1) /*!< PLL, PLLI2S and PLLSAI division factor by 14 */
AnnaBridge 146:22da6e220af6 826 #define LL_RCC_PLLM_DIV_15 (RCC_PLLCFGR_PLLM_3 | RCC_PLLCFGR_PLLM_2 | RCC_PLLCFGR_PLLM_1 | RCC_PLLCFGR_PLLM_0) /*!< PLL, PLLI2S and PLLSAI division factor by 15 */
AnnaBridge 146:22da6e220af6 827 #define LL_RCC_PLLM_DIV_16 (RCC_PLLCFGR_PLLM_4) /*!< PLL, PLLI2S and PLLSAI division factor by 16 */
AnnaBridge 146:22da6e220af6 828 #define LL_RCC_PLLM_DIV_17 (RCC_PLLCFGR_PLLM_4 | RCC_PLLCFGR_PLLM_0) /*!< PLL, PLLI2S and PLLSAI division factor by 17 */
AnnaBridge 146:22da6e220af6 829 #define LL_RCC_PLLM_DIV_18 (RCC_PLLCFGR_PLLM_4 | RCC_PLLCFGR_PLLM_1) /*!< PLL, PLLI2S and PLLSAI division factor by 18 */
AnnaBridge 146:22da6e220af6 830 #define LL_RCC_PLLM_DIV_19 (RCC_PLLCFGR_PLLM_4 | RCC_PLLCFGR_PLLM_1 | RCC_PLLCFGR_PLLM_0) /*!< PLL, PLLI2S and PLLSAI division factor by 19 */
AnnaBridge 146:22da6e220af6 831 #define LL_RCC_PLLM_DIV_20 (RCC_PLLCFGR_PLLM_4 | RCC_PLLCFGR_PLLM_2) /*!< PLL, PLLI2S and PLLSAI division factor by 20 */
AnnaBridge 146:22da6e220af6 832 #define LL_RCC_PLLM_DIV_21 (RCC_PLLCFGR_PLLM_4 | RCC_PLLCFGR_PLLM_2 | RCC_PLLCFGR_PLLM_0) /*!< PLL, PLLI2S and PLLSAI division factor by 21 */
AnnaBridge 146:22da6e220af6 833 #define LL_RCC_PLLM_DIV_22 (RCC_PLLCFGR_PLLM_4 | RCC_PLLCFGR_PLLM_2 | RCC_PLLCFGR_PLLM_1) /*!< PLL, PLLI2S and PLLSAI division factor by 22 */
AnnaBridge 146:22da6e220af6 834 #define LL_RCC_PLLM_DIV_23 (RCC_PLLCFGR_PLLM_4 | RCC_PLLCFGR_PLLM_2 | RCC_PLLCFGR_PLLM_1 | RCC_PLLCFGR_PLLM_0) /*!< PLL, PLLI2S and PLLSAI division factor by 23 */
AnnaBridge 146:22da6e220af6 835 #define LL_RCC_PLLM_DIV_24 (RCC_PLLCFGR_PLLM_4 | RCC_PLLCFGR_PLLM_3) /*!< PLL, PLLI2S and PLLSAI division factor by 24 */
AnnaBridge 146:22da6e220af6 836 #define LL_RCC_PLLM_DIV_25 (RCC_PLLCFGR_PLLM_4 | RCC_PLLCFGR_PLLM_3 | RCC_PLLCFGR_PLLM_0) /*!< PLL, PLLI2S and PLLSAI division factor by 25 */
AnnaBridge 146:22da6e220af6 837 #define LL_RCC_PLLM_DIV_26 (RCC_PLLCFGR_PLLM_4 | RCC_PLLCFGR_PLLM_3 | RCC_PLLCFGR_PLLM_1) /*!< PLL, PLLI2S and PLLSAI division factor by 26 */
AnnaBridge 146:22da6e220af6 838 #define LL_RCC_PLLM_DIV_27 (RCC_PLLCFGR_PLLM_4 | RCC_PLLCFGR_PLLM_3 | RCC_PLLCFGR_PLLM_1 | RCC_PLLCFGR_PLLM_0) /*!< PLL, PLLI2S and PLLSAI division factor by 27 */
AnnaBridge 146:22da6e220af6 839 #define LL_RCC_PLLM_DIV_28 (RCC_PLLCFGR_PLLM_4 | RCC_PLLCFGR_PLLM_3 | RCC_PLLCFGR_PLLM_2) /*!< PLL, PLLI2S and PLLSAI division factor by 28 */
AnnaBridge 146:22da6e220af6 840 #define LL_RCC_PLLM_DIV_29 (RCC_PLLCFGR_PLLM_4 | RCC_PLLCFGR_PLLM_3 | RCC_PLLCFGR_PLLM_2 | RCC_PLLCFGR_PLLM_0) /*!< PLL, PLLI2S and PLLSAI division factor by 29 */
AnnaBridge 146:22da6e220af6 841 #define LL_RCC_PLLM_DIV_30 (RCC_PLLCFGR_PLLM_4 | RCC_PLLCFGR_PLLM_3 | RCC_PLLCFGR_PLLM_2 | RCC_PLLCFGR_PLLM_1) /*!< PLL, PLLI2S and PLLSAI division factor by 30 */
AnnaBridge 146:22da6e220af6 842 #define LL_RCC_PLLM_DIV_31 (RCC_PLLCFGR_PLLM_4 | RCC_PLLCFGR_PLLM_3 | RCC_PLLCFGR_PLLM_2 | RCC_PLLCFGR_PLLM_1 | RCC_PLLCFGR_PLLM_0) /*!< PLL, PLLI2S and PLLSAI division factor by 31 */
AnnaBridge 146:22da6e220af6 843 #define LL_RCC_PLLM_DIV_32 (RCC_PLLCFGR_PLLM_5) /*!< PLL, PLLI2S and PLLSAI division factor by 32 */
AnnaBridge 146:22da6e220af6 844 #define LL_RCC_PLLM_DIV_33 (RCC_PLLCFGR_PLLM_5 | RCC_PLLCFGR_PLLM_0) /*!< PLL, PLLI2S and PLLSAI division factor by 33 */
AnnaBridge 146:22da6e220af6 845 #define LL_RCC_PLLM_DIV_34 (RCC_PLLCFGR_PLLM_5 | RCC_PLLCFGR_PLLM_1) /*!< PLL, PLLI2S and PLLSAI division factor by 34 */
AnnaBridge 146:22da6e220af6 846 #define LL_RCC_PLLM_DIV_35 (RCC_PLLCFGR_PLLM_5 | RCC_PLLCFGR_PLLM_1 | RCC_PLLCFGR_PLLM_0) /*!< PLL, PLLI2S and PLLSAI division factor by 35 */
AnnaBridge 146:22da6e220af6 847 #define LL_RCC_PLLM_DIV_36 (RCC_PLLCFGR_PLLM_5 | RCC_PLLCFGR_PLLM_2) /*!< PLL, PLLI2S and PLLSAI division factor by 36 */
AnnaBridge 146:22da6e220af6 848 #define LL_RCC_PLLM_DIV_37 (RCC_PLLCFGR_PLLM_5 | RCC_PLLCFGR_PLLM_2 | RCC_PLLCFGR_PLLM_0) /*!< PLL, PLLI2S and PLLSAI division factor by 37 */
AnnaBridge 146:22da6e220af6 849 #define LL_RCC_PLLM_DIV_38 (RCC_PLLCFGR_PLLM_5 | RCC_PLLCFGR_PLLM_2 | RCC_PLLCFGR_PLLM_1) /*!< PLL, PLLI2S and PLLSAI division factor by 38 */
AnnaBridge 146:22da6e220af6 850 #define LL_RCC_PLLM_DIV_39 (RCC_PLLCFGR_PLLM_5 | RCC_PLLCFGR_PLLM_2 | RCC_PLLCFGR_PLLM_1 | RCC_PLLCFGR_PLLM_0) /*!< PLL, PLLI2S and PLLSAI division factor by 39 */
AnnaBridge 146:22da6e220af6 851 #define LL_RCC_PLLM_DIV_40 (RCC_PLLCFGR_PLLM_5 | RCC_PLLCFGR_PLLM_3) /*!< PLL, PLLI2S and PLLSAI division factor by 40 */
AnnaBridge 146:22da6e220af6 852 #define LL_RCC_PLLM_DIV_41 (RCC_PLLCFGR_PLLM_5 | RCC_PLLCFGR_PLLM_3 | RCC_PLLCFGR_PLLM_0) /*!< PLL, PLLI2S and PLLSAI division factor by 41 */
AnnaBridge 146:22da6e220af6 853 #define LL_RCC_PLLM_DIV_42 (RCC_PLLCFGR_PLLM_5 | RCC_PLLCFGR_PLLM_3 | RCC_PLLCFGR_PLLM_1) /*!< PLL, PLLI2S and PLLSAI division factor by 42 */
AnnaBridge 146:22da6e220af6 854 #define LL_RCC_PLLM_DIV_43 (RCC_PLLCFGR_PLLM_5 | RCC_PLLCFGR_PLLM_3 | RCC_PLLCFGR_PLLM_1 | RCC_PLLCFGR_PLLM_0) /*!< PLL, PLLI2S and PLLSAI division factor by 43 */
AnnaBridge 146:22da6e220af6 855 #define LL_RCC_PLLM_DIV_44 (RCC_PLLCFGR_PLLM_5 | RCC_PLLCFGR_PLLM_3 | RCC_PLLCFGR_PLLM_2) /*!< PLL, PLLI2S and PLLSAI division factor by 44 */
AnnaBridge 146:22da6e220af6 856 #define LL_RCC_PLLM_DIV_45 (RCC_PLLCFGR_PLLM_5 | RCC_PLLCFGR_PLLM_3 | RCC_PLLCFGR_PLLM_2 | RCC_PLLCFGR_PLLM_0) /*!< PLL, PLLI2S and PLLSAI division factor by 45 */
AnnaBridge 146:22da6e220af6 857 #define LL_RCC_PLLM_DIV_46 (RCC_PLLCFGR_PLLM_5 | RCC_PLLCFGR_PLLM_3 | RCC_PLLCFGR_PLLM_2 | RCC_PLLCFGR_PLLM_1) /*!< PLL, PLLI2S and PLLSAI division factor by 46 */
AnnaBridge 146:22da6e220af6 858 #define LL_RCC_PLLM_DIV_47 (RCC_PLLCFGR_PLLM_5 | RCC_PLLCFGR_PLLM_3 | RCC_PLLCFGR_PLLM_2 | RCC_PLLCFGR_PLLM_1 | RCC_PLLCFGR_PLLM_0) /*!< PLL, PLLI2S and PLLSAI division factor by 47 */
AnnaBridge 146:22da6e220af6 859 #define LL_RCC_PLLM_DIV_48 (RCC_PLLCFGR_PLLM_5 | RCC_PLLCFGR_PLLM_4) /*!< PLL, PLLI2S and PLLSAI division factor by 48 */
AnnaBridge 146:22da6e220af6 860 #define LL_RCC_PLLM_DIV_49 (RCC_PLLCFGR_PLLM_5 | RCC_PLLCFGR_PLLM_4 | RCC_PLLCFGR_PLLM_0) /*!< PLL, PLLI2S and PLLSAI division factor by 49 */
AnnaBridge 146:22da6e220af6 861 #define LL_RCC_PLLM_DIV_50 (RCC_PLLCFGR_PLLM_5 | RCC_PLLCFGR_PLLM_4 | RCC_PLLCFGR_PLLM_1) /*!< PLL, PLLI2S and PLLSAI division factor by 50 */
AnnaBridge 146:22da6e220af6 862 #define LL_RCC_PLLM_DIV_51 (RCC_PLLCFGR_PLLM_5 | RCC_PLLCFGR_PLLM_4 | RCC_PLLCFGR_PLLM_1 | RCC_PLLCFGR_PLLM_0) /*!< PLL, PLLI2S and PLLSAI division factor by 51 */
AnnaBridge 146:22da6e220af6 863 #define LL_RCC_PLLM_DIV_52 (RCC_PLLCFGR_PLLM_5 | RCC_PLLCFGR_PLLM_4 | RCC_PLLCFGR_PLLM_2) /*!< PLL, PLLI2S and PLLSAI division factor by 52 */
AnnaBridge 146:22da6e220af6 864 #define LL_RCC_PLLM_DIV_53 (RCC_PLLCFGR_PLLM_5 | RCC_PLLCFGR_PLLM_4 | RCC_PLLCFGR_PLLM_2 | RCC_PLLCFGR_PLLM_0) /*!< PLL, PLLI2S and PLLSAI division factor by 53 */
AnnaBridge 146:22da6e220af6 865 #define LL_RCC_PLLM_DIV_54 (RCC_PLLCFGR_PLLM_5 | RCC_PLLCFGR_PLLM_4 | RCC_PLLCFGR_PLLM_2 | RCC_PLLCFGR_PLLM_1) /*!< PLL, PLLI2S and PLLSAI division factor by 54 */
AnnaBridge 146:22da6e220af6 866 #define LL_RCC_PLLM_DIV_55 (RCC_PLLCFGR_PLLM_5 | RCC_PLLCFGR_PLLM_4 | RCC_PLLCFGR_PLLM_2 | RCC_PLLCFGR_PLLM_1 | RCC_PLLCFGR_PLLM_0) /*!< PLL, PLLI2S and PLLSAI division factor by 55 */
AnnaBridge 146:22da6e220af6 867 #define LL_RCC_PLLM_DIV_56 (RCC_PLLCFGR_PLLM_5 | RCC_PLLCFGR_PLLM_4 | RCC_PLLCFGR_PLLM_3) /*!< PLL, PLLI2S and PLLSAI division factor by 56 */
AnnaBridge 146:22da6e220af6 868 #define LL_RCC_PLLM_DIV_57 (RCC_PLLCFGR_PLLM_5 | RCC_PLLCFGR_PLLM_4 | RCC_PLLCFGR_PLLM_3 | RCC_PLLCFGR_PLLM_0) /*!< PLL, PLLI2S and PLLSAI division factor by 57 */
AnnaBridge 146:22da6e220af6 869 #define LL_RCC_PLLM_DIV_58 (RCC_PLLCFGR_PLLM_5 | RCC_PLLCFGR_PLLM_4 | RCC_PLLCFGR_PLLM_3 | RCC_PLLCFGR_PLLM_1) /*!< PLL, PLLI2S and PLLSAI division factor by 58 */
AnnaBridge 146:22da6e220af6 870 #define LL_RCC_PLLM_DIV_59 (RCC_PLLCFGR_PLLM_5 | RCC_PLLCFGR_PLLM_4 | RCC_PLLCFGR_PLLM_3 | RCC_PLLCFGR_PLLM_1 | RCC_PLLCFGR_PLLM_0) /*!< PLL, PLLI2S and PLLSAI division factor by 59 */
AnnaBridge 146:22da6e220af6 871 #define LL_RCC_PLLM_DIV_60 (RCC_PLLCFGR_PLLM_5 | RCC_PLLCFGR_PLLM_4 | RCC_PLLCFGR_PLLM_3 | RCC_PLLCFGR_PLLM_2) /*!< PLL, PLLI2S and PLLSAI division factor by 60 */
AnnaBridge 146:22da6e220af6 872 #define LL_RCC_PLLM_DIV_61 (RCC_PLLCFGR_PLLM_5 | RCC_PLLCFGR_PLLM_4 | RCC_PLLCFGR_PLLM_3 | RCC_PLLCFGR_PLLM_2 | RCC_PLLCFGR_PLLM_0) /*!< PLL, PLLI2S and PLLSAI division factor by 61 */
AnnaBridge 146:22da6e220af6 873 #define LL_RCC_PLLM_DIV_62 (RCC_PLLCFGR_PLLM_5 | RCC_PLLCFGR_PLLM_4 | RCC_PLLCFGR_PLLM_3 | RCC_PLLCFGR_PLLM_2 | RCC_PLLCFGR_PLLM_1) /*!< PLL, PLLI2S and PLLSAI division factor by 62 */
AnnaBridge 146:22da6e220af6 874 #define LL_RCC_PLLM_DIV_63 (RCC_PLLCFGR_PLLM_5 | RCC_PLLCFGR_PLLM_4 | RCC_PLLCFGR_PLLM_3 | RCC_PLLCFGR_PLLM_2 | RCC_PLLCFGR_PLLM_1 | RCC_PLLCFGR_PLLM_0) /*!< PLL, PLLI2S and PLLSAI division factor by 63 */
AnnaBridge 146:22da6e220af6 875 /**
AnnaBridge 146:22da6e220af6 876 * @}
AnnaBridge 146:22da6e220af6 877 */
AnnaBridge 146:22da6e220af6 878
AnnaBridge 146:22da6e220af6 879 #if defined(RCC_PLLCFGR_PLLR)
AnnaBridge 146:22da6e220af6 880 /** @defgroup RCC_LL_EC_PLLR_DIV PLL division factor (PLLR)
AnnaBridge 146:22da6e220af6 881 * @{
AnnaBridge 146:22da6e220af6 882 */
AnnaBridge 146:22da6e220af6 883 #define LL_RCC_PLLR_DIV_2 (RCC_PLLCFGR_PLLR_1) /*!< Main PLL division factor for PLLCLK (system clock) by 2 */
AnnaBridge 146:22da6e220af6 884 #define LL_RCC_PLLR_DIV_3 (RCC_PLLCFGR_PLLR_1|RCC_PLLCFGR_PLLR_0) /*!< Main PLL division factor for PLLCLK (system clock) by 3 */
AnnaBridge 146:22da6e220af6 885 #define LL_RCC_PLLR_DIV_4 (RCC_PLLCFGR_PLLR_2) /*!< Main PLL division factor for PLLCLK (system clock) by 4 */
AnnaBridge 146:22da6e220af6 886 #define LL_RCC_PLLR_DIV_5 (RCC_PLLCFGR_PLLR_2|RCC_PLLCFGR_PLLR_0) /*!< Main PLL division factor for PLLCLK (system clock) by 5 */
AnnaBridge 146:22da6e220af6 887 #define LL_RCC_PLLR_DIV_6 (RCC_PLLCFGR_PLLR_2|RCC_PLLCFGR_PLLR_1) /*!< Main PLL division factor for PLLCLK (system clock) by 6 */
AnnaBridge 146:22da6e220af6 888 #define LL_RCC_PLLR_DIV_7 (RCC_PLLCFGR_PLLR) /*!< Main PLL division factor for PLLCLK (system clock) by 7 */
AnnaBridge 146:22da6e220af6 889 /**
AnnaBridge 146:22da6e220af6 890 * @}
AnnaBridge 146:22da6e220af6 891 */
AnnaBridge 146:22da6e220af6 892 #endif /* RCC_PLLCFGR_PLLR */
AnnaBridge 146:22da6e220af6 893
AnnaBridge 146:22da6e220af6 894 #if defined(RCC_DCKCFGR_PLLDIVR)
AnnaBridge 146:22da6e220af6 895 /** @defgroup RCC_LL_EC_PLLDIVR PLLDIVR division factor (PLLDIVR)
AnnaBridge 146:22da6e220af6 896 * @{
AnnaBridge 146:22da6e220af6 897 */
AnnaBridge 146:22da6e220af6 898 #define LL_RCC_PLLDIVR_DIV_1 (RCC_DCKCFGR_PLLDIVR_0) /*!< PLL division factor for PLLDIVR output by 1 */
AnnaBridge 146:22da6e220af6 899 #define LL_RCC_PLLDIVR_DIV_2 (RCC_DCKCFGR_PLLDIVR_1) /*!< PLL division factor for PLLDIVR output by 2 */
AnnaBridge 146:22da6e220af6 900 #define LL_RCC_PLLDIVR_DIV_3 (RCC_DCKCFGR_PLLDIVR_1 | RCC_DCKCFGR_PLLDIVR_0) /*!< PLL division factor for PLLDIVR output by 3 */
AnnaBridge 146:22da6e220af6 901 #define LL_RCC_PLLDIVR_DIV_4 (RCC_DCKCFGR_PLLDIVR_2) /*!< PLL division factor for PLLDIVR output by 4 */
AnnaBridge 146:22da6e220af6 902 #define LL_RCC_PLLDIVR_DIV_5 (RCC_DCKCFGR_PLLDIVR_2 | RCC_DCKCFGR_PLLDIVR_0) /*!< PLL division factor for PLLDIVR output by 5 */
AnnaBridge 146:22da6e220af6 903 #define LL_RCC_PLLDIVR_DIV_6 (RCC_DCKCFGR_PLLDIVR_2 | RCC_DCKCFGR_PLLDIVR_1) /*!< PLL division factor for PLLDIVR output by 6 */
AnnaBridge 146:22da6e220af6 904 #define LL_RCC_PLLDIVR_DIV_7 (RCC_DCKCFGR_PLLDIVR_2 | RCC_DCKCFGR_PLLDIVR_1 | RCC_DCKCFGR_PLLDIVR_0) /*!< PLL division factor for PLLDIVR output by 7 */
AnnaBridge 146:22da6e220af6 905 #define LL_RCC_PLLDIVR_DIV_8 (RCC_DCKCFGR_PLLDIVR_3) /*!< PLL division factor for PLLDIVR output by 8 */
AnnaBridge 146:22da6e220af6 906 #define LL_RCC_PLLDIVR_DIV_9 (RCC_DCKCFGR_PLLDIVR_3 | RCC_DCKCFGR_PLLDIVR_0) /*!< PLL division factor for PLLDIVR output by 9 */
AnnaBridge 146:22da6e220af6 907 #define LL_RCC_PLLDIVR_DIV_10 (RCC_DCKCFGR_PLLDIVR_3 | RCC_DCKCFGR_PLLDIVR_1) /*!< PLL division factor for PLLDIVR output by 10 */
AnnaBridge 146:22da6e220af6 908 #define LL_RCC_PLLDIVR_DIV_11 (RCC_DCKCFGR_PLLDIVR_3 | RCC_DCKCFGR_PLLDIVR_1 | RCC_DCKCFGR_PLLDIVR_0) /*!< PLL division factor for PLLDIVR output by 11 */
AnnaBridge 146:22da6e220af6 909 #define LL_RCC_PLLDIVR_DIV_12 (RCC_DCKCFGR_PLLDIVR_3 | RCC_DCKCFGR_PLLDIVR_2) /*!< PLL division factor for PLLDIVR output by 12 */
AnnaBridge 146:22da6e220af6 910 #define LL_RCC_PLLDIVR_DIV_13 (RCC_DCKCFGR_PLLDIVR_3 | RCC_DCKCFGR_PLLDIVR_2 | RCC_DCKCFGR_PLLDIVR_0) /*!< PLL division factor for PLLDIVR output by 13 */
AnnaBridge 146:22da6e220af6 911 #define LL_RCC_PLLDIVR_DIV_14 (RCC_DCKCFGR_PLLDIVR_3 | RCC_DCKCFGR_PLLDIVR_2 | RCC_DCKCFGR_PLLDIVR_1) /*!< PLL division factor for PLLDIVR output by 14 */
AnnaBridge 146:22da6e220af6 912 #define LL_RCC_PLLDIVR_DIV_15 (RCC_DCKCFGR_PLLDIVR_3 | RCC_DCKCFGR_PLLDIVR_2 | RCC_DCKCFGR_PLLDIVR_1 | RCC_DCKCFGR_PLLDIVR_0) /*!< PLL division factor for PLLDIVR output by 15 */
AnnaBridge 146:22da6e220af6 913 #define LL_RCC_PLLDIVR_DIV_16 (RCC_DCKCFGR_PLLDIVR_4) /*!< PLL division factor for PLLDIVR output by 16 */
AnnaBridge 146:22da6e220af6 914 #define LL_RCC_PLLDIVR_DIV_17 (RCC_DCKCFGR_PLLDIVR_4 | RCC_DCKCFGR_PLLDIVR_0) /*!< PLL division factor for PLLDIVR output by 17 */
AnnaBridge 146:22da6e220af6 915 #define LL_RCC_PLLDIVR_DIV_18 (RCC_DCKCFGR_PLLDIVR_4 | RCC_DCKCFGR_PLLDIVR_1) /*!< PLL division factor for PLLDIVR output by 18 */
AnnaBridge 146:22da6e220af6 916 #define LL_RCC_PLLDIVR_DIV_19 (RCC_DCKCFGR_PLLDIVR_4 | RCC_DCKCFGR_PLLDIVR_1 | RCC_DCKCFGR_PLLDIVR_0) /*!< PLL division factor for PLLDIVR output by 19 */
AnnaBridge 146:22da6e220af6 917 #define LL_RCC_PLLDIVR_DIV_20 (RCC_DCKCFGR_PLLDIVR_4 | RCC_DCKCFGR_PLLDIVR_2) /*!< PLL division factor for PLLDIVR output by 20 */
AnnaBridge 146:22da6e220af6 918 #define LL_RCC_PLLDIVR_DIV_21 (RCC_DCKCFGR_PLLDIVR_4 | RCC_DCKCFGR_PLLDIVR_2 | RCC_DCKCFGR_PLLDIVR_0) /*!< PLL division factor for PLLDIVR output by 21 */
AnnaBridge 146:22da6e220af6 919 #define LL_RCC_PLLDIVR_DIV_22 (RCC_DCKCFGR_PLLDIVR_4 | RCC_DCKCFGR_PLLDIVR_2 | RCC_DCKCFGR_PLLDIVR_1) /*!< PLL division factor for PLLDIVR output by 22 */
AnnaBridge 146:22da6e220af6 920 #define LL_RCC_PLLDIVR_DIV_23 (RCC_DCKCFGR_PLLDIVR_4 | RCC_DCKCFGR_PLLDIVR_2 | RCC_DCKCFGR_PLLDIVR_1 | RCC_DCKCFGR_PLLDIVR_0) /*!< PLL division factor for PLLDIVR output by 23 */
AnnaBridge 146:22da6e220af6 921 #define LL_RCC_PLLDIVR_DIV_24 (RCC_DCKCFGR_PLLDIVR_4 | RCC_DCKCFGR_PLLDIVR_3) /*!< PLL division factor for PLLDIVR output by 24 */
AnnaBridge 146:22da6e220af6 922 #define LL_RCC_PLLDIVR_DIV_25 (RCC_DCKCFGR_PLLDIVR_4 | RCC_DCKCFGR_PLLDIVR_3 | RCC_DCKCFGR_PLLDIVR_0) /*!< PLL division factor for PLLDIVR output by 25 */
AnnaBridge 146:22da6e220af6 923 #define LL_RCC_PLLDIVR_DIV_26 (RCC_DCKCFGR_PLLDIVR_4 | RCC_DCKCFGR_PLLDIVR_3 | RCC_DCKCFGR_PLLDIVR_1) /*!< PLL division factor for PLLDIVR output by 26 */
AnnaBridge 146:22da6e220af6 924 #define LL_RCC_PLLDIVR_DIV_27 (RCC_DCKCFGR_PLLDIVR_4 | RCC_DCKCFGR_PLLDIVR_3 | RCC_DCKCFGR_PLLDIVR_1 | RCC_DCKCFGR_PLLDIVR_0) /*!< PLL division factor for PLLDIVR output by 27 */
AnnaBridge 146:22da6e220af6 925 #define LL_RCC_PLLDIVR_DIV_28 (RCC_DCKCFGR_PLLDIVR_4 | RCC_DCKCFGR_PLLDIVR_3 | RCC_DCKCFGR_PLLDIVR_2) /*!< PLL division factor for PLLDIVR output by 28 */
AnnaBridge 146:22da6e220af6 926 #define LL_RCC_PLLDIVR_DIV_29 (RCC_DCKCFGR_PLLDIVR_4 | RCC_DCKCFGR_PLLDIVR_3 | RCC_DCKCFGR_PLLDIVR_2 | RCC_DCKCFGR_PLLDIVR_0) /*!< PLL division factor for PLLDIVR output by 29 */
AnnaBridge 146:22da6e220af6 927 #define LL_RCC_PLLDIVR_DIV_30 (RCC_DCKCFGR_PLLDIVR_4 | RCC_DCKCFGR_PLLDIVR_3 | RCC_DCKCFGR_PLLDIVR_2 | RCC_DCKCFGR_PLLDIVR_1) /*!< PLL division factor for PLLDIVR output by 30 */
AnnaBridge 146:22da6e220af6 928 #define LL_RCC_PLLDIVR_DIV_31 (RCC_DCKCFGR_PLLDIVR_4 | RCC_DCKCFGR_PLLDIVR_3 | RCC_DCKCFGR_PLLDIVR_2 | RCC_DCKCFGR_PLLDIVR_1 | RCC_DCKCFGR_PLLDIVR_0) /*!< PLL division factor for PLLDIVR output by 31 */
AnnaBridge 146:22da6e220af6 929 /**
AnnaBridge 146:22da6e220af6 930 * @}
AnnaBridge 146:22da6e220af6 931 */
AnnaBridge 146:22da6e220af6 932 #endif /* RCC_DCKCFGR_PLLDIVR */
AnnaBridge 146:22da6e220af6 933
AnnaBridge 146:22da6e220af6 934 /** @defgroup RCC_LL_EC_PLLP_DIV PLL division factor (PLLP)
AnnaBridge 146:22da6e220af6 935 * @{
AnnaBridge 146:22da6e220af6 936 */
AnnaBridge 146:22da6e220af6 937 #define LL_RCC_PLLP_DIV_2 0x00000000U /*!< Main PLL division factor for PLLP output by 2 */
AnnaBridge 146:22da6e220af6 938 #define LL_RCC_PLLP_DIV_4 RCC_PLLCFGR_PLLP_0 /*!< Main PLL division factor for PLLP output by 4 */
AnnaBridge 146:22da6e220af6 939 #define LL_RCC_PLLP_DIV_6 RCC_PLLCFGR_PLLP_1 /*!< Main PLL division factor for PLLP output by 6 */
AnnaBridge 146:22da6e220af6 940 #define LL_RCC_PLLP_DIV_8 (RCC_PLLCFGR_PLLP_1 | RCC_PLLCFGR_PLLP_0) /*!< Main PLL division factor for PLLP output by 8 */
AnnaBridge 146:22da6e220af6 941 /**
AnnaBridge 146:22da6e220af6 942 * @}
AnnaBridge 146:22da6e220af6 943 */
AnnaBridge 146:22da6e220af6 944
AnnaBridge 146:22da6e220af6 945 /** @defgroup RCC_LL_EC_PLLQ_DIV PLL division factor (PLLQ)
AnnaBridge 146:22da6e220af6 946 * @{
AnnaBridge 146:22da6e220af6 947 */
AnnaBridge 146:22da6e220af6 948 #define LL_RCC_PLLQ_DIV_2 RCC_PLLCFGR_PLLQ_1 /*!< Main PLL division factor for PLLQ output by 2 */
AnnaBridge 146:22da6e220af6 949 #define LL_RCC_PLLQ_DIV_3 (RCC_PLLCFGR_PLLQ_1|RCC_PLLCFGR_PLLQ_0) /*!< Main PLL division factor for PLLQ output by 3 */
AnnaBridge 146:22da6e220af6 950 #define LL_RCC_PLLQ_DIV_4 RCC_PLLCFGR_PLLQ_2 /*!< Main PLL division factor for PLLQ output by 4 */
AnnaBridge 146:22da6e220af6 951 #define LL_RCC_PLLQ_DIV_5 (RCC_PLLCFGR_PLLQ_2|RCC_PLLCFGR_PLLQ_0) /*!< Main PLL division factor for PLLQ output by 5 */
AnnaBridge 146:22da6e220af6 952 #define LL_RCC_PLLQ_DIV_6 (RCC_PLLCFGR_PLLQ_2|RCC_PLLCFGR_PLLQ_1) /*!< Main PLL division factor for PLLQ output by 6 */
AnnaBridge 146:22da6e220af6 953 #define LL_RCC_PLLQ_DIV_7 (RCC_PLLCFGR_PLLQ_2|RCC_PLLCFGR_PLLQ_1|RCC_PLLCFGR_PLLQ_0) /*!< Main PLL division factor for PLLQ output by 7 */
AnnaBridge 146:22da6e220af6 954 #define LL_RCC_PLLQ_DIV_8 RCC_PLLCFGR_PLLQ_3 /*!< Main PLL division factor for PLLQ output by 8 */
AnnaBridge 146:22da6e220af6 955 #define LL_RCC_PLLQ_DIV_9 (RCC_PLLCFGR_PLLQ_3|RCC_PLLCFGR_PLLQ_0) /*!< Main PLL division factor for PLLQ output by 9 */
AnnaBridge 146:22da6e220af6 956 #define LL_RCC_PLLQ_DIV_10 (RCC_PLLCFGR_PLLQ_3|RCC_PLLCFGR_PLLQ_1) /*!< Main PLL division factor for PLLQ output by 10 */
AnnaBridge 146:22da6e220af6 957 #define LL_RCC_PLLQ_DIV_11 (RCC_PLLCFGR_PLLQ_3|RCC_PLLCFGR_PLLQ_1|RCC_PLLCFGR_PLLQ_0) /*!< Main PLL division factor for PLLQ output by 11 */
AnnaBridge 146:22da6e220af6 958 #define LL_RCC_PLLQ_DIV_12 (RCC_PLLCFGR_PLLQ_3|RCC_PLLCFGR_PLLQ_2) /*!< Main PLL division factor for PLLQ output by 12 */
AnnaBridge 146:22da6e220af6 959 #define LL_RCC_PLLQ_DIV_13 (RCC_PLLCFGR_PLLQ_3|RCC_PLLCFGR_PLLQ_2|RCC_PLLCFGR_PLLQ_0) /*!< Main PLL division factor for PLLQ output by 13 */
AnnaBridge 146:22da6e220af6 960 #define LL_RCC_PLLQ_DIV_14 (RCC_PLLCFGR_PLLQ_3|RCC_PLLCFGR_PLLQ_2|RCC_PLLCFGR_PLLQ_1) /*!< Main PLL division factor for PLLQ output by 14 */
AnnaBridge 146:22da6e220af6 961 #define LL_RCC_PLLQ_DIV_15 (RCC_PLLCFGR_PLLQ_3|RCC_PLLCFGR_PLLQ_2|RCC_PLLCFGR_PLLQ_1|RCC_PLLCFGR_PLLQ_0) /*!< Main PLL division factor for PLLQ output by 15 */
AnnaBridge 146:22da6e220af6 962 /**
AnnaBridge 146:22da6e220af6 963 * @}
AnnaBridge 146:22da6e220af6 964 */
AnnaBridge 146:22da6e220af6 965
AnnaBridge 146:22da6e220af6 966 /** @defgroup RCC_LL_EC_PLL_SPRE_SEL PLL Spread Spectrum Selection
AnnaBridge 146:22da6e220af6 967 * @{
AnnaBridge 146:22da6e220af6 968 */
AnnaBridge 146:22da6e220af6 969 #define LL_RCC_SPREAD_SELECT_CENTER 0x00000000U /*!< PLL center spread spectrum selection */
AnnaBridge 146:22da6e220af6 970 #define LL_RCC_SPREAD_SELECT_DOWN RCC_SSCGR_SPREADSEL /*!< PLL down spread spectrum selection */
AnnaBridge 146:22da6e220af6 971 /**
AnnaBridge 146:22da6e220af6 972 * @}
AnnaBridge 146:22da6e220af6 973 */
AnnaBridge 146:22da6e220af6 974
AnnaBridge 146:22da6e220af6 975 #if defined(RCC_PLLI2S_SUPPORT)
AnnaBridge 146:22da6e220af6 976 /** @defgroup RCC_LL_EC_PLLI2SM PLLI2SM division factor (PLLI2SM)
AnnaBridge 146:22da6e220af6 977 * @{
AnnaBridge 146:22da6e220af6 978 */
AnnaBridge 146:22da6e220af6 979 #if defined(RCC_PLLI2SCFGR_PLLI2SM)
AnnaBridge 146:22da6e220af6 980 #define LL_RCC_PLLI2SM_DIV_2 (RCC_PLLI2SCFGR_PLLI2SM_1) /*!< PLLI2S division factor for PLLI2SM output by 2 */
AnnaBridge 146:22da6e220af6 981 #define LL_RCC_PLLI2SM_DIV_3 (RCC_PLLI2SCFGR_PLLI2SM_1 | RCC_PLLI2SCFGR_PLLI2SM_0) /*!< PLLI2S division factor for PLLI2SM output by 3 */
AnnaBridge 146:22da6e220af6 982 #define LL_RCC_PLLI2SM_DIV_4 (RCC_PLLI2SCFGR_PLLI2SM_2) /*!< PLLI2S division factor for PLLI2SM output by 4 */
AnnaBridge 146:22da6e220af6 983 #define LL_RCC_PLLI2SM_DIV_5 (RCC_PLLI2SCFGR_PLLI2SM_2 | RCC_PLLI2SCFGR_PLLI2SM_0) /*!< PLLI2S division factor for PLLI2SM output by 5 */
AnnaBridge 146:22da6e220af6 984 #define LL_RCC_PLLI2SM_DIV_6 (RCC_PLLI2SCFGR_PLLI2SM_2 | RCC_PLLI2SCFGR_PLLI2SM_1) /*!< PLLI2S division factor for PLLI2SM output by 6 */
AnnaBridge 146:22da6e220af6 985 #define LL_RCC_PLLI2SM_DIV_7 (RCC_PLLI2SCFGR_PLLI2SM_2 | RCC_PLLI2SCFGR_PLLI2SM_1 | RCC_PLLI2SCFGR_PLLI2SM_0) /*!< PLLI2S division factor for PLLI2SM output by 7 */
AnnaBridge 146:22da6e220af6 986 #define LL_RCC_PLLI2SM_DIV_8 (RCC_PLLI2SCFGR_PLLI2SM_3) /*!< PLLI2S division factor for PLLI2SM output by 8 */
AnnaBridge 146:22da6e220af6 987 #define LL_RCC_PLLI2SM_DIV_9 (RCC_PLLI2SCFGR_PLLI2SM_3 | RCC_PLLI2SCFGR_PLLI2SM_0) /*!< PLLI2S division factor for PLLI2SM output by 9 */
AnnaBridge 146:22da6e220af6 988 #define LL_RCC_PLLI2SM_DIV_10 (RCC_PLLI2SCFGR_PLLI2SM_3 | RCC_PLLI2SCFGR_PLLI2SM_1) /*!< PLLI2S division factor for PLLI2SM output by 10 */
AnnaBridge 146:22da6e220af6 989 #define LL_RCC_PLLI2SM_DIV_11 (RCC_PLLI2SCFGR_PLLI2SM_3 | RCC_PLLI2SCFGR_PLLI2SM_1 | RCC_PLLI2SCFGR_PLLI2SM_0) /*!< PLLI2S division factor for PLLI2SM output by 11 */
AnnaBridge 146:22da6e220af6 990 #define LL_RCC_PLLI2SM_DIV_12 (RCC_PLLI2SCFGR_PLLI2SM_3 | RCC_PLLI2SCFGR_PLLI2SM_2) /*!< PLLI2S division factor for PLLI2SM output by 12 */
AnnaBridge 146:22da6e220af6 991 #define LL_RCC_PLLI2SM_DIV_13 (RCC_PLLI2SCFGR_PLLI2SM_3 | RCC_PLLI2SCFGR_PLLI2SM_2 | RCC_PLLI2SCFGR_PLLI2SM_0) /*!< PLLI2S division factor for PLLI2SM output by 13 */
AnnaBridge 146:22da6e220af6 992 #define LL_RCC_PLLI2SM_DIV_14 (RCC_PLLI2SCFGR_PLLI2SM_3 | RCC_PLLI2SCFGR_PLLI2SM_2 | RCC_PLLI2SCFGR_PLLI2SM_1) /*!< PLLI2S division factor for PLLI2SM output by 14 */
AnnaBridge 146:22da6e220af6 993 #define LL_RCC_PLLI2SM_DIV_15 (RCC_PLLI2SCFGR_PLLI2SM_3 | RCC_PLLI2SCFGR_PLLI2SM_2 | RCC_PLLI2SCFGR_PLLI2SM_1 | RCC_PLLI2SCFGR_PLLI2SM_0) /*!< PLLI2S division factor for PLLI2SM output by 15 */
AnnaBridge 146:22da6e220af6 994 #define LL_RCC_PLLI2SM_DIV_16 (RCC_PLLI2SCFGR_PLLI2SM_4) /*!< PLLI2S division factor for PLLI2SM output by 16 */
AnnaBridge 146:22da6e220af6 995 #define LL_RCC_PLLI2SM_DIV_17 (RCC_PLLI2SCFGR_PLLI2SM_4 | RCC_PLLI2SCFGR_PLLI2SM_0) /*!< PLLI2S division factor for PLLI2SM output by 17 */
AnnaBridge 146:22da6e220af6 996 #define LL_RCC_PLLI2SM_DIV_18 (RCC_PLLI2SCFGR_PLLI2SM_4 | RCC_PLLI2SCFGR_PLLI2SM_1) /*!< PLLI2S division factor for PLLI2SM output by 18 */
AnnaBridge 146:22da6e220af6 997 #define LL_RCC_PLLI2SM_DIV_19 (RCC_PLLI2SCFGR_PLLI2SM_4 | RCC_PLLI2SCFGR_PLLI2SM_1 | RCC_PLLI2SCFGR_PLLI2SM_0) /*!< PLLI2S division factor for PLLI2SM output by 19 */
AnnaBridge 146:22da6e220af6 998 #define LL_RCC_PLLI2SM_DIV_20 (RCC_PLLI2SCFGR_PLLI2SM_4 | RCC_PLLI2SCFGR_PLLI2SM_2) /*!< PLLI2S division factor for PLLI2SM output by 20 */
AnnaBridge 146:22da6e220af6 999 #define LL_RCC_PLLI2SM_DIV_21 (RCC_PLLI2SCFGR_PLLI2SM_4 | RCC_PLLI2SCFGR_PLLI2SM_2 | RCC_PLLI2SCFGR_PLLI2SM_0) /*!< PLLI2S division factor for PLLI2SM output by 21 */
AnnaBridge 146:22da6e220af6 1000 #define LL_RCC_PLLI2SM_DIV_22 (RCC_PLLI2SCFGR_PLLI2SM_4 | RCC_PLLI2SCFGR_PLLI2SM_2 | RCC_PLLI2SCFGR_PLLI2SM_1) /*!< PLLI2S division factor for PLLI2SM output by 22 */
AnnaBridge 146:22da6e220af6 1001 #define LL_RCC_PLLI2SM_DIV_23 (RCC_PLLI2SCFGR_PLLI2SM_4 | RCC_PLLI2SCFGR_PLLI2SM_2 | RCC_PLLI2SCFGR_PLLI2SM_1 | RCC_PLLI2SCFGR_PLLI2SM_0) /*!< PLLI2S division factor for PLLI2SM output by 23 */
AnnaBridge 146:22da6e220af6 1002 #define LL_RCC_PLLI2SM_DIV_24 (RCC_PLLI2SCFGR_PLLI2SM_4 | RCC_PLLI2SCFGR_PLLI2SM_3) /*!< PLLI2S division factor for PLLI2SM output by 24 */
AnnaBridge 146:22da6e220af6 1003 #define LL_RCC_PLLI2SM_DIV_25 (RCC_PLLI2SCFGR_PLLI2SM_4 | RCC_PLLI2SCFGR_PLLI2SM_3 | RCC_PLLI2SCFGR_PLLI2SM_0) /*!< PLLI2S division factor for PLLI2SM output by 25 */
AnnaBridge 146:22da6e220af6 1004 #define LL_RCC_PLLI2SM_DIV_26 (RCC_PLLI2SCFGR_PLLI2SM_4 | RCC_PLLI2SCFGR_PLLI2SM_3 | RCC_PLLI2SCFGR_PLLI2SM_1) /*!< PLLI2S division factor for PLLI2SM output by 26 */
AnnaBridge 146:22da6e220af6 1005 #define LL_RCC_PLLI2SM_DIV_27 (RCC_PLLI2SCFGR_PLLI2SM_4 | RCC_PLLI2SCFGR_PLLI2SM_3 | RCC_PLLI2SCFGR_PLLI2SM_1 | RCC_PLLI2SCFGR_PLLI2SM_0) /*!< PLLI2S division factor for PLLI2SM output by 27 */
AnnaBridge 146:22da6e220af6 1006 #define LL_RCC_PLLI2SM_DIV_28 (RCC_PLLI2SCFGR_PLLI2SM_4 | RCC_PLLI2SCFGR_PLLI2SM_3 | RCC_PLLI2SCFGR_PLLI2SM_2) /*!< PLLI2S division factor for PLLI2SM output by 28 */
AnnaBridge 146:22da6e220af6 1007 #define LL_RCC_PLLI2SM_DIV_29 (RCC_PLLI2SCFGR_PLLI2SM_4 | RCC_PLLI2SCFGR_PLLI2SM_3 | RCC_PLLI2SCFGR_PLLI2SM_2 | RCC_PLLI2SCFGR_PLLI2SM_0) /*!< PLLI2S division factor for PLLI2SM output by 29 */
AnnaBridge 146:22da6e220af6 1008 #define LL_RCC_PLLI2SM_DIV_30 (RCC_PLLI2SCFGR_PLLI2SM_4 | RCC_PLLI2SCFGR_PLLI2SM_3 | RCC_PLLI2SCFGR_PLLI2SM_2 | RCC_PLLI2SCFGR_PLLI2SM_1) /*!< PLLI2S division factor for PLLI2SM output by 30 */
AnnaBridge 146:22da6e220af6 1009 #define LL_RCC_PLLI2SM_DIV_31 (RCC_PLLI2SCFGR_PLLI2SM_4 | RCC_PLLI2SCFGR_PLLI2SM_3 | RCC_PLLI2SCFGR_PLLI2SM_2 | RCC_PLLI2SCFGR_PLLI2SM_1 | RCC_PLLI2SCFGR_PLLI2SM_0) /*!< PLLI2S division factor for PLLI2SM output by 31 */
AnnaBridge 146:22da6e220af6 1010 #define LL_RCC_PLLI2SM_DIV_32 (RCC_PLLI2SCFGR_PLLI2SM_5) /*!< PLLI2S division factor for PLLI2SM output by 32 */
AnnaBridge 146:22da6e220af6 1011 #define LL_RCC_PLLI2SM_DIV_33 (RCC_PLLI2SCFGR_PLLI2SM_5 | RCC_PLLI2SCFGR_PLLI2SM_0) /*!< PLLI2S division factor for PLLI2SM output by 33 */
AnnaBridge 146:22da6e220af6 1012 #define LL_RCC_PLLI2SM_DIV_34 (RCC_PLLI2SCFGR_PLLI2SM_5 | RCC_PLLI2SCFGR_PLLI2SM_1) /*!< PLLI2S division factor for PLLI2SM output by 34 */
AnnaBridge 146:22da6e220af6 1013 #define LL_RCC_PLLI2SM_DIV_35 (RCC_PLLI2SCFGR_PLLI2SM_5 | RCC_PLLI2SCFGR_PLLI2SM_1 | RCC_PLLI2SCFGR_PLLI2SM_0) /*!< PLLI2S division factor for PLLI2SM output by 35 */
AnnaBridge 146:22da6e220af6 1014 #define LL_RCC_PLLI2SM_DIV_36 (RCC_PLLI2SCFGR_PLLI2SM_5 | RCC_PLLI2SCFGR_PLLI2SM_2) /*!< PLLI2S division factor for PLLI2SM output by 36 */
AnnaBridge 146:22da6e220af6 1015 #define LL_RCC_PLLI2SM_DIV_37 (RCC_PLLI2SCFGR_PLLI2SM_5 | RCC_PLLI2SCFGR_PLLI2SM_2 | RCC_PLLI2SCFGR_PLLI2SM_0) /*!< PLLI2S division factor for PLLI2SM output by 37 */
AnnaBridge 146:22da6e220af6 1016 #define LL_RCC_PLLI2SM_DIV_38 (RCC_PLLI2SCFGR_PLLI2SM_5 | RCC_PLLI2SCFGR_PLLI2SM_2 | RCC_PLLI2SCFGR_PLLI2SM_1) /*!< PLLI2S division factor for PLLI2SM output by 38 */
AnnaBridge 146:22da6e220af6 1017 #define LL_RCC_PLLI2SM_DIV_39 (RCC_PLLI2SCFGR_PLLI2SM_5 | RCC_PLLI2SCFGR_PLLI2SM_2 | RCC_PLLI2SCFGR_PLLI2SM_1 | RCC_PLLI2SCFGR_PLLI2SM_0) /*!< PLLI2S division factor for PLLI2SM output by 39 */
AnnaBridge 146:22da6e220af6 1018 #define LL_RCC_PLLI2SM_DIV_40 (RCC_PLLI2SCFGR_PLLI2SM_5 | RCC_PLLI2SCFGR_PLLI2SM_3) /*!< PLLI2S division factor for PLLI2SM output by 40 */
AnnaBridge 146:22da6e220af6 1019 #define LL_RCC_PLLI2SM_DIV_41 (RCC_PLLI2SCFGR_PLLI2SM_5 | RCC_PLLI2SCFGR_PLLI2SM_3 | RCC_PLLI2SCFGR_PLLI2SM_0) /*!< PLLI2S division factor for PLLI2SM output by 41 */
AnnaBridge 146:22da6e220af6 1020 #define LL_RCC_PLLI2SM_DIV_42 (RCC_PLLI2SCFGR_PLLI2SM_5 | RCC_PLLI2SCFGR_PLLI2SM_3 | RCC_PLLI2SCFGR_PLLI2SM_1) /*!< PLLI2S division factor for PLLI2SM output by 42 */
AnnaBridge 146:22da6e220af6 1021 #define LL_RCC_PLLI2SM_DIV_43 (RCC_PLLI2SCFGR_PLLI2SM_5 | RCC_PLLI2SCFGR_PLLI2SM_3 | RCC_PLLI2SCFGR_PLLI2SM_1 | RCC_PLLI2SCFGR_PLLI2SM_0) /*!< PLLI2S division factor for PLLI2SM output by 43 */
AnnaBridge 146:22da6e220af6 1022 #define LL_RCC_PLLI2SM_DIV_44 (RCC_PLLI2SCFGR_PLLI2SM_5 | RCC_PLLI2SCFGR_PLLI2SM_3 | RCC_PLLI2SCFGR_PLLI2SM_2) /*!< PLLI2S division factor for PLLI2SM output by 44 */
AnnaBridge 146:22da6e220af6 1023 #define LL_RCC_PLLI2SM_DIV_45 (RCC_PLLI2SCFGR_PLLI2SM_5 | RCC_PLLI2SCFGR_PLLI2SM_3 | RCC_PLLI2SCFGR_PLLI2SM_2 | RCC_PLLI2SCFGR_PLLI2SM_0) /*!< PLLI2S division factor for PLLI2SM output by 45 */
AnnaBridge 146:22da6e220af6 1024 #define LL_RCC_PLLI2SM_DIV_46 (RCC_PLLI2SCFGR_PLLI2SM_5 | RCC_PLLI2SCFGR_PLLI2SM_3 | RCC_PLLI2SCFGR_PLLI2SM_2 | RCC_PLLI2SCFGR_PLLI2SM_1) /*!< PLLI2S division factor for PLLI2SM output by 46 */
AnnaBridge 146:22da6e220af6 1025 #define LL_RCC_PLLI2SM_DIV_47 (RCC_PLLI2SCFGR_PLLI2SM_5 | RCC_PLLI2SCFGR_PLLI2SM_3 | RCC_PLLI2SCFGR_PLLI2SM_2 | RCC_PLLI2SCFGR_PLLI2SM_1 | RCC_PLLI2SCFGR_PLLI2SM_0) /*!< PLLI2S division factor for PLLI2SM output by 47 */
AnnaBridge 146:22da6e220af6 1026 #define LL_RCC_PLLI2SM_DIV_48 (RCC_PLLI2SCFGR_PLLI2SM_5 | RCC_PLLI2SCFGR_PLLI2SM_4) /*!< PLLI2S division factor for PLLI2SM output by 48 */
AnnaBridge 146:22da6e220af6 1027 #define LL_RCC_PLLI2SM_DIV_49 (RCC_PLLI2SCFGR_PLLI2SM_5 | RCC_PLLI2SCFGR_PLLI2SM_4 | RCC_PLLI2SCFGR_PLLI2SM_0) /*!< PLLI2S division factor for PLLI2SM output by 49 */
AnnaBridge 146:22da6e220af6 1028 #define LL_RCC_PLLI2SM_DIV_50 (RCC_PLLI2SCFGR_PLLI2SM_5 | RCC_PLLI2SCFGR_PLLI2SM_4 | RCC_PLLI2SCFGR_PLLI2SM_1) /*!< PLLI2S division factor for PLLI2SM output by 50 */
AnnaBridge 146:22da6e220af6 1029 #define LL_RCC_PLLI2SM_DIV_51 (RCC_PLLI2SCFGR_PLLI2SM_5 | RCC_PLLI2SCFGR_PLLI2SM_4 | RCC_PLLI2SCFGR_PLLI2SM_1 | RCC_PLLI2SCFGR_PLLI2SM_0) /*!< PLLI2S division factor for PLLI2SM output by 51 */
AnnaBridge 146:22da6e220af6 1030 #define LL_RCC_PLLI2SM_DIV_52 (RCC_PLLI2SCFGR_PLLI2SM_5 | RCC_PLLI2SCFGR_PLLI2SM_4 | RCC_PLLI2SCFGR_PLLI2SM_2) /*!< PLLI2S division factor for PLLI2SM output by 52 */
AnnaBridge 146:22da6e220af6 1031 #define LL_RCC_PLLI2SM_DIV_53 (RCC_PLLI2SCFGR_PLLI2SM_5 | RCC_PLLI2SCFGR_PLLI2SM_4 | RCC_PLLI2SCFGR_PLLI2SM_2 | RCC_PLLI2SCFGR_PLLI2SM_0) /*!< PLLI2S division factor for PLLI2SM output by 53 */
AnnaBridge 146:22da6e220af6 1032 #define LL_RCC_PLLI2SM_DIV_54 (RCC_PLLI2SCFGR_PLLI2SM_5 | RCC_PLLI2SCFGR_PLLI2SM_4 | RCC_PLLI2SCFGR_PLLI2SM_2 | RCC_PLLI2SCFGR_PLLI2SM_1) /*!< PLLI2S division factor for PLLI2SM output by 54 */
AnnaBridge 146:22da6e220af6 1033 #define LL_RCC_PLLI2SM_DIV_55 (RCC_PLLI2SCFGR_PLLI2SM_5 | RCC_PLLI2SCFGR_PLLI2SM_4 | RCC_PLLI2SCFGR_PLLI2SM_2 | RCC_PLLI2SCFGR_PLLI2SM_1 | RCC_PLLI2SCFGR_PLLI2SM_0) /*!< PLLI2S division factor for PLLI2SM output by 55 */
AnnaBridge 146:22da6e220af6 1034 #define LL_RCC_PLLI2SM_DIV_56 (RCC_PLLI2SCFGR_PLLI2SM_5 | RCC_PLLI2SCFGR_PLLI2SM_4 | RCC_PLLI2SCFGR_PLLI2SM_3) /*!< PLLI2S division factor for PLLI2SM output by 56 */
AnnaBridge 146:22da6e220af6 1035 #define LL_RCC_PLLI2SM_DIV_57 (RCC_PLLI2SCFGR_PLLI2SM_5 | RCC_PLLI2SCFGR_PLLI2SM_4 | RCC_PLLI2SCFGR_PLLI2SM_3 | RCC_PLLI2SCFGR_PLLI2SM_0) /*!< PLLI2S division factor for PLLI2SM output by 57 */
AnnaBridge 146:22da6e220af6 1036 #define LL_RCC_PLLI2SM_DIV_58 (RCC_PLLI2SCFGR_PLLI2SM_5 | RCC_PLLI2SCFGR_PLLI2SM_4 | RCC_PLLI2SCFGR_PLLI2SM_3 | RCC_PLLI2SCFGR_PLLI2SM_1) /*!< PLLI2S division factor for PLLI2SM output by 58 */
AnnaBridge 146:22da6e220af6 1037 #define LL_RCC_PLLI2SM_DIV_59 (RCC_PLLI2SCFGR_PLLI2SM_5 | RCC_PLLI2SCFGR_PLLI2SM_4 | RCC_PLLI2SCFGR_PLLI2SM_3 | RCC_PLLI2SCFGR_PLLI2SM_1 | RCC_PLLI2SCFGR_PLLI2SM_0) /*!< PLLI2S division factor for PLLI2SM output by 59 */
AnnaBridge 146:22da6e220af6 1038 #define LL_RCC_PLLI2SM_DIV_60 (RCC_PLLI2SCFGR_PLLI2SM_5 | RCC_PLLI2SCFGR_PLLI2SM_4 | RCC_PLLI2SCFGR_PLLI2SM_3 | RCC_PLLI2SCFGR_PLLI2SM_2) /*!< PLLI2S division factor for PLLI2SM output by 60 */
AnnaBridge 146:22da6e220af6 1039 #define LL_RCC_PLLI2SM_DIV_61 (RCC_PLLI2SCFGR_PLLI2SM_5 | RCC_PLLI2SCFGR_PLLI2SM_4 | RCC_PLLI2SCFGR_PLLI2SM_3 | RCC_PLLI2SCFGR_PLLI2SM_2 | RCC_PLLI2SCFGR_PLLI2SM_0) /*!< PLLI2S division factor for PLLI2SM output by 61 */
AnnaBridge 146:22da6e220af6 1040 #define LL_RCC_PLLI2SM_DIV_62 (RCC_PLLI2SCFGR_PLLI2SM_5 | RCC_PLLI2SCFGR_PLLI2SM_4 | RCC_PLLI2SCFGR_PLLI2SM_3 | RCC_PLLI2SCFGR_PLLI2SM_2 | RCC_PLLI2SCFGR_PLLI2SM_1) /*!< PLLI2S division factor for PLLI2SM output by 62 */
AnnaBridge 146:22da6e220af6 1041 #define LL_RCC_PLLI2SM_DIV_63 (RCC_PLLI2SCFGR_PLLI2SM_5 | RCC_PLLI2SCFGR_PLLI2SM_4 | RCC_PLLI2SCFGR_PLLI2SM_3 | RCC_PLLI2SCFGR_PLLI2SM_2 | RCC_PLLI2SCFGR_PLLI2SM_1 | RCC_PLLI2SCFGR_PLLI2SM_0) /*!< PLLI2S division factor for PLLI2SM output by 63 */
AnnaBridge 146:22da6e220af6 1042 #else
AnnaBridge 146:22da6e220af6 1043 #define LL_RCC_PLLI2SM_DIV_2 LL_RCC_PLLM_DIV_2 /*!< PLLI2S division factor for PLLI2SM output by 2 */
AnnaBridge 146:22da6e220af6 1044 #define LL_RCC_PLLI2SM_DIV_3 LL_RCC_PLLM_DIV_3 /*!< PLLI2S division factor for PLLI2SM output by 3 */
AnnaBridge 146:22da6e220af6 1045 #define LL_RCC_PLLI2SM_DIV_4 LL_RCC_PLLM_DIV_4 /*!< PLLI2S division factor for PLLI2SM output by 4 */
AnnaBridge 146:22da6e220af6 1046 #define LL_RCC_PLLI2SM_DIV_5 LL_RCC_PLLM_DIV_5 /*!< PLLI2S division factor for PLLI2SM output by 5 */
AnnaBridge 146:22da6e220af6 1047 #define LL_RCC_PLLI2SM_DIV_6 LL_RCC_PLLM_DIV_6 /*!< PLLI2S division factor for PLLI2SM output by 6 */
AnnaBridge 146:22da6e220af6 1048 #define LL_RCC_PLLI2SM_DIV_7 LL_RCC_PLLM_DIV_7 /*!< PLLI2S division factor for PLLI2SM output by 7 */
AnnaBridge 146:22da6e220af6 1049 #define LL_RCC_PLLI2SM_DIV_8 LL_RCC_PLLM_DIV_8 /*!< PLLI2S division factor for PLLI2SM output by 8 */
AnnaBridge 146:22da6e220af6 1050 #define LL_RCC_PLLI2SM_DIV_9 LL_RCC_PLLM_DIV_9 /*!< PLLI2S division factor for PLLI2SM output by 9 */
AnnaBridge 146:22da6e220af6 1051 #define LL_RCC_PLLI2SM_DIV_10 LL_RCC_PLLM_DIV_10 /*!< PLLI2S division factor for PLLI2SM output by 10 */
AnnaBridge 146:22da6e220af6 1052 #define LL_RCC_PLLI2SM_DIV_11 LL_RCC_PLLM_DIV_11 /*!< PLLI2S division factor for PLLI2SM output by 11 */
AnnaBridge 146:22da6e220af6 1053 #define LL_RCC_PLLI2SM_DIV_12 LL_RCC_PLLM_DIV_12 /*!< PLLI2S division factor for PLLI2SM output by 12 */
AnnaBridge 146:22da6e220af6 1054 #define LL_RCC_PLLI2SM_DIV_13 LL_RCC_PLLM_DIV_13 /*!< PLLI2S division factor for PLLI2SM output by 13 */
AnnaBridge 146:22da6e220af6 1055 #define LL_RCC_PLLI2SM_DIV_14 LL_RCC_PLLM_DIV_14 /*!< PLLI2S division factor for PLLI2SM output by 14 */
AnnaBridge 146:22da6e220af6 1056 #define LL_RCC_PLLI2SM_DIV_15 LL_RCC_PLLM_DIV_15 /*!< PLLI2S division factor for PLLI2SM output by 15 */
AnnaBridge 146:22da6e220af6 1057 #define LL_RCC_PLLI2SM_DIV_16 LL_RCC_PLLM_DIV_16 /*!< PLLI2S division factor for PLLI2SM output by 16 */
AnnaBridge 146:22da6e220af6 1058 #define LL_RCC_PLLI2SM_DIV_17 LL_RCC_PLLM_DIV_17 /*!< PLLI2S division factor for PLLI2SM output by 17 */
AnnaBridge 146:22da6e220af6 1059 #define LL_RCC_PLLI2SM_DIV_18 LL_RCC_PLLM_DIV_18 /*!< PLLI2S division factor for PLLI2SM output by 18 */
AnnaBridge 146:22da6e220af6 1060 #define LL_RCC_PLLI2SM_DIV_19 LL_RCC_PLLM_DIV_19 /*!< PLLI2S division factor for PLLI2SM output by 19 */
AnnaBridge 146:22da6e220af6 1061 #define LL_RCC_PLLI2SM_DIV_20 LL_RCC_PLLM_DIV_20 /*!< PLLI2S division factor for PLLI2SM output by 20 */
AnnaBridge 146:22da6e220af6 1062 #define LL_RCC_PLLI2SM_DIV_21 LL_RCC_PLLM_DIV_21 /*!< PLLI2S division factor for PLLI2SM output by 21 */
AnnaBridge 146:22da6e220af6 1063 #define LL_RCC_PLLI2SM_DIV_22 LL_RCC_PLLM_DIV_22 /*!< PLLI2S division factor for PLLI2SM output by 22 */
AnnaBridge 146:22da6e220af6 1064 #define LL_RCC_PLLI2SM_DIV_23 LL_RCC_PLLM_DIV_23 /*!< PLLI2S division factor for PLLI2SM output by 23 */
AnnaBridge 146:22da6e220af6 1065 #define LL_RCC_PLLI2SM_DIV_24 LL_RCC_PLLM_DIV_24 /*!< PLLI2S division factor for PLLI2SM output by 24 */
AnnaBridge 146:22da6e220af6 1066 #define LL_RCC_PLLI2SM_DIV_25 LL_RCC_PLLM_DIV_25 /*!< PLLI2S division factor for PLLI2SM output by 25 */
AnnaBridge 146:22da6e220af6 1067 #define LL_RCC_PLLI2SM_DIV_26 LL_RCC_PLLM_DIV_26 /*!< PLLI2S division factor for PLLI2SM output by 26 */
AnnaBridge 146:22da6e220af6 1068 #define LL_RCC_PLLI2SM_DIV_27 LL_RCC_PLLM_DIV_27 /*!< PLLI2S division factor for PLLI2SM output by 27 */
AnnaBridge 146:22da6e220af6 1069 #define LL_RCC_PLLI2SM_DIV_28 LL_RCC_PLLM_DIV_28 /*!< PLLI2S division factor for PLLI2SM output by 28 */
AnnaBridge 146:22da6e220af6 1070 #define LL_RCC_PLLI2SM_DIV_29 LL_RCC_PLLM_DIV_29 /*!< PLLI2S division factor for PLLI2SM output by 29 */
AnnaBridge 146:22da6e220af6 1071 #define LL_RCC_PLLI2SM_DIV_30 LL_RCC_PLLM_DIV_30 /*!< PLLI2S division factor for PLLI2SM output by 30 */
AnnaBridge 146:22da6e220af6 1072 #define LL_RCC_PLLI2SM_DIV_31 LL_RCC_PLLM_DIV_31 /*!< PLLI2S division factor for PLLI2SM output by 31 */
AnnaBridge 146:22da6e220af6 1073 #define LL_RCC_PLLI2SM_DIV_32 LL_RCC_PLLM_DIV_32 /*!< PLLI2S division factor for PLLI2SM output by 32 */
AnnaBridge 146:22da6e220af6 1074 #define LL_RCC_PLLI2SM_DIV_33 LL_RCC_PLLM_DIV_33 /*!< PLLI2S division factor for PLLI2SM output by 33 */
AnnaBridge 146:22da6e220af6 1075 #define LL_RCC_PLLI2SM_DIV_34 LL_RCC_PLLM_DIV_34 /*!< PLLI2S division factor for PLLI2SM output by 34 */
AnnaBridge 146:22da6e220af6 1076 #define LL_RCC_PLLI2SM_DIV_35 LL_RCC_PLLM_DIV_35 /*!< PLLI2S division factor for PLLI2SM output by 35 */
AnnaBridge 146:22da6e220af6 1077 #define LL_RCC_PLLI2SM_DIV_36 LL_RCC_PLLM_DIV_36 /*!< PLLI2S division factor for PLLI2SM output by 36 */
AnnaBridge 146:22da6e220af6 1078 #define LL_RCC_PLLI2SM_DIV_37 LL_RCC_PLLM_DIV_37 /*!< PLLI2S division factor for PLLI2SM output by 37 */
AnnaBridge 146:22da6e220af6 1079 #define LL_RCC_PLLI2SM_DIV_38 LL_RCC_PLLM_DIV_38 /*!< PLLI2S division factor for PLLI2SM output by 38 */
AnnaBridge 146:22da6e220af6 1080 #define LL_RCC_PLLI2SM_DIV_39 LL_RCC_PLLM_DIV_39 /*!< PLLI2S division factor for PLLI2SM output by 39 */
AnnaBridge 146:22da6e220af6 1081 #define LL_RCC_PLLI2SM_DIV_40 LL_RCC_PLLM_DIV_40 /*!< PLLI2S division factor for PLLI2SM output by 40 */
AnnaBridge 146:22da6e220af6 1082 #define LL_RCC_PLLI2SM_DIV_41 LL_RCC_PLLM_DIV_41 /*!< PLLI2S division factor for PLLI2SM output by 41 */
AnnaBridge 146:22da6e220af6 1083 #define LL_RCC_PLLI2SM_DIV_42 LL_RCC_PLLM_DIV_42 /*!< PLLI2S division factor for PLLI2SM output by 42 */
AnnaBridge 146:22da6e220af6 1084 #define LL_RCC_PLLI2SM_DIV_43 LL_RCC_PLLM_DIV_43 /*!< PLLI2S division factor for PLLI2SM output by 43 */
AnnaBridge 146:22da6e220af6 1085 #define LL_RCC_PLLI2SM_DIV_44 LL_RCC_PLLM_DIV_44 /*!< PLLI2S division factor for PLLI2SM output by 44 */
AnnaBridge 146:22da6e220af6 1086 #define LL_RCC_PLLI2SM_DIV_45 LL_RCC_PLLM_DIV_45 /*!< PLLI2S division factor for PLLI2SM output by 45 */
AnnaBridge 146:22da6e220af6 1087 #define LL_RCC_PLLI2SM_DIV_46 LL_RCC_PLLM_DIV_46 /*!< PLLI2S division factor for PLLI2SM output by 46 */
AnnaBridge 146:22da6e220af6 1088 #define LL_RCC_PLLI2SM_DIV_47 LL_RCC_PLLM_DIV_47 /*!< PLLI2S division factor for PLLI2SM output by 47 */
AnnaBridge 146:22da6e220af6 1089 #define LL_RCC_PLLI2SM_DIV_48 LL_RCC_PLLM_DIV_48 /*!< PLLI2S division factor for PLLI2SM output by 48 */
AnnaBridge 146:22da6e220af6 1090 #define LL_RCC_PLLI2SM_DIV_49 LL_RCC_PLLM_DIV_49 /*!< PLLI2S division factor for PLLI2SM output by 49 */
AnnaBridge 146:22da6e220af6 1091 #define LL_RCC_PLLI2SM_DIV_50 LL_RCC_PLLM_DIV_50 /*!< PLLI2S division factor for PLLI2SM output by 50 */
AnnaBridge 146:22da6e220af6 1092 #define LL_RCC_PLLI2SM_DIV_51 LL_RCC_PLLM_DIV_51 /*!< PLLI2S division factor for PLLI2SM output by 51 */
AnnaBridge 146:22da6e220af6 1093 #define LL_RCC_PLLI2SM_DIV_52 LL_RCC_PLLM_DIV_52 /*!< PLLI2S division factor for PLLI2SM output by 52 */
AnnaBridge 146:22da6e220af6 1094 #define LL_RCC_PLLI2SM_DIV_53 LL_RCC_PLLM_DIV_53 /*!< PLLI2S division factor for PLLI2SM output by 53 */
AnnaBridge 146:22da6e220af6 1095 #define LL_RCC_PLLI2SM_DIV_54 LL_RCC_PLLM_DIV_54 /*!< PLLI2S division factor for PLLI2SM output by 54 */
AnnaBridge 146:22da6e220af6 1096 #define LL_RCC_PLLI2SM_DIV_55 LL_RCC_PLLM_DIV_55 /*!< PLLI2S division factor for PLLI2SM output by 55 */
AnnaBridge 146:22da6e220af6 1097 #define LL_RCC_PLLI2SM_DIV_56 LL_RCC_PLLM_DIV_56 /*!< PLLI2S division factor for PLLI2SM output by 56 */
AnnaBridge 146:22da6e220af6 1098 #define LL_RCC_PLLI2SM_DIV_57 LL_RCC_PLLM_DIV_57 /*!< PLLI2S division factor for PLLI2SM output by 57 */
AnnaBridge 146:22da6e220af6 1099 #define LL_RCC_PLLI2SM_DIV_58 LL_RCC_PLLM_DIV_58 /*!< PLLI2S division factor for PLLI2SM output by 58 */
AnnaBridge 146:22da6e220af6 1100 #define LL_RCC_PLLI2SM_DIV_59 LL_RCC_PLLM_DIV_59 /*!< PLLI2S division factor for PLLI2SM output by 59 */
AnnaBridge 146:22da6e220af6 1101 #define LL_RCC_PLLI2SM_DIV_60 LL_RCC_PLLM_DIV_60 /*!< PLLI2S division factor for PLLI2SM output by 60 */
AnnaBridge 146:22da6e220af6 1102 #define LL_RCC_PLLI2SM_DIV_61 LL_RCC_PLLM_DIV_61 /*!< PLLI2S division factor for PLLI2SM output by 61 */
AnnaBridge 146:22da6e220af6 1103 #define LL_RCC_PLLI2SM_DIV_62 LL_RCC_PLLM_DIV_62 /*!< PLLI2S division factor for PLLI2SM output by 62 */
AnnaBridge 146:22da6e220af6 1104 #define LL_RCC_PLLI2SM_DIV_63 LL_RCC_PLLM_DIV_63 /*!< PLLI2S division factor for PLLI2SM output by 63 */
AnnaBridge 146:22da6e220af6 1105 #endif /* RCC_PLLI2SCFGR_PLLI2SM */
AnnaBridge 146:22da6e220af6 1106 /**
AnnaBridge 146:22da6e220af6 1107 * @}
AnnaBridge 146:22da6e220af6 1108 */
AnnaBridge 146:22da6e220af6 1109
AnnaBridge 146:22da6e220af6 1110 #if defined(RCC_PLLI2SCFGR_PLLI2SQ)
AnnaBridge 146:22da6e220af6 1111 /** @defgroup RCC_LL_EC_PLLI2SQ PLLI2SQ division factor (PLLI2SQ)
AnnaBridge 146:22da6e220af6 1112 * @{
AnnaBridge 146:22da6e220af6 1113 */
AnnaBridge 146:22da6e220af6 1114 #define LL_RCC_PLLI2SQ_DIV_2 RCC_PLLI2SCFGR_PLLI2SQ_1 /*!< PLLI2S division factor for PLLI2SQ output by 2 */
AnnaBridge 146:22da6e220af6 1115 #define LL_RCC_PLLI2SQ_DIV_3 (RCC_PLLI2SCFGR_PLLI2SQ_1 | RCC_PLLI2SCFGR_PLLI2SQ_0) /*!< PLLI2S division factor for PLLI2SQ output by 3 */
AnnaBridge 146:22da6e220af6 1116 #define LL_RCC_PLLI2SQ_DIV_4 RCC_PLLI2SCFGR_PLLI2SQ_2 /*!< PLLI2S division factor for PLLI2SQ output by 4 */
AnnaBridge 146:22da6e220af6 1117 #define LL_RCC_PLLI2SQ_DIV_5 (RCC_PLLI2SCFGR_PLLI2SQ_2 | RCC_PLLI2SCFGR_PLLI2SQ_0) /*!< PLLI2S division factor for PLLI2SQ output by 5 */
AnnaBridge 146:22da6e220af6 1118 #define LL_RCC_PLLI2SQ_DIV_6 (RCC_PLLI2SCFGR_PLLI2SQ_2 | RCC_PLLI2SCFGR_PLLI2SQ_1) /*!< PLLI2S division factor for PLLI2SQ output by 6 */
AnnaBridge 146:22da6e220af6 1119 #define LL_RCC_PLLI2SQ_DIV_7 (RCC_PLLI2SCFGR_PLLI2SQ_2 | RCC_PLLI2SCFGR_PLLI2SQ_1 | RCC_PLLI2SCFGR_PLLI2SQ_0) /*!< PLLI2S division factor for PLLI2SQ output by 7 */
AnnaBridge 146:22da6e220af6 1120 #define LL_RCC_PLLI2SQ_DIV_8 RCC_PLLI2SCFGR_PLLI2SQ_3 /*!< PLLI2S division factor for PLLI2SQ output by 8 */
AnnaBridge 146:22da6e220af6 1121 #define LL_RCC_PLLI2SQ_DIV_9 (RCC_PLLI2SCFGR_PLLI2SQ_3 | RCC_PLLI2SCFGR_PLLI2SQ_0) /*!< PLLI2S division factor for PLLI2SQ output by 9 */
AnnaBridge 146:22da6e220af6 1122 #define LL_RCC_PLLI2SQ_DIV_10 (RCC_PLLI2SCFGR_PLLI2SQ_3 | RCC_PLLI2SCFGR_PLLI2SQ_1) /*!< PLLI2S division factor for PLLI2SQ output by 10 */
AnnaBridge 146:22da6e220af6 1123 #define LL_RCC_PLLI2SQ_DIV_11 (RCC_PLLI2SCFGR_PLLI2SQ_3 | RCC_PLLI2SCFGR_PLLI2SQ_1 | RCC_PLLI2SCFGR_PLLI2SQ_0) /*!< PLLI2S division factor for PLLI2SQ output by 11 */
AnnaBridge 146:22da6e220af6 1124 #define LL_RCC_PLLI2SQ_DIV_12 (RCC_PLLI2SCFGR_PLLI2SQ_3 | RCC_PLLI2SCFGR_PLLI2SQ_2) /*!< PLLI2S division factor for PLLI2SQ output by 12 */
AnnaBridge 146:22da6e220af6 1125 #define LL_RCC_PLLI2SQ_DIV_13 (RCC_PLLI2SCFGR_PLLI2SQ_3 | RCC_PLLI2SCFGR_PLLI2SQ_2 | RCC_PLLI2SCFGR_PLLI2SQ_0) /*!< PLLI2S division factor for PLLI2SQ output by 13 */
AnnaBridge 146:22da6e220af6 1126 #define LL_RCC_PLLI2SQ_DIV_14 (RCC_PLLI2SCFGR_PLLI2SQ_3 | RCC_PLLI2SCFGR_PLLI2SQ_2 | RCC_PLLI2SCFGR_PLLI2SQ_1) /*!< PLLI2S division factor for PLLI2SQ output by 14 */
AnnaBridge 146:22da6e220af6 1127 #define LL_RCC_PLLI2SQ_DIV_15 (RCC_PLLI2SCFGR_PLLI2SQ_3 | RCC_PLLI2SCFGR_PLLI2SQ_2 | RCC_PLLI2SCFGR_PLLI2SQ_1 | RCC_PLLI2SCFGR_PLLI2SQ_0) /*!< PLLI2S division factor for PLLI2SQ output by 15 */
AnnaBridge 146:22da6e220af6 1128 /**
AnnaBridge 146:22da6e220af6 1129 * @}
AnnaBridge 146:22da6e220af6 1130 */
AnnaBridge 146:22da6e220af6 1131 #endif /* RCC_PLLI2SCFGR_PLLI2SQ */
AnnaBridge 146:22da6e220af6 1132
AnnaBridge 146:22da6e220af6 1133 #if defined(RCC_DCKCFGR_PLLI2SDIVQ)
AnnaBridge 146:22da6e220af6 1134 /** @defgroup RCC_LL_EC_PLLI2SDIVQ PLLI2SDIVQ division factor (PLLI2SDIVQ)
AnnaBridge 146:22da6e220af6 1135 * @{
AnnaBridge 146:22da6e220af6 1136 */
AnnaBridge 146:22da6e220af6 1137 #define LL_RCC_PLLI2SDIVQ_DIV_1 0x00000000U /*!< PLLI2S division factor for PLLI2SDIVQ output by 1 */
AnnaBridge 146:22da6e220af6 1138 #define LL_RCC_PLLI2SDIVQ_DIV_2 RCC_DCKCFGR_PLLI2SDIVQ_0 /*!< PLLI2S division factor for PLLI2SDIVQ output by 2 */
AnnaBridge 146:22da6e220af6 1139 #define LL_RCC_PLLI2SDIVQ_DIV_3 RCC_DCKCFGR_PLLI2SDIVQ_1 /*!< PLLI2S division factor for PLLI2SDIVQ output by 3 */
AnnaBridge 146:22da6e220af6 1140 #define LL_RCC_PLLI2SDIVQ_DIV_4 (RCC_DCKCFGR_PLLI2SDIVQ_1 | RCC_DCKCFGR_PLLI2SDIVQ_0) /*!< PLLI2S division factor for PLLI2SDIVQ output by 4 */
AnnaBridge 146:22da6e220af6 1141 #define LL_RCC_PLLI2SDIVQ_DIV_5 RCC_DCKCFGR_PLLI2SDIVQ_2 /*!< PLLI2S division factor for PLLI2SDIVQ output by 5 */
AnnaBridge 146:22da6e220af6 1142 #define LL_RCC_PLLI2SDIVQ_DIV_6 (RCC_DCKCFGR_PLLI2SDIVQ_2 | RCC_DCKCFGR_PLLI2SDIVQ_0) /*!< PLLI2S division factor for PLLI2SDIVQ output by 6 */
AnnaBridge 146:22da6e220af6 1143 #define LL_RCC_PLLI2SDIVQ_DIV_7 (RCC_DCKCFGR_PLLI2SDIVQ_2 | RCC_DCKCFGR_PLLI2SDIVQ_1) /*!< PLLI2S division factor for PLLI2SDIVQ output by 7 */
AnnaBridge 146:22da6e220af6 1144 #define LL_RCC_PLLI2SDIVQ_DIV_8 (RCC_DCKCFGR_PLLI2SDIVQ_2 | RCC_DCKCFGR_PLLI2SDIVQ_1 | RCC_DCKCFGR_PLLI2SDIVQ_0) /*!< PLLI2S division factor for PLLI2SDIVQ output by 8 */
AnnaBridge 146:22da6e220af6 1145 #define LL_RCC_PLLI2SDIVQ_DIV_9 RCC_DCKCFGR_PLLI2SDIVQ_3 /*!< PLLI2S division factor for PLLI2SDIVQ output by 9 */
AnnaBridge 146:22da6e220af6 1146 #define LL_RCC_PLLI2SDIVQ_DIV_10 (RCC_DCKCFGR_PLLI2SDIVQ_3 | RCC_DCKCFGR_PLLI2SDIVQ_0) /*!< PLLI2S division factor for PLLI2SDIVQ output by 10 */
AnnaBridge 146:22da6e220af6 1147 #define LL_RCC_PLLI2SDIVQ_DIV_11 (RCC_DCKCFGR_PLLI2SDIVQ_3 | RCC_DCKCFGR_PLLI2SDIVQ_1) /*!< PLLI2S division factor for PLLI2SDIVQ output by 11 */
AnnaBridge 146:22da6e220af6 1148 #define LL_RCC_PLLI2SDIVQ_DIV_12 (RCC_DCKCFGR_PLLI2SDIVQ_3 | RCC_DCKCFGR_PLLI2SDIVQ_1 | RCC_DCKCFGR_PLLI2SDIVQ_0) /*!< PLLI2S division factor for PLLI2SDIVQ output by 12 */
AnnaBridge 146:22da6e220af6 1149 #define LL_RCC_PLLI2SDIVQ_DIV_13 (RCC_DCKCFGR_PLLI2SDIVQ_3 | RCC_DCKCFGR_PLLI2SDIVQ_2) /*!< PLLI2S division factor for PLLI2SDIVQ output by 13 */
AnnaBridge 146:22da6e220af6 1150 #define LL_RCC_PLLI2SDIVQ_DIV_14 (RCC_DCKCFGR_PLLI2SDIVQ_3 | RCC_DCKCFGR_PLLI2SDIVQ_2 | RCC_DCKCFGR_PLLI2SDIVQ_0) /*!< PLLI2S division factor for PLLI2SDIVQ output by 14 */
AnnaBridge 146:22da6e220af6 1151 #define LL_RCC_PLLI2SDIVQ_DIV_15 (RCC_DCKCFGR_PLLI2SDIVQ_3 | RCC_DCKCFGR_PLLI2SDIVQ_2 | RCC_DCKCFGR_PLLI2SDIVQ_1) /*!< PLLI2S division factor for PLLI2SDIVQ output by 15 */
AnnaBridge 146:22da6e220af6 1152 #define LL_RCC_PLLI2SDIVQ_DIV_16 (RCC_DCKCFGR_PLLI2SDIVQ_3 | RCC_DCKCFGR_PLLI2SDIVQ_2 | RCC_DCKCFGR_PLLI2SDIVQ_1 | RCC_DCKCFGR_PLLI2SDIVQ_0) /*!< PLLI2S division factor for PLLI2SDIVQ output by 16 */
AnnaBridge 146:22da6e220af6 1153 #define LL_RCC_PLLI2SDIVQ_DIV_17 RCC_DCKCFGR_PLLI2SDIVQ_4 /*!< PLLI2S division factor for PLLI2SDIVQ output by 17 */
AnnaBridge 146:22da6e220af6 1154 #define LL_RCC_PLLI2SDIVQ_DIV_18 (RCC_DCKCFGR_PLLI2SDIVQ_4 | RCC_DCKCFGR_PLLI2SDIVQ_0) /*!< PLLI2S division factor for PLLI2SDIVQ output by 18 */
AnnaBridge 146:22da6e220af6 1155 #define LL_RCC_PLLI2SDIVQ_DIV_19 (RCC_DCKCFGR_PLLI2SDIVQ_4 | RCC_DCKCFGR_PLLI2SDIVQ_1) /*!< PLLI2S division factor for PLLI2SDIVQ output by 19 */
AnnaBridge 146:22da6e220af6 1156 #define LL_RCC_PLLI2SDIVQ_DIV_20 (RCC_DCKCFGR_PLLI2SDIVQ_4 | RCC_DCKCFGR_PLLI2SDIVQ_1 | RCC_DCKCFGR_PLLI2SDIVQ_0) /*!< PLLI2S division factor for PLLI2SDIVQ output by 20 */
AnnaBridge 146:22da6e220af6 1157 #define LL_RCC_PLLI2SDIVQ_DIV_21 (RCC_DCKCFGR_PLLI2SDIVQ_4 | RCC_DCKCFGR_PLLI2SDIVQ_2) /*!< PLLI2S division factor for PLLI2SDIVQ output by 21 */
AnnaBridge 146:22da6e220af6 1158 #define LL_RCC_PLLI2SDIVQ_DIV_22 (RCC_DCKCFGR_PLLI2SDIVQ_4 | RCC_DCKCFGR_PLLI2SDIVQ_2 | RCC_DCKCFGR_PLLI2SDIVQ_0) /*!< PLLI2S division factor for PLLI2SDIVQ output by 22 */
AnnaBridge 146:22da6e220af6 1159 #define LL_RCC_PLLI2SDIVQ_DIV_23 (RCC_DCKCFGR_PLLI2SDIVQ_4 | RCC_DCKCFGR_PLLI2SDIVQ_2 | RCC_DCKCFGR_PLLI2SDIVQ_1) /*!< PLLI2S division factor for PLLI2SDIVQ output by 23 */
AnnaBridge 146:22da6e220af6 1160 #define LL_RCC_PLLI2SDIVQ_DIV_24 (RCC_DCKCFGR_PLLI2SDIVQ_4 | RCC_DCKCFGR_PLLI2SDIVQ_2 | RCC_DCKCFGR_PLLI2SDIVQ_1 | RCC_DCKCFGR_PLLI2SDIVQ_0) /*!< PLLI2S division factor for PLLI2SDIVQ output by 24 */
AnnaBridge 146:22da6e220af6 1161 #define LL_RCC_PLLI2SDIVQ_DIV_25 (RCC_DCKCFGR_PLLI2SDIVQ_4 | RCC_DCKCFGR_PLLI2SDIVQ_3) /*!< PLLI2S division factor for PLLI2SDIVQ output by 25 */
AnnaBridge 146:22da6e220af6 1162 #define LL_RCC_PLLI2SDIVQ_DIV_26 (RCC_DCKCFGR_PLLI2SDIVQ_4 | RCC_DCKCFGR_PLLI2SDIVQ_3 | RCC_DCKCFGR_PLLI2SDIVQ_0) /*!< PLLI2S division factor for PLLI2SDIVQ output by 26 */
AnnaBridge 146:22da6e220af6 1163 #define LL_RCC_PLLI2SDIVQ_DIV_27 (RCC_DCKCFGR_PLLI2SDIVQ_4 | RCC_DCKCFGR_PLLI2SDIVQ_3 | RCC_DCKCFGR_PLLI2SDIVQ_1) /*!< PLLI2S division factor for PLLI2SDIVQ output by 27 */
AnnaBridge 146:22da6e220af6 1164 #define LL_RCC_PLLI2SDIVQ_DIV_28 (RCC_DCKCFGR_PLLI2SDIVQ_4 | RCC_DCKCFGR_PLLI2SDIVQ_3 | RCC_DCKCFGR_PLLI2SDIVQ_1 | RCC_DCKCFGR_PLLI2SDIVQ_0) /*!< PLLI2S division factor for PLLI2SDIVQ output by 28 */
AnnaBridge 146:22da6e220af6 1165 #define LL_RCC_PLLI2SDIVQ_DIV_29 (RCC_DCKCFGR_PLLI2SDIVQ_4 | RCC_DCKCFGR_PLLI2SDIVQ_3 | RCC_DCKCFGR_PLLI2SDIVQ_2) /*!< PLLI2S division factor for PLLI2SDIVQ output by 29 */
AnnaBridge 146:22da6e220af6 1166 #define LL_RCC_PLLI2SDIVQ_DIV_30 (RCC_DCKCFGR_PLLI2SDIVQ_4 | RCC_DCKCFGR_PLLI2SDIVQ_3 | RCC_DCKCFGR_PLLI2SDIVQ_2 | RCC_DCKCFGR_PLLI2SDIVQ_0) /*!< PLLI2S division factor for PLLI2SDIVQ output by 30 */
AnnaBridge 146:22da6e220af6 1167 #define LL_RCC_PLLI2SDIVQ_DIV_31 (RCC_DCKCFGR_PLLI2SDIVQ_4 | RCC_DCKCFGR_PLLI2SDIVQ_3 | RCC_DCKCFGR_PLLI2SDIVQ_2 | RCC_DCKCFGR_PLLI2SDIVQ_1) /*!< PLLI2S division factor for PLLI2SDIVQ output by 31 */
AnnaBridge 146:22da6e220af6 1168 #define LL_RCC_PLLI2SDIVQ_DIV_32 (RCC_DCKCFGR_PLLI2SDIVQ_4 | RCC_DCKCFGR_PLLI2SDIVQ_3 | RCC_DCKCFGR_PLLI2SDIVQ_2 | RCC_DCKCFGR_PLLI2SDIVQ_1 | RCC_DCKCFGR_PLLI2SDIVQ_0) /*!< PLLI2S division factor for PLLI2SDIVQ output by 32 */
AnnaBridge 146:22da6e220af6 1169 /**
AnnaBridge 146:22da6e220af6 1170 * @}
AnnaBridge 146:22da6e220af6 1171 */
AnnaBridge 146:22da6e220af6 1172 #endif /* RCC_DCKCFGR_PLLI2SDIVQ */
AnnaBridge 146:22da6e220af6 1173
AnnaBridge 146:22da6e220af6 1174 #if defined(RCC_DCKCFGR_PLLI2SDIVR)
AnnaBridge 146:22da6e220af6 1175 /** @defgroup RCC_LL_EC_PLLI2SDIVR PLLI2SDIVR division factor (PLLI2SDIVR)
AnnaBridge 146:22da6e220af6 1176 * @{
AnnaBridge 146:22da6e220af6 1177 */
AnnaBridge 146:22da6e220af6 1178 #define LL_RCC_PLLI2SDIVR_DIV_1 (RCC_DCKCFGR_PLLI2SDIVR_0) /*!< PLLI2S division factor for PLLI2SDIVR output by 1 */
AnnaBridge 146:22da6e220af6 1179 #define LL_RCC_PLLI2SDIVR_DIV_2 (RCC_DCKCFGR_PLLI2SDIVR_1) /*!< PLLI2S division factor for PLLI2SDIVR output by 2 */
AnnaBridge 146:22da6e220af6 1180 #define LL_RCC_PLLI2SDIVR_DIV_3 (RCC_DCKCFGR_PLLI2SDIVR_1 | RCC_DCKCFGR_PLLI2SDIVR_0) /*!< PLLI2S division factor for PLLI2SDIVR output by 3 */
AnnaBridge 146:22da6e220af6 1181 #define LL_RCC_PLLI2SDIVR_DIV_4 (RCC_DCKCFGR_PLLI2SDIVR_2) /*!< PLLI2S division factor for PLLI2SDIVR output by 4 */
AnnaBridge 146:22da6e220af6 1182 #define LL_RCC_PLLI2SDIVR_DIV_5 (RCC_DCKCFGR_PLLI2SDIVR_2 | RCC_DCKCFGR_PLLI2SDIVR_0) /*!< PLLI2S division factor for PLLI2SDIVR output by 5 */
AnnaBridge 146:22da6e220af6 1183 #define LL_RCC_PLLI2SDIVR_DIV_6 (RCC_DCKCFGR_PLLI2SDIVR_2 | RCC_DCKCFGR_PLLI2SDIVR_1) /*!< PLLI2S division factor for PLLI2SDIVR output by 6 */
AnnaBridge 146:22da6e220af6 1184 #define LL_RCC_PLLI2SDIVR_DIV_7 (RCC_DCKCFGR_PLLI2SDIVR_2 | RCC_DCKCFGR_PLLI2SDIVR_1 | RCC_DCKCFGR_PLLI2SDIVR_0) /*!< PLLI2S division factor for PLLI2SDIVR output by 7 */
AnnaBridge 146:22da6e220af6 1185 #define LL_RCC_PLLI2SDIVR_DIV_8 (RCC_DCKCFGR_PLLI2SDIVR_3) /*!< PLLI2S division factor for PLLI2SDIVR output by 8 */
AnnaBridge 146:22da6e220af6 1186 #define LL_RCC_PLLI2SDIVR_DIV_9 (RCC_DCKCFGR_PLLI2SDIVR_3 | RCC_DCKCFGR_PLLI2SDIVR_0) /*!< PLLI2S division factor for PLLI2SDIVR output by 9 */
AnnaBridge 146:22da6e220af6 1187 #define LL_RCC_PLLI2SDIVR_DIV_10 (RCC_DCKCFGR_PLLI2SDIVR_3 | RCC_DCKCFGR_PLLI2SDIVR_1) /*!< PLLI2S division factor for PLLI2SDIVR output by 10 */
AnnaBridge 146:22da6e220af6 1188 #define LL_RCC_PLLI2SDIVR_DIV_11 (RCC_DCKCFGR_PLLI2SDIVR_3 | RCC_DCKCFGR_PLLI2SDIVR_1 | RCC_DCKCFGR_PLLI2SDIVR_0) /*!< PLLI2S division factor for PLLI2SDIVR output by 11 */
AnnaBridge 146:22da6e220af6 1189 #define LL_RCC_PLLI2SDIVR_DIV_12 (RCC_DCKCFGR_PLLI2SDIVR_3 | RCC_DCKCFGR_PLLI2SDIVR_2) /*!< PLLI2S division factor for PLLI2SDIVR output by 12 */
AnnaBridge 146:22da6e220af6 1190 #define LL_RCC_PLLI2SDIVR_DIV_13 (RCC_DCKCFGR_PLLI2SDIVR_3 | RCC_DCKCFGR_PLLI2SDIVR_2 | RCC_DCKCFGR_PLLI2SDIVR_0) /*!< PLLI2S division factor for PLLI2SDIVR output by 13 */
AnnaBridge 146:22da6e220af6 1191 #define LL_RCC_PLLI2SDIVR_DIV_14 (RCC_DCKCFGR_PLLI2SDIVR_3 | RCC_DCKCFGR_PLLI2SDIVR_2 | RCC_DCKCFGR_PLLI2SDIVR_1) /*!< PLLI2S division factor for PLLI2SDIVR output by 14 */
AnnaBridge 146:22da6e220af6 1192 #define LL_RCC_PLLI2SDIVR_DIV_15 (RCC_DCKCFGR_PLLI2SDIVR_3 | RCC_DCKCFGR_PLLI2SDIVR_2 | RCC_DCKCFGR_PLLI2SDIVR_1 | RCC_DCKCFGR_PLLI2SDIVR_0) /*!< PLLI2S division factor for PLLI2SDIVR output by 15 */
AnnaBridge 146:22da6e220af6 1193 #define LL_RCC_PLLI2SDIVR_DIV_16 (RCC_DCKCFGR_PLLI2SDIVR_4) /*!< PLLI2S division factor for PLLI2SDIVR output by 16 */
AnnaBridge 146:22da6e220af6 1194 #define LL_RCC_PLLI2SDIVR_DIV_17 (RCC_DCKCFGR_PLLI2SDIVR_4 | RCC_DCKCFGR_PLLI2SDIVR_0) /*!< PLLI2S division factor for PLLI2SDIVR output by 17 */
AnnaBridge 146:22da6e220af6 1195 #define LL_RCC_PLLI2SDIVR_DIV_18 (RCC_DCKCFGR_PLLI2SDIVR_4 | RCC_DCKCFGR_PLLI2SDIVR_1) /*!< PLLI2S division factor for PLLI2SDIVR output by 18 */
AnnaBridge 146:22da6e220af6 1196 #define LL_RCC_PLLI2SDIVR_DIV_19 (RCC_DCKCFGR_PLLI2SDIVR_4 | RCC_DCKCFGR_PLLI2SDIVR_1 | RCC_DCKCFGR_PLLI2SDIVR_0) /*!< PLLI2S division factor for PLLI2SDIVR output by 19 */
AnnaBridge 146:22da6e220af6 1197 #define LL_RCC_PLLI2SDIVR_DIV_20 (RCC_DCKCFGR_PLLI2SDIVR_4 | RCC_DCKCFGR_PLLI2SDIVR_2) /*!< PLLI2S division factor for PLLI2SDIVR output by 20 */
AnnaBridge 146:22da6e220af6 1198 #define LL_RCC_PLLI2SDIVR_DIV_21 (RCC_DCKCFGR_PLLI2SDIVR_4 | RCC_DCKCFGR_PLLI2SDIVR_2 | RCC_DCKCFGR_PLLI2SDIVR_0) /*!< PLLI2S division factor for PLLI2SDIVR output by 21 */
AnnaBridge 146:22da6e220af6 1199 #define LL_RCC_PLLI2SDIVR_DIV_22 (RCC_DCKCFGR_PLLI2SDIVR_4 | RCC_DCKCFGR_PLLI2SDIVR_2 | RCC_DCKCFGR_PLLI2SDIVR_1) /*!< PLLI2S division factor for PLLI2SDIVR output by 22 */
AnnaBridge 146:22da6e220af6 1200 #define LL_RCC_PLLI2SDIVR_DIV_23 (RCC_DCKCFGR_PLLI2SDIVR_4 | RCC_DCKCFGR_PLLI2SDIVR_2 | RCC_DCKCFGR_PLLI2SDIVR_1 | RCC_DCKCFGR_PLLI2SDIVR_0) /*!< PLLI2S division factor for PLLI2SDIVR output by 23 */
AnnaBridge 146:22da6e220af6 1201 #define LL_RCC_PLLI2SDIVR_DIV_24 (RCC_DCKCFGR_PLLI2SDIVR_4 | RCC_DCKCFGR_PLLI2SDIVR_3) /*!< PLLI2S division factor for PLLI2SDIVR output by 24 */
AnnaBridge 146:22da6e220af6 1202 #define LL_RCC_PLLI2SDIVR_DIV_25 (RCC_DCKCFGR_PLLI2SDIVR_4 | RCC_DCKCFGR_PLLI2SDIVR_3 | RCC_DCKCFGR_PLLI2SDIVR_0) /*!< PLLI2S division factor for PLLI2SDIVR output by 25 */
AnnaBridge 146:22da6e220af6 1203 #define LL_RCC_PLLI2SDIVR_DIV_26 (RCC_DCKCFGR_PLLI2SDIVR_4 | RCC_DCKCFGR_PLLI2SDIVR_3 | RCC_DCKCFGR_PLLI2SDIVR_1) /*!< PLLI2S division factor for PLLI2SDIVR output by 26 */
AnnaBridge 146:22da6e220af6 1204 #define LL_RCC_PLLI2SDIVR_DIV_27 (RCC_DCKCFGR_PLLI2SDIVR_4 | RCC_DCKCFGR_PLLI2SDIVR_3 | RCC_DCKCFGR_PLLI2SDIVR_1 | RCC_DCKCFGR_PLLI2SDIVR_0) /*!< PLLI2S division factor for PLLI2SDIVR output by 27 */
AnnaBridge 146:22da6e220af6 1205 #define LL_RCC_PLLI2SDIVR_DIV_28 (RCC_DCKCFGR_PLLI2SDIVR_4 | RCC_DCKCFGR_PLLI2SDIVR_3 | RCC_DCKCFGR_PLLI2SDIVR_2) /*!< PLLI2S division factor for PLLI2SDIVR output by 28 */
AnnaBridge 146:22da6e220af6 1206 #define LL_RCC_PLLI2SDIVR_DIV_29 (RCC_DCKCFGR_PLLI2SDIVR_4 | RCC_DCKCFGR_PLLI2SDIVR_3 | RCC_DCKCFGR_PLLI2SDIVR_2 | RCC_DCKCFGR_PLLI2SDIVR_0) /*!< PLLI2S division factor for PLLI2SDIVR output by 29 */
AnnaBridge 146:22da6e220af6 1207 #define LL_RCC_PLLI2SDIVR_DIV_30 (RCC_DCKCFGR_PLLI2SDIVR_4 | RCC_DCKCFGR_PLLI2SDIVR_3 | RCC_DCKCFGR_PLLI2SDIVR_2 | RCC_DCKCFGR_PLLI2SDIVR_1) /*!< PLLI2S division factor for PLLI2SDIVR output by 30 */
AnnaBridge 146:22da6e220af6 1208 #define LL_RCC_PLLI2SDIVR_DIV_31 (RCC_DCKCFGR_PLLI2SDIVR_4 | RCC_DCKCFGR_PLLI2SDIVR_3 | RCC_DCKCFGR_PLLI2SDIVR_2 | RCC_DCKCFGR_PLLI2SDIVR_1 | RCC_DCKCFGR_PLLI2SDIVR_0) /*!< PLLI2S division factor for PLLI2SDIVR output by 31 */
AnnaBridge 146:22da6e220af6 1209 /**
AnnaBridge 146:22da6e220af6 1210 * @}
AnnaBridge 146:22da6e220af6 1211 */
AnnaBridge 146:22da6e220af6 1212 #endif /* RCC_DCKCFGR_PLLI2SDIVR */
AnnaBridge 146:22da6e220af6 1213
AnnaBridge 146:22da6e220af6 1214 /** @defgroup RCC_LL_EC_PLLI2SR PLLI2SR division factor (PLLI2SR)
AnnaBridge 146:22da6e220af6 1215 * @{
AnnaBridge 146:22da6e220af6 1216 */
AnnaBridge 146:22da6e220af6 1217 #define LL_RCC_PLLI2SR_DIV_2 RCC_PLLI2SCFGR_PLLI2SR_1 /*!< PLLI2S division factor for PLLI2SR output by 2 */
AnnaBridge 146:22da6e220af6 1218 #define LL_RCC_PLLI2SR_DIV_3 (RCC_PLLI2SCFGR_PLLI2SR_1 | RCC_PLLI2SCFGR_PLLI2SR_0) /*!< PLLI2S division factor for PLLI2SR output by 3 */
AnnaBridge 146:22da6e220af6 1219 #define LL_RCC_PLLI2SR_DIV_4 RCC_PLLI2SCFGR_PLLI2SR_2 /*!< PLLI2S division factor for PLLI2SR output by 4 */
AnnaBridge 146:22da6e220af6 1220 #define LL_RCC_PLLI2SR_DIV_5 (RCC_PLLI2SCFGR_PLLI2SR_2 | RCC_PLLI2SCFGR_PLLI2SR_0) /*!< PLLI2S division factor for PLLI2SR output by 5 */
AnnaBridge 146:22da6e220af6 1221 #define LL_RCC_PLLI2SR_DIV_6 (RCC_PLLI2SCFGR_PLLI2SR_2 | RCC_PLLI2SCFGR_PLLI2SR_1) /*!< PLLI2S division factor for PLLI2SR output by 6 */
AnnaBridge 146:22da6e220af6 1222 #define LL_RCC_PLLI2SR_DIV_7 (RCC_PLLI2SCFGR_PLLI2SR_2 | RCC_PLLI2SCFGR_PLLI2SR_1 | RCC_PLLI2SCFGR_PLLI2SR_0) /*!< PLLI2S division factor for PLLI2SR output by 7 */
AnnaBridge 146:22da6e220af6 1223 /**
AnnaBridge 146:22da6e220af6 1224 * @}
AnnaBridge 146:22da6e220af6 1225 */
AnnaBridge 146:22da6e220af6 1226
AnnaBridge 146:22da6e220af6 1227 #if defined(RCC_PLLI2SCFGR_PLLI2SP)
AnnaBridge 146:22da6e220af6 1228 /** @defgroup RCC_LL_EC_PLLI2SP PLLI2SP division factor (PLLI2SP)
AnnaBridge 146:22da6e220af6 1229 * @{
AnnaBridge 146:22da6e220af6 1230 */
AnnaBridge 146:22da6e220af6 1231 #define LL_RCC_PLLI2SP_DIV_2 0x00000000U /*!< PLLI2S division factor for PLLI2SP output by 2 */
AnnaBridge 146:22da6e220af6 1232 #define LL_RCC_PLLI2SP_DIV_4 RCC_PLLI2SCFGR_PLLI2SP_0 /*!< PLLI2S division factor for PLLI2SP output by 4 */
AnnaBridge 146:22da6e220af6 1233 #define LL_RCC_PLLI2SP_DIV_6 RCC_PLLI2SCFGR_PLLI2SP_1 /*!< PLLI2S division factor for PLLI2SP output by 6 */
AnnaBridge 146:22da6e220af6 1234 #define LL_RCC_PLLI2SP_DIV_8 (RCC_PLLI2SCFGR_PLLI2SP_1 | RCC_PLLI2SCFGR_PLLI2SP_0) /*!< PLLI2S division factor for PLLI2SP output by 8 */
AnnaBridge 146:22da6e220af6 1235 /**
AnnaBridge 146:22da6e220af6 1236 * @}
AnnaBridge 146:22da6e220af6 1237 */
AnnaBridge 146:22da6e220af6 1238 #endif /* RCC_PLLI2SCFGR_PLLI2SP */
AnnaBridge 146:22da6e220af6 1239 #endif /* RCC_PLLI2S_SUPPORT */
AnnaBridge 146:22da6e220af6 1240
AnnaBridge 146:22da6e220af6 1241 #if defined(RCC_PLLSAI_SUPPORT)
AnnaBridge 146:22da6e220af6 1242 /** @defgroup RCC_LL_EC_PLLSAIM PLLSAIM division factor (PLLSAIM or PLLM)
AnnaBridge 146:22da6e220af6 1243 * @{
AnnaBridge 146:22da6e220af6 1244 */
AnnaBridge 146:22da6e220af6 1245 #if defined(RCC_PLLSAICFGR_PLLSAIM)
AnnaBridge 146:22da6e220af6 1246 #define LL_RCC_PLLSAIM_DIV_2 (RCC_PLLSAICFGR_PLLSAIM_1) /*!< PLLSAI division factor for PLLSAIM output by 2 */
AnnaBridge 146:22da6e220af6 1247 #define LL_RCC_PLLSAIM_DIV_3 (RCC_PLLSAICFGR_PLLSAIM_1 | RCC_PLLSAICFGR_PLLSAIM_0) /*!< PLLSAI division factor for PLLSAIM output by 3 */
AnnaBridge 146:22da6e220af6 1248 #define LL_RCC_PLLSAIM_DIV_4 (RCC_PLLSAICFGR_PLLSAIM_2) /*!< PLLSAI division factor for PLLSAIM output by 4 */
AnnaBridge 146:22da6e220af6 1249 #define LL_RCC_PLLSAIM_DIV_5 (RCC_PLLSAICFGR_PLLSAIM_2 | RCC_PLLSAICFGR_PLLSAIM_0) /*!< PLLSAI division factor for PLLSAIM output by 5 */
AnnaBridge 146:22da6e220af6 1250 #define LL_RCC_PLLSAIM_DIV_6 (RCC_PLLSAICFGR_PLLSAIM_2 | RCC_PLLSAICFGR_PLLSAIM_1) /*!< PLLSAI division factor for PLLSAIM output by 6 */
AnnaBridge 146:22da6e220af6 1251 #define LL_RCC_PLLSAIM_DIV_7 (RCC_PLLSAICFGR_PLLSAIM_2 | RCC_PLLSAICFGR_PLLSAIM_1 | RCC_PLLSAICFGR_PLLSAIM_0) /*!< PLLSAI division factor for PLLSAIM output by 7 */
AnnaBridge 146:22da6e220af6 1252 #define LL_RCC_PLLSAIM_DIV_8 (RCC_PLLSAICFGR_PLLSAIM_3) /*!< PLLSAI division factor for PLLSAIM output by 8 */
AnnaBridge 146:22da6e220af6 1253 #define LL_RCC_PLLSAIM_DIV_9 (RCC_PLLSAICFGR_PLLSAIM_3 | RCC_PLLSAICFGR_PLLSAIM_0) /*!< PLLSAI division factor for PLLSAIM output by 9 */
AnnaBridge 146:22da6e220af6 1254 #define LL_RCC_PLLSAIM_DIV_10 (RCC_PLLSAICFGR_PLLSAIM_3 | RCC_PLLSAICFGR_PLLSAIM_1) /*!< PLLSAI division factor for PLLSAIM output by 10 */
AnnaBridge 146:22da6e220af6 1255 #define LL_RCC_PLLSAIM_DIV_11 (RCC_PLLSAICFGR_PLLSAIM_3 | RCC_PLLSAICFGR_PLLSAIM_1 | RCC_PLLSAICFGR_PLLSAIM_0) /*!< PLLSAI division factor for PLLSAIM output by 11 */
AnnaBridge 146:22da6e220af6 1256 #define LL_RCC_PLLSAIM_DIV_12 (RCC_PLLSAICFGR_PLLSAIM_3 | RCC_PLLSAICFGR_PLLSAIM_2) /*!< PLLSAI division factor for PLLSAIM output by 12 */
AnnaBridge 146:22da6e220af6 1257 #define LL_RCC_PLLSAIM_DIV_13 (RCC_PLLSAICFGR_PLLSAIM_3 | RCC_PLLSAICFGR_PLLSAIM_2 | RCC_PLLSAICFGR_PLLSAIM_0) /*!< PLLSAI division factor for PLLSAIM output by 13 */
AnnaBridge 146:22da6e220af6 1258 #define LL_RCC_PLLSAIM_DIV_14 (RCC_PLLSAICFGR_PLLSAIM_3 | RCC_PLLSAICFGR_PLLSAIM_2 | RCC_PLLSAICFGR_PLLSAIM_1) /*!< PLLSAI division factor for PLLSAIM output by 14 */
AnnaBridge 146:22da6e220af6 1259 #define LL_RCC_PLLSAIM_DIV_15 (RCC_PLLSAICFGR_PLLSAIM_3 | RCC_PLLSAICFGR_PLLSAIM_2 | RCC_PLLSAICFGR_PLLSAIM_1 | RCC_PLLSAICFGR_PLLSAIM_0) /*!< PLLSAI division factor for PLLSAIM output by 15 */
AnnaBridge 146:22da6e220af6 1260 #define LL_RCC_PLLSAIM_DIV_16 (RCC_PLLSAICFGR_PLLSAIM_4) /*!< PLLSAI division factor for PLLSAIM output by 16 */
AnnaBridge 146:22da6e220af6 1261 #define LL_RCC_PLLSAIM_DIV_17 (RCC_PLLSAICFGR_PLLSAIM_4 | RCC_PLLSAICFGR_PLLSAIM_0) /*!< PLLSAI division factor for PLLSAIM output by 17 */
AnnaBridge 146:22da6e220af6 1262 #define LL_RCC_PLLSAIM_DIV_18 (RCC_PLLSAICFGR_PLLSAIM_4 | RCC_PLLSAICFGR_PLLSAIM_1) /*!< PLLSAI division factor for PLLSAIM output by 18 */
AnnaBridge 146:22da6e220af6 1263 #define LL_RCC_PLLSAIM_DIV_19 (RCC_PLLSAICFGR_PLLSAIM_4 | RCC_PLLSAICFGR_PLLSAIM_1 | RCC_PLLSAICFGR_PLLSAIM_0) /*!< PLLSAI division factor for PLLSAIM output by 19 */
AnnaBridge 146:22da6e220af6 1264 #define LL_RCC_PLLSAIM_DIV_20 (RCC_PLLSAICFGR_PLLSAIM_4 | RCC_PLLSAICFGR_PLLSAIM_2) /*!< PLLSAI division factor for PLLSAIM output by 20 */
AnnaBridge 146:22da6e220af6 1265 #define LL_RCC_PLLSAIM_DIV_21 (RCC_PLLSAICFGR_PLLSAIM_4 | RCC_PLLSAICFGR_PLLSAIM_2 | RCC_PLLSAICFGR_PLLSAIM_0) /*!< PLLSAI division factor for PLLSAIM output by 21 */
AnnaBridge 146:22da6e220af6 1266 #define LL_RCC_PLLSAIM_DIV_22 (RCC_PLLSAICFGR_PLLSAIM_4 | RCC_PLLSAICFGR_PLLSAIM_2 | RCC_PLLSAICFGR_PLLSAIM_1) /*!< PLLSAI division factor for PLLSAIM output by 22 */
AnnaBridge 146:22da6e220af6 1267 #define LL_RCC_PLLSAIM_DIV_23 (RCC_PLLSAICFGR_PLLSAIM_4 | RCC_PLLSAICFGR_PLLSAIM_2 | RCC_PLLSAICFGR_PLLSAIM_1 | RCC_PLLSAICFGR_PLLSAIM_0) /*!< PLLSAI division factor for PLLSAIM output by 23 */
AnnaBridge 146:22da6e220af6 1268 #define LL_RCC_PLLSAIM_DIV_24 (RCC_PLLSAICFGR_PLLSAIM_4 | RCC_PLLSAICFGR_PLLSAIM_3) /*!< PLLSAI division factor for PLLSAIM output by 24 */
AnnaBridge 146:22da6e220af6 1269 #define LL_RCC_PLLSAIM_DIV_25 (RCC_PLLSAICFGR_PLLSAIM_4 | RCC_PLLSAICFGR_PLLSAIM_3 | RCC_PLLSAICFGR_PLLSAIM_0) /*!< PLLSAI division factor for PLLSAIM output by 25 */
AnnaBridge 146:22da6e220af6 1270 #define LL_RCC_PLLSAIM_DIV_26 (RCC_PLLSAICFGR_PLLSAIM_4 | RCC_PLLSAICFGR_PLLSAIM_3 | RCC_PLLSAICFGR_PLLSAIM_1) /*!< PLLSAI division factor for PLLSAIM output by 26 */
AnnaBridge 146:22da6e220af6 1271 #define LL_RCC_PLLSAIM_DIV_27 (RCC_PLLSAICFGR_PLLSAIM_4 | RCC_PLLSAICFGR_PLLSAIM_3 | RCC_PLLSAICFGR_PLLSAIM_1 | RCC_PLLSAICFGR_PLLSAIM_0) /*!< PLLSAI division factor for PLLSAIM output by 27 */
AnnaBridge 146:22da6e220af6 1272 #define LL_RCC_PLLSAIM_DIV_28 (RCC_PLLSAICFGR_PLLSAIM_4 | RCC_PLLSAICFGR_PLLSAIM_3 | RCC_PLLSAICFGR_PLLSAIM_2) /*!< PLLSAI division factor for PLLSAIM output by 28 */
AnnaBridge 146:22da6e220af6 1273 #define LL_RCC_PLLSAIM_DIV_29 (RCC_PLLSAICFGR_PLLSAIM_4 | RCC_PLLSAICFGR_PLLSAIM_3 | RCC_PLLSAICFGR_PLLSAIM_2 | RCC_PLLSAICFGR_PLLSAIM_0) /*!< PLLSAI division factor for PLLSAIM output by 29 */
AnnaBridge 146:22da6e220af6 1274 #define LL_RCC_PLLSAIM_DIV_30 (RCC_PLLSAICFGR_PLLSAIM_4 | RCC_PLLSAICFGR_PLLSAIM_3 | RCC_PLLSAICFGR_PLLSAIM_2 | RCC_PLLSAICFGR_PLLSAIM_1) /*!< PLLSAI division factor for PLLSAIM output by 30 */
AnnaBridge 146:22da6e220af6 1275 #define LL_RCC_PLLSAIM_DIV_31 (RCC_PLLSAICFGR_PLLSAIM_4 | RCC_PLLSAICFGR_PLLSAIM_3 | RCC_PLLSAICFGR_PLLSAIM_2 | RCC_PLLSAICFGR_PLLSAIM_1 | RCC_PLLSAICFGR_PLLSAIM_0) /*!< PLLSAI division factor for PLLSAIM output by 31 */
AnnaBridge 146:22da6e220af6 1276 #define LL_RCC_PLLSAIM_DIV_32 (RCC_PLLSAICFGR_PLLSAIM_5) /*!< PLLSAI division factor for PLLSAIM output by 32 */
AnnaBridge 146:22da6e220af6 1277 #define LL_RCC_PLLSAIM_DIV_33 (RCC_PLLSAICFGR_PLLSAIM_5 | RCC_PLLSAICFGR_PLLSAIM_0) /*!< PLLSAI division factor for PLLSAIM output by 33 */
AnnaBridge 146:22da6e220af6 1278 #define LL_RCC_PLLSAIM_DIV_34 (RCC_PLLSAICFGR_PLLSAIM_5 | RCC_PLLSAICFGR_PLLSAIM_1) /*!< PLLSAI division factor for PLLSAIM output by 34 */
AnnaBridge 146:22da6e220af6 1279 #define LL_RCC_PLLSAIM_DIV_35 (RCC_PLLSAICFGR_PLLSAIM_5 | RCC_PLLSAICFGR_PLLSAIM_1 | RCC_PLLSAICFGR_PLLSAIM_0) /*!< PLLSAI division factor for PLLSAIM output by 35 */
AnnaBridge 146:22da6e220af6 1280 #define LL_RCC_PLLSAIM_DIV_36 (RCC_PLLSAICFGR_PLLSAIM_5 | RCC_PLLSAICFGR_PLLSAIM_2) /*!< PLLSAI division factor for PLLSAIM output by 36 */
AnnaBridge 146:22da6e220af6 1281 #define LL_RCC_PLLSAIM_DIV_37 (RCC_PLLSAICFGR_PLLSAIM_5 | RCC_PLLSAICFGR_PLLSAIM_2 | RCC_PLLSAICFGR_PLLSAIM_0) /*!< PLLSAI division factor for PLLSAIM output by 37 */
AnnaBridge 146:22da6e220af6 1282 #define LL_RCC_PLLSAIM_DIV_38 (RCC_PLLSAICFGR_PLLSAIM_5 | RCC_PLLSAICFGR_PLLSAIM_2 | RCC_PLLSAICFGR_PLLSAIM_1) /*!< PLLSAI division factor for PLLSAIM output by 38 */
AnnaBridge 146:22da6e220af6 1283 #define LL_RCC_PLLSAIM_DIV_39 (RCC_PLLSAICFGR_PLLSAIM_5 | RCC_PLLSAICFGR_PLLSAIM_2 | RCC_PLLSAICFGR_PLLSAIM_1 | RCC_PLLSAICFGR_PLLSAIM_0) /*!< PLLSAI division factor for PLLSAIM output by 39 */
AnnaBridge 146:22da6e220af6 1284 #define LL_RCC_PLLSAIM_DIV_40 (RCC_PLLSAICFGR_PLLSAIM_5 | RCC_PLLSAICFGR_PLLSAIM_3) /*!< PLLSAI division factor for PLLSAIM output by 40 */
AnnaBridge 146:22da6e220af6 1285 #define LL_RCC_PLLSAIM_DIV_41 (RCC_PLLSAICFGR_PLLSAIM_5 | RCC_PLLSAICFGR_PLLSAIM_3 | RCC_PLLSAICFGR_PLLSAIM_0) /*!< PLLSAI division factor for PLLSAIM output by 41 */
AnnaBridge 146:22da6e220af6 1286 #define LL_RCC_PLLSAIM_DIV_42 (RCC_PLLSAICFGR_PLLSAIM_5 | RCC_PLLSAICFGR_PLLSAIM_3 | RCC_PLLSAICFGR_PLLSAIM_1) /*!< PLLSAI division factor for PLLSAIM output by 42 */
AnnaBridge 146:22da6e220af6 1287 #define LL_RCC_PLLSAIM_DIV_43 (RCC_PLLSAICFGR_PLLSAIM_5 | RCC_PLLSAICFGR_PLLSAIM_3 | RCC_PLLSAICFGR_PLLSAIM_1 | RCC_PLLSAICFGR_PLLSAIM_0) /*!< PLLSAI division factor for PLLSAIM output by 43 */
AnnaBridge 146:22da6e220af6 1288 #define LL_RCC_PLLSAIM_DIV_44 (RCC_PLLSAICFGR_PLLSAIM_5 | RCC_PLLSAICFGR_PLLSAIM_3 | RCC_PLLSAICFGR_PLLSAIM_2) /*!< PLLSAI division factor for PLLSAIM output by 44 */
AnnaBridge 146:22da6e220af6 1289 #define LL_RCC_PLLSAIM_DIV_45 (RCC_PLLSAICFGR_PLLSAIM_5 | RCC_PLLSAICFGR_PLLSAIM_3 | RCC_PLLSAICFGR_PLLSAIM_2 | RCC_PLLSAICFGR_PLLSAIM_0) /*!< PLLSAI division factor for PLLSAIM output by 45 */
AnnaBridge 146:22da6e220af6 1290 #define LL_RCC_PLLSAIM_DIV_46 (RCC_PLLSAICFGR_PLLSAIM_5 | RCC_PLLSAICFGR_PLLSAIM_3 | RCC_PLLSAICFGR_PLLSAIM_2 | RCC_PLLSAICFGR_PLLSAIM_1) /*!< PLLSAI division factor for PLLSAIM output by 46 */
AnnaBridge 146:22da6e220af6 1291 #define LL_RCC_PLLSAIM_DIV_47 (RCC_PLLSAICFGR_PLLSAIM_5 | RCC_PLLSAICFGR_PLLSAIM_3 | RCC_PLLSAICFGR_PLLSAIM_2 | RCC_PLLSAICFGR_PLLSAIM_1 | RCC_PLLSAICFGR_PLLSAIM_0) /*!< PLLSAI division factor for PLLSAIM output by 47 */
AnnaBridge 146:22da6e220af6 1292 #define LL_RCC_PLLSAIM_DIV_48 (RCC_PLLSAICFGR_PLLSAIM_5 | RCC_PLLSAICFGR_PLLSAIM_4) /*!< PLLSAI division factor for PLLSAIM output by 48 */
AnnaBridge 146:22da6e220af6 1293 #define LL_RCC_PLLSAIM_DIV_49 (RCC_PLLSAICFGR_PLLSAIM_5 | RCC_PLLSAICFGR_PLLSAIM_4 | RCC_PLLSAICFGR_PLLSAIM_0) /*!< PLLSAI division factor for PLLSAIM output by 49 */
AnnaBridge 146:22da6e220af6 1294 #define LL_RCC_PLLSAIM_DIV_50 (RCC_PLLSAICFGR_PLLSAIM_5 | RCC_PLLSAICFGR_PLLSAIM_4 | RCC_PLLSAICFGR_PLLSAIM_1) /*!< PLLSAI division factor for PLLSAIM output by 50 */
AnnaBridge 146:22da6e220af6 1295 #define LL_RCC_PLLSAIM_DIV_51 (RCC_PLLSAICFGR_PLLSAIM_5 | RCC_PLLSAICFGR_PLLSAIM_4 | RCC_PLLSAICFGR_PLLSAIM_1 | RCC_PLLSAICFGR_PLLSAIM_0) /*!< PLLSAI division factor for PLLSAIM output by 51 */
AnnaBridge 146:22da6e220af6 1296 #define LL_RCC_PLLSAIM_DIV_52 (RCC_PLLSAICFGR_PLLSAIM_5 | RCC_PLLSAICFGR_PLLSAIM_4 | RCC_PLLSAICFGR_PLLSAIM_2) /*!< PLLSAI division factor for PLLSAIM output by 52 */
AnnaBridge 146:22da6e220af6 1297 #define LL_RCC_PLLSAIM_DIV_53 (RCC_PLLSAICFGR_PLLSAIM_5 | RCC_PLLSAICFGR_PLLSAIM_4 | RCC_PLLSAICFGR_PLLSAIM_2 | RCC_PLLSAICFGR_PLLSAIM_0) /*!< PLLSAI division factor for PLLSAIM output by 53 */
AnnaBridge 146:22da6e220af6 1298 #define LL_RCC_PLLSAIM_DIV_54 (RCC_PLLSAICFGR_PLLSAIM_5 | RCC_PLLSAICFGR_PLLSAIM_4 | RCC_PLLSAICFGR_PLLSAIM_2 | RCC_PLLSAICFGR_PLLSAIM_1) /*!< PLLSAI division factor for PLLSAIM output by 54 */
AnnaBridge 146:22da6e220af6 1299 #define LL_RCC_PLLSAIM_DIV_55 (RCC_PLLSAICFGR_PLLSAIM_5 | RCC_PLLSAICFGR_PLLSAIM_4 | RCC_PLLSAICFGR_PLLSAIM_2 | RCC_PLLSAICFGR_PLLSAIM_1 | RCC_PLLSAICFGR_PLLSAIM_0) /*!< PLLSAI division factor for PLLSAIM output by 55 */
AnnaBridge 146:22da6e220af6 1300 #define LL_RCC_PLLSAIM_DIV_56 (RCC_PLLSAICFGR_PLLSAIM_5 | RCC_PLLSAICFGR_PLLSAIM_4 | RCC_PLLSAICFGR_PLLSAIM_3) /*!< PLLSAI division factor for PLLSAIM output by 56 */
AnnaBridge 146:22da6e220af6 1301 #define LL_RCC_PLLSAIM_DIV_57 (RCC_PLLSAICFGR_PLLSAIM_5 | RCC_PLLSAICFGR_PLLSAIM_4 | RCC_PLLSAICFGR_PLLSAIM_3 | RCC_PLLSAICFGR_PLLSAIM_0) /*!< PLLSAI division factor for PLLSAIM output by 57 */
AnnaBridge 146:22da6e220af6 1302 #define LL_RCC_PLLSAIM_DIV_58 (RCC_PLLSAICFGR_PLLSAIM_5 | RCC_PLLSAICFGR_PLLSAIM_4 | RCC_PLLSAICFGR_PLLSAIM_3 | RCC_PLLSAICFGR_PLLSAIM_1) /*!< PLLSAI division factor for PLLSAIM output by 58 */
AnnaBridge 146:22da6e220af6 1303 #define LL_RCC_PLLSAIM_DIV_59 (RCC_PLLSAICFGR_PLLSAIM_5 | RCC_PLLSAICFGR_PLLSAIM_4 | RCC_PLLSAICFGR_PLLSAIM_3 | RCC_PLLSAICFGR_PLLSAIM_1 | RCC_PLLSAICFGR_PLLSAIM_0) /*!< PLLSAI division factor for PLLSAIM output by 59 */
AnnaBridge 146:22da6e220af6 1304 #define LL_RCC_PLLSAIM_DIV_60 (RCC_PLLSAICFGR_PLLSAIM_5 | RCC_PLLSAICFGR_PLLSAIM_4 | RCC_PLLSAICFGR_PLLSAIM_3 | RCC_PLLSAICFGR_PLLSAIM_2) /*!< PLLSAI division factor for PLLSAIM output by 60 */
AnnaBridge 146:22da6e220af6 1305 #define LL_RCC_PLLSAIM_DIV_61 (RCC_PLLSAICFGR_PLLSAIM_5 | RCC_PLLSAICFGR_PLLSAIM_4 | RCC_PLLSAICFGR_PLLSAIM_3 | RCC_PLLSAICFGR_PLLSAIM_2 | RCC_PLLSAICFGR_PLLSAIM_0) /*!< PLLSAI division factor for PLLSAIM output by 61 */
AnnaBridge 146:22da6e220af6 1306 #define LL_RCC_PLLSAIM_DIV_62 (RCC_PLLSAICFGR_PLLSAIM_5 | RCC_PLLSAICFGR_PLLSAIM_4 | RCC_PLLSAICFGR_PLLSAIM_3 | RCC_PLLSAICFGR_PLLSAIM_2 | RCC_PLLSAICFGR_PLLSAIM_1) /*!< PLLSAI division factor for PLLSAIM output by 62 */
AnnaBridge 146:22da6e220af6 1307 #define LL_RCC_PLLSAIM_DIV_63 (RCC_PLLSAICFGR_PLLSAIM_5 | RCC_PLLSAICFGR_PLLSAIM_4 | RCC_PLLSAICFGR_PLLSAIM_3 | RCC_PLLSAICFGR_PLLSAIM_2 | RCC_PLLSAICFGR_PLLSAIM_1 | RCC_PLLSAICFGR_PLLSAIM_0) /*!< PLLSAI division factor for PLLSAIM output by 63 */
AnnaBridge 146:22da6e220af6 1308 #else
AnnaBridge 146:22da6e220af6 1309 #define LL_RCC_PLLSAIM_DIV_2 LL_RCC_PLLM_DIV_2 /*!< PLLSAI division factor for PLLSAIM output by 2 */
AnnaBridge 146:22da6e220af6 1310 #define LL_RCC_PLLSAIM_DIV_3 LL_RCC_PLLM_DIV_3 /*!< PLLSAI division factor for PLLSAIM output by 3 */
AnnaBridge 146:22da6e220af6 1311 #define LL_RCC_PLLSAIM_DIV_4 LL_RCC_PLLM_DIV_4 /*!< PLLSAI division factor for PLLSAIM output by 4 */
AnnaBridge 146:22da6e220af6 1312 #define LL_RCC_PLLSAIM_DIV_5 LL_RCC_PLLM_DIV_5 /*!< PLLSAI division factor for PLLSAIM output by 5 */
AnnaBridge 146:22da6e220af6 1313 #define LL_RCC_PLLSAIM_DIV_6 LL_RCC_PLLM_DIV_6 /*!< PLLSAI division factor for PLLSAIM output by 6 */
AnnaBridge 146:22da6e220af6 1314 #define LL_RCC_PLLSAIM_DIV_7 LL_RCC_PLLM_DIV_7 /*!< PLLSAI division factor for PLLSAIM output by 7 */
AnnaBridge 146:22da6e220af6 1315 #define LL_RCC_PLLSAIM_DIV_8 LL_RCC_PLLM_DIV_8 /*!< PLLSAI division factor for PLLSAIM output by 8 */
AnnaBridge 146:22da6e220af6 1316 #define LL_RCC_PLLSAIM_DIV_9 LL_RCC_PLLM_DIV_9 /*!< PLLSAI division factor for PLLSAIM output by 9 */
AnnaBridge 146:22da6e220af6 1317 #define LL_RCC_PLLSAIM_DIV_10 LL_RCC_PLLM_DIV_10 /*!< PLLSAI division factor for PLLSAIM output by 10 */
AnnaBridge 146:22da6e220af6 1318 #define LL_RCC_PLLSAIM_DIV_11 LL_RCC_PLLM_DIV_11 /*!< PLLSAI division factor for PLLSAIM output by 11 */
AnnaBridge 146:22da6e220af6 1319 #define LL_RCC_PLLSAIM_DIV_12 LL_RCC_PLLM_DIV_12 /*!< PLLSAI division factor for PLLSAIM output by 12 */
AnnaBridge 146:22da6e220af6 1320 #define LL_RCC_PLLSAIM_DIV_13 LL_RCC_PLLM_DIV_13 /*!< PLLSAI division factor for PLLSAIM output by 13 */
AnnaBridge 146:22da6e220af6 1321 #define LL_RCC_PLLSAIM_DIV_14 LL_RCC_PLLM_DIV_14 /*!< PLLSAI division factor for PLLSAIM output by 14 */
AnnaBridge 146:22da6e220af6 1322 #define LL_RCC_PLLSAIM_DIV_15 LL_RCC_PLLM_DIV_15 /*!< PLLSAI division factor for PLLSAIM output by 15 */
AnnaBridge 146:22da6e220af6 1323 #define LL_RCC_PLLSAIM_DIV_16 LL_RCC_PLLM_DIV_16 /*!< PLLSAI division factor for PLLSAIM output by 16 */
AnnaBridge 146:22da6e220af6 1324 #define LL_RCC_PLLSAIM_DIV_17 LL_RCC_PLLM_DIV_17 /*!< PLLSAI division factor for PLLSAIM output by 17 */
AnnaBridge 146:22da6e220af6 1325 #define LL_RCC_PLLSAIM_DIV_18 LL_RCC_PLLM_DIV_18 /*!< PLLSAI division factor for PLLSAIM output by 18 */
AnnaBridge 146:22da6e220af6 1326 #define LL_RCC_PLLSAIM_DIV_19 LL_RCC_PLLM_DIV_19 /*!< PLLSAI division factor for PLLSAIM output by 19 */
AnnaBridge 146:22da6e220af6 1327 #define LL_RCC_PLLSAIM_DIV_20 LL_RCC_PLLM_DIV_20 /*!< PLLSAI division factor for PLLSAIM output by 20 */
AnnaBridge 146:22da6e220af6 1328 #define LL_RCC_PLLSAIM_DIV_21 LL_RCC_PLLM_DIV_21 /*!< PLLSAI division factor for PLLSAIM output by 21 */
AnnaBridge 146:22da6e220af6 1329 #define LL_RCC_PLLSAIM_DIV_22 LL_RCC_PLLM_DIV_22 /*!< PLLSAI division factor for PLLSAIM output by 22 */
AnnaBridge 146:22da6e220af6 1330 #define LL_RCC_PLLSAIM_DIV_23 LL_RCC_PLLM_DIV_23 /*!< PLLSAI division factor for PLLSAIM output by 23 */
AnnaBridge 146:22da6e220af6 1331 #define LL_RCC_PLLSAIM_DIV_24 LL_RCC_PLLM_DIV_24 /*!< PLLSAI division factor for PLLSAIM output by 24 */
AnnaBridge 146:22da6e220af6 1332 #define LL_RCC_PLLSAIM_DIV_25 LL_RCC_PLLM_DIV_25 /*!< PLLSAI division factor for PLLSAIM output by 25 */
AnnaBridge 146:22da6e220af6 1333 #define LL_RCC_PLLSAIM_DIV_26 LL_RCC_PLLM_DIV_26 /*!< PLLSAI division factor for PLLSAIM output by 26 */
AnnaBridge 146:22da6e220af6 1334 #define LL_RCC_PLLSAIM_DIV_27 LL_RCC_PLLM_DIV_27 /*!< PLLSAI division factor for PLLSAIM output by 27 */
AnnaBridge 146:22da6e220af6 1335 #define LL_RCC_PLLSAIM_DIV_28 LL_RCC_PLLM_DIV_28 /*!< PLLSAI division factor for PLLSAIM output by 28 */
AnnaBridge 146:22da6e220af6 1336 #define LL_RCC_PLLSAIM_DIV_29 LL_RCC_PLLM_DIV_29 /*!< PLLSAI division factor for PLLSAIM output by 29 */
AnnaBridge 146:22da6e220af6 1337 #define LL_RCC_PLLSAIM_DIV_30 LL_RCC_PLLM_DIV_30 /*!< PLLSAI division factor for PLLSAIM output by 30 */
AnnaBridge 146:22da6e220af6 1338 #define LL_RCC_PLLSAIM_DIV_31 LL_RCC_PLLM_DIV_31 /*!< PLLSAI division factor for PLLSAIM output by 31 */
AnnaBridge 146:22da6e220af6 1339 #define LL_RCC_PLLSAIM_DIV_32 LL_RCC_PLLM_DIV_32 /*!< PLLSAI division factor for PLLSAIM output by 32 */
AnnaBridge 146:22da6e220af6 1340 #define LL_RCC_PLLSAIM_DIV_33 LL_RCC_PLLM_DIV_33 /*!< PLLSAI division factor for PLLSAIM output by 33 */
AnnaBridge 146:22da6e220af6 1341 #define LL_RCC_PLLSAIM_DIV_34 LL_RCC_PLLM_DIV_34 /*!< PLLSAI division factor for PLLSAIM output by 34 */
AnnaBridge 146:22da6e220af6 1342 #define LL_RCC_PLLSAIM_DIV_35 LL_RCC_PLLM_DIV_35 /*!< PLLSAI division factor for PLLSAIM output by 35 */
AnnaBridge 146:22da6e220af6 1343 #define LL_RCC_PLLSAIM_DIV_36 LL_RCC_PLLM_DIV_36 /*!< PLLSAI division factor for PLLSAIM output by 36 */
AnnaBridge 146:22da6e220af6 1344 #define LL_RCC_PLLSAIM_DIV_37 LL_RCC_PLLM_DIV_37 /*!< PLLSAI division factor for PLLSAIM output by 37 */
AnnaBridge 146:22da6e220af6 1345 #define LL_RCC_PLLSAIM_DIV_38 LL_RCC_PLLM_DIV_38 /*!< PLLSAI division factor for PLLSAIM output by 38 */
AnnaBridge 146:22da6e220af6 1346 #define LL_RCC_PLLSAIM_DIV_39 LL_RCC_PLLM_DIV_39 /*!< PLLSAI division factor for PLLSAIM output by 39 */
AnnaBridge 146:22da6e220af6 1347 #define LL_RCC_PLLSAIM_DIV_40 LL_RCC_PLLM_DIV_40 /*!< PLLSAI division factor for PLLSAIM output by 40 */
AnnaBridge 146:22da6e220af6 1348 #define LL_RCC_PLLSAIM_DIV_41 LL_RCC_PLLM_DIV_41 /*!< PLLSAI division factor for PLLSAIM output by 41 */
AnnaBridge 146:22da6e220af6 1349 #define LL_RCC_PLLSAIM_DIV_42 LL_RCC_PLLM_DIV_42 /*!< PLLSAI division factor for PLLSAIM output by 42 */
AnnaBridge 146:22da6e220af6 1350 #define LL_RCC_PLLSAIM_DIV_43 LL_RCC_PLLM_DIV_43 /*!< PLLSAI division factor for PLLSAIM output by 43 */
AnnaBridge 146:22da6e220af6 1351 #define LL_RCC_PLLSAIM_DIV_44 LL_RCC_PLLM_DIV_44 /*!< PLLSAI division factor for PLLSAIM output by 44 */
AnnaBridge 146:22da6e220af6 1352 #define LL_RCC_PLLSAIM_DIV_45 LL_RCC_PLLM_DIV_45 /*!< PLLSAI division factor for PLLSAIM output by 45 */
AnnaBridge 146:22da6e220af6 1353 #define LL_RCC_PLLSAIM_DIV_46 LL_RCC_PLLM_DIV_46 /*!< PLLSAI division factor for PLLSAIM output by 46 */
AnnaBridge 146:22da6e220af6 1354 #define LL_RCC_PLLSAIM_DIV_47 LL_RCC_PLLM_DIV_47 /*!< PLLSAI division factor for PLLSAIM output by 47 */
AnnaBridge 146:22da6e220af6 1355 #define LL_RCC_PLLSAIM_DIV_48 LL_RCC_PLLM_DIV_48 /*!< PLLSAI division factor for PLLSAIM output by 48 */
AnnaBridge 146:22da6e220af6 1356 #define LL_RCC_PLLSAIM_DIV_49 LL_RCC_PLLM_DIV_49 /*!< PLLSAI division factor for PLLSAIM output by 49 */
AnnaBridge 146:22da6e220af6 1357 #define LL_RCC_PLLSAIM_DIV_50 LL_RCC_PLLM_DIV_50 /*!< PLLSAI division factor for PLLSAIM output by 50 */
AnnaBridge 146:22da6e220af6 1358 #define LL_RCC_PLLSAIM_DIV_51 LL_RCC_PLLM_DIV_51 /*!< PLLSAI division factor for PLLSAIM output by 51 */
AnnaBridge 146:22da6e220af6 1359 #define LL_RCC_PLLSAIM_DIV_52 LL_RCC_PLLM_DIV_52 /*!< PLLSAI division factor for PLLSAIM output by 52 */
AnnaBridge 146:22da6e220af6 1360 #define LL_RCC_PLLSAIM_DIV_53 LL_RCC_PLLM_DIV_53 /*!< PLLSAI division factor for PLLSAIM output by 53 */
AnnaBridge 146:22da6e220af6 1361 #define LL_RCC_PLLSAIM_DIV_54 LL_RCC_PLLM_DIV_54 /*!< PLLSAI division factor for PLLSAIM output by 54 */
AnnaBridge 146:22da6e220af6 1362 #define LL_RCC_PLLSAIM_DIV_55 LL_RCC_PLLM_DIV_55 /*!< PLLSAI division factor for PLLSAIM output by 55 */
AnnaBridge 146:22da6e220af6 1363 #define LL_RCC_PLLSAIM_DIV_56 LL_RCC_PLLM_DIV_56 /*!< PLLSAI division factor for PLLSAIM output by 56 */
AnnaBridge 146:22da6e220af6 1364 #define LL_RCC_PLLSAIM_DIV_57 LL_RCC_PLLM_DIV_57 /*!< PLLSAI division factor for PLLSAIM output by 57 */
AnnaBridge 146:22da6e220af6 1365 #define LL_RCC_PLLSAIM_DIV_58 LL_RCC_PLLM_DIV_58 /*!< PLLSAI division factor for PLLSAIM output by 58 */
AnnaBridge 146:22da6e220af6 1366 #define LL_RCC_PLLSAIM_DIV_59 LL_RCC_PLLM_DIV_59 /*!< PLLSAI division factor for PLLSAIM output by 59 */
AnnaBridge 146:22da6e220af6 1367 #define LL_RCC_PLLSAIM_DIV_60 LL_RCC_PLLM_DIV_60 /*!< PLLSAI division factor for PLLSAIM output by 60 */
AnnaBridge 146:22da6e220af6 1368 #define LL_RCC_PLLSAIM_DIV_61 LL_RCC_PLLM_DIV_61 /*!< PLLSAI division factor for PLLSAIM output by 61 */
AnnaBridge 146:22da6e220af6 1369 #define LL_RCC_PLLSAIM_DIV_62 LL_RCC_PLLM_DIV_62 /*!< PLLSAI division factor for PLLSAIM output by 62 */
AnnaBridge 146:22da6e220af6 1370 #define LL_RCC_PLLSAIM_DIV_63 LL_RCC_PLLM_DIV_63 /*!< PLLSAI division factor for PLLSAIM output by 63 */
AnnaBridge 146:22da6e220af6 1371 #endif /* RCC_PLLSAICFGR_PLLSAIM */
AnnaBridge 146:22da6e220af6 1372 /**
AnnaBridge 146:22da6e220af6 1373 * @}
AnnaBridge 146:22da6e220af6 1374 */
AnnaBridge 146:22da6e220af6 1375
AnnaBridge 146:22da6e220af6 1376 /** @defgroup RCC_LL_EC_PLLSAIQ PLLSAIQ division factor (PLLSAIQ)
AnnaBridge 146:22da6e220af6 1377 * @{
AnnaBridge 146:22da6e220af6 1378 */
AnnaBridge 146:22da6e220af6 1379 #define LL_RCC_PLLSAIQ_DIV_2 RCC_PLLSAICFGR_PLLSAIQ_1 /*!< PLLSAI division factor for PLLSAIQ output by 2 */
AnnaBridge 146:22da6e220af6 1380 #define LL_RCC_PLLSAIQ_DIV_3 (RCC_PLLSAICFGR_PLLSAIQ_1 | RCC_PLLSAICFGR_PLLSAIQ_0) /*!< PLLSAI division factor for PLLSAIQ output by 3 */
AnnaBridge 146:22da6e220af6 1381 #define LL_RCC_PLLSAIQ_DIV_4 RCC_PLLSAICFGR_PLLSAIQ_2 /*!< PLLSAI division factor for PLLSAIQ output by 4 */
AnnaBridge 146:22da6e220af6 1382 #define LL_RCC_PLLSAIQ_DIV_5 (RCC_PLLSAICFGR_PLLSAIQ_2 | RCC_PLLSAICFGR_PLLSAIQ_0) /*!< PLLSAI division factor for PLLSAIQ output by 5 */
AnnaBridge 146:22da6e220af6 1383 #define LL_RCC_PLLSAIQ_DIV_6 (RCC_PLLSAICFGR_PLLSAIQ_2 | RCC_PLLSAICFGR_PLLSAIQ_1) /*!< PLLSAI division factor for PLLSAIQ output by 6 */
AnnaBridge 146:22da6e220af6 1384 #define LL_RCC_PLLSAIQ_DIV_7 (RCC_PLLSAICFGR_PLLSAIQ_2 | RCC_PLLSAICFGR_PLLSAIQ_1 | RCC_PLLSAICFGR_PLLSAIQ_0) /*!< PLLSAI division factor for PLLSAIQ output by 7 */
AnnaBridge 146:22da6e220af6 1385 #define LL_RCC_PLLSAIQ_DIV_8 RCC_PLLSAICFGR_PLLSAIQ_3 /*!< PLLSAI division factor for PLLSAIQ output by 8 */
AnnaBridge 146:22da6e220af6 1386 #define LL_RCC_PLLSAIQ_DIV_9 (RCC_PLLSAICFGR_PLLSAIQ_3 | RCC_PLLSAICFGR_PLLSAIQ_0) /*!< PLLSAI division factor for PLLSAIQ output by 9 */
AnnaBridge 146:22da6e220af6 1387 #define LL_RCC_PLLSAIQ_DIV_10 (RCC_PLLSAICFGR_PLLSAIQ_3 | RCC_PLLSAICFGR_PLLSAIQ_1) /*!< PLLSAI division factor for PLLSAIQ output by 10 */
AnnaBridge 146:22da6e220af6 1388 #define LL_RCC_PLLSAIQ_DIV_11 (RCC_PLLSAICFGR_PLLSAIQ_3 | RCC_PLLSAICFGR_PLLSAIQ_1 | RCC_PLLSAICFGR_PLLSAIQ_0) /*!< PLLSAI division factor for PLLSAIQ output by 11 */
AnnaBridge 146:22da6e220af6 1389 #define LL_RCC_PLLSAIQ_DIV_12 (RCC_PLLSAICFGR_PLLSAIQ_3 | RCC_PLLSAICFGR_PLLSAIQ_2) /*!< PLLSAI division factor for PLLSAIQ output by 12 */
AnnaBridge 146:22da6e220af6 1390 #define LL_RCC_PLLSAIQ_DIV_13 (RCC_PLLSAICFGR_PLLSAIQ_3 | RCC_PLLSAICFGR_PLLSAIQ_2 | RCC_PLLSAICFGR_PLLSAIQ_0) /*!< PLLSAI division factor for PLLSAIQ output by 13 */
AnnaBridge 146:22da6e220af6 1391 #define LL_RCC_PLLSAIQ_DIV_14 (RCC_PLLSAICFGR_PLLSAIQ_3 | RCC_PLLSAICFGR_PLLSAIQ_2 | RCC_PLLSAICFGR_PLLSAIQ_1) /*!< PLLSAI division factor for PLLSAIQ output by 14 */
AnnaBridge 146:22da6e220af6 1392 #define LL_RCC_PLLSAIQ_DIV_15 (RCC_PLLSAICFGR_PLLSAIQ_3 | RCC_PLLSAICFGR_PLLSAIQ_2 | RCC_PLLSAICFGR_PLLSAIQ_1 | RCC_PLLSAICFGR_PLLSAIQ_0) /*!< PLLSAI division factor for PLLSAIQ output by 15 */
AnnaBridge 146:22da6e220af6 1393 /**
AnnaBridge 146:22da6e220af6 1394 * @}
AnnaBridge 146:22da6e220af6 1395 */
AnnaBridge 146:22da6e220af6 1396
AnnaBridge 146:22da6e220af6 1397 #if defined(RCC_DCKCFGR_PLLSAIDIVQ)
AnnaBridge 146:22da6e220af6 1398 /** @defgroup RCC_LL_EC_PLLSAIDIVQ PLLSAIDIVQ division factor (PLLSAIDIVQ)
AnnaBridge 146:22da6e220af6 1399 * @{
AnnaBridge 146:22da6e220af6 1400 */
AnnaBridge 146:22da6e220af6 1401 #define LL_RCC_PLLSAIDIVQ_DIV_1 0x00000000U /*!< PLLSAI division factor for PLLSAIDIVQ output by 1 */
AnnaBridge 146:22da6e220af6 1402 #define LL_RCC_PLLSAIDIVQ_DIV_2 RCC_DCKCFGR_PLLSAIDIVQ_0 /*!< PLLSAI division factor for PLLSAIDIVQ output by 2 */
AnnaBridge 146:22da6e220af6 1403 #define LL_RCC_PLLSAIDIVQ_DIV_3 RCC_DCKCFGR_PLLSAIDIVQ_1 /*!< PLLSAI division factor for PLLSAIDIVQ output by 3 */
AnnaBridge 146:22da6e220af6 1404 #define LL_RCC_PLLSAIDIVQ_DIV_4 (RCC_DCKCFGR_PLLSAIDIVQ_1 | RCC_DCKCFGR_PLLSAIDIVQ_0) /*!< PLLSAI division factor for PLLSAIDIVQ output by 4 */
AnnaBridge 146:22da6e220af6 1405 #define LL_RCC_PLLSAIDIVQ_DIV_5 RCC_DCKCFGR_PLLSAIDIVQ_2 /*!< PLLSAI division factor for PLLSAIDIVQ output by 5 */
AnnaBridge 146:22da6e220af6 1406 #define LL_RCC_PLLSAIDIVQ_DIV_6 (RCC_DCKCFGR_PLLSAIDIVQ_2 | RCC_DCKCFGR_PLLSAIDIVQ_0) /*!< PLLSAI division factor for PLLSAIDIVQ output by 6 */
AnnaBridge 146:22da6e220af6 1407 #define LL_RCC_PLLSAIDIVQ_DIV_7 (RCC_DCKCFGR_PLLSAIDIVQ_2 | RCC_DCKCFGR_PLLSAIDIVQ_1) /*!< PLLSAI division factor for PLLSAIDIVQ output by 7 */
AnnaBridge 146:22da6e220af6 1408 #define LL_RCC_PLLSAIDIVQ_DIV_8 (RCC_DCKCFGR_PLLSAIDIVQ_2 | RCC_DCKCFGR_PLLSAIDIVQ_1 | RCC_DCKCFGR_PLLSAIDIVQ_0) /*!< PLLSAI division factor for PLLSAIDIVQ output by 8 */
AnnaBridge 146:22da6e220af6 1409 #define LL_RCC_PLLSAIDIVQ_DIV_9 RCC_DCKCFGR_PLLSAIDIVQ_3 /*!< PLLSAI division factor for PLLSAIDIVQ output by 9 */
AnnaBridge 146:22da6e220af6 1410 #define LL_RCC_PLLSAIDIVQ_DIV_10 (RCC_DCKCFGR_PLLSAIDIVQ_3 | RCC_DCKCFGR_PLLSAIDIVQ_0) /*!< PLLSAI division factor for PLLSAIDIVQ output by 10 */
AnnaBridge 146:22da6e220af6 1411 #define LL_RCC_PLLSAIDIVQ_DIV_11 (RCC_DCKCFGR_PLLSAIDIVQ_3 | RCC_DCKCFGR_PLLSAIDIVQ_1) /*!< PLLSAI division factor for PLLSAIDIVQ output by 11 */
AnnaBridge 146:22da6e220af6 1412 #define LL_RCC_PLLSAIDIVQ_DIV_12 (RCC_DCKCFGR_PLLSAIDIVQ_3 | RCC_DCKCFGR_PLLSAIDIVQ_1 | RCC_DCKCFGR_PLLSAIDIVQ_0) /*!< PLLSAI division factor for PLLSAIDIVQ output by 12 */
AnnaBridge 146:22da6e220af6 1413 #define LL_RCC_PLLSAIDIVQ_DIV_13 (RCC_DCKCFGR_PLLSAIDIVQ_3 | RCC_DCKCFGR_PLLSAIDIVQ_2) /*!< PLLSAI division factor for PLLSAIDIVQ output by 13 */
AnnaBridge 146:22da6e220af6 1414 #define LL_RCC_PLLSAIDIVQ_DIV_14 (RCC_DCKCFGR_PLLSAIDIVQ_3 | RCC_DCKCFGR_PLLSAIDIVQ_2 | RCC_DCKCFGR_PLLSAIDIVQ_0) /*!< PLLSAI division factor for PLLSAIDIVQ output by 14 */
AnnaBridge 146:22da6e220af6 1415 #define LL_RCC_PLLSAIDIVQ_DIV_15 (RCC_DCKCFGR_PLLSAIDIVQ_3 | RCC_DCKCFGR_PLLSAIDIVQ_2 | RCC_DCKCFGR_PLLSAIDIVQ_1) /*!< PLLSAI division factor for PLLSAIDIVQ output by 15 */
AnnaBridge 146:22da6e220af6 1416 #define LL_RCC_PLLSAIDIVQ_DIV_16 (RCC_DCKCFGR_PLLSAIDIVQ_3 | RCC_DCKCFGR_PLLSAIDIVQ_2 | RCC_DCKCFGR_PLLSAIDIVQ_1 | RCC_DCKCFGR_PLLSAIDIVQ_0) /*!< PLLSAI division factor for PLLSAIDIVQ output by 16 */
AnnaBridge 146:22da6e220af6 1417 #define LL_RCC_PLLSAIDIVQ_DIV_17 RCC_DCKCFGR_PLLSAIDIVQ_4 /*!< PLLSAI division factor for PLLSAIDIVQ output by 17 */
AnnaBridge 146:22da6e220af6 1418 #define LL_RCC_PLLSAIDIVQ_DIV_18 (RCC_DCKCFGR_PLLSAIDIVQ_4 | RCC_DCKCFGR_PLLSAIDIVQ_0) /*!< PLLSAI division factor for PLLSAIDIVQ output by 18 */
AnnaBridge 146:22da6e220af6 1419 #define LL_RCC_PLLSAIDIVQ_DIV_19 (RCC_DCKCFGR_PLLSAIDIVQ_4 | RCC_DCKCFGR_PLLSAIDIVQ_1) /*!< PLLSAI division factor for PLLSAIDIVQ output by 19 */
AnnaBridge 146:22da6e220af6 1420 #define LL_RCC_PLLSAIDIVQ_DIV_20 (RCC_DCKCFGR_PLLSAIDIVQ_4 | RCC_DCKCFGR_PLLSAIDIVQ_1 | RCC_DCKCFGR_PLLSAIDIVQ_0) /*!< PLLSAI division factor for PLLSAIDIVQ output by 20 */
AnnaBridge 146:22da6e220af6 1421 #define LL_RCC_PLLSAIDIVQ_DIV_21 (RCC_DCKCFGR_PLLSAIDIVQ_4 | RCC_DCKCFGR_PLLSAIDIVQ_2) /*!< PLLSAI division factor for PLLSAIDIVQ output by 21 */
AnnaBridge 146:22da6e220af6 1422 #define LL_RCC_PLLSAIDIVQ_DIV_22 (RCC_DCKCFGR_PLLSAIDIVQ_4 | RCC_DCKCFGR_PLLSAIDIVQ_2 | RCC_DCKCFGR_PLLSAIDIVQ_0) /*!< PLLSAI division factor for PLLSAIDIVQ output by 22 */
AnnaBridge 146:22da6e220af6 1423 #define LL_RCC_PLLSAIDIVQ_DIV_23 (RCC_DCKCFGR_PLLSAIDIVQ_4 | RCC_DCKCFGR_PLLSAIDIVQ_2 | RCC_DCKCFGR_PLLSAIDIVQ_1) /*!< PLLSAI division factor for PLLSAIDIVQ output by 23 */
AnnaBridge 146:22da6e220af6 1424 #define LL_RCC_PLLSAIDIVQ_DIV_24 (RCC_DCKCFGR_PLLSAIDIVQ_4 | RCC_DCKCFGR_PLLSAIDIVQ_2 | RCC_DCKCFGR_PLLSAIDIVQ_1 | RCC_DCKCFGR_PLLSAIDIVQ_0) /*!< PLLSAI division factor for PLLSAIDIVQ output by 24 */
AnnaBridge 146:22da6e220af6 1425 #define LL_RCC_PLLSAIDIVQ_DIV_25 (RCC_DCKCFGR_PLLSAIDIVQ_4 | RCC_DCKCFGR_PLLSAIDIVQ_3) /*!< PLLSAI division factor for PLLSAIDIVQ output by 25 */
AnnaBridge 146:22da6e220af6 1426 #define LL_RCC_PLLSAIDIVQ_DIV_26 (RCC_DCKCFGR_PLLSAIDIVQ_4 | RCC_DCKCFGR_PLLSAIDIVQ_3 | RCC_DCKCFGR_PLLSAIDIVQ_0) /*!< PLLSAI division factor for PLLSAIDIVQ output by 26 */
AnnaBridge 146:22da6e220af6 1427 #define LL_RCC_PLLSAIDIVQ_DIV_27 (RCC_DCKCFGR_PLLSAIDIVQ_4 | RCC_DCKCFGR_PLLSAIDIVQ_3 | RCC_DCKCFGR_PLLSAIDIVQ_1) /*!< PLLSAI division factor for PLLSAIDIVQ output by 27 */
AnnaBridge 146:22da6e220af6 1428 #define LL_RCC_PLLSAIDIVQ_DIV_28 (RCC_DCKCFGR_PLLSAIDIVQ_4 | RCC_DCKCFGR_PLLSAIDIVQ_3 | RCC_DCKCFGR_PLLSAIDIVQ_1 | RCC_DCKCFGR_PLLSAIDIVQ_0) /*!< PLLSAI division factor for PLLSAIDIVQ output by 28 */
AnnaBridge 146:22da6e220af6 1429 #define LL_RCC_PLLSAIDIVQ_DIV_29 (RCC_DCKCFGR_PLLSAIDIVQ_4 | RCC_DCKCFGR_PLLSAIDIVQ_3 | RCC_DCKCFGR_PLLSAIDIVQ_2) /*!< PLLSAI division factor for PLLSAIDIVQ output by 29 */
AnnaBridge 146:22da6e220af6 1430 #define LL_RCC_PLLSAIDIVQ_DIV_30 (RCC_DCKCFGR_PLLSAIDIVQ_4 | RCC_DCKCFGR_PLLSAIDIVQ_3 | RCC_DCKCFGR_PLLSAIDIVQ_2 | RCC_DCKCFGR_PLLSAIDIVQ_0) /*!< PLLSAI division factor for PLLSAIDIVQ output by 30 */
AnnaBridge 146:22da6e220af6 1431 #define LL_RCC_PLLSAIDIVQ_DIV_31 (RCC_DCKCFGR_PLLSAIDIVQ_4 | RCC_DCKCFGR_PLLSAIDIVQ_3 | RCC_DCKCFGR_PLLSAIDIVQ_2 | RCC_DCKCFGR_PLLSAIDIVQ_1) /*!< PLLSAI division factor for PLLSAIDIVQ output by 31 */
AnnaBridge 146:22da6e220af6 1432 #define LL_RCC_PLLSAIDIVQ_DIV_32 (RCC_DCKCFGR_PLLSAIDIVQ_4 | RCC_DCKCFGR_PLLSAIDIVQ_3 | RCC_DCKCFGR_PLLSAIDIVQ_2 | RCC_DCKCFGR_PLLSAIDIVQ_1 | RCC_DCKCFGR_PLLSAIDIVQ_0) /*!< PLLSAI division factor for PLLSAIDIVQ output by 32 */
AnnaBridge 146:22da6e220af6 1433 /**
AnnaBridge 146:22da6e220af6 1434 * @}
AnnaBridge 146:22da6e220af6 1435 */
AnnaBridge 146:22da6e220af6 1436 #endif /* RCC_DCKCFGR_PLLSAIDIVQ */
AnnaBridge 146:22da6e220af6 1437
AnnaBridge 146:22da6e220af6 1438 #if defined(RCC_PLLSAICFGR_PLLSAIR)
AnnaBridge 146:22da6e220af6 1439 /** @defgroup RCC_LL_EC_PLLSAIR PLLSAIR division factor (PLLSAIR)
AnnaBridge 146:22da6e220af6 1440 * @{
AnnaBridge 146:22da6e220af6 1441 */
AnnaBridge 146:22da6e220af6 1442 #define LL_RCC_PLLSAIR_DIV_2 RCC_PLLSAICFGR_PLLSAIR_1 /*!< PLLSAI division factor for PLLSAIR output by 2 */
AnnaBridge 146:22da6e220af6 1443 #define LL_RCC_PLLSAIR_DIV_3 (RCC_PLLSAICFGR_PLLSAIR_1 | RCC_PLLSAICFGR_PLLSAIR_0) /*!< PLLSAI division factor for PLLSAIR output by 3 */
AnnaBridge 146:22da6e220af6 1444 #define LL_RCC_PLLSAIR_DIV_4 RCC_PLLSAICFGR_PLLSAIR_2 /*!< PLLSAI division factor for PLLSAIR output by 4 */
AnnaBridge 146:22da6e220af6 1445 #define LL_RCC_PLLSAIR_DIV_5 (RCC_PLLSAICFGR_PLLSAIR_2 | RCC_PLLSAICFGR_PLLSAIR_0) /*!< PLLSAI division factor for PLLSAIR output by 5 */
AnnaBridge 146:22da6e220af6 1446 #define LL_RCC_PLLSAIR_DIV_6 (RCC_PLLSAICFGR_PLLSAIR_2 | RCC_PLLSAICFGR_PLLSAIR_1) /*!< PLLSAI division factor for PLLSAIR output by 6 */
AnnaBridge 146:22da6e220af6 1447 #define LL_RCC_PLLSAIR_DIV_7 (RCC_PLLSAICFGR_PLLSAIR_2 | RCC_PLLSAICFGR_PLLSAIR_1 | RCC_PLLSAICFGR_PLLSAIR_0) /*!< PLLSAI division factor for PLLSAIR output by 7 */
AnnaBridge 146:22da6e220af6 1448 /**
AnnaBridge 146:22da6e220af6 1449 * @}
AnnaBridge 146:22da6e220af6 1450 */
AnnaBridge 146:22da6e220af6 1451 #endif /* RCC_PLLSAICFGR_PLLSAIR */
AnnaBridge 146:22da6e220af6 1452
AnnaBridge 146:22da6e220af6 1453 #if defined(RCC_DCKCFGR_PLLSAIDIVR)
AnnaBridge 146:22da6e220af6 1454 /** @defgroup RCC_LL_EC_PLLSAIDIVR PLLSAIDIVR division factor (PLLSAIDIVR)
AnnaBridge 146:22da6e220af6 1455 * @{
AnnaBridge 146:22da6e220af6 1456 */
AnnaBridge 146:22da6e220af6 1457 #define LL_RCC_PLLSAIDIVR_DIV_2 0x00000000U /*!< PLLSAI division factor for PLLSAIDIVR output by 2 */
AnnaBridge 146:22da6e220af6 1458 #define LL_RCC_PLLSAIDIVR_DIV_4 RCC_DCKCFGR_PLLSAIDIVR_0 /*!< PLLSAI division factor for PLLSAIDIVR output by 4 */
AnnaBridge 146:22da6e220af6 1459 #define LL_RCC_PLLSAIDIVR_DIV_8 RCC_DCKCFGR_PLLSAIDIVR_1 /*!< PLLSAI division factor for PLLSAIDIVR output by 8 */
AnnaBridge 146:22da6e220af6 1460 #define LL_RCC_PLLSAIDIVR_DIV_16 (RCC_DCKCFGR_PLLSAIDIVR_1 | RCC_DCKCFGR_PLLSAIDIVR_0) /*!< PLLSAI division factor for PLLSAIDIVR output by 16 */
AnnaBridge 146:22da6e220af6 1461 /**
AnnaBridge 146:22da6e220af6 1462 * @}
AnnaBridge 146:22da6e220af6 1463 */
AnnaBridge 146:22da6e220af6 1464 #endif /* RCC_DCKCFGR_PLLSAIDIVR */
AnnaBridge 146:22da6e220af6 1465
AnnaBridge 146:22da6e220af6 1466 #if defined(RCC_PLLSAICFGR_PLLSAIP)
AnnaBridge 146:22da6e220af6 1467 /** @defgroup RCC_LL_EC_PLLSAIP PLLSAIP division factor (PLLSAIP)
AnnaBridge 146:22da6e220af6 1468 * @{
AnnaBridge 146:22da6e220af6 1469 */
AnnaBridge 146:22da6e220af6 1470 #define LL_RCC_PLLSAIP_DIV_2 0x00000000U /*!< PLLSAI division factor for PLLSAIP output by 2 */
AnnaBridge 146:22da6e220af6 1471 #define LL_RCC_PLLSAIP_DIV_4 RCC_PLLSAICFGR_PLLSAIP_0 /*!< PLLSAI division factor for PLLSAIP output by 4 */
AnnaBridge 146:22da6e220af6 1472 #define LL_RCC_PLLSAIP_DIV_6 RCC_PLLSAICFGR_PLLSAIP_1 /*!< PLLSAI division factor for PLLSAIP output by 6 */
AnnaBridge 146:22da6e220af6 1473 #define LL_RCC_PLLSAIP_DIV_8 (RCC_PLLSAICFGR_PLLSAIP_1 | RCC_PLLSAICFGR_PLLSAIP_0) /*!< PLLSAI division factor for PLLSAIP output by 8 */
AnnaBridge 146:22da6e220af6 1474 /**
AnnaBridge 146:22da6e220af6 1475 * @}
AnnaBridge 146:22da6e220af6 1476 */
AnnaBridge 146:22da6e220af6 1477 #endif /* RCC_PLLSAICFGR_PLLSAIP */
AnnaBridge 146:22da6e220af6 1478 #endif /* RCC_PLLSAI_SUPPORT */
AnnaBridge 146:22da6e220af6 1479 /**
AnnaBridge 146:22da6e220af6 1480 * @}
AnnaBridge 146:22da6e220af6 1481 */
AnnaBridge 146:22da6e220af6 1482
AnnaBridge 146:22da6e220af6 1483 /* Exported macro ------------------------------------------------------------*/
AnnaBridge 146:22da6e220af6 1484 /** @defgroup RCC_LL_Exported_Macros RCC Exported Macros
AnnaBridge 146:22da6e220af6 1485 * @{
AnnaBridge 146:22da6e220af6 1486 */
AnnaBridge 146:22da6e220af6 1487
AnnaBridge 146:22da6e220af6 1488 /** @defgroup RCC_LL_EM_WRITE_READ Common Write and read registers Macros
AnnaBridge 146:22da6e220af6 1489 * @{
AnnaBridge 146:22da6e220af6 1490 */
AnnaBridge 146:22da6e220af6 1491
AnnaBridge 146:22da6e220af6 1492 /**
AnnaBridge 146:22da6e220af6 1493 * @brief Write a value in RCC register
AnnaBridge 146:22da6e220af6 1494 * @param __REG__ Register to be written
AnnaBridge 146:22da6e220af6 1495 * @param __VALUE__ Value to be written in the register
AnnaBridge 146:22da6e220af6 1496 * @retval None
AnnaBridge 146:22da6e220af6 1497 */
AnnaBridge 146:22da6e220af6 1498 #define LL_RCC_WriteReg(__REG__, __VALUE__) WRITE_REG(RCC->__REG__, (__VALUE__))
AnnaBridge 146:22da6e220af6 1499
AnnaBridge 146:22da6e220af6 1500 /**
AnnaBridge 146:22da6e220af6 1501 * @brief Read a value in RCC register
AnnaBridge 146:22da6e220af6 1502 * @param __REG__ Register to be read
AnnaBridge 146:22da6e220af6 1503 * @retval Register value
AnnaBridge 146:22da6e220af6 1504 */
AnnaBridge 146:22da6e220af6 1505 #define LL_RCC_ReadReg(__REG__) READ_REG(RCC->__REG__)
AnnaBridge 146:22da6e220af6 1506 /**
AnnaBridge 146:22da6e220af6 1507 * @}
AnnaBridge 146:22da6e220af6 1508 */
AnnaBridge 146:22da6e220af6 1509
AnnaBridge 146:22da6e220af6 1510 /** @defgroup RCC_LL_EM_CALC_FREQ Calculate frequencies
AnnaBridge 146:22da6e220af6 1511 * @{
AnnaBridge 146:22da6e220af6 1512 */
AnnaBridge 146:22da6e220af6 1513
AnnaBridge 146:22da6e220af6 1514 /**
AnnaBridge 146:22da6e220af6 1515 * @brief Helper macro to calculate the PLLCLK frequency on system domain
AnnaBridge 146:22da6e220af6 1516 * @note ex: @ref __LL_RCC_CALC_PLLCLK_FREQ (HSE_VALUE,@ref LL_RCC_PLL_GetDivider (),
AnnaBridge 146:22da6e220af6 1517 * @ref LL_RCC_PLL_GetN (), @ref LL_RCC_PLL_GetP ());
AnnaBridge 146:22da6e220af6 1518 * @param __INPUTFREQ__ PLL Input frequency (based on HSE/HSI)
AnnaBridge 146:22da6e220af6 1519 * @param __PLLM__ This parameter can be one of the following values:
AnnaBridge 146:22da6e220af6 1520 * @arg @ref LL_RCC_PLLM_DIV_2
AnnaBridge 146:22da6e220af6 1521 * @arg @ref LL_RCC_PLLM_DIV_3
AnnaBridge 146:22da6e220af6 1522 * @arg @ref LL_RCC_PLLM_DIV_4
AnnaBridge 146:22da6e220af6 1523 * @arg @ref LL_RCC_PLLM_DIV_5
AnnaBridge 146:22da6e220af6 1524 * @arg @ref LL_RCC_PLLM_DIV_6
AnnaBridge 146:22da6e220af6 1525 * @arg @ref LL_RCC_PLLM_DIV_7
AnnaBridge 146:22da6e220af6 1526 * @arg @ref LL_RCC_PLLM_DIV_8
AnnaBridge 146:22da6e220af6 1527 * @arg @ref LL_RCC_PLLM_DIV_9
AnnaBridge 146:22da6e220af6 1528 * @arg @ref LL_RCC_PLLM_DIV_10
AnnaBridge 146:22da6e220af6 1529 * @arg @ref LL_RCC_PLLM_DIV_11
AnnaBridge 146:22da6e220af6 1530 * @arg @ref LL_RCC_PLLM_DIV_12
AnnaBridge 146:22da6e220af6 1531 * @arg @ref LL_RCC_PLLM_DIV_13
AnnaBridge 146:22da6e220af6 1532 * @arg @ref LL_RCC_PLLM_DIV_14
AnnaBridge 146:22da6e220af6 1533 * @arg @ref LL_RCC_PLLM_DIV_15
AnnaBridge 146:22da6e220af6 1534 * @arg @ref LL_RCC_PLLM_DIV_16
AnnaBridge 146:22da6e220af6 1535 * @arg @ref LL_RCC_PLLM_DIV_17
AnnaBridge 146:22da6e220af6 1536 * @arg @ref LL_RCC_PLLM_DIV_18
AnnaBridge 146:22da6e220af6 1537 * @arg @ref LL_RCC_PLLM_DIV_19
AnnaBridge 146:22da6e220af6 1538 * @arg @ref LL_RCC_PLLM_DIV_20
AnnaBridge 146:22da6e220af6 1539 * @arg @ref LL_RCC_PLLM_DIV_21
AnnaBridge 146:22da6e220af6 1540 * @arg @ref LL_RCC_PLLM_DIV_22
AnnaBridge 146:22da6e220af6 1541 * @arg @ref LL_RCC_PLLM_DIV_23
AnnaBridge 146:22da6e220af6 1542 * @arg @ref LL_RCC_PLLM_DIV_24
AnnaBridge 146:22da6e220af6 1543 * @arg @ref LL_RCC_PLLM_DIV_25
AnnaBridge 146:22da6e220af6 1544 * @arg @ref LL_RCC_PLLM_DIV_26
AnnaBridge 146:22da6e220af6 1545 * @arg @ref LL_RCC_PLLM_DIV_27
AnnaBridge 146:22da6e220af6 1546 * @arg @ref LL_RCC_PLLM_DIV_28
AnnaBridge 146:22da6e220af6 1547 * @arg @ref LL_RCC_PLLM_DIV_29
AnnaBridge 146:22da6e220af6 1548 * @arg @ref LL_RCC_PLLM_DIV_30
AnnaBridge 146:22da6e220af6 1549 * @arg @ref LL_RCC_PLLM_DIV_31
AnnaBridge 146:22da6e220af6 1550 * @arg @ref LL_RCC_PLLM_DIV_32
AnnaBridge 146:22da6e220af6 1551 * @arg @ref LL_RCC_PLLM_DIV_33
AnnaBridge 146:22da6e220af6 1552 * @arg @ref LL_RCC_PLLM_DIV_34
AnnaBridge 146:22da6e220af6 1553 * @arg @ref LL_RCC_PLLM_DIV_35
AnnaBridge 146:22da6e220af6 1554 * @arg @ref LL_RCC_PLLM_DIV_36
AnnaBridge 146:22da6e220af6 1555 * @arg @ref LL_RCC_PLLM_DIV_37
AnnaBridge 146:22da6e220af6 1556 * @arg @ref LL_RCC_PLLM_DIV_38
AnnaBridge 146:22da6e220af6 1557 * @arg @ref LL_RCC_PLLM_DIV_39
AnnaBridge 146:22da6e220af6 1558 * @arg @ref LL_RCC_PLLM_DIV_40
AnnaBridge 146:22da6e220af6 1559 * @arg @ref LL_RCC_PLLM_DIV_41
AnnaBridge 146:22da6e220af6 1560 * @arg @ref LL_RCC_PLLM_DIV_42
AnnaBridge 146:22da6e220af6 1561 * @arg @ref LL_RCC_PLLM_DIV_43
AnnaBridge 146:22da6e220af6 1562 * @arg @ref LL_RCC_PLLM_DIV_44
AnnaBridge 146:22da6e220af6 1563 * @arg @ref LL_RCC_PLLM_DIV_45
AnnaBridge 146:22da6e220af6 1564 * @arg @ref LL_RCC_PLLM_DIV_46
AnnaBridge 146:22da6e220af6 1565 * @arg @ref LL_RCC_PLLM_DIV_47
AnnaBridge 146:22da6e220af6 1566 * @arg @ref LL_RCC_PLLM_DIV_48
AnnaBridge 146:22da6e220af6 1567 * @arg @ref LL_RCC_PLLM_DIV_49
AnnaBridge 146:22da6e220af6 1568 * @arg @ref LL_RCC_PLLM_DIV_50
AnnaBridge 146:22da6e220af6 1569 * @arg @ref LL_RCC_PLLM_DIV_51
AnnaBridge 146:22da6e220af6 1570 * @arg @ref LL_RCC_PLLM_DIV_52
AnnaBridge 146:22da6e220af6 1571 * @arg @ref LL_RCC_PLLM_DIV_53
AnnaBridge 146:22da6e220af6 1572 * @arg @ref LL_RCC_PLLM_DIV_54
AnnaBridge 146:22da6e220af6 1573 * @arg @ref LL_RCC_PLLM_DIV_55
AnnaBridge 146:22da6e220af6 1574 * @arg @ref LL_RCC_PLLM_DIV_56
AnnaBridge 146:22da6e220af6 1575 * @arg @ref LL_RCC_PLLM_DIV_57
AnnaBridge 146:22da6e220af6 1576 * @arg @ref LL_RCC_PLLM_DIV_58
AnnaBridge 146:22da6e220af6 1577 * @arg @ref LL_RCC_PLLM_DIV_59
AnnaBridge 146:22da6e220af6 1578 * @arg @ref LL_RCC_PLLM_DIV_60
AnnaBridge 146:22da6e220af6 1579 * @arg @ref LL_RCC_PLLM_DIV_61
AnnaBridge 146:22da6e220af6 1580 * @arg @ref LL_RCC_PLLM_DIV_62
AnnaBridge 146:22da6e220af6 1581 * @arg @ref LL_RCC_PLLM_DIV_63
AnnaBridge 146:22da6e220af6 1582 * @param __PLLN__ Between 50/192(*) and 432
AnnaBridge 146:22da6e220af6 1583 *
AnnaBridge 146:22da6e220af6 1584 * (*) value not defined in all devices.
AnnaBridge 146:22da6e220af6 1585 * @param __PLLP__ This parameter can be one of the following values:
AnnaBridge 146:22da6e220af6 1586 * @arg @ref LL_RCC_PLLP_DIV_2
AnnaBridge 146:22da6e220af6 1587 * @arg @ref LL_RCC_PLLP_DIV_4
AnnaBridge 146:22da6e220af6 1588 * @arg @ref LL_RCC_PLLP_DIV_6
AnnaBridge 146:22da6e220af6 1589 * @arg @ref LL_RCC_PLLP_DIV_8
AnnaBridge 146:22da6e220af6 1590 * @retval PLL clock frequency (in Hz)
AnnaBridge 146:22da6e220af6 1591 */
AnnaBridge 146:22da6e220af6 1592 #define __LL_RCC_CALC_PLLCLK_FREQ(__INPUTFREQ__, __PLLM__, __PLLN__, __PLLP__) ((__INPUTFREQ__) / (__PLLM__) * (__PLLN__) / \
AnnaBridge 146:22da6e220af6 1593 ((((__PLLP__) >> RCC_PLLCFGR_PLLP_Pos ) + 1U) * 2U))
AnnaBridge 146:22da6e220af6 1594
AnnaBridge 146:22da6e220af6 1595 #if defined(RCC_PLLR_SYSCLK_SUPPORT)
AnnaBridge 146:22da6e220af6 1596 /**
AnnaBridge 146:22da6e220af6 1597 * @brief Helper macro to calculate the PLLRCLK frequency on system domain
AnnaBridge 146:22da6e220af6 1598 * @note ex: @ref __LL_RCC_CALC_PLLRCLK_FREQ (HSE_VALUE,@ref LL_RCC_PLL_GetDivider (),
AnnaBridge 146:22da6e220af6 1599 * @ref LL_RCC_PLL_GetN (), @ref LL_RCC_PLL_GetR ());
AnnaBridge 146:22da6e220af6 1600 * @param __INPUTFREQ__ PLL Input frequency (based on HSE/HSI)
AnnaBridge 146:22da6e220af6 1601 * @param __PLLM__ This parameter can be one of the following values:
AnnaBridge 146:22da6e220af6 1602 * @arg @ref LL_RCC_PLLM_DIV_2
AnnaBridge 146:22da6e220af6 1603 * @arg @ref LL_RCC_PLLM_DIV_3
AnnaBridge 146:22da6e220af6 1604 * @arg @ref LL_RCC_PLLM_DIV_4
AnnaBridge 146:22da6e220af6 1605 * @arg @ref LL_RCC_PLLM_DIV_5
AnnaBridge 146:22da6e220af6 1606 * @arg @ref LL_RCC_PLLM_DIV_6
AnnaBridge 146:22da6e220af6 1607 * @arg @ref LL_RCC_PLLM_DIV_7
AnnaBridge 146:22da6e220af6 1608 * @arg @ref LL_RCC_PLLM_DIV_8
AnnaBridge 146:22da6e220af6 1609 * @arg @ref LL_RCC_PLLM_DIV_9
AnnaBridge 146:22da6e220af6 1610 * @arg @ref LL_RCC_PLLM_DIV_10
AnnaBridge 146:22da6e220af6 1611 * @arg @ref LL_RCC_PLLM_DIV_11
AnnaBridge 146:22da6e220af6 1612 * @arg @ref LL_RCC_PLLM_DIV_12
AnnaBridge 146:22da6e220af6 1613 * @arg @ref LL_RCC_PLLM_DIV_13
AnnaBridge 146:22da6e220af6 1614 * @arg @ref LL_RCC_PLLM_DIV_14
AnnaBridge 146:22da6e220af6 1615 * @arg @ref LL_RCC_PLLM_DIV_15
AnnaBridge 146:22da6e220af6 1616 * @arg @ref LL_RCC_PLLM_DIV_16
AnnaBridge 146:22da6e220af6 1617 * @arg @ref LL_RCC_PLLM_DIV_17
AnnaBridge 146:22da6e220af6 1618 * @arg @ref LL_RCC_PLLM_DIV_18
AnnaBridge 146:22da6e220af6 1619 * @arg @ref LL_RCC_PLLM_DIV_19
AnnaBridge 146:22da6e220af6 1620 * @arg @ref LL_RCC_PLLM_DIV_20
AnnaBridge 146:22da6e220af6 1621 * @arg @ref LL_RCC_PLLM_DIV_21
AnnaBridge 146:22da6e220af6 1622 * @arg @ref LL_RCC_PLLM_DIV_22
AnnaBridge 146:22da6e220af6 1623 * @arg @ref LL_RCC_PLLM_DIV_23
AnnaBridge 146:22da6e220af6 1624 * @arg @ref LL_RCC_PLLM_DIV_24
AnnaBridge 146:22da6e220af6 1625 * @arg @ref LL_RCC_PLLM_DIV_25
AnnaBridge 146:22da6e220af6 1626 * @arg @ref LL_RCC_PLLM_DIV_26
AnnaBridge 146:22da6e220af6 1627 * @arg @ref LL_RCC_PLLM_DIV_27
AnnaBridge 146:22da6e220af6 1628 * @arg @ref LL_RCC_PLLM_DIV_28
AnnaBridge 146:22da6e220af6 1629 * @arg @ref LL_RCC_PLLM_DIV_29
AnnaBridge 146:22da6e220af6 1630 * @arg @ref LL_RCC_PLLM_DIV_30
AnnaBridge 146:22da6e220af6 1631 * @arg @ref LL_RCC_PLLM_DIV_31
AnnaBridge 146:22da6e220af6 1632 * @arg @ref LL_RCC_PLLM_DIV_32
AnnaBridge 146:22da6e220af6 1633 * @arg @ref LL_RCC_PLLM_DIV_33
AnnaBridge 146:22da6e220af6 1634 * @arg @ref LL_RCC_PLLM_DIV_34
AnnaBridge 146:22da6e220af6 1635 * @arg @ref LL_RCC_PLLM_DIV_35
AnnaBridge 146:22da6e220af6 1636 * @arg @ref LL_RCC_PLLM_DIV_36
AnnaBridge 146:22da6e220af6 1637 * @arg @ref LL_RCC_PLLM_DIV_37
AnnaBridge 146:22da6e220af6 1638 * @arg @ref LL_RCC_PLLM_DIV_38
AnnaBridge 146:22da6e220af6 1639 * @arg @ref LL_RCC_PLLM_DIV_39
AnnaBridge 146:22da6e220af6 1640 * @arg @ref LL_RCC_PLLM_DIV_40
AnnaBridge 146:22da6e220af6 1641 * @arg @ref LL_RCC_PLLM_DIV_41
AnnaBridge 146:22da6e220af6 1642 * @arg @ref LL_RCC_PLLM_DIV_42
AnnaBridge 146:22da6e220af6 1643 * @arg @ref LL_RCC_PLLM_DIV_43
AnnaBridge 146:22da6e220af6 1644 * @arg @ref LL_RCC_PLLM_DIV_44
AnnaBridge 146:22da6e220af6 1645 * @arg @ref LL_RCC_PLLM_DIV_45
AnnaBridge 146:22da6e220af6 1646 * @arg @ref LL_RCC_PLLM_DIV_46
AnnaBridge 146:22da6e220af6 1647 * @arg @ref LL_RCC_PLLM_DIV_47
AnnaBridge 146:22da6e220af6 1648 * @arg @ref LL_RCC_PLLM_DIV_48
AnnaBridge 146:22da6e220af6 1649 * @arg @ref LL_RCC_PLLM_DIV_49
AnnaBridge 146:22da6e220af6 1650 * @arg @ref LL_RCC_PLLM_DIV_50
AnnaBridge 146:22da6e220af6 1651 * @arg @ref LL_RCC_PLLM_DIV_51
AnnaBridge 146:22da6e220af6 1652 * @arg @ref LL_RCC_PLLM_DIV_52
AnnaBridge 146:22da6e220af6 1653 * @arg @ref LL_RCC_PLLM_DIV_53
AnnaBridge 146:22da6e220af6 1654 * @arg @ref LL_RCC_PLLM_DIV_54
AnnaBridge 146:22da6e220af6 1655 * @arg @ref LL_RCC_PLLM_DIV_55
AnnaBridge 146:22da6e220af6 1656 * @arg @ref LL_RCC_PLLM_DIV_56
AnnaBridge 146:22da6e220af6 1657 * @arg @ref LL_RCC_PLLM_DIV_57
AnnaBridge 146:22da6e220af6 1658 * @arg @ref LL_RCC_PLLM_DIV_58
AnnaBridge 146:22da6e220af6 1659 * @arg @ref LL_RCC_PLLM_DIV_59
AnnaBridge 146:22da6e220af6 1660 * @arg @ref LL_RCC_PLLM_DIV_60
AnnaBridge 146:22da6e220af6 1661 * @arg @ref LL_RCC_PLLM_DIV_61
AnnaBridge 146:22da6e220af6 1662 * @arg @ref LL_RCC_PLLM_DIV_62
AnnaBridge 146:22da6e220af6 1663 * @arg @ref LL_RCC_PLLM_DIV_63
AnnaBridge 146:22da6e220af6 1664 * @param __PLLN__ Between 50 and 432
AnnaBridge 146:22da6e220af6 1665 * @param __PLLR__ This parameter can be one of the following values:
AnnaBridge 146:22da6e220af6 1666 * @arg @ref LL_RCC_PLLR_DIV_2
AnnaBridge 146:22da6e220af6 1667 * @arg @ref LL_RCC_PLLR_DIV_3
AnnaBridge 146:22da6e220af6 1668 * @arg @ref LL_RCC_PLLR_DIV_4
AnnaBridge 146:22da6e220af6 1669 * @arg @ref LL_RCC_PLLR_DIV_5
AnnaBridge 146:22da6e220af6 1670 * @arg @ref LL_RCC_PLLR_DIV_6
AnnaBridge 146:22da6e220af6 1671 * @arg @ref LL_RCC_PLLR_DIV_7
AnnaBridge 146:22da6e220af6 1672 * @retval PLL clock frequency (in Hz)
AnnaBridge 146:22da6e220af6 1673 */
AnnaBridge 146:22da6e220af6 1674 #define __LL_RCC_CALC_PLLRCLK_FREQ(__INPUTFREQ__, __PLLM__, __PLLN__, __PLLR__) ((__INPUTFREQ__) / (__PLLM__) * (__PLLN__) / \
AnnaBridge 146:22da6e220af6 1675 ((__PLLR__) >> RCC_PLLCFGR_PLLR_Pos ))
AnnaBridge 146:22da6e220af6 1676
AnnaBridge 146:22da6e220af6 1677 #endif /* RCC_PLLR_SYSCLK_SUPPORT */
AnnaBridge 146:22da6e220af6 1678
AnnaBridge 146:22da6e220af6 1679 /**
AnnaBridge 146:22da6e220af6 1680 * @brief Helper macro to calculate the PLLCLK frequency used on 48M domain
AnnaBridge 146:22da6e220af6 1681 * @note ex: @ref __LL_RCC_CALC_PLLCLK_48M_FREQ (HSE_VALUE,@ref LL_RCC_PLL_GetDivider (),
AnnaBridge 146:22da6e220af6 1682 * @ref LL_RCC_PLL_GetN (), @ref LL_RCC_PLL_GetQ ());
AnnaBridge 146:22da6e220af6 1683 * @param __INPUTFREQ__ PLL Input frequency (based on HSE/HSI)
AnnaBridge 146:22da6e220af6 1684 * @param __PLLM__ This parameter can be one of the following values:
AnnaBridge 146:22da6e220af6 1685 * @arg @ref LL_RCC_PLLM_DIV_2
AnnaBridge 146:22da6e220af6 1686 * @arg @ref LL_RCC_PLLM_DIV_3
AnnaBridge 146:22da6e220af6 1687 * @arg @ref LL_RCC_PLLM_DIV_4
AnnaBridge 146:22da6e220af6 1688 * @arg @ref LL_RCC_PLLM_DIV_5
AnnaBridge 146:22da6e220af6 1689 * @arg @ref LL_RCC_PLLM_DIV_6
AnnaBridge 146:22da6e220af6 1690 * @arg @ref LL_RCC_PLLM_DIV_7
AnnaBridge 146:22da6e220af6 1691 * @arg @ref LL_RCC_PLLM_DIV_8
AnnaBridge 146:22da6e220af6 1692 * @arg @ref LL_RCC_PLLM_DIV_9
AnnaBridge 146:22da6e220af6 1693 * @arg @ref LL_RCC_PLLM_DIV_10
AnnaBridge 146:22da6e220af6 1694 * @arg @ref LL_RCC_PLLM_DIV_11
AnnaBridge 146:22da6e220af6 1695 * @arg @ref LL_RCC_PLLM_DIV_12
AnnaBridge 146:22da6e220af6 1696 * @arg @ref LL_RCC_PLLM_DIV_13
AnnaBridge 146:22da6e220af6 1697 * @arg @ref LL_RCC_PLLM_DIV_14
AnnaBridge 146:22da6e220af6 1698 * @arg @ref LL_RCC_PLLM_DIV_15
AnnaBridge 146:22da6e220af6 1699 * @arg @ref LL_RCC_PLLM_DIV_16
AnnaBridge 146:22da6e220af6 1700 * @arg @ref LL_RCC_PLLM_DIV_17
AnnaBridge 146:22da6e220af6 1701 * @arg @ref LL_RCC_PLLM_DIV_18
AnnaBridge 146:22da6e220af6 1702 * @arg @ref LL_RCC_PLLM_DIV_19
AnnaBridge 146:22da6e220af6 1703 * @arg @ref LL_RCC_PLLM_DIV_20
AnnaBridge 146:22da6e220af6 1704 * @arg @ref LL_RCC_PLLM_DIV_21
AnnaBridge 146:22da6e220af6 1705 * @arg @ref LL_RCC_PLLM_DIV_22
AnnaBridge 146:22da6e220af6 1706 * @arg @ref LL_RCC_PLLM_DIV_23
AnnaBridge 146:22da6e220af6 1707 * @arg @ref LL_RCC_PLLM_DIV_24
AnnaBridge 146:22da6e220af6 1708 * @arg @ref LL_RCC_PLLM_DIV_25
AnnaBridge 146:22da6e220af6 1709 * @arg @ref LL_RCC_PLLM_DIV_26
AnnaBridge 146:22da6e220af6 1710 * @arg @ref LL_RCC_PLLM_DIV_27
AnnaBridge 146:22da6e220af6 1711 * @arg @ref LL_RCC_PLLM_DIV_28
AnnaBridge 146:22da6e220af6 1712 * @arg @ref LL_RCC_PLLM_DIV_29
AnnaBridge 146:22da6e220af6 1713 * @arg @ref LL_RCC_PLLM_DIV_30
AnnaBridge 146:22da6e220af6 1714 * @arg @ref LL_RCC_PLLM_DIV_31
AnnaBridge 146:22da6e220af6 1715 * @arg @ref LL_RCC_PLLM_DIV_32
AnnaBridge 146:22da6e220af6 1716 * @arg @ref LL_RCC_PLLM_DIV_33
AnnaBridge 146:22da6e220af6 1717 * @arg @ref LL_RCC_PLLM_DIV_34
AnnaBridge 146:22da6e220af6 1718 * @arg @ref LL_RCC_PLLM_DIV_35
AnnaBridge 146:22da6e220af6 1719 * @arg @ref LL_RCC_PLLM_DIV_36
AnnaBridge 146:22da6e220af6 1720 * @arg @ref LL_RCC_PLLM_DIV_37
AnnaBridge 146:22da6e220af6 1721 * @arg @ref LL_RCC_PLLM_DIV_38
AnnaBridge 146:22da6e220af6 1722 * @arg @ref LL_RCC_PLLM_DIV_39
AnnaBridge 146:22da6e220af6 1723 * @arg @ref LL_RCC_PLLM_DIV_40
AnnaBridge 146:22da6e220af6 1724 * @arg @ref LL_RCC_PLLM_DIV_41
AnnaBridge 146:22da6e220af6 1725 * @arg @ref LL_RCC_PLLM_DIV_42
AnnaBridge 146:22da6e220af6 1726 * @arg @ref LL_RCC_PLLM_DIV_43
AnnaBridge 146:22da6e220af6 1727 * @arg @ref LL_RCC_PLLM_DIV_44
AnnaBridge 146:22da6e220af6 1728 * @arg @ref LL_RCC_PLLM_DIV_45
AnnaBridge 146:22da6e220af6 1729 * @arg @ref LL_RCC_PLLM_DIV_46
AnnaBridge 146:22da6e220af6 1730 * @arg @ref LL_RCC_PLLM_DIV_47
AnnaBridge 146:22da6e220af6 1731 * @arg @ref LL_RCC_PLLM_DIV_48
AnnaBridge 146:22da6e220af6 1732 * @arg @ref LL_RCC_PLLM_DIV_49
AnnaBridge 146:22da6e220af6 1733 * @arg @ref LL_RCC_PLLM_DIV_50
AnnaBridge 146:22da6e220af6 1734 * @arg @ref LL_RCC_PLLM_DIV_51
AnnaBridge 146:22da6e220af6 1735 * @arg @ref LL_RCC_PLLM_DIV_52
AnnaBridge 146:22da6e220af6 1736 * @arg @ref LL_RCC_PLLM_DIV_53
AnnaBridge 146:22da6e220af6 1737 * @arg @ref LL_RCC_PLLM_DIV_54
AnnaBridge 146:22da6e220af6 1738 * @arg @ref LL_RCC_PLLM_DIV_55
AnnaBridge 146:22da6e220af6 1739 * @arg @ref LL_RCC_PLLM_DIV_56
AnnaBridge 146:22da6e220af6 1740 * @arg @ref LL_RCC_PLLM_DIV_57
AnnaBridge 146:22da6e220af6 1741 * @arg @ref LL_RCC_PLLM_DIV_58
AnnaBridge 146:22da6e220af6 1742 * @arg @ref LL_RCC_PLLM_DIV_59
AnnaBridge 146:22da6e220af6 1743 * @arg @ref LL_RCC_PLLM_DIV_60
AnnaBridge 146:22da6e220af6 1744 * @arg @ref LL_RCC_PLLM_DIV_61
AnnaBridge 146:22da6e220af6 1745 * @arg @ref LL_RCC_PLLM_DIV_62
AnnaBridge 146:22da6e220af6 1746 * @arg @ref LL_RCC_PLLM_DIV_63
AnnaBridge 146:22da6e220af6 1747 * @param __PLLN__ Between 50/192(*) and 432
AnnaBridge 146:22da6e220af6 1748 *
AnnaBridge 146:22da6e220af6 1749 * (*) value not defined in all devices.
AnnaBridge 146:22da6e220af6 1750 * @param __PLLQ__ This parameter can be one of the following values:
AnnaBridge 146:22da6e220af6 1751 * @arg @ref LL_RCC_PLLQ_DIV_2
AnnaBridge 146:22da6e220af6 1752 * @arg @ref LL_RCC_PLLQ_DIV_3
AnnaBridge 146:22da6e220af6 1753 * @arg @ref LL_RCC_PLLQ_DIV_4
AnnaBridge 146:22da6e220af6 1754 * @arg @ref LL_RCC_PLLQ_DIV_5
AnnaBridge 146:22da6e220af6 1755 * @arg @ref LL_RCC_PLLQ_DIV_6
AnnaBridge 146:22da6e220af6 1756 * @arg @ref LL_RCC_PLLQ_DIV_7
AnnaBridge 146:22da6e220af6 1757 * @arg @ref LL_RCC_PLLQ_DIV_8
AnnaBridge 146:22da6e220af6 1758 * @arg @ref LL_RCC_PLLQ_DIV_9
AnnaBridge 146:22da6e220af6 1759 * @arg @ref LL_RCC_PLLQ_DIV_10
AnnaBridge 146:22da6e220af6 1760 * @arg @ref LL_RCC_PLLQ_DIV_11
AnnaBridge 146:22da6e220af6 1761 * @arg @ref LL_RCC_PLLQ_DIV_12
AnnaBridge 146:22da6e220af6 1762 * @arg @ref LL_RCC_PLLQ_DIV_13
AnnaBridge 146:22da6e220af6 1763 * @arg @ref LL_RCC_PLLQ_DIV_14
AnnaBridge 146:22da6e220af6 1764 * @arg @ref LL_RCC_PLLQ_DIV_15
AnnaBridge 146:22da6e220af6 1765 * @retval PLL clock frequency (in Hz)
AnnaBridge 146:22da6e220af6 1766 */
AnnaBridge 146:22da6e220af6 1767 #define __LL_RCC_CALC_PLLCLK_48M_FREQ(__INPUTFREQ__, __PLLM__, __PLLN__, __PLLQ__) ((__INPUTFREQ__) / (__PLLM__) * (__PLLN__) / \
AnnaBridge 146:22da6e220af6 1768 ((__PLLQ__) >> RCC_PLLCFGR_PLLQ_Pos ))
AnnaBridge 146:22da6e220af6 1769
AnnaBridge 146:22da6e220af6 1770 #if defined(DSI)
AnnaBridge 146:22da6e220af6 1771 /**
AnnaBridge 146:22da6e220af6 1772 * @brief Helper macro to calculate the PLLCLK frequency used on DSI
AnnaBridge 146:22da6e220af6 1773 * @note ex: @ref __LL_RCC_CALC_PLLCLK_DSI_FREQ (HSE_VALUE, @ref LL_RCC_PLL_GetDivider (),
AnnaBridge 146:22da6e220af6 1774 * @ref LL_RCC_PLL_GetN (), @ref LL_RCC_PLL_GetR ());
AnnaBridge 146:22da6e220af6 1775 * @param __INPUTFREQ__ PLL Input frequency (based on HSE/HSI)
AnnaBridge 146:22da6e220af6 1776 * @param __PLLM__ This parameter can be one of the following values:
AnnaBridge 146:22da6e220af6 1777 * @arg @ref LL_RCC_PLLM_DIV_2
AnnaBridge 146:22da6e220af6 1778 * @arg @ref LL_RCC_PLLM_DIV_3
AnnaBridge 146:22da6e220af6 1779 * @arg @ref LL_RCC_PLLM_DIV_4
AnnaBridge 146:22da6e220af6 1780 * @arg @ref LL_RCC_PLLM_DIV_5
AnnaBridge 146:22da6e220af6 1781 * @arg @ref LL_RCC_PLLM_DIV_6
AnnaBridge 146:22da6e220af6 1782 * @arg @ref LL_RCC_PLLM_DIV_7
AnnaBridge 146:22da6e220af6 1783 * @arg @ref LL_RCC_PLLM_DIV_8
AnnaBridge 146:22da6e220af6 1784 * @arg @ref LL_RCC_PLLM_DIV_9
AnnaBridge 146:22da6e220af6 1785 * @arg @ref LL_RCC_PLLM_DIV_10
AnnaBridge 146:22da6e220af6 1786 * @arg @ref LL_RCC_PLLM_DIV_11
AnnaBridge 146:22da6e220af6 1787 * @arg @ref LL_RCC_PLLM_DIV_12
AnnaBridge 146:22da6e220af6 1788 * @arg @ref LL_RCC_PLLM_DIV_13
AnnaBridge 146:22da6e220af6 1789 * @arg @ref LL_RCC_PLLM_DIV_14
AnnaBridge 146:22da6e220af6 1790 * @arg @ref LL_RCC_PLLM_DIV_15
AnnaBridge 146:22da6e220af6 1791 * @arg @ref LL_RCC_PLLM_DIV_16
AnnaBridge 146:22da6e220af6 1792 * @arg @ref LL_RCC_PLLM_DIV_17
AnnaBridge 146:22da6e220af6 1793 * @arg @ref LL_RCC_PLLM_DIV_18
AnnaBridge 146:22da6e220af6 1794 * @arg @ref LL_RCC_PLLM_DIV_19
AnnaBridge 146:22da6e220af6 1795 * @arg @ref LL_RCC_PLLM_DIV_20
AnnaBridge 146:22da6e220af6 1796 * @arg @ref LL_RCC_PLLM_DIV_21
AnnaBridge 146:22da6e220af6 1797 * @arg @ref LL_RCC_PLLM_DIV_22
AnnaBridge 146:22da6e220af6 1798 * @arg @ref LL_RCC_PLLM_DIV_23
AnnaBridge 146:22da6e220af6 1799 * @arg @ref LL_RCC_PLLM_DIV_24
AnnaBridge 146:22da6e220af6 1800 * @arg @ref LL_RCC_PLLM_DIV_25
AnnaBridge 146:22da6e220af6 1801 * @arg @ref LL_RCC_PLLM_DIV_26
AnnaBridge 146:22da6e220af6 1802 * @arg @ref LL_RCC_PLLM_DIV_27
AnnaBridge 146:22da6e220af6 1803 * @arg @ref LL_RCC_PLLM_DIV_28
AnnaBridge 146:22da6e220af6 1804 * @arg @ref LL_RCC_PLLM_DIV_29
AnnaBridge 146:22da6e220af6 1805 * @arg @ref LL_RCC_PLLM_DIV_30
AnnaBridge 146:22da6e220af6 1806 * @arg @ref LL_RCC_PLLM_DIV_31
AnnaBridge 146:22da6e220af6 1807 * @arg @ref LL_RCC_PLLM_DIV_32
AnnaBridge 146:22da6e220af6 1808 * @arg @ref LL_RCC_PLLM_DIV_33
AnnaBridge 146:22da6e220af6 1809 * @arg @ref LL_RCC_PLLM_DIV_34
AnnaBridge 146:22da6e220af6 1810 * @arg @ref LL_RCC_PLLM_DIV_35
AnnaBridge 146:22da6e220af6 1811 * @arg @ref LL_RCC_PLLM_DIV_36
AnnaBridge 146:22da6e220af6 1812 * @arg @ref LL_RCC_PLLM_DIV_37
AnnaBridge 146:22da6e220af6 1813 * @arg @ref LL_RCC_PLLM_DIV_38
AnnaBridge 146:22da6e220af6 1814 * @arg @ref LL_RCC_PLLM_DIV_39
AnnaBridge 146:22da6e220af6 1815 * @arg @ref LL_RCC_PLLM_DIV_40
AnnaBridge 146:22da6e220af6 1816 * @arg @ref LL_RCC_PLLM_DIV_41
AnnaBridge 146:22da6e220af6 1817 * @arg @ref LL_RCC_PLLM_DIV_42
AnnaBridge 146:22da6e220af6 1818 * @arg @ref LL_RCC_PLLM_DIV_43
AnnaBridge 146:22da6e220af6 1819 * @arg @ref LL_RCC_PLLM_DIV_44
AnnaBridge 146:22da6e220af6 1820 * @arg @ref LL_RCC_PLLM_DIV_45
AnnaBridge 146:22da6e220af6 1821 * @arg @ref LL_RCC_PLLM_DIV_46
AnnaBridge 146:22da6e220af6 1822 * @arg @ref LL_RCC_PLLM_DIV_47
AnnaBridge 146:22da6e220af6 1823 * @arg @ref LL_RCC_PLLM_DIV_48
AnnaBridge 146:22da6e220af6 1824 * @arg @ref LL_RCC_PLLM_DIV_49
AnnaBridge 146:22da6e220af6 1825 * @arg @ref LL_RCC_PLLM_DIV_50
AnnaBridge 146:22da6e220af6 1826 * @arg @ref LL_RCC_PLLM_DIV_51
AnnaBridge 146:22da6e220af6 1827 * @arg @ref LL_RCC_PLLM_DIV_52
AnnaBridge 146:22da6e220af6 1828 * @arg @ref LL_RCC_PLLM_DIV_53
AnnaBridge 146:22da6e220af6 1829 * @arg @ref LL_RCC_PLLM_DIV_54
AnnaBridge 146:22da6e220af6 1830 * @arg @ref LL_RCC_PLLM_DIV_55
AnnaBridge 146:22da6e220af6 1831 * @arg @ref LL_RCC_PLLM_DIV_56
AnnaBridge 146:22da6e220af6 1832 * @arg @ref LL_RCC_PLLM_DIV_57
AnnaBridge 146:22da6e220af6 1833 * @arg @ref LL_RCC_PLLM_DIV_58
AnnaBridge 146:22da6e220af6 1834 * @arg @ref LL_RCC_PLLM_DIV_59
AnnaBridge 146:22da6e220af6 1835 * @arg @ref LL_RCC_PLLM_DIV_60
AnnaBridge 146:22da6e220af6 1836 * @arg @ref LL_RCC_PLLM_DIV_61
AnnaBridge 146:22da6e220af6 1837 * @arg @ref LL_RCC_PLLM_DIV_62
AnnaBridge 146:22da6e220af6 1838 * @arg @ref LL_RCC_PLLM_DIV_63
AnnaBridge 146:22da6e220af6 1839 * @param __PLLN__ Between 50 and 432
AnnaBridge 146:22da6e220af6 1840 * @param __PLLR__ This parameter can be one of the following values:
AnnaBridge 146:22da6e220af6 1841 * @arg @ref LL_RCC_PLLR_DIV_2
AnnaBridge 146:22da6e220af6 1842 * @arg @ref LL_RCC_PLLR_DIV_3
AnnaBridge 146:22da6e220af6 1843 * @arg @ref LL_RCC_PLLR_DIV_4
AnnaBridge 146:22da6e220af6 1844 * @arg @ref LL_RCC_PLLR_DIV_5
AnnaBridge 146:22da6e220af6 1845 * @arg @ref LL_RCC_PLLR_DIV_6
AnnaBridge 146:22da6e220af6 1846 * @arg @ref LL_RCC_PLLR_DIV_7
AnnaBridge 146:22da6e220af6 1847 * @retval PLL clock frequency (in Hz)
AnnaBridge 146:22da6e220af6 1848 */
AnnaBridge 146:22da6e220af6 1849 #define __LL_RCC_CALC_PLLCLK_DSI_FREQ(__INPUTFREQ__, __PLLM__, __PLLN__, __PLLR__) ((__INPUTFREQ__) / (__PLLM__) * (__PLLN__) / \
AnnaBridge 146:22da6e220af6 1850 ((__PLLR__) >> RCC_PLLCFGR_PLLR_Pos ))
AnnaBridge 146:22da6e220af6 1851 #endif /* DSI */
AnnaBridge 146:22da6e220af6 1852
AnnaBridge 146:22da6e220af6 1853 #if defined(RCC_PLLR_I2S_CLKSOURCE_SUPPORT)
AnnaBridge 146:22da6e220af6 1854 /**
AnnaBridge 146:22da6e220af6 1855 * @brief Helper macro to calculate the PLLCLK frequency used on I2S
AnnaBridge 146:22da6e220af6 1856 * @note ex: @ref __LL_RCC_CALC_PLLCLK_I2S_FREQ (HSE_VALUE, @ref LL_RCC_PLL_GetDivider (),
AnnaBridge 146:22da6e220af6 1857 * @ref LL_RCC_PLL_GetN (), @ref LL_RCC_PLL_GetR ());
AnnaBridge 146:22da6e220af6 1858 * @param __INPUTFREQ__ PLL Input frequency (based on HSE/HSI)
AnnaBridge 146:22da6e220af6 1859 * @param __PLLM__ This parameter can be one of the following values:
AnnaBridge 146:22da6e220af6 1860 * @arg @ref LL_RCC_PLLM_DIV_2
AnnaBridge 146:22da6e220af6 1861 * @arg @ref LL_RCC_PLLM_DIV_3
AnnaBridge 146:22da6e220af6 1862 * @arg @ref LL_RCC_PLLM_DIV_4
AnnaBridge 146:22da6e220af6 1863 * @arg @ref LL_RCC_PLLM_DIV_5
AnnaBridge 146:22da6e220af6 1864 * @arg @ref LL_RCC_PLLM_DIV_6
AnnaBridge 146:22da6e220af6 1865 * @arg @ref LL_RCC_PLLM_DIV_7
AnnaBridge 146:22da6e220af6 1866 * @arg @ref LL_RCC_PLLM_DIV_8
AnnaBridge 146:22da6e220af6 1867 * @arg @ref LL_RCC_PLLM_DIV_9
AnnaBridge 146:22da6e220af6 1868 * @arg @ref LL_RCC_PLLM_DIV_10
AnnaBridge 146:22da6e220af6 1869 * @arg @ref LL_RCC_PLLM_DIV_11
AnnaBridge 146:22da6e220af6 1870 * @arg @ref LL_RCC_PLLM_DIV_12
AnnaBridge 146:22da6e220af6 1871 * @arg @ref LL_RCC_PLLM_DIV_13
AnnaBridge 146:22da6e220af6 1872 * @arg @ref LL_RCC_PLLM_DIV_14
AnnaBridge 146:22da6e220af6 1873 * @arg @ref LL_RCC_PLLM_DIV_15
AnnaBridge 146:22da6e220af6 1874 * @arg @ref LL_RCC_PLLM_DIV_16
AnnaBridge 146:22da6e220af6 1875 * @arg @ref LL_RCC_PLLM_DIV_17
AnnaBridge 146:22da6e220af6 1876 * @arg @ref LL_RCC_PLLM_DIV_18
AnnaBridge 146:22da6e220af6 1877 * @arg @ref LL_RCC_PLLM_DIV_19
AnnaBridge 146:22da6e220af6 1878 * @arg @ref LL_RCC_PLLM_DIV_20
AnnaBridge 146:22da6e220af6 1879 * @arg @ref LL_RCC_PLLM_DIV_21
AnnaBridge 146:22da6e220af6 1880 * @arg @ref LL_RCC_PLLM_DIV_22
AnnaBridge 146:22da6e220af6 1881 * @arg @ref LL_RCC_PLLM_DIV_23
AnnaBridge 146:22da6e220af6 1882 * @arg @ref LL_RCC_PLLM_DIV_24
AnnaBridge 146:22da6e220af6 1883 * @arg @ref LL_RCC_PLLM_DIV_25
AnnaBridge 146:22da6e220af6 1884 * @arg @ref LL_RCC_PLLM_DIV_26
AnnaBridge 146:22da6e220af6 1885 * @arg @ref LL_RCC_PLLM_DIV_27
AnnaBridge 146:22da6e220af6 1886 * @arg @ref LL_RCC_PLLM_DIV_28
AnnaBridge 146:22da6e220af6 1887 * @arg @ref LL_RCC_PLLM_DIV_29
AnnaBridge 146:22da6e220af6 1888 * @arg @ref LL_RCC_PLLM_DIV_30
AnnaBridge 146:22da6e220af6 1889 * @arg @ref LL_RCC_PLLM_DIV_31
AnnaBridge 146:22da6e220af6 1890 * @arg @ref LL_RCC_PLLM_DIV_32
AnnaBridge 146:22da6e220af6 1891 * @arg @ref LL_RCC_PLLM_DIV_33
AnnaBridge 146:22da6e220af6 1892 * @arg @ref LL_RCC_PLLM_DIV_34
AnnaBridge 146:22da6e220af6 1893 * @arg @ref LL_RCC_PLLM_DIV_35
AnnaBridge 146:22da6e220af6 1894 * @arg @ref LL_RCC_PLLM_DIV_36
AnnaBridge 146:22da6e220af6 1895 * @arg @ref LL_RCC_PLLM_DIV_37
AnnaBridge 146:22da6e220af6 1896 * @arg @ref LL_RCC_PLLM_DIV_38
AnnaBridge 146:22da6e220af6 1897 * @arg @ref LL_RCC_PLLM_DIV_39
AnnaBridge 146:22da6e220af6 1898 * @arg @ref LL_RCC_PLLM_DIV_40
AnnaBridge 146:22da6e220af6 1899 * @arg @ref LL_RCC_PLLM_DIV_41
AnnaBridge 146:22da6e220af6 1900 * @arg @ref LL_RCC_PLLM_DIV_42
AnnaBridge 146:22da6e220af6 1901 * @arg @ref LL_RCC_PLLM_DIV_43
AnnaBridge 146:22da6e220af6 1902 * @arg @ref LL_RCC_PLLM_DIV_44
AnnaBridge 146:22da6e220af6 1903 * @arg @ref LL_RCC_PLLM_DIV_45
AnnaBridge 146:22da6e220af6 1904 * @arg @ref LL_RCC_PLLM_DIV_46
AnnaBridge 146:22da6e220af6 1905 * @arg @ref LL_RCC_PLLM_DIV_47
AnnaBridge 146:22da6e220af6 1906 * @arg @ref LL_RCC_PLLM_DIV_48
AnnaBridge 146:22da6e220af6 1907 * @arg @ref LL_RCC_PLLM_DIV_49
AnnaBridge 146:22da6e220af6 1908 * @arg @ref LL_RCC_PLLM_DIV_50
AnnaBridge 146:22da6e220af6 1909 * @arg @ref LL_RCC_PLLM_DIV_51
AnnaBridge 146:22da6e220af6 1910 * @arg @ref LL_RCC_PLLM_DIV_52
AnnaBridge 146:22da6e220af6 1911 * @arg @ref LL_RCC_PLLM_DIV_53
AnnaBridge 146:22da6e220af6 1912 * @arg @ref LL_RCC_PLLM_DIV_54
AnnaBridge 146:22da6e220af6 1913 * @arg @ref LL_RCC_PLLM_DIV_55
AnnaBridge 146:22da6e220af6 1914 * @arg @ref LL_RCC_PLLM_DIV_56
AnnaBridge 146:22da6e220af6 1915 * @arg @ref LL_RCC_PLLM_DIV_57
AnnaBridge 146:22da6e220af6 1916 * @arg @ref LL_RCC_PLLM_DIV_58
AnnaBridge 146:22da6e220af6 1917 * @arg @ref LL_RCC_PLLM_DIV_59
AnnaBridge 146:22da6e220af6 1918 * @arg @ref LL_RCC_PLLM_DIV_60
AnnaBridge 146:22da6e220af6 1919 * @arg @ref LL_RCC_PLLM_DIV_61
AnnaBridge 146:22da6e220af6 1920 * @arg @ref LL_RCC_PLLM_DIV_62
AnnaBridge 146:22da6e220af6 1921 * @arg @ref LL_RCC_PLLM_DIV_63
AnnaBridge 146:22da6e220af6 1922 * @param __PLLN__ Between 50 and 432
AnnaBridge 146:22da6e220af6 1923 * @param __PLLR__ This parameter can be one of the following values:
AnnaBridge 146:22da6e220af6 1924 * @arg @ref LL_RCC_PLLR_DIV_2
AnnaBridge 146:22da6e220af6 1925 * @arg @ref LL_RCC_PLLR_DIV_3
AnnaBridge 146:22da6e220af6 1926 * @arg @ref LL_RCC_PLLR_DIV_4
AnnaBridge 146:22da6e220af6 1927 * @arg @ref LL_RCC_PLLR_DIV_5
AnnaBridge 146:22da6e220af6 1928 * @arg @ref LL_RCC_PLLR_DIV_6
AnnaBridge 146:22da6e220af6 1929 * @arg @ref LL_RCC_PLLR_DIV_7
AnnaBridge 146:22da6e220af6 1930 * @retval PLL clock frequency (in Hz)
AnnaBridge 146:22da6e220af6 1931 */
AnnaBridge 146:22da6e220af6 1932 #define __LL_RCC_CALC_PLLCLK_I2S_FREQ(__INPUTFREQ__, __PLLM__, __PLLN__, __PLLR__) ((__INPUTFREQ__) / (__PLLM__) * (__PLLN__) / \
AnnaBridge 146:22da6e220af6 1933 ((__PLLR__) >> RCC_PLLCFGR_PLLR_Pos ))
AnnaBridge 146:22da6e220af6 1934 #endif /* RCC_PLLR_I2S_CLKSOURCE_SUPPORT */
AnnaBridge 146:22da6e220af6 1935
AnnaBridge 146:22da6e220af6 1936 #if defined(SPDIFRX)
AnnaBridge 146:22da6e220af6 1937 /**
AnnaBridge 146:22da6e220af6 1938 * @brief Helper macro to calculate the PLLCLK frequency used on SPDIFRX
AnnaBridge 146:22da6e220af6 1939 * @note ex: @ref __LL_RCC_CALC_PLLCLK_SPDIFRX_FREQ (HSE_VALUE, @ref LL_RCC_PLL_GetDivider (),
AnnaBridge 146:22da6e220af6 1940 * @ref LL_RCC_PLL_GetN (), @ref LL_RCC_PLL_GetR ());
AnnaBridge 146:22da6e220af6 1941 * @param __INPUTFREQ__ PLL Input frequency (based on HSE/HSI)
AnnaBridge 146:22da6e220af6 1942 * @param __PLLM__ This parameter can be one of the following values:
AnnaBridge 146:22da6e220af6 1943 * @arg @ref LL_RCC_PLLM_DIV_2
AnnaBridge 146:22da6e220af6 1944 * @arg @ref LL_RCC_PLLM_DIV_3
AnnaBridge 146:22da6e220af6 1945 * @arg @ref LL_RCC_PLLM_DIV_4
AnnaBridge 146:22da6e220af6 1946 * @arg @ref LL_RCC_PLLM_DIV_5
AnnaBridge 146:22da6e220af6 1947 * @arg @ref LL_RCC_PLLM_DIV_6
AnnaBridge 146:22da6e220af6 1948 * @arg @ref LL_RCC_PLLM_DIV_7
AnnaBridge 146:22da6e220af6 1949 * @arg @ref LL_RCC_PLLM_DIV_8
AnnaBridge 146:22da6e220af6 1950 * @arg @ref LL_RCC_PLLM_DIV_9
AnnaBridge 146:22da6e220af6 1951 * @arg @ref LL_RCC_PLLM_DIV_10
AnnaBridge 146:22da6e220af6 1952 * @arg @ref LL_RCC_PLLM_DIV_11
AnnaBridge 146:22da6e220af6 1953 * @arg @ref LL_RCC_PLLM_DIV_12
AnnaBridge 146:22da6e220af6 1954 * @arg @ref LL_RCC_PLLM_DIV_13
AnnaBridge 146:22da6e220af6 1955 * @arg @ref LL_RCC_PLLM_DIV_14
AnnaBridge 146:22da6e220af6 1956 * @arg @ref LL_RCC_PLLM_DIV_15
AnnaBridge 146:22da6e220af6 1957 * @arg @ref LL_RCC_PLLM_DIV_16
AnnaBridge 146:22da6e220af6 1958 * @arg @ref LL_RCC_PLLM_DIV_17
AnnaBridge 146:22da6e220af6 1959 * @arg @ref LL_RCC_PLLM_DIV_18
AnnaBridge 146:22da6e220af6 1960 * @arg @ref LL_RCC_PLLM_DIV_19
AnnaBridge 146:22da6e220af6 1961 * @arg @ref LL_RCC_PLLM_DIV_20
AnnaBridge 146:22da6e220af6 1962 * @arg @ref LL_RCC_PLLM_DIV_21
AnnaBridge 146:22da6e220af6 1963 * @arg @ref LL_RCC_PLLM_DIV_22
AnnaBridge 146:22da6e220af6 1964 * @arg @ref LL_RCC_PLLM_DIV_23
AnnaBridge 146:22da6e220af6 1965 * @arg @ref LL_RCC_PLLM_DIV_24
AnnaBridge 146:22da6e220af6 1966 * @arg @ref LL_RCC_PLLM_DIV_25
AnnaBridge 146:22da6e220af6 1967 * @arg @ref LL_RCC_PLLM_DIV_26
AnnaBridge 146:22da6e220af6 1968 * @arg @ref LL_RCC_PLLM_DIV_27
AnnaBridge 146:22da6e220af6 1969 * @arg @ref LL_RCC_PLLM_DIV_28
AnnaBridge 146:22da6e220af6 1970 * @arg @ref LL_RCC_PLLM_DIV_29
AnnaBridge 146:22da6e220af6 1971 * @arg @ref LL_RCC_PLLM_DIV_30
AnnaBridge 146:22da6e220af6 1972 * @arg @ref LL_RCC_PLLM_DIV_31
AnnaBridge 146:22da6e220af6 1973 * @arg @ref LL_RCC_PLLM_DIV_32
AnnaBridge 146:22da6e220af6 1974 * @arg @ref LL_RCC_PLLM_DIV_33
AnnaBridge 146:22da6e220af6 1975 * @arg @ref LL_RCC_PLLM_DIV_34
AnnaBridge 146:22da6e220af6 1976 * @arg @ref LL_RCC_PLLM_DIV_35
AnnaBridge 146:22da6e220af6 1977 * @arg @ref LL_RCC_PLLM_DIV_36
AnnaBridge 146:22da6e220af6 1978 * @arg @ref LL_RCC_PLLM_DIV_37
AnnaBridge 146:22da6e220af6 1979 * @arg @ref LL_RCC_PLLM_DIV_38
AnnaBridge 146:22da6e220af6 1980 * @arg @ref LL_RCC_PLLM_DIV_39
AnnaBridge 146:22da6e220af6 1981 * @arg @ref LL_RCC_PLLM_DIV_40
AnnaBridge 146:22da6e220af6 1982 * @arg @ref LL_RCC_PLLM_DIV_41
AnnaBridge 146:22da6e220af6 1983 * @arg @ref LL_RCC_PLLM_DIV_42
AnnaBridge 146:22da6e220af6 1984 * @arg @ref LL_RCC_PLLM_DIV_43
AnnaBridge 146:22da6e220af6 1985 * @arg @ref LL_RCC_PLLM_DIV_44
AnnaBridge 146:22da6e220af6 1986 * @arg @ref LL_RCC_PLLM_DIV_45
AnnaBridge 146:22da6e220af6 1987 * @arg @ref LL_RCC_PLLM_DIV_46
AnnaBridge 146:22da6e220af6 1988 * @arg @ref LL_RCC_PLLM_DIV_47
AnnaBridge 146:22da6e220af6 1989 * @arg @ref LL_RCC_PLLM_DIV_48
AnnaBridge 146:22da6e220af6 1990 * @arg @ref LL_RCC_PLLM_DIV_49
AnnaBridge 146:22da6e220af6 1991 * @arg @ref LL_RCC_PLLM_DIV_50
AnnaBridge 146:22da6e220af6 1992 * @arg @ref LL_RCC_PLLM_DIV_51
AnnaBridge 146:22da6e220af6 1993 * @arg @ref LL_RCC_PLLM_DIV_52
AnnaBridge 146:22da6e220af6 1994 * @arg @ref LL_RCC_PLLM_DIV_53
AnnaBridge 146:22da6e220af6 1995 * @arg @ref LL_RCC_PLLM_DIV_54
AnnaBridge 146:22da6e220af6 1996 * @arg @ref LL_RCC_PLLM_DIV_55
AnnaBridge 146:22da6e220af6 1997 * @arg @ref LL_RCC_PLLM_DIV_56
AnnaBridge 146:22da6e220af6 1998 * @arg @ref LL_RCC_PLLM_DIV_57
AnnaBridge 146:22da6e220af6 1999 * @arg @ref LL_RCC_PLLM_DIV_58
AnnaBridge 146:22da6e220af6 2000 * @arg @ref LL_RCC_PLLM_DIV_59
AnnaBridge 146:22da6e220af6 2001 * @arg @ref LL_RCC_PLLM_DIV_60
AnnaBridge 146:22da6e220af6 2002 * @arg @ref LL_RCC_PLLM_DIV_61
AnnaBridge 146:22da6e220af6 2003 * @arg @ref LL_RCC_PLLM_DIV_62
AnnaBridge 146:22da6e220af6 2004 * @arg @ref LL_RCC_PLLM_DIV_63
AnnaBridge 146:22da6e220af6 2005 * @param __PLLN__ Between 50 and 432
AnnaBridge 146:22da6e220af6 2006 * @param __PLLR__ This parameter can be one of the following values:
AnnaBridge 146:22da6e220af6 2007 * @arg @ref LL_RCC_PLLR_DIV_2
AnnaBridge 146:22da6e220af6 2008 * @arg @ref LL_RCC_PLLR_DIV_3
AnnaBridge 146:22da6e220af6 2009 * @arg @ref LL_RCC_PLLR_DIV_4
AnnaBridge 146:22da6e220af6 2010 * @arg @ref LL_RCC_PLLR_DIV_5
AnnaBridge 146:22da6e220af6 2011 * @arg @ref LL_RCC_PLLR_DIV_6
AnnaBridge 146:22da6e220af6 2012 * @arg @ref LL_RCC_PLLR_DIV_7
AnnaBridge 146:22da6e220af6 2013 * @retval PLL clock frequency (in Hz)
AnnaBridge 146:22da6e220af6 2014 */
AnnaBridge 146:22da6e220af6 2015 #define __LL_RCC_CALC_PLLCLK_SPDIFRX_FREQ(__INPUTFREQ__, __PLLM__, __PLLN__, __PLLR__) ((__INPUTFREQ__) / (__PLLM__) * (__PLLN__) / \
AnnaBridge 146:22da6e220af6 2016 ((__PLLR__) >> RCC_PLLCFGR_PLLR_Pos ))
AnnaBridge 146:22da6e220af6 2017 #endif /* SPDIFRX */
AnnaBridge 146:22da6e220af6 2018
AnnaBridge 146:22da6e220af6 2019 #if defined(RCC_PLLCFGR_PLLR)
AnnaBridge 146:22da6e220af6 2020 #if defined(SAI1)
AnnaBridge 146:22da6e220af6 2021 /**
AnnaBridge 146:22da6e220af6 2022 * @brief Helper macro to calculate the PLLCLK frequency used on SAI
AnnaBridge 146:22da6e220af6 2023 * @note ex: @ref __LL_RCC_CALC_PLLCLK_SAI_FREQ (HSE_VALUE, @ref LL_RCC_PLL_GetDivider (),
AnnaBridge 146:22da6e220af6 2024 * @ref LL_RCC_PLL_GetN (), @ref LL_RCC_PLL_GetR (), @ref LL_RCC_PLL_GetDIVR ());
AnnaBridge 146:22da6e220af6 2025 * @param __INPUTFREQ__ PLL Input frequency (based on HSE/HSI)
AnnaBridge 146:22da6e220af6 2026 * @param __PLLM__ This parameter can be one of the following values:
AnnaBridge 146:22da6e220af6 2027 * @arg @ref LL_RCC_PLLM_DIV_2
AnnaBridge 146:22da6e220af6 2028 * @arg @ref LL_RCC_PLLM_DIV_3
AnnaBridge 146:22da6e220af6 2029 * @arg @ref LL_RCC_PLLM_DIV_4
AnnaBridge 146:22da6e220af6 2030 * @arg @ref LL_RCC_PLLM_DIV_5
AnnaBridge 146:22da6e220af6 2031 * @arg @ref LL_RCC_PLLM_DIV_6
AnnaBridge 146:22da6e220af6 2032 * @arg @ref LL_RCC_PLLM_DIV_7
AnnaBridge 146:22da6e220af6 2033 * @arg @ref LL_RCC_PLLM_DIV_8
AnnaBridge 146:22da6e220af6 2034 * @arg @ref LL_RCC_PLLM_DIV_9
AnnaBridge 146:22da6e220af6 2035 * @arg @ref LL_RCC_PLLM_DIV_10
AnnaBridge 146:22da6e220af6 2036 * @arg @ref LL_RCC_PLLM_DIV_11
AnnaBridge 146:22da6e220af6 2037 * @arg @ref LL_RCC_PLLM_DIV_12
AnnaBridge 146:22da6e220af6 2038 * @arg @ref LL_RCC_PLLM_DIV_13
AnnaBridge 146:22da6e220af6 2039 * @arg @ref LL_RCC_PLLM_DIV_14
AnnaBridge 146:22da6e220af6 2040 * @arg @ref LL_RCC_PLLM_DIV_15
AnnaBridge 146:22da6e220af6 2041 * @arg @ref LL_RCC_PLLM_DIV_16
AnnaBridge 146:22da6e220af6 2042 * @arg @ref LL_RCC_PLLM_DIV_17
AnnaBridge 146:22da6e220af6 2043 * @arg @ref LL_RCC_PLLM_DIV_18
AnnaBridge 146:22da6e220af6 2044 * @arg @ref LL_RCC_PLLM_DIV_19
AnnaBridge 146:22da6e220af6 2045 * @arg @ref LL_RCC_PLLM_DIV_20
AnnaBridge 146:22da6e220af6 2046 * @arg @ref LL_RCC_PLLM_DIV_21
AnnaBridge 146:22da6e220af6 2047 * @arg @ref LL_RCC_PLLM_DIV_22
AnnaBridge 146:22da6e220af6 2048 * @arg @ref LL_RCC_PLLM_DIV_23
AnnaBridge 146:22da6e220af6 2049 * @arg @ref LL_RCC_PLLM_DIV_24
AnnaBridge 146:22da6e220af6 2050 * @arg @ref LL_RCC_PLLM_DIV_25
AnnaBridge 146:22da6e220af6 2051 * @arg @ref LL_RCC_PLLM_DIV_26
AnnaBridge 146:22da6e220af6 2052 * @arg @ref LL_RCC_PLLM_DIV_27
AnnaBridge 146:22da6e220af6 2053 * @arg @ref LL_RCC_PLLM_DIV_28
AnnaBridge 146:22da6e220af6 2054 * @arg @ref LL_RCC_PLLM_DIV_29
AnnaBridge 146:22da6e220af6 2055 * @arg @ref LL_RCC_PLLM_DIV_30
AnnaBridge 146:22da6e220af6 2056 * @arg @ref LL_RCC_PLLM_DIV_31
AnnaBridge 146:22da6e220af6 2057 * @arg @ref LL_RCC_PLLM_DIV_32
AnnaBridge 146:22da6e220af6 2058 * @arg @ref LL_RCC_PLLM_DIV_33
AnnaBridge 146:22da6e220af6 2059 * @arg @ref LL_RCC_PLLM_DIV_34
AnnaBridge 146:22da6e220af6 2060 * @arg @ref LL_RCC_PLLM_DIV_35
AnnaBridge 146:22da6e220af6 2061 * @arg @ref LL_RCC_PLLM_DIV_36
AnnaBridge 146:22da6e220af6 2062 * @arg @ref LL_RCC_PLLM_DIV_37
AnnaBridge 146:22da6e220af6 2063 * @arg @ref LL_RCC_PLLM_DIV_38
AnnaBridge 146:22da6e220af6 2064 * @arg @ref LL_RCC_PLLM_DIV_39
AnnaBridge 146:22da6e220af6 2065 * @arg @ref LL_RCC_PLLM_DIV_40
AnnaBridge 146:22da6e220af6 2066 * @arg @ref LL_RCC_PLLM_DIV_41
AnnaBridge 146:22da6e220af6 2067 * @arg @ref LL_RCC_PLLM_DIV_42
AnnaBridge 146:22da6e220af6 2068 * @arg @ref LL_RCC_PLLM_DIV_43
AnnaBridge 146:22da6e220af6 2069 * @arg @ref LL_RCC_PLLM_DIV_44
AnnaBridge 146:22da6e220af6 2070 * @arg @ref LL_RCC_PLLM_DIV_45
AnnaBridge 146:22da6e220af6 2071 * @arg @ref LL_RCC_PLLM_DIV_46
AnnaBridge 146:22da6e220af6 2072 * @arg @ref LL_RCC_PLLM_DIV_47
AnnaBridge 146:22da6e220af6 2073 * @arg @ref LL_RCC_PLLM_DIV_48
AnnaBridge 146:22da6e220af6 2074 * @arg @ref LL_RCC_PLLM_DIV_49
AnnaBridge 146:22da6e220af6 2075 * @arg @ref LL_RCC_PLLM_DIV_50
AnnaBridge 146:22da6e220af6 2076 * @arg @ref LL_RCC_PLLM_DIV_51
AnnaBridge 146:22da6e220af6 2077 * @arg @ref LL_RCC_PLLM_DIV_52
AnnaBridge 146:22da6e220af6 2078 * @arg @ref LL_RCC_PLLM_DIV_53
AnnaBridge 146:22da6e220af6 2079 * @arg @ref LL_RCC_PLLM_DIV_54
AnnaBridge 146:22da6e220af6 2080 * @arg @ref LL_RCC_PLLM_DIV_55
AnnaBridge 146:22da6e220af6 2081 * @arg @ref LL_RCC_PLLM_DIV_56
AnnaBridge 146:22da6e220af6 2082 * @arg @ref LL_RCC_PLLM_DIV_57
AnnaBridge 146:22da6e220af6 2083 * @arg @ref LL_RCC_PLLM_DIV_58
AnnaBridge 146:22da6e220af6 2084 * @arg @ref LL_RCC_PLLM_DIV_59
AnnaBridge 146:22da6e220af6 2085 * @arg @ref LL_RCC_PLLM_DIV_60
AnnaBridge 146:22da6e220af6 2086 * @arg @ref LL_RCC_PLLM_DIV_61
AnnaBridge 146:22da6e220af6 2087 * @arg @ref LL_RCC_PLLM_DIV_62
AnnaBridge 146:22da6e220af6 2088 * @arg @ref LL_RCC_PLLM_DIV_63
AnnaBridge 146:22da6e220af6 2089 * @param __PLLN__ Between 50 and 432
AnnaBridge 146:22da6e220af6 2090 * @param __PLLR__ This parameter can be one of the following values:
AnnaBridge 146:22da6e220af6 2091 * @arg @ref LL_RCC_PLLR_DIV_2
AnnaBridge 146:22da6e220af6 2092 * @arg @ref LL_RCC_PLLR_DIV_3
AnnaBridge 146:22da6e220af6 2093 * @arg @ref LL_RCC_PLLR_DIV_4
AnnaBridge 146:22da6e220af6 2094 * @arg @ref LL_RCC_PLLR_DIV_5
AnnaBridge 146:22da6e220af6 2095 * @arg @ref LL_RCC_PLLR_DIV_6
AnnaBridge 146:22da6e220af6 2096 * @arg @ref LL_RCC_PLLR_DIV_7
AnnaBridge 146:22da6e220af6 2097 * @param __PLLDIVR__ This parameter can be one of the following values:
AnnaBridge 146:22da6e220af6 2098 * @arg @ref LL_RCC_PLLDIVR_DIV_1 (*)
AnnaBridge 146:22da6e220af6 2099 * @arg @ref LL_RCC_PLLDIVR_DIV_2 (*)
AnnaBridge 146:22da6e220af6 2100 * @arg @ref LL_RCC_PLLDIVR_DIV_3 (*)
AnnaBridge 146:22da6e220af6 2101 * @arg @ref LL_RCC_PLLDIVR_DIV_4 (*)
AnnaBridge 146:22da6e220af6 2102 * @arg @ref LL_RCC_PLLDIVR_DIV_5 (*)
AnnaBridge 146:22da6e220af6 2103 * @arg @ref LL_RCC_PLLDIVR_DIV_6 (*)
AnnaBridge 146:22da6e220af6 2104 * @arg @ref LL_RCC_PLLDIVR_DIV_7 (*)
AnnaBridge 146:22da6e220af6 2105 * @arg @ref LL_RCC_PLLDIVR_DIV_8 (*)
AnnaBridge 146:22da6e220af6 2106 * @arg @ref LL_RCC_PLLDIVR_DIV_9 (*)
AnnaBridge 146:22da6e220af6 2107 * @arg @ref LL_RCC_PLLDIVR_DIV_10 (*)
AnnaBridge 146:22da6e220af6 2108 * @arg @ref LL_RCC_PLLDIVR_DIV_11 (*)
AnnaBridge 146:22da6e220af6 2109 * @arg @ref LL_RCC_PLLDIVR_DIV_12 (*)
AnnaBridge 146:22da6e220af6 2110 * @arg @ref LL_RCC_PLLDIVR_DIV_13 (*)
AnnaBridge 146:22da6e220af6 2111 * @arg @ref LL_RCC_PLLDIVR_DIV_14 (*)
AnnaBridge 146:22da6e220af6 2112 * @arg @ref LL_RCC_PLLDIVR_DIV_15 (*)
AnnaBridge 146:22da6e220af6 2113 * @arg @ref LL_RCC_PLLDIVR_DIV_16 (*)
AnnaBridge 146:22da6e220af6 2114 * @arg @ref LL_RCC_PLLDIVR_DIV_17 (*)
AnnaBridge 146:22da6e220af6 2115 * @arg @ref LL_RCC_PLLDIVR_DIV_18 (*)
AnnaBridge 146:22da6e220af6 2116 * @arg @ref LL_RCC_PLLDIVR_DIV_19 (*)
AnnaBridge 146:22da6e220af6 2117 * @arg @ref LL_RCC_PLLDIVR_DIV_20 (*)
AnnaBridge 146:22da6e220af6 2118 * @arg @ref LL_RCC_PLLDIVR_DIV_21 (*)
AnnaBridge 146:22da6e220af6 2119 * @arg @ref LL_RCC_PLLDIVR_DIV_22 (*)
AnnaBridge 146:22da6e220af6 2120 * @arg @ref LL_RCC_PLLDIVR_DIV_23 (*)
AnnaBridge 146:22da6e220af6 2121 * @arg @ref LL_RCC_PLLDIVR_DIV_24 (*)
AnnaBridge 146:22da6e220af6 2122 * @arg @ref LL_RCC_PLLDIVR_DIV_25 (*)
AnnaBridge 146:22da6e220af6 2123 * @arg @ref LL_RCC_PLLDIVR_DIV_26 (*)
AnnaBridge 146:22da6e220af6 2124 * @arg @ref LL_RCC_PLLDIVR_DIV_27 (*)
AnnaBridge 146:22da6e220af6 2125 * @arg @ref LL_RCC_PLLDIVR_DIV_28 (*)
AnnaBridge 146:22da6e220af6 2126 * @arg @ref LL_RCC_PLLDIVR_DIV_29 (*)
AnnaBridge 146:22da6e220af6 2127 * @arg @ref LL_RCC_PLLDIVR_DIV_30 (*)
AnnaBridge 146:22da6e220af6 2128 * @arg @ref LL_RCC_PLLDIVR_DIV_31 (*)
AnnaBridge 146:22da6e220af6 2129 *
AnnaBridge 146:22da6e220af6 2130 * (*) value not defined in all devices.
AnnaBridge 146:22da6e220af6 2131 * @retval PLL clock frequency (in Hz)
AnnaBridge 146:22da6e220af6 2132 */
AnnaBridge 146:22da6e220af6 2133 #if defined(RCC_DCKCFGR_PLLDIVR)
AnnaBridge 146:22da6e220af6 2134 #define __LL_RCC_CALC_PLLCLK_SAI_FREQ(__INPUTFREQ__, __PLLM__, __PLLN__, __PLLR__, __PLLDIVR__) (((__INPUTFREQ__) / (__PLLM__) * (__PLLN__) / \
AnnaBridge 146:22da6e220af6 2135 ((__PLLR__) >> RCC_PLLCFGR_PLLR_Pos )) / ((__PLLDIVR__) >> RCC_DCKCFGR_PLLDIVR_Pos ))
AnnaBridge 146:22da6e220af6 2136 #else
AnnaBridge 146:22da6e220af6 2137 #define __LL_RCC_CALC_PLLCLK_SAI_FREQ(__INPUTFREQ__, __PLLM__, __PLLN__, __PLLR__) ((__INPUTFREQ__) / (__PLLM__) * (__PLLN__) / \
AnnaBridge 146:22da6e220af6 2138 ((__PLLR__) >> RCC_PLLCFGR_PLLR_Pos ))
AnnaBridge 146:22da6e220af6 2139 #endif /* RCC_DCKCFGR_PLLDIVR */
AnnaBridge 146:22da6e220af6 2140 #endif /* SAI1 */
AnnaBridge 146:22da6e220af6 2141 #endif /* RCC_PLLCFGR_PLLR */
AnnaBridge 146:22da6e220af6 2142
AnnaBridge 146:22da6e220af6 2143 #if defined(RCC_PLLSAI_SUPPORT)
AnnaBridge 146:22da6e220af6 2144 /**
AnnaBridge 146:22da6e220af6 2145 * @brief Helper macro to calculate the PLLSAI frequency used for SAI domain
AnnaBridge 146:22da6e220af6 2146 * @note ex: @ref __LL_RCC_CALC_PLLSAI_SAI_FREQ (HSE_VALUE,@ref LL_RCC_PLLSAI_GetDivider (),
AnnaBridge 146:22da6e220af6 2147 * @ref LL_RCC_PLLSAI_GetN (), @ref LL_RCC_PLLSAI_GetQ (), @ref LL_RCC_PLLSAI_GetDIVQ ());
AnnaBridge 146:22da6e220af6 2148 * @param __INPUTFREQ__ PLL Input frequency (based on HSE/HSI)
AnnaBridge 146:22da6e220af6 2149 * @param __PLLM__ This parameter can be one of the following values:
AnnaBridge 146:22da6e220af6 2150 * @arg @ref LL_RCC_PLLSAIM_DIV_2
AnnaBridge 146:22da6e220af6 2151 * @arg @ref LL_RCC_PLLSAIM_DIV_3
AnnaBridge 146:22da6e220af6 2152 * @arg @ref LL_RCC_PLLSAIM_DIV_4
AnnaBridge 146:22da6e220af6 2153 * @arg @ref LL_RCC_PLLSAIM_DIV_5
AnnaBridge 146:22da6e220af6 2154 * @arg @ref LL_RCC_PLLSAIM_DIV_6
AnnaBridge 146:22da6e220af6 2155 * @arg @ref LL_RCC_PLLSAIM_DIV_7
AnnaBridge 146:22da6e220af6 2156 * @arg @ref LL_RCC_PLLSAIM_DIV_8
AnnaBridge 146:22da6e220af6 2157 * @arg @ref LL_RCC_PLLSAIM_DIV_9
AnnaBridge 146:22da6e220af6 2158 * @arg @ref LL_RCC_PLLSAIM_DIV_10
AnnaBridge 146:22da6e220af6 2159 * @arg @ref LL_RCC_PLLSAIM_DIV_11
AnnaBridge 146:22da6e220af6 2160 * @arg @ref LL_RCC_PLLSAIM_DIV_12
AnnaBridge 146:22da6e220af6 2161 * @arg @ref LL_RCC_PLLSAIM_DIV_13
AnnaBridge 146:22da6e220af6 2162 * @arg @ref LL_RCC_PLLSAIM_DIV_14
AnnaBridge 146:22da6e220af6 2163 * @arg @ref LL_RCC_PLLSAIM_DIV_15
AnnaBridge 146:22da6e220af6 2164 * @arg @ref LL_RCC_PLLSAIM_DIV_16
AnnaBridge 146:22da6e220af6 2165 * @arg @ref LL_RCC_PLLSAIM_DIV_17
AnnaBridge 146:22da6e220af6 2166 * @arg @ref LL_RCC_PLLSAIM_DIV_18
AnnaBridge 146:22da6e220af6 2167 * @arg @ref LL_RCC_PLLSAIM_DIV_19
AnnaBridge 146:22da6e220af6 2168 * @arg @ref LL_RCC_PLLSAIM_DIV_20
AnnaBridge 146:22da6e220af6 2169 * @arg @ref LL_RCC_PLLSAIM_DIV_21
AnnaBridge 146:22da6e220af6 2170 * @arg @ref LL_RCC_PLLSAIM_DIV_22
AnnaBridge 146:22da6e220af6 2171 * @arg @ref LL_RCC_PLLSAIM_DIV_23
AnnaBridge 146:22da6e220af6 2172 * @arg @ref LL_RCC_PLLSAIM_DIV_24
AnnaBridge 146:22da6e220af6 2173 * @arg @ref LL_RCC_PLLSAIM_DIV_25
AnnaBridge 146:22da6e220af6 2174 * @arg @ref LL_RCC_PLLSAIM_DIV_26
AnnaBridge 146:22da6e220af6 2175 * @arg @ref LL_RCC_PLLSAIM_DIV_27
AnnaBridge 146:22da6e220af6 2176 * @arg @ref LL_RCC_PLLSAIM_DIV_28
AnnaBridge 146:22da6e220af6 2177 * @arg @ref LL_RCC_PLLSAIM_DIV_29
AnnaBridge 146:22da6e220af6 2178 * @arg @ref LL_RCC_PLLSAIM_DIV_30
AnnaBridge 146:22da6e220af6 2179 * @arg @ref LL_RCC_PLLSAIM_DIV_31
AnnaBridge 146:22da6e220af6 2180 * @arg @ref LL_RCC_PLLSAIM_DIV_32
AnnaBridge 146:22da6e220af6 2181 * @arg @ref LL_RCC_PLLSAIM_DIV_33
AnnaBridge 146:22da6e220af6 2182 * @arg @ref LL_RCC_PLLSAIM_DIV_34
AnnaBridge 146:22da6e220af6 2183 * @arg @ref LL_RCC_PLLSAIM_DIV_35
AnnaBridge 146:22da6e220af6 2184 * @arg @ref LL_RCC_PLLSAIM_DIV_36
AnnaBridge 146:22da6e220af6 2185 * @arg @ref LL_RCC_PLLSAIM_DIV_37
AnnaBridge 146:22da6e220af6 2186 * @arg @ref LL_RCC_PLLSAIM_DIV_38
AnnaBridge 146:22da6e220af6 2187 * @arg @ref LL_RCC_PLLSAIM_DIV_39
AnnaBridge 146:22da6e220af6 2188 * @arg @ref LL_RCC_PLLSAIM_DIV_40
AnnaBridge 146:22da6e220af6 2189 * @arg @ref LL_RCC_PLLSAIM_DIV_41
AnnaBridge 146:22da6e220af6 2190 * @arg @ref LL_RCC_PLLSAIM_DIV_42
AnnaBridge 146:22da6e220af6 2191 * @arg @ref LL_RCC_PLLSAIM_DIV_43
AnnaBridge 146:22da6e220af6 2192 * @arg @ref LL_RCC_PLLSAIM_DIV_44
AnnaBridge 146:22da6e220af6 2193 * @arg @ref LL_RCC_PLLSAIM_DIV_45
AnnaBridge 146:22da6e220af6 2194 * @arg @ref LL_RCC_PLLSAIM_DIV_46
AnnaBridge 146:22da6e220af6 2195 * @arg @ref LL_RCC_PLLSAIM_DIV_47
AnnaBridge 146:22da6e220af6 2196 * @arg @ref LL_RCC_PLLSAIM_DIV_48
AnnaBridge 146:22da6e220af6 2197 * @arg @ref LL_RCC_PLLSAIM_DIV_49
AnnaBridge 146:22da6e220af6 2198 * @arg @ref LL_RCC_PLLSAIM_DIV_50
AnnaBridge 146:22da6e220af6 2199 * @arg @ref LL_RCC_PLLSAIM_DIV_51
AnnaBridge 146:22da6e220af6 2200 * @arg @ref LL_RCC_PLLSAIM_DIV_52
AnnaBridge 146:22da6e220af6 2201 * @arg @ref LL_RCC_PLLSAIM_DIV_53
AnnaBridge 146:22da6e220af6 2202 * @arg @ref LL_RCC_PLLSAIM_DIV_54
AnnaBridge 146:22da6e220af6 2203 * @arg @ref LL_RCC_PLLSAIM_DIV_55
AnnaBridge 146:22da6e220af6 2204 * @arg @ref LL_RCC_PLLSAIM_DIV_56
AnnaBridge 146:22da6e220af6 2205 * @arg @ref LL_RCC_PLLSAIM_DIV_57
AnnaBridge 146:22da6e220af6 2206 * @arg @ref LL_RCC_PLLSAIM_DIV_58
AnnaBridge 146:22da6e220af6 2207 * @arg @ref LL_RCC_PLLSAIM_DIV_59
AnnaBridge 146:22da6e220af6 2208 * @arg @ref LL_RCC_PLLSAIM_DIV_60
AnnaBridge 146:22da6e220af6 2209 * @arg @ref LL_RCC_PLLSAIM_DIV_61
AnnaBridge 146:22da6e220af6 2210 * @arg @ref LL_RCC_PLLSAIM_DIV_62
AnnaBridge 146:22da6e220af6 2211 * @arg @ref LL_RCC_PLLSAIM_DIV_63
AnnaBridge 146:22da6e220af6 2212 * @param __PLLSAIN__ Between 49/50(*) and 432
AnnaBridge 146:22da6e220af6 2213 *
AnnaBridge 146:22da6e220af6 2214 * (*) value not defined in all devices.
AnnaBridge 146:22da6e220af6 2215 * @param __PLLSAIQ__ This parameter can be one of the following values:
AnnaBridge 146:22da6e220af6 2216 * @arg @ref LL_RCC_PLLSAIQ_DIV_2
AnnaBridge 146:22da6e220af6 2217 * @arg @ref LL_RCC_PLLSAIQ_DIV_3
AnnaBridge 146:22da6e220af6 2218 * @arg @ref LL_RCC_PLLSAIQ_DIV_4
AnnaBridge 146:22da6e220af6 2219 * @arg @ref LL_RCC_PLLSAIQ_DIV_5
AnnaBridge 146:22da6e220af6 2220 * @arg @ref LL_RCC_PLLSAIQ_DIV_6
AnnaBridge 146:22da6e220af6 2221 * @arg @ref LL_RCC_PLLSAIQ_DIV_7
AnnaBridge 146:22da6e220af6 2222 * @arg @ref LL_RCC_PLLSAIQ_DIV_8
AnnaBridge 146:22da6e220af6 2223 * @arg @ref LL_RCC_PLLSAIQ_DIV_9
AnnaBridge 146:22da6e220af6 2224 * @arg @ref LL_RCC_PLLSAIQ_DIV_10
AnnaBridge 146:22da6e220af6 2225 * @arg @ref LL_RCC_PLLSAIQ_DIV_11
AnnaBridge 146:22da6e220af6 2226 * @arg @ref LL_RCC_PLLSAIQ_DIV_12
AnnaBridge 146:22da6e220af6 2227 * @arg @ref LL_RCC_PLLSAIQ_DIV_13
AnnaBridge 146:22da6e220af6 2228 * @arg @ref LL_RCC_PLLSAIQ_DIV_14
AnnaBridge 146:22da6e220af6 2229 * @arg @ref LL_RCC_PLLSAIQ_DIV_15
AnnaBridge 146:22da6e220af6 2230 * @param __PLLSAIDIVQ__ This parameter can be one of the following values:
AnnaBridge 146:22da6e220af6 2231 * @arg @ref LL_RCC_PLLSAIDIVQ_DIV_1
AnnaBridge 146:22da6e220af6 2232 * @arg @ref LL_RCC_PLLSAIDIVQ_DIV_2
AnnaBridge 146:22da6e220af6 2233 * @arg @ref LL_RCC_PLLSAIDIVQ_DIV_3
AnnaBridge 146:22da6e220af6 2234 * @arg @ref LL_RCC_PLLSAIDIVQ_DIV_4
AnnaBridge 146:22da6e220af6 2235 * @arg @ref LL_RCC_PLLSAIDIVQ_DIV_5
AnnaBridge 146:22da6e220af6 2236 * @arg @ref LL_RCC_PLLSAIDIVQ_DIV_6
AnnaBridge 146:22da6e220af6 2237 * @arg @ref LL_RCC_PLLSAIDIVQ_DIV_7
AnnaBridge 146:22da6e220af6 2238 * @arg @ref LL_RCC_PLLSAIDIVQ_DIV_8
AnnaBridge 146:22da6e220af6 2239 * @arg @ref LL_RCC_PLLSAIDIVQ_DIV_9
AnnaBridge 146:22da6e220af6 2240 * @arg @ref LL_RCC_PLLSAIDIVQ_DIV_10
AnnaBridge 146:22da6e220af6 2241 * @arg @ref LL_RCC_PLLSAIDIVQ_DIV_11
AnnaBridge 146:22da6e220af6 2242 * @arg @ref LL_RCC_PLLSAIDIVQ_DIV_12
AnnaBridge 146:22da6e220af6 2243 * @arg @ref LL_RCC_PLLSAIDIVQ_DIV_13
AnnaBridge 146:22da6e220af6 2244 * @arg @ref LL_RCC_PLLSAIDIVQ_DIV_14
AnnaBridge 146:22da6e220af6 2245 * @arg @ref LL_RCC_PLLSAIDIVQ_DIV_15
AnnaBridge 146:22da6e220af6 2246 * @arg @ref LL_RCC_PLLSAIDIVQ_DIV_16
AnnaBridge 146:22da6e220af6 2247 * @arg @ref LL_RCC_PLLSAIDIVQ_DIV_17
AnnaBridge 146:22da6e220af6 2248 * @arg @ref LL_RCC_PLLSAIDIVQ_DIV_18
AnnaBridge 146:22da6e220af6 2249 * @arg @ref LL_RCC_PLLSAIDIVQ_DIV_19
AnnaBridge 146:22da6e220af6 2250 * @arg @ref LL_RCC_PLLSAIDIVQ_DIV_20
AnnaBridge 146:22da6e220af6 2251 * @arg @ref LL_RCC_PLLSAIDIVQ_DIV_21
AnnaBridge 146:22da6e220af6 2252 * @arg @ref LL_RCC_PLLSAIDIVQ_DIV_22
AnnaBridge 146:22da6e220af6 2253 * @arg @ref LL_RCC_PLLSAIDIVQ_DIV_23
AnnaBridge 146:22da6e220af6 2254 * @arg @ref LL_RCC_PLLSAIDIVQ_DIV_24
AnnaBridge 146:22da6e220af6 2255 * @arg @ref LL_RCC_PLLSAIDIVQ_DIV_25
AnnaBridge 146:22da6e220af6 2256 * @arg @ref LL_RCC_PLLSAIDIVQ_DIV_26
AnnaBridge 146:22da6e220af6 2257 * @arg @ref LL_RCC_PLLSAIDIVQ_DIV_27
AnnaBridge 146:22da6e220af6 2258 * @arg @ref LL_RCC_PLLSAIDIVQ_DIV_28
AnnaBridge 146:22da6e220af6 2259 * @arg @ref LL_RCC_PLLSAIDIVQ_DIV_29
AnnaBridge 146:22da6e220af6 2260 * @arg @ref LL_RCC_PLLSAIDIVQ_DIV_30
AnnaBridge 146:22da6e220af6 2261 * @arg @ref LL_RCC_PLLSAIDIVQ_DIV_31
AnnaBridge 146:22da6e220af6 2262 * @arg @ref LL_RCC_PLLSAIDIVQ_DIV_32
AnnaBridge 146:22da6e220af6 2263 * @retval PLLSAI clock frequency (in Hz)
AnnaBridge 146:22da6e220af6 2264 */
AnnaBridge 146:22da6e220af6 2265 #define __LL_RCC_CALC_PLLSAI_SAI_FREQ(__INPUTFREQ__, __PLLM__, __PLLSAIN__, __PLLSAIQ__, __PLLSAIDIVQ__) (((__INPUTFREQ__) / (__PLLM__)) * (__PLLSAIN__) / \
AnnaBridge 146:22da6e220af6 2266 (((__PLLSAIQ__) >> RCC_PLLSAICFGR_PLLSAIQ_Pos) * (((__PLLSAIDIVQ__) >> RCC_DCKCFGR_PLLSAIDIVQ_Pos) + 1U)))
AnnaBridge 146:22da6e220af6 2267
AnnaBridge 146:22da6e220af6 2268 #if defined(RCC_PLLSAICFGR_PLLSAIP)
AnnaBridge 146:22da6e220af6 2269 /**
AnnaBridge 146:22da6e220af6 2270 * @brief Helper macro to calculate the PLLSAI frequency used on 48Mhz domain
AnnaBridge 146:22da6e220af6 2271 * @note ex: @ref __LL_RCC_CALC_PLLSAI_48M_FREQ (HSE_VALUE,@ref LL_RCC_PLLSAI_GetDivider (),
AnnaBridge 146:22da6e220af6 2272 * @ref LL_RCC_PLLSAI_GetN (), @ref LL_RCC_PLLSAI_GetP ());
AnnaBridge 146:22da6e220af6 2273 * @param __INPUTFREQ__ PLL Input frequency (based on HSE/HSI)
AnnaBridge 146:22da6e220af6 2274 * @param __PLLM__ This parameter can be one of the following values:
AnnaBridge 146:22da6e220af6 2275 * @arg @ref LL_RCC_PLLSAIM_DIV_2
AnnaBridge 146:22da6e220af6 2276 * @arg @ref LL_RCC_PLLSAIM_DIV_3
AnnaBridge 146:22da6e220af6 2277 * @arg @ref LL_RCC_PLLSAIM_DIV_4
AnnaBridge 146:22da6e220af6 2278 * @arg @ref LL_RCC_PLLSAIM_DIV_5
AnnaBridge 146:22da6e220af6 2279 * @arg @ref LL_RCC_PLLSAIM_DIV_6
AnnaBridge 146:22da6e220af6 2280 * @arg @ref LL_RCC_PLLSAIM_DIV_7
AnnaBridge 146:22da6e220af6 2281 * @arg @ref LL_RCC_PLLSAIM_DIV_8
AnnaBridge 146:22da6e220af6 2282 * @arg @ref LL_RCC_PLLSAIM_DIV_9
AnnaBridge 146:22da6e220af6 2283 * @arg @ref LL_RCC_PLLSAIM_DIV_10
AnnaBridge 146:22da6e220af6 2284 * @arg @ref LL_RCC_PLLSAIM_DIV_11
AnnaBridge 146:22da6e220af6 2285 * @arg @ref LL_RCC_PLLSAIM_DIV_12
AnnaBridge 146:22da6e220af6 2286 * @arg @ref LL_RCC_PLLSAIM_DIV_13
AnnaBridge 146:22da6e220af6 2287 * @arg @ref LL_RCC_PLLSAIM_DIV_14
AnnaBridge 146:22da6e220af6 2288 * @arg @ref LL_RCC_PLLSAIM_DIV_15
AnnaBridge 146:22da6e220af6 2289 * @arg @ref LL_RCC_PLLSAIM_DIV_16
AnnaBridge 146:22da6e220af6 2290 * @arg @ref LL_RCC_PLLSAIM_DIV_17
AnnaBridge 146:22da6e220af6 2291 * @arg @ref LL_RCC_PLLSAIM_DIV_18
AnnaBridge 146:22da6e220af6 2292 * @arg @ref LL_RCC_PLLSAIM_DIV_19
AnnaBridge 146:22da6e220af6 2293 * @arg @ref LL_RCC_PLLSAIM_DIV_20
AnnaBridge 146:22da6e220af6 2294 * @arg @ref LL_RCC_PLLSAIM_DIV_21
AnnaBridge 146:22da6e220af6 2295 * @arg @ref LL_RCC_PLLSAIM_DIV_22
AnnaBridge 146:22da6e220af6 2296 * @arg @ref LL_RCC_PLLSAIM_DIV_23
AnnaBridge 146:22da6e220af6 2297 * @arg @ref LL_RCC_PLLSAIM_DIV_24
AnnaBridge 146:22da6e220af6 2298 * @arg @ref LL_RCC_PLLSAIM_DIV_25
AnnaBridge 146:22da6e220af6 2299 * @arg @ref LL_RCC_PLLSAIM_DIV_26
AnnaBridge 146:22da6e220af6 2300 * @arg @ref LL_RCC_PLLSAIM_DIV_27
AnnaBridge 146:22da6e220af6 2301 * @arg @ref LL_RCC_PLLSAIM_DIV_28
AnnaBridge 146:22da6e220af6 2302 * @arg @ref LL_RCC_PLLSAIM_DIV_29
AnnaBridge 146:22da6e220af6 2303 * @arg @ref LL_RCC_PLLSAIM_DIV_30
AnnaBridge 146:22da6e220af6 2304 * @arg @ref LL_RCC_PLLSAIM_DIV_31
AnnaBridge 146:22da6e220af6 2305 * @arg @ref LL_RCC_PLLSAIM_DIV_32
AnnaBridge 146:22da6e220af6 2306 * @arg @ref LL_RCC_PLLSAIM_DIV_33
AnnaBridge 146:22da6e220af6 2307 * @arg @ref LL_RCC_PLLSAIM_DIV_34
AnnaBridge 146:22da6e220af6 2308 * @arg @ref LL_RCC_PLLSAIM_DIV_35
AnnaBridge 146:22da6e220af6 2309 * @arg @ref LL_RCC_PLLSAIM_DIV_36
AnnaBridge 146:22da6e220af6 2310 * @arg @ref LL_RCC_PLLSAIM_DIV_37
AnnaBridge 146:22da6e220af6 2311 * @arg @ref LL_RCC_PLLSAIM_DIV_38
AnnaBridge 146:22da6e220af6 2312 * @arg @ref LL_RCC_PLLSAIM_DIV_39
AnnaBridge 146:22da6e220af6 2313 * @arg @ref LL_RCC_PLLSAIM_DIV_40
AnnaBridge 146:22da6e220af6 2314 * @arg @ref LL_RCC_PLLSAIM_DIV_41
AnnaBridge 146:22da6e220af6 2315 * @arg @ref LL_RCC_PLLSAIM_DIV_42
AnnaBridge 146:22da6e220af6 2316 * @arg @ref LL_RCC_PLLSAIM_DIV_43
AnnaBridge 146:22da6e220af6 2317 * @arg @ref LL_RCC_PLLSAIM_DIV_44
AnnaBridge 146:22da6e220af6 2318 * @arg @ref LL_RCC_PLLSAIM_DIV_45
AnnaBridge 146:22da6e220af6 2319 * @arg @ref LL_RCC_PLLSAIM_DIV_46
AnnaBridge 146:22da6e220af6 2320 * @arg @ref LL_RCC_PLLSAIM_DIV_47
AnnaBridge 146:22da6e220af6 2321 * @arg @ref LL_RCC_PLLSAIM_DIV_48
AnnaBridge 146:22da6e220af6 2322 * @arg @ref LL_RCC_PLLSAIM_DIV_49
AnnaBridge 146:22da6e220af6 2323 * @arg @ref LL_RCC_PLLSAIM_DIV_50
AnnaBridge 146:22da6e220af6 2324 * @arg @ref LL_RCC_PLLSAIM_DIV_51
AnnaBridge 146:22da6e220af6 2325 * @arg @ref LL_RCC_PLLSAIM_DIV_52
AnnaBridge 146:22da6e220af6 2326 * @arg @ref LL_RCC_PLLSAIM_DIV_53
AnnaBridge 146:22da6e220af6 2327 * @arg @ref LL_RCC_PLLSAIM_DIV_54
AnnaBridge 146:22da6e220af6 2328 * @arg @ref LL_RCC_PLLSAIM_DIV_55
AnnaBridge 146:22da6e220af6 2329 * @arg @ref LL_RCC_PLLSAIM_DIV_56
AnnaBridge 146:22da6e220af6 2330 * @arg @ref LL_RCC_PLLSAIM_DIV_57
AnnaBridge 146:22da6e220af6 2331 * @arg @ref LL_RCC_PLLSAIM_DIV_58
AnnaBridge 146:22da6e220af6 2332 * @arg @ref LL_RCC_PLLSAIM_DIV_59
AnnaBridge 146:22da6e220af6 2333 * @arg @ref LL_RCC_PLLSAIM_DIV_60
AnnaBridge 146:22da6e220af6 2334 * @arg @ref LL_RCC_PLLSAIM_DIV_61
AnnaBridge 146:22da6e220af6 2335 * @arg @ref LL_RCC_PLLSAIM_DIV_62
AnnaBridge 146:22da6e220af6 2336 * @arg @ref LL_RCC_PLLSAIM_DIV_63
AnnaBridge 146:22da6e220af6 2337 * @param __PLLSAIN__ Between 50 and 432
AnnaBridge 146:22da6e220af6 2338 * @param __PLLSAIP__ This parameter can be one of the following values:
AnnaBridge 146:22da6e220af6 2339 * @arg @ref LL_RCC_PLLSAIP_DIV_2
AnnaBridge 146:22da6e220af6 2340 * @arg @ref LL_RCC_PLLSAIP_DIV_4
AnnaBridge 146:22da6e220af6 2341 * @arg @ref LL_RCC_PLLSAIP_DIV_6
AnnaBridge 146:22da6e220af6 2342 * @arg @ref LL_RCC_PLLSAIP_DIV_8
AnnaBridge 146:22da6e220af6 2343 * @retval PLLSAI clock frequency (in Hz)
AnnaBridge 146:22da6e220af6 2344 */
AnnaBridge 146:22da6e220af6 2345 #define __LL_RCC_CALC_PLLSAI_48M_FREQ(__INPUTFREQ__, __PLLM__, __PLLSAIN__, __PLLSAIP__) (((__INPUTFREQ__) / (__PLLM__)) * (__PLLSAIN__) / \
AnnaBridge 146:22da6e220af6 2346 ((((__PLLSAIP__) >> RCC_PLLSAICFGR_PLLSAIP_Pos) + 1U) * 2U))
AnnaBridge 146:22da6e220af6 2347 #endif /* RCC_PLLSAICFGR_PLLSAIP */
AnnaBridge 146:22da6e220af6 2348
AnnaBridge 146:22da6e220af6 2349 #if defined(LTDC)
AnnaBridge 146:22da6e220af6 2350 /**
AnnaBridge 146:22da6e220af6 2351 * @brief Helper macro to calculate the PLLSAI frequency used for LTDC domain
AnnaBridge 146:22da6e220af6 2352 * @note ex: @ref __LL_RCC_CALC_PLLSAI_LTDC_FREQ (HSE_VALUE,@ref LL_RCC_PLLSAI_GetDivider (),
AnnaBridge 146:22da6e220af6 2353 * @ref LL_RCC_PLLSAI_GetN (), @ref LL_RCC_PLLSAI_GetR (), @ref LL_RCC_PLLSAI_GetDIVR ());
AnnaBridge 146:22da6e220af6 2354 * @param __INPUTFREQ__ PLL Input frequency (based on HSE/HSI)
AnnaBridge 146:22da6e220af6 2355 * @param __PLLM__ This parameter can be one of the following values:
AnnaBridge 146:22da6e220af6 2356 * @arg @ref LL_RCC_PLLSAIM_DIV_2
AnnaBridge 146:22da6e220af6 2357 * @arg @ref LL_RCC_PLLSAIM_DIV_3
AnnaBridge 146:22da6e220af6 2358 * @arg @ref LL_RCC_PLLSAIM_DIV_4
AnnaBridge 146:22da6e220af6 2359 * @arg @ref LL_RCC_PLLSAIM_DIV_5
AnnaBridge 146:22da6e220af6 2360 * @arg @ref LL_RCC_PLLSAIM_DIV_6
AnnaBridge 146:22da6e220af6 2361 * @arg @ref LL_RCC_PLLSAIM_DIV_7
AnnaBridge 146:22da6e220af6 2362 * @arg @ref LL_RCC_PLLSAIM_DIV_8
AnnaBridge 146:22da6e220af6 2363 * @arg @ref LL_RCC_PLLSAIM_DIV_9
AnnaBridge 146:22da6e220af6 2364 * @arg @ref LL_RCC_PLLSAIM_DIV_10
AnnaBridge 146:22da6e220af6 2365 * @arg @ref LL_RCC_PLLSAIM_DIV_11
AnnaBridge 146:22da6e220af6 2366 * @arg @ref LL_RCC_PLLSAIM_DIV_12
AnnaBridge 146:22da6e220af6 2367 * @arg @ref LL_RCC_PLLSAIM_DIV_13
AnnaBridge 146:22da6e220af6 2368 * @arg @ref LL_RCC_PLLSAIM_DIV_14
AnnaBridge 146:22da6e220af6 2369 * @arg @ref LL_RCC_PLLSAIM_DIV_15
AnnaBridge 146:22da6e220af6 2370 * @arg @ref LL_RCC_PLLSAIM_DIV_16
AnnaBridge 146:22da6e220af6 2371 * @arg @ref LL_RCC_PLLSAIM_DIV_17
AnnaBridge 146:22da6e220af6 2372 * @arg @ref LL_RCC_PLLSAIM_DIV_18
AnnaBridge 146:22da6e220af6 2373 * @arg @ref LL_RCC_PLLSAIM_DIV_19
AnnaBridge 146:22da6e220af6 2374 * @arg @ref LL_RCC_PLLSAIM_DIV_20
AnnaBridge 146:22da6e220af6 2375 * @arg @ref LL_RCC_PLLSAIM_DIV_21
AnnaBridge 146:22da6e220af6 2376 * @arg @ref LL_RCC_PLLSAIM_DIV_22
AnnaBridge 146:22da6e220af6 2377 * @arg @ref LL_RCC_PLLSAIM_DIV_23
AnnaBridge 146:22da6e220af6 2378 * @arg @ref LL_RCC_PLLSAIM_DIV_24
AnnaBridge 146:22da6e220af6 2379 * @arg @ref LL_RCC_PLLSAIM_DIV_25
AnnaBridge 146:22da6e220af6 2380 * @arg @ref LL_RCC_PLLSAIM_DIV_26
AnnaBridge 146:22da6e220af6 2381 * @arg @ref LL_RCC_PLLSAIM_DIV_27
AnnaBridge 146:22da6e220af6 2382 * @arg @ref LL_RCC_PLLSAIM_DIV_28
AnnaBridge 146:22da6e220af6 2383 * @arg @ref LL_RCC_PLLSAIM_DIV_29
AnnaBridge 146:22da6e220af6 2384 * @arg @ref LL_RCC_PLLSAIM_DIV_30
AnnaBridge 146:22da6e220af6 2385 * @arg @ref LL_RCC_PLLSAIM_DIV_31
AnnaBridge 146:22da6e220af6 2386 * @arg @ref LL_RCC_PLLSAIM_DIV_32
AnnaBridge 146:22da6e220af6 2387 * @arg @ref LL_RCC_PLLSAIM_DIV_33
AnnaBridge 146:22da6e220af6 2388 * @arg @ref LL_RCC_PLLSAIM_DIV_34
AnnaBridge 146:22da6e220af6 2389 * @arg @ref LL_RCC_PLLSAIM_DIV_35
AnnaBridge 146:22da6e220af6 2390 * @arg @ref LL_RCC_PLLSAIM_DIV_36
AnnaBridge 146:22da6e220af6 2391 * @arg @ref LL_RCC_PLLSAIM_DIV_37
AnnaBridge 146:22da6e220af6 2392 * @arg @ref LL_RCC_PLLSAIM_DIV_38
AnnaBridge 146:22da6e220af6 2393 * @arg @ref LL_RCC_PLLSAIM_DIV_39
AnnaBridge 146:22da6e220af6 2394 * @arg @ref LL_RCC_PLLSAIM_DIV_40
AnnaBridge 146:22da6e220af6 2395 * @arg @ref LL_RCC_PLLSAIM_DIV_41
AnnaBridge 146:22da6e220af6 2396 * @arg @ref LL_RCC_PLLSAIM_DIV_42
AnnaBridge 146:22da6e220af6 2397 * @arg @ref LL_RCC_PLLSAIM_DIV_43
AnnaBridge 146:22da6e220af6 2398 * @arg @ref LL_RCC_PLLSAIM_DIV_44
AnnaBridge 146:22da6e220af6 2399 * @arg @ref LL_RCC_PLLSAIM_DIV_45
AnnaBridge 146:22da6e220af6 2400 * @arg @ref LL_RCC_PLLSAIM_DIV_46
AnnaBridge 146:22da6e220af6 2401 * @arg @ref LL_RCC_PLLSAIM_DIV_47
AnnaBridge 146:22da6e220af6 2402 * @arg @ref LL_RCC_PLLSAIM_DIV_48
AnnaBridge 146:22da6e220af6 2403 * @arg @ref LL_RCC_PLLSAIM_DIV_49
AnnaBridge 146:22da6e220af6 2404 * @arg @ref LL_RCC_PLLSAIM_DIV_50
AnnaBridge 146:22da6e220af6 2405 * @arg @ref LL_RCC_PLLSAIM_DIV_51
AnnaBridge 146:22da6e220af6 2406 * @arg @ref LL_RCC_PLLSAIM_DIV_52
AnnaBridge 146:22da6e220af6 2407 * @arg @ref LL_RCC_PLLSAIM_DIV_53
AnnaBridge 146:22da6e220af6 2408 * @arg @ref LL_RCC_PLLSAIM_DIV_54
AnnaBridge 146:22da6e220af6 2409 * @arg @ref LL_RCC_PLLSAIM_DIV_55
AnnaBridge 146:22da6e220af6 2410 * @arg @ref LL_RCC_PLLSAIM_DIV_56
AnnaBridge 146:22da6e220af6 2411 * @arg @ref LL_RCC_PLLSAIM_DIV_57
AnnaBridge 146:22da6e220af6 2412 * @arg @ref LL_RCC_PLLSAIM_DIV_58
AnnaBridge 146:22da6e220af6 2413 * @arg @ref LL_RCC_PLLSAIM_DIV_59
AnnaBridge 146:22da6e220af6 2414 * @arg @ref LL_RCC_PLLSAIM_DIV_60
AnnaBridge 146:22da6e220af6 2415 * @arg @ref LL_RCC_PLLSAIM_DIV_61
AnnaBridge 146:22da6e220af6 2416 * @arg @ref LL_RCC_PLLSAIM_DIV_62
AnnaBridge 146:22da6e220af6 2417 * @arg @ref LL_RCC_PLLSAIM_DIV_63
AnnaBridge 146:22da6e220af6 2418 * @param __PLLSAIN__ Between 49/50(*) and 432
AnnaBridge 146:22da6e220af6 2419 *
AnnaBridge 146:22da6e220af6 2420 * (*) value not defined in all devices.
AnnaBridge 146:22da6e220af6 2421 * @param __PLLSAIR__ This parameter can be one of the following values:
AnnaBridge 146:22da6e220af6 2422 * @arg @ref LL_RCC_PLLSAIR_DIV_2
AnnaBridge 146:22da6e220af6 2423 * @arg @ref LL_RCC_PLLSAIR_DIV_3
AnnaBridge 146:22da6e220af6 2424 * @arg @ref LL_RCC_PLLSAIR_DIV_4
AnnaBridge 146:22da6e220af6 2425 * @arg @ref LL_RCC_PLLSAIR_DIV_5
AnnaBridge 146:22da6e220af6 2426 * @arg @ref LL_RCC_PLLSAIR_DIV_6
AnnaBridge 146:22da6e220af6 2427 * @arg @ref LL_RCC_PLLSAIR_DIV_7
AnnaBridge 146:22da6e220af6 2428 * @param __PLLSAIDIVR__ This parameter can be one of the following values:
AnnaBridge 146:22da6e220af6 2429 * @arg @ref LL_RCC_PLLSAIDIVR_DIV_2
AnnaBridge 146:22da6e220af6 2430 * @arg @ref LL_RCC_PLLSAIDIVR_DIV_4
AnnaBridge 146:22da6e220af6 2431 * @arg @ref LL_RCC_PLLSAIDIVR_DIV_8
AnnaBridge 146:22da6e220af6 2432 * @arg @ref LL_RCC_PLLSAIDIVR_DIV_16
AnnaBridge 146:22da6e220af6 2433 * @retval PLLSAI clock frequency (in Hz)
AnnaBridge 146:22da6e220af6 2434 */
AnnaBridge 146:22da6e220af6 2435 #define __LL_RCC_CALC_PLLSAI_LTDC_FREQ(__INPUTFREQ__, __PLLM__, __PLLSAIN__, __PLLSAIR__, __PLLSAIDIVR__) (((__INPUTFREQ__) / (__PLLM__)) * (__PLLSAIN__) / \
AnnaBridge 146:22da6e220af6 2436 (((__PLLSAIR__) >> RCC_PLLSAICFGR_PLLSAIR_Pos) * (aRCC_PLLSAIDIVRPrescTable[(__PLLSAIDIVR__) >> RCC_DCKCFGR_PLLSAIDIVR_Pos])))
AnnaBridge 146:22da6e220af6 2437 #endif /* LTDC */
AnnaBridge 146:22da6e220af6 2438 #endif /* RCC_PLLSAI_SUPPORT */
AnnaBridge 146:22da6e220af6 2439
AnnaBridge 146:22da6e220af6 2440 #if defined(RCC_PLLI2S_SUPPORT)
AnnaBridge 146:22da6e220af6 2441 #if defined(RCC_DCKCFGR_PLLI2SDIVQ) || defined(RCC_DCKCFGR_PLLI2SDIVR)
AnnaBridge 146:22da6e220af6 2442 /**
AnnaBridge 146:22da6e220af6 2443 * @brief Helper macro to calculate the PLLI2S frequency used for SAI domain
AnnaBridge 146:22da6e220af6 2444 * @note ex: @ref __LL_RCC_CALC_PLLI2S_SAI_FREQ (HSE_VALUE,@ref LL_RCC_PLLI2S_GetDivider (),
AnnaBridge 146:22da6e220af6 2445 * @ref LL_RCC_PLLI2S_GetN (), @ref LL_RCC_PLLI2S_GetQ (), @ref LL_RCC_PLLI2S_GetDIVQ ());
AnnaBridge 146:22da6e220af6 2446 * @param __INPUTFREQ__ PLL Input frequency (based on HSE/HSI)
AnnaBridge 146:22da6e220af6 2447 * @param __PLLM__ This parameter can be one of the following values:
AnnaBridge 146:22da6e220af6 2448 * @arg @ref LL_RCC_PLLI2SM_DIV_2
AnnaBridge 146:22da6e220af6 2449 * @arg @ref LL_RCC_PLLI2SM_DIV_3
AnnaBridge 146:22da6e220af6 2450 * @arg @ref LL_RCC_PLLI2SM_DIV_4
AnnaBridge 146:22da6e220af6 2451 * @arg @ref LL_RCC_PLLI2SM_DIV_5
AnnaBridge 146:22da6e220af6 2452 * @arg @ref LL_RCC_PLLI2SM_DIV_6
AnnaBridge 146:22da6e220af6 2453 * @arg @ref LL_RCC_PLLI2SM_DIV_7
AnnaBridge 146:22da6e220af6 2454 * @arg @ref LL_RCC_PLLI2SM_DIV_8
AnnaBridge 146:22da6e220af6 2455 * @arg @ref LL_RCC_PLLI2SM_DIV_9
AnnaBridge 146:22da6e220af6 2456 * @arg @ref LL_RCC_PLLI2SM_DIV_10
AnnaBridge 146:22da6e220af6 2457 * @arg @ref LL_RCC_PLLI2SM_DIV_11
AnnaBridge 146:22da6e220af6 2458 * @arg @ref LL_RCC_PLLI2SM_DIV_12
AnnaBridge 146:22da6e220af6 2459 * @arg @ref LL_RCC_PLLI2SM_DIV_13
AnnaBridge 146:22da6e220af6 2460 * @arg @ref LL_RCC_PLLI2SM_DIV_14
AnnaBridge 146:22da6e220af6 2461 * @arg @ref LL_RCC_PLLI2SM_DIV_15
AnnaBridge 146:22da6e220af6 2462 * @arg @ref LL_RCC_PLLI2SM_DIV_16
AnnaBridge 146:22da6e220af6 2463 * @arg @ref LL_RCC_PLLI2SM_DIV_17
AnnaBridge 146:22da6e220af6 2464 * @arg @ref LL_RCC_PLLI2SM_DIV_18
AnnaBridge 146:22da6e220af6 2465 * @arg @ref LL_RCC_PLLI2SM_DIV_19
AnnaBridge 146:22da6e220af6 2466 * @arg @ref LL_RCC_PLLI2SM_DIV_20
AnnaBridge 146:22da6e220af6 2467 * @arg @ref LL_RCC_PLLI2SM_DIV_21
AnnaBridge 146:22da6e220af6 2468 * @arg @ref LL_RCC_PLLI2SM_DIV_22
AnnaBridge 146:22da6e220af6 2469 * @arg @ref LL_RCC_PLLI2SM_DIV_23
AnnaBridge 146:22da6e220af6 2470 * @arg @ref LL_RCC_PLLI2SM_DIV_24
AnnaBridge 146:22da6e220af6 2471 * @arg @ref LL_RCC_PLLI2SM_DIV_25
AnnaBridge 146:22da6e220af6 2472 * @arg @ref LL_RCC_PLLI2SM_DIV_26
AnnaBridge 146:22da6e220af6 2473 * @arg @ref LL_RCC_PLLI2SM_DIV_27
AnnaBridge 146:22da6e220af6 2474 * @arg @ref LL_RCC_PLLI2SM_DIV_28
AnnaBridge 146:22da6e220af6 2475 * @arg @ref LL_RCC_PLLI2SM_DIV_29
AnnaBridge 146:22da6e220af6 2476 * @arg @ref LL_RCC_PLLI2SM_DIV_30
AnnaBridge 146:22da6e220af6 2477 * @arg @ref LL_RCC_PLLI2SM_DIV_31
AnnaBridge 146:22da6e220af6 2478 * @arg @ref LL_RCC_PLLI2SM_DIV_32
AnnaBridge 146:22da6e220af6 2479 * @arg @ref LL_RCC_PLLI2SM_DIV_33
AnnaBridge 146:22da6e220af6 2480 * @arg @ref LL_RCC_PLLI2SM_DIV_34
AnnaBridge 146:22da6e220af6 2481 * @arg @ref LL_RCC_PLLI2SM_DIV_35
AnnaBridge 146:22da6e220af6 2482 * @arg @ref LL_RCC_PLLI2SM_DIV_36
AnnaBridge 146:22da6e220af6 2483 * @arg @ref LL_RCC_PLLI2SM_DIV_37
AnnaBridge 146:22da6e220af6 2484 * @arg @ref LL_RCC_PLLI2SM_DIV_38
AnnaBridge 146:22da6e220af6 2485 * @arg @ref LL_RCC_PLLI2SM_DIV_39
AnnaBridge 146:22da6e220af6 2486 * @arg @ref LL_RCC_PLLI2SM_DIV_40
AnnaBridge 146:22da6e220af6 2487 * @arg @ref LL_RCC_PLLI2SM_DIV_41
AnnaBridge 146:22da6e220af6 2488 * @arg @ref LL_RCC_PLLI2SM_DIV_42
AnnaBridge 146:22da6e220af6 2489 * @arg @ref LL_RCC_PLLI2SM_DIV_43
AnnaBridge 146:22da6e220af6 2490 * @arg @ref LL_RCC_PLLI2SM_DIV_44
AnnaBridge 146:22da6e220af6 2491 * @arg @ref LL_RCC_PLLI2SM_DIV_45
AnnaBridge 146:22da6e220af6 2492 * @arg @ref LL_RCC_PLLI2SM_DIV_46
AnnaBridge 146:22da6e220af6 2493 * @arg @ref LL_RCC_PLLI2SM_DIV_47
AnnaBridge 146:22da6e220af6 2494 * @arg @ref LL_RCC_PLLI2SM_DIV_48
AnnaBridge 146:22da6e220af6 2495 * @arg @ref LL_RCC_PLLI2SM_DIV_49
AnnaBridge 146:22da6e220af6 2496 * @arg @ref LL_RCC_PLLI2SM_DIV_50
AnnaBridge 146:22da6e220af6 2497 * @arg @ref LL_RCC_PLLI2SM_DIV_51
AnnaBridge 146:22da6e220af6 2498 * @arg @ref LL_RCC_PLLI2SM_DIV_52
AnnaBridge 146:22da6e220af6 2499 * @arg @ref LL_RCC_PLLI2SM_DIV_53
AnnaBridge 146:22da6e220af6 2500 * @arg @ref LL_RCC_PLLI2SM_DIV_54
AnnaBridge 146:22da6e220af6 2501 * @arg @ref LL_RCC_PLLI2SM_DIV_55
AnnaBridge 146:22da6e220af6 2502 * @arg @ref LL_RCC_PLLI2SM_DIV_56
AnnaBridge 146:22da6e220af6 2503 * @arg @ref LL_RCC_PLLI2SM_DIV_57
AnnaBridge 146:22da6e220af6 2504 * @arg @ref LL_RCC_PLLI2SM_DIV_58
AnnaBridge 146:22da6e220af6 2505 * @arg @ref LL_RCC_PLLI2SM_DIV_59
AnnaBridge 146:22da6e220af6 2506 * @arg @ref LL_RCC_PLLI2SM_DIV_60
AnnaBridge 146:22da6e220af6 2507 * @arg @ref LL_RCC_PLLI2SM_DIV_61
AnnaBridge 146:22da6e220af6 2508 * @arg @ref LL_RCC_PLLI2SM_DIV_62
AnnaBridge 146:22da6e220af6 2509 * @arg @ref LL_RCC_PLLI2SM_DIV_63
AnnaBridge 146:22da6e220af6 2510 * @param __PLLI2SN__ Between 50/192(*) and 432
AnnaBridge 146:22da6e220af6 2511 *
AnnaBridge 146:22da6e220af6 2512 * (*) value not defined in all devices.
AnnaBridge 146:22da6e220af6 2513 * @param __PLLI2SQ_R__ This parameter can be one of the following values:
AnnaBridge 146:22da6e220af6 2514 * @arg @ref LL_RCC_PLLI2SQ_DIV_2 (*)
AnnaBridge 146:22da6e220af6 2515 * @arg @ref LL_RCC_PLLI2SQ_DIV_3 (*)
AnnaBridge 146:22da6e220af6 2516 * @arg @ref LL_RCC_PLLI2SQ_DIV_4 (*)
AnnaBridge 146:22da6e220af6 2517 * @arg @ref LL_RCC_PLLI2SQ_DIV_5 (*)
AnnaBridge 146:22da6e220af6 2518 * @arg @ref LL_RCC_PLLI2SQ_DIV_6 (*)
AnnaBridge 146:22da6e220af6 2519 * @arg @ref LL_RCC_PLLI2SQ_DIV_7 (*)
AnnaBridge 146:22da6e220af6 2520 * @arg @ref LL_RCC_PLLI2SQ_DIV_8 (*)
AnnaBridge 146:22da6e220af6 2521 * @arg @ref LL_RCC_PLLI2SQ_DIV_9 (*)
AnnaBridge 146:22da6e220af6 2522 * @arg @ref LL_RCC_PLLI2SQ_DIV_10 (*)
AnnaBridge 146:22da6e220af6 2523 * @arg @ref LL_RCC_PLLI2SQ_DIV_11 (*)
AnnaBridge 146:22da6e220af6 2524 * @arg @ref LL_RCC_PLLI2SQ_DIV_12 (*)
AnnaBridge 146:22da6e220af6 2525 * @arg @ref LL_RCC_PLLI2SQ_DIV_13 (*)
AnnaBridge 146:22da6e220af6 2526 * @arg @ref LL_RCC_PLLI2SQ_DIV_14 (*)
AnnaBridge 146:22da6e220af6 2527 * @arg @ref LL_RCC_PLLI2SQ_DIV_15 (*)
AnnaBridge 146:22da6e220af6 2528 * @arg @ref LL_RCC_PLLI2SR_DIV_2 (*)
AnnaBridge 146:22da6e220af6 2529 * @arg @ref LL_RCC_PLLI2SR_DIV_3 (*)
AnnaBridge 146:22da6e220af6 2530 * @arg @ref LL_RCC_PLLI2SR_DIV_4 (*)
AnnaBridge 146:22da6e220af6 2531 * @arg @ref LL_RCC_PLLI2SR_DIV_5 (*)
AnnaBridge 146:22da6e220af6 2532 * @arg @ref LL_RCC_PLLI2SR_DIV_6 (*)
AnnaBridge 146:22da6e220af6 2533 * @arg @ref LL_RCC_PLLI2SR_DIV_7 (*)
AnnaBridge 146:22da6e220af6 2534 *
AnnaBridge 146:22da6e220af6 2535 * (*) value not defined in all devices.
AnnaBridge 146:22da6e220af6 2536 * @param __PLLI2SDIVQ_R__ This parameter can be one of the following values:
AnnaBridge 146:22da6e220af6 2537 * @arg @ref LL_RCC_PLLI2SDIVQ_DIV_1 (*)
AnnaBridge 146:22da6e220af6 2538 * @arg @ref LL_RCC_PLLI2SDIVQ_DIV_2 (*)
AnnaBridge 146:22da6e220af6 2539 * @arg @ref LL_RCC_PLLI2SDIVQ_DIV_3 (*)
AnnaBridge 146:22da6e220af6 2540 * @arg @ref LL_RCC_PLLI2SDIVQ_DIV_4 (*)
AnnaBridge 146:22da6e220af6 2541 * @arg @ref LL_RCC_PLLI2SDIVQ_DIV_5 (*)
AnnaBridge 146:22da6e220af6 2542 * @arg @ref LL_RCC_PLLI2SDIVQ_DIV_6 (*)
AnnaBridge 146:22da6e220af6 2543 * @arg @ref LL_RCC_PLLI2SDIVQ_DIV_7 (*)
AnnaBridge 146:22da6e220af6 2544 * @arg @ref LL_RCC_PLLI2SDIVQ_DIV_8 (*)
AnnaBridge 146:22da6e220af6 2545 * @arg @ref LL_RCC_PLLI2SDIVQ_DIV_9 (*)
AnnaBridge 146:22da6e220af6 2546 * @arg @ref LL_RCC_PLLI2SDIVQ_DIV_10 (*)
AnnaBridge 146:22da6e220af6 2547 * @arg @ref LL_RCC_PLLI2SDIVQ_DIV_11 (*)
AnnaBridge 146:22da6e220af6 2548 * @arg @ref LL_RCC_PLLI2SDIVQ_DIV_12 (*)
AnnaBridge 146:22da6e220af6 2549 * @arg @ref LL_RCC_PLLI2SDIVQ_DIV_13 (*)
AnnaBridge 146:22da6e220af6 2550 * @arg @ref LL_RCC_PLLI2SDIVQ_DIV_14 (*)
AnnaBridge 146:22da6e220af6 2551 * @arg @ref LL_RCC_PLLI2SDIVQ_DIV_15 (*)
AnnaBridge 146:22da6e220af6 2552 * @arg @ref LL_RCC_PLLI2SDIVQ_DIV_16 (*)
AnnaBridge 146:22da6e220af6 2553 * @arg @ref LL_RCC_PLLI2SDIVQ_DIV_17 (*)
AnnaBridge 146:22da6e220af6 2554 * @arg @ref LL_RCC_PLLI2SDIVQ_DIV_18 (*)
AnnaBridge 146:22da6e220af6 2555 * @arg @ref LL_RCC_PLLI2SDIVQ_DIV_19 (*)
AnnaBridge 146:22da6e220af6 2556 * @arg @ref LL_RCC_PLLI2SDIVQ_DIV_20 (*)
AnnaBridge 146:22da6e220af6 2557 * @arg @ref LL_RCC_PLLI2SDIVQ_DIV_21 (*)
AnnaBridge 146:22da6e220af6 2558 * @arg @ref LL_RCC_PLLI2SDIVQ_DIV_22 (*)
AnnaBridge 146:22da6e220af6 2559 * @arg @ref LL_RCC_PLLI2SDIVQ_DIV_23 (*)
AnnaBridge 146:22da6e220af6 2560 * @arg @ref LL_RCC_PLLI2SDIVQ_DIV_24 (*)
AnnaBridge 146:22da6e220af6 2561 * @arg @ref LL_RCC_PLLI2SDIVQ_DIV_25 (*)
AnnaBridge 146:22da6e220af6 2562 * @arg @ref LL_RCC_PLLI2SDIVQ_DIV_26 (*)
AnnaBridge 146:22da6e220af6 2563 * @arg @ref LL_RCC_PLLI2SDIVQ_DIV_27 (*)
AnnaBridge 146:22da6e220af6 2564 * @arg @ref LL_RCC_PLLI2SDIVQ_DIV_28 (*)
AnnaBridge 146:22da6e220af6 2565 * @arg @ref LL_RCC_PLLI2SDIVQ_DIV_29 (*)
AnnaBridge 146:22da6e220af6 2566 * @arg @ref LL_RCC_PLLI2SDIVQ_DIV_30 (*)
AnnaBridge 146:22da6e220af6 2567 * @arg @ref LL_RCC_PLLI2SDIVQ_DIV_31 (*)
AnnaBridge 146:22da6e220af6 2568 * @arg @ref LL_RCC_PLLI2SDIVQ_DIV_32 (*)
AnnaBridge 146:22da6e220af6 2569 * @arg @ref LL_RCC_PLLI2SDIVR_DIV_1 (*)
AnnaBridge 146:22da6e220af6 2570 * @arg @ref LL_RCC_PLLI2SDIVR_DIV_2 (*)
AnnaBridge 146:22da6e220af6 2571 * @arg @ref LL_RCC_PLLI2SDIVR_DIV_3 (*)
AnnaBridge 146:22da6e220af6 2572 * @arg @ref LL_RCC_PLLI2SDIVR_DIV_4 (*)
AnnaBridge 146:22da6e220af6 2573 * @arg @ref LL_RCC_PLLI2SDIVR_DIV_5 (*)
AnnaBridge 146:22da6e220af6 2574 * @arg @ref LL_RCC_PLLI2SDIVR_DIV_6 (*)
AnnaBridge 146:22da6e220af6 2575 * @arg @ref LL_RCC_PLLI2SDIVR_DIV_7 (*)
AnnaBridge 146:22da6e220af6 2576 * @arg @ref LL_RCC_PLLI2SDIVR_DIV_8 (*)
AnnaBridge 146:22da6e220af6 2577 * @arg @ref LL_RCC_PLLI2SDIVR_DIV_9 (*)
AnnaBridge 146:22da6e220af6 2578 * @arg @ref LL_RCC_PLLI2SDIVR_DIV_10 (*)
AnnaBridge 146:22da6e220af6 2579 * @arg @ref LL_RCC_PLLI2SDIVR_DIV_11 (*)
AnnaBridge 146:22da6e220af6 2580 * @arg @ref LL_RCC_PLLI2SDIVR_DIV_12 (*)
AnnaBridge 146:22da6e220af6 2581 * @arg @ref LL_RCC_PLLI2SDIVR_DIV_13 (*)
AnnaBridge 146:22da6e220af6 2582 * @arg @ref LL_RCC_PLLI2SDIVR_DIV_14 (*)
AnnaBridge 146:22da6e220af6 2583 * @arg @ref LL_RCC_PLLI2SDIVR_DIV_15 (*)
AnnaBridge 146:22da6e220af6 2584 * @arg @ref LL_RCC_PLLI2SDIVR_DIV_16 (*)
AnnaBridge 146:22da6e220af6 2585 * @arg @ref LL_RCC_PLLI2SDIVR_DIV_17 (*)
AnnaBridge 146:22da6e220af6 2586 * @arg @ref LL_RCC_PLLI2SDIVR_DIV_18 (*)
AnnaBridge 146:22da6e220af6 2587 * @arg @ref LL_RCC_PLLI2SDIVR_DIV_19 (*)
AnnaBridge 146:22da6e220af6 2588 * @arg @ref LL_RCC_PLLI2SDIVR_DIV_20 (*)
AnnaBridge 146:22da6e220af6 2589 * @arg @ref LL_RCC_PLLI2SDIVR_DIV_21 (*)
AnnaBridge 146:22da6e220af6 2590 * @arg @ref LL_RCC_PLLI2SDIVR_DIV_22 (*)
AnnaBridge 146:22da6e220af6 2591 * @arg @ref LL_RCC_PLLI2SDIVR_DIV_23 (*)
AnnaBridge 146:22da6e220af6 2592 * @arg @ref LL_RCC_PLLI2SDIVR_DIV_24 (*)
AnnaBridge 146:22da6e220af6 2593 * @arg @ref LL_RCC_PLLI2SDIVR_DIV_25 (*)
AnnaBridge 146:22da6e220af6 2594 * @arg @ref LL_RCC_PLLI2SDIVR_DIV_26 (*)
AnnaBridge 146:22da6e220af6 2595 * @arg @ref LL_RCC_PLLI2SDIVR_DIV_27 (*)
AnnaBridge 146:22da6e220af6 2596 * @arg @ref LL_RCC_PLLI2SDIVR_DIV_28 (*)
AnnaBridge 146:22da6e220af6 2597 * @arg @ref LL_RCC_PLLI2SDIVR_DIV_29 (*)
AnnaBridge 146:22da6e220af6 2598 * @arg @ref LL_RCC_PLLI2SDIVR_DIV_30 (*)
AnnaBridge 146:22da6e220af6 2599 * @arg @ref LL_RCC_PLLI2SDIVR_DIV_31 (*)
AnnaBridge 146:22da6e220af6 2600 *
AnnaBridge 146:22da6e220af6 2601 * (*) value not defined in all devices.
AnnaBridge 146:22da6e220af6 2602 * @retval PLLI2S clock frequency (in Hz)
AnnaBridge 146:22da6e220af6 2603 */
AnnaBridge 146:22da6e220af6 2604 #if defined(RCC_DCKCFGR_PLLI2SDIVQ)
AnnaBridge 146:22da6e220af6 2605 #define __LL_RCC_CALC_PLLI2S_SAI_FREQ(__INPUTFREQ__, __PLLM__, __PLLI2SN__, __PLLI2SQ_R__, __PLLI2SDIVQ_R__) (((__INPUTFREQ__) / (__PLLM__)) * (__PLLI2SN__) / \
AnnaBridge 146:22da6e220af6 2606 (((__PLLI2SQ_R__) >> RCC_PLLI2SCFGR_PLLI2SQ_Pos) * (((__PLLI2SDIVQ_R__) >> RCC_DCKCFGR_PLLI2SDIVQ_Pos) + 1U)))
AnnaBridge 146:22da6e220af6 2607 #else
AnnaBridge 146:22da6e220af6 2608 #define __LL_RCC_CALC_PLLI2S_SAI_FREQ(__INPUTFREQ__, __PLLM__, __PLLI2SN__, __PLLI2SQ_R__, __PLLI2SDIVQ_R__) (((__INPUTFREQ__) / (__PLLM__)) * (__PLLI2SN__) / \
AnnaBridge 146:22da6e220af6 2609 (((__PLLI2SQ_R__) >> RCC_PLLI2SCFGR_PLLI2SR_Pos) * ((__PLLI2SDIVQ_R__) >> RCC_DCKCFGR_PLLI2SDIVR_Pos)))
AnnaBridge 146:22da6e220af6 2610
AnnaBridge 146:22da6e220af6 2611 #endif /* RCC_DCKCFGR_PLLI2SDIVQ */
AnnaBridge 146:22da6e220af6 2612 #endif /* RCC_DCKCFGR_PLLI2SDIVQ || RCC_DCKCFGR_PLLI2SDIVR */
AnnaBridge 146:22da6e220af6 2613
AnnaBridge 146:22da6e220af6 2614 #if defined(SPDIFRX)
AnnaBridge 146:22da6e220af6 2615 /**
AnnaBridge 146:22da6e220af6 2616 * @brief Helper macro to calculate the PLLI2S frequency used on SPDIFRX domain
AnnaBridge 146:22da6e220af6 2617 * @note ex: @ref __LL_RCC_CALC_PLLI2S_SPDIFRX_FREQ (HSE_VALUE,@ref LL_RCC_PLLI2S_GetDivider (),
AnnaBridge 146:22da6e220af6 2618 * @ref LL_RCC_PLLI2S_GetN (), @ref LL_RCC_PLLI2S_GetP ());
AnnaBridge 146:22da6e220af6 2619 * @param __INPUTFREQ__ PLL Input frequency (based on HSE/HSI)
AnnaBridge 146:22da6e220af6 2620 * @param __PLLM__ This parameter can be one of the following values:
AnnaBridge 146:22da6e220af6 2621 * @arg @ref LL_RCC_PLLI2SM_DIV_2
AnnaBridge 146:22da6e220af6 2622 * @arg @ref LL_RCC_PLLI2SM_DIV_3
AnnaBridge 146:22da6e220af6 2623 * @arg @ref LL_RCC_PLLI2SM_DIV_4
AnnaBridge 146:22da6e220af6 2624 * @arg @ref LL_RCC_PLLI2SM_DIV_5
AnnaBridge 146:22da6e220af6 2625 * @arg @ref LL_RCC_PLLI2SM_DIV_6
AnnaBridge 146:22da6e220af6 2626 * @arg @ref LL_RCC_PLLI2SM_DIV_7
AnnaBridge 146:22da6e220af6 2627 * @arg @ref LL_RCC_PLLI2SM_DIV_8
AnnaBridge 146:22da6e220af6 2628 * @arg @ref LL_RCC_PLLI2SM_DIV_9
AnnaBridge 146:22da6e220af6 2629 * @arg @ref LL_RCC_PLLI2SM_DIV_10
AnnaBridge 146:22da6e220af6 2630 * @arg @ref LL_RCC_PLLI2SM_DIV_11
AnnaBridge 146:22da6e220af6 2631 * @arg @ref LL_RCC_PLLI2SM_DIV_12
AnnaBridge 146:22da6e220af6 2632 * @arg @ref LL_RCC_PLLI2SM_DIV_13
AnnaBridge 146:22da6e220af6 2633 * @arg @ref LL_RCC_PLLI2SM_DIV_14
AnnaBridge 146:22da6e220af6 2634 * @arg @ref LL_RCC_PLLI2SM_DIV_15
AnnaBridge 146:22da6e220af6 2635 * @arg @ref LL_RCC_PLLI2SM_DIV_16
AnnaBridge 146:22da6e220af6 2636 * @arg @ref LL_RCC_PLLI2SM_DIV_17
AnnaBridge 146:22da6e220af6 2637 * @arg @ref LL_RCC_PLLI2SM_DIV_18
AnnaBridge 146:22da6e220af6 2638 * @arg @ref LL_RCC_PLLI2SM_DIV_19
AnnaBridge 146:22da6e220af6 2639 * @arg @ref LL_RCC_PLLI2SM_DIV_20
AnnaBridge 146:22da6e220af6 2640 * @arg @ref LL_RCC_PLLI2SM_DIV_21
AnnaBridge 146:22da6e220af6 2641 * @arg @ref LL_RCC_PLLI2SM_DIV_22
AnnaBridge 146:22da6e220af6 2642 * @arg @ref LL_RCC_PLLI2SM_DIV_23
AnnaBridge 146:22da6e220af6 2643 * @arg @ref LL_RCC_PLLI2SM_DIV_24
AnnaBridge 146:22da6e220af6 2644 * @arg @ref LL_RCC_PLLI2SM_DIV_25
AnnaBridge 146:22da6e220af6 2645 * @arg @ref LL_RCC_PLLI2SM_DIV_26
AnnaBridge 146:22da6e220af6 2646 * @arg @ref LL_RCC_PLLI2SM_DIV_27
AnnaBridge 146:22da6e220af6 2647 * @arg @ref LL_RCC_PLLI2SM_DIV_28
AnnaBridge 146:22da6e220af6 2648 * @arg @ref LL_RCC_PLLI2SM_DIV_29
AnnaBridge 146:22da6e220af6 2649 * @arg @ref LL_RCC_PLLI2SM_DIV_30
AnnaBridge 146:22da6e220af6 2650 * @arg @ref LL_RCC_PLLI2SM_DIV_31
AnnaBridge 146:22da6e220af6 2651 * @arg @ref LL_RCC_PLLI2SM_DIV_32
AnnaBridge 146:22da6e220af6 2652 * @arg @ref LL_RCC_PLLI2SM_DIV_33
AnnaBridge 146:22da6e220af6 2653 * @arg @ref LL_RCC_PLLI2SM_DIV_34
AnnaBridge 146:22da6e220af6 2654 * @arg @ref LL_RCC_PLLI2SM_DIV_35
AnnaBridge 146:22da6e220af6 2655 * @arg @ref LL_RCC_PLLI2SM_DIV_36
AnnaBridge 146:22da6e220af6 2656 * @arg @ref LL_RCC_PLLI2SM_DIV_37
AnnaBridge 146:22da6e220af6 2657 * @arg @ref LL_RCC_PLLI2SM_DIV_38
AnnaBridge 146:22da6e220af6 2658 * @arg @ref LL_RCC_PLLI2SM_DIV_39
AnnaBridge 146:22da6e220af6 2659 * @arg @ref LL_RCC_PLLI2SM_DIV_40
AnnaBridge 146:22da6e220af6 2660 * @arg @ref LL_RCC_PLLI2SM_DIV_41
AnnaBridge 146:22da6e220af6 2661 * @arg @ref LL_RCC_PLLI2SM_DIV_42
AnnaBridge 146:22da6e220af6 2662 * @arg @ref LL_RCC_PLLI2SM_DIV_43
AnnaBridge 146:22da6e220af6 2663 * @arg @ref LL_RCC_PLLI2SM_DIV_44
AnnaBridge 146:22da6e220af6 2664 * @arg @ref LL_RCC_PLLI2SM_DIV_45
AnnaBridge 146:22da6e220af6 2665 * @arg @ref LL_RCC_PLLI2SM_DIV_46
AnnaBridge 146:22da6e220af6 2666 * @arg @ref LL_RCC_PLLI2SM_DIV_47
AnnaBridge 146:22da6e220af6 2667 * @arg @ref LL_RCC_PLLI2SM_DIV_48
AnnaBridge 146:22da6e220af6 2668 * @arg @ref LL_RCC_PLLI2SM_DIV_49
AnnaBridge 146:22da6e220af6 2669 * @arg @ref LL_RCC_PLLI2SM_DIV_50
AnnaBridge 146:22da6e220af6 2670 * @arg @ref LL_RCC_PLLI2SM_DIV_51
AnnaBridge 146:22da6e220af6 2671 * @arg @ref LL_RCC_PLLI2SM_DIV_52
AnnaBridge 146:22da6e220af6 2672 * @arg @ref LL_RCC_PLLI2SM_DIV_53
AnnaBridge 146:22da6e220af6 2673 * @arg @ref LL_RCC_PLLI2SM_DIV_54
AnnaBridge 146:22da6e220af6 2674 * @arg @ref LL_RCC_PLLI2SM_DIV_55
AnnaBridge 146:22da6e220af6 2675 * @arg @ref LL_RCC_PLLI2SM_DIV_56
AnnaBridge 146:22da6e220af6 2676 * @arg @ref LL_RCC_PLLI2SM_DIV_57
AnnaBridge 146:22da6e220af6 2677 * @arg @ref LL_RCC_PLLI2SM_DIV_58
AnnaBridge 146:22da6e220af6 2678 * @arg @ref LL_RCC_PLLI2SM_DIV_59
AnnaBridge 146:22da6e220af6 2679 * @arg @ref LL_RCC_PLLI2SM_DIV_60
AnnaBridge 146:22da6e220af6 2680 * @arg @ref LL_RCC_PLLI2SM_DIV_61
AnnaBridge 146:22da6e220af6 2681 * @arg @ref LL_RCC_PLLI2SM_DIV_62
AnnaBridge 146:22da6e220af6 2682 * @arg @ref LL_RCC_PLLI2SM_DIV_63
AnnaBridge 146:22da6e220af6 2683 * @param __PLLI2SN__ Between 50 and 432
AnnaBridge 146:22da6e220af6 2684 * @param __PLLI2SP__ This parameter can be one of the following values:
AnnaBridge 146:22da6e220af6 2685 * @arg @ref LL_RCC_PLLI2SP_DIV_2
AnnaBridge 146:22da6e220af6 2686 * @arg @ref LL_RCC_PLLI2SP_DIV_4
AnnaBridge 146:22da6e220af6 2687 * @arg @ref LL_RCC_PLLI2SP_DIV_6
AnnaBridge 146:22da6e220af6 2688 * @arg @ref LL_RCC_PLLI2SP_DIV_8
AnnaBridge 146:22da6e220af6 2689 * @retval PLLI2S clock frequency (in Hz)
AnnaBridge 146:22da6e220af6 2690 */
AnnaBridge 146:22da6e220af6 2691 #define __LL_RCC_CALC_PLLI2S_SPDIFRX_FREQ(__INPUTFREQ__, __PLLM__, __PLLI2SN__, __PLLI2SP__) (((__INPUTFREQ__) / (__PLLM__)) * (__PLLI2SN__) / \
AnnaBridge 146:22da6e220af6 2692 ((((__PLLI2SP__) >> RCC_PLLI2SCFGR_PLLI2SP_Pos) + 1U) * 2U))
AnnaBridge 146:22da6e220af6 2693
AnnaBridge 146:22da6e220af6 2694 #endif /* SPDIFRX */
AnnaBridge 146:22da6e220af6 2695
AnnaBridge 146:22da6e220af6 2696 /**
AnnaBridge 146:22da6e220af6 2697 * @brief Helper macro to calculate the PLLI2S frequency used for I2S domain
AnnaBridge 146:22da6e220af6 2698 * @note ex: @ref __LL_RCC_CALC_PLLI2S_I2S_FREQ (HSE_VALUE,@ref LL_RCC_PLLI2S_GetDivider (),
AnnaBridge 146:22da6e220af6 2699 * @ref LL_RCC_PLLI2S_GetN (), @ref LL_RCC_PLLI2S_GetR ());
AnnaBridge 146:22da6e220af6 2700 * @param __INPUTFREQ__ PLL Input frequency (based on HSE/HSI)
AnnaBridge 146:22da6e220af6 2701 * @param __PLLM__ This parameter can be one of the following values:
AnnaBridge 146:22da6e220af6 2702 * @arg @ref LL_RCC_PLLI2SM_DIV_2
AnnaBridge 146:22da6e220af6 2703 * @arg @ref LL_RCC_PLLI2SM_DIV_3
AnnaBridge 146:22da6e220af6 2704 * @arg @ref LL_RCC_PLLI2SM_DIV_4
AnnaBridge 146:22da6e220af6 2705 * @arg @ref LL_RCC_PLLI2SM_DIV_5
AnnaBridge 146:22da6e220af6 2706 * @arg @ref LL_RCC_PLLI2SM_DIV_6
AnnaBridge 146:22da6e220af6 2707 * @arg @ref LL_RCC_PLLI2SM_DIV_7
AnnaBridge 146:22da6e220af6 2708 * @arg @ref LL_RCC_PLLI2SM_DIV_8
AnnaBridge 146:22da6e220af6 2709 * @arg @ref LL_RCC_PLLI2SM_DIV_9
AnnaBridge 146:22da6e220af6 2710 * @arg @ref LL_RCC_PLLI2SM_DIV_10
AnnaBridge 146:22da6e220af6 2711 * @arg @ref LL_RCC_PLLI2SM_DIV_11
AnnaBridge 146:22da6e220af6 2712 * @arg @ref LL_RCC_PLLI2SM_DIV_12
AnnaBridge 146:22da6e220af6 2713 * @arg @ref LL_RCC_PLLI2SM_DIV_13
AnnaBridge 146:22da6e220af6 2714 * @arg @ref LL_RCC_PLLI2SM_DIV_14
AnnaBridge 146:22da6e220af6 2715 * @arg @ref LL_RCC_PLLI2SM_DIV_15
AnnaBridge 146:22da6e220af6 2716 * @arg @ref LL_RCC_PLLI2SM_DIV_16
AnnaBridge 146:22da6e220af6 2717 * @arg @ref LL_RCC_PLLI2SM_DIV_17
AnnaBridge 146:22da6e220af6 2718 * @arg @ref LL_RCC_PLLI2SM_DIV_18
AnnaBridge 146:22da6e220af6 2719 * @arg @ref LL_RCC_PLLI2SM_DIV_19
AnnaBridge 146:22da6e220af6 2720 * @arg @ref LL_RCC_PLLI2SM_DIV_20
AnnaBridge 146:22da6e220af6 2721 * @arg @ref LL_RCC_PLLI2SM_DIV_21
AnnaBridge 146:22da6e220af6 2722 * @arg @ref LL_RCC_PLLI2SM_DIV_22
AnnaBridge 146:22da6e220af6 2723 * @arg @ref LL_RCC_PLLI2SM_DIV_23
AnnaBridge 146:22da6e220af6 2724 * @arg @ref LL_RCC_PLLI2SM_DIV_24
AnnaBridge 146:22da6e220af6 2725 * @arg @ref LL_RCC_PLLI2SM_DIV_25
AnnaBridge 146:22da6e220af6 2726 * @arg @ref LL_RCC_PLLI2SM_DIV_26
AnnaBridge 146:22da6e220af6 2727 * @arg @ref LL_RCC_PLLI2SM_DIV_27
AnnaBridge 146:22da6e220af6 2728 * @arg @ref LL_RCC_PLLI2SM_DIV_28
AnnaBridge 146:22da6e220af6 2729 * @arg @ref LL_RCC_PLLI2SM_DIV_29
AnnaBridge 146:22da6e220af6 2730 * @arg @ref LL_RCC_PLLI2SM_DIV_30
AnnaBridge 146:22da6e220af6 2731 * @arg @ref LL_RCC_PLLI2SM_DIV_31
AnnaBridge 146:22da6e220af6 2732 * @arg @ref LL_RCC_PLLI2SM_DIV_32
AnnaBridge 146:22da6e220af6 2733 * @arg @ref LL_RCC_PLLI2SM_DIV_33
AnnaBridge 146:22da6e220af6 2734 * @arg @ref LL_RCC_PLLI2SM_DIV_34
AnnaBridge 146:22da6e220af6 2735 * @arg @ref LL_RCC_PLLI2SM_DIV_35
AnnaBridge 146:22da6e220af6 2736 * @arg @ref LL_RCC_PLLI2SM_DIV_36
AnnaBridge 146:22da6e220af6 2737 * @arg @ref LL_RCC_PLLI2SM_DIV_37
AnnaBridge 146:22da6e220af6 2738 * @arg @ref LL_RCC_PLLI2SM_DIV_38
AnnaBridge 146:22da6e220af6 2739 * @arg @ref LL_RCC_PLLI2SM_DIV_39
AnnaBridge 146:22da6e220af6 2740 * @arg @ref LL_RCC_PLLI2SM_DIV_40
AnnaBridge 146:22da6e220af6 2741 * @arg @ref LL_RCC_PLLI2SM_DIV_41
AnnaBridge 146:22da6e220af6 2742 * @arg @ref LL_RCC_PLLI2SM_DIV_42
AnnaBridge 146:22da6e220af6 2743 * @arg @ref LL_RCC_PLLI2SM_DIV_43
AnnaBridge 146:22da6e220af6 2744 * @arg @ref LL_RCC_PLLI2SM_DIV_44
AnnaBridge 146:22da6e220af6 2745 * @arg @ref LL_RCC_PLLI2SM_DIV_45
AnnaBridge 146:22da6e220af6 2746 * @arg @ref LL_RCC_PLLI2SM_DIV_46
AnnaBridge 146:22da6e220af6 2747 * @arg @ref LL_RCC_PLLI2SM_DIV_47
AnnaBridge 146:22da6e220af6 2748 * @arg @ref LL_RCC_PLLI2SM_DIV_48
AnnaBridge 146:22da6e220af6 2749 * @arg @ref LL_RCC_PLLI2SM_DIV_49
AnnaBridge 146:22da6e220af6 2750 * @arg @ref LL_RCC_PLLI2SM_DIV_50
AnnaBridge 146:22da6e220af6 2751 * @arg @ref LL_RCC_PLLI2SM_DIV_51
AnnaBridge 146:22da6e220af6 2752 * @arg @ref LL_RCC_PLLI2SM_DIV_52
AnnaBridge 146:22da6e220af6 2753 * @arg @ref LL_RCC_PLLI2SM_DIV_53
AnnaBridge 146:22da6e220af6 2754 * @arg @ref LL_RCC_PLLI2SM_DIV_54
AnnaBridge 146:22da6e220af6 2755 * @arg @ref LL_RCC_PLLI2SM_DIV_55
AnnaBridge 146:22da6e220af6 2756 * @arg @ref LL_RCC_PLLI2SM_DIV_56
AnnaBridge 146:22da6e220af6 2757 * @arg @ref LL_RCC_PLLI2SM_DIV_57
AnnaBridge 146:22da6e220af6 2758 * @arg @ref LL_RCC_PLLI2SM_DIV_58
AnnaBridge 146:22da6e220af6 2759 * @arg @ref LL_RCC_PLLI2SM_DIV_59
AnnaBridge 146:22da6e220af6 2760 * @arg @ref LL_RCC_PLLI2SM_DIV_60
AnnaBridge 146:22da6e220af6 2761 * @arg @ref LL_RCC_PLLI2SM_DIV_61
AnnaBridge 146:22da6e220af6 2762 * @arg @ref LL_RCC_PLLI2SM_DIV_62
AnnaBridge 146:22da6e220af6 2763 * @arg @ref LL_RCC_PLLI2SM_DIV_63
AnnaBridge 146:22da6e220af6 2764 * @param __PLLI2SN__ Between 50/192(*) and 432
AnnaBridge 146:22da6e220af6 2765 *
AnnaBridge 146:22da6e220af6 2766 * (*) value not defined in all devices.
AnnaBridge 146:22da6e220af6 2767 * @param __PLLI2SR__ This parameter can be one of the following values:
AnnaBridge 146:22da6e220af6 2768 * @arg @ref LL_RCC_PLLI2SR_DIV_2
AnnaBridge 146:22da6e220af6 2769 * @arg @ref LL_RCC_PLLI2SR_DIV_3
AnnaBridge 146:22da6e220af6 2770 * @arg @ref LL_RCC_PLLI2SR_DIV_4
AnnaBridge 146:22da6e220af6 2771 * @arg @ref LL_RCC_PLLI2SR_DIV_5
AnnaBridge 146:22da6e220af6 2772 * @arg @ref LL_RCC_PLLI2SR_DIV_6
AnnaBridge 146:22da6e220af6 2773 * @arg @ref LL_RCC_PLLI2SR_DIV_7
AnnaBridge 146:22da6e220af6 2774 * @retval PLLI2S clock frequency (in Hz)
AnnaBridge 146:22da6e220af6 2775 */
AnnaBridge 146:22da6e220af6 2776 #define __LL_RCC_CALC_PLLI2S_I2S_FREQ(__INPUTFREQ__, __PLLM__, __PLLI2SN__, __PLLI2SR__) (((__INPUTFREQ__) / (__PLLM__)) * (__PLLI2SN__) / \
AnnaBridge 146:22da6e220af6 2777 ((__PLLI2SR__) >> RCC_PLLI2SCFGR_PLLI2SR_Pos))
AnnaBridge 146:22da6e220af6 2778
AnnaBridge 146:22da6e220af6 2779 #if defined(RCC_PLLI2SCFGR_PLLI2SQ) && !defined(RCC_DCKCFGR_PLLI2SDIVQ)
AnnaBridge 146:22da6e220af6 2780 /**
AnnaBridge 146:22da6e220af6 2781 * @brief Helper macro to calculate the PLLI2S frequency used for 48Mhz domain
AnnaBridge 146:22da6e220af6 2782 * @note ex: @ref __LL_RCC_CALC_PLLI2S_48M_FREQ (HSE_VALUE,@ref LL_RCC_PLLI2S_GetDivider (),
AnnaBridge 146:22da6e220af6 2783 * @ref LL_RCC_PLLI2S_GetN (), @ref LL_RCC_PLLI2S_GetQ ());
AnnaBridge 146:22da6e220af6 2784 * @param __INPUTFREQ__ PLL Input frequency (based on HSE/HSI)
AnnaBridge 146:22da6e220af6 2785 * @param __PLLM__ This parameter can be one of the following values:
AnnaBridge 146:22da6e220af6 2786 * @arg @ref LL_RCC_PLLI2SM_DIV_2
AnnaBridge 146:22da6e220af6 2787 * @arg @ref LL_RCC_PLLI2SM_DIV_3
AnnaBridge 146:22da6e220af6 2788 * @arg @ref LL_RCC_PLLI2SM_DIV_4
AnnaBridge 146:22da6e220af6 2789 * @arg @ref LL_RCC_PLLI2SM_DIV_5
AnnaBridge 146:22da6e220af6 2790 * @arg @ref LL_RCC_PLLI2SM_DIV_6
AnnaBridge 146:22da6e220af6 2791 * @arg @ref LL_RCC_PLLI2SM_DIV_7
AnnaBridge 146:22da6e220af6 2792 * @arg @ref LL_RCC_PLLI2SM_DIV_8
AnnaBridge 146:22da6e220af6 2793 * @arg @ref LL_RCC_PLLI2SM_DIV_9
AnnaBridge 146:22da6e220af6 2794 * @arg @ref LL_RCC_PLLI2SM_DIV_10
AnnaBridge 146:22da6e220af6 2795 * @arg @ref LL_RCC_PLLI2SM_DIV_11
AnnaBridge 146:22da6e220af6 2796 * @arg @ref LL_RCC_PLLI2SM_DIV_12
AnnaBridge 146:22da6e220af6 2797 * @arg @ref LL_RCC_PLLI2SM_DIV_13
AnnaBridge 146:22da6e220af6 2798 * @arg @ref LL_RCC_PLLI2SM_DIV_14
AnnaBridge 146:22da6e220af6 2799 * @arg @ref LL_RCC_PLLI2SM_DIV_15
AnnaBridge 146:22da6e220af6 2800 * @arg @ref LL_RCC_PLLI2SM_DIV_16
AnnaBridge 146:22da6e220af6 2801 * @arg @ref LL_RCC_PLLI2SM_DIV_17
AnnaBridge 146:22da6e220af6 2802 * @arg @ref LL_RCC_PLLI2SM_DIV_18
AnnaBridge 146:22da6e220af6 2803 * @arg @ref LL_RCC_PLLI2SM_DIV_19
AnnaBridge 146:22da6e220af6 2804 * @arg @ref LL_RCC_PLLI2SM_DIV_20
AnnaBridge 146:22da6e220af6 2805 * @arg @ref LL_RCC_PLLI2SM_DIV_21
AnnaBridge 146:22da6e220af6 2806 * @arg @ref LL_RCC_PLLI2SM_DIV_22
AnnaBridge 146:22da6e220af6 2807 * @arg @ref LL_RCC_PLLI2SM_DIV_23
AnnaBridge 146:22da6e220af6 2808 * @arg @ref LL_RCC_PLLI2SM_DIV_24
AnnaBridge 146:22da6e220af6 2809 * @arg @ref LL_RCC_PLLI2SM_DIV_25
AnnaBridge 146:22da6e220af6 2810 * @arg @ref LL_RCC_PLLI2SM_DIV_26
AnnaBridge 146:22da6e220af6 2811 * @arg @ref LL_RCC_PLLI2SM_DIV_27
AnnaBridge 146:22da6e220af6 2812 * @arg @ref LL_RCC_PLLI2SM_DIV_28
AnnaBridge 146:22da6e220af6 2813 * @arg @ref LL_RCC_PLLI2SM_DIV_29
AnnaBridge 146:22da6e220af6 2814 * @arg @ref LL_RCC_PLLI2SM_DIV_30
AnnaBridge 146:22da6e220af6 2815 * @arg @ref LL_RCC_PLLI2SM_DIV_31
AnnaBridge 146:22da6e220af6 2816 * @arg @ref LL_RCC_PLLI2SM_DIV_32
AnnaBridge 146:22da6e220af6 2817 * @arg @ref LL_RCC_PLLI2SM_DIV_33
AnnaBridge 146:22da6e220af6 2818 * @arg @ref LL_RCC_PLLI2SM_DIV_34
AnnaBridge 146:22da6e220af6 2819 * @arg @ref LL_RCC_PLLI2SM_DIV_35
AnnaBridge 146:22da6e220af6 2820 * @arg @ref LL_RCC_PLLI2SM_DIV_36
AnnaBridge 146:22da6e220af6 2821 * @arg @ref LL_RCC_PLLI2SM_DIV_37
AnnaBridge 146:22da6e220af6 2822 * @arg @ref LL_RCC_PLLI2SM_DIV_38
AnnaBridge 146:22da6e220af6 2823 * @arg @ref LL_RCC_PLLI2SM_DIV_39
AnnaBridge 146:22da6e220af6 2824 * @arg @ref LL_RCC_PLLI2SM_DIV_40
AnnaBridge 146:22da6e220af6 2825 * @arg @ref LL_RCC_PLLI2SM_DIV_41
AnnaBridge 146:22da6e220af6 2826 * @arg @ref LL_RCC_PLLI2SM_DIV_42
AnnaBridge 146:22da6e220af6 2827 * @arg @ref LL_RCC_PLLI2SM_DIV_43
AnnaBridge 146:22da6e220af6 2828 * @arg @ref LL_RCC_PLLI2SM_DIV_44
AnnaBridge 146:22da6e220af6 2829 * @arg @ref LL_RCC_PLLI2SM_DIV_45
AnnaBridge 146:22da6e220af6 2830 * @arg @ref LL_RCC_PLLI2SM_DIV_46
AnnaBridge 146:22da6e220af6 2831 * @arg @ref LL_RCC_PLLI2SM_DIV_47
AnnaBridge 146:22da6e220af6 2832 * @arg @ref LL_RCC_PLLI2SM_DIV_48
AnnaBridge 146:22da6e220af6 2833 * @arg @ref LL_RCC_PLLI2SM_DIV_49
AnnaBridge 146:22da6e220af6 2834 * @arg @ref LL_RCC_PLLI2SM_DIV_50
AnnaBridge 146:22da6e220af6 2835 * @arg @ref LL_RCC_PLLI2SM_DIV_51
AnnaBridge 146:22da6e220af6 2836 * @arg @ref LL_RCC_PLLI2SM_DIV_52
AnnaBridge 146:22da6e220af6 2837 * @arg @ref LL_RCC_PLLI2SM_DIV_53
AnnaBridge 146:22da6e220af6 2838 * @arg @ref LL_RCC_PLLI2SM_DIV_54
AnnaBridge 146:22da6e220af6 2839 * @arg @ref LL_RCC_PLLI2SM_DIV_55
AnnaBridge 146:22da6e220af6 2840 * @arg @ref LL_RCC_PLLI2SM_DIV_56
AnnaBridge 146:22da6e220af6 2841 * @arg @ref LL_RCC_PLLI2SM_DIV_57
AnnaBridge 146:22da6e220af6 2842 * @arg @ref LL_RCC_PLLI2SM_DIV_58
AnnaBridge 146:22da6e220af6 2843 * @arg @ref LL_RCC_PLLI2SM_DIV_59
AnnaBridge 146:22da6e220af6 2844 * @arg @ref LL_RCC_PLLI2SM_DIV_60
AnnaBridge 146:22da6e220af6 2845 * @arg @ref LL_RCC_PLLI2SM_DIV_61
AnnaBridge 146:22da6e220af6 2846 * @arg @ref LL_RCC_PLLI2SM_DIV_62
AnnaBridge 146:22da6e220af6 2847 * @arg @ref LL_RCC_PLLI2SM_DIV_63
AnnaBridge 146:22da6e220af6 2848 * @param __PLLI2SN__ Between 50 and 432
AnnaBridge 146:22da6e220af6 2849 * @param __PLLI2SQ__ This parameter can be one of the following values:
AnnaBridge 146:22da6e220af6 2850 * @arg @ref LL_RCC_PLLI2SQ_DIV_2
AnnaBridge 146:22da6e220af6 2851 * @arg @ref LL_RCC_PLLI2SQ_DIV_3
AnnaBridge 146:22da6e220af6 2852 * @arg @ref LL_RCC_PLLI2SQ_DIV_4
AnnaBridge 146:22da6e220af6 2853 * @arg @ref LL_RCC_PLLI2SQ_DIV_5
AnnaBridge 146:22da6e220af6 2854 * @arg @ref LL_RCC_PLLI2SQ_DIV_6
AnnaBridge 146:22da6e220af6 2855 * @arg @ref LL_RCC_PLLI2SQ_DIV_7
AnnaBridge 146:22da6e220af6 2856 * @arg @ref LL_RCC_PLLI2SQ_DIV_8
AnnaBridge 146:22da6e220af6 2857 * @arg @ref LL_RCC_PLLI2SQ_DIV_9
AnnaBridge 146:22da6e220af6 2858 * @arg @ref LL_RCC_PLLI2SQ_DIV_10
AnnaBridge 146:22da6e220af6 2859 * @arg @ref LL_RCC_PLLI2SQ_DIV_11
AnnaBridge 146:22da6e220af6 2860 * @arg @ref LL_RCC_PLLI2SQ_DIV_12
AnnaBridge 146:22da6e220af6 2861 * @arg @ref LL_RCC_PLLI2SQ_DIV_13
AnnaBridge 146:22da6e220af6 2862 * @arg @ref LL_RCC_PLLI2SQ_DIV_14
AnnaBridge 146:22da6e220af6 2863 * @arg @ref LL_RCC_PLLI2SQ_DIV_15
AnnaBridge 146:22da6e220af6 2864 * @retval PLLI2S clock frequency (in Hz)
AnnaBridge 146:22da6e220af6 2865 */
AnnaBridge 146:22da6e220af6 2866 #define __LL_RCC_CALC_PLLI2S_48M_FREQ(__INPUTFREQ__, __PLLM__, __PLLI2SN__, __PLLI2SQ__) (((__INPUTFREQ__) / (__PLLM__)) * (__PLLI2SN__) / \
AnnaBridge 146:22da6e220af6 2867 ((__PLLI2SQ__) >> RCC_PLLI2SCFGR_PLLI2SQ_Pos))
AnnaBridge 146:22da6e220af6 2868
AnnaBridge 146:22da6e220af6 2869 #endif /* RCC_PLLI2SCFGR_PLLI2SQ && !RCC_DCKCFGR_PLLI2SDIVQ */
AnnaBridge 146:22da6e220af6 2870 #endif /* RCC_PLLI2S_SUPPORT */
AnnaBridge 146:22da6e220af6 2871
AnnaBridge 146:22da6e220af6 2872 /**
AnnaBridge 146:22da6e220af6 2873 * @brief Helper macro to calculate the HCLK frequency
AnnaBridge 146:22da6e220af6 2874 * @param __SYSCLKFREQ__ SYSCLK frequency (based on HSE/HSI/PLLCLK)
AnnaBridge 146:22da6e220af6 2875 * @param __AHBPRESCALER__ This parameter can be one of the following values:
AnnaBridge 146:22da6e220af6 2876 * @arg @ref LL_RCC_SYSCLK_DIV_1
AnnaBridge 146:22da6e220af6 2877 * @arg @ref LL_RCC_SYSCLK_DIV_2
AnnaBridge 146:22da6e220af6 2878 * @arg @ref LL_RCC_SYSCLK_DIV_4
AnnaBridge 146:22da6e220af6 2879 * @arg @ref LL_RCC_SYSCLK_DIV_8
AnnaBridge 146:22da6e220af6 2880 * @arg @ref LL_RCC_SYSCLK_DIV_16
AnnaBridge 146:22da6e220af6 2881 * @arg @ref LL_RCC_SYSCLK_DIV_64
AnnaBridge 146:22da6e220af6 2882 * @arg @ref LL_RCC_SYSCLK_DIV_128
AnnaBridge 146:22da6e220af6 2883 * @arg @ref LL_RCC_SYSCLK_DIV_256
AnnaBridge 146:22da6e220af6 2884 * @arg @ref LL_RCC_SYSCLK_DIV_512
AnnaBridge 146:22da6e220af6 2885 * @retval HCLK clock frequency (in Hz)
AnnaBridge 146:22da6e220af6 2886 */
AnnaBridge 146:22da6e220af6 2887 #define __LL_RCC_CALC_HCLK_FREQ(__SYSCLKFREQ__, __AHBPRESCALER__) ((__SYSCLKFREQ__) >> AHBPrescTable[((__AHBPRESCALER__) & RCC_CFGR_HPRE) >> RCC_CFGR_HPRE_Pos])
AnnaBridge 146:22da6e220af6 2888
AnnaBridge 146:22da6e220af6 2889 /**
AnnaBridge 146:22da6e220af6 2890 * @brief Helper macro to calculate the PCLK1 frequency (ABP1)
AnnaBridge 146:22da6e220af6 2891 * @param __HCLKFREQ__ HCLK frequency
AnnaBridge 146:22da6e220af6 2892 * @param __APB1PRESCALER__ This parameter can be one of the following values:
AnnaBridge 146:22da6e220af6 2893 * @arg @ref LL_RCC_APB1_DIV_1
AnnaBridge 146:22da6e220af6 2894 * @arg @ref LL_RCC_APB1_DIV_2
AnnaBridge 146:22da6e220af6 2895 * @arg @ref LL_RCC_APB1_DIV_4
AnnaBridge 146:22da6e220af6 2896 * @arg @ref LL_RCC_APB1_DIV_8
AnnaBridge 146:22da6e220af6 2897 * @arg @ref LL_RCC_APB1_DIV_16
AnnaBridge 146:22da6e220af6 2898 * @retval PCLK1 clock frequency (in Hz)
AnnaBridge 146:22da6e220af6 2899 */
AnnaBridge 146:22da6e220af6 2900 #define __LL_RCC_CALC_PCLK1_FREQ(__HCLKFREQ__, __APB1PRESCALER__) ((__HCLKFREQ__) >> APBPrescTable[(__APB1PRESCALER__) >> RCC_CFGR_PPRE1_Pos])
AnnaBridge 146:22da6e220af6 2901
AnnaBridge 146:22da6e220af6 2902 /**
AnnaBridge 146:22da6e220af6 2903 * @brief Helper macro to calculate the PCLK2 frequency (ABP2)
AnnaBridge 146:22da6e220af6 2904 * @param __HCLKFREQ__ HCLK frequency
AnnaBridge 146:22da6e220af6 2905 * @param __APB2PRESCALER__ This parameter can be one of the following values:
AnnaBridge 146:22da6e220af6 2906 * @arg @ref LL_RCC_APB2_DIV_1
AnnaBridge 146:22da6e220af6 2907 * @arg @ref LL_RCC_APB2_DIV_2
AnnaBridge 146:22da6e220af6 2908 * @arg @ref LL_RCC_APB2_DIV_4
AnnaBridge 146:22da6e220af6 2909 * @arg @ref LL_RCC_APB2_DIV_8
AnnaBridge 146:22da6e220af6 2910 * @arg @ref LL_RCC_APB2_DIV_16
AnnaBridge 146:22da6e220af6 2911 * @retval PCLK2 clock frequency (in Hz)
AnnaBridge 146:22da6e220af6 2912 */
AnnaBridge 146:22da6e220af6 2913 #define __LL_RCC_CALC_PCLK2_FREQ(__HCLKFREQ__, __APB2PRESCALER__) ((__HCLKFREQ__) >> APBPrescTable[(__APB2PRESCALER__) >> RCC_CFGR_PPRE2_Pos])
AnnaBridge 146:22da6e220af6 2914
AnnaBridge 146:22da6e220af6 2915 /**
AnnaBridge 146:22da6e220af6 2916 * @}
AnnaBridge 146:22da6e220af6 2917 */
AnnaBridge 146:22da6e220af6 2918
AnnaBridge 146:22da6e220af6 2919 /**
AnnaBridge 146:22da6e220af6 2920 * @}
AnnaBridge 146:22da6e220af6 2921 */
AnnaBridge 146:22da6e220af6 2922
AnnaBridge 146:22da6e220af6 2923 /* Exported functions --------------------------------------------------------*/
AnnaBridge 146:22da6e220af6 2924 /** @defgroup RCC_LL_Exported_Functions RCC Exported Functions
AnnaBridge 146:22da6e220af6 2925 * @{
AnnaBridge 146:22da6e220af6 2926 */
AnnaBridge 146:22da6e220af6 2927
AnnaBridge 146:22da6e220af6 2928 /** @defgroup RCC_LL_EF_HSE HSE
AnnaBridge 146:22da6e220af6 2929 * @{
AnnaBridge 146:22da6e220af6 2930 */
AnnaBridge 146:22da6e220af6 2931
AnnaBridge 146:22da6e220af6 2932 /**
AnnaBridge 146:22da6e220af6 2933 * @brief Enable the Clock Security System.
AnnaBridge 146:22da6e220af6 2934 * @rmtoll CR CSSON LL_RCC_HSE_EnableCSS
AnnaBridge 146:22da6e220af6 2935 * @retval None
AnnaBridge 146:22da6e220af6 2936 */
AnnaBridge 146:22da6e220af6 2937 __STATIC_INLINE void LL_RCC_HSE_EnableCSS(void)
AnnaBridge 146:22da6e220af6 2938 {
AnnaBridge 146:22da6e220af6 2939 SET_BIT(RCC->CR, RCC_CR_CSSON);
AnnaBridge 146:22da6e220af6 2940 }
AnnaBridge 146:22da6e220af6 2941
AnnaBridge 146:22da6e220af6 2942 /**
AnnaBridge 146:22da6e220af6 2943 * @brief Enable HSE external oscillator (HSE Bypass)
AnnaBridge 146:22da6e220af6 2944 * @rmtoll CR HSEBYP LL_RCC_HSE_EnableBypass
AnnaBridge 146:22da6e220af6 2945 * @retval None
AnnaBridge 146:22da6e220af6 2946 */
AnnaBridge 146:22da6e220af6 2947 __STATIC_INLINE void LL_RCC_HSE_EnableBypass(void)
AnnaBridge 146:22da6e220af6 2948 {
AnnaBridge 146:22da6e220af6 2949 SET_BIT(RCC->CR, RCC_CR_HSEBYP);
AnnaBridge 146:22da6e220af6 2950 }
AnnaBridge 146:22da6e220af6 2951
AnnaBridge 146:22da6e220af6 2952 /**
AnnaBridge 146:22da6e220af6 2953 * @brief Disable HSE external oscillator (HSE Bypass)
AnnaBridge 146:22da6e220af6 2954 * @rmtoll CR HSEBYP LL_RCC_HSE_DisableBypass
AnnaBridge 146:22da6e220af6 2955 * @retval None
AnnaBridge 146:22da6e220af6 2956 */
AnnaBridge 146:22da6e220af6 2957 __STATIC_INLINE void LL_RCC_HSE_DisableBypass(void)
AnnaBridge 146:22da6e220af6 2958 {
AnnaBridge 146:22da6e220af6 2959 CLEAR_BIT(RCC->CR, RCC_CR_HSEBYP);
AnnaBridge 146:22da6e220af6 2960 }
AnnaBridge 146:22da6e220af6 2961
AnnaBridge 146:22da6e220af6 2962 /**
AnnaBridge 146:22da6e220af6 2963 * @brief Enable HSE crystal oscillator (HSE ON)
AnnaBridge 146:22da6e220af6 2964 * @rmtoll CR HSEON LL_RCC_HSE_Enable
AnnaBridge 146:22da6e220af6 2965 * @retval None
AnnaBridge 146:22da6e220af6 2966 */
AnnaBridge 146:22da6e220af6 2967 __STATIC_INLINE void LL_RCC_HSE_Enable(void)
AnnaBridge 146:22da6e220af6 2968 {
AnnaBridge 146:22da6e220af6 2969 SET_BIT(RCC->CR, RCC_CR_HSEON);
AnnaBridge 146:22da6e220af6 2970 }
AnnaBridge 146:22da6e220af6 2971
AnnaBridge 146:22da6e220af6 2972 /**
AnnaBridge 146:22da6e220af6 2973 * @brief Disable HSE crystal oscillator (HSE ON)
AnnaBridge 146:22da6e220af6 2974 * @rmtoll CR HSEON LL_RCC_HSE_Disable
AnnaBridge 146:22da6e220af6 2975 * @retval None
AnnaBridge 146:22da6e220af6 2976 */
AnnaBridge 146:22da6e220af6 2977 __STATIC_INLINE void LL_RCC_HSE_Disable(void)
AnnaBridge 146:22da6e220af6 2978 {
AnnaBridge 146:22da6e220af6 2979 CLEAR_BIT(RCC->CR, RCC_CR_HSEON);
AnnaBridge 146:22da6e220af6 2980 }
AnnaBridge 146:22da6e220af6 2981
AnnaBridge 146:22da6e220af6 2982 /**
AnnaBridge 146:22da6e220af6 2983 * @brief Check if HSE oscillator Ready
AnnaBridge 146:22da6e220af6 2984 * @rmtoll CR HSERDY LL_RCC_HSE_IsReady
AnnaBridge 146:22da6e220af6 2985 * @retval State of bit (1 or 0).
AnnaBridge 146:22da6e220af6 2986 */
AnnaBridge 146:22da6e220af6 2987 __STATIC_INLINE uint32_t LL_RCC_HSE_IsReady(void)
AnnaBridge 146:22da6e220af6 2988 {
AnnaBridge 146:22da6e220af6 2989 return (READ_BIT(RCC->CR, RCC_CR_HSERDY) == (RCC_CR_HSERDY));
AnnaBridge 146:22da6e220af6 2990 }
AnnaBridge 146:22da6e220af6 2991
AnnaBridge 146:22da6e220af6 2992 /**
AnnaBridge 146:22da6e220af6 2993 * @}
AnnaBridge 146:22da6e220af6 2994 */
AnnaBridge 146:22da6e220af6 2995
AnnaBridge 146:22da6e220af6 2996 /** @defgroup RCC_LL_EF_HSI HSI
AnnaBridge 146:22da6e220af6 2997 * @{
AnnaBridge 146:22da6e220af6 2998 */
AnnaBridge 146:22da6e220af6 2999
AnnaBridge 146:22da6e220af6 3000 /**
AnnaBridge 146:22da6e220af6 3001 * @brief Enable HSI oscillator
AnnaBridge 146:22da6e220af6 3002 * @rmtoll CR HSION LL_RCC_HSI_Enable
AnnaBridge 146:22da6e220af6 3003 * @retval None
AnnaBridge 146:22da6e220af6 3004 */
AnnaBridge 146:22da6e220af6 3005 __STATIC_INLINE void LL_RCC_HSI_Enable(void)
AnnaBridge 146:22da6e220af6 3006 {
AnnaBridge 146:22da6e220af6 3007 SET_BIT(RCC->CR, RCC_CR_HSION);
AnnaBridge 146:22da6e220af6 3008 }
AnnaBridge 146:22da6e220af6 3009
AnnaBridge 146:22da6e220af6 3010 /**
AnnaBridge 146:22da6e220af6 3011 * @brief Disable HSI oscillator
AnnaBridge 146:22da6e220af6 3012 * @rmtoll CR HSION LL_RCC_HSI_Disable
AnnaBridge 146:22da6e220af6 3013 * @retval None
AnnaBridge 146:22da6e220af6 3014 */
AnnaBridge 146:22da6e220af6 3015 __STATIC_INLINE void LL_RCC_HSI_Disable(void)
AnnaBridge 146:22da6e220af6 3016 {
AnnaBridge 146:22da6e220af6 3017 CLEAR_BIT(RCC->CR, RCC_CR_HSION);
AnnaBridge 146:22da6e220af6 3018 }
AnnaBridge 146:22da6e220af6 3019
AnnaBridge 146:22da6e220af6 3020 /**
AnnaBridge 146:22da6e220af6 3021 * @brief Check if HSI clock is ready
AnnaBridge 146:22da6e220af6 3022 * @rmtoll CR HSIRDY LL_RCC_HSI_IsReady
AnnaBridge 146:22da6e220af6 3023 * @retval State of bit (1 or 0).
AnnaBridge 146:22da6e220af6 3024 */
AnnaBridge 146:22da6e220af6 3025 __STATIC_INLINE uint32_t LL_RCC_HSI_IsReady(void)
AnnaBridge 146:22da6e220af6 3026 {
AnnaBridge 146:22da6e220af6 3027 return (READ_BIT(RCC->CR, RCC_CR_HSIRDY) == (RCC_CR_HSIRDY));
AnnaBridge 146:22da6e220af6 3028 }
AnnaBridge 146:22da6e220af6 3029
AnnaBridge 146:22da6e220af6 3030 /**
AnnaBridge 146:22da6e220af6 3031 * @brief Get HSI Calibration value
AnnaBridge 146:22da6e220af6 3032 * @note When HSITRIM is written, HSICAL is updated with the sum of
AnnaBridge 146:22da6e220af6 3033 * HSITRIM and the factory trim value
AnnaBridge 146:22da6e220af6 3034 * @rmtoll CR HSICAL LL_RCC_HSI_GetCalibration
AnnaBridge 146:22da6e220af6 3035 * @retval Between Min_Data = 0x00 and Max_Data = 0xFF
AnnaBridge 146:22da6e220af6 3036 */
AnnaBridge 146:22da6e220af6 3037 __STATIC_INLINE uint32_t LL_RCC_HSI_GetCalibration(void)
AnnaBridge 146:22da6e220af6 3038 {
AnnaBridge 146:22da6e220af6 3039 return (uint32_t)(READ_BIT(RCC->CR, RCC_CR_HSICAL) >> RCC_CR_HSICAL_Pos);
AnnaBridge 146:22da6e220af6 3040 }
AnnaBridge 146:22da6e220af6 3041
AnnaBridge 146:22da6e220af6 3042 /**
AnnaBridge 146:22da6e220af6 3043 * @brief Set HSI Calibration trimming
AnnaBridge 146:22da6e220af6 3044 * @note user-programmable trimming value that is added to the HSICAL
AnnaBridge 146:22da6e220af6 3045 * @note Default value is 16, which, when added to the HSICAL value,
AnnaBridge 146:22da6e220af6 3046 * should trim the HSI to 16 MHz +/- 1 %
AnnaBridge 146:22da6e220af6 3047 * @rmtoll CR HSITRIM LL_RCC_HSI_SetCalibTrimming
AnnaBridge 146:22da6e220af6 3048 * @param Value Between Min_Data = 0 and Max_Data = 31
AnnaBridge 146:22da6e220af6 3049 * @retval None
AnnaBridge 146:22da6e220af6 3050 */
AnnaBridge 146:22da6e220af6 3051 __STATIC_INLINE void LL_RCC_HSI_SetCalibTrimming(uint32_t Value)
AnnaBridge 146:22da6e220af6 3052 {
AnnaBridge 146:22da6e220af6 3053 MODIFY_REG(RCC->CR, RCC_CR_HSITRIM, Value << RCC_CR_HSITRIM_Pos);
AnnaBridge 146:22da6e220af6 3054 }
AnnaBridge 146:22da6e220af6 3055
AnnaBridge 146:22da6e220af6 3056 /**
AnnaBridge 146:22da6e220af6 3057 * @brief Get HSI Calibration trimming
AnnaBridge 146:22da6e220af6 3058 * @rmtoll CR HSITRIM LL_RCC_HSI_GetCalibTrimming
AnnaBridge 146:22da6e220af6 3059 * @retval Between Min_Data = 0 and Max_Data = 31
AnnaBridge 146:22da6e220af6 3060 */
AnnaBridge 146:22da6e220af6 3061 __STATIC_INLINE uint32_t LL_RCC_HSI_GetCalibTrimming(void)
AnnaBridge 146:22da6e220af6 3062 {
AnnaBridge 146:22da6e220af6 3063 return (uint32_t)(READ_BIT(RCC->CR, RCC_CR_HSITRIM) >> RCC_CR_HSITRIM_Pos);
AnnaBridge 146:22da6e220af6 3064 }
AnnaBridge 146:22da6e220af6 3065
AnnaBridge 146:22da6e220af6 3066 /**
AnnaBridge 146:22da6e220af6 3067 * @}
AnnaBridge 146:22da6e220af6 3068 */
AnnaBridge 146:22da6e220af6 3069
AnnaBridge 146:22da6e220af6 3070 /** @defgroup RCC_LL_EF_LSE LSE
AnnaBridge 146:22da6e220af6 3071 * @{
AnnaBridge 146:22da6e220af6 3072 */
AnnaBridge 146:22da6e220af6 3073
AnnaBridge 146:22da6e220af6 3074 /**
AnnaBridge 146:22da6e220af6 3075 * @brief Enable Low Speed External (LSE) crystal.
AnnaBridge 146:22da6e220af6 3076 * @rmtoll BDCR LSEON LL_RCC_LSE_Enable
AnnaBridge 146:22da6e220af6 3077 * @retval None
AnnaBridge 146:22da6e220af6 3078 */
AnnaBridge 146:22da6e220af6 3079 __STATIC_INLINE void LL_RCC_LSE_Enable(void)
AnnaBridge 146:22da6e220af6 3080 {
AnnaBridge 146:22da6e220af6 3081 SET_BIT(RCC->BDCR, RCC_BDCR_LSEON);
AnnaBridge 146:22da6e220af6 3082 }
AnnaBridge 146:22da6e220af6 3083
AnnaBridge 146:22da6e220af6 3084 /**
AnnaBridge 146:22da6e220af6 3085 * @brief Disable Low Speed External (LSE) crystal.
AnnaBridge 146:22da6e220af6 3086 * @rmtoll BDCR LSEON LL_RCC_LSE_Disable
AnnaBridge 146:22da6e220af6 3087 * @retval None
AnnaBridge 146:22da6e220af6 3088 */
AnnaBridge 146:22da6e220af6 3089 __STATIC_INLINE void LL_RCC_LSE_Disable(void)
AnnaBridge 146:22da6e220af6 3090 {
AnnaBridge 146:22da6e220af6 3091 CLEAR_BIT(RCC->BDCR, RCC_BDCR_LSEON);
AnnaBridge 146:22da6e220af6 3092 }
AnnaBridge 146:22da6e220af6 3093
AnnaBridge 146:22da6e220af6 3094 /**
AnnaBridge 146:22da6e220af6 3095 * @brief Enable external clock source (LSE bypass).
AnnaBridge 146:22da6e220af6 3096 * @rmtoll BDCR LSEBYP LL_RCC_LSE_EnableBypass
AnnaBridge 146:22da6e220af6 3097 * @retval None
AnnaBridge 146:22da6e220af6 3098 */
AnnaBridge 146:22da6e220af6 3099 __STATIC_INLINE void LL_RCC_LSE_EnableBypass(void)
AnnaBridge 146:22da6e220af6 3100 {
AnnaBridge 146:22da6e220af6 3101 SET_BIT(RCC->BDCR, RCC_BDCR_LSEBYP);
AnnaBridge 146:22da6e220af6 3102 }
AnnaBridge 146:22da6e220af6 3103
AnnaBridge 146:22da6e220af6 3104 /**
AnnaBridge 146:22da6e220af6 3105 * @brief Disable external clock source (LSE bypass).
AnnaBridge 146:22da6e220af6 3106 * @rmtoll BDCR LSEBYP LL_RCC_LSE_DisableBypass
AnnaBridge 146:22da6e220af6 3107 * @retval None
AnnaBridge 146:22da6e220af6 3108 */
AnnaBridge 146:22da6e220af6 3109 __STATIC_INLINE void LL_RCC_LSE_DisableBypass(void)
AnnaBridge 146:22da6e220af6 3110 {
AnnaBridge 146:22da6e220af6 3111 CLEAR_BIT(RCC->BDCR, RCC_BDCR_LSEBYP);
AnnaBridge 146:22da6e220af6 3112 }
AnnaBridge 146:22da6e220af6 3113
AnnaBridge 146:22da6e220af6 3114 /**
AnnaBridge 146:22da6e220af6 3115 * @brief Check if LSE oscillator Ready
AnnaBridge 146:22da6e220af6 3116 * @rmtoll BDCR LSERDY LL_RCC_LSE_IsReady
AnnaBridge 146:22da6e220af6 3117 * @retval State of bit (1 or 0).
AnnaBridge 146:22da6e220af6 3118 */
AnnaBridge 146:22da6e220af6 3119 __STATIC_INLINE uint32_t LL_RCC_LSE_IsReady(void)
AnnaBridge 146:22da6e220af6 3120 {
AnnaBridge 146:22da6e220af6 3121 return (READ_BIT(RCC->BDCR, RCC_BDCR_LSERDY) == (RCC_BDCR_LSERDY));
AnnaBridge 146:22da6e220af6 3122 }
AnnaBridge 146:22da6e220af6 3123
AnnaBridge 146:22da6e220af6 3124 #if defined(RCC_BDCR_LSEMOD)
AnnaBridge 146:22da6e220af6 3125 /**
AnnaBridge 146:22da6e220af6 3126 * @brief Enable LSE high drive mode.
AnnaBridge 146:22da6e220af6 3127 * @note LSE high drive mode can be enabled only when the LSE clock is disabled
AnnaBridge 146:22da6e220af6 3128 * @rmtoll BDCR LSEMOD LL_RCC_LSE_EnableHighDriveMode
AnnaBridge 146:22da6e220af6 3129 * @retval None
AnnaBridge 146:22da6e220af6 3130 */
AnnaBridge 146:22da6e220af6 3131 __STATIC_INLINE void LL_RCC_LSE_EnableHighDriveMode(void)
AnnaBridge 146:22da6e220af6 3132 {
AnnaBridge 146:22da6e220af6 3133 SET_BIT(RCC->BDCR, RCC_BDCR_LSEMOD);
AnnaBridge 146:22da6e220af6 3134 }
AnnaBridge 146:22da6e220af6 3135
AnnaBridge 146:22da6e220af6 3136 /**
AnnaBridge 146:22da6e220af6 3137 * @brief Disable LSE high drive mode.
AnnaBridge 146:22da6e220af6 3138 * @note LSE high drive mode can be disabled only when the LSE clock is disabled
AnnaBridge 146:22da6e220af6 3139 * @rmtoll BDCR LSEMOD LL_RCC_LSE_DisableHighDriveMode
AnnaBridge 146:22da6e220af6 3140 * @retval None
AnnaBridge 146:22da6e220af6 3141 */
AnnaBridge 146:22da6e220af6 3142 __STATIC_INLINE void LL_RCC_LSE_DisableHighDriveMode(void)
AnnaBridge 146:22da6e220af6 3143 {
AnnaBridge 146:22da6e220af6 3144 CLEAR_BIT(RCC->BDCR, RCC_BDCR_LSEMOD);
AnnaBridge 146:22da6e220af6 3145 }
AnnaBridge 146:22da6e220af6 3146 #endif /* RCC_BDCR_LSEMOD */
AnnaBridge 146:22da6e220af6 3147
AnnaBridge 146:22da6e220af6 3148 /**
AnnaBridge 146:22da6e220af6 3149 * @}
AnnaBridge 146:22da6e220af6 3150 */
AnnaBridge 146:22da6e220af6 3151
AnnaBridge 146:22da6e220af6 3152 /** @defgroup RCC_LL_EF_LSI LSI
AnnaBridge 146:22da6e220af6 3153 * @{
AnnaBridge 146:22da6e220af6 3154 */
AnnaBridge 146:22da6e220af6 3155
AnnaBridge 146:22da6e220af6 3156 /**
AnnaBridge 146:22da6e220af6 3157 * @brief Enable LSI Oscillator
AnnaBridge 146:22da6e220af6 3158 * @rmtoll CSR LSION LL_RCC_LSI_Enable
AnnaBridge 146:22da6e220af6 3159 * @retval None
AnnaBridge 146:22da6e220af6 3160 */
AnnaBridge 146:22da6e220af6 3161 __STATIC_INLINE void LL_RCC_LSI_Enable(void)
AnnaBridge 146:22da6e220af6 3162 {
AnnaBridge 146:22da6e220af6 3163 SET_BIT(RCC->CSR, RCC_CSR_LSION);
AnnaBridge 146:22da6e220af6 3164 }
AnnaBridge 146:22da6e220af6 3165
AnnaBridge 146:22da6e220af6 3166 /**
AnnaBridge 146:22da6e220af6 3167 * @brief Disable LSI Oscillator
AnnaBridge 146:22da6e220af6 3168 * @rmtoll CSR LSION LL_RCC_LSI_Disable
AnnaBridge 146:22da6e220af6 3169 * @retval None
AnnaBridge 146:22da6e220af6 3170 */
AnnaBridge 146:22da6e220af6 3171 __STATIC_INLINE void LL_RCC_LSI_Disable(void)
AnnaBridge 146:22da6e220af6 3172 {
AnnaBridge 146:22da6e220af6 3173 CLEAR_BIT(RCC->CSR, RCC_CSR_LSION);
AnnaBridge 146:22da6e220af6 3174 }
AnnaBridge 146:22da6e220af6 3175
AnnaBridge 146:22da6e220af6 3176 /**
AnnaBridge 146:22da6e220af6 3177 * @brief Check if LSI is Ready
AnnaBridge 146:22da6e220af6 3178 * @rmtoll CSR LSIRDY LL_RCC_LSI_IsReady
AnnaBridge 146:22da6e220af6 3179 * @retval State of bit (1 or 0).
AnnaBridge 146:22da6e220af6 3180 */
AnnaBridge 146:22da6e220af6 3181 __STATIC_INLINE uint32_t LL_RCC_LSI_IsReady(void)
AnnaBridge 146:22da6e220af6 3182 {
AnnaBridge 146:22da6e220af6 3183 return (READ_BIT(RCC->CSR, RCC_CSR_LSIRDY) == (RCC_CSR_LSIRDY));
AnnaBridge 146:22da6e220af6 3184 }
AnnaBridge 146:22da6e220af6 3185
AnnaBridge 146:22da6e220af6 3186 /**
AnnaBridge 146:22da6e220af6 3187 * @}
AnnaBridge 146:22da6e220af6 3188 */
AnnaBridge 146:22da6e220af6 3189
AnnaBridge 146:22da6e220af6 3190 /** @defgroup RCC_LL_EF_System System
AnnaBridge 146:22da6e220af6 3191 * @{
AnnaBridge 146:22da6e220af6 3192 */
AnnaBridge 146:22da6e220af6 3193
AnnaBridge 146:22da6e220af6 3194 /**
AnnaBridge 146:22da6e220af6 3195 * @brief Configure the system clock source
AnnaBridge 146:22da6e220af6 3196 * @rmtoll CFGR SW LL_RCC_SetSysClkSource
AnnaBridge 146:22da6e220af6 3197 * @param Source This parameter can be one of the following values:
AnnaBridge 146:22da6e220af6 3198 * @arg @ref LL_RCC_SYS_CLKSOURCE_HSI
AnnaBridge 146:22da6e220af6 3199 * @arg @ref LL_RCC_SYS_CLKSOURCE_HSE
AnnaBridge 146:22da6e220af6 3200 * @arg @ref LL_RCC_SYS_CLKSOURCE_PLL
AnnaBridge 146:22da6e220af6 3201 * @arg @ref LL_RCC_SYS_CLKSOURCE_PLLR (*)
AnnaBridge 146:22da6e220af6 3202 *
AnnaBridge 146:22da6e220af6 3203 * (*) value not defined in all devices.
AnnaBridge 146:22da6e220af6 3204 * @retval None
AnnaBridge 146:22da6e220af6 3205 */
AnnaBridge 146:22da6e220af6 3206 __STATIC_INLINE void LL_RCC_SetSysClkSource(uint32_t Source)
AnnaBridge 146:22da6e220af6 3207 {
AnnaBridge 146:22da6e220af6 3208 MODIFY_REG(RCC->CFGR, RCC_CFGR_SW, Source);
AnnaBridge 146:22da6e220af6 3209 }
AnnaBridge 146:22da6e220af6 3210
AnnaBridge 146:22da6e220af6 3211 /**
AnnaBridge 146:22da6e220af6 3212 * @brief Get the system clock source
AnnaBridge 146:22da6e220af6 3213 * @rmtoll CFGR SWS LL_RCC_GetSysClkSource
AnnaBridge 146:22da6e220af6 3214 * @retval Returned value can be one of the following values:
AnnaBridge 146:22da6e220af6 3215 * @arg @ref LL_RCC_SYS_CLKSOURCE_STATUS_HSI
AnnaBridge 146:22da6e220af6 3216 * @arg @ref LL_RCC_SYS_CLKSOURCE_STATUS_HSE
AnnaBridge 146:22da6e220af6 3217 * @arg @ref LL_RCC_SYS_CLKSOURCE_STATUS_PLL
AnnaBridge 146:22da6e220af6 3218 * @arg @ref LL_RCC_SYS_CLKSOURCE_STATUS_PLLR (*)
AnnaBridge 146:22da6e220af6 3219 *
AnnaBridge 146:22da6e220af6 3220 * (*) value not defined in all devices.
AnnaBridge 146:22da6e220af6 3221 */
AnnaBridge 146:22da6e220af6 3222 __STATIC_INLINE uint32_t LL_RCC_GetSysClkSource(void)
AnnaBridge 146:22da6e220af6 3223 {
AnnaBridge 146:22da6e220af6 3224 return (uint32_t)(READ_BIT(RCC->CFGR, RCC_CFGR_SWS));
AnnaBridge 146:22da6e220af6 3225 }
AnnaBridge 146:22da6e220af6 3226
AnnaBridge 146:22da6e220af6 3227 /**
AnnaBridge 146:22da6e220af6 3228 * @brief Set AHB prescaler
AnnaBridge 146:22da6e220af6 3229 * @rmtoll CFGR HPRE LL_RCC_SetAHBPrescaler
AnnaBridge 146:22da6e220af6 3230 * @param Prescaler This parameter can be one of the following values:
AnnaBridge 146:22da6e220af6 3231 * @arg @ref LL_RCC_SYSCLK_DIV_1
AnnaBridge 146:22da6e220af6 3232 * @arg @ref LL_RCC_SYSCLK_DIV_2
AnnaBridge 146:22da6e220af6 3233 * @arg @ref LL_RCC_SYSCLK_DIV_4
AnnaBridge 146:22da6e220af6 3234 * @arg @ref LL_RCC_SYSCLK_DIV_8
AnnaBridge 146:22da6e220af6 3235 * @arg @ref LL_RCC_SYSCLK_DIV_16
AnnaBridge 146:22da6e220af6 3236 * @arg @ref LL_RCC_SYSCLK_DIV_64
AnnaBridge 146:22da6e220af6 3237 * @arg @ref LL_RCC_SYSCLK_DIV_128
AnnaBridge 146:22da6e220af6 3238 * @arg @ref LL_RCC_SYSCLK_DIV_256
AnnaBridge 146:22da6e220af6 3239 * @arg @ref LL_RCC_SYSCLK_DIV_512
AnnaBridge 146:22da6e220af6 3240 * @retval None
AnnaBridge 146:22da6e220af6 3241 */
AnnaBridge 146:22da6e220af6 3242 __STATIC_INLINE void LL_RCC_SetAHBPrescaler(uint32_t Prescaler)
AnnaBridge 146:22da6e220af6 3243 {
AnnaBridge 146:22da6e220af6 3244 MODIFY_REG(RCC->CFGR, RCC_CFGR_HPRE, Prescaler);
AnnaBridge 146:22da6e220af6 3245 }
AnnaBridge 146:22da6e220af6 3246
AnnaBridge 146:22da6e220af6 3247 /**
AnnaBridge 146:22da6e220af6 3248 * @brief Set APB1 prescaler
AnnaBridge 146:22da6e220af6 3249 * @rmtoll CFGR PPRE1 LL_RCC_SetAPB1Prescaler
AnnaBridge 146:22da6e220af6 3250 * @param Prescaler This parameter can be one of the following values:
AnnaBridge 146:22da6e220af6 3251 * @arg @ref LL_RCC_APB1_DIV_1
AnnaBridge 146:22da6e220af6 3252 * @arg @ref LL_RCC_APB1_DIV_2
AnnaBridge 146:22da6e220af6 3253 * @arg @ref LL_RCC_APB1_DIV_4
AnnaBridge 146:22da6e220af6 3254 * @arg @ref LL_RCC_APB1_DIV_8
AnnaBridge 146:22da6e220af6 3255 * @arg @ref LL_RCC_APB1_DIV_16
AnnaBridge 146:22da6e220af6 3256 * @retval None
AnnaBridge 146:22da6e220af6 3257 */
AnnaBridge 146:22da6e220af6 3258 __STATIC_INLINE void LL_RCC_SetAPB1Prescaler(uint32_t Prescaler)
AnnaBridge 146:22da6e220af6 3259 {
AnnaBridge 146:22da6e220af6 3260 MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE1, Prescaler);
AnnaBridge 146:22da6e220af6 3261 }
AnnaBridge 146:22da6e220af6 3262
AnnaBridge 146:22da6e220af6 3263 /**
AnnaBridge 146:22da6e220af6 3264 * @brief Set APB2 prescaler
AnnaBridge 146:22da6e220af6 3265 * @rmtoll CFGR PPRE2 LL_RCC_SetAPB2Prescaler
AnnaBridge 146:22da6e220af6 3266 * @param Prescaler This parameter can be one of the following values:
AnnaBridge 146:22da6e220af6 3267 * @arg @ref LL_RCC_APB2_DIV_1
AnnaBridge 146:22da6e220af6 3268 * @arg @ref LL_RCC_APB2_DIV_2
AnnaBridge 146:22da6e220af6 3269 * @arg @ref LL_RCC_APB2_DIV_4
AnnaBridge 146:22da6e220af6 3270 * @arg @ref LL_RCC_APB2_DIV_8
AnnaBridge 146:22da6e220af6 3271 * @arg @ref LL_RCC_APB2_DIV_16
AnnaBridge 146:22da6e220af6 3272 * @retval None
AnnaBridge 146:22da6e220af6 3273 */
AnnaBridge 146:22da6e220af6 3274 __STATIC_INLINE void LL_RCC_SetAPB2Prescaler(uint32_t Prescaler)
AnnaBridge 146:22da6e220af6 3275 {
AnnaBridge 146:22da6e220af6 3276 MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE2, Prescaler);
AnnaBridge 146:22da6e220af6 3277 }
AnnaBridge 146:22da6e220af6 3278
AnnaBridge 146:22da6e220af6 3279 /**
AnnaBridge 146:22da6e220af6 3280 * @brief Get AHB prescaler
AnnaBridge 146:22da6e220af6 3281 * @rmtoll CFGR HPRE LL_RCC_GetAHBPrescaler
AnnaBridge 146:22da6e220af6 3282 * @retval Returned value can be one of the following values:
AnnaBridge 146:22da6e220af6 3283 * @arg @ref LL_RCC_SYSCLK_DIV_1
AnnaBridge 146:22da6e220af6 3284 * @arg @ref LL_RCC_SYSCLK_DIV_2
AnnaBridge 146:22da6e220af6 3285 * @arg @ref LL_RCC_SYSCLK_DIV_4
AnnaBridge 146:22da6e220af6 3286 * @arg @ref LL_RCC_SYSCLK_DIV_8
AnnaBridge 146:22da6e220af6 3287 * @arg @ref LL_RCC_SYSCLK_DIV_16
AnnaBridge 146:22da6e220af6 3288 * @arg @ref LL_RCC_SYSCLK_DIV_64
AnnaBridge 146:22da6e220af6 3289 * @arg @ref LL_RCC_SYSCLK_DIV_128
AnnaBridge 146:22da6e220af6 3290 * @arg @ref LL_RCC_SYSCLK_DIV_256
AnnaBridge 146:22da6e220af6 3291 * @arg @ref LL_RCC_SYSCLK_DIV_512
AnnaBridge 146:22da6e220af6 3292 */
AnnaBridge 146:22da6e220af6 3293 __STATIC_INLINE uint32_t LL_RCC_GetAHBPrescaler(void)
AnnaBridge 146:22da6e220af6 3294 {
AnnaBridge 146:22da6e220af6 3295 return (uint32_t)(READ_BIT(RCC->CFGR, RCC_CFGR_HPRE));
AnnaBridge 146:22da6e220af6 3296 }
AnnaBridge 146:22da6e220af6 3297
AnnaBridge 146:22da6e220af6 3298 /**
AnnaBridge 146:22da6e220af6 3299 * @brief Get APB1 prescaler
AnnaBridge 146:22da6e220af6 3300 * @rmtoll CFGR PPRE1 LL_RCC_GetAPB1Prescaler
AnnaBridge 146:22da6e220af6 3301 * @retval Returned value can be one of the following values:
AnnaBridge 146:22da6e220af6 3302 * @arg @ref LL_RCC_APB1_DIV_1
AnnaBridge 146:22da6e220af6 3303 * @arg @ref LL_RCC_APB1_DIV_2
AnnaBridge 146:22da6e220af6 3304 * @arg @ref LL_RCC_APB1_DIV_4
AnnaBridge 146:22da6e220af6 3305 * @arg @ref LL_RCC_APB1_DIV_8
AnnaBridge 146:22da6e220af6 3306 * @arg @ref LL_RCC_APB1_DIV_16
AnnaBridge 146:22da6e220af6 3307 */
AnnaBridge 146:22da6e220af6 3308 __STATIC_INLINE uint32_t LL_RCC_GetAPB1Prescaler(void)
AnnaBridge 146:22da6e220af6 3309 {
AnnaBridge 146:22da6e220af6 3310 return (uint32_t)(READ_BIT(RCC->CFGR, RCC_CFGR_PPRE1));
AnnaBridge 146:22da6e220af6 3311 }
AnnaBridge 146:22da6e220af6 3312
AnnaBridge 146:22da6e220af6 3313 /**
AnnaBridge 146:22da6e220af6 3314 * @brief Get APB2 prescaler
AnnaBridge 146:22da6e220af6 3315 * @rmtoll CFGR PPRE2 LL_RCC_GetAPB2Prescaler
AnnaBridge 146:22da6e220af6 3316 * @retval Returned value can be one of the following values:
AnnaBridge 146:22da6e220af6 3317 * @arg @ref LL_RCC_APB2_DIV_1
AnnaBridge 146:22da6e220af6 3318 * @arg @ref LL_RCC_APB2_DIV_2
AnnaBridge 146:22da6e220af6 3319 * @arg @ref LL_RCC_APB2_DIV_4
AnnaBridge 146:22da6e220af6 3320 * @arg @ref LL_RCC_APB2_DIV_8
AnnaBridge 146:22da6e220af6 3321 * @arg @ref LL_RCC_APB2_DIV_16
AnnaBridge 146:22da6e220af6 3322 */
AnnaBridge 146:22da6e220af6 3323 __STATIC_INLINE uint32_t LL_RCC_GetAPB2Prescaler(void)
AnnaBridge 146:22da6e220af6 3324 {
AnnaBridge 146:22da6e220af6 3325 return (uint32_t)(READ_BIT(RCC->CFGR, RCC_CFGR_PPRE2));
AnnaBridge 146:22da6e220af6 3326 }
AnnaBridge 146:22da6e220af6 3327
AnnaBridge 146:22da6e220af6 3328 /**
AnnaBridge 146:22da6e220af6 3329 * @}
AnnaBridge 146:22da6e220af6 3330 */
AnnaBridge 146:22da6e220af6 3331
AnnaBridge 146:22da6e220af6 3332 /** @defgroup RCC_LL_EF_MCO MCO
AnnaBridge 146:22da6e220af6 3333 * @{
AnnaBridge 146:22da6e220af6 3334 */
AnnaBridge 146:22da6e220af6 3335
AnnaBridge 146:22da6e220af6 3336 #if defined(RCC_CFGR_MCO1EN)
AnnaBridge 146:22da6e220af6 3337 /**
AnnaBridge 146:22da6e220af6 3338 * @brief Enable MCO1 output
AnnaBridge 146:22da6e220af6 3339 * @rmtoll CFGR RCC_CFGR_MCO1EN LL_RCC_MCO1_Enable
AnnaBridge 146:22da6e220af6 3340 * @retval None
AnnaBridge 146:22da6e220af6 3341 */
AnnaBridge 146:22da6e220af6 3342 __STATIC_INLINE void LL_RCC_MCO1_Enable(void)
AnnaBridge 146:22da6e220af6 3343 {
AnnaBridge 146:22da6e220af6 3344 SET_BIT(RCC->CFGR, RCC_CFGR_MCO1EN);
AnnaBridge 146:22da6e220af6 3345 }
AnnaBridge 146:22da6e220af6 3346
AnnaBridge 146:22da6e220af6 3347 /**
AnnaBridge 146:22da6e220af6 3348 * @brief Disable MCO1 output
AnnaBridge 146:22da6e220af6 3349 * @rmtoll CFGR RCC_CFGR_MCO1EN LL_RCC_MCO1_Disable
AnnaBridge 146:22da6e220af6 3350 * @retval None
AnnaBridge 146:22da6e220af6 3351 */
AnnaBridge 146:22da6e220af6 3352 __STATIC_INLINE void LL_RCC_MCO1_Disable(void)
AnnaBridge 146:22da6e220af6 3353 {
AnnaBridge 146:22da6e220af6 3354 CLEAR_BIT(RCC->CFGR, RCC_CFGR_MCO1EN);
AnnaBridge 146:22da6e220af6 3355 }
AnnaBridge 146:22da6e220af6 3356 #endif /* RCC_CFGR_MCO1EN */
AnnaBridge 146:22da6e220af6 3357
AnnaBridge 146:22da6e220af6 3358 #if defined(RCC_CFGR_MCO2EN)
AnnaBridge 146:22da6e220af6 3359 /**
AnnaBridge 146:22da6e220af6 3360 * @brief Enable MCO2 output
AnnaBridge 146:22da6e220af6 3361 * @rmtoll CFGR RCC_CFGR_MCO2EN LL_RCC_MCO2_Enable
AnnaBridge 146:22da6e220af6 3362 * @retval None
AnnaBridge 146:22da6e220af6 3363 */
AnnaBridge 146:22da6e220af6 3364 __STATIC_INLINE void LL_RCC_MCO2_Enable(void)
AnnaBridge 146:22da6e220af6 3365 {
AnnaBridge 146:22da6e220af6 3366 SET_BIT(RCC->CFGR, RCC_CFGR_MCO2EN);
AnnaBridge 146:22da6e220af6 3367 }
AnnaBridge 146:22da6e220af6 3368
AnnaBridge 146:22da6e220af6 3369 /**
AnnaBridge 146:22da6e220af6 3370 * @brief Disable MCO2 output
AnnaBridge 146:22da6e220af6 3371 * @rmtoll CFGR RCC_CFGR_MCO2EN LL_RCC_MCO2_Disable
AnnaBridge 146:22da6e220af6 3372 * @retval None
AnnaBridge 146:22da6e220af6 3373 */
AnnaBridge 146:22da6e220af6 3374 __STATIC_INLINE void LL_RCC_MCO2_Disable(void)
AnnaBridge 146:22da6e220af6 3375 {
AnnaBridge 146:22da6e220af6 3376 CLEAR_BIT(RCC->CFGR, RCC_CFGR_MCO2EN);
AnnaBridge 146:22da6e220af6 3377 }
AnnaBridge 146:22da6e220af6 3378 #endif /* RCC_CFGR_MCO2EN */
AnnaBridge 146:22da6e220af6 3379
AnnaBridge 146:22da6e220af6 3380 /**
AnnaBridge 146:22da6e220af6 3381 * @brief Configure MCOx
AnnaBridge 146:22da6e220af6 3382 * @rmtoll CFGR MCO1 LL_RCC_ConfigMCO\n
AnnaBridge 146:22da6e220af6 3383 * CFGR MCO1PRE LL_RCC_ConfigMCO\n
AnnaBridge 146:22da6e220af6 3384 * CFGR MCO2 LL_RCC_ConfigMCO\n
AnnaBridge 146:22da6e220af6 3385 * CFGR MCO2PRE LL_RCC_ConfigMCO
AnnaBridge 146:22da6e220af6 3386 * @param MCOxSource This parameter can be one of the following values:
AnnaBridge 146:22da6e220af6 3387 * @arg @ref LL_RCC_MCO1SOURCE_HSI
AnnaBridge 146:22da6e220af6 3388 * @arg @ref LL_RCC_MCO1SOURCE_LSE
AnnaBridge 146:22da6e220af6 3389 * @arg @ref LL_RCC_MCO1SOURCE_HSE
AnnaBridge 146:22da6e220af6 3390 * @arg @ref LL_RCC_MCO1SOURCE_PLLCLK
AnnaBridge 146:22da6e220af6 3391 * @arg @ref LL_RCC_MCO2SOURCE_SYSCLK
AnnaBridge 146:22da6e220af6 3392 * @arg @ref LL_RCC_MCO2SOURCE_PLLI2S
AnnaBridge 146:22da6e220af6 3393 * @arg @ref LL_RCC_MCO2SOURCE_HSE
AnnaBridge 146:22da6e220af6 3394 * @arg @ref LL_RCC_MCO2SOURCE_PLLCLK
AnnaBridge 146:22da6e220af6 3395 * @param MCOxPrescaler This parameter can be one of the following values:
AnnaBridge 146:22da6e220af6 3396 * @arg @ref LL_RCC_MCO1_DIV_1
AnnaBridge 146:22da6e220af6 3397 * @arg @ref LL_RCC_MCO1_DIV_2
AnnaBridge 146:22da6e220af6 3398 * @arg @ref LL_RCC_MCO1_DIV_3
AnnaBridge 146:22da6e220af6 3399 * @arg @ref LL_RCC_MCO1_DIV_4
AnnaBridge 146:22da6e220af6 3400 * @arg @ref LL_RCC_MCO1_DIV_5
AnnaBridge 146:22da6e220af6 3401 * @arg @ref LL_RCC_MCO2_DIV_1
AnnaBridge 146:22da6e220af6 3402 * @arg @ref LL_RCC_MCO2_DIV_2
AnnaBridge 146:22da6e220af6 3403 * @arg @ref LL_RCC_MCO2_DIV_3
AnnaBridge 146:22da6e220af6 3404 * @arg @ref LL_RCC_MCO2_DIV_4
AnnaBridge 146:22da6e220af6 3405 * @arg @ref LL_RCC_MCO2_DIV_5
AnnaBridge 146:22da6e220af6 3406 * @retval None
AnnaBridge 146:22da6e220af6 3407 */
AnnaBridge 146:22da6e220af6 3408 __STATIC_INLINE void LL_RCC_ConfigMCO(uint32_t MCOxSource, uint32_t MCOxPrescaler)
AnnaBridge 146:22da6e220af6 3409 {
AnnaBridge 146:22da6e220af6 3410 MODIFY_REG(RCC->CFGR, (MCOxSource & 0xFFFF0000U) | (MCOxPrescaler & 0xFFFF0000U), (MCOxSource << 16U) | (MCOxPrescaler << 16U));
AnnaBridge 146:22da6e220af6 3411 }
AnnaBridge 146:22da6e220af6 3412
AnnaBridge 146:22da6e220af6 3413 /**
AnnaBridge 146:22da6e220af6 3414 * @}
AnnaBridge 146:22da6e220af6 3415 */
AnnaBridge 146:22da6e220af6 3416
AnnaBridge 146:22da6e220af6 3417 /** @defgroup RCC_LL_EF_Peripheral_Clock_Source Peripheral Clock Source
AnnaBridge 146:22da6e220af6 3418 * @{
AnnaBridge 146:22da6e220af6 3419 */
AnnaBridge 146:22da6e220af6 3420 #if defined(FMPI2C1)
AnnaBridge 146:22da6e220af6 3421 /**
AnnaBridge 146:22da6e220af6 3422 * @brief Configure FMPI2C clock source
AnnaBridge 146:22da6e220af6 3423 * @rmtoll DCKCFGR2 FMPI2C1SEL LL_RCC_SetFMPI2CClockSource
AnnaBridge 146:22da6e220af6 3424 * @param FMPI2CxSource This parameter can be one of the following values:
AnnaBridge 146:22da6e220af6 3425 * @arg @ref LL_RCC_FMPI2C1_CLKSOURCE_PCLK1
AnnaBridge 146:22da6e220af6 3426 * @arg @ref LL_RCC_FMPI2C1_CLKSOURCE_SYSCLK
AnnaBridge 146:22da6e220af6 3427 * @arg @ref LL_RCC_FMPI2C1_CLKSOURCE_HSI
AnnaBridge 146:22da6e220af6 3428 * @retval None
AnnaBridge 146:22da6e220af6 3429 */
AnnaBridge 146:22da6e220af6 3430 __STATIC_INLINE void LL_RCC_SetFMPI2CClockSource(uint32_t FMPI2CxSource)
AnnaBridge 146:22da6e220af6 3431 {
AnnaBridge 146:22da6e220af6 3432 MODIFY_REG(RCC->DCKCFGR2, RCC_DCKCFGR2_FMPI2C1SEL, FMPI2CxSource);
AnnaBridge 146:22da6e220af6 3433 }
AnnaBridge 146:22da6e220af6 3434 #endif /* FMPI2C1 */
AnnaBridge 146:22da6e220af6 3435
AnnaBridge 146:22da6e220af6 3436 #if defined(LPTIM1)
AnnaBridge 146:22da6e220af6 3437 /**
AnnaBridge 146:22da6e220af6 3438 * @brief Configure LPTIMx clock source
AnnaBridge 146:22da6e220af6 3439 * @rmtoll DCKCFGR2 LPTIM1SEL LL_RCC_SetLPTIMClockSource
AnnaBridge 146:22da6e220af6 3440 * @param LPTIMxSource This parameter can be one of the following values:
AnnaBridge 146:22da6e220af6 3441 * @arg @ref LL_RCC_LPTIM1_CLKSOURCE_PCLK1
AnnaBridge 146:22da6e220af6 3442 * @arg @ref LL_RCC_LPTIM1_CLKSOURCE_HSI
AnnaBridge 146:22da6e220af6 3443 * @arg @ref LL_RCC_LPTIM1_CLKSOURCE_LSI
AnnaBridge 146:22da6e220af6 3444 * @arg @ref LL_RCC_LPTIM1_CLKSOURCE_LSE
AnnaBridge 146:22da6e220af6 3445 * @retval None
AnnaBridge 146:22da6e220af6 3446 */
AnnaBridge 146:22da6e220af6 3447 __STATIC_INLINE void LL_RCC_SetLPTIMClockSource(uint32_t LPTIMxSource)
AnnaBridge 146:22da6e220af6 3448 {
AnnaBridge 146:22da6e220af6 3449 MODIFY_REG(RCC->DCKCFGR2, RCC_DCKCFGR2_LPTIM1SEL, LPTIMxSource);
AnnaBridge 146:22da6e220af6 3450 }
AnnaBridge 146:22da6e220af6 3451 #endif /* LPTIM1 */
AnnaBridge 146:22da6e220af6 3452
AnnaBridge 146:22da6e220af6 3453 #if defined(SAI1)
AnnaBridge 146:22da6e220af6 3454 /**
AnnaBridge 146:22da6e220af6 3455 * @brief Configure SAIx clock source
AnnaBridge 146:22da6e220af6 3456 * @rmtoll DCKCFGR SAI1SRC LL_RCC_SetSAIClockSource\n
AnnaBridge 146:22da6e220af6 3457 * DCKCFGR SAI2SRC LL_RCC_SetSAIClockSource\n
AnnaBridge 146:22da6e220af6 3458 * DCKCFGR SAI1ASRC LL_RCC_SetSAIClockSource\n
AnnaBridge 146:22da6e220af6 3459 * DCKCFGR SAI1BSRC LL_RCC_SetSAIClockSource
AnnaBridge 146:22da6e220af6 3460 * @param SAIxSource This parameter can be one of the following values:
AnnaBridge 146:22da6e220af6 3461 * @arg @ref LL_RCC_SAI1_CLKSOURCE_PLLSAI (*)
AnnaBridge 146:22da6e220af6 3462 * @arg @ref LL_RCC_SAI1_CLKSOURCE_PLLI2S (*)
AnnaBridge 146:22da6e220af6 3463 * @arg @ref LL_RCC_SAI1_CLKSOURCE_PLL (*)
AnnaBridge 146:22da6e220af6 3464 * @arg @ref LL_RCC_SAI1_CLKSOURCE_PIN (*)
AnnaBridge 146:22da6e220af6 3465 * @arg @ref LL_RCC_SAI2_CLKSOURCE_PLLSAI (*)
AnnaBridge 146:22da6e220af6 3466 * @arg @ref LL_RCC_SAI2_CLKSOURCE_PLLI2S (*)
AnnaBridge 146:22da6e220af6 3467 * @arg @ref LL_RCC_SAI2_CLKSOURCE_PLL (*)
AnnaBridge 146:22da6e220af6 3468 * @arg @ref LL_RCC_SAI2_CLKSOURCE_PLLSRC (*)
AnnaBridge 146:22da6e220af6 3469 * @arg @ref LL_RCC_SAI1_A_CLKSOURCE_PLLSAI (*)
AnnaBridge 146:22da6e220af6 3470 * @arg @ref LL_RCC_SAI1_A_CLKSOURCE_PLLI2S (*)
AnnaBridge 146:22da6e220af6 3471 * @arg @ref LL_RCC_SAI1_A_CLKSOURCE_PIN (*)
AnnaBridge 146:22da6e220af6 3472 * @arg @ref LL_RCC_SAI1_A_CLKSOURCE_PLL (*)
AnnaBridge 146:22da6e220af6 3473 * @arg @ref LL_RCC_SAI1_A_CLKSOURCE_PLLSRC (*)
AnnaBridge 146:22da6e220af6 3474 * @arg @ref LL_RCC_SAI1_B_CLKSOURCE_PLLSAI (*)
AnnaBridge 146:22da6e220af6 3475 * @arg @ref LL_RCC_SAI1_B_CLKSOURCE_PLLI2S (*)
AnnaBridge 146:22da6e220af6 3476 * @arg @ref LL_RCC_SAI1_B_CLKSOURCE_PIN (*)
AnnaBridge 146:22da6e220af6 3477 * @arg @ref LL_RCC_SAI1_B_CLKSOURCE_PLL (*)
AnnaBridge 146:22da6e220af6 3478 * @arg @ref LL_RCC_SAI1_B_CLKSOURCE_PLLSRC (*)
AnnaBridge 146:22da6e220af6 3479 *
AnnaBridge 146:22da6e220af6 3480 * (*) value not defined in all devices.
AnnaBridge 146:22da6e220af6 3481 * @retval None
AnnaBridge 146:22da6e220af6 3482 */
AnnaBridge 146:22da6e220af6 3483 __STATIC_INLINE void LL_RCC_SetSAIClockSource(uint32_t SAIxSource)
AnnaBridge 146:22da6e220af6 3484 {
AnnaBridge 146:22da6e220af6 3485 MODIFY_REG(RCC->DCKCFGR, (SAIxSource & 0xFFFF0000U), (SAIxSource << 16U));
AnnaBridge 146:22da6e220af6 3486 }
AnnaBridge 146:22da6e220af6 3487 #endif /* SAI1 */
AnnaBridge 146:22da6e220af6 3488
AnnaBridge 146:22da6e220af6 3489 #if defined(RCC_DCKCFGR_SDIOSEL) || defined(RCC_DCKCFGR2_SDIOSEL)
AnnaBridge 146:22da6e220af6 3490 /**
AnnaBridge 146:22da6e220af6 3491 * @brief Configure SDIO clock source
AnnaBridge 146:22da6e220af6 3492 * @rmtoll DCKCFGR SDIOSEL LL_RCC_SetSDIOClockSource\n
AnnaBridge 146:22da6e220af6 3493 * DCKCFGR2 SDIOSEL LL_RCC_SetSDIOClockSource
AnnaBridge 146:22da6e220af6 3494 * @param SDIOxSource This parameter can be one of the following values:
AnnaBridge 146:22da6e220af6 3495 * @arg @ref LL_RCC_SDIO_CLKSOURCE_PLL48CLK
AnnaBridge 146:22da6e220af6 3496 * @arg @ref LL_RCC_SDIO_CLKSOURCE_SYSCLK
AnnaBridge 146:22da6e220af6 3497 * @retval None
AnnaBridge 146:22da6e220af6 3498 */
AnnaBridge 146:22da6e220af6 3499 __STATIC_INLINE void LL_RCC_SetSDIOClockSource(uint32_t SDIOxSource)
AnnaBridge 146:22da6e220af6 3500 {
AnnaBridge 146:22da6e220af6 3501 #if defined(RCC_DCKCFGR_SDIOSEL)
AnnaBridge 146:22da6e220af6 3502 MODIFY_REG(RCC->DCKCFGR, RCC_DCKCFGR_SDIOSEL, SDIOxSource);
AnnaBridge 146:22da6e220af6 3503 #else
AnnaBridge 146:22da6e220af6 3504 MODIFY_REG(RCC->DCKCFGR2, RCC_DCKCFGR2_SDIOSEL, SDIOxSource);
AnnaBridge 146:22da6e220af6 3505 #endif /* RCC_DCKCFGR_SDIOSEL */
AnnaBridge 146:22da6e220af6 3506 }
AnnaBridge 146:22da6e220af6 3507 #endif /* RCC_DCKCFGR_SDIOSEL || RCC_DCKCFGR2_SDIOSEL */
AnnaBridge 146:22da6e220af6 3508
AnnaBridge 146:22da6e220af6 3509 #if defined(RCC_DCKCFGR_CK48MSEL) || defined(RCC_DCKCFGR2_CK48MSEL)
AnnaBridge 146:22da6e220af6 3510 /**
AnnaBridge 146:22da6e220af6 3511 * @brief Configure 48Mhz domain clock source
AnnaBridge 146:22da6e220af6 3512 * @rmtoll DCKCFGR CK48MSEL LL_RCC_SetCK48MClockSource\n
AnnaBridge 146:22da6e220af6 3513 * DCKCFGR2 CK48MSEL LL_RCC_SetCK48MClockSource
AnnaBridge 146:22da6e220af6 3514 * @param CK48MxSource This parameter can be one of the following values:
AnnaBridge 146:22da6e220af6 3515 * @arg @ref LL_RCC_CK48M_CLKSOURCE_PLL
AnnaBridge 146:22da6e220af6 3516 * @arg @ref LL_RCC_CK48M_CLKSOURCE_PLLSAI (*)
AnnaBridge 146:22da6e220af6 3517 * @arg @ref LL_RCC_CK48M_CLKSOURCE_PLLI2S (*)
AnnaBridge 146:22da6e220af6 3518 *
AnnaBridge 146:22da6e220af6 3519 * (*) value not defined in all devices.
AnnaBridge 146:22da6e220af6 3520 * @retval None
AnnaBridge 146:22da6e220af6 3521 */
AnnaBridge 146:22da6e220af6 3522 __STATIC_INLINE void LL_RCC_SetCK48MClockSource(uint32_t CK48MxSource)
AnnaBridge 146:22da6e220af6 3523 {
AnnaBridge 146:22da6e220af6 3524 #if defined(RCC_DCKCFGR_CK48MSEL)
AnnaBridge 146:22da6e220af6 3525 MODIFY_REG(RCC->DCKCFGR, RCC_DCKCFGR_CK48MSEL, CK48MxSource);
AnnaBridge 146:22da6e220af6 3526 #else
AnnaBridge 146:22da6e220af6 3527 MODIFY_REG(RCC->DCKCFGR2, RCC_DCKCFGR2_CK48MSEL, CK48MxSource);
AnnaBridge 146:22da6e220af6 3528 #endif /* RCC_DCKCFGR_CK48MSEL */
AnnaBridge 146:22da6e220af6 3529 }
AnnaBridge 146:22da6e220af6 3530
AnnaBridge 146:22da6e220af6 3531 #if defined(RNG)
AnnaBridge 146:22da6e220af6 3532 /**
AnnaBridge 146:22da6e220af6 3533 * @brief Configure RNG clock source
AnnaBridge 146:22da6e220af6 3534 * @rmtoll DCKCFGR CK48MSEL LL_RCC_SetRNGClockSource\n
AnnaBridge 146:22da6e220af6 3535 * DCKCFGR2 CK48MSEL LL_RCC_SetRNGClockSource
AnnaBridge 146:22da6e220af6 3536 * @param RNGxSource This parameter can be one of the following values:
AnnaBridge 146:22da6e220af6 3537 * @arg @ref LL_RCC_RNG_CLKSOURCE_PLL
AnnaBridge 146:22da6e220af6 3538 * @arg @ref LL_RCC_RNG_CLKSOURCE_PLLSAI (*)
AnnaBridge 146:22da6e220af6 3539 * @arg @ref LL_RCC_RNG_CLKSOURCE_PLLI2S (*)
AnnaBridge 146:22da6e220af6 3540 *
AnnaBridge 146:22da6e220af6 3541 * (*) value not defined in all devices.
AnnaBridge 146:22da6e220af6 3542 * @retval None
AnnaBridge 146:22da6e220af6 3543 */
AnnaBridge 146:22da6e220af6 3544 __STATIC_INLINE void LL_RCC_SetRNGClockSource(uint32_t RNGxSource)
AnnaBridge 146:22da6e220af6 3545 {
AnnaBridge 146:22da6e220af6 3546 #if defined(RCC_DCKCFGR_CK48MSEL)
AnnaBridge 146:22da6e220af6 3547 MODIFY_REG(RCC->DCKCFGR, RCC_DCKCFGR_CK48MSEL, RNGxSource);
AnnaBridge 146:22da6e220af6 3548 #else
AnnaBridge 146:22da6e220af6 3549 MODIFY_REG(RCC->DCKCFGR2, RCC_DCKCFGR2_CK48MSEL, RNGxSource);
AnnaBridge 146:22da6e220af6 3550 #endif /* RCC_DCKCFGR_CK48MSEL */
AnnaBridge 146:22da6e220af6 3551 }
AnnaBridge 146:22da6e220af6 3552 #endif /* RNG */
AnnaBridge 146:22da6e220af6 3553
AnnaBridge 146:22da6e220af6 3554 #if defined(USB_OTG_FS) || defined(USB_OTG_HS)
AnnaBridge 146:22da6e220af6 3555 /**
AnnaBridge 146:22da6e220af6 3556 * @brief Configure USB clock source
AnnaBridge 146:22da6e220af6 3557 * @rmtoll DCKCFGR CK48MSEL LL_RCC_SetUSBClockSource\n
AnnaBridge 146:22da6e220af6 3558 * DCKCFGR2 CK48MSEL LL_RCC_SetUSBClockSource
AnnaBridge 146:22da6e220af6 3559 * @param USBxSource This parameter can be one of the following values:
AnnaBridge 146:22da6e220af6 3560 * @arg @ref LL_RCC_USB_CLKSOURCE_PLL
AnnaBridge 146:22da6e220af6 3561 * @arg @ref LL_RCC_USB_CLKSOURCE_PLLSAI (*)
AnnaBridge 146:22da6e220af6 3562 * @arg @ref LL_RCC_USB_CLKSOURCE_PLLI2S (*)
AnnaBridge 146:22da6e220af6 3563 *
AnnaBridge 146:22da6e220af6 3564 * (*) value not defined in all devices.
AnnaBridge 146:22da6e220af6 3565 * @retval None
AnnaBridge 146:22da6e220af6 3566 */
AnnaBridge 146:22da6e220af6 3567 __STATIC_INLINE void LL_RCC_SetUSBClockSource(uint32_t USBxSource)
AnnaBridge 146:22da6e220af6 3568 {
AnnaBridge 146:22da6e220af6 3569 #if defined(RCC_DCKCFGR_CK48MSEL)
AnnaBridge 146:22da6e220af6 3570 MODIFY_REG(RCC->DCKCFGR, RCC_DCKCFGR_CK48MSEL, USBxSource);
AnnaBridge 146:22da6e220af6 3571 #else
AnnaBridge 146:22da6e220af6 3572 MODIFY_REG(RCC->DCKCFGR2, RCC_DCKCFGR2_CK48MSEL, USBxSource);
AnnaBridge 146:22da6e220af6 3573 #endif /* RCC_DCKCFGR_CK48MSEL */
AnnaBridge 146:22da6e220af6 3574 }
AnnaBridge 146:22da6e220af6 3575 #endif /* USB_OTG_FS || USB_OTG_HS */
AnnaBridge 146:22da6e220af6 3576 #endif /* RCC_DCKCFGR_CK48MSEL || RCC_DCKCFGR2_CK48MSEL */
AnnaBridge 146:22da6e220af6 3577
AnnaBridge 146:22da6e220af6 3578 #if defined(CEC)
AnnaBridge 146:22da6e220af6 3579 /**
AnnaBridge 146:22da6e220af6 3580 * @brief Configure CEC clock source
AnnaBridge 146:22da6e220af6 3581 * @rmtoll DCKCFGR2 CECSEL LL_RCC_SetCECClockSource
AnnaBridge 146:22da6e220af6 3582 * @param Source This parameter can be one of the following values:
AnnaBridge 146:22da6e220af6 3583 * @arg @ref LL_RCC_CEC_CLKSOURCE_HSI_DIV488
AnnaBridge 146:22da6e220af6 3584 * @arg @ref LL_RCC_CEC_CLKSOURCE_LSE
AnnaBridge 146:22da6e220af6 3585 * @retval None
AnnaBridge 146:22da6e220af6 3586 */
AnnaBridge 146:22da6e220af6 3587 __STATIC_INLINE void LL_RCC_SetCECClockSource(uint32_t Source)
AnnaBridge 146:22da6e220af6 3588 {
AnnaBridge 146:22da6e220af6 3589 MODIFY_REG(RCC->DCKCFGR2, RCC_DCKCFGR2_CECSEL, Source);
AnnaBridge 146:22da6e220af6 3590 }
AnnaBridge 146:22da6e220af6 3591 #endif /* CEC */
AnnaBridge 146:22da6e220af6 3592
AnnaBridge 146:22da6e220af6 3593 /**
AnnaBridge 146:22da6e220af6 3594 * @brief Configure I2S clock source
AnnaBridge 146:22da6e220af6 3595 * @rmtoll CFGR I2SSRC LL_RCC_SetI2SClockSource\n
AnnaBridge 146:22da6e220af6 3596 * DCKCFGR I2SSRC LL_RCC_SetI2SClockSource\n
AnnaBridge 146:22da6e220af6 3597 * DCKCFGR I2S1SRC LL_RCC_SetI2SClockSource\n
AnnaBridge 146:22da6e220af6 3598 * DCKCFGR I2S2SRC LL_RCC_SetI2SClockSource
AnnaBridge 146:22da6e220af6 3599 * @param Source This parameter can be one of the following values:
AnnaBridge 146:22da6e220af6 3600 * @arg @ref LL_RCC_I2S1_CLKSOURCE_PLLI2S (*)
AnnaBridge 146:22da6e220af6 3601 * @arg @ref LL_RCC_I2S1_CLKSOURCE_PIN
AnnaBridge 146:22da6e220af6 3602 * @arg @ref LL_RCC_I2S1_CLKSOURCE_PLL (*)
AnnaBridge 146:22da6e220af6 3603 * @arg @ref LL_RCC_I2S1_CLKSOURCE_PLLSRC (*)
AnnaBridge 146:22da6e220af6 3604 * @arg @ref LL_RCC_I2S2_CLKSOURCE_PLLI2S (*)
AnnaBridge 146:22da6e220af6 3605 * @arg @ref LL_RCC_I2S2_CLKSOURCE_PIN (*)
AnnaBridge 146:22da6e220af6 3606 * @arg @ref LL_RCC_I2S2_CLKSOURCE_PLL (*)
AnnaBridge 146:22da6e220af6 3607 * @arg @ref LL_RCC_I2S2_CLKSOURCE_PLLSRC (*)
AnnaBridge 146:22da6e220af6 3608 *
AnnaBridge 146:22da6e220af6 3609 * (*) value not defined in all devices.
AnnaBridge 146:22da6e220af6 3610 * @retval None
AnnaBridge 146:22da6e220af6 3611 */
AnnaBridge 146:22da6e220af6 3612 __STATIC_INLINE void LL_RCC_SetI2SClockSource(uint32_t Source)
AnnaBridge 146:22da6e220af6 3613 {
AnnaBridge 146:22da6e220af6 3614 #if defined(RCC_CFGR_I2SSRC)
AnnaBridge 146:22da6e220af6 3615 MODIFY_REG(RCC->CFGR, RCC_CFGR_I2SSRC, Source);
AnnaBridge 146:22da6e220af6 3616 #else
AnnaBridge 146:22da6e220af6 3617 MODIFY_REG(RCC->DCKCFGR, (Source & 0xFFFF0000U), (Source << 16U));
AnnaBridge 146:22da6e220af6 3618 #endif /* RCC_CFGR_I2SSRC */
AnnaBridge 146:22da6e220af6 3619 }
AnnaBridge 146:22da6e220af6 3620
AnnaBridge 146:22da6e220af6 3621 #if defined(DSI)
AnnaBridge 146:22da6e220af6 3622 /**
AnnaBridge 146:22da6e220af6 3623 * @brief Configure DSI clock source
AnnaBridge 146:22da6e220af6 3624 * @rmtoll DCKCFGR DSISEL LL_RCC_SetDSIClockSource
AnnaBridge 146:22da6e220af6 3625 * @param Source This parameter can be one of the following values:
AnnaBridge 146:22da6e220af6 3626 * @arg @ref LL_RCC_DSI_CLKSOURCE_PHY
AnnaBridge 146:22da6e220af6 3627 * @arg @ref LL_RCC_DSI_CLKSOURCE_PLL
AnnaBridge 146:22da6e220af6 3628 * @retval None
AnnaBridge 146:22da6e220af6 3629 */
AnnaBridge 146:22da6e220af6 3630 __STATIC_INLINE void LL_RCC_SetDSIClockSource(uint32_t Source)
AnnaBridge 146:22da6e220af6 3631 {
AnnaBridge 146:22da6e220af6 3632 MODIFY_REG(RCC->DCKCFGR, RCC_DCKCFGR_DSISEL, Source);
AnnaBridge 146:22da6e220af6 3633 }
AnnaBridge 146:22da6e220af6 3634 #endif /* DSI */
AnnaBridge 146:22da6e220af6 3635
AnnaBridge 146:22da6e220af6 3636 #if defined(DFSDM1_Channel0)
AnnaBridge 146:22da6e220af6 3637 /**
AnnaBridge 146:22da6e220af6 3638 * @brief Configure DFSDM Audio clock source
AnnaBridge 146:22da6e220af6 3639 * @rmtoll DCKCFGR CKDFSDM1ASEL LL_RCC_SetDFSDMAudioClockSource\n
AnnaBridge 146:22da6e220af6 3640 * DCKCFGR CKDFSDM2ASEL LL_RCC_SetDFSDMAudioClockSource
AnnaBridge 146:22da6e220af6 3641 * @param Source This parameter can be one of the following values:
AnnaBridge 146:22da6e220af6 3642 * @arg @ref LL_RCC_DFSDM1_AUDIO_CLKSOURCE_I2S1
AnnaBridge 146:22da6e220af6 3643 * @arg @ref LL_RCC_DFSDM1_AUDIO_CLKSOURCE_I2S2
AnnaBridge 146:22da6e220af6 3644 * @arg @ref LL_RCC_DFSDM2_AUDIO_CLKSOURCE_I2S1 (*)
AnnaBridge 146:22da6e220af6 3645 * @arg @ref LL_RCC_DFSDM2_AUDIO_CLKSOURCE_I2S2 (*)
AnnaBridge 146:22da6e220af6 3646 *
AnnaBridge 146:22da6e220af6 3647 * (*) value not defined in all devices.
AnnaBridge 146:22da6e220af6 3648 * @retval None
AnnaBridge 146:22da6e220af6 3649 */
AnnaBridge 146:22da6e220af6 3650 __STATIC_INLINE void LL_RCC_SetDFSDMAudioClockSource(uint32_t Source)
AnnaBridge 146:22da6e220af6 3651 {
AnnaBridge 146:22da6e220af6 3652 MODIFY_REG(RCC->DCKCFGR, (Source & 0x0000FFFFU), (Source >> 16U));
AnnaBridge 146:22da6e220af6 3653 }
AnnaBridge 146:22da6e220af6 3654
AnnaBridge 146:22da6e220af6 3655 /**
AnnaBridge 146:22da6e220af6 3656 * @brief Configure DFSDM Kernel clock source
AnnaBridge 146:22da6e220af6 3657 * @rmtoll DCKCFGR CKDFSDM1SEL LL_RCC_SetDFSDMClockSource
AnnaBridge 146:22da6e220af6 3658 * @param Source This parameter can be one of the following values:
AnnaBridge 146:22da6e220af6 3659 * @arg @ref LL_RCC_DFSDM1_CLKSOURCE_PCLK2
AnnaBridge 146:22da6e220af6 3660 * @arg @ref LL_RCC_DFSDM1_CLKSOURCE_SYSCLK
AnnaBridge 146:22da6e220af6 3661 * @arg @ref LL_RCC_DFSDM2_CLKSOURCE_PCLK2 (*)
AnnaBridge 146:22da6e220af6 3662 * @arg @ref LL_RCC_DFSDM2_CLKSOURCE_SYSCLK (*)
AnnaBridge 146:22da6e220af6 3663 *
AnnaBridge 146:22da6e220af6 3664 * (*) value not defined in all devices.
AnnaBridge 146:22da6e220af6 3665 * @retval None
AnnaBridge 146:22da6e220af6 3666 */
AnnaBridge 146:22da6e220af6 3667 __STATIC_INLINE void LL_RCC_SetDFSDMClockSource(uint32_t Source)
AnnaBridge 146:22da6e220af6 3668 {
AnnaBridge 146:22da6e220af6 3669 MODIFY_REG(RCC->DCKCFGR, RCC_DCKCFGR_CKDFSDM1SEL, Source);
AnnaBridge 146:22da6e220af6 3670 }
AnnaBridge 146:22da6e220af6 3671 #endif /* DFSDM1_Channel0 */
AnnaBridge 146:22da6e220af6 3672
AnnaBridge 146:22da6e220af6 3673 #if defined(SPDIFRX)
AnnaBridge 146:22da6e220af6 3674 /**
AnnaBridge 146:22da6e220af6 3675 * @brief Configure SPDIFRX clock source
AnnaBridge 146:22da6e220af6 3676 * @rmtoll DCKCFGR2 SPDIFRXSEL LL_RCC_SetSPDIFRXClockSource
AnnaBridge 146:22da6e220af6 3677 * @param SPDIFRXxSource This parameter can be one of the following values:
AnnaBridge 146:22da6e220af6 3678 * @arg @ref LL_RCC_SPDIFRX1_CLKSOURCE_PLL
AnnaBridge 146:22da6e220af6 3679 * @arg @ref LL_RCC_SPDIFRX1_CLKSOURCE_PLLI2S
AnnaBridge 146:22da6e220af6 3680 *
AnnaBridge 146:22da6e220af6 3681 * (*) value not defined in all devices.
AnnaBridge 146:22da6e220af6 3682 * @retval None
AnnaBridge 146:22da6e220af6 3683 */
AnnaBridge 146:22da6e220af6 3684 __STATIC_INLINE void LL_RCC_SetSPDIFRXClockSource(uint32_t SPDIFRXxSource)
AnnaBridge 146:22da6e220af6 3685 {
AnnaBridge 146:22da6e220af6 3686 MODIFY_REG(RCC->DCKCFGR2, RCC_DCKCFGR2_SPDIFRXSEL, SPDIFRXxSource);
AnnaBridge 146:22da6e220af6 3687 }
AnnaBridge 146:22da6e220af6 3688 #endif /* SPDIFRX */
AnnaBridge 146:22da6e220af6 3689
AnnaBridge 146:22da6e220af6 3690 #if defined(FMPI2C1)
AnnaBridge 146:22da6e220af6 3691 /**
AnnaBridge 146:22da6e220af6 3692 * @brief Get FMPI2C clock source
AnnaBridge 146:22da6e220af6 3693 * @rmtoll DCKCFGR2 FMPI2C1SEL LL_RCC_GetFMPI2CClockSource
AnnaBridge 146:22da6e220af6 3694 * @param FMPI2Cx This parameter can be one of the following values:
AnnaBridge 146:22da6e220af6 3695 * @arg @ref LL_RCC_FMPI2C1_CLKSOURCE
AnnaBridge 146:22da6e220af6 3696 * @retval Returned value can be one of the following values:
AnnaBridge 146:22da6e220af6 3697 * @arg @ref LL_RCC_FMPI2C1_CLKSOURCE_PCLK1
AnnaBridge 146:22da6e220af6 3698 * @arg @ref LL_RCC_FMPI2C1_CLKSOURCE_SYSCLK
AnnaBridge 146:22da6e220af6 3699 * @arg @ref LL_RCC_FMPI2C1_CLKSOURCE_HSI
AnnaBridge 146:22da6e220af6 3700 */
AnnaBridge 146:22da6e220af6 3701 __STATIC_INLINE uint32_t LL_RCC_GetFMPI2CClockSource(uint32_t FMPI2Cx)
AnnaBridge 146:22da6e220af6 3702 {
AnnaBridge 146:22da6e220af6 3703 return (uint32_t)(READ_BIT(RCC->DCKCFGR2, FMPI2Cx));
AnnaBridge 146:22da6e220af6 3704 }
AnnaBridge 146:22da6e220af6 3705 #endif /* FMPI2C1 */
AnnaBridge 146:22da6e220af6 3706
AnnaBridge 146:22da6e220af6 3707 #if defined(LPTIM1)
AnnaBridge 146:22da6e220af6 3708 /**
AnnaBridge 146:22da6e220af6 3709 * @brief Get LPTIMx clock source
AnnaBridge 146:22da6e220af6 3710 * @rmtoll DCKCFGR2 LPTIM1SEL LL_RCC_GetLPTIMClockSource
AnnaBridge 146:22da6e220af6 3711 * @param LPTIMx This parameter can be one of the following values:
AnnaBridge 146:22da6e220af6 3712 * @arg @ref LL_RCC_LPTIM1_CLKSOURCE
AnnaBridge 146:22da6e220af6 3713 * @retval Returned value can be one of the following values:
AnnaBridge 146:22da6e220af6 3714 * @arg @ref LL_RCC_LPTIM1_CLKSOURCE_PCLK1
AnnaBridge 146:22da6e220af6 3715 * @arg @ref LL_RCC_LPTIM1_CLKSOURCE_HSI
AnnaBridge 146:22da6e220af6 3716 * @arg @ref LL_RCC_LPTIM1_CLKSOURCE_LSI
AnnaBridge 146:22da6e220af6 3717 * @arg @ref LL_RCC_LPTIM1_CLKSOURCE_LSE
AnnaBridge 146:22da6e220af6 3718 */
AnnaBridge 146:22da6e220af6 3719 __STATIC_INLINE uint32_t LL_RCC_GetLPTIMClockSource(uint32_t LPTIMx)
AnnaBridge 146:22da6e220af6 3720 {
AnnaBridge 146:22da6e220af6 3721 return (uint32_t)(READ_BIT(RCC->DCKCFGR2, RCC_DCKCFGR2_LPTIM1SEL));
AnnaBridge 146:22da6e220af6 3722 }
AnnaBridge 146:22da6e220af6 3723 #endif /* LPTIM1 */
AnnaBridge 146:22da6e220af6 3724
AnnaBridge 146:22da6e220af6 3725 #if defined(SAI1)
AnnaBridge 146:22da6e220af6 3726 /**
AnnaBridge 146:22da6e220af6 3727 * @brief Get SAIx clock source
AnnaBridge 146:22da6e220af6 3728 * @rmtoll DCKCFGR SAI1SEL LL_RCC_GetSAIClockSource\n
AnnaBridge 146:22da6e220af6 3729 * DCKCFGR SAI2SEL LL_RCC_GetSAIClockSource\n
AnnaBridge 146:22da6e220af6 3730 * DCKCFGR SAI1ASRC LL_RCC_GetSAIClockSource\n
AnnaBridge 146:22da6e220af6 3731 * DCKCFGR SAI1BSRC LL_RCC_GetSAIClockSource
AnnaBridge 146:22da6e220af6 3732 * @param SAIx This parameter can be one of the following values:
AnnaBridge 146:22da6e220af6 3733 * @arg @ref LL_RCC_SAI1_CLKSOURCE (*)
AnnaBridge 146:22da6e220af6 3734 * @arg @ref LL_RCC_SAI2_CLKSOURCE (*)
AnnaBridge 146:22da6e220af6 3735 * @arg @ref LL_RCC_SAI1_A_CLKSOURCE (*)
AnnaBridge 146:22da6e220af6 3736 * @arg @ref LL_RCC_SAI1_B_CLKSOURCE (*)
AnnaBridge 146:22da6e220af6 3737 *
AnnaBridge 146:22da6e220af6 3738 * (*) value not defined in all devices.
AnnaBridge 146:22da6e220af6 3739 * @retval Returned value can be one of the following values:
AnnaBridge 146:22da6e220af6 3740 * @arg @ref LL_RCC_SAI1_CLKSOURCE_PLLSAI (*)
AnnaBridge 146:22da6e220af6 3741 * @arg @ref LL_RCC_SAI1_CLKSOURCE_PLLI2S (*)
AnnaBridge 146:22da6e220af6 3742 * @arg @ref LL_RCC_SAI1_CLKSOURCE_PLL (*)
AnnaBridge 146:22da6e220af6 3743 * @arg @ref LL_RCC_SAI1_CLKSOURCE_PIN (*)
AnnaBridge 146:22da6e220af6 3744 * @arg @ref LL_RCC_SAI2_CLKSOURCE_PLLSAI (*)
AnnaBridge 146:22da6e220af6 3745 * @arg @ref LL_RCC_SAI2_CLKSOURCE_PLLI2S (*)
AnnaBridge 146:22da6e220af6 3746 * @arg @ref LL_RCC_SAI2_CLKSOURCE_PLL (*)
AnnaBridge 146:22da6e220af6 3747 * @arg @ref LL_RCC_SAI2_CLKSOURCE_PLLSRC (*)
AnnaBridge 146:22da6e220af6 3748 * @arg @ref LL_RCC_SAI1_A_CLKSOURCE_PLLSAI (*)
AnnaBridge 146:22da6e220af6 3749 * @arg @ref LL_RCC_SAI1_A_CLKSOURCE_PLLI2S (*)
AnnaBridge 146:22da6e220af6 3750 * @arg @ref LL_RCC_SAI1_A_CLKSOURCE_PIN (*)
AnnaBridge 146:22da6e220af6 3751 * @arg @ref LL_RCC_SAI1_A_CLKSOURCE_PLL (*)
AnnaBridge 146:22da6e220af6 3752 * @arg @ref LL_RCC_SAI1_A_CLKSOURCE_PLLSRC (*)
AnnaBridge 146:22da6e220af6 3753 * @arg @ref LL_RCC_SAI1_B_CLKSOURCE_PLLSAI (*)
AnnaBridge 146:22da6e220af6 3754 * @arg @ref LL_RCC_SAI1_B_CLKSOURCE_PLLI2S (*)
AnnaBridge 146:22da6e220af6 3755 * @arg @ref LL_RCC_SAI1_B_CLKSOURCE_PIN (*)
AnnaBridge 146:22da6e220af6 3756 * @arg @ref LL_RCC_SAI1_B_CLKSOURCE_PLL (*)
AnnaBridge 146:22da6e220af6 3757 * @arg @ref LL_RCC_SAI1_B_CLKSOURCE_PLLSRC (*)
AnnaBridge 146:22da6e220af6 3758 *
AnnaBridge 146:22da6e220af6 3759 * (*) value not defined in all devices.
AnnaBridge 146:22da6e220af6 3760 */
AnnaBridge 146:22da6e220af6 3761 __STATIC_INLINE uint32_t LL_RCC_GetSAIClockSource(uint32_t SAIx)
AnnaBridge 146:22da6e220af6 3762 {
AnnaBridge 146:22da6e220af6 3763 return (uint32_t)(READ_BIT(RCC->DCKCFGR, SAIx) >> 16U | SAIx);
AnnaBridge 146:22da6e220af6 3764 }
AnnaBridge 146:22da6e220af6 3765 #endif /* SAI1 */
AnnaBridge 146:22da6e220af6 3766
AnnaBridge 146:22da6e220af6 3767 #if defined(RCC_DCKCFGR_SDIOSEL) || defined(RCC_DCKCFGR2_SDIOSEL)
AnnaBridge 146:22da6e220af6 3768 /**
AnnaBridge 146:22da6e220af6 3769 * @brief Get SDIOx clock source
AnnaBridge 146:22da6e220af6 3770 * @rmtoll DCKCFGR SDIOSEL LL_RCC_GetSDIOClockSource\n
AnnaBridge 146:22da6e220af6 3771 * DCKCFGR2 SDIOSEL LL_RCC_GetSDIOClockSource
AnnaBridge 146:22da6e220af6 3772 * @param SDIOx This parameter can be one of the following values:
AnnaBridge 146:22da6e220af6 3773 * @arg @ref LL_RCC_SDIO_CLKSOURCE
AnnaBridge 146:22da6e220af6 3774 * @retval Returned value can be one of the following values:
AnnaBridge 146:22da6e220af6 3775 * @arg @ref LL_RCC_SDIO_CLKSOURCE_PLL48CLK
AnnaBridge 146:22da6e220af6 3776 * @arg @ref LL_RCC_SDIO_CLKSOURCE_SYSCLK
AnnaBridge 146:22da6e220af6 3777 */
AnnaBridge 146:22da6e220af6 3778 __STATIC_INLINE uint32_t LL_RCC_GetSDIOClockSource(uint32_t SDIOx)
AnnaBridge 146:22da6e220af6 3779 {
AnnaBridge 146:22da6e220af6 3780 #if defined(RCC_DCKCFGR_SDIOSEL)
AnnaBridge 146:22da6e220af6 3781 return (uint32_t)(READ_BIT(RCC->DCKCFGR, SDIOx));
AnnaBridge 146:22da6e220af6 3782 #else
AnnaBridge 146:22da6e220af6 3783 return (uint32_t)(READ_BIT(RCC->DCKCFGR2, SDIOx));
AnnaBridge 146:22da6e220af6 3784 #endif /* RCC_DCKCFGR_SDIOSEL */
AnnaBridge 146:22da6e220af6 3785 }
AnnaBridge 146:22da6e220af6 3786 #endif /* RCC_DCKCFGR_SDIOSEL || RCC_DCKCFGR2_SDIOSEL */
AnnaBridge 146:22da6e220af6 3787
AnnaBridge 146:22da6e220af6 3788 #if defined(RCC_DCKCFGR_CK48MSEL) || defined(RCC_DCKCFGR2_CK48MSEL)
AnnaBridge 146:22da6e220af6 3789 /**
AnnaBridge 146:22da6e220af6 3790 * @brief Get 48Mhz domain clock source
AnnaBridge 146:22da6e220af6 3791 * @rmtoll DCKCFGR CK48MSEL LL_RCC_GetCK48MClockSource\n
AnnaBridge 146:22da6e220af6 3792 * DCKCFGR2 CK48MSEL LL_RCC_GetCK48MClockSource
AnnaBridge 146:22da6e220af6 3793 * @param CK48Mx This parameter can be one of the following values:
AnnaBridge 146:22da6e220af6 3794 * @arg @ref LL_RCC_CK48M_CLKSOURCE
AnnaBridge 146:22da6e220af6 3795 * @retval Returned value can be one of the following values:
AnnaBridge 146:22da6e220af6 3796 * @arg @ref LL_RCC_CK48M_CLKSOURCE_PLL
AnnaBridge 146:22da6e220af6 3797 * @arg @ref LL_RCC_CK48M_CLKSOURCE_PLLSAI (*)
AnnaBridge 146:22da6e220af6 3798 * @arg @ref LL_RCC_CK48M_CLKSOURCE_PLLI2S (*)
AnnaBridge 146:22da6e220af6 3799 *
AnnaBridge 146:22da6e220af6 3800 * (*) value not defined in all devices.
AnnaBridge 146:22da6e220af6 3801 */
AnnaBridge 146:22da6e220af6 3802 __STATIC_INLINE uint32_t LL_RCC_GetCK48MClockSource(uint32_t CK48Mx)
AnnaBridge 146:22da6e220af6 3803 {
AnnaBridge 146:22da6e220af6 3804 #if defined(RCC_DCKCFGR_CK48MSEL)
AnnaBridge 146:22da6e220af6 3805 return (uint32_t)(READ_BIT(RCC->DCKCFGR, CK48Mx));
AnnaBridge 146:22da6e220af6 3806 #else
AnnaBridge 146:22da6e220af6 3807 return (uint32_t)(READ_BIT(RCC->DCKCFGR2, CK48Mx));
AnnaBridge 146:22da6e220af6 3808 #endif /* RCC_DCKCFGR_CK48MSEL */
AnnaBridge 146:22da6e220af6 3809 }
AnnaBridge 146:22da6e220af6 3810
AnnaBridge 146:22da6e220af6 3811 #if defined(RNG)
AnnaBridge 146:22da6e220af6 3812 /**
AnnaBridge 146:22da6e220af6 3813 * @brief Get RNGx clock source
AnnaBridge 146:22da6e220af6 3814 * @rmtoll DCKCFGR CK48MSEL LL_RCC_GetRNGClockSource\n
AnnaBridge 146:22da6e220af6 3815 * DCKCFGR2 CK48MSEL LL_RCC_GetRNGClockSource
AnnaBridge 146:22da6e220af6 3816 * @param RNGx This parameter can be one of the following values:
AnnaBridge 146:22da6e220af6 3817 * @arg @ref LL_RCC_RNG_CLKSOURCE
AnnaBridge 146:22da6e220af6 3818 * @retval Returned value can be one of the following values:
AnnaBridge 146:22da6e220af6 3819 * @arg @ref LL_RCC_RNG_CLKSOURCE_PLL
AnnaBridge 146:22da6e220af6 3820 * @arg @ref LL_RCC_RNG_CLKSOURCE_PLLSAI (*)
AnnaBridge 146:22da6e220af6 3821 * @arg @ref LL_RCC_RNG_CLKSOURCE_PLLI2S (*)
AnnaBridge 146:22da6e220af6 3822 *
AnnaBridge 146:22da6e220af6 3823 * (*) value not defined in all devices.
AnnaBridge 146:22da6e220af6 3824 */
AnnaBridge 146:22da6e220af6 3825 __STATIC_INLINE uint32_t LL_RCC_GetRNGClockSource(uint32_t RNGx)
AnnaBridge 146:22da6e220af6 3826 {
AnnaBridge 146:22da6e220af6 3827 #if defined(RCC_DCKCFGR_CK48MSEL)
AnnaBridge 146:22da6e220af6 3828 return (uint32_t)(READ_BIT(RCC->DCKCFGR, RNGx));
AnnaBridge 146:22da6e220af6 3829 #else
AnnaBridge 146:22da6e220af6 3830 return (uint32_t)(READ_BIT(RCC->DCKCFGR2, RNGx));
AnnaBridge 146:22da6e220af6 3831 #endif /* RCC_DCKCFGR_CK48MSEL */
AnnaBridge 146:22da6e220af6 3832 }
AnnaBridge 146:22da6e220af6 3833 #endif /* RNG */
AnnaBridge 146:22da6e220af6 3834
AnnaBridge 146:22da6e220af6 3835 #if defined(USB_OTG_FS) || defined(USB_OTG_HS)
AnnaBridge 146:22da6e220af6 3836 /**
AnnaBridge 146:22da6e220af6 3837 * @brief Get USBx clock source
AnnaBridge 146:22da6e220af6 3838 * @rmtoll DCKCFGR CK48MSEL LL_RCC_GetUSBClockSource\n
AnnaBridge 146:22da6e220af6 3839 * DCKCFGR2 CK48MSEL LL_RCC_GetUSBClockSource
AnnaBridge 146:22da6e220af6 3840 * @param USBx This parameter can be one of the following values:
AnnaBridge 146:22da6e220af6 3841 * @arg @ref LL_RCC_USB_CLKSOURCE
AnnaBridge 146:22da6e220af6 3842 * @retval Returned value can be one of the following values:
AnnaBridge 146:22da6e220af6 3843 * @arg @ref LL_RCC_USB_CLKSOURCE_PLL
AnnaBridge 146:22da6e220af6 3844 * @arg @ref LL_RCC_USB_CLKSOURCE_PLLSAI (*)
AnnaBridge 146:22da6e220af6 3845 * @arg @ref LL_RCC_USB_CLKSOURCE_PLLI2S (*)
AnnaBridge 146:22da6e220af6 3846 *
AnnaBridge 146:22da6e220af6 3847 * (*) value not defined in all devices.
AnnaBridge 146:22da6e220af6 3848 */
AnnaBridge 146:22da6e220af6 3849 __STATIC_INLINE uint32_t LL_RCC_GetUSBClockSource(uint32_t USBx)
AnnaBridge 146:22da6e220af6 3850 {
AnnaBridge 146:22da6e220af6 3851 #if defined(RCC_DCKCFGR_CK48MSEL)
AnnaBridge 146:22da6e220af6 3852 return (uint32_t)(READ_BIT(RCC->DCKCFGR, USBx));
AnnaBridge 146:22da6e220af6 3853 #else
AnnaBridge 146:22da6e220af6 3854 return (uint32_t)(READ_BIT(RCC->DCKCFGR2, USBx));
AnnaBridge 146:22da6e220af6 3855 #endif /* RCC_DCKCFGR_CK48MSEL */
AnnaBridge 146:22da6e220af6 3856 }
AnnaBridge 146:22da6e220af6 3857 #endif /* USB_OTG_FS || USB_OTG_HS */
AnnaBridge 146:22da6e220af6 3858 #endif /* RCC_DCKCFGR_CK48MSEL || RCC_DCKCFGR2_CK48MSEL */
AnnaBridge 146:22da6e220af6 3859
AnnaBridge 146:22da6e220af6 3860 #if defined(CEC)
AnnaBridge 146:22da6e220af6 3861 /**
AnnaBridge 146:22da6e220af6 3862 * @brief Get CEC Clock Source
AnnaBridge 146:22da6e220af6 3863 * @rmtoll DCKCFGR2 CECSEL LL_RCC_GetCECClockSource
AnnaBridge 146:22da6e220af6 3864 * @param CECx This parameter can be one of the following values:
AnnaBridge 146:22da6e220af6 3865 * @arg @ref LL_RCC_CEC_CLKSOURCE
AnnaBridge 146:22da6e220af6 3866 * @retval Returned value can be one of the following values:
AnnaBridge 146:22da6e220af6 3867 * @arg @ref LL_RCC_CEC_CLKSOURCE_HSI_DIV488
AnnaBridge 146:22da6e220af6 3868 * @arg @ref LL_RCC_CEC_CLKSOURCE_LSE
AnnaBridge 146:22da6e220af6 3869 */
AnnaBridge 146:22da6e220af6 3870 __STATIC_INLINE uint32_t LL_RCC_GetCECClockSource(uint32_t CECx)
AnnaBridge 146:22da6e220af6 3871 {
AnnaBridge 146:22da6e220af6 3872 return (uint32_t)(READ_BIT(RCC->DCKCFGR2, CECx));
AnnaBridge 146:22da6e220af6 3873 }
AnnaBridge 146:22da6e220af6 3874 #endif /* CEC */
AnnaBridge 146:22da6e220af6 3875
AnnaBridge 146:22da6e220af6 3876 /**
AnnaBridge 146:22da6e220af6 3877 * @brief Get I2S Clock Source
AnnaBridge 146:22da6e220af6 3878 * @rmtoll CFGR I2SSRC LL_RCC_GetI2SClockSource\n
AnnaBridge 146:22da6e220af6 3879 * DCKCFGR I2SSRC LL_RCC_GetI2SClockSource\n
AnnaBridge 146:22da6e220af6 3880 * DCKCFGR I2S1SRC LL_RCC_GetI2SClockSource\n
AnnaBridge 146:22da6e220af6 3881 * DCKCFGR I2S2SRC LL_RCC_GetI2SClockSource
AnnaBridge 146:22da6e220af6 3882 * @param I2Sx This parameter can be one of the following values:
AnnaBridge 146:22da6e220af6 3883 * @arg @ref LL_RCC_I2S1_CLKSOURCE
AnnaBridge 146:22da6e220af6 3884 * @arg @ref LL_RCC_I2S2_CLKSOURCE (*)
AnnaBridge 146:22da6e220af6 3885 * @retval Returned value can be one of the following values:
AnnaBridge 146:22da6e220af6 3886 * @arg @ref LL_RCC_I2S1_CLKSOURCE_PLLI2S (*)
AnnaBridge 146:22da6e220af6 3887 * @arg @ref LL_RCC_I2S1_CLKSOURCE_PIN
AnnaBridge 146:22da6e220af6 3888 * @arg @ref LL_RCC_I2S1_CLKSOURCE_PLL (*)
AnnaBridge 146:22da6e220af6 3889 * @arg @ref LL_RCC_I2S1_CLKSOURCE_PLLSRC (*)
AnnaBridge 146:22da6e220af6 3890 * @arg @ref LL_RCC_I2S2_CLKSOURCE_PLLI2S (*)
AnnaBridge 146:22da6e220af6 3891 * @arg @ref LL_RCC_I2S2_CLKSOURCE_PIN (*)
AnnaBridge 146:22da6e220af6 3892 * @arg @ref LL_RCC_I2S2_CLKSOURCE_PLL (*)
AnnaBridge 146:22da6e220af6 3893 * @arg @ref LL_RCC_I2S2_CLKSOURCE_PLLSRC (*)
AnnaBridge 146:22da6e220af6 3894 *
AnnaBridge 146:22da6e220af6 3895 * (*) value not defined in all devices.
AnnaBridge 146:22da6e220af6 3896 */
AnnaBridge 146:22da6e220af6 3897 __STATIC_INLINE uint32_t LL_RCC_GetI2SClockSource(uint32_t I2Sx)
AnnaBridge 146:22da6e220af6 3898 {
AnnaBridge 146:22da6e220af6 3899 #if defined(RCC_CFGR_I2SSRC)
AnnaBridge 146:22da6e220af6 3900 return (uint32_t)(READ_BIT(RCC->CFGR, I2Sx));
AnnaBridge 146:22da6e220af6 3901 #else
AnnaBridge 146:22da6e220af6 3902 return (uint32_t)(READ_BIT(RCC->DCKCFGR, I2Sx) >> 16U | I2Sx);
AnnaBridge 146:22da6e220af6 3903 #endif /* RCC_CFGR_I2SSRC */
AnnaBridge 146:22da6e220af6 3904 }
AnnaBridge 146:22da6e220af6 3905
AnnaBridge 146:22da6e220af6 3906 #if defined(DFSDM1_Channel0)
AnnaBridge 146:22da6e220af6 3907 /**
AnnaBridge 146:22da6e220af6 3908 * @brief Get DFSDM Audio Clock Source
AnnaBridge 146:22da6e220af6 3909 * @rmtoll DCKCFGR CKDFSDM1ASEL LL_RCC_GetDFSDMAudioClockSource\n
AnnaBridge 146:22da6e220af6 3910 * DCKCFGR CKDFSDM2ASEL LL_RCC_GetDFSDMAudioClockSource
AnnaBridge 146:22da6e220af6 3911 * @param DFSDMx This parameter can be one of the following values:
AnnaBridge 146:22da6e220af6 3912 * @arg @ref LL_RCC_DFSDM1_AUDIO_CLKSOURCE
AnnaBridge 146:22da6e220af6 3913 * @arg @ref LL_RCC_DFSDM2_AUDIO_CLKSOURCE (*)
AnnaBridge 146:22da6e220af6 3914 * @retval Returned value can be one of the following values:
AnnaBridge 146:22da6e220af6 3915 * @arg @ref LL_RCC_DFSDM1_AUDIO_CLKSOURCE_I2S1
AnnaBridge 146:22da6e220af6 3916 * @arg @ref LL_RCC_DFSDM1_AUDIO_CLKSOURCE_I2S2
AnnaBridge 146:22da6e220af6 3917 * @arg @ref LL_RCC_DFSDM2_AUDIO_CLKSOURCE_I2S1 (*)
AnnaBridge 146:22da6e220af6 3918 * @arg @ref LL_RCC_DFSDM2_AUDIO_CLKSOURCE_I2S2 (*)
AnnaBridge 146:22da6e220af6 3919 *
AnnaBridge 146:22da6e220af6 3920 * (*) value not defined in all devices.
AnnaBridge 146:22da6e220af6 3921 */
AnnaBridge 146:22da6e220af6 3922 __STATIC_INLINE uint32_t LL_RCC_GetDFSDMAudioClockSource(uint32_t DFSDMx)
AnnaBridge 146:22da6e220af6 3923 {
AnnaBridge 146:22da6e220af6 3924 return (uint32_t)(READ_BIT(RCC->DCKCFGR, DFSDMx) << 16U | DFSDMx);
AnnaBridge 146:22da6e220af6 3925 }
AnnaBridge 146:22da6e220af6 3926
AnnaBridge 146:22da6e220af6 3927 /**
AnnaBridge 146:22da6e220af6 3928 * @brief Get DFSDM Audio Clock Source
AnnaBridge 146:22da6e220af6 3929 * @rmtoll DCKCFGR CKDFSDM1SEL LL_RCC_GetDFSDMClockSource
AnnaBridge 146:22da6e220af6 3930 * @param DFSDMx This parameter can be one of the following values:
AnnaBridge 146:22da6e220af6 3931 * @arg @ref LL_RCC_DFSDM1_CLKSOURCE
AnnaBridge 146:22da6e220af6 3932 * @arg @ref LL_RCC_DFSDM2_CLKSOURCE (*)
AnnaBridge 146:22da6e220af6 3933 * @retval Returned value can be one of the following values:
AnnaBridge 146:22da6e220af6 3934 * @arg @ref LL_RCC_DFSDM1_CLKSOURCE_PCLK2
AnnaBridge 146:22da6e220af6 3935 * @arg @ref LL_RCC_DFSDM1_CLKSOURCE_SYSCLK
AnnaBridge 146:22da6e220af6 3936 * @arg @ref LL_RCC_DFSDM2_CLKSOURCE_PCLK2 (*)
AnnaBridge 146:22da6e220af6 3937 * @arg @ref LL_RCC_DFSDM2_CLKSOURCE_SYSCLK (*)
AnnaBridge 146:22da6e220af6 3938 *
AnnaBridge 146:22da6e220af6 3939 * (*) value not defined in all devices.
AnnaBridge 146:22da6e220af6 3940 */
AnnaBridge 146:22da6e220af6 3941 __STATIC_INLINE uint32_t LL_RCC_GetDFSDMClockSource(uint32_t DFSDMx)
AnnaBridge 146:22da6e220af6 3942 {
AnnaBridge 146:22da6e220af6 3943 return (uint32_t)(READ_BIT(RCC->DCKCFGR, DFSDMx));
AnnaBridge 146:22da6e220af6 3944 }
AnnaBridge 146:22da6e220af6 3945 #endif /* DFSDM1_Channel0 */
AnnaBridge 146:22da6e220af6 3946
AnnaBridge 146:22da6e220af6 3947 #if defined(SPDIFRX)
AnnaBridge 146:22da6e220af6 3948 /**
AnnaBridge 146:22da6e220af6 3949 * @brief Get SPDIFRX clock source
AnnaBridge 146:22da6e220af6 3950 * @rmtoll DCKCFGR2 SPDIFRXSEL LL_RCC_GetSPDIFRXClockSource
AnnaBridge 146:22da6e220af6 3951 * @param SPDIFRXx This parameter can be one of the following values:
AnnaBridge 146:22da6e220af6 3952 * @arg @ref LL_RCC_SPDIFRX1_CLKSOURCE
AnnaBridge 146:22da6e220af6 3953 * @retval Returned value can be one of the following values:
AnnaBridge 146:22da6e220af6 3954 * @arg @ref LL_RCC_SPDIFRX1_CLKSOURCE_PLL
AnnaBridge 146:22da6e220af6 3955 * @arg @ref LL_RCC_SPDIFRX1_CLKSOURCE_PLLI2S
AnnaBridge 146:22da6e220af6 3956 *
AnnaBridge 146:22da6e220af6 3957 * (*) value not defined in all devices.
AnnaBridge 146:22da6e220af6 3958 */
AnnaBridge 146:22da6e220af6 3959 __STATIC_INLINE uint32_t LL_RCC_GetSPDIFRXClockSource(uint32_t SPDIFRXx)
AnnaBridge 146:22da6e220af6 3960 {
AnnaBridge 146:22da6e220af6 3961 return (uint32_t)(READ_BIT(RCC->DCKCFGR2, SPDIFRXx));
AnnaBridge 146:22da6e220af6 3962 }
AnnaBridge 146:22da6e220af6 3963 #endif /* SPDIFRX */
AnnaBridge 146:22da6e220af6 3964
AnnaBridge 146:22da6e220af6 3965 #if defined(DSI)
AnnaBridge 146:22da6e220af6 3966 /**
AnnaBridge 146:22da6e220af6 3967 * @brief Get DSI Clock Source
AnnaBridge 146:22da6e220af6 3968 * @rmtoll DCKCFGR DSISEL LL_RCC_GetDSIClockSource
AnnaBridge 146:22da6e220af6 3969 * @param DSIx This parameter can be one of the following values:
AnnaBridge 146:22da6e220af6 3970 * @arg @ref LL_RCC_DSI_CLKSOURCE
AnnaBridge 146:22da6e220af6 3971 * @retval Returned value can be one of the following values:
AnnaBridge 146:22da6e220af6 3972 * @arg @ref LL_RCC_DSI_CLKSOURCE_PHY
AnnaBridge 146:22da6e220af6 3973 * @arg @ref LL_RCC_DSI_CLKSOURCE_PLL
AnnaBridge 146:22da6e220af6 3974 */
AnnaBridge 146:22da6e220af6 3975 __STATIC_INLINE uint32_t LL_RCC_GetDSIClockSource(uint32_t DSIx)
AnnaBridge 146:22da6e220af6 3976 {
AnnaBridge 146:22da6e220af6 3977 return (uint32_t)(READ_BIT(RCC->DCKCFGR, DSIx));
AnnaBridge 146:22da6e220af6 3978 }
AnnaBridge 146:22da6e220af6 3979 #endif /* DSI */
AnnaBridge 146:22da6e220af6 3980
AnnaBridge 146:22da6e220af6 3981 /**
AnnaBridge 146:22da6e220af6 3982 * @}
AnnaBridge 146:22da6e220af6 3983 */
AnnaBridge 146:22da6e220af6 3984
AnnaBridge 146:22da6e220af6 3985 /** @defgroup RCC_LL_EF_RTC RTC
AnnaBridge 146:22da6e220af6 3986 * @{
AnnaBridge 146:22da6e220af6 3987 */
AnnaBridge 146:22da6e220af6 3988
AnnaBridge 146:22da6e220af6 3989 /**
AnnaBridge 146:22da6e220af6 3990 * @brief Set RTC Clock Source
AnnaBridge 146:22da6e220af6 3991 * @note Once the RTC clock source has been selected, it cannot be changed anymore unless
AnnaBridge 146:22da6e220af6 3992 * the Backup domain is reset, or unless a failure is detected on LSE (LSECSSD is
AnnaBridge 146:22da6e220af6 3993 * set). The BDRST bit can be used to reset them.
AnnaBridge 146:22da6e220af6 3994 * @rmtoll BDCR RTCSEL LL_RCC_SetRTCClockSource
AnnaBridge 146:22da6e220af6 3995 * @param Source This parameter can be one of the following values:
AnnaBridge 146:22da6e220af6 3996 * @arg @ref LL_RCC_RTC_CLKSOURCE_NONE
AnnaBridge 146:22da6e220af6 3997 * @arg @ref LL_RCC_RTC_CLKSOURCE_LSE
AnnaBridge 146:22da6e220af6 3998 * @arg @ref LL_RCC_RTC_CLKSOURCE_LSI
AnnaBridge 146:22da6e220af6 3999 * @arg @ref LL_RCC_RTC_CLKSOURCE_HSE
AnnaBridge 146:22da6e220af6 4000 * @retval None
AnnaBridge 146:22da6e220af6 4001 */
AnnaBridge 146:22da6e220af6 4002 __STATIC_INLINE void LL_RCC_SetRTCClockSource(uint32_t Source)
AnnaBridge 146:22da6e220af6 4003 {
AnnaBridge 146:22da6e220af6 4004 MODIFY_REG(RCC->BDCR, RCC_BDCR_RTCSEL, Source);
AnnaBridge 146:22da6e220af6 4005 }
AnnaBridge 146:22da6e220af6 4006
AnnaBridge 146:22da6e220af6 4007 /**
AnnaBridge 146:22da6e220af6 4008 * @brief Get RTC Clock Source
AnnaBridge 146:22da6e220af6 4009 * @rmtoll BDCR RTCSEL LL_RCC_GetRTCClockSource
AnnaBridge 146:22da6e220af6 4010 * @retval Returned value can be one of the following values:
AnnaBridge 146:22da6e220af6 4011 * @arg @ref LL_RCC_RTC_CLKSOURCE_NONE
AnnaBridge 146:22da6e220af6 4012 * @arg @ref LL_RCC_RTC_CLKSOURCE_LSE
AnnaBridge 146:22da6e220af6 4013 * @arg @ref LL_RCC_RTC_CLKSOURCE_LSI
AnnaBridge 146:22da6e220af6 4014 * @arg @ref LL_RCC_RTC_CLKSOURCE_HSE
AnnaBridge 146:22da6e220af6 4015 */
AnnaBridge 146:22da6e220af6 4016 __STATIC_INLINE uint32_t LL_RCC_GetRTCClockSource(void)
AnnaBridge 146:22da6e220af6 4017 {
AnnaBridge 146:22da6e220af6 4018 return (uint32_t)(READ_BIT(RCC->BDCR, RCC_BDCR_RTCSEL));
AnnaBridge 146:22da6e220af6 4019 }
AnnaBridge 146:22da6e220af6 4020
AnnaBridge 146:22da6e220af6 4021 /**
AnnaBridge 146:22da6e220af6 4022 * @brief Enable RTC
AnnaBridge 146:22da6e220af6 4023 * @rmtoll BDCR RTCEN LL_RCC_EnableRTC
AnnaBridge 146:22da6e220af6 4024 * @retval None
AnnaBridge 146:22da6e220af6 4025 */
AnnaBridge 146:22da6e220af6 4026 __STATIC_INLINE void LL_RCC_EnableRTC(void)
AnnaBridge 146:22da6e220af6 4027 {
AnnaBridge 146:22da6e220af6 4028 SET_BIT(RCC->BDCR, RCC_BDCR_RTCEN);
AnnaBridge 146:22da6e220af6 4029 }
AnnaBridge 146:22da6e220af6 4030
AnnaBridge 146:22da6e220af6 4031 /**
AnnaBridge 146:22da6e220af6 4032 * @brief Disable RTC
AnnaBridge 146:22da6e220af6 4033 * @rmtoll BDCR RTCEN LL_RCC_DisableRTC
AnnaBridge 146:22da6e220af6 4034 * @retval None
AnnaBridge 146:22da6e220af6 4035 */
AnnaBridge 146:22da6e220af6 4036 __STATIC_INLINE void LL_RCC_DisableRTC(void)
AnnaBridge 146:22da6e220af6 4037 {
AnnaBridge 146:22da6e220af6 4038 CLEAR_BIT(RCC->BDCR, RCC_BDCR_RTCEN);
AnnaBridge 146:22da6e220af6 4039 }
AnnaBridge 146:22da6e220af6 4040
AnnaBridge 146:22da6e220af6 4041 /**
AnnaBridge 146:22da6e220af6 4042 * @brief Check if RTC has been enabled or not
AnnaBridge 146:22da6e220af6 4043 * @rmtoll BDCR RTCEN LL_RCC_IsEnabledRTC
AnnaBridge 146:22da6e220af6 4044 * @retval State of bit (1 or 0).
AnnaBridge 146:22da6e220af6 4045 */
AnnaBridge 146:22da6e220af6 4046 __STATIC_INLINE uint32_t LL_RCC_IsEnabledRTC(void)
AnnaBridge 146:22da6e220af6 4047 {
AnnaBridge 146:22da6e220af6 4048 return (READ_BIT(RCC->BDCR, RCC_BDCR_RTCEN) == (RCC_BDCR_RTCEN));
AnnaBridge 146:22da6e220af6 4049 }
AnnaBridge 146:22da6e220af6 4050
AnnaBridge 146:22da6e220af6 4051 /**
AnnaBridge 146:22da6e220af6 4052 * @brief Force the Backup domain reset
AnnaBridge 146:22da6e220af6 4053 * @rmtoll BDCR BDRST LL_RCC_ForceBackupDomainReset
AnnaBridge 146:22da6e220af6 4054 * @retval None
AnnaBridge 146:22da6e220af6 4055 */
AnnaBridge 146:22da6e220af6 4056 __STATIC_INLINE void LL_RCC_ForceBackupDomainReset(void)
AnnaBridge 146:22da6e220af6 4057 {
AnnaBridge 146:22da6e220af6 4058 SET_BIT(RCC->BDCR, RCC_BDCR_BDRST);
AnnaBridge 146:22da6e220af6 4059 }
AnnaBridge 146:22da6e220af6 4060
AnnaBridge 146:22da6e220af6 4061 /**
AnnaBridge 146:22da6e220af6 4062 * @brief Release the Backup domain reset
AnnaBridge 146:22da6e220af6 4063 * @rmtoll BDCR BDRST LL_RCC_ReleaseBackupDomainReset
AnnaBridge 146:22da6e220af6 4064 * @retval None
AnnaBridge 146:22da6e220af6 4065 */
AnnaBridge 146:22da6e220af6 4066 __STATIC_INLINE void LL_RCC_ReleaseBackupDomainReset(void)
AnnaBridge 146:22da6e220af6 4067 {
AnnaBridge 146:22da6e220af6 4068 CLEAR_BIT(RCC->BDCR, RCC_BDCR_BDRST);
AnnaBridge 146:22da6e220af6 4069 }
AnnaBridge 146:22da6e220af6 4070
AnnaBridge 146:22da6e220af6 4071 /**
AnnaBridge 146:22da6e220af6 4072 * @brief Set HSE Prescalers for RTC Clock
AnnaBridge 146:22da6e220af6 4073 * @rmtoll CFGR RTCPRE LL_RCC_SetRTC_HSEPrescaler
AnnaBridge 146:22da6e220af6 4074 * @param Prescaler This parameter can be one of the following values:
AnnaBridge 146:22da6e220af6 4075 * @arg @ref LL_RCC_RTC_NOCLOCK
AnnaBridge 146:22da6e220af6 4076 * @arg @ref LL_RCC_RTC_HSE_DIV_2
AnnaBridge 146:22da6e220af6 4077 * @arg @ref LL_RCC_RTC_HSE_DIV_3
AnnaBridge 146:22da6e220af6 4078 * @arg @ref LL_RCC_RTC_HSE_DIV_4
AnnaBridge 146:22da6e220af6 4079 * @arg @ref LL_RCC_RTC_HSE_DIV_5
AnnaBridge 146:22da6e220af6 4080 * @arg @ref LL_RCC_RTC_HSE_DIV_6
AnnaBridge 146:22da6e220af6 4081 * @arg @ref LL_RCC_RTC_HSE_DIV_7
AnnaBridge 146:22da6e220af6 4082 * @arg @ref LL_RCC_RTC_HSE_DIV_8
AnnaBridge 146:22da6e220af6 4083 * @arg @ref LL_RCC_RTC_HSE_DIV_9
AnnaBridge 146:22da6e220af6 4084 * @arg @ref LL_RCC_RTC_HSE_DIV_10
AnnaBridge 146:22da6e220af6 4085 * @arg @ref LL_RCC_RTC_HSE_DIV_11
AnnaBridge 146:22da6e220af6 4086 * @arg @ref LL_RCC_RTC_HSE_DIV_12
AnnaBridge 146:22da6e220af6 4087 * @arg @ref LL_RCC_RTC_HSE_DIV_13
AnnaBridge 146:22da6e220af6 4088 * @arg @ref LL_RCC_RTC_HSE_DIV_14
AnnaBridge 146:22da6e220af6 4089 * @arg @ref LL_RCC_RTC_HSE_DIV_15
AnnaBridge 146:22da6e220af6 4090 * @arg @ref LL_RCC_RTC_HSE_DIV_16
AnnaBridge 146:22da6e220af6 4091 * @arg @ref LL_RCC_RTC_HSE_DIV_17
AnnaBridge 146:22da6e220af6 4092 * @arg @ref LL_RCC_RTC_HSE_DIV_18
AnnaBridge 146:22da6e220af6 4093 * @arg @ref LL_RCC_RTC_HSE_DIV_19
AnnaBridge 146:22da6e220af6 4094 * @arg @ref LL_RCC_RTC_HSE_DIV_20
AnnaBridge 146:22da6e220af6 4095 * @arg @ref LL_RCC_RTC_HSE_DIV_21
AnnaBridge 146:22da6e220af6 4096 * @arg @ref LL_RCC_RTC_HSE_DIV_22
AnnaBridge 146:22da6e220af6 4097 * @arg @ref LL_RCC_RTC_HSE_DIV_23
AnnaBridge 146:22da6e220af6 4098 * @arg @ref LL_RCC_RTC_HSE_DIV_24
AnnaBridge 146:22da6e220af6 4099 * @arg @ref LL_RCC_RTC_HSE_DIV_25
AnnaBridge 146:22da6e220af6 4100 * @arg @ref LL_RCC_RTC_HSE_DIV_26
AnnaBridge 146:22da6e220af6 4101 * @arg @ref LL_RCC_RTC_HSE_DIV_27
AnnaBridge 146:22da6e220af6 4102 * @arg @ref LL_RCC_RTC_HSE_DIV_28
AnnaBridge 146:22da6e220af6 4103 * @arg @ref LL_RCC_RTC_HSE_DIV_29
AnnaBridge 146:22da6e220af6 4104 * @arg @ref LL_RCC_RTC_HSE_DIV_30
AnnaBridge 146:22da6e220af6 4105 * @arg @ref LL_RCC_RTC_HSE_DIV_31
AnnaBridge 146:22da6e220af6 4106 * @retval None
AnnaBridge 146:22da6e220af6 4107 */
AnnaBridge 146:22da6e220af6 4108 __STATIC_INLINE void LL_RCC_SetRTC_HSEPrescaler(uint32_t Prescaler)
AnnaBridge 146:22da6e220af6 4109 {
AnnaBridge 146:22da6e220af6 4110 MODIFY_REG(RCC->CFGR, RCC_CFGR_RTCPRE, Prescaler);
AnnaBridge 146:22da6e220af6 4111 }
AnnaBridge 146:22da6e220af6 4112
AnnaBridge 146:22da6e220af6 4113 /**
AnnaBridge 146:22da6e220af6 4114 * @brief Get HSE Prescalers for RTC Clock
AnnaBridge 146:22da6e220af6 4115 * @rmtoll CFGR RTCPRE LL_RCC_GetRTC_HSEPrescaler
AnnaBridge 146:22da6e220af6 4116 * @retval Returned value can be one of the following values:
AnnaBridge 146:22da6e220af6 4117 * @arg @ref LL_RCC_RTC_NOCLOCK
AnnaBridge 146:22da6e220af6 4118 * @arg @ref LL_RCC_RTC_HSE_DIV_2
AnnaBridge 146:22da6e220af6 4119 * @arg @ref LL_RCC_RTC_HSE_DIV_3
AnnaBridge 146:22da6e220af6 4120 * @arg @ref LL_RCC_RTC_HSE_DIV_4
AnnaBridge 146:22da6e220af6 4121 * @arg @ref LL_RCC_RTC_HSE_DIV_5
AnnaBridge 146:22da6e220af6 4122 * @arg @ref LL_RCC_RTC_HSE_DIV_6
AnnaBridge 146:22da6e220af6 4123 * @arg @ref LL_RCC_RTC_HSE_DIV_7
AnnaBridge 146:22da6e220af6 4124 * @arg @ref LL_RCC_RTC_HSE_DIV_8
AnnaBridge 146:22da6e220af6 4125 * @arg @ref LL_RCC_RTC_HSE_DIV_9
AnnaBridge 146:22da6e220af6 4126 * @arg @ref LL_RCC_RTC_HSE_DIV_10
AnnaBridge 146:22da6e220af6 4127 * @arg @ref LL_RCC_RTC_HSE_DIV_11
AnnaBridge 146:22da6e220af6 4128 * @arg @ref LL_RCC_RTC_HSE_DIV_12
AnnaBridge 146:22da6e220af6 4129 * @arg @ref LL_RCC_RTC_HSE_DIV_13
AnnaBridge 146:22da6e220af6 4130 * @arg @ref LL_RCC_RTC_HSE_DIV_14
AnnaBridge 146:22da6e220af6 4131 * @arg @ref LL_RCC_RTC_HSE_DIV_15
AnnaBridge 146:22da6e220af6 4132 * @arg @ref LL_RCC_RTC_HSE_DIV_16
AnnaBridge 146:22da6e220af6 4133 * @arg @ref LL_RCC_RTC_HSE_DIV_17
AnnaBridge 146:22da6e220af6 4134 * @arg @ref LL_RCC_RTC_HSE_DIV_18
AnnaBridge 146:22da6e220af6 4135 * @arg @ref LL_RCC_RTC_HSE_DIV_19
AnnaBridge 146:22da6e220af6 4136 * @arg @ref LL_RCC_RTC_HSE_DIV_20
AnnaBridge 146:22da6e220af6 4137 * @arg @ref LL_RCC_RTC_HSE_DIV_21
AnnaBridge 146:22da6e220af6 4138 * @arg @ref LL_RCC_RTC_HSE_DIV_22
AnnaBridge 146:22da6e220af6 4139 * @arg @ref LL_RCC_RTC_HSE_DIV_23
AnnaBridge 146:22da6e220af6 4140 * @arg @ref LL_RCC_RTC_HSE_DIV_24
AnnaBridge 146:22da6e220af6 4141 * @arg @ref LL_RCC_RTC_HSE_DIV_25
AnnaBridge 146:22da6e220af6 4142 * @arg @ref LL_RCC_RTC_HSE_DIV_26
AnnaBridge 146:22da6e220af6 4143 * @arg @ref LL_RCC_RTC_HSE_DIV_27
AnnaBridge 146:22da6e220af6 4144 * @arg @ref LL_RCC_RTC_HSE_DIV_28
AnnaBridge 146:22da6e220af6 4145 * @arg @ref LL_RCC_RTC_HSE_DIV_29
AnnaBridge 146:22da6e220af6 4146 * @arg @ref LL_RCC_RTC_HSE_DIV_30
AnnaBridge 146:22da6e220af6 4147 * @arg @ref LL_RCC_RTC_HSE_DIV_31
AnnaBridge 146:22da6e220af6 4148 */
AnnaBridge 146:22da6e220af6 4149 __STATIC_INLINE uint32_t LL_RCC_GetRTC_HSEPrescaler(void)
AnnaBridge 146:22da6e220af6 4150 {
AnnaBridge 146:22da6e220af6 4151 return (uint32_t)(READ_BIT(RCC->CFGR, RCC_CFGR_RTCPRE));
AnnaBridge 146:22da6e220af6 4152 }
AnnaBridge 146:22da6e220af6 4153
AnnaBridge 146:22da6e220af6 4154 /**
AnnaBridge 146:22da6e220af6 4155 * @}
AnnaBridge 146:22da6e220af6 4156 */
AnnaBridge 146:22da6e220af6 4157
AnnaBridge 146:22da6e220af6 4158 #if defined(RCC_DCKCFGR_TIMPRE)
AnnaBridge 146:22da6e220af6 4159 /** @defgroup RCC_LL_EF_TIM_CLOCK_PRESCALER TIM
AnnaBridge 146:22da6e220af6 4160 * @{
AnnaBridge 146:22da6e220af6 4161 */
AnnaBridge 146:22da6e220af6 4162
AnnaBridge 146:22da6e220af6 4163 /**
AnnaBridge 146:22da6e220af6 4164 * @brief Set Timers Clock Prescalers
AnnaBridge 146:22da6e220af6 4165 * @rmtoll DCKCFGR TIMPRE LL_RCC_SetTIMPrescaler
AnnaBridge 146:22da6e220af6 4166 * @param Prescaler This parameter can be one of the following values:
AnnaBridge 146:22da6e220af6 4167 * @arg @ref LL_RCC_TIM_PRESCALER_TWICE
AnnaBridge 146:22da6e220af6 4168 * @arg @ref LL_RCC_TIM_PRESCALER_FOUR_TIMES
AnnaBridge 146:22da6e220af6 4169 * @retval None
AnnaBridge 146:22da6e220af6 4170 */
AnnaBridge 146:22da6e220af6 4171 __STATIC_INLINE void LL_RCC_SetTIMPrescaler(uint32_t Prescaler)
AnnaBridge 146:22da6e220af6 4172 {
AnnaBridge 146:22da6e220af6 4173 MODIFY_REG(RCC->DCKCFGR, RCC_DCKCFGR_TIMPRE, Prescaler);
AnnaBridge 146:22da6e220af6 4174 }
AnnaBridge 146:22da6e220af6 4175
AnnaBridge 146:22da6e220af6 4176 /**
AnnaBridge 146:22da6e220af6 4177 * @brief Get Timers Clock Prescalers
AnnaBridge 146:22da6e220af6 4178 * @rmtoll DCKCFGR TIMPRE LL_RCC_GetTIMPrescaler
AnnaBridge 146:22da6e220af6 4179 * @retval Returned value can be one of the following values:
AnnaBridge 146:22da6e220af6 4180 * @arg @ref LL_RCC_TIM_PRESCALER_TWICE
AnnaBridge 146:22da6e220af6 4181 * @arg @ref LL_RCC_TIM_PRESCALER_FOUR_TIMES
AnnaBridge 146:22da6e220af6 4182 */
AnnaBridge 146:22da6e220af6 4183 __STATIC_INLINE uint32_t LL_RCC_GetTIMPrescaler(void)
AnnaBridge 146:22da6e220af6 4184 {
AnnaBridge 146:22da6e220af6 4185 return (uint32_t)(READ_BIT(RCC->DCKCFGR, RCC_DCKCFGR_TIMPRE));
AnnaBridge 146:22da6e220af6 4186 }
AnnaBridge 146:22da6e220af6 4187
AnnaBridge 146:22da6e220af6 4188 /**
AnnaBridge 146:22da6e220af6 4189 * @}
AnnaBridge 146:22da6e220af6 4190 */
AnnaBridge 146:22da6e220af6 4191 #endif /* RCC_DCKCFGR_TIMPRE */
AnnaBridge 146:22da6e220af6 4192
AnnaBridge 146:22da6e220af6 4193 /** @defgroup RCC_LL_EF_PLL PLL
AnnaBridge 146:22da6e220af6 4194 * @{
AnnaBridge 146:22da6e220af6 4195 */
AnnaBridge 146:22da6e220af6 4196
AnnaBridge 146:22da6e220af6 4197 /**
AnnaBridge 146:22da6e220af6 4198 * @brief Enable PLL
AnnaBridge 146:22da6e220af6 4199 * @rmtoll CR PLLON LL_RCC_PLL_Enable
AnnaBridge 146:22da6e220af6 4200 * @retval None
AnnaBridge 146:22da6e220af6 4201 */
AnnaBridge 146:22da6e220af6 4202 __STATIC_INLINE void LL_RCC_PLL_Enable(void)
AnnaBridge 146:22da6e220af6 4203 {
AnnaBridge 146:22da6e220af6 4204 SET_BIT(RCC->CR, RCC_CR_PLLON);
AnnaBridge 146:22da6e220af6 4205 }
AnnaBridge 146:22da6e220af6 4206
AnnaBridge 146:22da6e220af6 4207 /**
AnnaBridge 146:22da6e220af6 4208 * @brief Disable PLL
AnnaBridge 146:22da6e220af6 4209 * @note Cannot be disabled if the PLL clock is used as the system clock
AnnaBridge 146:22da6e220af6 4210 * @rmtoll CR PLLON LL_RCC_PLL_Disable
AnnaBridge 146:22da6e220af6 4211 * @retval None
AnnaBridge 146:22da6e220af6 4212 */
AnnaBridge 146:22da6e220af6 4213 __STATIC_INLINE void LL_RCC_PLL_Disable(void)
AnnaBridge 146:22da6e220af6 4214 {
AnnaBridge 146:22da6e220af6 4215 CLEAR_BIT(RCC->CR, RCC_CR_PLLON);
AnnaBridge 146:22da6e220af6 4216 }
AnnaBridge 146:22da6e220af6 4217
AnnaBridge 146:22da6e220af6 4218 /**
AnnaBridge 146:22da6e220af6 4219 * @brief Check if PLL Ready
AnnaBridge 146:22da6e220af6 4220 * @rmtoll CR PLLRDY LL_RCC_PLL_IsReady
AnnaBridge 146:22da6e220af6 4221 * @retval State of bit (1 or 0).
AnnaBridge 146:22da6e220af6 4222 */
AnnaBridge 146:22da6e220af6 4223 __STATIC_INLINE uint32_t LL_RCC_PLL_IsReady(void)
AnnaBridge 146:22da6e220af6 4224 {
AnnaBridge 146:22da6e220af6 4225 return (READ_BIT(RCC->CR, RCC_CR_PLLRDY) == (RCC_CR_PLLRDY));
AnnaBridge 146:22da6e220af6 4226 }
AnnaBridge 146:22da6e220af6 4227
AnnaBridge 146:22da6e220af6 4228 /**
AnnaBridge 146:22da6e220af6 4229 * @brief Configure PLL used for SYSCLK Domain
AnnaBridge 146:22da6e220af6 4230 * @note PLL Source and PLLM Divider can be written only when PLL,
AnnaBridge 146:22da6e220af6 4231 * PLLI2S and PLLSAI(*) are disabled
AnnaBridge 146:22da6e220af6 4232 * @note PLLN/PLLP can be written only when PLL is disabled
AnnaBridge 146:22da6e220af6 4233 * @rmtoll PLLCFGR PLLSRC LL_RCC_PLL_ConfigDomain_SYS\n
AnnaBridge 146:22da6e220af6 4234 * PLLCFGR PLLM LL_RCC_PLL_ConfigDomain_SYS\n
AnnaBridge 146:22da6e220af6 4235 * PLLCFGR PLLN LL_RCC_PLL_ConfigDomain_SYS\n
AnnaBridge 146:22da6e220af6 4236 * PLLCFGR PLLR LL_RCC_PLL_ConfigDomain_SYS\n
AnnaBridge 146:22da6e220af6 4237 * PLLCFGR PLLP LL_RCC_PLL_ConfigDomain_SYS
AnnaBridge 146:22da6e220af6 4238 * @param Source This parameter can be one of the following values:
AnnaBridge 146:22da6e220af6 4239 * @arg @ref LL_RCC_PLLSOURCE_HSI
AnnaBridge 146:22da6e220af6 4240 * @arg @ref LL_RCC_PLLSOURCE_HSE
AnnaBridge 146:22da6e220af6 4241 * @param PLLM This parameter can be one of the following values:
AnnaBridge 146:22da6e220af6 4242 * @arg @ref LL_RCC_PLLM_DIV_2
AnnaBridge 146:22da6e220af6 4243 * @arg @ref LL_RCC_PLLM_DIV_3
AnnaBridge 146:22da6e220af6 4244 * @arg @ref LL_RCC_PLLM_DIV_4
AnnaBridge 146:22da6e220af6 4245 * @arg @ref LL_RCC_PLLM_DIV_5
AnnaBridge 146:22da6e220af6 4246 * @arg @ref LL_RCC_PLLM_DIV_6
AnnaBridge 146:22da6e220af6 4247 * @arg @ref LL_RCC_PLLM_DIV_7
AnnaBridge 146:22da6e220af6 4248 * @arg @ref LL_RCC_PLLM_DIV_8
AnnaBridge 146:22da6e220af6 4249 * @arg @ref LL_RCC_PLLM_DIV_9
AnnaBridge 146:22da6e220af6 4250 * @arg @ref LL_RCC_PLLM_DIV_10
AnnaBridge 146:22da6e220af6 4251 * @arg @ref LL_RCC_PLLM_DIV_11
AnnaBridge 146:22da6e220af6 4252 * @arg @ref LL_RCC_PLLM_DIV_12
AnnaBridge 146:22da6e220af6 4253 * @arg @ref LL_RCC_PLLM_DIV_13
AnnaBridge 146:22da6e220af6 4254 * @arg @ref LL_RCC_PLLM_DIV_14
AnnaBridge 146:22da6e220af6 4255 * @arg @ref LL_RCC_PLLM_DIV_15
AnnaBridge 146:22da6e220af6 4256 * @arg @ref LL_RCC_PLLM_DIV_16
AnnaBridge 146:22da6e220af6 4257 * @arg @ref LL_RCC_PLLM_DIV_17
AnnaBridge 146:22da6e220af6 4258 * @arg @ref LL_RCC_PLLM_DIV_18
AnnaBridge 146:22da6e220af6 4259 * @arg @ref LL_RCC_PLLM_DIV_19
AnnaBridge 146:22da6e220af6 4260 * @arg @ref LL_RCC_PLLM_DIV_20
AnnaBridge 146:22da6e220af6 4261 * @arg @ref LL_RCC_PLLM_DIV_21
AnnaBridge 146:22da6e220af6 4262 * @arg @ref LL_RCC_PLLM_DIV_22
AnnaBridge 146:22da6e220af6 4263 * @arg @ref LL_RCC_PLLM_DIV_23
AnnaBridge 146:22da6e220af6 4264 * @arg @ref LL_RCC_PLLM_DIV_24
AnnaBridge 146:22da6e220af6 4265 * @arg @ref LL_RCC_PLLM_DIV_25
AnnaBridge 146:22da6e220af6 4266 * @arg @ref LL_RCC_PLLM_DIV_26
AnnaBridge 146:22da6e220af6 4267 * @arg @ref LL_RCC_PLLM_DIV_27
AnnaBridge 146:22da6e220af6 4268 * @arg @ref LL_RCC_PLLM_DIV_28
AnnaBridge 146:22da6e220af6 4269 * @arg @ref LL_RCC_PLLM_DIV_29
AnnaBridge 146:22da6e220af6 4270 * @arg @ref LL_RCC_PLLM_DIV_30
AnnaBridge 146:22da6e220af6 4271 * @arg @ref LL_RCC_PLLM_DIV_31
AnnaBridge 146:22da6e220af6 4272 * @arg @ref LL_RCC_PLLM_DIV_32
AnnaBridge 146:22da6e220af6 4273 * @arg @ref LL_RCC_PLLM_DIV_33
AnnaBridge 146:22da6e220af6 4274 * @arg @ref LL_RCC_PLLM_DIV_34
AnnaBridge 146:22da6e220af6 4275 * @arg @ref LL_RCC_PLLM_DIV_35
AnnaBridge 146:22da6e220af6 4276 * @arg @ref LL_RCC_PLLM_DIV_36
AnnaBridge 146:22da6e220af6 4277 * @arg @ref LL_RCC_PLLM_DIV_37
AnnaBridge 146:22da6e220af6 4278 * @arg @ref LL_RCC_PLLM_DIV_38
AnnaBridge 146:22da6e220af6 4279 * @arg @ref LL_RCC_PLLM_DIV_39
AnnaBridge 146:22da6e220af6 4280 * @arg @ref LL_RCC_PLLM_DIV_40
AnnaBridge 146:22da6e220af6 4281 * @arg @ref LL_RCC_PLLM_DIV_41
AnnaBridge 146:22da6e220af6 4282 * @arg @ref LL_RCC_PLLM_DIV_42
AnnaBridge 146:22da6e220af6 4283 * @arg @ref LL_RCC_PLLM_DIV_43
AnnaBridge 146:22da6e220af6 4284 * @arg @ref LL_RCC_PLLM_DIV_44
AnnaBridge 146:22da6e220af6 4285 * @arg @ref LL_RCC_PLLM_DIV_45
AnnaBridge 146:22da6e220af6 4286 * @arg @ref LL_RCC_PLLM_DIV_46
AnnaBridge 146:22da6e220af6 4287 * @arg @ref LL_RCC_PLLM_DIV_47
AnnaBridge 146:22da6e220af6 4288 * @arg @ref LL_RCC_PLLM_DIV_48
AnnaBridge 146:22da6e220af6 4289 * @arg @ref LL_RCC_PLLM_DIV_49
AnnaBridge 146:22da6e220af6 4290 * @arg @ref LL_RCC_PLLM_DIV_50
AnnaBridge 146:22da6e220af6 4291 * @arg @ref LL_RCC_PLLM_DIV_51
AnnaBridge 146:22da6e220af6 4292 * @arg @ref LL_RCC_PLLM_DIV_52
AnnaBridge 146:22da6e220af6 4293 * @arg @ref LL_RCC_PLLM_DIV_53
AnnaBridge 146:22da6e220af6 4294 * @arg @ref LL_RCC_PLLM_DIV_54
AnnaBridge 146:22da6e220af6 4295 * @arg @ref LL_RCC_PLLM_DIV_55
AnnaBridge 146:22da6e220af6 4296 * @arg @ref LL_RCC_PLLM_DIV_56
AnnaBridge 146:22da6e220af6 4297 * @arg @ref LL_RCC_PLLM_DIV_57
AnnaBridge 146:22da6e220af6 4298 * @arg @ref LL_RCC_PLLM_DIV_58
AnnaBridge 146:22da6e220af6 4299 * @arg @ref LL_RCC_PLLM_DIV_59
AnnaBridge 146:22da6e220af6 4300 * @arg @ref LL_RCC_PLLM_DIV_60
AnnaBridge 146:22da6e220af6 4301 * @arg @ref LL_RCC_PLLM_DIV_61
AnnaBridge 146:22da6e220af6 4302 * @arg @ref LL_RCC_PLLM_DIV_62
AnnaBridge 146:22da6e220af6 4303 * @arg @ref LL_RCC_PLLM_DIV_63
AnnaBridge 146:22da6e220af6 4304 * @param PLLN Between 50/192(*) and 432
AnnaBridge 146:22da6e220af6 4305 *
AnnaBridge 146:22da6e220af6 4306 * (*) value not defined in all devices.
AnnaBridge 146:22da6e220af6 4307 * @param PLLP_R This parameter can be one of the following values:
AnnaBridge 146:22da6e220af6 4308 * @arg @ref LL_RCC_PLLP_DIV_2
AnnaBridge 146:22da6e220af6 4309 * @arg @ref LL_RCC_PLLP_DIV_4
AnnaBridge 146:22da6e220af6 4310 * @arg @ref LL_RCC_PLLP_DIV_6
AnnaBridge 146:22da6e220af6 4311 * @arg @ref LL_RCC_PLLP_DIV_8
AnnaBridge 146:22da6e220af6 4312 * @arg @ref LL_RCC_PLLR_DIV_2 (*)
AnnaBridge 146:22da6e220af6 4313 * @arg @ref LL_RCC_PLLR_DIV_3 (*)
AnnaBridge 146:22da6e220af6 4314 * @arg @ref LL_RCC_PLLR_DIV_4 (*)
AnnaBridge 146:22da6e220af6 4315 * @arg @ref LL_RCC_PLLR_DIV_5 (*)
AnnaBridge 146:22da6e220af6 4316 * @arg @ref LL_RCC_PLLR_DIV_6 (*)
AnnaBridge 146:22da6e220af6 4317 * @arg @ref LL_RCC_PLLR_DIV_7 (*)
AnnaBridge 146:22da6e220af6 4318 *
AnnaBridge 146:22da6e220af6 4319 * (*) value not defined in all devices.
AnnaBridge 146:22da6e220af6 4320 * @retval None
AnnaBridge 146:22da6e220af6 4321 */
AnnaBridge 146:22da6e220af6 4322 __STATIC_INLINE void LL_RCC_PLL_ConfigDomain_SYS(uint32_t Source, uint32_t PLLM, uint32_t PLLN, uint32_t PLLP_R)
AnnaBridge 146:22da6e220af6 4323 {
AnnaBridge 146:22da6e220af6 4324 MODIFY_REG(RCC->PLLCFGR, RCC_PLLCFGR_PLLSRC | RCC_PLLCFGR_PLLM | RCC_PLLCFGR_PLLN,
AnnaBridge 146:22da6e220af6 4325 Source | PLLM | PLLN << RCC_PLLCFGR_PLLN_Pos);
AnnaBridge 146:22da6e220af6 4326 MODIFY_REG(RCC->PLLCFGR, RCC_PLLCFGR_PLLP, PLLP_R);
AnnaBridge 146:22da6e220af6 4327 #if defined(RCC_PLLR_SYSCLK_SUPPORT)
AnnaBridge 146:22da6e220af6 4328 MODIFY_REG(RCC->PLLCFGR, RCC_PLLCFGR_PLLR, PLLP_R);
AnnaBridge 146:22da6e220af6 4329 #endif /* RCC_PLLR_SYSCLK_SUPPORT */
AnnaBridge 146:22da6e220af6 4330 }
AnnaBridge 146:22da6e220af6 4331
AnnaBridge 146:22da6e220af6 4332 /**
AnnaBridge 146:22da6e220af6 4333 * @brief Configure PLL used for 48Mhz domain clock
AnnaBridge 146:22da6e220af6 4334 * @note PLL Source and PLLM Divider can be written only when PLL,
AnnaBridge 146:22da6e220af6 4335 * PLLI2S and PLLSAI(*) are disabled
AnnaBridge 146:22da6e220af6 4336 * @note PLLN/PLLQ can be written only when PLL is disabled
AnnaBridge 146:22da6e220af6 4337 * @note This can be selected for USB, RNG, SDIO
AnnaBridge 146:22da6e220af6 4338 * @rmtoll PLLCFGR PLLSRC LL_RCC_PLL_ConfigDomain_48M\n
AnnaBridge 146:22da6e220af6 4339 * PLLCFGR PLLM LL_RCC_PLL_ConfigDomain_48M\n
AnnaBridge 146:22da6e220af6 4340 * PLLCFGR PLLN LL_RCC_PLL_ConfigDomain_48M\n
AnnaBridge 146:22da6e220af6 4341 * PLLCFGR PLLQ LL_RCC_PLL_ConfigDomain_48M
AnnaBridge 146:22da6e220af6 4342 * @param Source This parameter can be one of the following values:
AnnaBridge 146:22da6e220af6 4343 * @arg @ref LL_RCC_PLLSOURCE_HSI
AnnaBridge 146:22da6e220af6 4344 * @arg @ref LL_RCC_PLLSOURCE_HSE
AnnaBridge 146:22da6e220af6 4345 * @param PLLM This parameter can be one of the following values:
AnnaBridge 146:22da6e220af6 4346 * @arg @ref LL_RCC_PLLM_DIV_2
AnnaBridge 146:22da6e220af6 4347 * @arg @ref LL_RCC_PLLM_DIV_3
AnnaBridge 146:22da6e220af6 4348 * @arg @ref LL_RCC_PLLM_DIV_4
AnnaBridge 146:22da6e220af6 4349 * @arg @ref LL_RCC_PLLM_DIV_5
AnnaBridge 146:22da6e220af6 4350 * @arg @ref LL_RCC_PLLM_DIV_6
AnnaBridge 146:22da6e220af6 4351 * @arg @ref LL_RCC_PLLM_DIV_7
AnnaBridge 146:22da6e220af6 4352 * @arg @ref LL_RCC_PLLM_DIV_8
AnnaBridge 146:22da6e220af6 4353 * @arg @ref LL_RCC_PLLM_DIV_9
AnnaBridge 146:22da6e220af6 4354 * @arg @ref LL_RCC_PLLM_DIV_10
AnnaBridge 146:22da6e220af6 4355 * @arg @ref LL_RCC_PLLM_DIV_11
AnnaBridge 146:22da6e220af6 4356 * @arg @ref LL_RCC_PLLM_DIV_12
AnnaBridge 146:22da6e220af6 4357 * @arg @ref LL_RCC_PLLM_DIV_13
AnnaBridge 146:22da6e220af6 4358 * @arg @ref LL_RCC_PLLM_DIV_14
AnnaBridge 146:22da6e220af6 4359 * @arg @ref LL_RCC_PLLM_DIV_15
AnnaBridge 146:22da6e220af6 4360 * @arg @ref LL_RCC_PLLM_DIV_16
AnnaBridge 146:22da6e220af6 4361 * @arg @ref LL_RCC_PLLM_DIV_17
AnnaBridge 146:22da6e220af6 4362 * @arg @ref LL_RCC_PLLM_DIV_18
AnnaBridge 146:22da6e220af6 4363 * @arg @ref LL_RCC_PLLM_DIV_19
AnnaBridge 146:22da6e220af6 4364 * @arg @ref LL_RCC_PLLM_DIV_20
AnnaBridge 146:22da6e220af6 4365 * @arg @ref LL_RCC_PLLM_DIV_21
AnnaBridge 146:22da6e220af6 4366 * @arg @ref LL_RCC_PLLM_DIV_22
AnnaBridge 146:22da6e220af6 4367 * @arg @ref LL_RCC_PLLM_DIV_23
AnnaBridge 146:22da6e220af6 4368 * @arg @ref LL_RCC_PLLM_DIV_24
AnnaBridge 146:22da6e220af6 4369 * @arg @ref LL_RCC_PLLM_DIV_25
AnnaBridge 146:22da6e220af6 4370 * @arg @ref LL_RCC_PLLM_DIV_26
AnnaBridge 146:22da6e220af6 4371 * @arg @ref LL_RCC_PLLM_DIV_27
AnnaBridge 146:22da6e220af6 4372 * @arg @ref LL_RCC_PLLM_DIV_28
AnnaBridge 146:22da6e220af6 4373 * @arg @ref LL_RCC_PLLM_DIV_29
AnnaBridge 146:22da6e220af6 4374 * @arg @ref LL_RCC_PLLM_DIV_30
AnnaBridge 146:22da6e220af6 4375 * @arg @ref LL_RCC_PLLM_DIV_31
AnnaBridge 146:22da6e220af6 4376 * @arg @ref LL_RCC_PLLM_DIV_32
AnnaBridge 146:22da6e220af6 4377 * @arg @ref LL_RCC_PLLM_DIV_33
AnnaBridge 146:22da6e220af6 4378 * @arg @ref LL_RCC_PLLM_DIV_34
AnnaBridge 146:22da6e220af6 4379 * @arg @ref LL_RCC_PLLM_DIV_35
AnnaBridge 146:22da6e220af6 4380 * @arg @ref LL_RCC_PLLM_DIV_36
AnnaBridge 146:22da6e220af6 4381 * @arg @ref LL_RCC_PLLM_DIV_37
AnnaBridge 146:22da6e220af6 4382 * @arg @ref LL_RCC_PLLM_DIV_38
AnnaBridge 146:22da6e220af6 4383 * @arg @ref LL_RCC_PLLM_DIV_39
AnnaBridge 146:22da6e220af6 4384 * @arg @ref LL_RCC_PLLM_DIV_40
AnnaBridge 146:22da6e220af6 4385 * @arg @ref LL_RCC_PLLM_DIV_41
AnnaBridge 146:22da6e220af6 4386 * @arg @ref LL_RCC_PLLM_DIV_42
AnnaBridge 146:22da6e220af6 4387 * @arg @ref LL_RCC_PLLM_DIV_43
AnnaBridge 146:22da6e220af6 4388 * @arg @ref LL_RCC_PLLM_DIV_44
AnnaBridge 146:22da6e220af6 4389 * @arg @ref LL_RCC_PLLM_DIV_45
AnnaBridge 146:22da6e220af6 4390 * @arg @ref LL_RCC_PLLM_DIV_46
AnnaBridge 146:22da6e220af6 4391 * @arg @ref LL_RCC_PLLM_DIV_47
AnnaBridge 146:22da6e220af6 4392 * @arg @ref LL_RCC_PLLM_DIV_48
AnnaBridge 146:22da6e220af6 4393 * @arg @ref LL_RCC_PLLM_DIV_49
AnnaBridge 146:22da6e220af6 4394 * @arg @ref LL_RCC_PLLM_DIV_50
AnnaBridge 146:22da6e220af6 4395 * @arg @ref LL_RCC_PLLM_DIV_51
AnnaBridge 146:22da6e220af6 4396 * @arg @ref LL_RCC_PLLM_DIV_52
AnnaBridge 146:22da6e220af6 4397 * @arg @ref LL_RCC_PLLM_DIV_53
AnnaBridge 146:22da6e220af6 4398 * @arg @ref LL_RCC_PLLM_DIV_54
AnnaBridge 146:22da6e220af6 4399 * @arg @ref LL_RCC_PLLM_DIV_55
AnnaBridge 146:22da6e220af6 4400 * @arg @ref LL_RCC_PLLM_DIV_56
AnnaBridge 146:22da6e220af6 4401 * @arg @ref LL_RCC_PLLM_DIV_57
AnnaBridge 146:22da6e220af6 4402 * @arg @ref LL_RCC_PLLM_DIV_58
AnnaBridge 146:22da6e220af6 4403 * @arg @ref LL_RCC_PLLM_DIV_59
AnnaBridge 146:22da6e220af6 4404 * @arg @ref LL_RCC_PLLM_DIV_60
AnnaBridge 146:22da6e220af6 4405 * @arg @ref LL_RCC_PLLM_DIV_61
AnnaBridge 146:22da6e220af6 4406 * @arg @ref LL_RCC_PLLM_DIV_62
AnnaBridge 146:22da6e220af6 4407 * @arg @ref LL_RCC_PLLM_DIV_63
AnnaBridge 146:22da6e220af6 4408 * @param PLLN Between 50/192(*) and 432
AnnaBridge 146:22da6e220af6 4409 *
AnnaBridge 146:22da6e220af6 4410 * (*) value not defined in all devices.
AnnaBridge 146:22da6e220af6 4411 * @param PLLQ This parameter can be one of the following values:
AnnaBridge 146:22da6e220af6 4412 * @arg @ref LL_RCC_PLLQ_DIV_2
AnnaBridge 146:22da6e220af6 4413 * @arg @ref LL_RCC_PLLQ_DIV_3
AnnaBridge 146:22da6e220af6 4414 * @arg @ref LL_RCC_PLLQ_DIV_4
AnnaBridge 146:22da6e220af6 4415 * @arg @ref LL_RCC_PLLQ_DIV_5
AnnaBridge 146:22da6e220af6 4416 * @arg @ref LL_RCC_PLLQ_DIV_6
AnnaBridge 146:22da6e220af6 4417 * @arg @ref LL_RCC_PLLQ_DIV_7
AnnaBridge 146:22da6e220af6 4418 * @arg @ref LL_RCC_PLLQ_DIV_8
AnnaBridge 146:22da6e220af6 4419 * @arg @ref LL_RCC_PLLQ_DIV_9
AnnaBridge 146:22da6e220af6 4420 * @arg @ref LL_RCC_PLLQ_DIV_10
AnnaBridge 146:22da6e220af6 4421 * @arg @ref LL_RCC_PLLQ_DIV_11
AnnaBridge 146:22da6e220af6 4422 * @arg @ref LL_RCC_PLLQ_DIV_12
AnnaBridge 146:22da6e220af6 4423 * @arg @ref LL_RCC_PLLQ_DIV_13
AnnaBridge 146:22da6e220af6 4424 * @arg @ref LL_RCC_PLLQ_DIV_14
AnnaBridge 146:22da6e220af6 4425 * @arg @ref LL_RCC_PLLQ_DIV_15
AnnaBridge 146:22da6e220af6 4426 * @retval None
AnnaBridge 146:22da6e220af6 4427 */
AnnaBridge 146:22da6e220af6 4428 __STATIC_INLINE void LL_RCC_PLL_ConfigDomain_48M(uint32_t Source, uint32_t PLLM, uint32_t PLLN, uint32_t PLLQ)
AnnaBridge 146:22da6e220af6 4429 {
AnnaBridge 146:22da6e220af6 4430 MODIFY_REG(RCC->PLLCFGR, RCC_PLLCFGR_PLLSRC | RCC_PLLCFGR_PLLM | RCC_PLLCFGR_PLLN | RCC_PLLCFGR_PLLQ,
AnnaBridge 146:22da6e220af6 4431 Source | PLLM | PLLN << RCC_PLLCFGR_PLLN_Pos | PLLQ);
AnnaBridge 146:22da6e220af6 4432 }
AnnaBridge 146:22da6e220af6 4433
AnnaBridge 146:22da6e220af6 4434 #if defined(DSI)
AnnaBridge 146:22da6e220af6 4435 /**
AnnaBridge 146:22da6e220af6 4436 * @brief Configure PLL used for DSI clock
AnnaBridge 146:22da6e220af6 4437 * @note PLL Source and PLLM Divider can be written only when PLL,
AnnaBridge 146:22da6e220af6 4438 * PLLI2S and PLLSAI are disabled
AnnaBridge 146:22da6e220af6 4439 * @note PLLN/PLLR can be written only when PLL is disabled
AnnaBridge 146:22da6e220af6 4440 * @note This can be selected for DSI
AnnaBridge 146:22da6e220af6 4441 * @rmtoll PLLCFGR PLLSRC LL_RCC_PLL_ConfigDomain_DSI\n
AnnaBridge 146:22da6e220af6 4442 * PLLCFGR PLLM LL_RCC_PLL_ConfigDomain_DSI\n
AnnaBridge 146:22da6e220af6 4443 * PLLCFGR PLLN LL_RCC_PLL_ConfigDomain_DSI\n
AnnaBridge 146:22da6e220af6 4444 * PLLCFGR PLLR LL_RCC_PLL_ConfigDomain_DSI
AnnaBridge 146:22da6e220af6 4445 * @param Source This parameter can be one of the following values:
AnnaBridge 146:22da6e220af6 4446 * @arg @ref LL_RCC_PLLSOURCE_HSI
AnnaBridge 146:22da6e220af6 4447 * @arg @ref LL_RCC_PLLSOURCE_HSE
AnnaBridge 146:22da6e220af6 4448 * @param PLLM This parameter can be one of the following values:
AnnaBridge 146:22da6e220af6 4449 * @arg @ref LL_RCC_PLLM_DIV_2
AnnaBridge 146:22da6e220af6 4450 * @arg @ref LL_RCC_PLLM_DIV_3
AnnaBridge 146:22da6e220af6 4451 * @arg @ref LL_RCC_PLLM_DIV_4
AnnaBridge 146:22da6e220af6 4452 * @arg @ref LL_RCC_PLLM_DIV_5
AnnaBridge 146:22da6e220af6 4453 * @arg @ref LL_RCC_PLLM_DIV_6
AnnaBridge 146:22da6e220af6 4454 * @arg @ref LL_RCC_PLLM_DIV_7
AnnaBridge 146:22da6e220af6 4455 * @arg @ref LL_RCC_PLLM_DIV_8
AnnaBridge 146:22da6e220af6 4456 * @arg @ref LL_RCC_PLLM_DIV_9
AnnaBridge 146:22da6e220af6 4457 * @arg @ref LL_RCC_PLLM_DIV_10
AnnaBridge 146:22da6e220af6 4458 * @arg @ref LL_RCC_PLLM_DIV_11
AnnaBridge 146:22da6e220af6 4459 * @arg @ref LL_RCC_PLLM_DIV_12
AnnaBridge 146:22da6e220af6 4460 * @arg @ref LL_RCC_PLLM_DIV_13
AnnaBridge 146:22da6e220af6 4461 * @arg @ref LL_RCC_PLLM_DIV_14
AnnaBridge 146:22da6e220af6 4462 * @arg @ref LL_RCC_PLLM_DIV_15
AnnaBridge 146:22da6e220af6 4463 * @arg @ref LL_RCC_PLLM_DIV_16
AnnaBridge 146:22da6e220af6 4464 * @arg @ref LL_RCC_PLLM_DIV_17
AnnaBridge 146:22da6e220af6 4465 * @arg @ref LL_RCC_PLLM_DIV_18
AnnaBridge 146:22da6e220af6 4466 * @arg @ref LL_RCC_PLLM_DIV_19
AnnaBridge 146:22da6e220af6 4467 * @arg @ref LL_RCC_PLLM_DIV_20
AnnaBridge 146:22da6e220af6 4468 * @arg @ref LL_RCC_PLLM_DIV_21
AnnaBridge 146:22da6e220af6 4469 * @arg @ref LL_RCC_PLLM_DIV_22
AnnaBridge 146:22da6e220af6 4470 * @arg @ref LL_RCC_PLLM_DIV_23
AnnaBridge 146:22da6e220af6 4471 * @arg @ref LL_RCC_PLLM_DIV_24
AnnaBridge 146:22da6e220af6 4472 * @arg @ref LL_RCC_PLLM_DIV_25
AnnaBridge 146:22da6e220af6 4473 * @arg @ref LL_RCC_PLLM_DIV_26
AnnaBridge 146:22da6e220af6 4474 * @arg @ref LL_RCC_PLLM_DIV_27
AnnaBridge 146:22da6e220af6 4475 * @arg @ref LL_RCC_PLLM_DIV_28
AnnaBridge 146:22da6e220af6 4476 * @arg @ref LL_RCC_PLLM_DIV_29
AnnaBridge 146:22da6e220af6 4477 * @arg @ref LL_RCC_PLLM_DIV_30
AnnaBridge 146:22da6e220af6 4478 * @arg @ref LL_RCC_PLLM_DIV_31
AnnaBridge 146:22da6e220af6 4479 * @arg @ref LL_RCC_PLLM_DIV_32
AnnaBridge 146:22da6e220af6 4480 * @arg @ref LL_RCC_PLLM_DIV_33
AnnaBridge 146:22da6e220af6 4481 * @arg @ref LL_RCC_PLLM_DIV_34
AnnaBridge 146:22da6e220af6 4482 * @arg @ref LL_RCC_PLLM_DIV_35
AnnaBridge 146:22da6e220af6 4483 * @arg @ref LL_RCC_PLLM_DIV_36
AnnaBridge 146:22da6e220af6 4484 * @arg @ref LL_RCC_PLLM_DIV_37
AnnaBridge 146:22da6e220af6 4485 * @arg @ref LL_RCC_PLLM_DIV_38
AnnaBridge 146:22da6e220af6 4486 * @arg @ref LL_RCC_PLLM_DIV_39
AnnaBridge 146:22da6e220af6 4487 * @arg @ref LL_RCC_PLLM_DIV_40
AnnaBridge 146:22da6e220af6 4488 * @arg @ref LL_RCC_PLLM_DIV_41
AnnaBridge 146:22da6e220af6 4489 * @arg @ref LL_RCC_PLLM_DIV_42
AnnaBridge 146:22da6e220af6 4490 * @arg @ref LL_RCC_PLLM_DIV_43
AnnaBridge 146:22da6e220af6 4491 * @arg @ref LL_RCC_PLLM_DIV_44
AnnaBridge 146:22da6e220af6 4492 * @arg @ref LL_RCC_PLLM_DIV_45
AnnaBridge 146:22da6e220af6 4493 * @arg @ref LL_RCC_PLLM_DIV_46
AnnaBridge 146:22da6e220af6 4494 * @arg @ref LL_RCC_PLLM_DIV_47
AnnaBridge 146:22da6e220af6 4495 * @arg @ref LL_RCC_PLLM_DIV_48
AnnaBridge 146:22da6e220af6 4496 * @arg @ref LL_RCC_PLLM_DIV_49
AnnaBridge 146:22da6e220af6 4497 * @arg @ref LL_RCC_PLLM_DIV_50
AnnaBridge 146:22da6e220af6 4498 * @arg @ref LL_RCC_PLLM_DIV_51
AnnaBridge 146:22da6e220af6 4499 * @arg @ref LL_RCC_PLLM_DIV_52
AnnaBridge 146:22da6e220af6 4500 * @arg @ref LL_RCC_PLLM_DIV_53
AnnaBridge 146:22da6e220af6 4501 * @arg @ref LL_RCC_PLLM_DIV_54
AnnaBridge 146:22da6e220af6 4502 * @arg @ref LL_RCC_PLLM_DIV_55
AnnaBridge 146:22da6e220af6 4503 * @arg @ref LL_RCC_PLLM_DIV_56
AnnaBridge 146:22da6e220af6 4504 * @arg @ref LL_RCC_PLLM_DIV_57
AnnaBridge 146:22da6e220af6 4505 * @arg @ref LL_RCC_PLLM_DIV_58
AnnaBridge 146:22da6e220af6 4506 * @arg @ref LL_RCC_PLLM_DIV_59
AnnaBridge 146:22da6e220af6 4507 * @arg @ref LL_RCC_PLLM_DIV_60
AnnaBridge 146:22da6e220af6 4508 * @arg @ref LL_RCC_PLLM_DIV_61
AnnaBridge 146:22da6e220af6 4509 * @arg @ref LL_RCC_PLLM_DIV_62
AnnaBridge 146:22da6e220af6 4510 * @arg @ref LL_RCC_PLLM_DIV_63
AnnaBridge 146:22da6e220af6 4511 * @param PLLN Between 50 and 432
AnnaBridge 146:22da6e220af6 4512 * @param PLLR This parameter can be one of the following values:
AnnaBridge 146:22da6e220af6 4513 * @arg @ref LL_RCC_PLLR_DIV_2
AnnaBridge 146:22da6e220af6 4514 * @arg @ref LL_RCC_PLLR_DIV_3
AnnaBridge 146:22da6e220af6 4515 * @arg @ref LL_RCC_PLLR_DIV_4
AnnaBridge 146:22da6e220af6 4516 * @arg @ref LL_RCC_PLLR_DIV_5
AnnaBridge 146:22da6e220af6 4517 * @arg @ref LL_RCC_PLLR_DIV_6
AnnaBridge 146:22da6e220af6 4518 * @arg @ref LL_RCC_PLLR_DIV_7
AnnaBridge 146:22da6e220af6 4519 * @retval None
AnnaBridge 146:22da6e220af6 4520 */
AnnaBridge 146:22da6e220af6 4521 __STATIC_INLINE void LL_RCC_PLL_ConfigDomain_DSI(uint32_t Source, uint32_t PLLM, uint32_t PLLN, uint32_t PLLR)
AnnaBridge 146:22da6e220af6 4522 {
AnnaBridge 146:22da6e220af6 4523 MODIFY_REG(RCC->PLLCFGR, RCC_PLLCFGR_PLLSRC | RCC_PLLCFGR_PLLM | RCC_PLLCFGR_PLLN | RCC_PLLCFGR_PLLR,
AnnaBridge 146:22da6e220af6 4524 Source | PLLM | PLLN << RCC_PLLCFGR_PLLN_Pos | PLLR);
AnnaBridge 146:22da6e220af6 4525 }
AnnaBridge 146:22da6e220af6 4526 #endif /* DSI */
AnnaBridge 146:22da6e220af6 4527
AnnaBridge 146:22da6e220af6 4528 #if defined(RCC_PLLR_I2S_CLKSOURCE_SUPPORT)
AnnaBridge 146:22da6e220af6 4529 /**
AnnaBridge 146:22da6e220af6 4530 * @brief Configure PLL used for I2S clock
AnnaBridge 146:22da6e220af6 4531 * @note PLL Source and PLLM Divider can be written only when PLL,
AnnaBridge 146:22da6e220af6 4532 * PLLI2S and PLLSAI are disabled
AnnaBridge 146:22da6e220af6 4533 * @note PLLN/PLLR can be written only when PLL is disabled
AnnaBridge 146:22da6e220af6 4534 * @note This can be selected for I2S
AnnaBridge 146:22da6e220af6 4535 * @rmtoll PLLCFGR PLLSRC LL_RCC_PLL_ConfigDomain_I2S\n
AnnaBridge 146:22da6e220af6 4536 * PLLCFGR PLLM LL_RCC_PLL_ConfigDomain_I2S\n
AnnaBridge 146:22da6e220af6 4537 * PLLCFGR PLLN LL_RCC_PLL_ConfigDomain_I2S\n
AnnaBridge 146:22da6e220af6 4538 * PLLCFGR PLLR LL_RCC_PLL_ConfigDomain_I2S
AnnaBridge 146:22da6e220af6 4539 * @param Source This parameter can be one of the following values:
AnnaBridge 146:22da6e220af6 4540 * @arg @ref LL_RCC_PLLSOURCE_HSI
AnnaBridge 146:22da6e220af6 4541 * @arg @ref LL_RCC_PLLSOURCE_HSE
AnnaBridge 146:22da6e220af6 4542 * @param PLLM This parameter can be one of the following values:
AnnaBridge 146:22da6e220af6 4543 * @arg @ref LL_RCC_PLLM_DIV_2
AnnaBridge 146:22da6e220af6 4544 * @arg @ref LL_RCC_PLLM_DIV_3
AnnaBridge 146:22da6e220af6 4545 * @arg @ref LL_RCC_PLLM_DIV_4
AnnaBridge 146:22da6e220af6 4546 * @arg @ref LL_RCC_PLLM_DIV_5
AnnaBridge 146:22da6e220af6 4547 * @arg @ref LL_RCC_PLLM_DIV_6
AnnaBridge 146:22da6e220af6 4548 * @arg @ref LL_RCC_PLLM_DIV_7
AnnaBridge 146:22da6e220af6 4549 * @arg @ref LL_RCC_PLLM_DIV_8
AnnaBridge 146:22da6e220af6 4550 * @arg @ref LL_RCC_PLLM_DIV_9
AnnaBridge 146:22da6e220af6 4551 * @arg @ref LL_RCC_PLLM_DIV_10
AnnaBridge 146:22da6e220af6 4552 * @arg @ref LL_RCC_PLLM_DIV_11
AnnaBridge 146:22da6e220af6 4553 * @arg @ref LL_RCC_PLLM_DIV_12
AnnaBridge 146:22da6e220af6 4554 * @arg @ref LL_RCC_PLLM_DIV_13
AnnaBridge 146:22da6e220af6 4555 * @arg @ref LL_RCC_PLLM_DIV_14
AnnaBridge 146:22da6e220af6 4556 * @arg @ref LL_RCC_PLLM_DIV_15
AnnaBridge 146:22da6e220af6 4557 * @arg @ref LL_RCC_PLLM_DIV_16
AnnaBridge 146:22da6e220af6 4558 * @arg @ref LL_RCC_PLLM_DIV_17
AnnaBridge 146:22da6e220af6 4559 * @arg @ref LL_RCC_PLLM_DIV_18
AnnaBridge 146:22da6e220af6 4560 * @arg @ref LL_RCC_PLLM_DIV_19
AnnaBridge 146:22da6e220af6 4561 * @arg @ref LL_RCC_PLLM_DIV_20
AnnaBridge 146:22da6e220af6 4562 * @arg @ref LL_RCC_PLLM_DIV_21
AnnaBridge 146:22da6e220af6 4563 * @arg @ref LL_RCC_PLLM_DIV_22
AnnaBridge 146:22da6e220af6 4564 * @arg @ref LL_RCC_PLLM_DIV_23
AnnaBridge 146:22da6e220af6 4565 * @arg @ref LL_RCC_PLLM_DIV_24
AnnaBridge 146:22da6e220af6 4566 * @arg @ref LL_RCC_PLLM_DIV_25
AnnaBridge 146:22da6e220af6 4567 * @arg @ref LL_RCC_PLLM_DIV_26
AnnaBridge 146:22da6e220af6 4568 * @arg @ref LL_RCC_PLLM_DIV_27
AnnaBridge 146:22da6e220af6 4569 * @arg @ref LL_RCC_PLLM_DIV_28
AnnaBridge 146:22da6e220af6 4570 * @arg @ref LL_RCC_PLLM_DIV_29
AnnaBridge 146:22da6e220af6 4571 * @arg @ref LL_RCC_PLLM_DIV_30
AnnaBridge 146:22da6e220af6 4572 * @arg @ref LL_RCC_PLLM_DIV_31
AnnaBridge 146:22da6e220af6 4573 * @arg @ref LL_RCC_PLLM_DIV_32
AnnaBridge 146:22da6e220af6 4574 * @arg @ref LL_RCC_PLLM_DIV_33
AnnaBridge 146:22da6e220af6 4575 * @arg @ref LL_RCC_PLLM_DIV_34
AnnaBridge 146:22da6e220af6 4576 * @arg @ref LL_RCC_PLLM_DIV_35
AnnaBridge 146:22da6e220af6 4577 * @arg @ref LL_RCC_PLLM_DIV_36
AnnaBridge 146:22da6e220af6 4578 * @arg @ref LL_RCC_PLLM_DIV_37
AnnaBridge 146:22da6e220af6 4579 * @arg @ref LL_RCC_PLLM_DIV_38
AnnaBridge 146:22da6e220af6 4580 * @arg @ref LL_RCC_PLLM_DIV_39
AnnaBridge 146:22da6e220af6 4581 * @arg @ref LL_RCC_PLLM_DIV_40
AnnaBridge 146:22da6e220af6 4582 * @arg @ref LL_RCC_PLLM_DIV_41
AnnaBridge 146:22da6e220af6 4583 * @arg @ref LL_RCC_PLLM_DIV_42
AnnaBridge 146:22da6e220af6 4584 * @arg @ref LL_RCC_PLLM_DIV_43
AnnaBridge 146:22da6e220af6 4585 * @arg @ref LL_RCC_PLLM_DIV_44
AnnaBridge 146:22da6e220af6 4586 * @arg @ref LL_RCC_PLLM_DIV_45
AnnaBridge 146:22da6e220af6 4587 * @arg @ref LL_RCC_PLLM_DIV_46
AnnaBridge 146:22da6e220af6 4588 * @arg @ref LL_RCC_PLLM_DIV_47
AnnaBridge 146:22da6e220af6 4589 * @arg @ref LL_RCC_PLLM_DIV_48
AnnaBridge 146:22da6e220af6 4590 * @arg @ref LL_RCC_PLLM_DIV_49
AnnaBridge 146:22da6e220af6 4591 * @arg @ref LL_RCC_PLLM_DIV_50
AnnaBridge 146:22da6e220af6 4592 * @arg @ref LL_RCC_PLLM_DIV_51
AnnaBridge 146:22da6e220af6 4593 * @arg @ref LL_RCC_PLLM_DIV_52
AnnaBridge 146:22da6e220af6 4594 * @arg @ref LL_RCC_PLLM_DIV_53
AnnaBridge 146:22da6e220af6 4595 * @arg @ref LL_RCC_PLLM_DIV_54
AnnaBridge 146:22da6e220af6 4596 * @arg @ref LL_RCC_PLLM_DIV_55
AnnaBridge 146:22da6e220af6 4597 * @arg @ref LL_RCC_PLLM_DIV_56
AnnaBridge 146:22da6e220af6 4598 * @arg @ref LL_RCC_PLLM_DIV_57
AnnaBridge 146:22da6e220af6 4599 * @arg @ref LL_RCC_PLLM_DIV_58
AnnaBridge 146:22da6e220af6 4600 * @arg @ref LL_RCC_PLLM_DIV_59
AnnaBridge 146:22da6e220af6 4601 * @arg @ref LL_RCC_PLLM_DIV_60
AnnaBridge 146:22da6e220af6 4602 * @arg @ref LL_RCC_PLLM_DIV_61
AnnaBridge 146:22da6e220af6 4603 * @arg @ref LL_RCC_PLLM_DIV_62
AnnaBridge 146:22da6e220af6 4604 * @arg @ref LL_RCC_PLLM_DIV_63
AnnaBridge 146:22da6e220af6 4605 * @param PLLN Between 50 and 432
AnnaBridge 146:22da6e220af6 4606 * @param PLLR This parameter can be one of the following values:
AnnaBridge 146:22da6e220af6 4607 * @arg @ref LL_RCC_PLLR_DIV_2
AnnaBridge 146:22da6e220af6 4608 * @arg @ref LL_RCC_PLLR_DIV_3
AnnaBridge 146:22da6e220af6 4609 * @arg @ref LL_RCC_PLLR_DIV_4
AnnaBridge 146:22da6e220af6 4610 * @arg @ref LL_RCC_PLLR_DIV_5
AnnaBridge 146:22da6e220af6 4611 * @arg @ref LL_RCC_PLLR_DIV_6
AnnaBridge 146:22da6e220af6 4612 * @arg @ref LL_RCC_PLLR_DIV_7
AnnaBridge 146:22da6e220af6 4613 * @retval None
AnnaBridge 146:22da6e220af6 4614 */
AnnaBridge 146:22da6e220af6 4615 __STATIC_INLINE void LL_RCC_PLL_ConfigDomain_I2S(uint32_t Source, uint32_t PLLM, uint32_t PLLN, uint32_t PLLR)
AnnaBridge 146:22da6e220af6 4616 {
AnnaBridge 146:22da6e220af6 4617 MODIFY_REG(RCC->PLLCFGR, RCC_PLLCFGR_PLLSRC | RCC_PLLCFGR_PLLM | RCC_PLLCFGR_PLLN | RCC_PLLCFGR_PLLR,
AnnaBridge 146:22da6e220af6 4618 Source | PLLM | PLLN << RCC_PLLCFGR_PLLN_Pos | PLLR);
AnnaBridge 146:22da6e220af6 4619 }
AnnaBridge 146:22da6e220af6 4620 #endif /* RCC_PLLR_I2S_CLKSOURCE_SUPPORT */
AnnaBridge 146:22da6e220af6 4621
AnnaBridge 146:22da6e220af6 4622 #if defined(SPDIFRX)
AnnaBridge 146:22da6e220af6 4623 /**
AnnaBridge 146:22da6e220af6 4624 * @brief Configure PLL used for SPDIFRX clock
AnnaBridge 146:22da6e220af6 4625 * @note PLL Source and PLLM Divider can be written only when PLL,
AnnaBridge 146:22da6e220af6 4626 * PLLI2S and PLLSAI are disabled
AnnaBridge 146:22da6e220af6 4627 * @note PLLN/PLLR can be written only when PLL is disabled
AnnaBridge 146:22da6e220af6 4628 * @note This can be selected for SPDIFRX
AnnaBridge 146:22da6e220af6 4629 * @rmtoll PLLCFGR PLLSRC LL_RCC_PLL_ConfigDomain_SPDIFRX\n
AnnaBridge 146:22da6e220af6 4630 * PLLCFGR PLLM LL_RCC_PLL_ConfigDomain_SPDIFRX\n
AnnaBridge 146:22da6e220af6 4631 * PLLCFGR PLLN LL_RCC_PLL_ConfigDomain_SPDIFRX\n
AnnaBridge 146:22da6e220af6 4632 * PLLCFGR PLLR LL_RCC_PLL_ConfigDomain_SPDIFRX
AnnaBridge 146:22da6e220af6 4633 * @param Source This parameter can be one of the following values:
AnnaBridge 146:22da6e220af6 4634 * @arg @ref LL_RCC_PLLSOURCE_HSI
AnnaBridge 146:22da6e220af6 4635 * @arg @ref LL_RCC_PLLSOURCE_HSE
AnnaBridge 146:22da6e220af6 4636 * @param PLLM This parameter can be one of the following values:
AnnaBridge 146:22da6e220af6 4637 * @arg @ref LL_RCC_PLLM_DIV_2
AnnaBridge 146:22da6e220af6 4638 * @arg @ref LL_RCC_PLLM_DIV_3
AnnaBridge 146:22da6e220af6 4639 * @arg @ref LL_RCC_PLLM_DIV_4
AnnaBridge 146:22da6e220af6 4640 * @arg @ref LL_RCC_PLLM_DIV_5
AnnaBridge 146:22da6e220af6 4641 * @arg @ref LL_RCC_PLLM_DIV_6
AnnaBridge 146:22da6e220af6 4642 * @arg @ref LL_RCC_PLLM_DIV_7
AnnaBridge 146:22da6e220af6 4643 * @arg @ref LL_RCC_PLLM_DIV_8
AnnaBridge 146:22da6e220af6 4644 * @arg @ref LL_RCC_PLLM_DIV_9
AnnaBridge 146:22da6e220af6 4645 * @arg @ref LL_RCC_PLLM_DIV_10
AnnaBridge 146:22da6e220af6 4646 * @arg @ref LL_RCC_PLLM_DIV_11
AnnaBridge 146:22da6e220af6 4647 * @arg @ref LL_RCC_PLLM_DIV_12
AnnaBridge 146:22da6e220af6 4648 * @arg @ref LL_RCC_PLLM_DIV_13
AnnaBridge 146:22da6e220af6 4649 * @arg @ref LL_RCC_PLLM_DIV_14
AnnaBridge 146:22da6e220af6 4650 * @arg @ref LL_RCC_PLLM_DIV_15
AnnaBridge 146:22da6e220af6 4651 * @arg @ref LL_RCC_PLLM_DIV_16
AnnaBridge 146:22da6e220af6 4652 * @arg @ref LL_RCC_PLLM_DIV_17
AnnaBridge 146:22da6e220af6 4653 * @arg @ref LL_RCC_PLLM_DIV_18
AnnaBridge 146:22da6e220af6 4654 * @arg @ref LL_RCC_PLLM_DIV_19
AnnaBridge 146:22da6e220af6 4655 * @arg @ref LL_RCC_PLLM_DIV_20
AnnaBridge 146:22da6e220af6 4656 * @arg @ref LL_RCC_PLLM_DIV_21
AnnaBridge 146:22da6e220af6 4657 * @arg @ref LL_RCC_PLLM_DIV_22
AnnaBridge 146:22da6e220af6 4658 * @arg @ref LL_RCC_PLLM_DIV_23
AnnaBridge 146:22da6e220af6 4659 * @arg @ref LL_RCC_PLLM_DIV_24
AnnaBridge 146:22da6e220af6 4660 * @arg @ref LL_RCC_PLLM_DIV_25
AnnaBridge 146:22da6e220af6 4661 * @arg @ref LL_RCC_PLLM_DIV_26
AnnaBridge 146:22da6e220af6 4662 * @arg @ref LL_RCC_PLLM_DIV_27
AnnaBridge 146:22da6e220af6 4663 * @arg @ref LL_RCC_PLLM_DIV_28
AnnaBridge 146:22da6e220af6 4664 * @arg @ref LL_RCC_PLLM_DIV_29
AnnaBridge 146:22da6e220af6 4665 * @arg @ref LL_RCC_PLLM_DIV_30
AnnaBridge 146:22da6e220af6 4666 * @arg @ref LL_RCC_PLLM_DIV_31
AnnaBridge 146:22da6e220af6 4667 * @arg @ref LL_RCC_PLLM_DIV_32
AnnaBridge 146:22da6e220af6 4668 * @arg @ref LL_RCC_PLLM_DIV_33
AnnaBridge 146:22da6e220af6 4669 * @arg @ref LL_RCC_PLLM_DIV_34
AnnaBridge 146:22da6e220af6 4670 * @arg @ref LL_RCC_PLLM_DIV_35
AnnaBridge 146:22da6e220af6 4671 * @arg @ref LL_RCC_PLLM_DIV_36
AnnaBridge 146:22da6e220af6 4672 * @arg @ref LL_RCC_PLLM_DIV_37
AnnaBridge 146:22da6e220af6 4673 * @arg @ref LL_RCC_PLLM_DIV_38
AnnaBridge 146:22da6e220af6 4674 * @arg @ref LL_RCC_PLLM_DIV_39
AnnaBridge 146:22da6e220af6 4675 * @arg @ref LL_RCC_PLLM_DIV_40
AnnaBridge 146:22da6e220af6 4676 * @arg @ref LL_RCC_PLLM_DIV_41
AnnaBridge 146:22da6e220af6 4677 * @arg @ref LL_RCC_PLLM_DIV_42
AnnaBridge 146:22da6e220af6 4678 * @arg @ref LL_RCC_PLLM_DIV_43
AnnaBridge 146:22da6e220af6 4679 * @arg @ref LL_RCC_PLLM_DIV_44
AnnaBridge 146:22da6e220af6 4680 * @arg @ref LL_RCC_PLLM_DIV_45
AnnaBridge 146:22da6e220af6 4681 * @arg @ref LL_RCC_PLLM_DIV_46
AnnaBridge 146:22da6e220af6 4682 * @arg @ref LL_RCC_PLLM_DIV_47
AnnaBridge 146:22da6e220af6 4683 * @arg @ref LL_RCC_PLLM_DIV_48
AnnaBridge 146:22da6e220af6 4684 * @arg @ref LL_RCC_PLLM_DIV_49
AnnaBridge 146:22da6e220af6 4685 * @arg @ref LL_RCC_PLLM_DIV_50
AnnaBridge 146:22da6e220af6 4686 * @arg @ref LL_RCC_PLLM_DIV_51
AnnaBridge 146:22da6e220af6 4687 * @arg @ref LL_RCC_PLLM_DIV_52
AnnaBridge 146:22da6e220af6 4688 * @arg @ref LL_RCC_PLLM_DIV_53
AnnaBridge 146:22da6e220af6 4689 * @arg @ref LL_RCC_PLLM_DIV_54
AnnaBridge 146:22da6e220af6 4690 * @arg @ref LL_RCC_PLLM_DIV_55
AnnaBridge 146:22da6e220af6 4691 * @arg @ref LL_RCC_PLLM_DIV_56
AnnaBridge 146:22da6e220af6 4692 * @arg @ref LL_RCC_PLLM_DIV_57
AnnaBridge 146:22da6e220af6 4693 * @arg @ref LL_RCC_PLLM_DIV_58
AnnaBridge 146:22da6e220af6 4694 * @arg @ref LL_RCC_PLLM_DIV_59
AnnaBridge 146:22da6e220af6 4695 * @arg @ref LL_RCC_PLLM_DIV_60
AnnaBridge 146:22da6e220af6 4696 * @arg @ref LL_RCC_PLLM_DIV_61
AnnaBridge 146:22da6e220af6 4697 * @arg @ref LL_RCC_PLLM_DIV_62
AnnaBridge 146:22da6e220af6 4698 * @arg @ref LL_RCC_PLLM_DIV_63
AnnaBridge 146:22da6e220af6 4699 * @param PLLN Between 50 and 432
AnnaBridge 146:22da6e220af6 4700 * @param PLLR This parameter can be one of the following values:
AnnaBridge 146:22da6e220af6 4701 * @arg @ref LL_RCC_PLLR_DIV_2
AnnaBridge 146:22da6e220af6 4702 * @arg @ref LL_RCC_PLLR_DIV_3
AnnaBridge 146:22da6e220af6 4703 * @arg @ref LL_RCC_PLLR_DIV_4
AnnaBridge 146:22da6e220af6 4704 * @arg @ref LL_RCC_PLLR_DIV_5
AnnaBridge 146:22da6e220af6 4705 * @arg @ref LL_RCC_PLLR_DIV_6
AnnaBridge 146:22da6e220af6 4706 * @arg @ref LL_RCC_PLLR_DIV_7
AnnaBridge 146:22da6e220af6 4707 * @retval None
AnnaBridge 146:22da6e220af6 4708 */
AnnaBridge 146:22da6e220af6 4709 __STATIC_INLINE void LL_RCC_PLL_ConfigDomain_SPDIFRX(uint32_t Source, uint32_t PLLM, uint32_t PLLN, uint32_t PLLR)
AnnaBridge 146:22da6e220af6 4710 {
AnnaBridge 146:22da6e220af6 4711 MODIFY_REG(RCC->PLLCFGR, RCC_PLLCFGR_PLLSRC | RCC_PLLCFGR_PLLM | RCC_PLLCFGR_PLLN | RCC_PLLCFGR_PLLR,
AnnaBridge 146:22da6e220af6 4712 Source | PLLM | PLLN << RCC_PLLCFGR_PLLN_Pos | PLLR);
AnnaBridge 146:22da6e220af6 4713 }
AnnaBridge 146:22da6e220af6 4714 #endif /* SPDIFRX */
AnnaBridge 146:22da6e220af6 4715
AnnaBridge 146:22da6e220af6 4716 #if defined(RCC_PLLCFGR_PLLR)
AnnaBridge 146:22da6e220af6 4717 #if defined(SAI1)
AnnaBridge 146:22da6e220af6 4718 /**
AnnaBridge 146:22da6e220af6 4719 * @brief Configure PLL used for SAI clock
AnnaBridge 146:22da6e220af6 4720 * @note PLL Source and PLLM Divider can be written only when PLL,
AnnaBridge 146:22da6e220af6 4721 * PLLI2S and PLLSAI are disabled
AnnaBridge 146:22da6e220af6 4722 * @note PLLN/PLLR can be written only when PLL is disabled
AnnaBridge 146:22da6e220af6 4723 * @note This can be selected for SAI
AnnaBridge 146:22da6e220af6 4724 * @rmtoll PLLCFGR PLLSRC LL_RCC_PLL_ConfigDomain_SAI\n
AnnaBridge 146:22da6e220af6 4725 * PLLCFGR PLLM LL_RCC_PLL_ConfigDomain_SAI\n
AnnaBridge 146:22da6e220af6 4726 * PLLCFGR PLLN LL_RCC_PLL_ConfigDomain_SAI\n
AnnaBridge 146:22da6e220af6 4727 * PLLCFGR PLLR LL_RCC_PLL_ConfigDomain_SAI\n
AnnaBridge 146:22da6e220af6 4728 * DCKCFGR PLLDIVR LL_RCC_PLL_ConfigDomain_SAI
AnnaBridge 146:22da6e220af6 4729 * @param Source This parameter can be one of the following values:
AnnaBridge 146:22da6e220af6 4730 * @arg @ref LL_RCC_PLLSOURCE_HSI
AnnaBridge 146:22da6e220af6 4731 * @arg @ref LL_RCC_PLLSOURCE_HSE
AnnaBridge 146:22da6e220af6 4732 * @param PLLM This parameter can be one of the following values:
AnnaBridge 146:22da6e220af6 4733 * @arg @ref LL_RCC_PLLM_DIV_2
AnnaBridge 146:22da6e220af6 4734 * @arg @ref LL_RCC_PLLM_DIV_3
AnnaBridge 146:22da6e220af6 4735 * @arg @ref LL_RCC_PLLM_DIV_4
AnnaBridge 146:22da6e220af6 4736 * @arg @ref LL_RCC_PLLM_DIV_5
AnnaBridge 146:22da6e220af6 4737 * @arg @ref LL_RCC_PLLM_DIV_6
AnnaBridge 146:22da6e220af6 4738 * @arg @ref LL_RCC_PLLM_DIV_7
AnnaBridge 146:22da6e220af6 4739 * @arg @ref LL_RCC_PLLM_DIV_8
AnnaBridge 146:22da6e220af6 4740 * @arg @ref LL_RCC_PLLM_DIV_9
AnnaBridge 146:22da6e220af6 4741 * @arg @ref LL_RCC_PLLM_DIV_10
AnnaBridge 146:22da6e220af6 4742 * @arg @ref LL_RCC_PLLM_DIV_11
AnnaBridge 146:22da6e220af6 4743 * @arg @ref LL_RCC_PLLM_DIV_12
AnnaBridge 146:22da6e220af6 4744 * @arg @ref LL_RCC_PLLM_DIV_13
AnnaBridge 146:22da6e220af6 4745 * @arg @ref LL_RCC_PLLM_DIV_14
AnnaBridge 146:22da6e220af6 4746 * @arg @ref LL_RCC_PLLM_DIV_15
AnnaBridge 146:22da6e220af6 4747 * @arg @ref LL_RCC_PLLM_DIV_16
AnnaBridge 146:22da6e220af6 4748 * @arg @ref LL_RCC_PLLM_DIV_17
AnnaBridge 146:22da6e220af6 4749 * @arg @ref LL_RCC_PLLM_DIV_18
AnnaBridge 146:22da6e220af6 4750 * @arg @ref LL_RCC_PLLM_DIV_19
AnnaBridge 146:22da6e220af6 4751 * @arg @ref LL_RCC_PLLM_DIV_20
AnnaBridge 146:22da6e220af6 4752 * @arg @ref LL_RCC_PLLM_DIV_21
AnnaBridge 146:22da6e220af6 4753 * @arg @ref LL_RCC_PLLM_DIV_22
AnnaBridge 146:22da6e220af6 4754 * @arg @ref LL_RCC_PLLM_DIV_23
AnnaBridge 146:22da6e220af6 4755 * @arg @ref LL_RCC_PLLM_DIV_24
AnnaBridge 146:22da6e220af6 4756 * @arg @ref LL_RCC_PLLM_DIV_25
AnnaBridge 146:22da6e220af6 4757 * @arg @ref LL_RCC_PLLM_DIV_26
AnnaBridge 146:22da6e220af6 4758 * @arg @ref LL_RCC_PLLM_DIV_27
AnnaBridge 146:22da6e220af6 4759 * @arg @ref LL_RCC_PLLM_DIV_28
AnnaBridge 146:22da6e220af6 4760 * @arg @ref LL_RCC_PLLM_DIV_29
AnnaBridge 146:22da6e220af6 4761 * @arg @ref LL_RCC_PLLM_DIV_30
AnnaBridge 146:22da6e220af6 4762 * @arg @ref LL_RCC_PLLM_DIV_31
AnnaBridge 146:22da6e220af6 4763 * @arg @ref LL_RCC_PLLM_DIV_32
AnnaBridge 146:22da6e220af6 4764 * @arg @ref LL_RCC_PLLM_DIV_33
AnnaBridge 146:22da6e220af6 4765 * @arg @ref LL_RCC_PLLM_DIV_34
AnnaBridge 146:22da6e220af6 4766 * @arg @ref LL_RCC_PLLM_DIV_35
AnnaBridge 146:22da6e220af6 4767 * @arg @ref LL_RCC_PLLM_DIV_36
AnnaBridge 146:22da6e220af6 4768 * @arg @ref LL_RCC_PLLM_DIV_37
AnnaBridge 146:22da6e220af6 4769 * @arg @ref LL_RCC_PLLM_DIV_38
AnnaBridge 146:22da6e220af6 4770 * @arg @ref LL_RCC_PLLM_DIV_39
AnnaBridge 146:22da6e220af6 4771 * @arg @ref LL_RCC_PLLM_DIV_40
AnnaBridge 146:22da6e220af6 4772 * @arg @ref LL_RCC_PLLM_DIV_41
AnnaBridge 146:22da6e220af6 4773 * @arg @ref LL_RCC_PLLM_DIV_42
AnnaBridge 146:22da6e220af6 4774 * @arg @ref LL_RCC_PLLM_DIV_43
AnnaBridge 146:22da6e220af6 4775 * @arg @ref LL_RCC_PLLM_DIV_44
AnnaBridge 146:22da6e220af6 4776 * @arg @ref LL_RCC_PLLM_DIV_45
AnnaBridge 146:22da6e220af6 4777 * @arg @ref LL_RCC_PLLM_DIV_46
AnnaBridge 146:22da6e220af6 4778 * @arg @ref LL_RCC_PLLM_DIV_47
AnnaBridge 146:22da6e220af6 4779 * @arg @ref LL_RCC_PLLM_DIV_48
AnnaBridge 146:22da6e220af6 4780 * @arg @ref LL_RCC_PLLM_DIV_49
AnnaBridge 146:22da6e220af6 4781 * @arg @ref LL_RCC_PLLM_DIV_50
AnnaBridge 146:22da6e220af6 4782 * @arg @ref LL_RCC_PLLM_DIV_51
AnnaBridge 146:22da6e220af6 4783 * @arg @ref LL_RCC_PLLM_DIV_52
AnnaBridge 146:22da6e220af6 4784 * @arg @ref LL_RCC_PLLM_DIV_53
AnnaBridge 146:22da6e220af6 4785 * @arg @ref LL_RCC_PLLM_DIV_54
AnnaBridge 146:22da6e220af6 4786 * @arg @ref LL_RCC_PLLM_DIV_55
AnnaBridge 146:22da6e220af6 4787 * @arg @ref LL_RCC_PLLM_DIV_56
AnnaBridge 146:22da6e220af6 4788 * @arg @ref LL_RCC_PLLM_DIV_57
AnnaBridge 146:22da6e220af6 4789 * @arg @ref LL_RCC_PLLM_DIV_58
AnnaBridge 146:22da6e220af6 4790 * @arg @ref LL_RCC_PLLM_DIV_59
AnnaBridge 146:22da6e220af6 4791 * @arg @ref LL_RCC_PLLM_DIV_60
AnnaBridge 146:22da6e220af6 4792 * @arg @ref LL_RCC_PLLM_DIV_61
AnnaBridge 146:22da6e220af6 4793 * @arg @ref LL_RCC_PLLM_DIV_62
AnnaBridge 146:22da6e220af6 4794 * @arg @ref LL_RCC_PLLM_DIV_63
AnnaBridge 146:22da6e220af6 4795 * @param PLLN Between 50 and 432
AnnaBridge 146:22da6e220af6 4796 * @param PLLR This parameter can be one of the following values:
AnnaBridge 146:22da6e220af6 4797 * @arg @ref LL_RCC_PLLR_DIV_2
AnnaBridge 146:22da6e220af6 4798 * @arg @ref LL_RCC_PLLR_DIV_3
AnnaBridge 146:22da6e220af6 4799 * @arg @ref LL_RCC_PLLR_DIV_4
AnnaBridge 146:22da6e220af6 4800 * @arg @ref LL_RCC_PLLR_DIV_5
AnnaBridge 146:22da6e220af6 4801 * @arg @ref LL_RCC_PLLR_DIV_6
AnnaBridge 146:22da6e220af6 4802 * @arg @ref LL_RCC_PLLR_DIV_7
AnnaBridge 146:22da6e220af6 4803 * @param PLLDIVR This parameter can be one of the following values:
AnnaBridge 146:22da6e220af6 4804 * @arg @ref LL_RCC_PLLDIVR_DIV_1 (*)
AnnaBridge 146:22da6e220af6 4805 * @arg @ref LL_RCC_PLLDIVR_DIV_2 (*)
AnnaBridge 146:22da6e220af6 4806 * @arg @ref LL_RCC_PLLDIVR_DIV_3 (*)
AnnaBridge 146:22da6e220af6 4807 * @arg @ref LL_RCC_PLLDIVR_DIV_4 (*)
AnnaBridge 146:22da6e220af6 4808 * @arg @ref LL_RCC_PLLDIVR_DIV_5 (*)
AnnaBridge 146:22da6e220af6 4809 * @arg @ref LL_RCC_PLLDIVR_DIV_6 (*)
AnnaBridge 146:22da6e220af6 4810 * @arg @ref LL_RCC_PLLDIVR_DIV_7 (*)
AnnaBridge 146:22da6e220af6 4811 * @arg @ref LL_RCC_PLLDIVR_DIV_8 (*)
AnnaBridge 146:22da6e220af6 4812 * @arg @ref LL_RCC_PLLDIVR_DIV_9 (*)
AnnaBridge 146:22da6e220af6 4813 * @arg @ref LL_RCC_PLLDIVR_DIV_10 (*)
AnnaBridge 146:22da6e220af6 4814 * @arg @ref LL_RCC_PLLDIVR_DIV_11 (*)
AnnaBridge 146:22da6e220af6 4815 * @arg @ref LL_RCC_PLLDIVR_DIV_12 (*)
AnnaBridge 146:22da6e220af6 4816 * @arg @ref LL_RCC_PLLDIVR_DIV_13 (*)
AnnaBridge 146:22da6e220af6 4817 * @arg @ref LL_RCC_PLLDIVR_DIV_14 (*)
AnnaBridge 146:22da6e220af6 4818 * @arg @ref LL_RCC_PLLDIVR_DIV_15 (*)
AnnaBridge 146:22da6e220af6 4819 * @arg @ref LL_RCC_PLLDIVR_DIV_16 (*)
AnnaBridge 146:22da6e220af6 4820 * @arg @ref LL_RCC_PLLDIVR_DIV_17 (*)
AnnaBridge 146:22da6e220af6 4821 * @arg @ref LL_RCC_PLLDIVR_DIV_18 (*)
AnnaBridge 146:22da6e220af6 4822 * @arg @ref LL_RCC_PLLDIVR_DIV_19 (*)
AnnaBridge 146:22da6e220af6 4823 * @arg @ref LL_RCC_PLLDIVR_DIV_20 (*)
AnnaBridge 146:22da6e220af6 4824 * @arg @ref LL_RCC_PLLDIVR_DIV_21 (*)
AnnaBridge 146:22da6e220af6 4825 * @arg @ref LL_RCC_PLLDIVR_DIV_22 (*)
AnnaBridge 146:22da6e220af6 4826 * @arg @ref LL_RCC_PLLDIVR_DIV_23 (*)
AnnaBridge 146:22da6e220af6 4827 * @arg @ref LL_RCC_PLLDIVR_DIV_24 (*)
AnnaBridge 146:22da6e220af6 4828 * @arg @ref LL_RCC_PLLDIVR_DIV_25 (*)
AnnaBridge 146:22da6e220af6 4829 * @arg @ref LL_RCC_PLLDIVR_DIV_26 (*)
AnnaBridge 146:22da6e220af6 4830 * @arg @ref LL_RCC_PLLDIVR_DIV_27 (*)
AnnaBridge 146:22da6e220af6 4831 * @arg @ref LL_RCC_PLLDIVR_DIV_28 (*)
AnnaBridge 146:22da6e220af6 4832 * @arg @ref LL_RCC_PLLDIVR_DIV_29 (*)
AnnaBridge 146:22da6e220af6 4833 * @arg @ref LL_RCC_PLLDIVR_DIV_30 (*)
AnnaBridge 146:22da6e220af6 4834 * @arg @ref LL_RCC_PLLDIVR_DIV_31 (*)
AnnaBridge 146:22da6e220af6 4835 *
AnnaBridge 146:22da6e220af6 4836 * (*) value not defined in all devices.
AnnaBridge 146:22da6e220af6 4837 * @retval None
AnnaBridge 146:22da6e220af6 4838 */
AnnaBridge 146:22da6e220af6 4839 #if defined(RCC_DCKCFGR_PLLDIVR)
AnnaBridge 146:22da6e220af6 4840 __STATIC_INLINE void LL_RCC_PLL_ConfigDomain_SAI(uint32_t Source, uint32_t PLLM, uint32_t PLLN, uint32_t PLLR, uint32_t PLLDIVR)
AnnaBridge 146:22da6e220af6 4841 #else
AnnaBridge 146:22da6e220af6 4842 __STATIC_INLINE void LL_RCC_PLL_ConfigDomain_SAI(uint32_t Source, uint32_t PLLM, uint32_t PLLN, uint32_t PLLR)
AnnaBridge 146:22da6e220af6 4843 #endif /* RCC_DCKCFGR_PLLDIVR */
AnnaBridge 146:22da6e220af6 4844 {
AnnaBridge 146:22da6e220af6 4845 MODIFY_REG(RCC->PLLCFGR, RCC_PLLCFGR_PLLSRC | RCC_PLLCFGR_PLLM | RCC_PLLCFGR_PLLN | RCC_PLLCFGR_PLLR,
AnnaBridge 146:22da6e220af6 4846 Source | PLLM | PLLN << RCC_PLLCFGR_PLLN_Pos | PLLR);
AnnaBridge 146:22da6e220af6 4847 #if defined(RCC_DCKCFGR_PLLDIVR)
AnnaBridge 146:22da6e220af6 4848 MODIFY_REG(RCC->DCKCFGR, RCC_DCKCFGR_PLLDIVR, PLLDIVR);
AnnaBridge 146:22da6e220af6 4849 #endif /* RCC_DCKCFGR_PLLDIVR */
AnnaBridge 146:22da6e220af6 4850 }
AnnaBridge 146:22da6e220af6 4851 #endif /* SAI1 */
AnnaBridge 146:22da6e220af6 4852 #endif /* RCC_PLLCFGR_PLLR */
AnnaBridge 146:22da6e220af6 4853
AnnaBridge 146:22da6e220af6 4854 /**
AnnaBridge 163:e59c8e839560 4855 * @brief Configure PLL clock source
AnnaBridge 163:e59c8e839560 4856 * @rmtoll PLLCFGR PLLSRC LL_RCC_PLL_SetMainSource
AnnaBridge 163:e59c8e839560 4857 * @param PLLSource This parameter can be one of the following values:
AnnaBridge 163:e59c8e839560 4858 * @arg @ref LL_RCC_PLLSOURCE_HSI
AnnaBridge 163:e59c8e839560 4859 * @arg @ref LL_RCC_PLLSOURCE_HSE
AnnaBridge 163:e59c8e839560 4860 * @retval None
AnnaBridge 163:e59c8e839560 4861 */
AnnaBridge 163:e59c8e839560 4862 __STATIC_INLINE void LL_RCC_PLL_SetMainSource(uint32_t PLLSource)
AnnaBridge 163:e59c8e839560 4863 {
AnnaBridge 163:e59c8e839560 4864 MODIFY_REG(RCC->PLLCFGR, RCC_PLLCFGR_PLLSRC, PLLSource);
AnnaBridge 163:e59c8e839560 4865 }
AnnaBridge 163:e59c8e839560 4866
AnnaBridge 163:e59c8e839560 4867 /**
AnnaBridge 163:e59c8e839560 4868 * @brief Get the oscillator used as PLL clock source.
AnnaBridge 163:e59c8e839560 4869 * @rmtoll PLLCFGR PLLSRC LL_RCC_PLL_GetMainSource
AnnaBridge 163:e59c8e839560 4870 * @retval Returned value can be one of the following values:
AnnaBridge 163:e59c8e839560 4871 * @arg @ref LL_RCC_PLLSOURCE_HSI
AnnaBridge 163:e59c8e839560 4872 * @arg @ref LL_RCC_PLLSOURCE_HSE
AnnaBridge 163:e59c8e839560 4873 */
AnnaBridge 163:e59c8e839560 4874 __STATIC_INLINE uint32_t LL_RCC_PLL_GetMainSource(void)
AnnaBridge 163:e59c8e839560 4875 {
AnnaBridge 163:e59c8e839560 4876 return (uint32_t)(READ_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLLSRC));
AnnaBridge 163:e59c8e839560 4877 }
AnnaBridge 163:e59c8e839560 4878
AnnaBridge 163:e59c8e839560 4879 /**
AnnaBridge 146:22da6e220af6 4880 * @brief Get Main PLL multiplication factor for VCO
AnnaBridge 146:22da6e220af6 4881 * @rmtoll PLLCFGR PLLN LL_RCC_PLL_GetN
AnnaBridge 146:22da6e220af6 4882 * @retval Between 50/192(*) and 432
AnnaBridge 146:22da6e220af6 4883 *
AnnaBridge 146:22da6e220af6 4884 * (*) value not defined in all devices.
AnnaBridge 146:22da6e220af6 4885 */
AnnaBridge 146:22da6e220af6 4886 __STATIC_INLINE uint32_t LL_RCC_PLL_GetN(void)
AnnaBridge 146:22da6e220af6 4887 {
AnnaBridge 146:22da6e220af6 4888 return (uint32_t)(READ_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLLN) >> RCC_PLLCFGR_PLLN_Pos);
AnnaBridge 146:22da6e220af6 4889 }
AnnaBridge 146:22da6e220af6 4890
AnnaBridge 146:22da6e220af6 4891 /**
AnnaBridge 146:22da6e220af6 4892 * @brief Get Main PLL division factor for PLLP
AnnaBridge 146:22da6e220af6 4893 * @rmtoll PLLCFGR PLLP LL_RCC_PLL_GetP
AnnaBridge 146:22da6e220af6 4894 * @retval Returned value can be one of the following values:
AnnaBridge 146:22da6e220af6 4895 * @arg @ref LL_RCC_PLLP_DIV_2
AnnaBridge 146:22da6e220af6 4896 * @arg @ref LL_RCC_PLLP_DIV_4
AnnaBridge 146:22da6e220af6 4897 * @arg @ref LL_RCC_PLLP_DIV_6
AnnaBridge 146:22da6e220af6 4898 * @arg @ref LL_RCC_PLLP_DIV_8
AnnaBridge 146:22da6e220af6 4899 */
AnnaBridge 146:22da6e220af6 4900 __STATIC_INLINE uint32_t LL_RCC_PLL_GetP(void)
AnnaBridge 146:22da6e220af6 4901 {
AnnaBridge 146:22da6e220af6 4902 return (uint32_t)(READ_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLLP));
AnnaBridge 146:22da6e220af6 4903 }
AnnaBridge 146:22da6e220af6 4904
AnnaBridge 146:22da6e220af6 4905 /**
AnnaBridge 146:22da6e220af6 4906 * @brief Get Main PLL division factor for PLLQ
AnnaBridge 146:22da6e220af6 4907 * @note used for PLL48MCLK selected for USB, RNG, SDIO (48 MHz clock)
AnnaBridge 146:22da6e220af6 4908 * @rmtoll PLLCFGR PLLQ LL_RCC_PLL_GetQ
AnnaBridge 146:22da6e220af6 4909 * @retval Returned value can be one of the following values:
AnnaBridge 146:22da6e220af6 4910 * @arg @ref LL_RCC_PLLQ_DIV_2
AnnaBridge 146:22da6e220af6 4911 * @arg @ref LL_RCC_PLLQ_DIV_3
AnnaBridge 146:22da6e220af6 4912 * @arg @ref LL_RCC_PLLQ_DIV_4
AnnaBridge 146:22da6e220af6 4913 * @arg @ref LL_RCC_PLLQ_DIV_5
AnnaBridge 146:22da6e220af6 4914 * @arg @ref LL_RCC_PLLQ_DIV_6
AnnaBridge 146:22da6e220af6 4915 * @arg @ref LL_RCC_PLLQ_DIV_7
AnnaBridge 146:22da6e220af6 4916 * @arg @ref LL_RCC_PLLQ_DIV_8
AnnaBridge 146:22da6e220af6 4917 * @arg @ref LL_RCC_PLLQ_DIV_9
AnnaBridge 146:22da6e220af6 4918 * @arg @ref LL_RCC_PLLQ_DIV_10
AnnaBridge 146:22da6e220af6 4919 * @arg @ref LL_RCC_PLLQ_DIV_11
AnnaBridge 146:22da6e220af6 4920 * @arg @ref LL_RCC_PLLQ_DIV_12
AnnaBridge 146:22da6e220af6 4921 * @arg @ref LL_RCC_PLLQ_DIV_13
AnnaBridge 146:22da6e220af6 4922 * @arg @ref LL_RCC_PLLQ_DIV_14
AnnaBridge 146:22da6e220af6 4923 * @arg @ref LL_RCC_PLLQ_DIV_15
AnnaBridge 146:22da6e220af6 4924 */
AnnaBridge 146:22da6e220af6 4925 __STATIC_INLINE uint32_t LL_RCC_PLL_GetQ(void)
AnnaBridge 146:22da6e220af6 4926 {
AnnaBridge 146:22da6e220af6 4927 return (uint32_t)(READ_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLLQ));
AnnaBridge 146:22da6e220af6 4928 }
AnnaBridge 146:22da6e220af6 4929
AnnaBridge 146:22da6e220af6 4930 #if defined(RCC_PLLCFGR_PLLR)
AnnaBridge 146:22da6e220af6 4931 /**
AnnaBridge 146:22da6e220af6 4932 * @brief Get Main PLL division factor for PLLR
AnnaBridge 146:22da6e220af6 4933 * @note used for PLLCLK (system clock)
AnnaBridge 146:22da6e220af6 4934 * @rmtoll PLLCFGR PLLR LL_RCC_PLL_GetR
AnnaBridge 146:22da6e220af6 4935 * @retval Returned value can be one of the following values:
AnnaBridge 146:22da6e220af6 4936 * @arg @ref LL_RCC_PLLR_DIV_2
AnnaBridge 146:22da6e220af6 4937 * @arg @ref LL_RCC_PLLR_DIV_3
AnnaBridge 146:22da6e220af6 4938 * @arg @ref LL_RCC_PLLR_DIV_4
AnnaBridge 146:22da6e220af6 4939 * @arg @ref LL_RCC_PLLR_DIV_5
AnnaBridge 146:22da6e220af6 4940 * @arg @ref LL_RCC_PLLR_DIV_6
AnnaBridge 146:22da6e220af6 4941 * @arg @ref LL_RCC_PLLR_DIV_7
AnnaBridge 146:22da6e220af6 4942 */
AnnaBridge 146:22da6e220af6 4943 __STATIC_INLINE uint32_t LL_RCC_PLL_GetR(void)
AnnaBridge 146:22da6e220af6 4944 {
AnnaBridge 146:22da6e220af6 4945 return (uint32_t)(READ_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLLR));
AnnaBridge 146:22da6e220af6 4946 }
AnnaBridge 146:22da6e220af6 4947 #endif /* RCC_PLLCFGR_PLLR */
AnnaBridge 146:22da6e220af6 4948
AnnaBridge 146:22da6e220af6 4949 #if defined(RCC_DCKCFGR_PLLDIVR)
AnnaBridge 146:22da6e220af6 4950 /**
AnnaBridge 146:22da6e220af6 4951 * @brief Get Main PLL division factor for PLLDIVR
AnnaBridge 146:22da6e220af6 4952 * @note used for PLLSAICLK (SAI1 and SAI2 clock)
AnnaBridge 146:22da6e220af6 4953 * @rmtoll DCKCFGR PLLDIVR LL_RCC_PLL_GetDIVR
AnnaBridge 146:22da6e220af6 4954 * @retval Returned value can be one of the following values:
AnnaBridge 146:22da6e220af6 4955 * @arg @ref LL_RCC_PLLDIVR_DIV_1
AnnaBridge 146:22da6e220af6 4956 * @arg @ref LL_RCC_PLLDIVR_DIV_2
AnnaBridge 146:22da6e220af6 4957 * @arg @ref LL_RCC_PLLDIVR_DIV_3
AnnaBridge 146:22da6e220af6 4958 * @arg @ref LL_RCC_PLLDIVR_DIV_4
AnnaBridge 146:22da6e220af6 4959 * @arg @ref LL_RCC_PLLDIVR_DIV_5
AnnaBridge 146:22da6e220af6 4960 * @arg @ref LL_RCC_PLLDIVR_DIV_6
AnnaBridge 146:22da6e220af6 4961 * @arg @ref LL_RCC_PLLDIVR_DIV_7
AnnaBridge 146:22da6e220af6 4962 * @arg @ref LL_RCC_PLLDIVR_DIV_8
AnnaBridge 146:22da6e220af6 4963 * @arg @ref LL_RCC_PLLDIVR_DIV_9
AnnaBridge 146:22da6e220af6 4964 * @arg @ref LL_RCC_PLLDIVR_DIV_10
AnnaBridge 146:22da6e220af6 4965 * @arg @ref LL_RCC_PLLDIVR_DIV_11
AnnaBridge 146:22da6e220af6 4966 * @arg @ref LL_RCC_PLLDIVR_DIV_12
AnnaBridge 146:22da6e220af6 4967 * @arg @ref LL_RCC_PLLDIVR_DIV_13
AnnaBridge 146:22da6e220af6 4968 * @arg @ref LL_RCC_PLLDIVR_DIV_14
AnnaBridge 146:22da6e220af6 4969 * @arg @ref LL_RCC_PLLDIVR_DIV_15
AnnaBridge 146:22da6e220af6 4970 * @arg @ref LL_RCC_PLLDIVR_DIV_16
AnnaBridge 146:22da6e220af6 4971 * @arg @ref LL_RCC_PLLDIVR_DIV_17
AnnaBridge 146:22da6e220af6 4972 * @arg @ref LL_RCC_PLLDIVR_DIV_18
AnnaBridge 146:22da6e220af6 4973 * @arg @ref LL_RCC_PLLDIVR_DIV_19
AnnaBridge 146:22da6e220af6 4974 * @arg @ref LL_RCC_PLLDIVR_DIV_20
AnnaBridge 146:22da6e220af6 4975 * @arg @ref LL_RCC_PLLDIVR_DIV_21
AnnaBridge 146:22da6e220af6 4976 * @arg @ref LL_RCC_PLLDIVR_DIV_22
AnnaBridge 146:22da6e220af6 4977 * @arg @ref LL_RCC_PLLDIVR_DIV_23
AnnaBridge 146:22da6e220af6 4978 * @arg @ref LL_RCC_PLLDIVR_DIV_24
AnnaBridge 146:22da6e220af6 4979 * @arg @ref LL_RCC_PLLDIVR_DIV_25
AnnaBridge 146:22da6e220af6 4980 * @arg @ref LL_RCC_PLLDIVR_DIV_26
AnnaBridge 146:22da6e220af6 4981 * @arg @ref LL_RCC_PLLDIVR_DIV_27
AnnaBridge 146:22da6e220af6 4982 * @arg @ref LL_RCC_PLLDIVR_DIV_28
AnnaBridge 146:22da6e220af6 4983 * @arg @ref LL_RCC_PLLDIVR_DIV_29
AnnaBridge 146:22da6e220af6 4984 * @arg @ref LL_RCC_PLLDIVR_DIV_30
AnnaBridge 146:22da6e220af6 4985 * @arg @ref LL_RCC_PLLDIVR_DIV_31
AnnaBridge 146:22da6e220af6 4986 */
AnnaBridge 146:22da6e220af6 4987 __STATIC_INLINE uint32_t LL_RCC_PLL_GetDIVR(void)
AnnaBridge 146:22da6e220af6 4988 {
AnnaBridge 146:22da6e220af6 4989 return (uint32_t)(READ_BIT(RCC->DCKCFGR, RCC_DCKCFGR_PLLDIVR));
AnnaBridge 146:22da6e220af6 4990 }
AnnaBridge 146:22da6e220af6 4991 #endif /* RCC_DCKCFGR_PLLDIVR */
AnnaBridge 146:22da6e220af6 4992
AnnaBridge 146:22da6e220af6 4993 /**
AnnaBridge 146:22da6e220af6 4994 * @brief Get Division factor for the main PLL and other PLL
AnnaBridge 146:22da6e220af6 4995 * @rmtoll PLLCFGR PLLM LL_RCC_PLL_GetDivider
AnnaBridge 146:22da6e220af6 4996 * @retval Returned value can be one of the following values:
AnnaBridge 146:22da6e220af6 4997 * @arg @ref LL_RCC_PLLM_DIV_2
AnnaBridge 146:22da6e220af6 4998 * @arg @ref LL_RCC_PLLM_DIV_3
AnnaBridge 146:22da6e220af6 4999 * @arg @ref LL_RCC_PLLM_DIV_4
AnnaBridge 146:22da6e220af6 5000 * @arg @ref LL_RCC_PLLM_DIV_5
AnnaBridge 146:22da6e220af6 5001 * @arg @ref LL_RCC_PLLM_DIV_6
AnnaBridge 146:22da6e220af6 5002 * @arg @ref LL_RCC_PLLM_DIV_7
AnnaBridge 146:22da6e220af6 5003 * @arg @ref LL_RCC_PLLM_DIV_8
AnnaBridge 146:22da6e220af6 5004 * @arg @ref LL_RCC_PLLM_DIV_9
AnnaBridge 146:22da6e220af6 5005 * @arg @ref LL_RCC_PLLM_DIV_10
AnnaBridge 146:22da6e220af6 5006 * @arg @ref LL_RCC_PLLM_DIV_11
AnnaBridge 146:22da6e220af6 5007 * @arg @ref LL_RCC_PLLM_DIV_12
AnnaBridge 146:22da6e220af6 5008 * @arg @ref LL_RCC_PLLM_DIV_13
AnnaBridge 146:22da6e220af6 5009 * @arg @ref LL_RCC_PLLM_DIV_14
AnnaBridge 146:22da6e220af6 5010 * @arg @ref LL_RCC_PLLM_DIV_15
AnnaBridge 146:22da6e220af6 5011 * @arg @ref LL_RCC_PLLM_DIV_16
AnnaBridge 146:22da6e220af6 5012 * @arg @ref LL_RCC_PLLM_DIV_17
AnnaBridge 146:22da6e220af6 5013 * @arg @ref LL_RCC_PLLM_DIV_18
AnnaBridge 146:22da6e220af6 5014 * @arg @ref LL_RCC_PLLM_DIV_19
AnnaBridge 146:22da6e220af6 5015 * @arg @ref LL_RCC_PLLM_DIV_20
AnnaBridge 146:22da6e220af6 5016 * @arg @ref LL_RCC_PLLM_DIV_21
AnnaBridge 146:22da6e220af6 5017 * @arg @ref LL_RCC_PLLM_DIV_22
AnnaBridge 146:22da6e220af6 5018 * @arg @ref LL_RCC_PLLM_DIV_23
AnnaBridge 146:22da6e220af6 5019 * @arg @ref LL_RCC_PLLM_DIV_24
AnnaBridge 146:22da6e220af6 5020 * @arg @ref LL_RCC_PLLM_DIV_25
AnnaBridge 146:22da6e220af6 5021 * @arg @ref LL_RCC_PLLM_DIV_26
AnnaBridge 146:22da6e220af6 5022 * @arg @ref LL_RCC_PLLM_DIV_27
AnnaBridge 146:22da6e220af6 5023 * @arg @ref LL_RCC_PLLM_DIV_28
AnnaBridge 146:22da6e220af6 5024 * @arg @ref LL_RCC_PLLM_DIV_29
AnnaBridge 146:22da6e220af6 5025 * @arg @ref LL_RCC_PLLM_DIV_30
AnnaBridge 146:22da6e220af6 5026 * @arg @ref LL_RCC_PLLM_DIV_31
AnnaBridge 146:22da6e220af6 5027 * @arg @ref LL_RCC_PLLM_DIV_32
AnnaBridge 146:22da6e220af6 5028 * @arg @ref LL_RCC_PLLM_DIV_33
AnnaBridge 146:22da6e220af6 5029 * @arg @ref LL_RCC_PLLM_DIV_34
AnnaBridge 146:22da6e220af6 5030 * @arg @ref LL_RCC_PLLM_DIV_35
AnnaBridge 146:22da6e220af6 5031 * @arg @ref LL_RCC_PLLM_DIV_36
AnnaBridge 146:22da6e220af6 5032 * @arg @ref LL_RCC_PLLM_DIV_37
AnnaBridge 146:22da6e220af6 5033 * @arg @ref LL_RCC_PLLM_DIV_38
AnnaBridge 146:22da6e220af6 5034 * @arg @ref LL_RCC_PLLM_DIV_39
AnnaBridge 146:22da6e220af6 5035 * @arg @ref LL_RCC_PLLM_DIV_40
AnnaBridge 146:22da6e220af6 5036 * @arg @ref LL_RCC_PLLM_DIV_41
AnnaBridge 146:22da6e220af6 5037 * @arg @ref LL_RCC_PLLM_DIV_42
AnnaBridge 146:22da6e220af6 5038 * @arg @ref LL_RCC_PLLM_DIV_43
AnnaBridge 146:22da6e220af6 5039 * @arg @ref LL_RCC_PLLM_DIV_44
AnnaBridge 146:22da6e220af6 5040 * @arg @ref LL_RCC_PLLM_DIV_45
AnnaBridge 146:22da6e220af6 5041 * @arg @ref LL_RCC_PLLM_DIV_46
AnnaBridge 146:22da6e220af6 5042 * @arg @ref LL_RCC_PLLM_DIV_47
AnnaBridge 146:22da6e220af6 5043 * @arg @ref LL_RCC_PLLM_DIV_48
AnnaBridge 146:22da6e220af6 5044 * @arg @ref LL_RCC_PLLM_DIV_49
AnnaBridge 146:22da6e220af6 5045 * @arg @ref LL_RCC_PLLM_DIV_50
AnnaBridge 146:22da6e220af6 5046 * @arg @ref LL_RCC_PLLM_DIV_51
AnnaBridge 146:22da6e220af6 5047 * @arg @ref LL_RCC_PLLM_DIV_52
AnnaBridge 146:22da6e220af6 5048 * @arg @ref LL_RCC_PLLM_DIV_53
AnnaBridge 146:22da6e220af6 5049 * @arg @ref LL_RCC_PLLM_DIV_54
AnnaBridge 146:22da6e220af6 5050 * @arg @ref LL_RCC_PLLM_DIV_55
AnnaBridge 146:22da6e220af6 5051 * @arg @ref LL_RCC_PLLM_DIV_56
AnnaBridge 146:22da6e220af6 5052 * @arg @ref LL_RCC_PLLM_DIV_57
AnnaBridge 146:22da6e220af6 5053 * @arg @ref LL_RCC_PLLM_DIV_58
AnnaBridge 146:22da6e220af6 5054 * @arg @ref LL_RCC_PLLM_DIV_59
AnnaBridge 146:22da6e220af6 5055 * @arg @ref LL_RCC_PLLM_DIV_60
AnnaBridge 146:22da6e220af6 5056 * @arg @ref LL_RCC_PLLM_DIV_61
AnnaBridge 146:22da6e220af6 5057 * @arg @ref LL_RCC_PLLM_DIV_62
AnnaBridge 146:22da6e220af6 5058 * @arg @ref LL_RCC_PLLM_DIV_63
AnnaBridge 146:22da6e220af6 5059 */
AnnaBridge 146:22da6e220af6 5060 __STATIC_INLINE uint32_t LL_RCC_PLL_GetDivider(void)
AnnaBridge 146:22da6e220af6 5061 {
AnnaBridge 146:22da6e220af6 5062 return (uint32_t)(READ_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLLM));
AnnaBridge 146:22da6e220af6 5063 }
AnnaBridge 146:22da6e220af6 5064
AnnaBridge 146:22da6e220af6 5065 /**
AnnaBridge 146:22da6e220af6 5066 * @brief Configure Spread Spectrum used for PLL
AnnaBridge 146:22da6e220af6 5067 * @note These bits must be written before enabling PLL
AnnaBridge 146:22da6e220af6 5068 * @rmtoll SSCGR MODPER LL_RCC_PLL_ConfigSpreadSpectrum\n
AnnaBridge 146:22da6e220af6 5069 * SSCGR INCSTEP LL_RCC_PLL_ConfigSpreadSpectrum\n
AnnaBridge 146:22da6e220af6 5070 * SSCGR SPREADSEL LL_RCC_PLL_ConfigSpreadSpectrum
AnnaBridge 146:22da6e220af6 5071 * @param Mod Between Min_Data=0 and Max_Data=8191
AnnaBridge 146:22da6e220af6 5072 * @param Inc Between Min_Data=0 and Max_Data=32767
AnnaBridge 146:22da6e220af6 5073 * @param Sel This parameter can be one of the following values:
AnnaBridge 146:22da6e220af6 5074 * @arg @ref LL_RCC_SPREAD_SELECT_CENTER
AnnaBridge 146:22da6e220af6 5075 * @arg @ref LL_RCC_SPREAD_SELECT_DOWN
AnnaBridge 146:22da6e220af6 5076 * @retval None
AnnaBridge 146:22da6e220af6 5077 */
AnnaBridge 146:22da6e220af6 5078 __STATIC_INLINE void LL_RCC_PLL_ConfigSpreadSpectrum(uint32_t Mod, uint32_t Inc, uint32_t Sel)
AnnaBridge 146:22da6e220af6 5079 {
AnnaBridge 146:22da6e220af6 5080 MODIFY_REG(RCC->SSCGR, RCC_SSCGR_MODPER | RCC_SSCGR_INCSTEP | RCC_SSCGR_SPREADSEL, Mod | (Inc << RCC_SSCGR_INCSTEP_Pos) | Sel);
AnnaBridge 146:22da6e220af6 5081 }
AnnaBridge 146:22da6e220af6 5082
AnnaBridge 146:22da6e220af6 5083 /**
AnnaBridge 146:22da6e220af6 5084 * @brief Get Spread Spectrum Modulation Period for PLL
AnnaBridge 146:22da6e220af6 5085 * @rmtoll SSCGR MODPER LL_RCC_PLL_GetPeriodModulation
AnnaBridge 146:22da6e220af6 5086 * @retval Between Min_Data=0 and Max_Data=8191
AnnaBridge 146:22da6e220af6 5087 */
AnnaBridge 146:22da6e220af6 5088 __STATIC_INLINE uint32_t LL_RCC_PLL_GetPeriodModulation(void)
AnnaBridge 146:22da6e220af6 5089 {
AnnaBridge 146:22da6e220af6 5090 return (uint32_t)(READ_BIT(RCC->SSCGR, RCC_SSCGR_MODPER));
AnnaBridge 146:22da6e220af6 5091 }
AnnaBridge 146:22da6e220af6 5092
AnnaBridge 146:22da6e220af6 5093 /**
AnnaBridge 146:22da6e220af6 5094 * @brief Get Spread Spectrum Incrementation Step for PLL
AnnaBridge 146:22da6e220af6 5095 * @note Must be written before enabling PLL
AnnaBridge 146:22da6e220af6 5096 * @rmtoll SSCGR INCSTEP LL_RCC_PLL_GetStepIncrementation
AnnaBridge 146:22da6e220af6 5097 * @retval Between Min_Data=0 and Max_Data=32767
AnnaBridge 146:22da6e220af6 5098 */
AnnaBridge 146:22da6e220af6 5099 __STATIC_INLINE uint32_t LL_RCC_PLL_GetStepIncrementation(void)
AnnaBridge 146:22da6e220af6 5100 {
AnnaBridge 146:22da6e220af6 5101 return (uint32_t)(READ_BIT(RCC->SSCGR, RCC_SSCGR_INCSTEP) >> RCC_SSCGR_INCSTEP_Pos);
AnnaBridge 146:22da6e220af6 5102 }
AnnaBridge 146:22da6e220af6 5103
AnnaBridge 146:22da6e220af6 5104 /**
AnnaBridge 146:22da6e220af6 5105 * @brief Get Spread Spectrum Selection for PLL
AnnaBridge 146:22da6e220af6 5106 * @note Must be written before enabling PLL
AnnaBridge 146:22da6e220af6 5107 * @rmtoll SSCGR SPREADSEL LL_RCC_PLL_GetSpreadSelection
AnnaBridge 146:22da6e220af6 5108 * @retval Returned value can be one of the following values:
AnnaBridge 146:22da6e220af6 5109 * @arg @ref LL_RCC_SPREAD_SELECT_CENTER
AnnaBridge 146:22da6e220af6 5110 * @arg @ref LL_RCC_SPREAD_SELECT_DOWN
AnnaBridge 146:22da6e220af6 5111 */
AnnaBridge 146:22da6e220af6 5112 __STATIC_INLINE uint32_t LL_RCC_PLL_GetSpreadSelection(void)
AnnaBridge 146:22da6e220af6 5113 {
AnnaBridge 146:22da6e220af6 5114 return (uint32_t)(READ_BIT(RCC->SSCGR, RCC_SSCGR_SPREADSEL));
AnnaBridge 146:22da6e220af6 5115 }
AnnaBridge 146:22da6e220af6 5116
AnnaBridge 146:22da6e220af6 5117 /**
AnnaBridge 146:22da6e220af6 5118 * @brief Enable Spread Spectrum for PLL.
AnnaBridge 146:22da6e220af6 5119 * @rmtoll SSCGR SSCGEN LL_RCC_PLL_SpreadSpectrum_Enable
AnnaBridge 146:22da6e220af6 5120 * @retval None
AnnaBridge 146:22da6e220af6 5121 */
AnnaBridge 146:22da6e220af6 5122 __STATIC_INLINE void LL_RCC_PLL_SpreadSpectrum_Enable(void)
AnnaBridge 146:22da6e220af6 5123 {
AnnaBridge 146:22da6e220af6 5124 SET_BIT(RCC->SSCGR, RCC_SSCGR_SSCGEN);
AnnaBridge 146:22da6e220af6 5125 }
AnnaBridge 146:22da6e220af6 5126
AnnaBridge 146:22da6e220af6 5127 /**
AnnaBridge 146:22da6e220af6 5128 * @brief Disable Spread Spectrum for PLL.
AnnaBridge 146:22da6e220af6 5129 * @rmtoll SSCGR SSCGEN LL_RCC_PLL_SpreadSpectrum_Disable
AnnaBridge 146:22da6e220af6 5130 * @retval None
AnnaBridge 146:22da6e220af6 5131 */
AnnaBridge 146:22da6e220af6 5132 __STATIC_INLINE void LL_RCC_PLL_SpreadSpectrum_Disable(void)
AnnaBridge 146:22da6e220af6 5133 {
AnnaBridge 146:22da6e220af6 5134 CLEAR_BIT(RCC->SSCGR, RCC_SSCGR_SSCGEN);
AnnaBridge 146:22da6e220af6 5135 }
AnnaBridge 146:22da6e220af6 5136
AnnaBridge 146:22da6e220af6 5137 /**
AnnaBridge 146:22da6e220af6 5138 * @}
AnnaBridge 146:22da6e220af6 5139 */
AnnaBridge 146:22da6e220af6 5140
AnnaBridge 146:22da6e220af6 5141 #if defined(RCC_PLLI2S_SUPPORT)
AnnaBridge 146:22da6e220af6 5142 /** @defgroup RCC_LL_EF_PLLI2S PLLI2S
AnnaBridge 146:22da6e220af6 5143 * @{
AnnaBridge 146:22da6e220af6 5144 */
AnnaBridge 146:22da6e220af6 5145
AnnaBridge 146:22da6e220af6 5146 /**
AnnaBridge 146:22da6e220af6 5147 * @brief Enable PLLI2S
AnnaBridge 146:22da6e220af6 5148 * @rmtoll CR PLLI2SON LL_RCC_PLLI2S_Enable
AnnaBridge 146:22da6e220af6 5149 * @retval None
AnnaBridge 146:22da6e220af6 5150 */
AnnaBridge 146:22da6e220af6 5151 __STATIC_INLINE void LL_RCC_PLLI2S_Enable(void)
AnnaBridge 146:22da6e220af6 5152 {
AnnaBridge 146:22da6e220af6 5153 SET_BIT(RCC->CR, RCC_CR_PLLI2SON);
AnnaBridge 146:22da6e220af6 5154 }
AnnaBridge 146:22da6e220af6 5155
AnnaBridge 146:22da6e220af6 5156 /**
AnnaBridge 146:22da6e220af6 5157 * @brief Disable PLLI2S
AnnaBridge 146:22da6e220af6 5158 * @rmtoll CR PLLI2SON LL_RCC_PLLI2S_Disable
AnnaBridge 146:22da6e220af6 5159 * @retval None
AnnaBridge 146:22da6e220af6 5160 */
AnnaBridge 146:22da6e220af6 5161 __STATIC_INLINE void LL_RCC_PLLI2S_Disable(void)
AnnaBridge 146:22da6e220af6 5162 {
AnnaBridge 146:22da6e220af6 5163 CLEAR_BIT(RCC->CR, RCC_CR_PLLI2SON);
AnnaBridge 146:22da6e220af6 5164 }
AnnaBridge 146:22da6e220af6 5165
AnnaBridge 146:22da6e220af6 5166 /**
AnnaBridge 146:22da6e220af6 5167 * @brief Check if PLLI2S Ready
AnnaBridge 146:22da6e220af6 5168 * @rmtoll CR PLLI2SRDY LL_RCC_PLLI2S_IsReady
AnnaBridge 146:22da6e220af6 5169 * @retval State of bit (1 or 0).
AnnaBridge 146:22da6e220af6 5170 */
AnnaBridge 146:22da6e220af6 5171 __STATIC_INLINE uint32_t LL_RCC_PLLI2S_IsReady(void)
AnnaBridge 146:22da6e220af6 5172 {
AnnaBridge 146:22da6e220af6 5173 return (READ_BIT(RCC->CR, RCC_CR_PLLI2SRDY) == (RCC_CR_PLLI2SRDY));
AnnaBridge 146:22da6e220af6 5174 }
AnnaBridge 146:22da6e220af6 5175
AnnaBridge 146:22da6e220af6 5176 #if (defined(RCC_DCKCFGR_PLLI2SDIVQ) || defined(RCC_DCKCFGR_PLLI2SDIVR))
AnnaBridge 146:22da6e220af6 5177 /**
AnnaBridge 146:22da6e220af6 5178 * @brief Configure PLLI2S used for SAI domain clock
AnnaBridge 146:22da6e220af6 5179 * @note PLL Source and PLLM Divider can be written only when PLL,
AnnaBridge 146:22da6e220af6 5180 * PLLI2S and PLLSAI(*) are disabled
AnnaBridge 146:22da6e220af6 5181 * @note PLLN/PLLQ/PLLR can be written only when PLLI2S is disabled
AnnaBridge 146:22da6e220af6 5182 * @note This can be selected for SAI
AnnaBridge 146:22da6e220af6 5183 * @rmtoll PLLCFGR PLLSRC LL_RCC_PLLI2S_ConfigDomain_SAI\n
AnnaBridge 146:22da6e220af6 5184 * PLLI2SCFGR PLLI2SSRC LL_RCC_PLLI2S_ConfigDomain_SAI\n
AnnaBridge 146:22da6e220af6 5185 * PLLCFGR PLLM LL_RCC_PLLI2S_ConfigDomain_SAI\n
AnnaBridge 146:22da6e220af6 5186 * PLLI2SCFGR PLLI2SM LL_RCC_PLLI2S_ConfigDomain_SAI\n
AnnaBridge 146:22da6e220af6 5187 * PLLI2SCFGR PLLI2SN LL_RCC_PLLI2S_ConfigDomain_SAI\n
AnnaBridge 146:22da6e220af6 5188 * PLLI2SCFGR PLLI2SQ LL_RCC_PLLI2S_ConfigDomain_SAI\n
AnnaBridge 146:22da6e220af6 5189 * PLLI2SCFGR PLLI2SR LL_RCC_PLLI2S_ConfigDomain_SAI\n
AnnaBridge 146:22da6e220af6 5190 * DCKCFGR PLLI2SDIVQ LL_RCC_PLLI2S_ConfigDomain_SAI\n
AnnaBridge 146:22da6e220af6 5191 * DCKCFGR PLLI2SDIVR LL_RCC_PLLI2S_ConfigDomain_SAI
AnnaBridge 146:22da6e220af6 5192 * @param Source This parameter can be one of the following values:
AnnaBridge 146:22da6e220af6 5193 * @arg @ref LL_RCC_PLLSOURCE_HSI
AnnaBridge 146:22da6e220af6 5194 * @arg @ref LL_RCC_PLLSOURCE_HSE
AnnaBridge 146:22da6e220af6 5195 * @arg @ref LL_RCC_PLLI2SSOURCE_PIN (*)
AnnaBridge 146:22da6e220af6 5196 *
AnnaBridge 146:22da6e220af6 5197 * (*) value not defined in all devices.
AnnaBridge 146:22da6e220af6 5198 * @param PLLM This parameter can be one of the following values:
AnnaBridge 146:22da6e220af6 5199 * @arg @ref LL_RCC_PLLI2SM_DIV_2
AnnaBridge 146:22da6e220af6 5200 * @arg @ref LL_RCC_PLLI2SM_DIV_3
AnnaBridge 146:22da6e220af6 5201 * @arg @ref LL_RCC_PLLI2SM_DIV_4
AnnaBridge 146:22da6e220af6 5202 * @arg @ref LL_RCC_PLLI2SM_DIV_5
AnnaBridge 146:22da6e220af6 5203 * @arg @ref LL_RCC_PLLI2SM_DIV_6
AnnaBridge 146:22da6e220af6 5204 * @arg @ref LL_RCC_PLLI2SM_DIV_7
AnnaBridge 146:22da6e220af6 5205 * @arg @ref LL_RCC_PLLI2SM_DIV_8
AnnaBridge 146:22da6e220af6 5206 * @arg @ref LL_RCC_PLLI2SM_DIV_9
AnnaBridge 146:22da6e220af6 5207 * @arg @ref LL_RCC_PLLI2SM_DIV_10
AnnaBridge 146:22da6e220af6 5208 * @arg @ref LL_RCC_PLLI2SM_DIV_11
AnnaBridge 146:22da6e220af6 5209 * @arg @ref LL_RCC_PLLI2SM_DIV_12
AnnaBridge 146:22da6e220af6 5210 * @arg @ref LL_RCC_PLLI2SM_DIV_13
AnnaBridge 146:22da6e220af6 5211 * @arg @ref LL_RCC_PLLI2SM_DIV_14
AnnaBridge 146:22da6e220af6 5212 * @arg @ref LL_RCC_PLLI2SM_DIV_15
AnnaBridge 146:22da6e220af6 5213 * @arg @ref LL_RCC_PLLI2SM_DIV_16
AnnaBridge 146:22da6e220af6 5214 * @arg @ref LL_RCC_PLLI2SM_DIV_17
AnnaBridge 146:22da6e220af6 5215 * @arg @ref LL_RCC_PLLI2SM_DIV_18
AnnaBridge 146:22da6e220af6 5216 * @arg @ref LL_RCC_PLLI2SM_DIV_19
AnnaBridge 146:22da6e220af6 5217 * @arg @ref LL_RCC_PLLI2SM_DIV_20
AnnaBridge 146:22da6e220af6 5218 * @arg @ref LL_RCC_PLLI2SM_DIV_21
AnnaBridge 146:22da6e220af6 5219 * @arg @ref LL_RCC_PLLI2SM_DIV_22
AnnaBridge 146:22da6e220af6 5220 * @arg @ref LL_RCC_PLLI2SM_DIV_23
AnnaBridge 146:22da6e220af6 5221 * @arg @ref LL_RCC_PLLI2SM_DIV_24
AnnaBridge 146:22da6e220af6 5222 * @arg @ref LL_RCC_PLLI2SM_DIV_25
AnnaBridge 146:22da6e220af6 5223 * @arg @ref LL_RCC_PLLI2SM_DIV_26
AnnaBridge 146:22da6e220af6 5224 * @arg @ref LL_RCC_PLLI2SM_DIV_27
AnnaBridge 146:22da6e220af6 5225 * @arg @ref LL_RCC_PLLI2SM_DIV_28
AnnaBridge 146:22da6e220af6 5226 * @arg @ref LL_RCC_PLLI2SM_DIV_29
AnnaBridge 146:22da6e220af6 5227 * @arg @ref LL_RCC_PLLI2SM_DIV_30
AnnaBridge 146:22da6e220af6 5228 * @arg @ref LL_RCC_PLLI2SM_DIV_31
AnnaBridge 146:22da6e220af6 5229 * @arg @ref LL_RCC_PLLI2SM_DIV_32
AnnaBridge 146:22da6e220af6 5230 * @arg @ref LL_RCC_PLLI2SM_DIV_33
AnnaBridge 146:22da6e220af6 5231 * @arg @ref LL_RCC_PLLI2SM_DIV_34
AnnaBridge 146:22da6e220af6 5232 * @arg @ref LL_RCC_PLLI2SM_DIV_35
AnnaBridge 146:22da6e220af6 5233 * @arg @ref LL_RCC_PLLI2SM_DIV_36
AnnaBridge 146:22da6e220af6 5234 * @arg @ref LL_RCC_PLLI2SM_DIV_37
AnnaBridge 146:22da6e220af6 5235 * @arg @ref LL_RCC_PLLI2SM_DIV_38
AnnaBridge 146:22da6e220af6 5236 * @arg @ref LL_RCC_PLLI2SM_DIV_39
AnnaBridge 146:22da6e220af6 5237 * @arg @ref LL_RCC_PLLI2SM_DIV_40
AnnaBridge 146:22da6e220af6 5238 * @arg @ref LL_RCC_PLLI2SM_DIV_41
AnnaBridge 146:22da6e220af6 5239 * @arg @ref LL_RCC_PLLI2SM_DIV_42
AnnaBridge 146:22da6e220af6 5240 * @arg @ref LL_RCC_PLLI2SM_DIV_43
AnnaBridge 146:22da6e220af6 5241 * @arg @ref LL_RCC_PLLI2SM_DIV_44
AnnaBridge 146:22da6e220af6 5242 * @arg @ref LL_RCC_PLLI2SM_DIV_45
AnnaBridge 146:22da6e220af6 5243 * @arg @ref LL_RCC_PLLI2SM_DIV_46
AnnaBridge 146:22da6e220af6 5244 * @arg @ref LL_RCC_PLLI2SM_DIV_47
AnnaBridge 146:22da6e220af6 5245 * @arg @ref LL_RCC_PLLI2SM_DIV_48
AnnaBridge 146:22da6e220af6 5246 * @arg @ref LL_RCC_PLLI2SM_DIV_49
AnnaBridge 146:22da6e220af6 5247 * @arg @ref LL_RCC_PLLI2SM_DIV_50
AnnaBridge 146:22da6e220af6 5248 * @arg @ref LL_RCC_PLLI2SM_DIV_51
AnnaBridge 146:22da6e220af6 5249 * @arg @ref LL_RCC_PLLI2SM_DIV_52
AnnaBridge 146:22da6e220af6 5250 * @arg @ref LL_RCC_PLLI2SM_DIV_53
AnnaBridge 146:22da6e220af6 5251 * @arg @ref LL_RCC_PLLI2SM_DIV_54
AnnaBridge 146:22da6e220af6 5252 * @arg @ref LL_RCC_PLLI2SM_DIV_55
AnnaBridge 146:22da6e220af6 5253 * @arg @ref LL_RCC_PLLI2SM_DIV_56
AnnaBridge 146:22da6e220af6 5254 * @arg @ref LL_RCC_PLLI2SM_DIV_57
AnnaBridge 146:22da6e220af6 5255 * @arg @ref LL_RCC_PLLI2SM_DIV_58
AnnaBridge 146:22da6e220af6 5256 * @arg @ref LL_RCC_PLLI2SM_DIV_59
AnnaBridge 146:22da6e220af6 5257 * @arg @ref LL_RCC_PLLI2SM_DIV_60
AnnaBridge 146:22da6e220af6 5258 * @arg @ref LL_RCC_PLLI2SM_DIV_61
AnnaBridge 146:22da6e220af6 5259 * @arg @ref LL_RCC_PLLI2SM_DIV_62
AnnaBridge 146:22da6e220af6 5260 * @arg @ref LL_RCC_PLLI2SM_DIV_63
AnnaBridge 146:22da6e220af6 5261 * @param PLLN Between 50/192(*) and 432
AnnaBridge 146:22da6e220af6 5262 *
AnnaBridge 146:22da6e220af6 5263 * (*) value not defined in all devices.
AnnaBridge 146:22da6e220af6 5264 * @param PLLQ_R This parameter can be one of the following values:
AnnaBridge 146:22da6e220af6 5265 * @arg @ref LL_RCC_PLLI2SQ_DIV_2 (*)
AnnaBridge 146:22da6e220af6 5266 * @arg @ref LL_RCC_PLLI2SQ_DIV_3 (*)
AnnaBridge 146:22da6e220af6 5267 * @arg @ref LL_RCC_PLLI2SQ_DIV_4 (*)
AnnaBridge 146:22da6e220af6 5268 * @arg @ref LL_RCC_PLLI2SQ_DIV_5 (*)
AnnaBridge 146:22da6e220af6 5269 * @arg @ref LL_RCC_PLLI2SQ_DIV_6 (*)
AnnaBridge 146:22da6e220af6 5270 * @arg @ref LL_RCC_PLLI2SQ_DIV_7 (*)
AnnaBridge 146:22da6e220af6 5271 * @arg @ref LL_RCC_PLLI2SQ_DIV_8 (*)
AnnaBridge 146:22da6e220af6 5272 * @arg @ref LL_RCC_PLLI2SQ_DIV_9 (*)
AnnaBridge 146:22da6e220af6 5273 * @arg @ref LL_RCC_PLLI2SQ_DIV_10 (*)
AnnaBridge 146:22da6e220af6 5274 * @arg @ref LL_RCC_PLLI2SQ_DIV_11 (*)
AnnaBridge 146:22da6e220af6 5275 * @arg @ref LL_RCC_PLLI2SQ_DIV_12 (*)
AnnaBridge 146:22da6e220af6 5276 * @arg @ref LL_RCC_PLLI2SQ_DIV_13 (*)
AnnaBridge 146:22da6e220af6 5277 * @arg @ref LL_RCC_PLLI2SQ_DIV_14 (*)
AnnaBridge 146:22da6e220af6 5278 * @arg @ref LL_RCC_PLLI2SQ_DIV_15 (*)
AnnaBridge 146:22da6e220af6 5279 * @arg @ref LL_RCC_PLLI2SR_DIV_2 (*)
AnnaBridge 146:22da6e220af6 5280 * @arg @ref LL_RCC_PLLI2SR_DIV_3 (*)
AnnaBridge 146:22da6e220af6 5281 * @arg @ref LL_RCC_PLLI2SR_DIV_4 (*)
AnnaBridge 146:22da6e220af6 5282 * @arg @ref LL_RCC_PLLI2SR_DIV_5 (*)
AnnaBridge 146:22da6e220af6 5283 * @arg @ref LL_RCC_PLLI2SR_DIV_6 (*)
AnnaBridge 146:22da6e220af6 5284 * @arg @ref LL_RCC_PLLI2SR_DIV_7 (*)
AnnaBridge 146:22da6e220af6 5285 *
AnnaBridge 146:22da6e220af6 5286 * (*) value not defined in all devices.
AnnaBridge 146:22da6e220af6 5287 * @param PLLDIVQ_R This parameter can be one of the following values:
AnnaBridge 146:22da6e220af6 5288 * @arg @ref LL_RCC_PLLI2SDIVQ_DIV_1 (*)
AnnaBridge 146:22da6e220af6 5289 * @arg @ref LL_RCC_PLLI2SDIVQ_DIV_2 (*)
AnnaBridge 146:22da6e220af6 5290 * @arg @ref LL_RCC_PLLI2SDIVQ_DIV_3 (*)
AnnaBridge 146:22da6e220af6 5291 * @arg @ref LL_RCC_PLLI2SDIVQ_DIV_4 (*)
AnnaBridge 146:22da6e220af6 5292 * @arg @ref LL_RCC_PLLI2SDIVQ_DIV_5 (*)
AnnaBridge 146:22da6e220af6 5293 * @arg @ref LL_RCC_PLLI2SDIVQ_DIV_6 (*)
AnnaBridge 146:22da6e220af6 5294 * @arg @ref LL_RCC_PLLI2SDIVQ_DIV_7 (*)
AnnaBridge 146:22da6e220af6 5295 * @arg @ref LL_RCC_PLLI2SDIVQ_DIV_8 (*)
AnnaBridge 146:22da6e220af6 5296 * @arg @ref LL_RCC_PLLI2SDIVQ_DIV_9 (*)
AnnaBridge 146:22da6e220af6 5297 * @arg @ref LL_RCC_PLLI2SDIVQ_DIV_10 (*)
AnnaBridge 146:22da6e220af6 5298 * @arg @ref LL_RCC_PLLI2SDIVQ_DIV_11 (*)
AnnaBridge 146:22da6e220af6 5299 * @arg @ref LL_RCC_PLLI2SDIVQ_DIV_12 (*)
AnnaBridge 146:22da6e220af6 5300 * @arg @ref LL_RCC_PLLI2SDIVQ_DIV_13 (*)
AnnaBridge 146:22da6e220af6 5301 * @arg @ref LL_RCC_PLLI2SDIVQ_DIV_14 (*)
AnnaBridge 146:22da6e220af6 5302 * @arg @ref LL_RCC_PLLI2SDIVQ_DIV_15 (*)
AnnaBridge 146:22da6e220af6 5303 * @arg @ref LL_RCC_PLLI2SDIVQ_DIV_16 (*)
AnnaBridge 146:22da6e220af6 5304 * @arg @ref LL_RCC_PLLI2SDIVQ_DIV_17 (*)
AnnaBridge 146:22da6e220af6 5305 * @arg @ref LL_RCC_PLLI2SDIVQ_DIV_18 (*)
AnnaBridge 146:22da6e220af6 5306 * @arg @ref LL_RCC_PLLI2SDIVQ_DIV_19 (*)
AnnaBridge 146:22da6e220af6 5307 * @arg @ref LL_RCC_PLLI2SDIVQ_DIV_20 (*)
AnnaBridge 146:22da6e220af6 5308 * @arg @ref LL_RCC_PLLI2SDIVQ_DIV_21 (*)
AnnaBridge 146:22da6e220af6 5309 * @arg @ref LL_RCC_PLLI2SDIVQ_DIV_22 (*)
AnnaBridge 146:22da6e220af6 5310 * @arg @ref LL_RCC_PLLI2SDIVQ_DIV_23 (*)
AnnaBridge 146:22da6e220af6 5311 * @arg @ref LL_RCC_PLLI2SDIVQ_DIV_24 (*)
AnnaBridge 146:22da6e220af6 5312 * @arg @ref LL_RCC_PLLI2SDIVQ_DIV_25 (*)
AnnaBridge 146:22da6e220af6 5313 * @arg @ref LL_RCC_PLLI2SDIVQ_DIV_26 (*)
AnnaBridge 146:22da6e220af6 5314 * @arg @ref LL_RCC_PLLI2SDIVQ_DIV_27 (*)
AnnaBridge 146:22da6e220af6 5315 * @arg @ref LL_RCC_PLLI2SDIVQ_DIV_28 (*)
AnnaBridge 146:22da6e220af6 5316 * @arg @ref LL_RCC_PLLI2SDIVQ_DIV_29 (*)
AnnaBridge 146:22da6e220af6 5317 * @arg @ref LL_RCC_PLLI2SDIVQ_DIV_30 (*)
AnnaBridge 146:22da6e220af6 5318 * @arg @ref LL_RCC_PLLI2SDIVQ_DIV_31 (*)
AnnaBridge 146:22da6e220af6 5319 * @arg @ref LL_RCC_PLLI2SDIVQ_DIV_32 (*)
AnnaBridge 146:22da6e220af6 5320 * @arg @ref LL_RCC_PLLI2SDIVR_DIV_1 (*)
AnnaBridge 146:22da6e220af6 5321 * @arg @ref LL_RCC_PLLI2SDIVR_DIV_2 (*)
AnnaBridge 146:22da6e220af6 5322 * @arg @ref LL_RCC_PLLI2SDIVR_DIV_3 (*)
AnnaBridge 146:22da6e220af6 5323 * @arg @ref LL_RCC_PLLI2SDIVR_DIV_4 (*)
AnnaBridge 146:22da6e220af6 5324 * @arg @ref LL_RCC_PLLI2SDIVR_DIV_5 (*)
AnnaBridge 146:22da6e220af6 5325 * @arg @ref LL_RCC_PLLI2SDIVR_DIV_6 (*)
AnnaBridge 146:22da6e220af6 5326 * @arg @ref LL_RCC_PLLI2SDIVR_DIV_7 (*)
AnnaBridge 146:22da6e220af6 5327 * @arg @ref LL_RCC_PLLI2SDIVR_DIV_8 (*)
AnnaBridge 146:22da6e220af6 5328 * @arg @ref LL_RCC_PLLI2SDIVR_DIV_9 (*)
AnnaBridge 146:22da6e220af6 5329 * @arg @ref LL_RCC_PLLI2SDIVR_DIV_10 (*)
AnnaBridge 146:22da6e220af6 5330 * @arg @ref LL_RCC_PLLI2SDIVR_DIV_11 (*)
AnnaBridge 146:22da6e220af6 5331 * @arg @ref LL_RCC_PLLI2SDIVR_DIV_12 (*)
AnnaBridge 146:22da6e220af6 5332 * @arg @ref LL_RCC_PLLI2SDIVR_DIV_13 (*)
AnnaBridge 146:22da6e220af6 5333 * @arg @ref LL_RCC_PLLI2SDIVR_DIV_14 (*)
AnnaBridge 146:22da6e220af6 5334 * @arg @ref LL_RCC_PLLI2SDIVR_DIV_15 (*)
AnnaBridge 146:22da6e220af6 5335 * @arg @ref LL_RCC_PLLI2SDIVR_DIV_16 (*)
AnnaBridge 146:22da6e220af6 5336 * @arg @ref LL_RCC_PLLI2SDIVR_DIV_17 (*)
AnnaBridge 146:22da6e220af6 5337 * @arg @ref LL_RCC_PLLI2SDIVR_DIV_18 (*)
AnnaBridge 146:22da6e220af6 5338 * @arg @ref LL_RCC_PLLI2SDIVR_DIV_19 (*)
AnnaBridge 146:22da6e220af6 5339 * @arg @ref LL_RCC_PLLI2SDIVR_DIV_20 (*)
AnnaBridge 146:22da6e220af6 5340 * @arg @ref LL_RCC_PLLI2SDIVR_DIV_21 (*)
AnnaBridge 146:22da6e220af6 5341 * @arg @ref LL_RCC_PLLI2SDIVR_DIV_22 (*)
AnnaBridge 146:22da6e220af6 5342 * @arg @ref LL_RCC_PLLI2SDIVR_DIV_23 (*)
AnnaBridge 146:22da6e220af6 5343 * @arg @ref LL_RCC_PLLI2SDIVR_DIV_24 (*)
AnnaBridge 146:22da6e220af6 5344 * @arg @ref LL_RCC_PLLI2SDIVR_DIV_25 (*)
AnnaBridge 146:22da6e220af6 5345 * @arg @ref LL_RCC_PLLI2SDIVR_DIV_26 (*)
AnnaBridge 146:22da6e220af6 5346 * @arg @ref LL_RCC_PLLI2SDIVR_DIV_27 (*)
AnnaBridge 146:22da6e220af6 5347 * @arg @ref LL_RCC_PLLI2SDIVR_DIV_28 (*)
AnnaBridge 146:22da6e220af6 5348 * @arg @ref LL_RCC_PLLI2SDIVR_DIV_29 (*)
AnnaBridge 146:22da6e220af6 5349 * @arg @ref LL_RCC_PLLI2SDIVR_DIV_30 (*)
AnnaBridge 146:22da6e220af6 5350 * @arg @ref LL_RCC_PLLI2SDIVR_DIV_31 (*)
AnnaBridge 146:22da6e220af6 5351 *
AnnaBridge 146:22da6e220af6 5352 * (*) value not defined in all devices.
AnnaBridge 146:22da6e220af6 5353 * @retval None
AnnaBridge 146:22da6e220af6 5354 */
AnnaBridge 146:22da6e220af6 5355 __STATIC_INLINE void LL_RCC_PLLI2S_ConfigDomain_SAI(uint32_t Source, uint32_t PLLM, uint32_t PLLN, uint32_t PLLQ_R, uint32_t PLLDIVQ_R)
AnnaBridge 146:22da6e220af6 5356 {
AnnaBridge 146:22da6e220af6 5357 register uint32_t *pReg = (uint32_t *)((uint32_t)((uint32_t)(&RCC->PLLCFGR) + (Source & 0x80U)));
AnnaBridge 146:22da6e220af6 5358 MODIFY_REG(*pReg, RCC_PLLCFGR_PLLSRC, (Source & (~0x80U)));
AnnaBridge 146:22da6e220af6 5359 #if defined(RCC_PLLI2SCFGR_PLLI2SM)
AnnaBridge 146:22da6e220af6 5360 MODIFY_REG(RCC->PLLI2SCFGR, RCC_PLLI2SCFGR_PLLI2SM, PLLM);
AnnaBridge 146:22da6e220af6 5361 #else
AnnaBridge 146:22da6e220af6 5362 MODIFY_REG(RCC->PLLCFGR, RCC_PLLCFGR_PLLM, PLLM);
AnnaBridge 146:22da6e220af6 5363 #endif /* RCC_PLLI2SCFGR_PLLI2SM */
AnnaBridge 146:22da6e220af6 5364 MODIFY_REG(RCC->PLLI2SCFGR, RCC_PLLI2SCFGR_PLLI2SN, PLLN << RCC_PLLI2SCFGR_PLLI2SN_Pos);
AnnaBridge 146:22da6e220af6 5365 #if defined(RCC_DCKCFGR_PLLI2SDIVQ)
AnnaBridge 146:22da6e220af6 5366 MODIFY_REG(RCC->PLLI2SCFGR, RCC_PLLI2SCFGR_PLLI2SQ, PLLQ_R);
AnnaBridge 146:22da6e220af6 5367 MODIFY_REG(RCC->DCKCFGR, RCC_DCKCFGR_PLLI2SDIVQ, PLLDIVQ_R);
AnnaBridge 146:22da6e220af6 5368 #else
AnnaBridge 146:22da6e220af6 5369 MODIFY_REG(RCC->PLLI2SCFGR, RCC_PLLI2SCFGR_PLLI2SR, PLLQ_R);
AnnaBridge 146:22da6e220af6 5370 MODIFY_REG(RCC->DCKCFGR, RCC_DCKCFGR_PLLI2SDIVR, PLLDIVQ_R);
AnnaBridge 146:22da6e220af6 5371 #endif /* RCC_DCKCFGR_PLLI2SDIVQ */
AnnaBridge 146:22da6e220af6 5372 }
AnnaBridge 146:22da6e220af6 5373 #endif /* RCC_DCKCFGR_PLLI2SDIVQ && RCC_DCKCFGR_PLLI2SDIVR */
AnnaBridge 146:22da6e220af6 5374
AnnaBridge 146:22da6e220af6 5375 #if defined(RCC_PLLI2SCFGR_PLLI2SQ) && !defined(RCC_DCKCFGR_PLLI2SDIVQ)
AnnaBridge 146:22da6e220af6 5376 /**
AnnaBridge 146:22da6e220af6 5377 * @brief Configure PLLI2S used for 48Mhz domain clock
AnnaBridge 146:22da6e220af6 5378 * @note PLL Source and PLLM Divider can be written only when PLL,
AnnaBridge 146:22da6e220af6 5379 * PLLI2S and PLLSAI(*) are disabled
AnnaBridge 146:22da6e220af6 5380 * @note PLLN/PLLQ can be written only when PLLI2S is disabled
AnnaBridge 146:22da6e220af6 5381 * @note This can be selected for RNG, USB, SDIO
AnnaBridge 146:22da6e220af6 5382 * @rmtoll PLLCFGR PLLSRC LL_RCC_PLLI2S_ConfigDomain_48M\n
AnnaBridge 146:22da6e220af6 5383 * PLLI2SCFGR PLLI2SSRC LL_RCC_PLLI2S_ConfigDomain_48M\n
AnnaBridge 146:22da6e220af6 5384 * PLLCFGR PLLM LL_RCC_PLLI2S_ConfigDomain_48M\n
AnnaBridge 146:22da6e220af6 5385 * PLLI2SCFGR PLLI2SM LL_RCC_PLLI2S_ConfigDomain_48M\n
AnnaBridge 146:22da6e220af6 5386 * PLLI2SCFGR PLLI2SN LL_RCC_PLLI2S_ConfigDomain_48M\n
AnnaBridge 146:22da6e220af6 5387 * PLLI2SCFGR PLLI2SQ LL_RCC_PLLI2S_ConfigDomain_48M
AnnaBridge 146:22da6e220af6 5388 * @param Source This parameter can be one of the following values:
AnnaBridge 146:22da6e220af6 5389 * @arg @ref LL_RCC_PLLSOURCE_HSI
AnnaBridge 146:22da6e220af6 5390 * @arg @ref LL_RCC_PLLSOURCE_HSE
AnnaBridge 146:22da6e220af6 5391 * @arg @ref LL_RCC_PLLI2SSOURCE_PIN (*)
AnnaBridge 146:22da6e220af6 5392 *
AnnaBridge 146:22da6e220af6 5393 * (*) value not defined in all devices.
AnnaBridge 146:22da6e220af6 5394 * @param PLLM This parameter can be one of the following values:
AnnaBridge 146:22da6e220af6 5395 * @arg @ref LL_RCC_PLLI2SM_DIV_2
AnnaBridge 146:22da6e220af6 5396 * @arg @ref LL_RCC_PLLI2SM_DIV_3
AnnaBridge 146:22da6e220af6 5397 * @arg @ref LL_RCC_PLLI2SM_DIV_4
AnnaBridge 146:22da6e220af6 5398 * @arg @ref LL_RCC_PLLI2SM_DIV_5
AnnaBridge 146:22da6e220af6 5399 * @arg @ref LL_RCC_PLLI2SM_DIV_6
AnnaBridge 146:22da6e220af6 5400 * @arg @ref LL_RCC_PLLI2SM_DIV_7
AnnaBridge 146:22da6e220af6 5401 * @arg @ref LL_RCC_PLLI2SM_DIV_8
AnnaBridge 146:22da6e220af6 5402 * @arg @ref LL_RCC_PLLI2SM_DIV_9
AnnaBridge 146:22da6e220af6 5403 * @arg @ref LL_RCC_PLLI2SM_DIV_10
AnnaBridge 146:22da6e220af6 5404 * @arg @ref LL_RCC_PLLI2SM_DIV_11
AnnaBridge 146:22da6e220af6 5405 * @arg @ref LL_RCC_PLLI2SM_DIV_12
AnnaBridge 146:22da6e220af6 5406 * @arg @ref LL_RCC_PLLI2SM_DIV_13
AnnaBridge 146:22da6e220af6 5407 * @arg @ref LL_RCC_PLLI2SM_DIV_14
AnnaBridge 146:22da6e220af6 5408 * @arg @ref LL_RCC_PLLI2SM_DIV_15
AnnaBridge 146:22da6e220af6 5409 * @arg @ref LL_RCC_PLLI2SM_DIV_16
AnnaBridge 146:22da6e220af6 5410 * @arg @ref LL_RCC_PLLI2SM_DIV_17
AnnaBridge 146:22da6e220af6 5411 * @arg @ref LL_RCC_PLLI2SM_DIV_18
AnnaBridge 146:22da6e220af6 5412 * @arg @ref LL_RCC_PLLI2SM_DIV_19
AnnaBridge 146:22da6e220af6 5413 * @arg @ref LL_RCC_PLLI2SM_DIV_20
AnnaBridge 146:22da6e220af6 5414 * @arg @ref LL_RCC_PLLI2SM_DIV_21
AnnaBridge 146:22da6e220af6 5415 * @arg @ref LL_RCC_PLLI2SM_DIV_22
AnnaBridge 146:22da6e220af6 5416 * @arg @ref LL_RCC_PLLI2SM_DIV_23
AnnaBridge 146:22da6e220af6 5417 * @arg @ref LL_RCC_PLLI2SM_DIV_24
AnnaBridge 146:22da6e220af6 5418 * @arg @ref LL_RCC_PLLI2SM_DIV_25
AnnaBridge 146:22da6e220af6 5419 * @arg @ref LL_RCC_PLLI2SM_DIV_26
AnnaBridge 146:22da6e220af6 5420 * @arg @ref LL_RCC_PLLI2SM_DIV_27
AnnaBridge 146:22da6e220af6 5421 * @arg @ref LL_RCC_PLLI2SM_DIV_28
AnnaBridge 146:22da6e220af6 5422 * @arg @ref LL_RCC_PLLI2SM_DIV_29
AnnaBridge 146:22da6e220af6 5423 * @arg @ref LL_RCC_PLLI2SM_DIV_30
AnnaBridge 146:22da6e220af6 5424 * @arg @ref LL_RCC_PLLI2SM_DIV_31
AnnaBridge 146:22da6e220af6 5425 * @arg @ref LL_RCC_PLLI2SM_DIV_32
AnnaBridge 146:22da6e220af6 5426 * @arg @ref LL_RCC_PLLI2SM_DIV_33
AnnaBridge 146:22da6e220af6 5427 * @arg @ref LL_RCC_PLLI2SM_DIV_34
AnnaBridge 146:22da6e220af6 5428 * @arg @ref LL_RCC_PLLI2SM_DIV_35
AnnaBridge 146:22da6e220af6 5429 * @arg @ref LL_RCC_PLLI2SM_DIV_36
AnnaBridge 146:22da6e220af6 5430 * @arg @ref LL_RCC_PLLI2SM_DIV_37
AnnaBridge 146:22da6e220af6 5431 * @arg @ref LL_RCC_PLLI2SM_DIV_38
AnnaBridge 146:22da6e220af6 5432 * @arg @ref LL_RCC_PLLI2SM_DIV_39
AnnaBridge 146:22da6e220af6 5433 * @arg @ref LL_RCC_PLLI2SM_DIV_40
AnnaBridge 146:22da6e220af6 5434 * @arg @ref LL_RCC_PLLI2SM_DIV_41
AnnaBridge 146:22da6e220af6 5435 * @arg @ref LL_RCC_PLLI2SM_DIV_42
AnnaBridge 146:22da6e220af6 5436 * @arg @ref LL_RCC_PLLI2SM_DIV_43
AnnaBridge 146:22da6e220af6 5437 * @arg @ref LL_RCC_PLLI2SM_DIV_44
AnnaBridge 146:22da6e220af6 5438 * @arg @ref LL_RCC_PLLI2SM_DIV_45
AnnaBridge 146:22da6e220af6 5439 * @arg @ref LL_RCC_PLLI2SM_DIV_46
AnnaBridge 146:22da6e220af6 5440 * @arg @ref LL_RCC_PLLI2SM_DIV_47
AnnaBridge 146:22da6e220af6 5441 * @arg @ref LL_RCC_PLLI2SM_DIV_48
AnnaBridge 146:22da6e220af6 5442 * @arg @ref LL_RCC_PLLI2SM_DIV_49
AnnaBridge 146:22da6e220af6 5443 * @arg @ref LL_RCC_PLLI2SM_DIV_50
AnnaBridge 146:22da6e220af6 5444 * @arg @ref LL_RCC_PLLI2SM_DIV_51
AnnaBridge 146:22da6e220af6 5445 * @arg @ref LL_RCC_PLLI2SM_DIV_52
AnnaBridge 146:22da6e220af6 5446 * @arg @ref LL_RCC_PLLI2SM_DIV_53
AnnaBridge 146:22da6e220af6 5447 * @arg @ref LL_RCC_PLLI2SM_DIV_54
AnnaBridge 146:22da6e220af6 5448 * @arg @ref LL_RCC_PLLI2SM_DIV_55
AnnaBridge 146:22da6e220af6 5449 * @arg @ref LL_RCC_PLLI2SM_DIV_56
AnnaBridge 146:22da6e220af6 5450 * @arg @ref LL_RCC_PLLI2SM_DIV_57
AnnaBridge 146:22da6e220af6 5451 * @arg @ref LL_RCC_PLLI2SM_DIV_58
AnnaBridge 146:22da6e220af6 5452 * @arg @ref LL_RCC_PLLI2SM_DIV_59
AnnaBridge 146:22da6e220af6 5453 * @arg @ref LL_RCC_PLLI2SM_DIV_60
AnnaBridge 146:22da6e220af6 5454 * @arg @ref LL_RCC_PLLI2SM_DIV_61
AnnaBridge 146:22da6e220af6 5455 * @arg @ref LL_RCC_PLLI2SM_DIV_62
AnnaBridge 146:22da6e220af6 5456 * @arg @ref LL_RCC_PLLI2SM_DIV_63
AnnaBridge 146:22da6e220af6 5457 * @param PLLN Between 50 and 432
AnnaBridge 146:22da6e220af6 5458 * @param PLLQ This parameter can be one of the following values:
AnnaBridge 146:22da6e220af6 5459 * @arg @ref LL_RCC_PLLI2SQ_DIV_2
AnnaBridge 146:22da6e220af6 5460 * @arg @ref LL_RCC_PLLI2SQ_DIV_3
AnnaBridge 146:22da6e220af6 5461 * @arg @ref LL_RCC_PLLI2SQ_DIV_4
AnnaBridge 146:22da6e220af6 5462 * @arg @ref LL_RCC_PLLI2SQ_DIV_5
AnnaBridge 146:22da6e220af6 5463 * @arg @ref LL_RCC_PLLI2SQ_DIV_6
AnnaBridge 146:22da6e220af6 5464 * @arg @ref LL_RCC_PLLI2SQ_DIV_7
AnnaBridge 146:22da6e220af6 5465 * @arg @ref LL_RCC_PLLI2SQ_DIV_8
AnnaBridge 146:22da6e220af6 5466 * @arg @ref LL_RCC_PLLI2SQ_DIV_9
AnnaBridge 146:22da6e220af6 5467 * @arg @ref LL_RCC_PLLI2SQ_DIV_10
AnnaBridge 146:22da6e220af6 5468 * @arg @ref LL_RCC_PLLI2SQ_DIV_11
AnnaBridge 146:22da6e220af6 5469 * @arg @ref LL_RCC_PLLI2SQ_DIV_12
AnnaBridge 146:22da6e220af6 5470 * @arg @ref LL_RCC_PLLI2SQ_DIV_13
AnnaBridge 146:22da6e220af6 5471 * @arg @ref LL_RCC_PLLI2SQ_DIV_14
AnnaBridge 146:22da6e220af6 5472 * @arg @ref LL_RCC_PLLI2SQ_DIV_15
AnnaBridge 146:22da6e220af6 5473 * @retval None
AnnaBridge 146:22da6e220af6 5474 */
AnnaBridge 146:22da6e220af6 5475 __STATIC_INLINE void LL_RCC_PLLI2S_ConfigDomain_48M(uint32_t Source, uint32_t PLLM, uint32_t PLLN, uint32_t PLLQ)
AnnaBridge 146:22da6e220af6 5476 {
AnnaBridge 146:22da6e220af6 5477 register uint32_t *pReg = (uint32_t *)((uint32_t)((uint32_t)(&RCC->PLLCFGR) + (Source & 0x80U)));
AnnaBridge 146:22da6e220af6 5478 MODIFY_REG(*pReg, RCC_PLLCFGR_PLLSRC, (Source & (~0x80U)));
AnnaBridge 146:22da6e220af6 5479 #if defined(RCC_PLLI2SCFGR_PLLI2SM)
AnnaBridge 146:22da6e220af6 5480 MODIFY_REG(RCC->PLLI2SCFGR, RCC_PLLI2SCFGR_PLLI2SM, PLLM);
AnnaBridge 146:22da6e220af6 5481 #else
AnnaBridge 146:22da6e220af6 5482 MODIFY_REG(RCC->PLLCFGR, RCC_PLLCFGR_PLLM, PLLM);
AnnaBridge 146:22da6e220af6 5483 #endif /* RCC_PLLI2SCFGR_PLLI2SM */
AnnaBridge 146:22da6e220af6 5484 MODIFY_REG(RCC->PLLI2SCFGR, RCC_PLLI2SCFGR_PLLI2SN | RCC_PLLI2SCFGR_PLLI2SQ, PLLN << RCC_PLLI2SCFGR_PLLI2SN_Pos | PLLQ);
AnnaBridge 146:22da6e220af6 5485 }
AnnaBridge 146:22da6e220af6 5486 #endif /* RCC_PLLI2SCFGR_PLLI2SQ && !RCC_DCKCFGR_PLLI2SDIVQ */
AnnaBridge 146:22da6e220af6 5487
AnnaBridge 146:22da6e220af6 5488 #if defined(SPDIFRX)
AnnaBridge 146:22da6e220af6 5489 /**
AnnaBridge 146:22da6e220af6 5490 * @brief Configure PLLI2S used for SPDIFRX domain clock
AnnaBridge 146:22da6e220af6 5491 * @note PLL Source and PLLM Divider can be written only when PLL,
AnnaBridge 146:22da6e220af6 5492 * PLLI2S and PLLSAI(*) are disabled
AnnaBridge 146:22da6e220af6 5493 * @note PLLN/PLLP can be written only when PLLI2S is disabled
AnnaBridge 146:22da6e220af6 5494 * @note This can be selected for SPDIFRX
AnnaBridge 146:22da6e220af6 5495 * @rmtoll PLLCFGR PLLSRC LL_RCC_PLLI2S_ConfigDomain_SPDIFRX\n
AnnaBridge 146:22da6e220af6 5496 * PLLCFGR PLLM LL_RCC_PLLI2S_ConfigDomain_SPDIFRX\n
AnnaBridge 146:22da6e220af6 5497 * PLLI2SCFGR PLLI2SM LL_RCC_PLLI2S_ConfigDomain_SPDIFRX\n
AnnaBridge 146:22da6e220af6 5498 * PLLI2SCFGR PLLI2SN LL_RCC_PLLI2S_ConfigDomain_SPDIFRX\n
AnnaBridge 146:22da6e220af6 5499 * PLLI2SCFGR PLLI2SP LL_RCC_PLLI2S_ConfigDomain_SPDIFRX
AnnaBridge 146:22da6e220af6 5500 * @param Source This parameter can be one of the following values:
AnnaBridge 146:22da6e220af6 5501 * @arg @ref LL_RCC_PLLSOURCE_HSI
AnnaBridge 146:22da6e220af6 5502 * @arg @ref LL_RCC_PLLSOURCE_HSE
AnnaBridge 146:22da6e220af6 5503 * @param PLLM This parameter can be one of the following values:
AnnaBridge 146:22da6e220af6 5504 * @arg @ref LL_RCC_PLLI2SM_DIV_2
AnnaBridge 146:22da6e220af6 5505 * @arg @ref LL_RCC_PLLI2SM_DIV_3
AnnaBridge 146:22da6e220af6 5506 * @arg @ref LL_RCC_PLLI2SM_DIV_4
AnnaBridge 146:22da6e220af6 5507 * @arg @ref LL_RCC_PLLI2SM_DIV_5
AnnaBridge 146:22da6e220af6 5508 * @arg @ref LL_RCC_PLLI2SM_DIV_6
AnnaBridge 146:22da6e220af6 5509 * @arg @ref LL_RCC_PLLI2SM_DIV_7
AnnaBridge 146:22da6e220af6 5510 * @arg @ref LL_RCC_PLLI2SM_DIV_8
AnnaBridge 146:22da6e220af6 5511 * @arg @ref LL_RCC_PLLI2SM_DIV_9
AnnaBridge 146:22da6e220af6 5512 * @arg @ref LL_RCC_PLLI2SM_DIV_10
AnnaBridge 146:22da6e220af6 5513 * @arg @ref LL_RCC_PLLI2SM_DIV_11
AnnaBridge 146:22da6e220af6 5514 * @arg @ref LL_RCC_PLLI2SM_DIV_12
AnnaBridge 146:22da6e220af6 5515 * @arg @ref LL_RCC_PLLI2SM_DIV_13
AnnaBridge 146:22da6e220af6 5516 * @arg @ref LL_RCC_PLLI2SM_DIV_14
AnnaBridge 146:22da6e220af6 5517 * @arg @ref LL_RCC_PLLI2SM_DIV_15
AnnaBridge 146:22da6e220af6 5518 * @arg @ref LL_RCC_PLLI2SM_DIV_16
AnnaBridge 146:22da6e220af6 5519 * @arg @ref LL_RCC_PLLI2SM_DIV_17
AnnaBridge 146:22da6e220af6 5520 * @arg @ref LL_RCC_PLLI2SM_DIV_18
AnnaBridge 146:22da6e220af6 5521 * @arg @ref LL_RCC_PLLI2SM_DIV_19
AnnaBridge 146:22da6e220af6 5522 * @arg @ref LL_RCC_PLLI2SM_DIV_20
AnnaBridge 146:22da6e220af6 5523 * @arg @ref LL_RCC_PLLI2SM_DIV_21
AnnaBridge 146:22da6e220af6 5524 * @arg @ref LL_RCC_PLLI2SM_DIV_22
AnnaBridge 146:22da6e220af6 5525 * @arg @ref LL_RCC_PLLI2SM_DIV_23
AnnaBridge 146:22da6e220af6 5526 * @arg @ref LL_RCC_PLLI2SM_DIV_24
AnnaBridge 146:22da6e220af6 5527 * @arg @ref LL_RCC_PLLI2SM_DIV_25
AnnaBridge 146:22da6e220af6 5528 * @arg @ref LL_RCC_PLLI2SM_DIV_26
AnnaBridge 146:22da6e220af6 5529 * @arg @ref LL_RCC_PLLI2SM_DIV_27
AnnaBridge 146:22da6e220af6 5530 * @arg @ref LL_RCC_PLLI2SM_DIV_28
AnnaBridge 146:22da6e220af6 5531 * @arg @ref LL_RCC_PLLI2SM_DIV_29
AnnaBridge 146:22da6e220af6 5532 * @arg @ref LL_RCC_PLLI2SM_DIV_30
AnnaBridge 146:22da6e220af6 5533 * @arg @ref LL_RCC_PLLI2SM_DIV_31
AnnaBridge 146:22da6e220af6 5534 * @arg @ref LL_RCC_PLLI2SM_DIV_32
AnnaBridge 146:22da6e220af6 5535 * @arg @ref LL_RCC_PLLI2SM_DIV_33
AnnaBridge 146:22da6e220af6 5536 * @arg @ref LL_RCC_PLLI2SM_DIV_34
AnnaBridge 146:22da6e220af6 5537 * @arg @ref LL_RCC_PLLI2SM_DIV_35
AnnaBridge 146:22da6e220af6 5538 * @arg @ref LL_RCC_PLLI2SM_DIV_36
AnnaBridge 146:22da6e220af6 5539 * @arg @ref LL_RCC_PLLI2SM_DIV_37
AnnaBridge 146:22da6e220af6 5540 * @arg @ref LL_RCC_PLLI2SM_DIV_38
AnnaBridge 146:22da6e220af6 5541 * @arg @ref LL_RCC_PLLI2SM_DIV_39
AnnaBridge 146:22da6e220af6 5542 * @arg @ref LL_RCC_PLLI2SM_DIV_40
AnnaBridge 146:22da6e220af6 5543 * @arg @ref LL_RCC_PLLI2SM_DIV_41
AnnaBridge 146:22da6e220af6 5544 * @arg @ref LL_RCC_PLLI2SM_DIV_42
AnnaBridge 146:22da6e220af6 5545 * @arg @ref LL_RCC_PLLI2SM_DIV_43
AnnaBridge 146:22da6e220af6 5546 * @arg @ref LL_RCC_PLLI2SM_DIV_44
AnnaBridge 146:22da6e220af6 5547 * @arg @ref LL_RCC_PLLI2SM_DIV_45
AnnaBridge 146:22da6e220af6 5548 * @arg @ref LL_RCC_PLLI2SM_DIV_46
AnnaBridge 146:22da6e220af6 5549 * @arg @ref LL_RCC_PLLI2SM_DIV_47
AnnaBridge 146:22da6e220af6 5550 * @arg @ref LL_RCC_PLLI2SM_DIV_48
AnnaBridge 146:22da6e220af6 5551 * @arg @ref LL_RCC_PLLI2SM_DIV_49
AnnaBridge 146:22da6e220af6 5552 * @arg @ref LL_RCC_PLLI2SM_DIV_50
AnnaBridge 146:22da6e220af6 5553 * @arg @ref LL_RCC_PLLI2SM_DIV_51
AnnaBridge 146:22da6e220af6 5554 * @arg @ref LL_RCC_PLLI2SM_DIV_52
AnnaBridge 146:22da6e220af6 5555 * @arg @ref LL_RCC_PLLI2SM_DIV_53
AnnaBridge 146:22da6e220af6 5556 * @arg @ref LL_RCC_PLLI2SM_DIV_54
AnnaBridge 146:22da6e220af6 5557 * @arg @ref LL_RCC_PLLI2SM_DIV_55
AnnaBridge 146:22da6e220af6 5558 * @arg @ref LL_RCC_PLLI2SM_DIV_56
AnnaBridge 146:22da6e220af6 5559 * @arg @ref LL_RCC_PLLI2SM_DIV_57
AnnaBridge 146:22da6e220af6 5560 * @arg @ref LL_RCC_PLLI2SM_DIV_58
AnnaBridge 146:22da6e220af6 5561 * @arg @ref LL_RCC_PLLI2SM_DIV_59
AnnaBridge 146:22da6e220af6 5562 * @arg @ref LL_RCC_PLLI2SM_DIV_60
AnnaBridge 146:22da6e220af6 5563 * @arg @ref LL_RCC_PLLI2SM_DIV_61
AnnaBridge 146:22da6e220af6 5564 * @arg @ref LL_RCC_PLLI2SM_DIV_62
AnnaBridge 146:22da6e220af6 5565 * @arg @ref LL_RCC_PLLI2SM_DIV_63
AnnaBridge 146:22da6e220af6 5566 * @param PLLN Between 50 and 432
AnnaBridge 146:22da6e220af6 5567 * @param PLLP This parameter can be one of the following values:
AnnaBridge 146:22da6e220af6 5568 * @arg @ref LL_RCC_PLLI2SP_DIV_2
AnnaBridge 146:22da6e220af6 5569 * @arg @ref LL_RCC_PLLI2SP_DIV_4
AnnaBridge 146:22da6e220af6 5570 * @arg @ref LL_RCC_PLLI2SP_DIV_6
AnnaBridge 146:22da6e220af6 5571 * @arg @ref LL_RCC_PLLI2SP_DIV_8
AnnaBridge 146:22da6e220af6 5572 * @retval None
AnnaBridge 146:22da6e220af6 5573 */
AnnaBridge 146:22da6e220af6 5574 __STATIC_INLINE void LL_RCC_PLLI2S_ConfigDomain_SPDIFRX(uint32_t Source, uint32_t PLLM, uint32_t PLLN, uint32_t PLLP)
AnnaBridge 146:22da6e220af6 5575 {
AnnaBridge 146:22da6e220af6 5576 MODIFY_REG(RCC->PLLCFGR, RCC_PLLCFGR_PLLSRC, Source);
AnnaBridge 146:22da6e220af6 5577 #if defined(RCC_PLLI2SCFGR_PLLI2SM)
AnnaBridge 146:22da6e220af6 5578 MODIFY_REG(RCC->PLLI2SCFGR, RCC_PLLI2SCFGR_PLLI2SM, PLLM);
AnnaBridge 146:22da6e220af6 5579 #else
AnnaBridge 146:22da6e220af6 5580 MODIFY_REG(RCC->PLLCFGR, RCC_PLLCFGR_PLLM, PLLM);
AnnaBridge 146:22da6e220af6 5581 #endif /* RCC_PLLI2SCFGR_PLLI2SM */
AnnaBridge 146:22da6e220af6 5582 MODIFY_REG(RCC->PLLI2SCFGR, RCC_PLLI2SCFGR_PLLI2SN | RCC_PLLI2SCFGR_PLLI2SP, PLLN << RCC_PLLI2SCFGR_PLLI2SN_Pos | PLLP);
AnnaBridge 146:22da6e220af6 5583 }
AnnaBridge 146:22da6e220af6 5584 #endif /* SPDIFRX */
AnnaBridge 146:22da6e220af6 5585
AnnaBridge 146:22da6e220af6 5586 /**
AnnaBridge 146:22da6e220af6 5587 * @brief Configure PLLI2S used for I2S1 domain clock
AnnaBridge 146:22da6e220af6 5588 * @note PLL Source and PLLM Divider can be written only when PLL,
AnnaBridge 146:22da6e220af6 5589 * PLLI2S and PLLSAI(*) are disabled
AnnaBridge 146:22da6e220af6 5590 * @note PLLN/PLLR can be written only when PLLI2S is disabled
AnnaBridge 146:22da6e220af6 5591 * @note This can be selected for I2S
AnnaBridge 146:22da6e220af6 5592 * @rmtoll PLLCFGR PLLSRC LL_RCC_PLLI2S_ConfigDomain_I2S\n
AnnaBridge 146:22da6e220af6 5593 * PLLCFGR PLLM LL_RCC_PLLI2S_ConfigDomain_I2S\n
AnnaBridge 146:22da6e220af6 5594 * PLLI2SCFGR PLLI2SSRC LL_RCC_PLLI2S_ConfigDomain_I2S\n
AnnaBridge 146:22da6e220af6 5595 * PLLI2SCFGR PLLI2SM LL_RCC_PLLI2S_ConfigDomain_I2S\n
AnnaBridge 146:22da6e220af6 5596 * PLLI2SCFGR PLLI2SN LL_RCC_PLLI2S_ConfigDomain_I2S\n
AnnaBridge 146:22da6e220af6 5597 * PLLI2SCFGR PLLI2SR LL_RCC_PLLI2S_ConfigDomain_I2S
AnnaBridge 146:22da6e220af6 5598 * @param Source This parameter can be one of the following values:
AnnaBridge 146:22da6e220af6 5599 * @arg @ref LL_RCC_PLLSOURCE_HSI
AnnaBridge 146:22da6e220af6 5600 * @arg @ref LL_RCC_PLLSOURCE_HSE
AnnaBridge 146:22da6e220af6 5601 * @arg @ref LL_RCC_PLLI2SSOURCE_PIN (*)
AnnaBridge 146:22da6e220af6 5602 *
AnnaBridge 146:22da6e220af6 5603 * (*) value not defined in all devices.
AnnaBridge 146:22da6e220af6 5604 * @param PLLM This parameter can be one of the following values:
AnnaBridge 146:22da6e220af6 5605 * @arg @ref LL_RCC_PLLI2SM_DIV_2
AnnaBridge 146:22da6e220af6 5606 * @arg @ref LL_RCC_PLLI2SM_DIV_3
AnnaBridge 146:22da6e220af6 5607 * @arg @ref LL_RCC_PLLI2SM_DIV_4
AnnaBridge 146:22da6e220af6 5608 * @arg @ref LL_RCC_PLLI2SM_DIV_5
AnnaBridge 146:22da6e220af6 5609 * @arg @ref LL_RCC_PLLI2SM_DIV_6
AnnaBridge 146:22da6e220af6 5610 * @arg @ref LL_RCC_PLLI2SM_DIV_7
AnnaBridge 146:22da6e220af6 5611 * @arg @ref LL_RCC_PLLI2SM_DIV_8
AnnaBridge 146:22da6e220af6 5612 * @arg @ref LL_RCC_PLLI2SM_DIV_9
AnnaBridge 146:22da6e220af6 5613 * @arg @ref LL_RCC_PLLI2SM_DIV_10
AnnaBridge 146:22da6e220af6 5614 * @arg @ref LL_RCC_PLLI2SM_DIV_11
AnnaBridge 146:22da6e220af6 5615 * @arg @ref LL_RCC_PLLI2SM_DIV_12
AnnaBridge 146:22da6e220af6 5616 * @arg @ref LL_RCC_PLLI2SM_DIV_13
AnnaBridge 146:22da6e220af6 5617 * @arg @ref LL_RCC_PLLI2SM_DIV_14
AnnaBridge 146:22da6e220af6 5618 * @arg @ref LL_RCC_PLLI2SM_DIV_15
AnnaBridge 146:22da6e220af6 5619 * @arg @ref LL_RCC_PLLI2SM_DIV_16
AnnaBridge 146:22da6e220af6 5620 * @arg @ref LL_RCC_PLLI2SM_DIV_17
AnnaBridge 146:22da6e220af6 5621 * @arg @ref LL_RCC_PLLI2SM_DIV_18
AnnaBridge 146:22da6e220af6 5622 * @arg @ref LL_RCC_PLLI2SM_DIV_19
AnnaBridge 146:22da6e220af6 5623 * @arg @ref LL_RCC_PLLI2SM_DIV_20
AnnaBridge 146:22da6e220af6 5624 * @arg @ref LL_RCC_PLLI2SM_DIV_21
AnnaBridge 146:22da6e220af6 5625 * @arg @ref LL_RCC_PLLI2SM_DIV_22
AnnaBridge 146:22da6e220af6 5626 * @arg @ref LL_RCC_PLLI2SM_DIV_23
AnnaBridge 146:22da6e220af6 5627 * @arg @ref LL_RCC_PLLI2SM_DIV_24
AnnaBridge 146:22da6e220af6 5628 * @arg @ref LL_RCC_PLLI2SM_DIV_25
AnnaBridge 146:22da6e220af6 5629 * @arg @ref LL_RCC_PLLI2SM_DIV_26
AnnaBridge 146:22da6e220af6 5630 * @arg @ref LL_RCC_PLLI2SM_DIV_27
AnnaBridge 146:22da6e220af6 5631 * @arg @ref LL_RCC_PLLI2SM_DIV_28
AnnaBridge 146:22da6e220af6 5632 * @arg @ref LL_RCC_PLLI2SM_DIV_29
AnnaBridge 146:22da6e220af6 5633 * @arg @ref LL_RCC_PLLI2SM_DIV_30
AnnaBridge 146:22da6e220af6 5634 * @arg @ref LL_RCC_PLLI2SM_DIV_31
AnnaBridge 146:22da6e220af6 5635 * @arg @ref LL_RCC_PLLI2SM_DIV_32
AnnaBridge 146:22da6e220af6 5636 * @arg @ref LL_RCC_PLLI2SM_DIV_33
AnnaBridge 146:22da6e220af6 5637 * @arg @ref LL_RCC_PLLI2SM_DIV_34
AnnaBridge 146:22da6e220af6 5638 * @arg @ref LL_RCC_PLLI2SM_DIV_35
AnnaBridge 146:22da6e220af6 5639 * @arg @ref LL_RCC_PLLI2SM_DIV_36
AnnaBridge 146:22da6e220af6 5640 * @arg @ref LL_RCC_PLLI2SM_DIV_37
AnnaBridge 146:22da6e220af6 5641 * @arg @ref LL_RCC_PLLI2SM_DIV_38
AnnaBridge 146:22da6e220af6 5642 * @arg @ref LL_RCC_PLLI2SM_DIV_39
AnnaBridge 146:22da6e220af6 5643 * @arg @ref LL_RCC_PLLI2SM_DIV_40
AnnaBridge 146:22da6e220af6 5644 * @arg @ref LL_RCC_PLLI2SM_DIV_41
AnnaBridge 146:22da6e220af6 5645 * @arg @ref LL_RCC_PLLI2SM_DIV_42
AnnaBridge 146:22da6e220af6 5646 * @arg @ref LL_RCC_PLLI2SM_DIV_43
AnnaBridge 146:22da6e220af6 5647 * @arg @ref LL_RCC_PLLI2SM_DIV_44
AnnaBridge 146:22da6e220af6 5648 * @arg @ref LL_RCC_PLLI2SM_DIV_45
AnnaBridge 146:22da6e220af6 5649 * @arg @ref LL_RCC_PLLI2SM_DIV_46
AnnaBridge 146:22da6e220af6 5650 * @arg @ref LL_RCC_PLLI2SM_DIV_47
AnnaBridge 146:22da6e220af6 5651 * @arg @ref LL_RCC_PLLI2SM_DIV_48
AnnaBridge 146:22da6e220af6 5652 * @arg @ref LL_RCC_PLLI2SM_DIV_49
AnnaBridge 146:22da6e220af6 5653 * @arg @ref LL_RCC_PLLI2SM_DIV_50
AnnaBridge 146:22da6e220af6 5654 * @arg @ref LL_RCC_PLLI2SM_DIV_51
AnnaBridge 146:22da6e220af6 5655 * @arg @ref LL_RCC_PLLI2SM_DIV_52
AnnaBridge 146:22da6e220af6 5656 * @arg @ref LL_RCC_PLLI2SM_DIV_53
AnnaBridge 146:22da6e220af6 5657 * @arg @ref LL_RCC_PLLI2SM_DIV_54
AnnaBridge 146:22da6e220af6 5658 * @arg @ref LL_RCC_PLLI2SM_DIV_55
AnnaBridge 146:22da6e220af6 5659 * @arg @ref LL_RCC_PLLI2SM_DIV_56
AnnaBridge 146:22da6e220af6 5660 * @arg @ref LL_RCC_PLLI2SM_DIV_57
AnnaBridge 146:22da6e220af6 5661 * @arg @ref LL_RCC_PLLI2SM_DIV_58
AnnaBridge 146:22da6e220af6 5662 * @arg @ref LL_RCC_PLLI2SM_DIV_59
AnnaBridge 146:22da6e220af6 5663 * @arg @ref LL_RCC_PLLI2SM_DIV_60
AnnaBridge 146:22da6e220af6 5664 * @arg @ref LL_RCC_PLLI2SM_DIV_61
AnnaBridge 146:22da6e220af6 5665 * @arg @ref LL_RCC_PLLI2SM_DIV_62
AnnaBridge 146:22da6e220af6 5666 * @arg @ref LL_RCC_PLLI2SM_DIV_63
AnnaBridge 146:22da6e220af6 5667 * @param PLLN Between 50/192(*) and 432
AnnaBridge 146:22da6e220af6 5668 *
AnnaBridge 146:22da6e220af6 5669 * (*) value not defined in all devices.
AnnaBridge 146:22da6e220af6 5670 * @param PLLR This parameter can be one of the following values:
AnnaBridge 146:22da6e220af6 5671 * @arg @ref LL_RCC_PLLI2SR_DIV_2
AnnaBridge 146:22da6e220af6 5672 * @arg @ref LL_RCC_PLLI2SR_DIV_3
AnnaBridge 146:22da6e220af6 5673 * @arg @ref LL_RCC_PLLI2SR_DIV_4
AnnaBridge 146:22da6e220af6 5674 * @arg @ref LL_RCC_PLLI2SR_DIV_5
AnnaBridge 146:22da6e220af6 5675 * @arg @ref LL_RCC_PLLI2SR_DIV_6
AnnaBridge 146:22da6e220af6 5676 * @arg @ref LL_RCC_PLLI2SR_DIV_7
AnnaBridge 146:22da6e220af6 5677 * @retval None
AnnaBridge 146:22da6e220af6 5678 */
AnnaBridge 146:22da6e220af6 5679 __STATIC_INLINE void LL_RCC_PLLI2S_ConfigDomain_I2S(uint32_t Source, uint32_t PLLM, uint32_t PLLN, uint32_t PLLR)
AnnaBridge 146:22da6e220af6 5680 {
AnnaBridge 146:22da6e220af6 5681 register uint32_t *pReg = (uint32_t *)((uint32_t)((uint32_t)(&RCC->PLLCFGR) + (Source & 0x80U)));
AnnaBridge 146:22da6e220af6 5682 MODIFY_REG(*pReg, RCC_PLLCFGR_PLLSRC, (Source & (~0x80U)));
AnnaBridge 146:22da6e220af6 5683 #if defined(RCC_PLLI2SCFGR_PLLI2SM)
AnnaBridge 146:22da6e220af6 5684 MODIFY_REG(RCC->PLLI2SCFGR, RCC_PLLI2SCFGR_PLLI2SM, PLLM);
AnnaBridge 146:22da6e220af6 5685 #else
AnnaBridge 146:22da6e220af6 5686 MODIFY_REG(RCC->PLLCFGR, RCC_PLLCFGR_PLLM, PLLM);
AnnaBridge 146:22da6e220af6 5687 #endif /* RCC_PLLI2SCFGR_PLLI2SM */
AnnaBridge 146:22da6e220af6 5688 MODIFY_REG(RCC->PLLI2SCFGR, RCC_PLLI2SCFGR_PLLI2SN | RCC_PLLI2SCFGR_PLLI2SR, PLLN << RCC_PLLI2SCFGR_PLLI2SN_Pos | PLLR);
AnnaBridge 146:22da6e220af6 5689 }
AnnaBridge 146:22da6e220af6 5690
AnnaBridge 146:22da6e220af6 5691 /**
AnnaBridge 146:22da6e220af6 5692 * @brief Get I2SPLL multiplication factor for VCO
AnnaBridge 146:22da6e220af6 5693 * @rmtoll PLLI2SCFGR PLLI2SN LL_RCC_PLLI2S_GetN
AnnaBridge 146:22da6e220af6 5694 * @retval Between 50/192(*) and 432
AnnaBridge 146:22da6e220af6 5695 *
AnnaBridge 146:22da6e220af6 5696 * (*) value not defined in all devices.
AnnaBridge 146:22da6e220af6 5697 */
AnnaBridge 146:22da6e220af6 5698 __STATIC_INLINE uint32_t LL_RCC_PLLI2S_GetN(void)
AnnaBridge 146:22da6e220af6 5699 {
AnnaBridge 146:22da6e220af6 5700 return (uint32_t)(READ_BIT(RCC->PLLI2SCFGR, RCC_PLLI2SCFGR_PLLI2SN) >> RCC_PLLI2SCFGR_PLLI2SN_Pos);
AnnaBridge 146:22da6e220af6 5701 }
AnnaBridge 146:22da6e220af6 5702
AnnaBridge 146:22da6e220af6 5703 #if defined(RCC_PLLI2SCFGR_PLLI2SQ)
AnnaBridge 146:22da6e220af6 5704 /**
AnnaBridge 146:22da6e220af6 5705 * @brief Get I2SPLL division factor for PLLI2SQ
AnnaBridge 146:22da6e220af6 5706 * @rmtoll PLLI2SCFGR PLLI2SQ LL_RCC_PLLI2S_GetQ
AnnaBridge 146:22da6e220af6 5707 * @retval Returned value can be one of the following values:
AnnaBridge 146:22da6e220af6 5708 * @arg @ref LL_RCC_PLLI2SQ_DIV_2
AnnaBridge 146:22da6e220af6 5709 * @arg @ref LL_RCC_PLLI2SQ_DIV_3
AnnaBridge 146:22da6e220af6 5710 * @arg @ref LL_RCC_PLLI2SQ_DIV_4
AnnaBridge 146:22da6e220af6 5711 * @arg @ref LL_RCC_PLLI2SQ_DIV_5
AnnaBridge 146:22da6e220af6 5712 * @arg @ref LL_RCC_PLLI2SQ_DIV_6
AnnaBridge 146:22da6e220af6 5713 * @arg @ref LL_RCC_PLLI2SQ_DIV_7
AnnaBridge 146:22da6e220af6 5714 * @arg @ref LL_RCC_PLLI2SQ_DIV_8
AnnaBridge 146:22da6e220af6 5715 * @arg @ref LL_RCC_PLLI2SQ_DIV_9
AnnaBridge 146:22da6e220af6 5716 * @arg @ref LL_RCC_PLLI2SQ_DIV_10
AnnaBridge 146:22da6e220af6 5717 * @arg @ref LL_RCC_PLLI2SQ_DIV_11
AnnaBridge 146:22da6e220af6 5718 * @arg @ref LL_RCC_PLLI2SQ_DIV_12
AnnaBridge 146:22da6e220af6 5719 * @arg @ref LL_RCC_PLLI2SQ_DIV_13
AnnaBridge 146:22da6e220af6 5720 * @arg @ref LL_RCC_PLLI2SQ_DIV_14
AnnaBridge 146:22da6e220af6 5721 * @arg @ref LL_RCC_PLLI2SQ_DIV_15
AnnaBridge 146:22da6e220af6 5722 */
AnnaBridge 146:22da6e220af6 5723 __STATIC_INLINE uint32_t LL_RCC_PLLI2S_GetQ(void)
AnnaBridge 146:22da6e220af6 5724 {
AnnaBridge 146:22da6e220af6 5725 return (uint32_t)(READ_BIT(RCC->PLLI2SCFGR, RCC_PLLI2SCFGR_PLLI2SQ));
AnnaBridge 146:22da6e220af6 5726 }
AnnaBridge 146:22da6e220af6 5727 #endif /* RCC_PLLI2SCFGR_PLLI2SQ */
AnnaBridge 146:22da6e220af6 5728
AnnaBridge 146:22da6e220af6 5729 /**
AnnaBridge 146:22da6e220af6 5730 * @brief Get I2SPLL division factor for PLLI2SR
AnnaBridge 146:22da6e220af6 5731 * @note used for PLLI2SCLK (I2S clock)
AnnaBridge 146:22da6e220af6 5732 * @rmtoll PLLI2SCFGR PLLI2SR LL_RCC_PLLI2S_GetR
AnnaBridge 146:22da6e220af6 5733 * @retval Returned value can be one of the following values:
AnnaBridge 146:22da6e220af6 5734 * @arg @ref LL_RCC_PLLI2SR_DIV_2
AnnaBridge 146:22da6e220af6 5735 * @arg @ref LL_RCC_PLLI2SR_DIV_3
AnnaBridge 146:22da6e220af6 5736 * @arg @ref LL_RCC_PLLI2SR_DIV_4
AnnaBridge 146:22da6e220af6 5737 * @arg @ref LL_RCC_PLLI2SR_DIV_5
AnnaBridge 146:22da6e220af6 5738 * @arg @ref LL_RCC_PLLI2SR_DIV_6
AnnaBridge 146:22da6e220af6 5739 * @arg @ref LL_RCC_PLLI2SR_DIV_7
AnnaBridge 146:22da6e220af6 5740 */
AnnaBridge 146:22da6e220af6 5741 __STATIC_INLINE uint32_t LL_RCC_PLLI2S_GetR(void)
AnnaBridge 146:22da6e220af6 5742 {
AnnaBridge 146:22da6e220af6 5743 return (uint32_t)(READ_BIT(RCC->PLLI2SCFGR, RCC_PLLI2SCFGR_PLLI2SR));
AnnaBridge 146:22da6e220af6 5744 }
AnnaBridge 146:22da6e220af6 5745
AnnaBridge 146:22da6e220af6 5746 #if defined(RCC_PLLI2SCFGR_PLLI2SP)
AnnaBridge 146:22da6e220af6 5747 /**
AnnaBridge 146:22da6e220af6 5748 * @brief Get I2SPLL division factor for PLLI2SP
AnnaBridge 146:22da6e220af6 5749 * @note used for PLLSPDIFRXCLK (SPDIFRX clock)
AnnaBridge 146:22da6e220af6 5750 * @rmtoll PLLI2SCFGR PLLI2SP LL_RCC_PLLI2S_GetP
AnnaBridge 146:22da6e220af6 5751 * @retval Returned value can be one of the following values:
AnnaBridge 146:22da6e220af6 5752 * @arg @ref LL_RCC_PLLI2SP_DIV_2
AnnaBridge 146:22da6e220af6 5753 * @arg @ref LL_RCC_PLLI2SP_DIV_4
AnnaBridge 146:22da6e220af6 5754 * @arg @ref LL_RCC_PLLI2SP_DIV_6
AnnaBridge 146:22da6e220af6 5755 * @arg @ref LL_RCC_PLLI2SP_DIV_8
AnnaBridge 146:22da6e220af6 5756 */
AnnaBridge 146:22da6e220af6 5757 __STATIC_INLINE uint32_t LL_RCC_PLLI2S_GetP(void)
AnnaBridge 146:22da6e220af6 5758 {
AnnaBridge 146:22da6e220af6 5759 return (uint32_t)(READ_BIT(RCC->PLLI2SCFGR, RCC_PLLI2SCFGR_PLLI2SP));
AnnaBridge 146:22da6e220af6 5760 }
AnnaBridge 146:22da6e220af6 5761 #endif /* RCC_PLLI2SCFGR_PLLI2SP */
AnnaBridge 146:22da6e220af6 5762
AnnaBridge 146:22da6e220af6 5763 #if defined(RCC_DCKCFGR_PLLI2SDIVQ)
AnnaBridge 146:22da6e220af6 5764 /**
AnnaBridge 146:22da6e220af6 5765 * @brief Get I2SPLL division factor for PLLI2SDIVQ
AnnaBridge 146:22da6e220af6 5766 * @note used PLLSAICLK selected (SAI clock)
AnnaBridge 146:22da6e220af6 5767 * @rmtoll DCKCFGR PLLI2SDIVQ LL_RCC_PLLI2S_GetDIVQ
AnnaBridge 146:22da6e220af6 5768 * @retval Returned value can be one of the following values:
AnnaBridge 146:22da6e220af6 5769 * @arg @ref LL_RCC_PLLI2SDIVQ_DIV_1
AnnaBridge 146:22da6e220af6 5770 * @arg @ref LL_RCC_PLLI2SDIVQ_DIV_2
AnnaBridge 146:22da6e220af6 5771 * @arg @ref LL_RCC_PLLI2SDIVQ_DIV_3
AnnaBridge 146:22da6e220af6 5772 * @arg @ref LL_RCC_PLLI2SDIVQ_DIV_4
AnnaBridge 146:22da6e220af6 5773 * @arg @ref LL_RCC_PLLI2SDIVQ_DIV_5
AnnaBridge 146:22da6e220af6 5774 * @arg @ref LL_RCC_PLLI2SDIVQ_DIV_6
AnnaBridge 146:22da6e220af6 5775 * @arg @ref LL_RCC_PLLI2SDIVQ_DIV_7
AnnaBridge 146:22da6e220af6 5776 * @arg @ref LL_RCC_PLLI2SDIVQ_DIV_8
AnnaBridge 146:22da6e220af6 5777 * @arg @ref LL_RCC_PLLI2SDIVQ_DIV_9
AnnaBridge 146:22da6e220af6 5778 * @arg @ref LL_RCC_PLLI2SDIVQ_DIV_10
AnnaBridge 146:22da6e220af6 5779 * @arg @ref LL_RCC_PLLI2SDIVQ_DIV_11
AnnaBridge 146:22da6e220af6 5780 * @arg @ref LL_RCC_PLLI2SDIVQ_DIV_12
AnnaBridge 146:22da6e220af6 5781 * @arg @ref LL_RCC_PLLI2SDIVQ_DIV_13
AnnaBridge 146:22da6e220af6 5782 * @arg @ref LL_RCC_PLLI2SDIVQ_DIV_14
AnnaBridge 146:22da6e220af6 5783 * @arg @ref LL_RCC_PLLI2SDIVQ_DIV_15
AnnaBridge 146:22da6e220af6 5784 * @arg @ref LL_RCC_PLLI2SDIVQ_DIV_16
AnnaBridge 146:22da6e220af6 5785 * @arg @ref LL_RCC_PLLI2SDIVQ_DIV_17
AnnaBridge 146:22da6e220af6 5786 * @arg @ref LL_RCC_PLLI2SDIVQ_DIV_18
AnnaBridge 146:22da6e220af6 5787 * @arg @ref LL_RCC_PLLI2SDIVQ_DIV_19
AnnaBridge 146:22da6e220af6 5788 * @arg @ref LL_RCC_PLLI2SDIVQ_DIV_20
AnnaBridge 146:22da6e220af6 5789 * @arg @ref LL_RCC_PLLI2SDIVQ_DIV_21
AnnaBridge 146:22da6e220af6 5790 * @arg @ref LL_RCC_PLLI2SDIVQ_DIV_22
AnnaBridge 146:22da6e220af6 5791 * @arg @ref LL_RCC_PLLI2SDIVQ_DIV_23
AnnaBridge 146:22da6e220af6 5792 * @arg @ref LL_RCC_PLLI2SDIVQ_DIV_24
AnnaBridge 146:22da6e220af6 5793 * @arg @ref LL_RCC_PLLI2SDIVQ_DIV_25
AnnaBridge 146:22da6e220af6 5794 * @arg @ref LL_RCC_PLLI2SDIVQ_DIV_26
AnnaBridge 146:22da6e220af6 5795 * @arg @ref LL_RCC_PLLI2SDIVQ_DIV_27
AnnaBridge 146:22da6e220af6 5796 * @arg @ref LL_RCC_PLLI2SDIVQ_DIV_28
AnnaBridge 146:22da6e220af6 5797 * @arg @ref LL_RCC_PLLI2SDIVQ_DIV_29
AnnaBridge 146:22da6e220af6 5798 * @arg @ref LL_RCC_PLLI2SDIVQ_DIV_30
AnnaBridge 146:22da6e220af6 5799 * @arg @ref LL_RCC_PLLI2SDIVQ_DIV_31
AnnaBridge 146:22da6e220af6 5800 * @arg @ref LL_RCC_PLLI2SDIVQ_DIV_32
AnnaBridge 146:22da6e220af6 5801 */
AnnaBridge 146:22da6e220af6 5802 __STATIC_INLINE uint32_t LL_RCC_PLLI2S_GetDIVQ(void)
AnnaBridge 146:22da6e220af6 5803 {
AnnaBridge 146:22da6e220af6 5804 return (uint32_t)(READ_BIT(RCC->DCKCFGR, RCC_DCKCFGR_PLLI2SDIVQ));
AnnaBridge 146:22da6e220af6 5805 }
AnnaBridge 146:22da6e220af6 5806 #endif /* RCC_DCKCFGR_PLLI2SDIVQ */
AnnaBridge 146:22da6e220af6 5807
AnnaBridge 146:22da6e220af6 5808 #if defined(RCC_DCKCFGR_PLLI2SDIVR)
AnnaBridge 146:22da6e220af6 5809 /**
AnnaBridge 146:22da6e220af6 5810 * @brief Get I2SPLL division factor for PLLI2SDIVR
AnnaBridge 146:22da6e220af6 5811 * @note used PLLSAICLK selected (SAI clock)
AnnaBridge 146:22da6e220af6 5812 * @rmtoll DCKCFGR PLLI2SDIVR LL_RCC_PLLI2S_GetDIVR
AnnaBridge 146:22da6e220af6 5813 * @retval Returned value can be one of the following values:
AnnaBridge 146:22da6e220af6 5814 * @arg @ref LL_RCC_PLLI2SDIVR_DIV_1
AnnaBridge 146:22da6e220af6 5815 * @arg @ref LL_RCC_PLLI2SDIVR_DIV_2
AnnaBridge 146:22da6e220af6 5816 * @arg @ref LL_RCC_PLLI2SDIVR_DIV_3
AnnaBridge 146:22da6e220af6 5817 * @arg @ref LL_RCC_PLLI2SDIVR_DIV_4
AnnaBridge 146:22da6e220af6 5818 * @arg @ref LL_RCC_PLLI2SDIVR_DIV_5
AnnaBridge 146:22da6e220af6 5819 * @arg @ref LL_RCC_PLLI2SDIVR_DIV_6
AnnaBridge 146:22da6e220af6 5820 * @arg @ref LL_RCC_PLLI2SDIVR_DIV_7
AnnaBridge 146:22da6e220af6 5821 * @arg @ref LL_RCC_PLLI2SDIVR_DIV_8
AnnaBridge 146:22da6e220af6 5822 * @arg @ref LL_RCC_PLLI2SDIVR_DIV_9
AnnaBridge 146:22da6e220af6 5823 * @arg @ref LL_RCC_PLLI2SDIVR_DIV_10
AnnaBridge 146:22da6e220af6 5824 * @arg @ref LL_RCC_PLLI2SDIVR_DIV_11
AnnaBridge 146:22da6e220af6 5825 * @arg @ref LL_RCC_PLLI2SDIVR_DIV_12
AnnaBridge 146:22da6e220af6 5826 * @arg @ref LL_RCC_PLLI2SDIVR_DIV_13
AnnaBridge 146:22da6e220af6 5827 * @arg @ref LL_RCC_PLLI2SDIVR_DIV_14
AnnaBridge 146:22da6e220af6 5828 * @arg @ref LL_RCC_PLLI2SDIVR_DIV_15
AnnaBridge 146:22da6e220af6 5829 * @arg @ref LL_RCC_PLLI2SDIVR_DIV_16
AnnaBridge 146:22da6e220af6 5830 * @arg @ref LL_RCC_PLLI2SDIVR_DIV_17
AnnaBridge 146:22da6e220af6 5831 * @arg @ref LL_RCC_PLLI2SDIVR_DIV_18
AnnaBridge 146:22da6e220af6 5832 * @arg @ref LL_RCC_PLLI2SDIVR_DIV_19
AnnaBridge 146:22da6e220af6 5833 * @arg @ref LL_RCC_PLLI2SDIVR_DIV_20
AnnaBridge 146:22da6e220af6 5834 * @arg @ref LL_RCC_PLLI2SDIVR_DIV_21
AnnaBridge 146:22da6e220af6 5835 * @arg @ref LL_RCC_PLLI2SDIVR_DIV_22
AnnaBridge 146:22da6e220af6 5836 * @arg @ref LL_RCC_PLLI2SDIVR_DIV_23
AnnaBridge 146:22da6e220af6 5837 * @arg @ref LL_RCC_PLLI2SDIVR_DIV_24
AnnaBridge 146:22da6e220af6 5838 * @arg @ref LL_RCC_PLLI2SDIVR_DIV_25
AnnaBridge 146:22da6e220af6 5839 * @arg @ref LL_RCC_PLLI2SDIVR_DIV_26
AnnaBridge 146:22da6e220af6 5840 * @arg @ref LL_RCC_PLLI2SDIVR_DIV_27
AnnaBridge 146:22da6e220af6 5841 * @arg @ref LL_RCC_PLLI2SDIVR_DIV_28
AnnaBridge 146:22da6e220af6 5842 * @arg @ref LL_RCC_PLLI2SDIVR_DIV_29
AnnaBridge 146:22da6e220af6 5843 * @arg @ref LL_RCC_PLLI2SDIVR_DIV_30
AnnaBridge 146:22da6e220af6 5844 * @arg @ref LL_RCC_PLLI2SDIVR_DIV_31
AnnaBridge 146:22da6e220af6 5845 */
AnnaBridge 146:22da6e220af6 5846 __STATIC_INLINE uint32_t LL_RCC_PLLI2S_GetDIVR(void)
AnnaBridge 146:22da6e220af6 5847 {
AnnaBridge 146:22da6e220af6 5848 return (uint32_t)(READ_BIT(RCC->DCKCFGR, RCC_DCKCFGR_PLLI2SDIVR));
AnnaBridge 146:22da6e220af6 5849 }
AnnaBridge 146:22da6e220af6 5850 #endif /* RCC_DCKCFGR_PLLI2SDIVR */
AnnaBridge 146:22da6e220af6 5851
AnnaBridge 146:22da6e220af6 5852 /**
AnnaBridge 146:22da6e220af6 5853 * @brief Get division factor for PLLI2S input clock
AnnaBridge 146:22da6e220af6 5854 * @rmtoll PLLCFGR PLLM LL_RCC_PLLI2S_GetDivider\n
AnnaBridge 146:22da6e220af6 5855 * PLLI2SCFGR PLLI2SM LL_RCC_PLLI2S_GetDivider
AnnaBridge 146:22da6e220af6 5856 * @retval Returned value can be one of the following values:
AnnaBridge 146:22da6e220af6 5857 * @arg @ref LL_RCC_PLLI2SM_DIV_2
AnnaBridge 146:22da6e220af6 5858 * @arg @ref LL_RCC_PLLI2SM_DIV_3
AnnaBridge 146:22da6e220af6 5859 * @arg @ref LL_RCC_PLLI2SM_DIV_4
AnnaBridge 146:22da6e220af6 5860 * @arg @ref LL_RCC_PLLI2SM_DIV_5
AnnaBridge 146:22da6e220af6 5861 * @arg @ref LL_RCC_PLLI2SM_DIV_6
AnnaBridge 146:22da6e220af6 5862 * @arg @ref LL_RCC_PLLI2SM_DIV_7
AnnaBridge 146:22da6e220af6 5863 * @arg @ref LL_RCC_PLLI2SM_DIV_8
AnnaBridge 146:22da6e220af6 5864 * @arg @ref LL_RCC_PLLI2SM_DIV_9
AnnaBridge 146:22da6e220af6 5865 * @arg @ref LL_RCC_PLLI2SM_DIV_10
AnnaBridge 146:22da6e220af6 5866 * @arg @ref LL_RCC_PLLI2SM_DIV_11
AnnaBridge 146:22da6e220af6 5867 * @arg @ref LL_RCC_PLLI2SM_DIV_12
AnnaBridge 146:22da6e220af6 5868 * @arg @ref LL_RCC_PLLI2SM_DIV_13
AnnaBridge 146:22da6e220af6 5869 * @arg @ref LL_RCC_PLLI2SM_DIV_14
AnnaBridge 146:22da6e220af6 5870 * @arg @ref LL_RCC_PLLI2SM_DIV_15
AnnaBridge 146:22da6e220af6 5871 * @arg @ref LL_RCC_PLLI2SM_DIV_16
AnnaBridge 146:22da6e220af6 5872 * @arg @ref LL_RCC_PLLI2SM_DIV_17
AnnaBridge 146:22da6e220af6 5873 * @arg @ref LL_RCC_PLLI2SM_DIV_18
AnnaBridge 146:22da6e220af6 5874 * @arg @ref LL_RCC_PLLI2SM_DIV_19
AnnaBridge 146:22da6e220af6 5875 * @arg @ref LL_RCC_PLLI2SM_DIV_20
AnnaBridge 146:22da6e220af6 5876 * @arg @ref LL_RCC_PLLI2SM_DIV_21
AnnaBridge 146:22da6e220af6 5877 * @arg @ref LL_RCC_PLLI2SM_DIV_22
AnnaBridge 146:22da6e220af6 5878 * @arg @ref LL_RCC_PLLI2SM_DIV_23
AnnaBridge 146:22da6e220af6 5879 * @arg @ref LL_RCC_PLLI2SM_DIV_24
AnnaBridge 146:22da6e220af6 5880 * @arg @ref LL_RCC_PLLI2SM_DIV_25
AnnaBridge 146:22da6e220af6 5881 * @arg @ref LL_RCC_PLLI2SM_DIV_26
AnnaBridge 146:22da6e220af6 5882 * @arg @ref LL_RCC_PLLI2SM_DIV_27
AnnaBridge 146:22da6e220af6 5883 * @arg @ref LL_RCC_PLLI2SM_DIV_28
AnnaBridge 146:22da6e220af6 5884 * @arg @ref LL_RCC_PLLI2SM_DIV_29
AnnaBridge 146:22da6e220af6 5885 * @arg @ref LL_RCC_PLLI2SM_DIV_30
AnnaBridge 146:22da6e220af6 5886 * @arg @ref LL_RCC_PLLI2SM_DIV_31
AnnaBridge 146:22da6e220af6 5887 * @arg @ref LL_RCC_PLLI2SM_DIV_32
AnnaBridge 146:22da6e220af6 5888 * @arg @ref LL_RCC_PLLI2SM_DIV_33
AnnaBridge 146:22da6e220af6 5889 * @arg @ref LL_RCC_PLLI2SM_DIV_34
AnnaBridge 146:22da6e220af6 5890 * @arg @ref LL_RCC_PLLI2SM_DIV_35
AnnaBridge 146:22da6e220af6 5891 * @arg @ref LL_RCC_PLLI2SM_DIV_36
AnnaBridge 146:22da6e220af6 5892 * @arg @ref LL_RCC_PLLI2SM_DIV_37
AnnaBridge 146:22da6e220af6 5893 * @arg @ref LL_RCC_PLLI2SM_DIV_38
AnnaBridge 146:22da6e220af6 5894 * @arg @ref LL_RCC_PLLI2SM_DIV_39
AnnaBridge 146:22da6e220af6 5895 * @arg @ref LL_RCC_PLLI2SM_DIV_40
AnnaBridge 146:22da6e220af6 5896 * @arg @ref LL_RCC_PLLI2SM_DIV_41
AnnaBridge 146:22da6e220af6 5897 * @arg @ref LL_RCC_PLLI2SM_DIV_42
AnnaBridge 146:22da6e220af6 5898 * @arg @ref LL_RCC_PLLI2SM_DIV_43
AnnaBridge 146:22da6e220af6 5899 * @arg @ref LL_RCC_PLLI2SM_DIV_44
AnnaBridge 146:22da6e220af6 5900 * @arg @ref LL_RCC_PLLI2SM_DIV_45
AnnaBridge 146:22da6e220af6 5901 * @arg @ref LL_RCC_PLLI2SM_DIV_46
AnnaBridge 146:22da6e220af6 5902 * @arg @ref LL_RCC_PLLI2SM_DIV_47
AnnaBridge 146:22da6e220af6 5903 * @arg @ref LL_RCC_PLLI2SM_DIV_48
AnnaBridge 146:22da6e220af6 5904 * @arg @ref LL_RCC_PLLI2SM_DIV_49
AnnaBridge 146:22da6e220af6 5905 * @arg @ref LL_RCC_PLLI2SM_DIV_50
AnnaBridge 146:22da6e220af6 5906 * @arg @ref LL_RCC_PLLI2SM_DIV_51
AnnaBridge 146:22da6e220af6 5907 * @arg @ref LL_RCC_PLLI2SM_DIV_52
AnnaBridge 146:22da6e220af6 5908 * @arg @ref LL_RCC_PLLI2SM_DIV_53
AnnaBridge 146:22da6e220af6 5909 * @arg @ref LL_RCC_PLLI2SM_DIV_54
AnnaBridge 146:22da6e220af6 5910 * @arg @ref LL_RCC_PLLI2SM_DIV_55
AnnaBridge 146:22da6e220af6 5911 * @arg @ref LL_RCC_PLLI2SM_DIV_56
AnnaBridge 146:22da6e220af6 5912 * @arg @ref LL_RCC_PLLI2SM_DIV_57
AnnaBridge 146:22da6e220af6 5913 * @arg @ref LL_RCC_PLLI2SM_DIV_58
AnnaBridge 146:22da6e220af6 5914 * @arg @ref LL_RCC_PLLI2SM_DIV_59
AnnaBridge 146:22da6e220af6 5915 * @arg @ref LL_RCC_PLLI2SM_DIV_60
AnnaBridge 146:22da6e220af6 5916 * @arg @ref LL_RCC_PLLI2SM_DIV_61
AnnaBridge 146:22da6e220af6 5917 * @arg @ref LL_RCC_PLLI2SM_DIV_62
AnnaBridge 146:22da6e220af6 5918 * @arg @ref LL_RCC_PLLI2SM_DIV_63
AnnaBridge 146:22da6e220af6 5919 */
AnnaBridge 146:22da6e220af6 5920 __STATIC_INLINE uint32_t LL_RCC_PLLI2S_GetDivider(void)
AnnaBridge 146:22da6e220af6 5921 {
AnnaBridge 146:22da6e220af6 5922 #if defined(RCC_PLLI2SCFGR_PLLI2SM)
AnnaBridge 146:22da6e220af6 5923 return (uint32_t)(READ_BIT(RCC->PLLI2SCFGR, RCC_PLLI2SCFGR_PLLI2SM));
AnnaBridge 146:22da6e220af6 5924 #else
AnnaBridge 146:22da6e220af6 5925 return (uint32_t)(READ_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLLM));
AnnaBridge 146:22da6e220af6 5926 #endif /* RCC_PLLI2SCFGR_PLLI2SM */
AnnaBridge 146:22da6e220af6 5927 }
AnnaBridge 146:22da6e220af6 5928
AnnaBridge 146:22da6e220af6 5929 /**
AnnaBridge 146:22da6e220af6 5930 * @brief Get the oscillator used as PLL clock source.
AnnaBridge 146:22da6e220af6 5931 * @rmtoll PLLCFGR PLLSRC LL_RCC_PLLI2S_GetMainSource\n
AnnaBridge 146:22da6e220af6 5932 * PLLI2SCFGR PLLI2SSRC LL_RCC_PLLI2S_GetMainSource
AnnaBridge 146:22da6e220af6 5933 * @retval Returned value can be one of the following values:
AnnaBridge 146:22da6e220af6 5934 * @arg @ref LL_RCC_PLLSOURCE_HSI
AnnaBridge 146:22da6e220af6 5935 * @arg @ref LL_RCC_PLLSOURCE_HSE
AnnaBridge 146:22da6e220af6 5936 * @arg @ref LL_RCC_PLLI2SSOURCE_PIN (*)
AnnaBridge 146:22da6e220af6 5937 *
AnnaBridge 146:22da6e220af6 5938 * (*) value not defined in all devices.
AnnaBridge 146:22da6e220af6 5939 */
AnnaBridge 146:22da6e220af6 5940 __STATIC_INLINE uint32_t LL_RCC_PLLI2S_GetMainSource(void)
AnnaBridge 146:22da6e220af6 5941 {
AnnaBridge 146:22da6e220af6 5942 #if defined(RCC_PLLI2SCFGR_PLLI2SSRC)
AnnaBridge 146:22da6e220af6 5943 register uint32_t pllsrc = READ_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLLSRC);
AnnaBridge 146:22da6e220af6 5944 register uint32_t plli2sssrc0 = READ_BIT(RCC->PLLI2SCFGR, RCC_PLLI2SCFGR_PLLI2SSRC);
AnnaBridge 146:22da6e220af6 5945 register uint32_t plli2sssrc1 = READ_BIT(RCC->PLLI2SCFGR, RCC_PLLI2SCFGR_PLLI2SSRC) >> 15U;
AnnaBridge 146:22da6e220af6 5946 return (uint32_t)(pllsrc | plli2sssrc0 | plli2sssrc1);
AnnaBridge 146:22da6e220af6 5947 #else
AnnaBridge 146:22da6e220af6 5948 return (uint32_t)(READ_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLLSRC));
AnnaBridge 146:22da6e220af6 5949 #endif /* RCC_PLLI2SCFGR_PLLI2SSRC */
AnnaBridge 146:22da6e220af6 5950 }
AnnaBridge 146:22da6e220af6 5951
AnnaBridge 146:22da6e220af6 5952 /**
AnnaBridge 146:22da6e220af6 5953 * @}
AnnaBridge 146:22da6e220af6 5954 */
AnnaBridge 146:22da6e220af6 5955 #endif /* RCC_PLLI2S_SUPPORT */
AnnaBridge 146:22da6e220af6 5956
AnnaBridge 146:22da6e220af6 5957 #if defined(RCC_PLLSAI_SUPPORT)
AnnaBridge 146:22da6e220af6 5958 /** @defgroup RCC_LL_EF_PLLSAI PLLSAI
AnnaBridge 146:22da6e220af6 5959 * @{
AnnaBridge 146:22da6e220af6 5960 */
AnnaBridge 146:22da6e220af6 5961
AnnaBridge 146:22da6e220af6 5962 /**
AnnaBridge 146:22da6e220af6 5963 * @brief Enable PLLSAI
AnnaBridge 146:22da6e220af6 5964 * @rmtoll CR PLLSAION LL_RCC_PLLSAI_Enable
AnnaBridge 146:22da6e220af6 5965 * @retval None
AnnaBridge 146:22da6e220af6 5966 */
AnnaBridge 146:22da6e220af6 5967 __STATIC_INLINE void LL_RCC_PLLSAI_Enable(void)
AnnaBridge 146:22da6e220af6 5968 {
AnnaBridge 146:22da6e220af6 5969 SET_BIT(RCC->CR, RCC_CR_PLLSAION);
AnnaBridge 146:22da6e220af6 5970 }
AnnaBridge 146:22da6e220af6 5971
AnnaBridge 146:22da6e220af6 5972 /**
AnnaBridge 146:22da6e220af6 5973 * @brief Disable PLLSAI
AnnaBridge 146:22da6e220af6 5974 * @rmtoll CR PLLSAION LL_RCC_PLLSAI_Disable
AnnaBridge 146:22da6e220af6 5975 * @retval None
AnnaBridge 146:22da6e220af6 5976 */
AnnaBridge 146:22da6e220af6 5977 __STATIC_INLINE void LL_RCC_PLLSAI_Disable(void)
AnnaBridge 146:22da6e220af6 5978 {
AnnaBridge 146:22da6e220af6 5979 CLEAR_BIT(RCC->CR, RCC_CR_PLLSAION);
AnnaBridge 146:22da6e220af6 5980 }
AnnaBridge 146:22da6e220af6 5981
AnnaBridge 146:22da6e220af6 5982 /**
AnnaBridge 146:22da6e220af6 5983 * @brief Check if PLLSAI Ready
AnnaBridge 146:22da6e220af6 5984 * @rmtoll CR PLLSAIRDY LL_RCC_PLLSAI_IsReady
AnnaBridge 146:22da6e220af6 5985 * @retval State of bit (1 or 0).
AnnaBridge 146:22da6e220af6 5986 */
AnnaBridge 146:22da6e220af6 5987 __STATIC_INLINE uint32_t LL_RCC_PLLSAI_IsReady(void)
AnnaBridge 146:22da6e220af6 5988 {
AnnaBridge 146:22da6e220af6 5989 return (READ_BIT(RCC->CR, RCC_CR_PLLSAIRDY) == (RCC_CR_PLLSAIRDY));
AnnaBridge 146:22da6e220af6 5990 }
AnnaBridge 146:22da6e220af6 5991
AnnaBridge 146:22da6e220af6 5992 /**
AnnaBridge 146:22da6e220af6 5993 * @brief Configure PLLSAI used for SAI domain clock
AnnaBridge 146:22da6e220af6 5994 * @note PLL Source and PLLM Divider can be written only when PLL,
AnnaBridge 146:22da6e220af6 5995 * PLLI2S and PLLSAI(*) are disabled
AnnaBridge 146:22da6e220af6 5996 * @note PLLN/PLLQ can be written only when PLLSAI is disabled
AnnaBridge 146:22da6e220af6 5997 * @note This can be selected for SAI
AnnaBridge 146:22da6e220af6 5998 * @rmtoll PLLCFGR PLLSRC LL_RCC_PLLSAI_ConfigDomain_SAI\n
AnnaBridge 146:22da6e220af6 5999 * PLLCFGR PLLM LL_RCC_PLLSAI_ConfigDomain_SAI\n
AnnaBridge 146:22da6e220af6 6000 * PLLSAICFGR PLLSAIM LL_RCC_PLLSAI_ConfigDomain_SAI\n
AnnaBridge 146:22da6e220af6 6001 * PLLSAICFGR PLLSAIN LL_RCC_PLLSAI_ConfigDomain_SAI\n
AnnaBridge 146:22da6e220af6 6002 * PLLSAICFGR PLLSAIQ LL_RCC_PLLSAI_ConfigDomain_SAI\n
AnnaBridge 146:22da6e220af6 6003 * DCKCFGR PLLSAIDIVQ LL_RCC_PLLSAI_ConfigDomain_SAI
AnnaBridge 146:22da6e220af6 6004 * @param Source This parameter can be one of the following values:
AnnaBridge 146:22da6e220af6 6005 * @arg @ref LL_RCC_PLLSOURCE_HSI
AnnaBridge 146:22da6e220af6 6006 * @arg @ref LL_RCC_PLLSOURCE_HSE
AnnaBridge 146:22da6e220af6 6007 * @param PLLM This parameter can be one of the following values:
AnnaBridge 146:22da6e220af6 6008 * @arg @ref LL_RCC_PLLSAIM_DIV_2
AnnaBridge 146:22da6e220af6 6009 * @arg @ref LL_RCC_PLLSAIM_DIV_3
AnnaBridge 146:22da6e220af6 6010 * @arg @ref LL_RCC_PLLSAIM_DIV_4
AnnaBridge 146:22da6e220af6 6011 * @arg @ref LL_RCC_PLLSAIM_DIV_5
AnnaBridge 146:22da6e220af6 6012 * @arg @ref LL_RCC_PLLSAIM_DIV_6
AnnaBridge 146:22da6e220af6 6013 * @arg @ref LL_RCC_PLLSAIM_DIV_7
AnnaBridge 146:22da6e220af6 6014 * @arg @ref LL_RCC_PLLSAIM_DIV_8
AnnaBridge 146:22da6e220af6 6015 * @arg @ref LL_RCC_PLLSAIM_DIV_9
AnnaBridge 146:22da6e220af6 6016 * @arg @ref LL_RCC_PLLSAIM_DIV_10
AnnaBridge 146:22da6e220af6 6017 * @arg @ref LL_RCC_PLLSAIM_DIV_11
AnnaBridge 146:22da6e220af6 6018 * @arg @ref LL_RCC_PLLSAIM_DIV_12
AnnaBridge 146:22da6e220af6 6019 * @arg @ref LL_RCC_PLLSAIM_DIV_13
AnnaBridge 146:22da6e220af6 6020 * @arg @ref LL_RCC_PLLSAIM_DIV_14
AnnaBridge 146:22da6e220af6 6021 * @arg @ref LL_RCC_PLLSAIM_DIV_15
AnnaBridge 146:22da6e220af6 6022 * @arg @ref LL_RCC_PLLSAIM_DIV_16
AnnaBridge 146:22da6e220af6 6023 * @arg @ref LL_RCC_PLLSAIM_DIV_17
AnnaBridge 146:22da6e220af6 6024 * @arg @ref LL_RCC_PLLSAIM_DIV_18
AnnaBridge 146:22da6e220af6 6025 * @arg @ref LL_RCC_PLLSAIM_DIV_19
AnnaBridge 146:22da6e220af6 6026 * @arg @ref LL_RCC_PLLSAIM_DIV_20
AnnaBridge 146:22da6e220af6 6027 * @arg @ref LL_RCC_PLLSAIM_DIV_21
AnnaBridge 146:22da6e220af6 6028 * @arg @ref LL_RCC_PLLSAIM_DIV_22
AnnaBridge 146:22da6e220af6 6029 * @arg @ref LL_RCC_PLLSAIM_DIV_23
AnnaBridge 146:22da6e220af6 6030 * @arg @ref LL_RCC_PLLSAIM_DIV_24
AnnaBridge 146:22da6e220af6 6031 * @arg @ref LL_RCC_PLLSAIM_DIV_25
AnnaBridge 146:22da6e220af6 6032 * @arg @ref LL_RCC_PLLSAIM_DIV_26
AnnaBridge 146:22da6e220af6 6033 * @arg @ref LL_RCC_PLLSAIM_DIV_27
AnnaBridge 146:22da6e220af6 6034 * @arg @ref LL_RCC_PLLSAIM_DIV_28
AnnaBridge 146:22da6e220af6 6035 * @arg @ref LL_RCC_PLLSAIM_DIV_29
AnnaBridge 146:22da6e220af6 6036 * @arg @ref LL_RCC_PLLSAIM_DIV_30
AnnaBridge 146:22da6e220af6 6037 * @arg @ref LL_RCC_PLLSAIM_DIV_31
AnnaBridge 146:22da6e220af6 6038 * @arg @ref LL_RCC_PLLSAIM_DIV_32
AnnaBridge 146:22da6e220af6 6039 * @arg @ref LL_RCC_PLLSAIM_DIV_33
AnnaBridge 146:22da6e220af6 6040 * @arg @ref LL_RCC_PLLSAIM_DIV_34
AnnaBridge 146:22da6e220af6 6041 * @arg @ref LL_RCC_PLLSAIM_DIV_35
AnnaBridge 146:22da6e220af6 6042 * @arg @ref LL_RCC_PLLSAIM_DIV_36
AnnaBridge 146:22da6e220af6 6043 * @arg @ref LL_RCC_PLLSAIM_DIV_37
AnnaBridge 146:22da6e220af6 6044 * @arg @ref LL_RCC_PLLSAIM_DIV_38
AnnaBridge 146:22da6e220af6 6045 * @arg @ref LL_RCC_PLLSAIM_DIV_39
AnnaBridge 146:22da6e220af6 6046 * @arg @ref LL_RCC_PLLSAIM_DIV_40
AnnaBridge 146:22da6e220af6 6047 * @arg @ref LL_RCC_PLLSAIM_DIV_41
AnnaBridge 146:22da6e220af6 6048 * @arg @ref LL_RCC_PLLSAIM_DIV_42
AnnaBridge 146:22da6e220af6 6049 * @arg @ref LL_RCC_PLLSAIM_DIV_43
AnnaBridge 146:22da6e220af6 6050 * @arg @ref LL_RCC_PLLSAIM_DIV_44
AnnaBridge 146:22da6e220af6 6051 * @arg @ref LL_RCC_PLLSAIM_DIV_45
AnnaBridge 146:22da6e220af6 6052 * @arg @ref LL_RCC_PLLSAIM_DIV_46
AnnaBridge 146:22da6e220af6 6053 * @arg @ref LL_RCC_PLLSAIM_DIV_47
AnnaBridge 146:22da6e220af6 6054 * @arg @ref LL_RCC_PLLSAIM_DIV_48
AnnaBridge 146:22da6e220af6 6055 * @arg @ref LL_RCC_PLLSAIM_DIV_49
AnnaBridge 146:22da6e220af6 6056 * @arg @ref LL_RCC_PLLSAIM_DIV_50
AnnaBridge 146:22da6e220af6 6057 * @arg @ref LL_RCC_PLLSAIM_DIV_51
AnnaBridge 146:22da6e220af6 6058 * @arg @ref LL_RCC_PLLSAIM_DIV_52
AnnaBridge 146:22da6e220af6 6059 * @arg @ref LL_RCC_PLLSAIM_DIV_53
AnnaBridge 146:22da6e220af6 6060 * @arg @ref LL_RCC_PLLSAIM_DIV_54
AnnaBridge 146:22da6e220af6 6061 * @arg @ref LL_RCC_PLLSAIM_DIV_55
AnnaBridge 146:22da6e220af6 6062 * @arg @ref LL_RCC_PLLSAIM_DIV_56
AnnaBridge 146:22da6e220af6 6063 * @arg @ref LL_RCC_PLLSAIM_DIV_57
AnnaBridge 146:22da6e220af6 6064 * @arg @ref LL_RCC_PLLSAIM_DIV_58
AnnaBridge 146:22da6e220af6 6065 * @arg @ref LL_RCC_PLLSAIM_DIV_59
AnnaBridge 146:22da6e220af6 6066 * @arg @ref LL_RCC_PLLSAIM_DIV_60
AnnaBridge 146:22da6e220af6 6067 * @arg @ref LL_RCC_PLLSAIM_DIV_61
AnnaBridge 146:22da6e220af6 6068 * @arg @ref LL_RCC_PLLSAIM_DIV_62
AnnaBridge 146:22da6e220af6 6069 * @arg @ref LL_RCC_PLLSAIM_DIV_63
AnnaBridge 146:22da6e220af6 6070 * @param PLLN Between 49/50(*) and 432
AnnaBridge 146:22da6e220af6 6071 *
AnnaBridge 146:22da6e220af6 6072 * (*) value not defined in all devices.
AnnaBridge 146:22da6e220af6 6073 * @param PLLQ This parameter can be one of the following values:
AnnaBridge 146:22da6e220af6 6074 * @arg @ref LL_RCC_PLLSAIQ_DIV_2
AnnaBridge 146:22da6e220af6 6075 * @arg @ref LL_RCC_PLLSAIQ_DIV_3
AnnaBridge 146:22da6e220af6 6076 * @arg @ref LL_RCC_PLLSAIQ_DIV_4
AnnaBridge 146:22da6e220af6 6077 * @arg @ref LL_RCC_PLLSAIQ_DIV_5
AnnaBridge 146:22da6e220af6 6078 * @arg @ref LL_RCC_PLLSAIQ_DIV_6
AnnaBridge 146:22da6e220af6 6079 * @arg @ref LL_RCC_PLLSAIQ_DIV_7
AnnaBridge 146:22da6e220af6 6080 * @arg @ref LL_RCC_PLLSAIQ_DIV_8
AnnaBridge 146:22da6e220af6 6081 * @arg @ref LL_RCC_PLLSAIQ_DIV_9
AnnaBridge 146:22da6e220af6 6082 * @arg @ref LL_RCC_PLLSAIQ_DIV_10
AnnaBridge 146:22da6e220af6 6083 * @arg @ref LL_RCC_PLLSAIQ_DIV_11
AnnaBridge 146:22da6e220af6 6084 * @arg @ref LL_RCC_PLLSAIQ_DIV_12
AnnaBridge 146:22da6e220af6 6085 * @arg @ref LL_RCC_PLLSAIQ_DIV_13
AnnaBridge 146:22da6e220af6 6086 * @arg @ref LL_RCC_PLLSAIQ_DIV_14
AnnaBridge 146:22da6e220af6 6087 * @arg @ref LL_RCC_PLLSAIQ_DIV_15
AnnaBridge 146:22da6e220af6 6088 * @param PLLDIVQ This parameter can be one of the following values:
AnnaBridge 146:22da6e220af6 6089 * @arg @ref LL_RCC_PLLSAIDIVQ_DIV_1
AnnaBridge 146:22da6e220af6 6090 * @arg @ref LL_RCC_PLLSAIDIVQ_DIV_2
AnnaBridge 146:22da6e220af6 6091 * @arg @ref LL_RCC_PLLSAIDIVQ_DIV_3
AnnaBridge 146:22da6e220af6 6092 * @arg @ref LL_RCC_PLLSAIDIVQ_DIV_4
AnnaBridge 146:22da6e220af6 6093 * @arg @ref LL_RCC_PLLSAIDIVQ_DIV_5
AnnaBridge 146:22da6e220af6 6094 * @arg @ref LL_RCC_PLLSAIDIVQ_DIV_6
AnnaBridge 146:22da6e220af6 6095 * @arg @ref LL_RCC_PLLSAIDIVQ_DIV_7
AnnaBridge 146:22da6e220af6 6096 * @arg @ref LL_RCC_PLLSAIDIVQ_DIV_8
AnnaBridge 146:22da6e220af6 6097 * @arg @ref LL_RCC_PLLSAIDIVQ_DIV_9
AnnaBridge 146:22da6e220af6 6098 * @arg @ref LL_RCC_PLLSAIDIVQ_DIV_10
AnnaBridge 146:22da6e220af6 6099 * @arg @ref LL_RCC_PLLSAIDIVQ_DIV_11
AnnaBridge 146:22da6e220af6 6100 * @arg @ref LL_RCC_PLLSAIDIVQ_DIV_12
AnnaBridge 146:22da6e220af6 6101 * @arg @ref LL_RCC_PLLSAIDIVQ_DIV_13
AnnaBridge 146:22da6e220af6 6102 * @arg @ref LL_RCC_PLLSAIDIVQ_DIV_14
AnnaBridge 146:22da6e220af6 6103 * @arg @ref LL_RCC_PLLSAIDIVQ_DIV_15
AnnaBridge 146:22da6e220af6 6104 * @arg @ref LL_RCC_PLLSAIDIVQ_DIV_16
AnnaBridge 146:22da6e220af6 6105 * @arg @ref LL_RCC_PLLSAIDIVQ_DIV_17
AnnaBridge 146:22da6e220af6 6106 * @arg @ref LL_RCC_PLLSAIDIVQ_DIV_18
AnnaBridge 146:22da6e220af6 6107 * @arg @ref LL_RCC_PLLSAIDIVQ_DIV_19
AnnaBridge 146:22da6e220af6 6108 * @arg @ref LL_RCC_PLLSAIDIVQ_DIV_20
AnnaBridge 146:22da6e220af6 6109 * @arg @ref LL_RCC_PLLSAIDIVQ_DIV_21
AnnaBridge 146:22da6e220af6 6110 * @arg @ref LL_RCC_PLLSAIDIVQ_DIV_22
AnnaBridge 146:22da6e220af6 6111 * @arg @ref LL_RCC_PLLSAIDIVQ_DIV_23
AnnaBridge 146:22da6e220af6 6112 * @arg @ref LL_RCC_PLLSAIDIVQ_DIV_24
AnnaBridge 146:22da6e220af6 6113 * @arg @ref LL_RCC_PLLSAIDIVQ_DIV_25
AnnaBridge 146:22da6e220af6 6114 * @arg @ref LL_RCC_PLLSAIDIVQ_DIV_26
AnnaBridge 146:22da6e220af6 6115 * @arg @ref LL_RCC_PLLSAIDIVQ_DIV_27
AnnaBridge 146:22da6e220af6 6116 * @arg @ref LL_RCC_PLLSAIDIVQ_DIV_28
AnnaBridge 146:22da6e220af6 6117 * @arg @ref LL_RCC_PLLSAIDIVQ_DIV_29
AnnaBridge 146:22da6e220af6 6118 * @arg @ref LL_RCC_PLLSAIDIVQ_DIV_30
AnnaBridge 146:22da6e220af6 6119 * @arg @ref LL_RCC_PLLSAIDIVQ_DIV_31
AnnaBridge 146:22da6e220af6 6120 * @arg @ref LL_RCC_PLLSAIDIVQ_DIV_32
AnnaBridge 146:22da6e220af6 6121 * @retval None
AnnaBridge 146:22da6e220af6 6122 */
AnnaBridge 146:22da6e220af6 6123 __STATIC_INLINE void LL_RCC_PLLSAI_ConfigDomain_SAI(uint32_t Source, uint32_t PLLM, uint32_t PLLN, uint32_t PLLQ, uint32_t PLLDIVQ)
AnnaBridge 146:22da6e220af6 6124 {
AnnaBridge 146:22da6e220af6 6125 MODIFY_REG(RCC->PLLCFGR, RCC_PLLCFGR_PLLSRC, Source);
AnnaBridge 146:22da6e220af6 6126 #if defined(RCC_PLLSAICFGR_PLLSAIM)
AnnaBridge 146:22da6e220af6 6127 MODIFY_REG(RCC->PLLSAICFGR, RCC_PLLSAICFGR_PLLSAIM, PLLM);
AnnaBridge 146:22da6e220af6 6128 #else
AnnaBridge 146:22da6e220af6 6129 MODIFY_REG(RCC->PLLCFGR, RCC_PLLCFGR_PLLM, PLLM);
AnnaBridge 146:22da6e220af6 6130 #endif /* RCC_PLLSAICFGR_PLLSAIM */
AnnaBridge 146:22da6e220af6 6131 MODIFY_REG(RCC->PLLSAICFGR, RCC_PLLSAICFGR_PLLSAIN | RCC_PLLSAICFGR_PLLSAIQ, PLLN << RCC_PLLSAICFGR_PLLSAIN_Pos | PLLQ);
AnnaBridge 146:22da6e220af6 6132 MODIFY_REG(RCC->DCKCFGR, RCC_DCKCFGR_PLLSAIDIVQ, PLLDIVQ);
AnnaBridge 146:22da6e220af6 6133 }
AnnaBridge 146:22da6e220af6 6134
AnnaBridge 146:22da6e220af6 6135 #if defined(RCC_PLLSAICFGR_PLLSAIP)
AnnaBridge 146:22da6e220af6 6136 /**
AnnaBridge 146:22da6e220af6 6137 * @brief Configure PLLSAI used for 48Mhz domain clock
AnnaBridge 146:22da6e220af6 6138 * @note PLL Source and PLLM Divider can be written only when PLL,
AnnaBridge 146:22da6e220af6 6139 * PLLI2S and PLLSAI(*) are disabled
AnnaBridge 146:22da6e220af6 6140 * @note PLLN/PLLP can be written only when PLLSAI is disabled
AnnaBridge 146:22da6e220af6 6141 * @note This can be selected for USB, RNG, SDIO
AnnaBridge 146:22da6e220af6 6142 * @rmtoll PLLCFGR PLLSRC LL_RCC_PLLSAI_ConfigDomain_48M\n
AnnaBridge 146:22da6e220af6 6143 * PLLCFGR PLLM LL_RCC_PLLSAI_ConfigDomain_48M\n
AnnaBridge 146:22da6e220af6 6144 * PLLSAICFGR PLLSAIM LL_RCC_PLLSAI_ConfigDomain_48M\n
AnnaBridge 146:22da6e220af6 6145 * PLLSAICFGR PLLSAIN LL_RCC_PLLSAI_ConfigDomain_48M\n
AnnaBridge 146:22da6e220af6 6146 * PLLSAICFGR PLLSAIP LL_RCC_PLLSAI_ConfigDomain_48M
AnnaBridge 146:22da6e220af6 6147 * @param Source This parameter can be one of the following values:
AnnaBridge 146:22da6e220af6 6148 * @arg @ref LL_RCC_PLLSOURCE_HSI
AnnaBridge 146:22da6e220af6 6149 * @arg @ref LL_RCC_PLLSOURCE_HSE
AnnaBridge 146:22da6e220af6 6150 * @param PLLM This parameter can be one of the following values:
AnnaBridge 146:22da6e220af6 6151 * @arg @ref LL_RCC_PLLSAIM_DIV_2
AnnaBridge 146:22da6e220af6 6152 * @arg @ref LL_RCC_PLLSAIM_DIV_3
AnnaBridge 146:22da6e220af6 6153 * @arg @ref LL_RCC_PLLSAIM_DIV_4
AnnaBridge 146:22da6e220af6 6154 * @arg @ref LL_RCC_PLLSAIM_DIV_5
AnnaBridge 146:22da6e220af6 6155 * @arg @ref LL_RCC_PLLSAIM_DIV_6
AnnaBridge 146:22da6e220af6 6156 * @arg @ref LL_RCC_PLLSAIM_DIV_7
AnnaBridge 146:22da6e220af6 6157 * @arg @ref LL_RCC_PLLSAIM_DIV_8
AnnaBridge 146:22da6e220af6 6158 * @arg @ref LL_RCC_PLLSAIM_DIV_9
AnnaBridge 146:22da6e220af6 6159 * @arg @ref LL_RCC_PLLSAIM_DIV_10
AnnaBridge 146:22da6e220af6 6160 * @arg @ref LL_RCC_PLLSAIM_DIV_11
AnnaBridge 146:22da6e220af6 6161 * @arg @ref LL_RCC_PLLSAIM_DIV_12
AnnaBridge 146:22da6e220af6 6162 * @arg @ref LL_RCC_PLLSAIM_DIV_13
AnnaBridge 146:22da6e220af6 6163 * @arg @ref LL_RCC_PLLSAIM_DIV_14
AnnaBridge 146:22da6e220af6 6164 * @arg @ref LL_RCC_PLLSAIM_DIV_15
AnnaBridge 146:22da6e220af6 6165 * @arg @ref LL_RCC_PLLSAIM_DIV_16
AnnaBridge 146:22da6e220af6 6166 * @arg @ref LL_RCC_PLLSAIM_DIV_17
AnnaBridge 146:22da6e220af6 6167 * @arg @ref LL_RCC_PLLSAIM_DIV_18
AnnaBridge 146:22da6e220af6 6168 * @arg @ref LL_RCC_PLLSAIM_DIV_19
AnnaBridge 146:22da6e220af6 6169 * @arg @ref LL_RCC_PLLSAIM_DIV_20
AnnaBridge 146:22da6e220af6 6170 * @arg @ref LL_RCC_PLLSAIM_DIV_21
AnnaBridge 146:22da6e220af6 6171 * @arg @ref LL_RCC_PLLSAIM_DIV_22
AnnaBridge 146:22da6e220af6 6172 * @arg @ref LL_RCC_PLLSAIM_DIV_23
AnnaBridge 146:22da6e220af6 6173 * @arg @ref LL_RCC_PLLSAIM_DIV_24
AnnaBridge 146:22da6e220af6 6174 * @arg @ref LL_RCC_PLLSAIM_DIV_25
AnnaBridge 146:22da6e220af6 6175 * @arg @ref LL_RCC_PLLSAIM_DIV_26
AnnaBridge 146:22da6e220af6 6176 * @arg @ref LL_RCC_PLLSAIM_DIV_27
AnnaBridge 146:22da6e220af6 6177 * @arg @ref LL_RCC_PLLSAIM_DIV_28
AnnaBridge 146:22da6e220af6 6178 * @arg @ref LL_RCC_PLLSAIM_DIV_29
AnnaBridge 146:22da6e220af6 6179 * @arg @ref LL_RCC_PLLSAIM_DIV_30
AnnaBridge 146:22da6e220af6 6180 * @arg @ref LL_RCC_PLLSAIM_DIV_31
AnnaBridge 146:22da6e220af6 6181 * @arg @ref LL_RCC_PLLSAIM_DIV_32
AnnaBridge 146:22da6e220af6 6182 * @arg @ref LL_RCC_PLLSAIM_DIV_33
AnnaBridge 146:22da6e220af6 6183 * @arg @ref LL_RCC_PLLSAIM_DIV_34
AnnaBridge 146:22da6e220af6 6184 * @arg @ref LL_RCC_PLLSAIM_DIV_35
AnnaBridge 146:22da6e220af6 6185 * @arg @ref LL_RCC_PLLSAIM_DIV_36
AnnaBridge 146:22da6e220af6 6186 * @arg @ref LL_RCC_PLLSAIM_DIV_37
AnnaBridge 146:22da6e220af6 6187 * @arg @ref LL_RCC_PLLSAIM_DIV_38
AnnaBridge 146:22da6e220af6 6188 * @arg @ref LL_RCC_PLLSAIM_DIV_39
AnnaBridge 146:22da6e220af6 6189 * @arg @ref LL_RCC_PLLSAIM_DIV_40
AnnaBridge 146:22da6e220af6 6190 * @arg @ref LL_RCC_PLLSAIM_DIV_41
AnnaBridge 146:22da6e220af6 6191 * @arg @ref LL_RCC_PLLSAIM_DIV_42
AnnaBridge 146:22da6e220af6 6192 * @arg @ref LL_RCC_PLLSAIM_DIV_43
AnnaBridge 146:22da6e220af6 6193 * @arg @ref LL_RCC_PLLSAIM_DIV_44
AnnaBridge 146:22da6e220af6 6194 * @arg @ref LL_RCC_PLLSAIM_DIV_45
AnnaBridge 146:22da6e220af6 6195 * @arg @ref LL_RCC_PLLSAIM_DIV_46
AnnaBridge 146:22da6e220af6 6196 * @arg @ref LL_RCC_PLLSAIM_DIV_47
AnnaBridge 146:22da6e220af6 6197 * @arg @ref LL_RCC_PLLSAIM_DIV_48
AnnaBridge 146:22da6e220af6 6198 * @arg @ref LL_RCC_PLLSAIM_DIV_49
AnnaBridge 146:22da6e220af6 6199 * @arg @ref LL_RCC_PLLSAIM_DIV_50
AnnaBridge 146:22da6e220af6 6200 * @arg @ref LL_RCC_PLLSAIM_DIV_51
AnnaBridge 146:22da6e220af6 6201 * @arg @ref LL_RCC_PLLSAIM_DIV_52
AnnaBridge 146:22da6e220af6 6202 * @arg @ref LL_RCC_PLLSAIM_DIV_53
AnnaBridge 146:22da6e220af6 6203 * @arg @ref LL_RCC_PLLSAIM_DIV_54
AnnaBridge 146:22da6e220af6 6204 * @arg @ref LL_RCC_PLLSAIM_DIV_55
AnnaBridge 146:22da6e220af6 6205 * @arg @ref LL_RCC_PLLSAIM_DIV_56
AnnaBridge 146:22da6e220af6 6206 * @arg @ref LL_RCC_PLLSAIM_DIV_57
AnnaBridge 146:22da6e220af6 6207 * @arg @ref LL_RCC_PLLSAIM_DIV_58
AnnaBridge 146:22da6e220af6 6208 * @arg @ref LL_RCC_PLLSAIM_DIV_59
AnnaBridge 146:22da6e220af6 6209 * @arg @ref LL_RCC_PLLSAIM_DIV_60
AnnaBridge 146:22da6e220af6 6210 * @arg @ref LL_RCC_PLLSAIM_DIV_61
AnnaBridge 146:22da6e220af6 6211 * @arg @ref LL_RCC_PLLSAIM_DIV_62
AnnaBridge 146:22da6e220af6 6212 * @arg @ref LL_RCC_PLLSAIM_DIV_63
AnnaBridge 146:22da6e220af6 6213 * @param PLLN Between 50 and 432
AnnaBridge 146:22da6e220af6 6214 * @param PLLP This parameter can be one of the following values:
AnnaBridge 146:22da6e220af6 6215 * @arg @ref LL_RCC_PLLSAIP_DIV_2
AnnaBridge 146:22da6e220af6 6216 * @arg @ref LL_RCC_PLLSAIP_DIV_4
AnnaBridge 146:22da6e220af6 6217 * @arg @ref LL_RCC_PLLSAIP_DIV_6
AnnaBridge 146:22da6e220af6 6218 * @arg @ref LL_RCC_PLLSAIP_DIV_8
AnnaBridge 146:22da6e220af6 6219 * @retval None
AnnaBridge 146:22da6e220af6 6220 */
AnnaBridge 146:22da6e220af6 6221 __STATIC_INLINE void LL_RCC_PLLSAI_ConfigDomain_48M(uint32_t Source, uint32_t PLLM, uint32_t PLLN, uint32_t PLLP)
AnnaBridge 146:22da6e220af6 6222 {
AnnaBridge 146:22da6e220af6 6223 MODIFY_REG(RCC->PLLCFGR, RCC_PLLCFGR_PLLSRC, Source);
AnnaBridge 146:22da6e220af6 6224 #if defined(RCC_PLLSAICFGR_PLLSAIM)
AnnaBridge 146:22da6e220af6 6225 MODIFY_REG(RCC->PLLSAICFGR, RCC_PLLSAICFGR_PLLSAIM, PLLM);
AnnaBridge 146:22da6e220af6 6226 #else
AnnaBridge 146:22da6e220af6 6227 MODIFY_REG(RCC->PLLCFGR, RCC_PLLCFGR_PLLM, PLLM);
AnnaBridge 146:22da6e220af6 6228 #endif /* RCC_PLLSAICFGR_PLLSAIM */
AnnaBridge 146:22da6e220af6 6229 MODIFY_REG(RCC->PLLSAICFGR, RCC_PLLSAICFGR_PLLSAIN | RCC_PLLSAICFGR_PLLSAIP, PLLN << RCC_PLLSAICFGR_PLLSAIN_Pos | PLLP);
AnnaBridge 146:22da6e220af6 6230 }
AnnaBridge 146:22da6e220af6 6231 #endif /* RCC_PLLSAICFGR_PLLSAIP */
AnnaBridge 146:22da6e220af6 6232
AnnaBridge 146:22da6e220af6 6233 #if defined(LTDC)
AnnaBridge 146:22da6e220af6 6234 /**
AnnaBridge 146:22da6e220af6 6235 * @brief Configure PLLSAI used for LTDC domain clock
AnnaBridge 146:22da6e220af6 6236 * @note PLL Source and PLLM Divider can be written only when PLL,
AnnaBridge 146:22da6e220af6 6237 * PLLI2S and PLLSAI(*) are disabled
AnnaBridge 146:22da6e220af6 6238 * @note PLLN/PLLR can be written only when PLLSAI is disabled
AnnaBridge 146:22da6e220af6 6239 * @note This can be selected for LTDC
AnnaBridge 146:22da6e220af6 6240 * @rmtoll PLLCFGR PLLSRC LL_RCC_PLLSAI_ConfigDomain_LTDC\n
AnnaBridge 146:22da6e220af6 6241 * PLLCFGR PLLM LL_RCC_PLLSAI_ConfigDomain_LTDC\n
AnnaBridge 146:22da6e220af6 6242 * PLLSAICFGR PLLSAIN LL_RCC_PLLSAI_ConfigDomain_LTDC\n
AnnaBridge 146:22da6e220af6 6243 * PLLSAICFGR PLLSAIR LL_RCC_PLLSAI_ConfigDomain_LTDC\n
AnnaBridge 146:22da6e220af6 6244 * DCKCFGR PLLSAIDIVR LL_RCC_PLLSAI_ConfigDomain_LTDC
AnnaBridge 146:22da6e220af6 6245 * @param Source This parameter can be one of the following values:
AnnaBridge 146:22da6e220af6 6246 * @arg @ref LL_RCC_PLLSOURCE_HSI
AnnaBridge 146:22da6e220af6 6247 * @arg @ref LL_RCC_PLLSOURCE_HSE
AnnaBridge 146:22da6e220af6 6248 * @param PLLM This parameter can be one of the following values:
AnnaBridge 146:22da6e220af6 6249 * @arg @ref LL_RCC_PLLSAIM_DIV_2
AnnaBridge 146:22da6e220af6 6250 * @arg @ref LL_RCC_PLLSAIM_DIV_3
AnnaBridge 146:22da6e220af6 6251 * @arg @ref LL_RCC_PLLSAIM_DIV_4
AnnaBridge 146:22da6e220af6 6252 * @arg @ref LL_RCC_PLLSAIM_DIV_5
AnnaBridge 146:22da6e220af6 6253 * @arg @ref LL_RCC_PLLSAIM_DIV_6
AnnaBridge 146:22da6e220af6 6254 * @arg @ref LL_RCC_PLLSAIM_DIV_7
AnnaBridge 146:22da6e220af6 6255 * @arg @ref LL_RCC_PLLSAIM_DIV_8
AnnaBridge 146:22da6e220af6 6256 * @arg @ref LL_RCC_PLLSAIM_DIV_9
AnnaBridge 146:22da6e220af6 6257 * @arg @ref LL_RCC_PLLSAIM_DIV_10
AnnaBridge 146:22da6e220af6 6258 * @arg @ref LL_RCC_PLLSAIM_DIV_11
AnnaBridge 146:22da6e220af6 6259 * @arg @ref LL_RCC_PLLSAIM_DIV_12
AnnaBridge 146:22da6e220af6 6260 * @arg @ref LL_RCC_PLLSAIM_DIV_13
AnnaBridge 146:22da6e220af6 6261 * @arg @ref LL_RCC_PLLSAIM_DIV_14
AnnaBridge 146:22da6e220af6 6262 * @arg @ref LL_RCC_PLLSAIM_DIV_15
AnnaBridge 146:22da6e220af6 6263 * @arg @ref LL_RCC_PLLSAIM_DIV_16
AnnaBridge 146:22da6e220af6 6264 * @arg @ref LL_RCC_PLLSAIM_DIV_17
AnnaBridge 146:22da6e220af6 6265 * @arg @ref LL_RCC_PLLSAIM_DIV_18
AnnaBridge 146:22da6e220af6 6266 * @arg @ref LL_RCC_PLLSAIM_DIV_19
AnnaBridge 146:22da6e220af6 6267 * @arg @ref LL_RCC_PLLSAIM_DIV_20
AnnaBridge 146:22da6e220af6 6268 * @arg @ref LL_RCC_PLLSAIM_DIV_21
AnnaBridge 146:22da6e220af6 6269 * @arg @ref LL_RCC_PLLSAIM_DIV_22
AnnaBridge 146:22da6e220af6 6270 * @arg @ref LL_RCC_PLLSAIM_DIV_23
AnnaBridge 146:22da6e220af6 6271 * @arg @ref LL_RCC_PLLSAIM_DIV_24
AnnaBridge 146:22da6e220af6 6272 * @arg @ref LL_RCC_PLLSAIM_DIV_25
AnnaBridge 146:22da6e220af6 6273 * @arg @ref LL_RCC_PLLSAIM_DIV_26
AnnaBridge 146:22da6e220af6 6274 * @arg @ref LL_RCC_PLLSAIM_DIV_27
AnnaBridge 146:22da6e220af6 6275 * @arg @ref LL_RCC_PLLSAIM_DIV_28
AnnaBridge 146:22da6e220af6 6276 * @arg @ref LL_RCC_PLLSAIM_DIV_29
AnnaBridge 146:22da6e220af6 6277 * @arg @ref LL_RCC_PLLSAIM_DIV_30
AnnaBridge 146:22da6e220af6 6278 * @arg @ref LL_RCC_PLLSAIM_DIV_31
AnnaBridge 146:22da6e220af6 6279 * @arg @ref LL_RCC_PLLSAIM_DIV_32
AnnaBridge 146:22da6e220af6 6280 * @arg @ref LL_RCC_PLLSAIM_DIV_33
AnnaBridge 146:22da6e220af6 6281 * @arg @ref LL_RCC_PLLSAIM_DIV_34
AnnaBridge 146:22da6e220af6 6282 * @arg @ref LL_RCC_PLLSAIM_DIV_35
AnnaBridge 146:22da6e220af6 6283 * @arg @ref LL_RCC_PLLSAIM_DIV_36
AnnaBridge 146:22da6e220af6 6284 * @arg @ref LL_RCC_PLLSAIM_DIV_37
AnnaBridge 146:22da6e220af6 6285 * @arg @ref LL_RCC_PLLSAIM_DIV_38
AnnaBridge 146:22da6e220af6 6286 * @arg @ref LL_RCC_PLLSAIM_DIV_39
AnnaBridge 146:22da6e220af6 6287 * @arg @ref LL_RCC_PLLSAIM_DIV_40
AnnaBridge 146:22da6e220af6 6288 * @arg @ref LL_RCC_PLLSAIM_DIV_41
AnnaBridge 146:22da6e220af6 6289 * @arg @ref LL_RCC_PLLSAIM_DIV_42
AnnaBridge 146:22da6e220af6 6290 * @arg @ref LL_RCC_PLLSAIM_DIV_43
AnnaBridge 146:22da6e220af6 6291 * @arg @ref LL_RCC_PLLSAIM_DIV_44
AnnaBridge 146:22da6e220af6 6292 * @arg @ref LL_RCC_PLLSAIM_DIV_45
AnnaBridge 146:22da6e220af6 6293 * @arg @ref LL_RCC_PLLSAIM_DIV_46
AnnaBridge 146:22da6e220af6 6294 * @arg @ref LL_RCC_PLLSAIM_DIV_47
AnnaBridge 146:22da6e220af6 6295 * @arg @ref LL_RCC_PLLSAIM_DIV_48
AnnaBridge 146:22da6e220af6 6296 * @arg @ref LL_RCC_PLLSAIM_DIV_49
AnnaBridge 146:22da6e220af6 6297 * @arg @ref LL_RCC_PLLSAIM_DIV_50
AnnaBridge 146:22da6e220af6 6298 * @arg @ref LL_RCC_PLLSAIM_DIV_51
AnnaBridge 146:22da6e220af6 6299 * @arg @ref LL_RCC_PLLSAIM_DIV_52
AnnaBridge 146:22da6e220af6 6300 * @arg @ref LL_RCC_PLLSAIM_DIV_53
AnnaBridge 146:22da6e220af6 6301 * @arg @ref LL_RCC_PLLSAIM_DIV_54
AnnaBridge 146:22da6e220af6 6302 * @arg @ref LL_RCC_PLLSAIM_DIV_55
AnnaBridge 146:22da6e220af6 6303 * @arg @ref LL_RCC_PLLSAIM_DIV_56
AnnaBridge 146:22da6e220af6 6304 * @arg @ref LL_RCC_PLLSAIM_DIV_57
AnnaBridge 146:22da6e220af6 6305 * @arg @ref LL_RCC_PLLSAIM_DIV_58
AnnaBridge 146:22da6e220af6 6306 * @arg @ref LL_RCC_PLLSAIM_DIV_59
AnnaBridge 146:22da6e220af6 6307 * @arg @ref LL_RCC_PLLSAIM_DIV_60
AnnaBridge 146:22da6e220af6 6308 * @arg @ref LL_RCC_PLLSAIM_DIV_61
AnnaBridge 146:22da6e220af6 6309 * @arg @ref LL_RCC_PLLSAIM_DIV_62
AnnaBridge 146:22da6e220af6 6310 * @arg @ref LL_RCC_PLLSAIM_DIV_63
AnnaBridge 146:22da6e220af6 6311 * @param PLLN Between 49/50(*) and 432
AnnaBridge 146:22da6e220af6 6312 *
AnnaBridge 146:22da6e220af6 6313 * (*) value not defined in all devices.
AnnaBridge 146:22da6e220af6 6314 * @param PLLR This parameter can be one of the following values:
AnnaBridge 146:22da6e220af6 6315 * @arg @ref LL_RCC_PLLSAIR_DIV_2
AnnaBridge 146:22da6e220af6 6316 * @arg @ref LL_RCC_PLLSAIR_DIV_3
AnnaBridge 146:22da6e220af6 6317 * @arg @ref LL_RCC_PLLSAIR_DIV_4
AnnaBridge 146:22da6e220af6 6318 * @arg @ref LL_RCC_PLLSAIR_DIV_5
AnnaBridge 146:22da6e220af6 6319 * @arg @ref LL_RCC_PLLSAIR_DIV_6
AnnaBridge 146:22da6e220af6 6320 * @arg @ref LL_RCC_PLLSAIR_DIV_7
AnnaBridge 146:22da6e220af6 6321 * @param PLLDIVR This parameter can be one of the following values:
AnnaBridge 146:22da6e220af6 6322 * @arg @ref LL_RCC_PLLSAIDIVR_DIV_2
AnnaBridge 146:22da6e220af6 6323 * @arg @ref LL_RCC_PLLSAIDIVR_DIV_4
AnnaBridge 146:22da6e220af6 6324 * @arg @ref LL_RCC_PLLSAIDIVR_DIV_8
AnnaBridge 146:22da6e220af6 6325 * @arg @ref LL_RCC_PLLSAIDIVR_DIV_16
AnnaBridge 146:22da6e220af6 6326 * @retval None
AnnaBridge 146:22da6e220af6 6327 */
AnnaBridge 146:22da6e220af6 6328 __STATIC_INLINE void LL_RCC_PLLSAI_ConfigDomain_LTDC(uint32_t Source, uint32_t PLLM, uint32_t PLLN, uint32_t PLLR, uint32_t PLLDIVR)
AnnaBridge 146:22da6e220af6 6329 {
AnnaBridge 146:22da6e220af6 6330 MODIFY_REG(RCC->PLLCFGR, RCC_PLLCFGR_PLLSRC | RCC_PLLCFGR_PLLM, Source | PLLM);
AnnaBridge 146:22da6e220af6 6331 MODIFY_REG(RCC->PLLSAICFGR, RCC_PLLSAICFGR_PLLSAIN | RCC_PLLSAICFGR_PLLSAIR, PLLN << RCC_PLLSAICFGR_PLLSAIN_Pos | PLLR);
AnnaBridge 146:22da6e220af6 6332 MODIFY_REG(RCC->DCKCFGR, RCC_DCKCFGR_PLLSAIDIVR, PLLDIVR);
AnnaBridge 146:22da6e220af6 6333 }
AnnaBridge 146:22da6e220af6 6334 #endif /* LTDC */
AnnaBridge 146:22da6e220af6 6335
AnnaBridge 146:22da6e220af6 6336 /**
AnnaBridge 146:22da6e220af6 6337 * @brief Get division factor for PLLSAI input clock
AnnaBridge 146:22da6e220af6 6338 * @rmtoll PLLCFGR PLLM LL_RCC_PLLSAI_GetDivider\n
AnnaBridge 146:22da6e220af6 6339 * PLLSAICFGR PLLSAIM LL_RCC_PLLSAI_GetDivider
AnnaBridge 146:22da6e220af6 6340 * @retval Returned value can be one of the following values:
AnnaBridge 146:22da6e220af6 6341 * @arg @ref LL_RCC_PLLSAIM_DIV_2
AnnaBridge 146:22da6e220af6 6342 * @arg @ref LL_RCC_PLLSAIM_DIV_3
AnnaBridge 146:22da6e220af6 6343 * @arg @ref LL_RCC_PLLSAIM_DIV_4
AnnaBridge 146:22da6e220af6 6344 * @arg @ref LL_RCC_PLLSAIM_DIV_5
AnnaBridge 146:22da6e220af6 6345 * @arg @ref LL_RCC_PLLSAIM_DIV_6
AnnaBridge 146:22da6e220af6 6346 * @arg @ref LL_RCC_PLLSAIM_DIV_7
AnnaBridge 146:22da6e220af6 6347 * @arg @ref LL_RCC_PLLSAIM_DIV_8
AnnaBridge 146:22da6e220af6 6348 * @arg @ref LL_RCC_PLLSAIM_DIV_9
AnnaBridge 146:22da6e220af6 6349 * @arg @ref LL_RCC_PLLSAIM_DIV_10
AnnaBridge 146:22da6e220af6 6350 * @arg @ref LL_RCC_PLLSAIM_DIV_11
AnnaBridge 146:22da6e220af6 6351 * @arg @ref LL_RCC_PLLSAIM_DIV_12
AnnaBridge 146:22da6e220af6 6352 * @arg @ref LL_RCC_PLLSAIM_DIV_13
AnnaBridge 146:22da6e220af6 6353 * @arg @ref LL_RCC_PLLSAIM_DIV_14
AnnaBridge 146:22da6e220af6 6354 * @arg @ref LL_RCC_PLLSAIM_DIV_15
AnnaBridge 146:22da6e220af6 6355 * @arg @ref LL_RCC_PLLSAIM_DIV_16
AnnaBridge 146:22da6e220af6 6356 * @arg @ref LL_RCC_PLLSAIM_DIV_17
AnnaBridge 146:22da6e220af6 6357 * @arg @ref LL_RCC_PLLSAIM_DIV_18
AnnaBridge 146:22da6e220af6 6358 * @arg @ref LL_RCC_PLLSAIM_DIV_19
AnnaBridge 146:22da6e220af6 6359 * @arg @ref LL_RCC_PLLSAIM_DIV_20
AnnaBridge 146:22da6e220af6 6360 * @arg @ref LL_RCC_PLLSAIM_DIV_21
AnnaBridge 146:22da6e220af6 6361 * @arg @ref LL_RCC_PLLSAIM_DIV_22
AnnaBridge 146:22da6e220af6 6362 * @arg @ref LL_RCC_PLLSAIM_DIV_23
AnnaBridge 146:22da6e220af6 6363 * @arg @ref LL_RCC_PLLSAIM_DIV_24
AnnaBridge 146:22da6e220af6 6364 * @arg @ref LL_RCC_PLLSAIM_DIV_25
AnnaBridge 146:22da6e220af6 6365 * @arg @ref LL_RCC_PLLSAIM_DIV_26
AnnaBridge 146:22da6e220af6 6366 * @arg @ref LL_RCC_PLLSAIM_DIV_27
AnnaBridge 146:22da6e220af6 6367 * @arg @ref LL_RCC_PLLSAIM_DIV_28
AnnaBridge 146:22da6e220af6 6368 * @arg @ref LL_RCC_PLLSAIM_DIV_29
AnnaBridge 146:22da6e220af6 6369 * @arg @ref LL_RCC_PLLSAIM_DIV_30
AnnaBridge 146:22da6e220af6 6370 * @arg @ref LL_RCC_PLLSAIM_DIV_31
AnnaBridge 146:22da6e220af6 6371 * @arg @ref LL_RCC_PLLSAIM_DIV_32
AnnaBridge 146:22da6e220af6 6372 * @arg @ref LL_RCC_PLLSAIM_DIV_33
AnnaBridge 146:22da6e220af6 6373 * @arg @ref LL_RCC_PLLSAIM_DIV_34
AnnaBridge 146:22da6e220af6 6374 * @arg @ref LL_RCC_PLLSAIM_DIV_35
AnnaBridge 146:22da6e220af6 6375 * @arg @ref LL_RCC_PLLSAIM_DIV_36
AnnaBridge 146:22da6e220af6 6376 * @arg @ref LL_RCC_PLLSAIM_DIV_37
AnnaBridge 146:22da6e220af6 6377 * @arg @ref LL_RCC_PLLSAIM_DIV_38
AnnaBridge 146:22da6e220af6 6378 * @arg @ref LL_RCC_PLLSAIM_DIV_39
AnnaBridge 146:22da6e220af6 6379 * @arg @ref LL_RCC_PLLSAIM_DIV_40
AnnaBridge 146:22da6e220af6 6380 * @arg @ref LL_RCC_PLLSAIM_DIV_41
AnnaBridge 146:22da6e220af6 6381 * @arg @ref LL_RCC_PLLSAIM_DIV_42
AnnaBridge 146:22da6e220af6 6382 * @arg @ref LL_RCC_PLLSAIM_DIV_43
AnnaBridge 146:22da6e220af6 6383 * @arg @ref LL_RCC_PLLSAIM_DIV_44
AnnaBridge 146:22da6e220af6 6384 * @arg @ref LL_RCC_PLLSAIM_DIV_45
AnnaBridge 146:22da6e220af6 6385 * @arg @ref LL_RCC_PLLSAIM_DIV_46
AnnaBridge 146:22da6e220af6 6386 * @arg @ref LL_RCC_PLLSAIM_DIV_47
AnnaBridge 146:22da6e220af6 6387 * @arg @ref LL_RCC_PLLSAIM_DIV_48
AnnaBridge 146:22da6e220af6 6388 * @arg @ref LL_RCC_PLLSAIM_DIV_49
AnnaBridge 146:22da6e220af6 6389 * @arg @ref LL_RCC_PLLSAIM_DIV_50
AnnaBridge 146:22da6e220af6 6390 * @arg @ref LL_RCC_PLLSAIM_DIV_51
AnnaBridge 146:22da6e220af6 6391 * @arg @ref LL_RCC_PLLSAIM_DIV_52
AnnaBridge 146:22da6e220af6 6392 * @arg @ref LL_RCC_PLLSAIM_DIV_53
AnnaBridge 146:22da6e220af6 6393 * @arg @ref LL_RCC_PLLSAIM_DIV_54
AnnaBridge 146:22da6e220af6 6394 * @arg @ref LL_RCC_PLLSAIM_DIV_55
AnnaBridge 146:22da6e220af6 6395 * @arg @ref LL_RCC_PLLSAIM_DIV_56
AnnaBridge 146:22da6e220af6 6396 * @arg @ref LL_RCC_PLLSAIM_DIV_57
AnnaBridge 146:22da6e220af6 6397 * @arg @ref LL_RCC_PLLSAIM_DIV_58
AnnaBridge 146:22da6e220af6 6398 * @arg @ref LL_RCC_PLLSAIM_DIV_59
AnnaBridge 146:22da6e220af6 6399 * @arg @ref LL_RCC_PLLSAIM_DIV_60
AnnaBridge 146:22da6e220af6 6400 * @arg @ref LL_RCC_PLLSAIM_DIV_61
AnnaBridge 146:22da6e220af6 6401 * @arg @ref LL_RCC_PLLSAIM_DIV_62
AnnaBridge 146:22da6e220af6 6402 * @arg @ref LL_RCC_PLLSAIM_DIV_63
AnnaBridge 146:22da6e220af6 6403 */
AnnaBridge 146:22da6e220af6 6404 __STATIC_INLINE uint32_t LL_RCC_PLLSAI_GetDivider(void)
AnnaBridge 146:22da6e220af6 6405 {
AnnaBridge 146:22da6e220af6 6406 #if defined(RCC_PLLSAICFGR_PLLSAIM)
AnnaBridge 146:22da6e220af6 6407 return (uint32_t)(READ_BIT(RCC->PLLSAICFGR, RCC_PLLSAICFGR_PLLSAIM));
AnnaBridge 146:22da6e220af6 6408 #else
AnnaBridge 146:22da6e220af6 6409 return (uint32_t)(READ_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLLM));
AnnaBridge 146:22da6e220af6 6410 #endif /* RCC_PLLSAICFGR_PLLSAIM */
AnnaBridge 146:22da6e220af6 6411 }
AnnaBridge 146:22da6e220af6 6412
AnnaBridge 146:22da6e220af6 6413 /**
AnnaBridge 146:22da6e220af6 6414 * @brief Get SAIPLL multiplication factor for VCO
AnnaBridge 146:22da6e220af6 6415 * @rmtoll PLLSAICFGR PLLSAIN LL_RCC_PLLSAI_GetN
AnnaBridge 146:22da6e220af6 6416 * @retval Between 49/50(*) and 432
AnnaBridge 146:22da6e220af6 6417 *
AnnaBridge 146:22da6e220af6 6418 * (*) value not defined in all devices.
AnnaBridge 146:22da6e220af6 6419 */
AnnaBridge 146:22da6e220af6 6420 __STATIC_INLINE uint32_t LL_RCC_PLLSAI_GetN(void)
AnnaBridge 146:22da6e220af6 6421 {
AnnaBridge 146:22da6e220af6 6422 return (uint32_t)(READ_BIT(RCC->PLLSAICFGR, RCC_PLLSAICFGR_PLLSAIN) >> RCC_PLLSAICFGR_PLLSAIN_Pos);
AnnaBridge 146:22da6e220af6 6423 }
AnnaBridge 146:22da6e220af6 6424
AnnaBridge 146:22da6e220af6 6425 /**
AnnaBridge 146:22da6e220af6 6426 * @brief Get SAIPLL division factor for PLLSAIQ
AnnaBridge 146:22da6e220af6 6427 * @rmtoll PLLSAICFGR PLLSAIQ LL_RCC_PLLSAI_GetQ
AnnaBridge 146:22da6e220af6 6428 * @retval Returned value can be one of the following values:
AnnaBridge 146:22da6e220af6 6429 * @arg @ref LL_RCC_PLLSAIQ_DIV_2
AnnaBridge 146:22da6e220af6 6430 * @arg @ref LL_RCC_PLLSAIQ_DIV_3
AnnaBridge 146:22da6e220af6 6431 * @arg @ref LL_RCC_PLLSAIQ_DIV_4
AnnaBridge 146:22da6e220af6 6432 * @arg @ref LL_RCC_PLLSAIQ_DIV_5
AnnaBridge 146:22da6e220af6 6433 * @arg @ref LL_RCC_PLLSAIQ_DIV_6
AnnaBridge 146:22da6e220af6 6434 * @arg @ref LL_RCC_PLLSAIQ_DIV_7
AnnaBridge 146:22da6e220af6 6435 * @arg @ref LL_RCC_PLLSAIQ_DIV_8
AnnaBridge 146:22da6e220af6 6436 * @arg @ref LL_RCC_PLLSAIQ_DIV_9
AnnaBridge 146:22da6e220af6 6437 * @arg @ref LL_RCC_PLLSAIQ_DIV_10
AnnaBridge 146:22da6e220af6 6438 * @arg @ref LL_RCC_PLLSAIQ_DIV_11
AnnaBridge 146:22da6e220af6 6439 * @arg @ref LL_RCC_PLLSAIQ_DIV_12
AnnaBridge 146:22da6e220af6 6440 * @arg @ref LL_RCC_PLLSAIQ_DIV_13
AnnaBridge 146:22da6e220af6 6441 * @arg @ref LL_RCC_PLLSAIQ_DIV_14
AnnaBridge 146:22da6e220af6 6442 * @arg @ref LL_RCC_PLLSAIQ_DIV_15
AnnaBridge 146:22da6e220af6 6443 */
AnnaBridge 146:22da6e220af6 6444 __STATIC_INLINE uint32_t LL_RCC_PLLSAI_GetQ(void)
AnnaBridge 146:22da6e220af6 6445 {
AnnaBridge 146:22da6e220af6 6446 return (uint32_t)(READ_BIT(RCC->PLLSAICFGR, RCC_PLLSAICFGR_PLLSAIQ));
AnnaBridge 146:22da6e220af6 6447 }
AnnaBridge 146:22da6e220af6 6448
AnnaBridge 146:22da6e220af6 6449 #if defined(RCC_PLLSAICFGR_PLLSAIR)
AnnaBridge 146:22da6e220af6 6450 /**
AnnaBridge 146:22da6e220af6 6451 * @brief Get SAIPLL division factor for PLLSAIR
AnnaBridge 146:22da6e220af6 6452 * @note used for PLLSAICLK (SAI clock)
AnnaBridge 146:22da6e220af6 6453 * @rmtoll PLLSAICFGR PLLSAIR LL_RCC_PLLSAI_GetR
AnnaBridge 146:22da6e220af6 6454 * @retval Returned value can be one of the following values:
AnnaBridge 146:22da6e220af6 6455 * @arg @ref LL_RCC_PLLSAIR_DIV_2
AnnaBridge 146:22da6e220af6 6456 * @arg @ref LL_RCC_PLLSAIR_DIV_3
AnnaBridge 146:22da6e220af6 6457 * @arg @ref LL_RCC_PLLSAIR_DIV_4
AnnaBridge 146:22da6e220af6 6458 * @arg @ref LL_RCC_PLLSAIR_DIV_5
AnnaBridge 146:22da6e220af6 6459 * @arg @ref LL_RCC_PLLSAIR_DIV_6
AnnaBridge 146:22da6e220af6 6460 * @arg @ref LL_RCC_PLLSAIR_DIV_7
AnnaBridge 146:22da6e220af6 6461 */
AnnaBridge 146:22da6e220af6 6462 __STATIC_INLINE uint32_t LL_RCC_PLLSAI_GetR(void)
AnnaBridge 146:22da6e220af6 6463 {
AnnaBridge 146:22da6e220af6 6464 return (uint32_t)(READ_BIT(RCC->PLLSAICFGR, RCC_PLLSAICFGR_PLLSAIR));
AnnaBridge 146:22da6e220af6 6465 }
AnnaBridge 146:22da6e220af6 6466 #endif /* RCC_PLLSAICFGR_PLLSAIR */
AnnaBridge 146:22da6e220af6 6467
AnnaBridge 146:22da6e220af6 6468 #if defined(RCC_PLLSAICFGR_PLLSAIP)
AnnaBridge 146:22da6e220af6 6469 /**
AnnaBridge 146:22da6e220af6 6470 * @brief Get SAIPLL division factor for PLLSAIP
AnnaBridge 146:22da6e220af6 6471 * @note used for PLL48MCLK (48M domain clock)
AnnaBridge 146:22da6e220af6 6472 * @rmtoll PLLSAICFGR PLLSAIP LL_RCC_PLLSAI_GetP
AnnaBridge 146:22da6e220af6 6473 * @retval Returned value can be one of the following values:
AnnaBridge 146:22da6e220af6 6474 * @arg @ref LL_RCC_PLLSAIP_DIV_2
AnnaBridge 146:22da6e220af6 6475 * @arg @ref LL_RCC_PLLSAIP_DIV_4
AnnaBridge 146:22da6e220af6 6476 * @arg @ref LL_RCC_PLLSAIP_DIV_6
AnnaBridge 146:22da6e220af6 6477 * @arg @ref LL_RCC_PLLSAIP_DIV_8
AnnaBridge 146:22da6e220af6 6478 */
AnnaBridge 146:22da6e220af6 6479 __STATIC_INLINE uint32_t LL_RCC_PLLSAI_GetP(void)
AnnaBridge 146:22da6e220af6 6480 {
AnnaBridge 146:22da6e220af6 6481 return (uint32_t)(READ_BIT(RCC->PLLSAICFGR, RCC_PLLSAICFGR_PLLSAIP));
AnnaBridge 146:22da6e220af6 6482 }
AnnaBridge 146:22da6e220af6 6483 #endif /* RCC_PLLSAICFGR_PLLSAIP */
AnnaBridge 146:22da6e220af6 6484
AnnaBridge 146:22da6e220af6 6485 /**
AnnaBridge 146:22da6e220af6 6486 * @brief Get SAIPLL division factor for PLLSAIDIVQ
AnnaBridge 146:22da6e220af6 6487 * @note used PLLSAICLK selected (SAI clock)
AnnaBridge 146:22da6e220af6 6488 * @rmtoll DCKCFGR PLLSAIDIVQ LL_RCC_PLLSAI_GetDIVQ
AnnaBridge 146:22da6e220af6 6489 * @retval Returned value can be one of the following values:
AnnaBridge 146:22da6e220af6 6490 * @arg @ref LL_RCC_PLLSAIDIVQ_DIV_1
AnnaBridge 146:22da6e220af6 6491 * @arg @ref LL_RCC_PLLSAIDIVQ_DIV_2
AnnaBridge 146:22da6e220af6 6492 * @arg @ref LL_RCC_PLLSAIDIVQ_DIV_3
AnnaBridge 146:22da6e220af6 6493 * @arg @ref LL_RCC_PLLSAIDIVQ_DIV_4
AnnaBridge 146:22da6e220af6 6494 * @arg @ref LL_RCC_PLLSAIDIVQ_DIV_5
AnnaBridge 146:22da6e220af6 6495 * @arg @ref LL_RCC_PLLSAIDIVQ_DIV_6
AnnaBridge 146:22da6e220af6 6496 * @arg @ref LL_RCC_PLLSAIDIVQ_DIV_7
AnnaBridge 146:22da6e220af6 6497 * @arg @ref LL_RCC_PLLSAIDIVQ_DIV_8
AnnaBridge 146:22da6e220af6 6498 * @arg @ref LL_RCC_PLLSAIDIVQ_DIV_9
AnnaBridge 146:22da6e220af6 6499 * @arg @ref LL_RCC_PLLSAIDIVQ_DIV_10
AnnaBridge 146:22da6e220af6 6500 * @arg @ref LL_RCC_PLLSAIDIVQ_DIV_11
AnnaBridge 146:22da6e220af6 6501 * @arg @ref LL_RCC_PLLSAIDIVQ_DIV_12
AnnaBridge 146:22da6e220af6 6502 * @arg @ref LL_RCC_PLLSAIDIVQ_DIV_13
AnnaBridge 146:22da6e220af6 6503 * @arg @ref LL_RCC_PLLSAIDIVQ_DIV_14
AnnaBridge 146:22da6e220af6 6504 * @arg @ref LL_RCC_PLLSAIDIVQ_DIV_15
AnnaBridge 146:22da6e220af6 6505 * @arg @ref LL_RCC_PLLSAIDIVQ_DIV_16
AnnaBridge 146:22da6e220af6 6506 * @arg @ref LL_RCC_PLLSAIDIVQ_DIV_17
AnnaBridge 146:22da6e220af6 6507 * @arg @ref LL_RCC_PLLSAIDIVQ_DIV_18
AnnaBridge 146:22da6e220af6 6508 * @arg @ref LL_RCC_PLLSAIDIVQ_DIV_19
AnnaBridge 146:22da6e220af6 6509 * @arg @ref LL_RCC_PLLSAIDIVQ_DIV_20
AnnaBridge 146:22da6e220af6 6510 * @arg @ref LL_RCC_PLLSAIDIVQ_DIV_21
AnnaBridge 146:22da6e220af6 6511 * @arg @ref LL_RCC_PLLSAIDIVQ_DIV_22
AnnaBridge 146:22da6e220af6 6512 * @arg @ref LL_RCC_PLLSAIDIVQ_DIV_23
AnnaBridge 146:22da6e220af6 6513 * @arg @ref LL_RCC_PLLSAIDIVQ_DIV_24
AnnaBridge 146:22da6e220af6 6514 * @arg @ref LL_RCC_PLLSAIDIVQ_DIV_25
AnnaBridge 146:22da6e220af6 6515 * @arg @ref LL_RCC_PLLSAIDIVQ_DIV_26
AnnaBridge 146:22da6e220af6 6516 * @arg @ref LL_RCC_PLLSAIDIVQ_DIV_27
AnnaBridge 146:22da6e220af6 6517 * @arg @ref LL_RCC_PLLSAIDIVQ_DIV_28
AnnaBridge 146:22da6e220af6 6518 * @arg @ref LL_RCC_PLLSAIDIVQ_DIV_29
AnnaBridge 146:22da6e220af6 6519 * @arg @ref LL_RCC_PLLSAIDIVQ_DIV_30
AnnaBridge 146:22da6e220af6 6520 * @arg @ref LL_RCC_PLLSAIDIVQ_DIV_31
AnnaBridge 146:22da6e220af6 6521 * @arg @ref LL_RCC_PLLSAIDIVQ_DIV_32
AnnaBridge 146:22da6e220af6 6522 */
AnnaBridge 146:22da6e220af6 6523 __STATIC_INLINE uint32_t LL_RCC_PLLSAI_GetDIVQ(void)
AnnaBridge 146:22da6e220af6 6524 {
AnnaBridge 146:22da6e220af6 6525 return (uint32_t)(READ_BIT(RCC->DCKCFGR, RCC_DCKCFGR_PLLSAIDIVQ));
AnnaBridge 146:22da6e220af6 6526 }
AnnaBridge 146:22da6e220af6 6527
AnnaBridge 146:22da6e220af6 6528 #if defined(RCC_DCKCFGR_PLLSAIDIVR)
AnnaBridge 146:22da6e220af6 6529 /**
AnnaBridge 146:22da6e220af6 6530 * @brief Get SAIPLL division factor for PLLSAIDIVR
AnnaBridge 146:22da6e220af6 6531 * @note used for LTDC domain clock
AnnaBridge 146:22da6e220af6 6532 * @rmtoll DCKCFGR PLLSAIDIVR LL_RCC_PLLSAI_GetDIVR
AnnaBridge 146:22da6e220af6 6533 * @retval Returned value can be one of the following values:
AnnaBridge 146:22da6e220af6 6534 * @arg @ref LL_RCC_PLLSAIDIVR_DIV_2
AnnaBridge 146:22da6e220af6 6535 * @arg @ref LL_RCC_PLLSAIDIVR_DIV_4
AnnaBridge 146:22da6e220af6 6536 * @arg @ref LL_RCC_PLLSAIDIVR_DIV_8
AnnaBridge 146:22da6e220af6 6537 * @arg @ref LL_RCC_PLLSAIDIVR_DIV_16
AnnaBridge 146:22da6e220af6 6538 */
AnnaBridge 146:22da6e220af6 6539 __STATIC_INLINE uint32_t LL_RCC_PLLSAI_GetDIVR(void)
AnnaBridge 146:22da6e220af6 6540 {
AnnaBridge 146:22da6e220af6 6541 return (uint32_t)(READ_BIT(RCC->DCKCFGR, RCC_DCKCFGR_PLLSAIDIVR));
AnnaBridge 146:22da6e220af6 6542 }
AnnaBridge 146:22da6e220af6 6543 #endif /* RCC_DCKCFGR_PLLSAIDIVR */
AnnaBridge 146:22da6e220af6 6544
AnnaBridge 146:22da6e220af6 6545 /**
AnnaBridge 146:22da6e220af6 6546 * @}
AnnaBridge 146:22da6e220af6 6547 */
AnnaBridge 146:22da6e220af6 6548 #endif /* RCC_PLLSAI_SUPPORT */
AnnaBridge 146:22da6e220af6 6549
AnnaBridge 146:22da6e220af6 6550 /** @defgroup RCC_LL_EF_FLAG_Management FLAG Management
AnnaBridge 146:22da6e220af6 6551 * @{
AnnaBridge 146:22da6e220af6 6552 */
AnnaBridge 146:22da6e220af6 6553
AnnaBridge 146:22da6e220af6 6554 /**
AnnaBridge 146:22da6e220af6 6555 * @brief Clear LSI ready interrupt flag
AnnaBridge 146:22da6e220af6 6556 * @rmtoll CIR LSIRDYC LL_RCC_ClearFlag_LSIRDY
AnnaBridge 146:22da6e220af6 6557 * @retval None
AnnaBridge 146:22da6e220af6 6558 */
AnnaBridge 146:22da6e220af6 6559 __STATIC_INLINE void LL_RCC_ClearFlag_LSIRDY(void)
AnnaBridge 146:22da6e220af6 6560 {
AnnaBridge 146:22da6e220af6 6561 SET_BIT(RCC->CIR, RCC_CIR_LSIRDYC);
AnnaBridge 146:22da6e220af6 6562 }
AnnaBridge 146:22da6e220af6 6563
AnnaBridge 146:22da6e220af6 6564 /**
AnnaBridge 146:22da6e220af6 6565 * @brief Clear LSE ready interrupt flag
AnnaBridge 146:22da6e220af6 6566 * @rmtoll CIR LSERDYC LL_RCC_ClearFlag_LSERDY
AnnaBridge 146:22da6e220af6 6567 * @retval None
AnnaBridge 146:22da6e220af6 6568 */
AnnaBridge 146:22da6e220af6 6569 __STATIC_INLINE void LL_RCC_ClearFlag_LSERDY(void)
AnnaBridge 146:22da6e220af6 6570 {
AnnaBridge 146:22da6e220af6 6571 SET_BIT(RCC->CIR, RCC_CIR_LSERDYC);
AnnaBridge 146:22da6e220af6 6572 }
AnnaBridge 146:22da6e220af6 6573
AnnaBridge 146:22da6e220af6 6574 /**
AnnaBridge 146:22da6e220af6 6575 * @brief Clear HSI ready interrupt flag
AnnaBridge 146:22da6e220af6 6576 * @rmtoll CIR HSIRDYC LL_RCC_ClearFlag_HSIRDY
AnnaBridge 146:22da6e220af6 6577 * @retval None
AnnaBridge 146:22da6e220af6 6578 */
AnnaBridge 146:22da6e220af6 6579 __STATIC_INLINE void LL_RCC_ClearFlag_HSIRDY(void)
AnnaBridge 146:22da6e220af6 6580 {
AnnaBridge 146:22da6e220af6 6581 SET_BIT(RCC->CIR, RCC_CIR_HSIRDYC);
AnnaBridge 146:22da6e220af6 6582 }
AnnaBridge 146:22da6e220af6 6583
AnnaBridge 146:22da6e220af6 6584 /**
AnnaBridge 146:22da6e220af6 6585 * @brief Clear HSE ready interrupt flag
AnnaBridge 146:22da6e220af6 6586 * @rmtoll CIR HSERDYC LL_RCC_ClearFlag_HSERDY
AnnaBridge 146:22da6e220af6 6587 * @retval None
AnnaBridge 146:22da6e220af6 6588 */
AnnaBridge 146:22da6e220af6 6589 __STATIC_INLINE void LL_RCC_ClearFlag_HSERDY(void)
AnnaBridge 146:22da6e220af6 6590 {
AnnaBridge 146:22da6e220af6 6591 SET_BIT(RCC->CIR, RCC_CIR_HSERDYC);
AnnaBridge 146:22da6e220af6 6592 }
AnnaBridge 146:22da6e220af6 6593
AnnaBridge 146:22da6e220af6 6594 /**
AnnaBridge 146:22da6e220af6 6595 * @brief Clear PLL ready interrupt flag
AnnaBridge 146:22da6e220af6 6596 * @rmtoll CIR PLLRDYC LL_RCC_ClearFlag_PLLRDY
AnnaBridge 146:22da6e220af6 6597 * @retval None
AnnaBridge 146:22da6e220af6 6598 */
AnnaBridge 146:22da6e220af6 6599 __STATIC_INLINE void LL_RCC_ClearFlag_PLLRDY(void)
AnnaBridge 146:22da6e220af6 6600 {
AnnaBridge 146:22da6e220af6 6601 SET_BIT(RCC->CIR, RCC_CIR_PLLRDYC);
AnnaBridge 146:22da6e220af6 6602 }
AnnaBridge 146:22da6e220af6 6603
AnnaBridge 146:22da6e220af6 6604 #if defined(RCC_PLLI2S_SUPPORT)
AnnaBridge 146:22da6e220af6 6605 /**
AnnaBridge 146:22da6e220af6 6606 * @brief Clear PLLI2S ready interrupt flag
AnnaBridge 146:22da6e220af6 6607 * @rmtoll CIR PLLI2SRDYC LL_RCC_ClearFlag_PLLI2SRDY
AnnaBridge 146:22da6e220af6 6608 * @retval None
AnnaBridge 146:22da6e220af6 6609 */
AnnaBridge 146:22da6e220af6 6610 __STATIC_INLINE void LL_RCC_ClearFlag_PLLI2SRDY(void)
AnnaBridge 146:22da6e220af6 6611 {
AnnaBridge 146:22da6e220af6 6612 SET_BIT(RCC->CIR, RCC_CIR_PLLI2SRDYC);
AnnaBridge 146:22da6e220af6 6613 }
AnnaBridge 146:22da6e220af6 6614
AnnaBridge 146:22da6e220af6 6615 #endif /* RCC_PLLI2S_SUPPORT */
AnnaBridge 146:22da6e220af6 6616
AnnaBridge 146:22da6e220af6 6617 #if defined(RCC_PLLSAI_SUPPORT)
AnnaBridge 146:22da6e220af6 6618 /**
AnnaBridge 146:22da6e220af6 6619 * @brief Clear PLLSAI ready interrupt flag
AnnaBridge 146:22da6e220af6 6620 * @rmtoll CIR PLLSAIRDYC LL_RCC_ClearFlag_PLLSAIRDY
AnnaBridge 146:22da6e220af6 6621 * @retval None
AnnaBridge 146:22da6e220af6 6622 */
AnnaBridge 146:22da6e220af6 6623 __STATIC_INLINE void LL_RCC_ClearFlag_PLLSAIRDY(void)
AnnaBridge 146:22da6e220af6 6624 {
AnnaBridge 146:22da6e220af6 6625 SET_BIT(RCC->CIR, RCC_CIR_PLLSAIRDYC);
AnnaBridge 146:22da6e220af6 6626 }
AnnaBridge 146:22da6e220af6 6627
AnnaBridge 146:22da6e220af6 6628 #endif /* RCC_PLLSAI_SUPPORT */
AnnaBridge 146:22da6e220af6 6629
AnnaBridge 146:22da6e220af6 6630 /**
AnnaBridge 146:22da6e220af6 6631 * @brief Clear Clock security system interrupt flag
AnnaBridge 146:22da6e220af6 6632 * @rmtoll CIR CSSC LL_RCC_ClearFlag_HSECSS
AnnaBridge 146:22da6e220af6 6633 * @retval None
AnnaBridge 146:22da6e220af6 6634 */
AnnaBridge 146:22da6e220af6 6635 __STATIC_INLINE void LL_RCC_ClearFlag_HSECSS(void)
AnnaBridge 146:22da6e220af6 6636 {
AnnaBridge 146:22da6e220af6 6637 SET_BIT(RCC->CIR, RCC_CIR_CSSC);
AnnaBridge 146:22da6e220af6 6638 }
AnnaBridge 146:22da6e220af6 6639
AnnaBridge 146:22da6e220af6 6640 /**
AnnaBridge 146:22da6e220af6 6641 * @brief Check if LSI ready interrupt occurred or not
AnnaBridge 146:22da6e220af6 6642 * @rmtoll CIR LSIRDYF LL_RCC_IsActiveFlag_LSIRDY
AnnaBridge 146:22da6e220af6 6643 * @retval State of bit (1 or 0).
AnnaBridge 146:22da6e220af6 6644 */
AnnaBridge 146:22da6e220af6 6645 __STATIC_INLINE uint32_t LL_RCC_IsActiveFlag_LSIRDY(void)
AnnaBridge 146:22da6e220af6 6646 {
AnnaBridge 146:22da6e220af6 6647 return (READ_BIT(RCC->CIR, RCC_CIR_LSIRDYF) == (RCC_CIR_LSIRDYF));
AnnaBridge 146:22da6e220af6 6648 }
AnnaBridge 146:22da6e220af6 6649
AnnaBridge 146:22da6e220af6 6650 /**
AnnaBridge 146:22da6e220af6 6651 * @brief Check if LSE ready interrupt occurred or not
AnnaBridge 146:22da6e220af6 6652 * @rmtoll CIR LSERDYF LL_RCC_IsActiveFlag_LSERDY
AnnaBridge 146:22da6e220af6 6653 * @retval State of bit (1 or 0).
AnnaBridge 146:22da6e220af6 6654 */
AnnaBridge 146:22da6e220af6 6655 __STATIC_INLINE uint32_t LL_RCC_IsActiveFlag_LSERDY(void)
AnnaBridge 146:22da6e220af6 6656 {
AnnaBridge 146:22da6e220af6 6657 return (READ_BIT(RCC->CIR, RCC_CIR_LSERDYF) == (RCC_CIR_LSERDYF));
AnnaBridge 146:22da6e220af6 6658 }
AnnaBridge 146:22da6e220af6 6659
AnnaBridge 146:22da6e220af6 6660 /**
AnnaBridge 146:22da6e220af6 6661 * @brief Check if HSI ready interrupt occurred or not
AnnaBridge 146:22da6e220af6 6662 * @rmtoll CIR HSIRDYF LL_RCC_IsActiveFlag_HSIRDY
AnnaBridge 146:22da6e220af6 6663 * @retval State of bit (1 or 0).
AnnaBridge 146:22da6e220af6 6664 */
AnnaBridge 146:22da6e220af6 6665 __STATIC_INLINE uint32_t LL_RCC_IsActiveFlag_HSIRDY(void)
AnnaBridge 146:22da6e220af6 6666 {
AnnaBridge 146:22da6e220af6 6667 return (READ_BIT(RCC->CIR, RCC_CIR_HSIRDYF) == (RCC_CIR_HSIRDYF));
AnnaBridge 146:22da6e220af6 6668 }
AnnaBridge 146:22da6e220af6 6669
AnnaBridge 146:22da6e220af6 6670 /**
AnnaBridge 146:22da6e220af6 6671 * @brief Check if HSE ready interrupt occurred or not
AnnaBridge 146:22da6e220af6 6672 * @rmtoll CIR HSERDYF LL_RCC_IsActiveFlag_HSERDY
AnnaBridge 146:22da6e220af6 6673 * @retval State of bit (1 or 0).
AnnaBridge 146:22da6e220af6 6674 */
AnnaBridge 146:22da6e220af6 6675 __STATIC_INLINE uint32_t LL_RCC_IsActiveFlag_HSERDY(void)
AnnaBridge 146:22da6e220af6 6676 {
AnnaBridge 146:22da6e220af6 6677 return (READ_BIT(RCC->CIR, RCC_CIR_HSERDYF) == (RCC_CIR_HSERDYF));
AnnaBridge 146:22da6e220af6 6678 }
AnnaBridge 146:22da6e220af6 6679
AnnaBridge 146:22da6e220af6 6680 /**
AnnaBridge 146:22da6e220af6 6681 * @brief Check if PLL ready interrupt occurred or not
AnnaBridge 146:22da6e220af6 6682 * @rmtoll CIR PLLRDYF LL_RCC_IsActiveFlag_PLLRDY
AnnaBridge 146:22da6e220af6 6683 * @retval State of bit (1 or 0).
AnnaBridge 146:22da6e220af6 6684 */
AnnaBridge 146:22da6e220af6 6685 __STATIC_INLINE uint32_t LL_RCC_IsActiveFlag_PLLRDY(void)
AnnaBridge 146:22da6e220af6 6686 {
AnnaBridge 146:22da6e220af6 6687 return (READ_BIT(RCC->CIR, RCC_CIR_PLLRDYF) == (RCC_CIR_PLLRDYF));
AnnaBridge 146:22da6e220af6 6688 }
AnnaBridge 146:22da6e220af6 6689
AnnaBridge 146:22da6e220af6 6690 #if defined(RCC_PLLI2S_SUPPORT)
AnnaBridge 146:22da6e220af6 6691 /**
AnnaBridge 146:22da6e220af6 6692 * @brief Check if PLLI2S ready interrupt occurred or not
AnnaBridge 146:22da6e220af6 6693 * @rmtoll CIR PLLI2SRDYF LL_RCC_IsActiveFlag_PLLI2SRDY
AnnaBridge 146:22da6e220af6 6694 * @retval State of bit (1 or 0).
AnnaBridge 146:22da6e220af6 6695 */
AnnaBridge 146:22da6e220af6 6696 __STATIC_INLINE uint32_t LL_RCC_IsActiveFlag_PLLI2SRDY(void)
AnnaBridge 146:22da6e220af6 6697 {
AnnaBridge 146:22da6e220af6 6698 return (READ_BIT(RCC->CIR, RCC_CIR_PLLI2SRDYF) == (RCC_CIR_PLLI2SRDYF));
AnnaBridge 146:22da6e220af6 6699 }
AnnaBridge 146:22da6e220af6 6700 #endif /* RCC_PLLI2S_SUPPORT */
AnnaBridge 146:22da6e220af6 6701
AnnaBridge 146:22da6e220af6 6702 #if defined(RCC_PLLSAI_SUPPORT)
AnnaBridge 146:22da6e220af6 6703 /**
AnnaBridge 146:22da6e220af6 6704 * @brief Check if PLLSAI ready interrupt occurred or not
AnnaBridge 146:22da6e220af6 6705 * @rmtoll CIR PLLSAIRDYF LL_RCC_IsActiveFlag_PLLSAIRDY
AnnaBridge 146:22da6e220af6 6706 * @retval State of bit (1 or 0).
AnnaBridge 146:22da6e220af6 6707 */
AnnaBridge 146:22da6e220af6 6708 __STATIC_INLINE uint32_t LL_RCC_IsActiveFlag_PLLSAIRDY(void)
AnnaBridge 146:22da6e220af6 6709 {
AnnaBridge 146:22da6e220af6 6710 return (READ_BIT(RCC->CIR, RCC_CIR_PLLSAIRDYF) == (RCC_CIR_PLLSAIRDYF));
AnnaBridge 146:22da6e220af6 6711 }
AnnaBridge 146:22da6e220af6 6712 #endif /* RCC_PLLSAI_SUPPORT */
AnnaBridge 146:22da6e220af6 6713
AnnaBridge 146:22da6e220af6 6714 /**
AnnaBridge 146:22da6e220af6 6715 * @brief Check if Clock security system interrupt occurred or not
AnnaBridge 146:22da6e220af6 6716 * @rmtoll CIR CSSF LL_RCC_IsActiveFlag_HSECSS
AnnaBridge 146:22da6e220af6 6717 * @retval State of bit (1 or 0).
AnnaBridge 146:22da6e220af6 6718 */
AnnaBridge 146:22da6e220af6 6719 __STATIC_INLINE uint32_t LL_RCC_IsActiveFlag_HSECSS(void)
AnnaBridge 146:22da6e220af6 6720 {
AnnaBridge 146:22da6e220af6 6721 return (READ_BIT(RCC->CIR, RCC_CIR_CSSF) == (RCC_CIR_CSSF));
AnnaBridge 146:22da6e220af6 6722 }
AnnaBridge 146:22da6e220af6 6723
AnnaBridge 146:22da6e220af6 6724 /**
AnnaBridge 146:22da6e220af6 6725 * @brief Check if RCC flag Independent Watchdog reset is set or not.
AnnaBridge 146:22da6e220af6 6726 * @rmtoll CSR IWDGRSTF LL_RCC_IsActiveFlag_IWDGRST
AnnaBridge 146:22da6e220af6 6727 * @retval State of bit (1 or 0).
AnnaBridge 146:22da6e220af6 6728 */
AnnaBridge 146:22da6e220af6 6729 __STATIC_INLINE uint32_t LL_RCC_IsActiveFlag_IWDGRST(void)
AnnaBridge 146:22da6e220af6 6730 {
AnnaBridge 146:22da6e220af6 6731 return (READ_BIT(RCC->CSR, RCC_CSR_IWDGRSTF) == (RCC_CSR_IWDGRSTF));
AnnaBridge 146:22da6e220af6 6732 }
AnnaBridge 146:22da6e220af6 6733
AnnaBridge 146:22da6e220af6 6734 /**
AnnaBridge 146:22da6e220af6 6735 * @brief Check if RCC flag Low Power reset is set or not.
AnnaBridge 146:22da6e220af6 6736 * @rmtoll CSR LPWRRSTF LL_RCC_IsActiveFlag_LPWRRST
AnnaBridge 146:22da6e220af6 6737 * @retval State of bit (1 or 0).
AnnaBridge 146:22da6e220af6 6738 */
AnnaBridge 146:22da6e220af6 6739 __STATIC_INLINE uint32_t LL_RCC_IsActiveFlag_LPWRRST(void)
AnnaBridge 146:22da6e220af6 6740 {
AnnaBridge 146:22da6e220af6 6741 return (READ_BIT(RCC->CSR, RCC_CSR_LPWRRSTF) == (RCC_CSR_LPWRRSTF));
AnnaBridge 146:22da6e220af6 6742 }
AnnaBridge 146:22da6e220af6 6743
AnnaBridge 146:22da6e220af6 6744 /**
AnnaBridge 146:22da6e220af6 6745 * @brief Check if RCC flag Pin reset is set or not.
AnnaBridge 146:22da6e220af6 6746 * @rmtoll CSR PINRSTF LL_RCC_IsActiveFlag_PINRST
AnnaBridge 146:22da6e220af6 6747 * @retval State of bit (1 or 0).
AnnaBridge 146:22da6e220af6 6748 */
AnnaBridge 146:22da6e220af6 6749 __STATIC_INLINE uint32_t LL_RCC_IsActiveFlag_PINRST(void)
AnnaBridge 146:22da6e220af6 6750 {
AnnaBridge 146:22da6e220af6 6751 return (READ_BIT(RCC->CSR, RCC_CSR_PINRSTF) == (RCC_CSR_PINRSTF));
AnnaBridge 146:22da6e220af6 6752 }
AnnaBridge 146:22da6e220af6 6753
AnnaBridge 146:22da6e220af6 6754 /**
AnnaBridge 146:22da6e220af6 6755 * @brief Check if RCC flag POR/PDR reset is set or not.
AnnaBridge 146:22da6e220af6 6756 * @rmtoll CSR PORRSTF LL_RCC_IsActiveFlag_PORRST
AnnaBridge 146:22da6e220af6 6757 * @retval State of bit (1 or 0).
AnnaBridge 146:22da6e220af6 6758 */
AnnaBridge 146:22da6e220af6 6759 __STATIC_INLINE uint32_t LL_RCC_IsActiveFlag_PORRST(void)
AnnaBridge 146:22da6e220af6 6760 {
AnnaBridge 146:22da6e220af6 6761 return (READ_BIT(RCC->CSR, RCC_CSR_PORRSTF) == (RCC_CSR_PORRSTF));
AnnaBridge 146:22da6e220af6 6762 }
AnnaBridge 146:22da6e220af6 6763
AnnaBridge 146:22da6e220af6 6764 /**
AnnaBridge 146:22da6e220af6 6765 * @brief Check if RCC flag Software reset is set or not.
AnnaBridge 146:22da6e220af6 6766 * @rmtoll CSR SFTRSTF LL_RCC_IsActiveFlag_SFTRST
AnnaBridge 146:22da6e220af6 6767 * @retval State of bit (1 or 0).
AnnaBridge 146:22da6e220af6 6768 */
AnnaBridge 146:22da6e220af6 6769 __STATIC_INLINE uint32_t LL_RCC_IsActiveFlag_SFTRST(void)
AnnaBridge 146:22da6e220af6 6770 {
AnnaBridge 146:22da6e220af6 6771 return (READ_BIT(RCC->CSR, RCC_CSR_SFTRSTF) == (RCC_CSR_SFTRSTF));
AnnaBridge 146:22da6e220af6 6772 }
AnnaBridge 146:22da6e220af6 6773
AnnaBridge 146:22da6e220af6 6774 /**
AnnaBridge 146:22da6e220af6 6775 * @brief Check if RCC flag Window Watchdog reset is set or not.
AnnaBridge 146:22da6e220af6 6776 * @rmtoll CSR WWDGRSTF LL_RCC_IsActiveFlag_WWDGRST
AnnaBridge 146:22da6e220af6 6777 * @retval State of bit (1 or 0).
AnnaBridge 146:22da6e220af6 6778 */
AnnaBridge 146:22da6e220af6 6779 __STATIC_INLINE uint32_t LL_RCC_IsActiveFlag_WWDGRST(void)
AnnaBridge 146:22da6e220af6 6780 {
AnnaBridge 146:22da6e220af6 6781 return (READ_BIT(RCC->CSR, RCC_CSR_WWDGRSTF) == (RCC_CSR_WWDGRSTF));
AnnaBridge 146:22da6e220af6 6782 }
AnnaBridge 146:22da6e220af6 6783
AnnaBridge 146:22da6e220af6 6784 #if defined(RCC_CSR_BORRSTF)
AnnaBridge 146:22da6e220af6 6785 /**
AnnaBridge 146:22da6e220af6 6786 * @brief Check if RCC flag BOR reset is set or not.
AnnaBridge 146:22da6e220af6 6787 * @rmtoll CSR BORRSTF LL_RCC_IsActiveFlag_BORRST
AnnaBridge 146:22da6e220af6 6788 * @retval State of bit (1 or 0).
AnnaBridge 146:22da6e220af6 6789 */
AnnaBridge 146:22da6e220af6 6790 __STATIC_INLINE uint32_t LL_RCC_IsActiveFlag_BORRST(void)
AnnaBridge 146:22da6e220af6 6791 {
AnnaBridge 146:22da6e220af6 6792 return (READ_BIT(RCC->CSR, RCC_CSR_BORRSTF) == (RCC_CSR_BORRSTF));
AnnaBridge 146:22da6e220af6 6793 }
AnnaBridge 146:22da6e220af6 6794 #endif /* RCC_CSR_BORRSTF */
AnnaBridge 146:22da6e220af6 6795
AnnaBridge 146:22da6e220af6 6796 /**
AnnaBridge 146:22da6e220af6 6797 * @brief Set RMVF bit to clear the reset flags.
AnnaBridge 146:22da6e220af6 6798 * @rmtoll CSR RMVF LL_RCC_ClearResetFlags
AnnaBridge 146:22da6e220af6 6799 * @retval None
AnnaBridge 146:22da6e220af6 6800 */
AnnaBridge 146:22da6e220af6 6801 __STATIC_INLINE void LL_RCC_ClearResetFlags(void)
AnnaBridge 146:22da6e220af6 6802 {
AnnaBridge 146:22da6e220af6 6803 SET_BIT(RCC->CSR, RCC_CSR_RMVF);
AnnaBridge 146:22da6e220af6 6804 }
AnnaBridge 146:22da6e220af6 6805
AnnaBridge 146:22da6e220af6 6806 /**
AnnaBridge 146:22da6e220af6 6807 * @}
AnnaBridge 146:22da6e220af6 6808 */
AnnaBridge 146:22da6e220af6 6809
AnnaBridge 146:22da6e220af6 6810 /** @defgroup RCC_LL_EF_IT_Management IT Management
AnnaBridge 146:22da6e220af6 6811 * @{
AnnaBridge 146:22da6e220af6 6812 */
AnnaBridge 146:22da6e220af6 6813
AnnaBridge 146:22da6e220af6 6814 /**
AnnaBridge 146:22da6e220af6 6815 * @brief Enable LSI ready interrupt
AnnaBridge 146:22da6e220af6 6816 * @rmtoll CIR LSIRDYIE LL_RCC_EnableIT_LSIRDY
AnnaBridge 146:22da6e220af6 6817 * @retval None
AnnaBridge 146:22da6e220af6 6818 */
AnnaBridge 146:22da6e220af6 6819 __STATIC_INLINE void LL_RCC_EnableIT_LSIRDY(void)
AnnaBridge 146:22da6e220af6 6820 {
AnnaBridge 146:22da6e220af6 6821 SET_BIT(RCC->CIR, RCC_CIR_LSIRDYIE);
AnnaBridge 146:22da6e220af6 6822 }
AnnaBridge 146:22da6e220af6 6823
AnnaBridge 146:22da6e220af6 6824 /**
AnnaBridge 146:22da6e220af6 6825 * @brief Enable LSE ready interrupt
AnnaBridge 146:22da6e220af6 6826 * @rmtoll CIR LSERDYIE LL_RCC_EnableIT_LSERDY
AnnaBridge 146:22da6e220af6 6827 * @retval None
AnnaBridge 146:22da6e220af6 6828 */
AnnaBridge 146:22da6e220af6 6829 __STATIC_INLINE void LL_RCC_EnableIT_LSERDY(void)
AnnaBridge 146:22da6e220af6 6830 {
AnnaBridge 146:22da6e220af6 6831 SET_BIT(RCC->CIR, RCC_CIR_LSERDYIE);
AnnaBridge 146:22da6e220af6 6832 }
AnnaBridge 146:22da6e220af6 6833
AnnaBridge 146:22da6e220af6 6834 /**
AnnaBridge 146:22da6e220af6 6835 * @brief Enable HSI ready interrupt
AnnaBridge 146:22da6e220af6 6836 * @rmtoll CIR HSIRDYIE LL_RCC_EnableIT_HSIRDY
AnnaBridge 146:22da6e220af6 6837 * @retval None
AnnaBridge 146:22da6e220af6 6838 */
AnnaBridge 146:22da6e220af6 6839 __STATIC_INLINE void LL_RCC_EnableIT_HSIRDY(void)
AnnaBridge 146:22da6e220af6 6840 {
AnnaBridge 146:22da6e220af6 6841 SET_BIT(RCC->CIR, RCC_CIR_HSIRDYIE);
AnnaBridge 146:22da6e220af6 6842 }
AnnaBridge 146:22da6e220af6 6843
AnnaBridge 146:22da6e220af6 6844 /**
AnnaBridge 146:22da6e220af6 6845 * @brief Enable HSE ready interrupt
AnnaBridge 146:22da6e220af6 6846 * @rmtoll CIR HSERDYIE LL_RCC_EnableIT_HSERDY
AnnaBridge 146:22da6e220af6 6847 * @retval None
AnnaBridge 146:22da6e220af6 6848 */
AnnaBridge 146:22da6e220af6 6849 __STATIC_INLINE void LL_RCC_EnableIT_HSERDY(void)
AnnaBridge 146:22da6e220af6 6850 {
AnnaBridge 146:22da6e220af6 6851 SET_BIT(RCC->CIR, RCC_CIR_HSERDYIE);
AnnaBridge 146:22da6e220af6 6852 }
AnnaBridge 146:22da6e220af6 6853
AnnaBridge 146:22da6e220af6 6854 /**
AnnaBridge 146:22da6e220af6 6855 * @brief Enable PLL ready interrupt
AnnaBridge 146:22da6e220af6 6856 * @rmtoll CIR PLLRDYIE LL_RCC_EnableIT_PLLRDY
AnnaBridge 146:22da6e220af6 6857 * @retval None
AnnaBridge 146:22da6e220af6 6858 */
AnnaBridge 146:22da6e220af6 6859 __STATIC_INLINE void LL_RCC_EnableIT_PLLRDY(void)
AnnaBridge 146:22da6e220af6 6860 {
AnnaBridge 146:22da6e220af6 6861 SET_BIT(RCC->CIR, RCC_CIR_PLLRDYIE);
AnnaBridge 146:22da6e220af6 6862 }
AnnaBridge 146:22da6e220af6 6863
AnnaBridge 146:22da6e220af6 6864 #if defined(RCC_PLLI2S_SUPPORT)
AnnaBridge 146:22da6e220af6 6865 /**
AnnaBridge 146:22da6e220af6 6866 * @brief Enable PLLI2S ready interrupt
AnnaBridge 146:22da6e220af6 6867 * @rmtoll CIR PLLI2SRDYIE LL_RCC_EnableIT_PLLI2SRDY
AnnaBridge 146:22da6e220af6 6868 * @retval None
AnnaBridge 146:22da6e220af6 6869 */
AnnaBridge 146:22da6e220af6 6870 __STATIC_INLINE void LL_RCC_EnableIT_PLLI2SRDY(void)
AnnaBridge 146:22da6e220af6 6871 {
AnnaBridge 146:22da6e220af6 6872 SET_BIT(RCC->CIR, RCC_CIR_PLLI2SRDYIE);
AnnaBridge 146:22da6e220af6 6873 }
AnnaBridge 146:22da6e220af6 6874 #endif /* RCC_PLLI2S_SUPPORT */
AnnaBridge 146:22da6e220af6 6875
AnnaBridge 146:22da6e220af6 6876 #if defined(RCC_PLLSAI_SUPPORT)
AnnaBridge 146:22da6e220af6 6877 /**
AnnaBridge 146:22da6e220af6 6878 * @brief Enable PLLSAI ready interrupt
AnnaBridge 146:22da6e220af6 6879 * @rmtoll CIR PLLSAIRDYIE LL_RCC_EnableIT_PLLSAIRDY
AnnaBridge 146:22da6e220af6 6880 * @retval None
AnnaBridge 146:22da6e220af6 6881 */
AnnaBridge 146:22da6e220af6 6882 __STATIC_INLINE void LL_RCC_EnableIT_PLLSAIRDY(void)
AnnaBridge 146:22da6e220af6 6883 {
AnnaBridge 146:22da6e220af6 6884 SET_BIT(RCC->CIR, RCC_CIR_PLLSAIRDYIE);
AnnaBridge 146:22da6e220af6 6885 }
AnnaBridge 146:22da6e220af6 6886 #endif /* RCC_PLLSAI_SUPPORT */
AnnaBridge 146:22da6e220af6 6887
AnnaBridge 146:22da6e220af6 6888 /**
AnnaBridge 146:22da6e220af6 6889 * @brief Disable LSI ready interrupt
AnnaBridge 146:22da6e220af6 6890 * @rmtoll CIR LSIRDYIE LL_RCC_DisableIT_LSIRDY
AnnaBridge 146:22da6e220af6 6891 * @retval None
AnnaBridge 146:22da6e220af6 6892 */
AnnaBridge 146:22da6e220af6 6893 __STATIC_INLINE void LL_RCC_DisableIT_LSIRDY(void)
AnnaBridge 146:22da6e220af6 6894 {
AnnaBridge 146:22da6e220af6 6895 CLEAR_BIT(RCC->CIR, RCC_CIR_LSIRDYIE);
AnnaBridge 146:22da6e220af6 6896 }
AnnaBridge 146:22da6e220af6 6897
AnnaBridge 146:22da6e220af6 6898 /**
AnnaBridge 146:22da6e220af6 6899 * @brief Disable LSE ready interrupt
AnnaBridge 146:22da6e220af6 6900 * @rmtoll CIR LSERDYIE LL_RCC_DisableIT_LSERDY
AnnaBridge 146:22da6e220af6 6901 * @retval None
AnnaBridge 146:22da6e220af6 6902 */
AnnaBridge 146:22da6e220af6 6903 __STATIC_INLINE void LL_RCC_DisableIT_LSERDY(void)
AnnaBridge 146:22da6e220af6 6904 {
AnnaBridge 146:22da6e220af6 6905 CLEAR_BIT(RCC->CIR, RCC_CIR_LSERDYIE);
AnnaBridge 146:22da6e220af6 6906 }
AnnaBridge 146:22da6e220af6 6907
AnnaBridge 146:22da6e220af6 6908 /**
AnnaBridge 146:22da6e220af6 6909 * @brief Disable HSI ready interrupt
AnnaBridge 146:22da6e220af6 6910 * @rmtoll CIR HSIRDYIE LL_RCC_DisableIT_HSIRDY
AnnaBridge 146:22da6e220af6 6911 * @retval None
AnnaBridge 146:22da6e220af6 6912 */
AnnaBridge 146:22da6e220af6 6913 __STATIC_INLINE void LL_RCC_DisableIT_HSIRDY(void)
AnnaBridge 146:22da6e220af6 6914 {
AnnaBridge 146:22da6e220af6 6915 CLEAR_BIT(RCC->CIR, RCC_CIR_HSIRDYIE);
AnnaBridge 146:22da6e220af6 6916 }
AnnaBridge 146:22da6e220af6 6917
AnnaBridge 146:22da6e220af6 6918 /**
AnnaBridge 146:22da6e220af6 6919 * @brief Disable HSE ready interrupt
AnnaBridge 146:22da6e220af6 6920 * @rmtoll CIR HSERDYIE LL_RCC_DisableIT_HSERDY
AnnaBridge 146:22da6e220af6 6921 * @retval None
AnnaBridge 146:22da6e220af6 6922 */
AnnaBridge 146:22da6e220af6 6923 __STATIC_INLINE void LL_RCC_DisableIT_HSERDY(void)
AnnaBridge 146:22da6e220af6 6924 {
AnnaBridge 146:22da6e220af6 6925 CLEAR_BIT(RCC->CIR, RCC_CIR_HSERDYIE);
AnnaBridge 146:22da6e220af6 6926 }
AnnaBridge 146:22da6e220af6 6927
AnnaBridge 146:22da6e220af6 6928 /**
AnnaBridge 146:22da6e220af6 6929 * @brief Disable PLL ready interrupt
AnnaBridge 146:22da6e220af6 6930 * @rmtoll CIR PLLRDYIE LL_RCC_DisableIT_PLLRDY
AnnaBridge 146:22da6e220af6 6931 * @retval None
AnnaBridge 146:22da6e220af6 6932 */
AnnaBridge 146:22da6e220af6 6933 __STATIC_INLINE void LL_RCC_DisableIT_PLLRDY(void)
AnnaBridge 146:22da6e220af6 6934 {
AnnaBridge 146:22da6e220af6 6935 CLEAR_BIT(RCC->CIR, RCC_CIR_PLLRDYIE);
AnnaBridge 146:22da6e220af6 6936 }
AnnaBridge 146:22da6e220af6 6937
AnnaBridge 146:22da6e220af6 6938 #if defined(RCC_PLLI2S_SUPPORT)
AnnaBridge 146:22da6e220af6 6939 /**
AnnaBridge 146:22da6e220af6 6940 * @brief Disable PLLI2S ready interrupt
AnnaBridge 146:22da6e220af6 6941 * @rmtoll CIR PLLI2SRDYIE LL_RCC_DisableIT_PLLI2SRDY
AnnaBridge 146:22da6e220af6 6942 * @retval None
AnnaBridge 146:22da6e220af6 6943 */
AnnaBridge 146:22da6e220af6 6944 __STATIC_INLINE void LL_RCC_DisableIT_PLLI2SRDY(void)
AnnaBridge 146:22da6e220af6 6945 {
AnnaBridge 146:22da6e220af6 6946 CLEAR_BIT(RCC->CIR, RCC_CIR_PLLI2SRDYIE);
AnnaBridge 146:22da6e220af6 6947 }
AnnaBridge 146:22da6e220af6 6948
AnnaBridge 146:22da6e220af6 6949 #endif /* RCC_PLLI2S_SUPPORT */
AnnaBridge 146:22da6e220af6 6950
AnnaBridge 146:22da6e220af6 6951 #if defined(RCC_PLLSAI_SUPPORT)
AnnaBridge 146:22da6e220af6 6952 /**
AnnaBridge 146:22da6e220af6 6953 * @brief Disable PLLSAI ready interrupt
AnnaBridge 146:22da6e220af6 6954 * @rmtoll CIR PLLSAIRDYIE LL_RCC_DisableIT_PLLSAIRDY
AnnaBridge 146:22da6e220af6 6955 * @retval None
AnnaBridge 146:22da6e220af6 6956 */
AnnaBridge 146:22da6e220af6 6957 __STATIC_INLINE void LL_RCC_DisableIT_PLLSAIRDY(void)
AnnaBridge 146:22da6e220af6 6958 {
AnnaBridge 146:22da6e220af6 6959 CLEAR_BIT(RCC->CIR, RCC_CIR_PLLSAIRDYIE);
AnnaBridge 146:22da6e220af6 6960 }
AnnaBridge 146:22da6e220af6 6961 #endif /* RCC_PLLSAI_SUPPORT */
AnnaBridge 146:22da6e220af6 6962
AnnaBridge 146:22da6e220af6 6963 /**
AnnaBridge 146:22da6e220af6 6964 * @brief Checks if LSI ready interrupt source is enabled or disabled.
AnnaBridge 146:22da6e220af6 6965 * @rmtoll CIR LSIRDYIE LL_RCC_IsEnabledIT_LSIRDY
AnnaBridge 146:22da6e220af6 6966 * @retval State of bit (1 or 0).
AnnaBridge 146:22da6e220af6 6967 */
AnnaBridge 146:22da6e220af6 6968 __STATIC_INLINE uint32_t LL_RCC_IsEnabledIT_LSIRDY(void)
AnnaBridge 146:22da6e220af6 6969 {
AnnaBridge 146:22da6e220af6 6970 return (READ_BIT(RCC->CIR, RCC_CIR_LSIRDYIE) == (RCC_CIR_LSIRDYIE));
AnnaBridge 146:22da6e220af6 6971 }
AnnaBridge 146:22da6e220af6 6972
AnnaBridge 146:22da6e220af6 6973 /**
AnnaBridge 146:22da6e220af6 6974 * @brief Checks if LSE ready interrupt source is enabled or disabled.
AnnaBridge 146:22da6e220af6 6975 * @rmtoll CIR LSERDYIE LL_RCC_IsEnabledIT_LSERDY
AnnaBridge 146:22da6e220af6 6976 * @retval State of bit (1 or 0).
AnnaBridge 146:22da6e220af6 6977 */
AnnaBridge 146:22da6e220af6 6978 __STATIC_INLINE uint32_t LL_RCC_IsEnabledIT_LSERDY(void)
AnnaBridge 146:22da6e220af6 6979 {
AnnaBridge 146:22da6e220af6 6980 return (READ_BIT(RCC->CIR, RCC_CIR_LSERDYIE) == (RCC_CIR_LSERDYIE));
AnnaBridge 146:22da6e220af6 6981 }
AnnaBridge 146:22da6e220af6 6982
AnnaBridge 146:22da6e220af6 6983 /**
AnnaBridge 146:22da6e220af6 6984 * @brief Checks if HSI ready interrupt source is enabled or disabled.
AnnaBridge 146:22da6e220af6 6985 * @rmtoll CIR HSIRDYIE LL_RCC_IsEnabledIT_HSIRDY
AnnaBridge 146:22da6e220af6 6986 * @retval State of bit (1 or 0).
AnnaBridge 146:22da6e220af6 6987 */
AnnaBridge 146:22da6e220af6 6988 __STATIC_INLINE uint32_t LL_RCC_IsEnabledIT_HSIRDY(void)
AnnaBridge 146:22da6e220af6 6989 {
AnnaBridge 146:22da6e220af6 6990 return (READ_BIT(RCC->CIR, RCC_CIR_HSIRDYIE) == (RCC_CIR_HSIRDYIE));
AnnaBridge 146:22da6e220af6 6991 }
AnnaBridge 146:22da6e220af6 6992
AnnaBridge 146:22da6e220af6 6993 /**
AnnaBridge 146:22da6e220af6 6994 * @brief Checks if HSE ready interrupt source is enabled or disabled.
AnnaBridge 146:22da6e220af6 6995 * @rmtoll CIR HSERDYIE LL_RCC_IsEnabledIT_HSERDY
AnnaBridge 146:22da6e220af6 6996 * @retval State of bit (1 or 0).
AnnaBridge 146:22da6e220af6 6997 */
AnnaBridge 146:22da6e220af6 6998 __STATIC_INLINE uint32_t LL_RCC_IsEnabledIT_HSERDY(void)
AnnaBridge 146:22da6e220af6 6999 {
AnnaBridge 146:22da6e220af6 7000 return (READ_BIT(RCC->CIR, RCC_CIR_HSERDYIE) == (RCC_CIR_HSERDYIE));
AnnaBridge 146:22da6e220af6 7001 }
AnnaBridge 146:22da6e220af6 7002
AnnaBridge 146:22da6e220af6 7003 /**
AnnaBridge 146:22da6e220af6 7004 * @brief Checks if PLL ready interrupt source is enabled or disabled.
AnnaBridge 146:22da6e220af6 7005 * @rmtoll CIR PLLRDYIE LL_RCC_IsEnabledIT_PLLRDY
AnnaBridge 146:22da6e220af6 7006 * @retval State of bit (1 or 0).
AnnaBridge 146:22da6e220af6 7007 */
AnnaBridge 146:22da6e220af6 7008 __STATIC_INLINE uint32_t LL_RCC_IsEnabledIT_PLLRDY(void)
AnnaBridge 146:22da6e220af6 7009 {
AnnaBridge 146:22da6e220af6 7010 return (READ_BIT(RCC->CIR, RCC_CIR_PLLRDYIE) == (RCC_CIR_PLLRDYIE));
AnnaBridge 146:22da6e220af6 7011 }
AnnaBridge 146:22da6e220af6 7012
AnnaBridge 146:22da6e220af6 7013 #if defined(RCC_PLLI2S_SUPPORT)
AnnaBridge 146:22da6e220af6 7014 /**
AnnaBridge 146:22da6e220af6 7015 * @brief Checks if PLLI2S ready interrupt source is enabled or disabled.
AnnaBridge 146:22da6e220af6 7016 * @rmtoll CIR PLLI2SRDYIE LL_RCC_IsEnabledIT_PLLI2SRDY
AnnaBridge 146:22da6e220af6 7017 * @retval State of bit (1 or 0).
AnnaBridge 146:22da6e220af6 7018 */
AnnaBridge 146:22da6e220af6 7019 __STATIC_INLINE uint32_t LL_RCC_IsEnabledIT_PLLI2SRDY(void)
AnnaBridge 146:22da6e220af6 7020 {
AnnaBridge 146:22da6e220af6 7021 return (READ_BIT(RCC->CIR, RCC_CIR_PLLI2SRDYIE) == (RCC_CIR_PLLI2SRDYIE));
AnnaBridge 146:22da6e220af6 7022 }
AnnaBridge 146:22da6e220af6 7023
AnnaBridge 146:22da6e220af6 7024 #endif /* RCC_PLLI2S_SUPPORT */
AnnaBridge 146:22da6e220af6 7025
AnnaBridge 146:22da6e220af6 7026 #if defined(RCC_PLLSAI_SUPPORT)
AnnaBridge 146:22da6e220af6 7027 /**
AnnaBridge 146:22da6e220af6 7028 * @brief Checks if PLLSAI ready interrupt source is enabled or disabled.
AnnaBridge 146:22da6e220af6 7029 * @rmtoll CIR PLLSAIRDYIE LL_RCC_IsEnabledIT_PLLSAIRDY
AnnaBridge 146:22da6e220af6 7030 * @retval State of bit (1 or 0).
AnnaBridge 146:22da6e220af6 7031 */
AnnaBridge 146:22da6e220af6 7032 __STATIC_INLINE uint32_t LL_RCC_IsEnabledIT_PLLSAIRDY(void)
AnnaBridge 146:22da6e220af6 7033 {
AnnaBridge 146:22da6e220af6 7034 return (READ_BIT(RCC->CIR, RCC_CIR_PLLSAIRDYIE) == (RCC_CIR_PLLSAIRDYIE));
AnnaBridge 146:22da6e220af6 7035 }
AnnaBridge 146:22da6e220af6 7036 #endif /* RCC_PLLSAI_SUPPORT */
AnnaBridge 146:22da6e220af6 7037
AnnaBridge 146:22da6e220af6 7038 /**
AnnaBridge 146:22da6e220af6 7039 * @}
AnnaBridge 146:22da6e220af6 7040 */
AnnaBridge 146:22da6e220af6 7041
AnnaBridge 146:22da6e220af6 7042 #if defined(USE_FULL_LL_DRIVER)
AnnaBridge 146:22da6e220af6 7043 /** @defgroup RCC_LL_EF_Init De-initialization function
AnnaBridge 146:22da6e220af6 7044 * @{
AnnaBridge 146:22da6e220af6 7045 */
AnnaBridge 146:22da6e220af6 7046 ErrorStatus LL_RCC_DeInit(void);
AnnaBridge 146:22da6e220af6 7047 /**
AnnaBridge 146:22da6e220af6 7048 * @}
AnnaBridge 146:22da6e220af6 7049 */
AnnaBridge 146:22da6e220af6 7050
AnnaBridge 146:22da6e220af6 7051 /** @defgroup RCC_LL_EF_Get_Freq Get system and peripherals clocks frequency functions
AnnaBridge 146:22da6e220af6 7052 * @{
AnnaBridge 146:22da6e220af6 7053 */
AnnaBridge 146:22da6e220af6 7054 void LL_RCC_GetSystemClocksFreq(LL_RCC_ClocksTypeDef *RCC_Clocks);
AnnaBridge 146:22da6e220af6 7055 #if defined(FMPI2C1)
AnnaBridge 146:22da6e220af6 7056 uint32_t LL_RCC_GetFMPI2CClockFreq(uint32_t FMPI2CxSource);
AnnaBridge 146:22da6e220af6 7057 #endif /* FMPI2C1 */
AnnaBridge 146:22da6e220af6 7058 #if defined(LPTIM1)
AnnaBridge 146:22da6e220af6 7059 uint32_t LL_RCC_GetLPTIMClockFreq(uint32_t LPTIMxSource);
AnnaBridge 146:22da6e220af6 7060 #endif /* LPTIM1 */
AnnaBridge 146:22da6e220af6 7061 #if defined(SAI1)
AnnaBridge 146:22da6e220af6 7062 uint32_t LL_RCC_GetSAIClockFreq(uint32_t SAIxSource);
AnnaBridge 146:22da6e220af6 7063 #endif /* SAI1 */
AnnaBridge 146:22da6e220af6 7064 #if defined(SDIO)
AnnaBridge 146:22da6e220af6 7065 uint32_t LL_RCC_GetSDIOClockFreq(uint32_t SDIOxSource);
AnnaBridge 146:22da6e220af6 7066 #endif /* SDIO */
AnnaBridge 146:22da6e220af6 7067 #if defined(RNG)
AnnaBridge 146:22da6e220af6 7068 uint32_t LL_RCC_GetRNGClockFreq(uint32_t RNGxSource);
AnnaBridge 146:22da6e220af6 7069 #endif /* RNG */
AnnaBridge 146:22da6e220af6 7070 #if defined(USB_OTG_FS) || defined(USB_OTG_HS)
AnnaBridge 146:22da6e220af6 7071 uint32_t LL_RCC_GetUSBClockFreq(uint32_t USBxSource);
AnnaBridge 146:22da6e220af6 7072 #endif /* USB_OTG_FS || USB_OTG_HS */
AnnaBridge 146:22da6e220af6 7073 #if defined(DFSDM1_Channel0)
AnnaBridge 146:22da6e220af6 7074 uint32_t LL_RCC_GetDFSDMClockFreq(uint32_t DFSDMxSource);
AnnaBridge 146:22da6e220af6 7075 uint32_t LL_RCC_GetDFSDMAudioClockFreq(uint32_t DFSDMxSource);
AnnaBridge 146:22da6e220af6 7076 #endif /* DFSDM1_Channel0 */
AnnaBridge 146:22da6e220af6 7077 uint32_t LL_RCC_GetI2SClockFreq(uint32_t I2SxSource);
AnnaBridge 146:22da6e220af6 7078 #if defined(CEC)
AnnaBridge 146:22da6e220af6 7079 uint32_t LL_RCC_GetCECClockFreq(uint32_t CECxSource);
AnnaBridge 146:22da6e220af6 7080 #endif /* CEC */
AnnaBridge 146:22da6e220af6 7081 #if defined(LTDC)
AnnaBridge 146:22da6e220af6 7082 uint32_t LL_RCC_GetLTDCClockFreq(uint32_t LTDCxSource);
AnnaBridge 146:22da6e220af6 7083 #endif /* LTDC */
AnnaBridge 146:22da6e220af6 7084 #if defined(SPDIFRX)
AnnaBridge 146:22da6e220af6 7085 uint32_t LL_RCC_GetSPDIFRXClockFreq(uint32_t SPDIFRXxSource);
AnnaBridge 146:22da6e220af6 7086 #endif /* SPDIFRX */
AnnaBridge 146:22da6e220af6 7087 #if defined(DSI)
AnnaBridge 146:22da6e220af6 7088 uint32_t LL_RCC_GetDSIClockFreq(uint32_t DSIxSource);
AnnaBridge 146:22da6e220af6 7089 #endif /* DSI */
AnnaBridge 146:22da6e220af6 7090 /**
AnnaBridge 146:22da6e220af6 7091 * @}
AnnaBridge 146:22da6e220af6 7092 */
AnnaBridge 146:22da6e220af6 7093 #endif /* USE_FULL_LL_DRIVER */
AnnaBridge 146:22da6e220af6 7094
AnnaBridge 146:22da6e220af6 7095 /**
AnnaBridge 146:22da6e220af6 7096 * @}
AnnaBridge 146:22da6e220af6 7097 */
AnnaBridge 146:22da6e220af6 7098
AnnaBridge 146:22da6e220af6 7099 /**
AnnaBridge 146:22da6e220af6 7100 * @}
AnnaBridge 146:22da6e220af6 7101 */
AnnaBridge 146:22da6e220af6 7102
AnnaBridge 146:22da6e220af6 7103 #endif /* defined(RCC) */
AnnaBridge 146:22da6e220af6 7104
AnnaBridge 146:22da6e220af6 7105 /**
AnnaBridge 146:22da6e220af6 7106 * @}
AnnaBridge 146:22da6e220af6 7107 */
AnnaBridge 146:22da6e220af6 7108
AnnaBridge 146:22da6e220af6 7109 #ifdef __cplusplus
AnnaBridge 146:22da6e220af6 7110 }
AnnaBridge 146:22da6e220af6 7111 #endif
AnnaBridge 146:22da6e220af6 7112
AnnaBridge 146:22da6e220af6 7113 #endif /* __STM32F4xx_LL_RCC_H */
AnnaBridge 146:22da6e220af6 7114
AnnaBridge 146:22da6e220af6 7115 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/