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TARGET_MOTE_L152RC/TARGET_STM/TARGET_STM32L1/device/stm32l1xx_ll_gpio.h@165:d1b4690b3f8b, 2018-04-19 (annotated)

Committer:
AnnaBridge
Date:
Thu Apr 19 14:31:27 2018 +0100
Revision:
165:d1b4690b3f8b
Parent:
128:9bcdf88f62b0 
mbed library. Release version 161

Who changed what in which revision?

UserRevisionLine numberNew contents of line
<> 128:9bcdf88f62b0 1 /**
<> 128:9bcdf88f62b0 2 ******************************************************************************
<> 128:9bcdf88f62b0 3 * @file stm32l1xx_ll_gpio.h
<> 128:9bcdf88f62b0 4 * @author MCD Application Team
<> 128:9bcdf88f62b0 5 * @brief Header file of GPIO LL module.
<> 128:9bcdf88f62b0 6 ******************************************************************************
<> 128:9bcdf88f62b0 7 * @attention
<> 128:9bcdf88f62b0 8 *
AnnaBridge 165:d1b4690b3f8b 9 * <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
<> 128:9bcdf88f62b0 10 *
<> 128:9bcdf88f62b0 11 * Redistribution and use in source and binary forms, with or without modification,
<> 128:9bcdf88f62b0 12 * are permitted provided that the following conditions are met:
<> 128:9bcdf88f62b0 13 * 1. Redistributions of source code must retain the above copyright notice,
<> 128:9bcdf88f62b0 14 * this list of conditions and the following disclaimer.
<> 128:9bcdf88f62b0 15 * 2. Redistributions in binary form must reproduce the above copyright notice,
<> 128:9bcdf88f62b0 16 * this list of conditions and the following disclaimer in the documentation
<> 128:9bcdf88f62b0 17 * and/or other materials provided with the distribution.
<> 128:9bcdf88f62b0 18 * 3. Neither the name of STMicroelectronics nor the names of its contributors
<> 128:9bcdf88f62b0 19 * may be used to endorse or promote products derived from this software
<> 128:9bcdf88f62b0 20 * without specific prior written permission.
<> 128:9bcdf88f62b0 21 *
<> 128:9bcdf88f62b0 22 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
<> 128:9bcdf88f62b0 23 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
<> 128:9bcdf88f62b0 24 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
<> 128:9bcdf88f62b0 25 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
<> 128:9bcdf88f62b0 26 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
<> 128:9bcdf88f62b0 27 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
<> 128:9bcdf88f62b0 28 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
<> 128:9bcdf88f62b0 29 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
<> 128:9bcdf88f62b0 30 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
<> 128:9bcdf88f62b0 31 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
<> 128:9bcdf88f62b0 32 *
<> 128:9bcdf88f62b0 33 ******************************************************************************
<> 128:9bcdf88f62b0 34 */
<> 128:9bcdf88f62b0 35
<> 128:9bcdf88f62b0 36 /* Define to prevent recursive inclusion -------------------------------------*/
<> 128:9bcdf88f62b0 37 #ifndef __STM32L1xx_LL_GPIO_H
<> 128:9bcdf88f62b0 38 #define __STM32L1xx_LL_GPIO_H
<> 128:9bcdf88f62b0 39
<> 128:9bcdf88f62b0 40 #ifdef __cplusplus
<> 128:9bcdf88f62b0 41 extern "C" {
<> 128:9bcdf88f62b0 42 #endif
<> 128:9bcdf88f62b0 43
<> 128:9bcdf88f62b0 44 /* Includes ------------------------------------------------------------------*/
<> 128:9bcdf88f62b0 45 #include "stm32l1xx.h"
<> 128:9bcdf88f62b0 46
<> 128:9bcdf88f62b0 47 /** @addtogroup STM32L1xx_LL_Driver
<> 128:9bcdf88f62b0 48 * @{
<> 128:9bcdf88f62b0 49 */
<> 128:9bcdf88f62b0 50
<> 128:9bcdf88f62b0 51 #if defined (GPIOA) || defined (GPIOB) || defined (GPIOC) || defined (GPIOD) || defined (GPIOE) || defined (GPIOF) || defined (GPIOG) || defined (GPIOH)
<> 128:9bcdf88f62b0 52
<> 128:9bcdf88f62b0 53 /** @defgroup GPIO_LL GPIO
<> 128:9bcdf88f62b0 54 * @{
<> 128:9bcdf88f62b0 55 */
<> 128:9bcdf88f62b0 56
<> 128:9bcdf88f62b0 57 /* Private types -------------------------------------------------------------*/
<> 128:9bcdf88f62b0 58 /* Private variables ---------------------------------------------------------*/
<> 128:9bcdf88f62b0 59 /* Private constants ---------------------------------------------------------*/
<> 128:9bcdf88f62b0 60 /* Private macros ------------------------------------------------------------*/
<> 128:9bcdf88f62b0 61 #if defined(USE_FULL_LL_DRIVER)
<> 128:9bcdf88f62b0 62 /** @defgroup GPIO_LL_Private_Macros GPIO Private Macros
<> 128:9bcdf88f62b0 63 * @{
<> 128:9bcdf88f62b0 64 */
<> 128:9bcdf88f62b0 65
<> 128:9bcdf88f62b0 66 /**
<> 128:9bcdf88f62b0 67 * @}
<> 128:9bcdf88f62b0 68 */
<> 128:9bcdf88f62b0 69 #endif /*USE_FULL_LL_DRIVER*/
<> 128:9bcdf88f62b0 70
<> 128:9bcdf88f62b0 71 /* Exported types ------------------------------------------------------------*/
<> 128:9bcdf88f62b0 72 #if defined(USE_FULL_LL_DRIVER)
<> 128:9bcdf88f62b0 73 /** @defgroup GPIO_LL_ES_INIT GPIO Exported Init structures
<> 128:9bcdf88f62b0 74 * @{
<> 128:9bcdf88f62b0 75 */
<> 128:9bcdf88f62b0 76
<> 128:9bcdf88f62b0 77 /**
<> 128:9bcdf88f62b0 78 * @brief LL GPIO Init Structure definition
<> 128:9bcdf88f62b0 79 */
<> 128:9bcdf88f62b0 80 typedef struct
<> 128:9bcdf88f62b0 81 {
<> 128:9bcdf88f62b0 82 uint32_t Pin; /*!< Specifies the GPIO pins to be configured.
<> 128:9bcdf88f62b0 83 This parameter can be any value of @ref GPIO_LL_EC_PIN */
<> 128:9bcdf88f62b0 84
<> 128:9bcdf88f62b0 85 uint32_t Mode; /*!< Specifies the operating mode for the selected pins.
<> 128:9bcdf88f62b0 86 This parameter can be a value of @ref GPIO_LL_EC_MODE.
<> 128:9bcdf88f62b0 87
<> 128:9bcdf88f62b0 88 GPIO HW configuration can be modified afterwards using unitary function @ref LL_GPIO_SetPinMode().*/
<> 128:9bcdf88f62b0 89
<> 128:9bcdf88f62b0 90 uint32_t Speed; /*!< Specifies the speed for the selected pins.
<> 128:9bcdf88f62b0 91 This parameter can be a value of @ref GPIO_LL_EC_SPEED.
<> 128:9bcdf88f62b0 92
<> 128:9bcdf88f62b0 93 GPIO HW configuration can be modified afterwards using unitary function @ref LL_GPIO_SetPinSpeed().*/
<> 128:9bcdf88f62b0 94
<> 128:9bcdf88f62b0 95 uint32_t OutputType; /*!< Specifies the operating output type for the selected pins.
<> 128:9bcdf88f62b0 96 This parameter can be a value of @ref GPIO_LL_EC_OUTPUT.
<> 128:9bcdf88f62b0 97
<> 128:9bcdf88f62b0 98 GPIO HW configuration can be modified afterwards using unitary function @ref LL_GPIO_SetPinOutputType().*/
<> 128:9bcdf88f62b0 99
<> 128:9bcdf88f62b0 100 uint32_t Pull; /*!< Specifies the operating Pull-up/Pull down for the selected pins.
<> 128:9bcdf88f62b0 101 This parameter can be a value of @ref GPIO_LL_EC_PULL.
<> 128:9bcdf88f62b0 102
<> 128:9bcdf88f62b0 103 GPIO HW configuration can be modified afterwards using unitary function @ref LL_GPIO_SetPinPull().*/
<> 128:9bcdf88f62b0 104
<> 128:9bcdf88f62b0 105 uint32_t Alternate; /*!< Specifies the Peripheral to be connected to the selected pins.
<> 128:9bcdf88f62b0 106 This parameter can be a value of @ref GPIO_LL_EC_AF.
<> 128:9bcdf88f62b0 107
<> 128:9bcdf88f62b0 108 GPIO HW configuration can be modified afterwards using unitary function @ref LL_GPIO_SetAFPin_0_7() and LL_GPIO_SetAFPin_8_15().*/
<> 128:9bcdf88f62b0 109 } LL_GPIO_InitTypeDef;
<> 128:9bcdf88f62b0 110
<> 128:9bcdf88f62b0 111 /**
<> 128:9bcdf88f62b0 112 * @}
<> 128:9bcdf88f62b0 113 */
<> 128:9bcdf88f62b0 114 #endif /* USE_FULL_LL_DRIVER */
<> 128:9bcdf88f62b0 115
<> 128:9bcdf88f62b0 116 /* Exported constants --------------------------------------------------------*/
<> 128:9bcdf88f62b0 117 /** @defgroup GPIO_LL_Exported_Constants GPIO Exported Constants
<> 128:9bcdf88f62b0 118 * @{
<> 128:9bcdf88f62b0 119 */
<> 128:9bcdf88f62b0 120
<> 128:9bcdf88f62b0 121 /** @defgroup GPIO_LL_EC_PIN PIN
<> 128:9bcdf88f62b0 122 * @{
<> 128:9bcdf88f62b0 123 */
<> 128:9bcdf88f62b0 124 #define LL_GPIO_PIN_0 GPIO_BSRR_BS_0 /*!< Select pin 0 */
<> 128:9bcdf88f62b0 125 #define LL_GPIO_PIN_1 GPIO_BSRR_BS_1 /*!< Select pin 1 */
<> 128:9bcdf88f62b0 126 #define LL_GPIO_PIN_2 GPIO_BSRR_BS_2 /*!< Select pin 2 */
<> 128:9bcdf88f62b0 127 #define LL_GPIO_PIN_3 GPIO_BSRR_BS_3 /*!< Select pin 3 */
<> 128:9bcdf88f62b0 128 #define LL_GPIO_PIN_4 GPIO_BSRR_BS_4 /*!< Select pin 4 */
<> 128:9bcdf88f62b0 129 #define LL_GPIO_PIN_5 GPIO_BSRR_BS_5 /*!< Select pin 5 */
<> 128:9bcdf88f62b0 130 #define LL_GPIO_PIN_6 GPIO_BSRR_BS_6 /*!< Select pin 6 */
<> 128:9bcdf88f62b0 131 #define LL_GPIO_PIN_7 GPIO_BSRR_BS_7 /*!< Select pin 7 */
<> 128:9bcdf88f62b0 132 #define LL_GPIO_PIN_8 GPIO_BSRR_BS_8 /*!< Select pin 8 */
<> 128:9bcdf88f62b0 133 #define LL_GPIO_PIN_9 GPIO_BSRR_BS_9 /*!< Select pin 9 */
<> 128:9bcdf88f62b0 134 #define LL_GPIO_PIN_10 GPIO_BSRR_BS_10 /*!< Select pin 10 */
<> 128:9bcdf88f62b0 135 #define LL_GPIO_PIN_11 GPIO_BSRR_BS_11 /*!< Select pin 11 */
<> 128:9bcdf88f62b0 136 #define LL_GPIO_PIN_12 GPIO_BSRR_BS_12 /*!< Select pin 12 */
<> 128:9bcdf88f62b0 137 #define LL_GPIO_PIN_13 GPIO_BSRR_BS_13 /*!< Select pin 13 */
<> 128:9bcdf88f62b0 138 #define LL_GPIO_PIN_14 GPIO_BSRR_BS_14 /*!< Select pin 14 */
<> 128:9bcdf88f62b0 139 #define LL_GPIO_PIN_15 GPIO_BSRR_BS_15 /*!< Select pin 15 */
<> 128:9bcdf88f62b0 140 #define LL_GPIO_PIN_ALL (GPIO_BSRR_BS_0 | GPIO_BSRR_BS_1 | GPIO_BSRR_BS_2 | \
<> 128:9bcdf88f62b0 141 GPIO_BSRR_BS_3 | GPIO_BSRR_BS_4 | GPIO_BSRR_BS_5 | \
<> 128:9bcdf88f62b0 142 GPIO_BSRR_BS_6 | GPIO_BSRR_BS_7 | GPIO_BSRR_BS_8 | \
<> 128:9bcdf88f62b0 143 GPIO_BSRR_BS_9 | GPIO_BSRR_BS_10 | GPIO_BSRR_BS_11 | \
<> 128:9bcdf88f62b0 144 GPIO_BSRR_BS_12 | GPIO_BSRR_BS_13 | GPIO_BSRR_BS_14 | \
<> 128:9bcdf88f62b0 145 GPIO_BSRR_BS_15) /*!< Select all pins */
<> 128:9bcdf88f62b0 146 /**
<> 128:9bcdf88f62b0 147 * @}
<> 128:9bcdf88f62b0 148 */
<> 128:9bcdf88f62b0 149
<> 128:9bcdf88f62b0 150 /** @defgroup GPIO_LL_EC_MODE Mode
<> 128:9bcdf88f62b0 151 * @{
<> 128:9bcdf88f62b0 152 */
AnnaBridge 165:d1b4690b3f8b 153 #define LL_GPIO_MODE_INPUT (0x00000000U) /*!< Select input mode */
<> 128:9bcdf88f62b0 154 #define LL_GPIO_MODE_OUTPUT GPIO_MODER_MODER0_0 /*!< Select output mode */
<> 128:9bcdf88f62b0 155 #define LL_GPIO_MODE_ALTERNATE GPIO_MODER_MODER0_1 /*!< Select alternate function mode */
<> 128:9bcdf88f62b0 156 #define LL_GPIO_MODE_ANALOG GPIO_MODER_MODER0 /*!< Select analog mode */
<> 128:9bcdf88f62b0 157 /**
<> 128:9bcdf88f62b0 158 * @}
<> 128:9bcdf88f62b0 159 */
<> 128:9bcdf88f62b0 160
<> 128:9bcdf88f62b0 161 /** @defgroup GPIO_LL_EC_OUTPUT Output Type
<> 128:9bcdf88f62b0 162 * @{
<> 128:9bcdf88f62b0 163 */
AnnaBridge 165:d1b4690b3f8b 164 #define LL_GPIO_OUTPUT_PUSHPULL (0x00000000U) /*!< Select push-pull as output type */
<> 128:9bcdf88f62b0 165 #define LL_GPIO_OUTPUT_OPENDRAIN GPIO_OTYPER_OT_0 /*!< Select open-drain as output type */
<> 128:9bcdf88f62b0 166 /**
<> 128:9bcdf88f62b0 167 * @}
<> 128:9bcdf88f62b0 168 */
<> 128:9bcdf88f62b0 169
<> 128:9bcdf88f62b0 170 /** @defgroup GPIO_LL_EC_SPEED Output Speed
<> 128:9bcdf88f62b0 171 * @{
<> 128:9bcdf88f62b0 172 */
AnnaBridge 165:d1b4690b3f8b 173 #define LL_GPIO_SPEED_FREQ_LOW (0x00000000U) /*!< Select I/O low output speed */
<> 128:9bcdf88f62b0 174 #define LL_GPIO_SPEED_FREQ_MEDIUM GPIO_OSPEEDER_OSPEEDR0_0 /*!< Select I/O medium output speed */
<> 128:9bcdf88f62b0 175 #define LL_GPIO_SPEED_FREQ_HIGH GPIO_OSPEEDER_OSPEEDR0_1 /*!< Select I/O fast output speed */
<> 128:9bcdf88f62b0 176 #define LL_GPIO_SPEED_FREQ_VERY_HIGH GPIO_OSPEEDER_OSPEEDR0 /*!< Select I/O high output speed */
<> 128:9bcdf88f62b0 177 /**
<> 128:9bcdf88f62b0 178 * @}
<> 128:9bcdf88f62b0 179 */
<> 128:9bcdf88f62b0 180
<> 128:9bcdf88f62b0 181 /** @defgroup GPIO_LL_EC_PULL Pull Up Pull Down
<> 128:9bcdf88f62b0 182 * @{
<> 128:9bcdf88f62b0 183 */
AnnaBridge 165:d1b4690b3f8b 184 #define LL_GPIO_PULL_NO (0x00000000U) /*!< Select I/O no pull */
<> 128:9bcdf88f62b0 185 #define LL_GPIO_PULL_UP GPIO_PUPDR_PUPDR0_0 /*!< Select I/O pull up */
<> 128:9bcdf88f62b0 186 #define LL_GPIO_PULL_DOWN GPIO_PUPDR_PUPDR0_1 /*!< Select I/O pull down */
<> 128:9bcdf88f62b0 187 /**
<> 128:9bcdf88f62b0 188 * @}
<> 128:9bcdf88f62b0 189 */
<> 128:9bcdf88f62b0 190
<> 128:9bcdf88f62b0 191 /** @defgroup GPIO_LL_EC_AF Alternate Function
<> 128:9bcdf88f62b0 192 * @{
<> 128:9bcdf88f62b0 193 */
AnnaBridge 165:d1b4690b3f8b 194 #define LL_GPIO_AF_0 (0x0000000U) /*!< Select alternate function 0 */
AnnaBridge 165:d1b4690b3f8b 195 #define LL_GPIO_AF_1 (0x0000001U) /*!< Select alternate function 1 */
AnnaBridge 165:d1b4690b3f8b 196 #define LL_GPIO_AF_2 (0x0000002U) /*!< Select alternate function 2 */
AnnaBridge 165:d1b4690b3f8b 197 #define LL_GPIO_AF_3 (0x0000003U) /*!< Select alternate function 3 */
AnnaBridge 165:d1b4690b3f8b 198 #define LL_GPIO_AF_4 (0x0000004U) /*!< Select alternate function 4 */
AnnaBridge 165:d1b4690b3f8b 199 #define LL_GPIO_AF_5 (0x0000005U) /*!< Select alternate function 5 */
AnnaBridge 165:d1b4690b3f8b 200 #define LL_GPIO_AF_6 (0x0000006U) /*!< Select alternate function 6 */
AnnaBridge 165:d1b4690b3f8b 201 #define LL_GPIO_AF_7 (0x0000007U) /*!< Select alternate function 7 */
AnnaBridge 165:d1b4690b3f8b 202 #define LL_GPIO_AF_8 (0x0000008U) /*!< Select alternate function 8 */
AnnaBridge 165:d1b4690b3f8b 203 #define LL_GPIO_AF_9 (0x0000009U) /*!< Select alternate function 9 */
AnnaBridge 165:d1b4690b3f8b 204 #define LL_GPIO_AF_10 (0x000000AU) /*!< Select alternate function 10 */
AnnaBridge 165:d1b4690b3f8b 205 #define LL_GPIO_AF_11 (0x000000BU) /*!< Select alternate function 11 */
AnnaBridge 165:d1b4690b3f8b 206 #define LL_GPIO_AF_12 (0x000000CU) /*!< Select alternate function 12 */
AnnaBridge 165:d1b4690b3f8b 207 #define LL_GPIO_AF_13 (0x000000DU) /*!< Select alternate function 13 */
AnnaBridge 165:d1b4690b3f8b 208 #define LL_GPIO_AF_14 (0x000000EU) /*!< Select alternate function 14 */
AnnaBridge 165:d1b4690b3f8b 209 #define LL_GPIO_AF_15 (0x000000FU) /*!< Select alternate function 15 */
<> 128:9bcdf88f62b0 210 /**
<> 128:9bcdf88f62b0 211 * @}
<> 128:9bcdf88f62b0 212 */
<> 128:9bcdf88f62b0 213
<> 128:9bcdf88f62b0 214 /**
<> 128:9bcdf88f62b0 215 * @}
<> 128:9bcdf88f62b0 216 */
<> 128:9bcdf88f62b0 217
<> 128:9bcdf88f62b0 218 /* Exported macro ------------------------------------------------------------*/
<> 128:9bcdf88f62b0 219 /** @defgroup GPIO_LL_Exported_Macros GPIO Exported Macros
<> 128:9bcdf88f62b0 220 * @{
<> 128:9bcdf88f62b0 221 */
<> 128:9bcdf88f62b0 222
<> 128:9bcdf88f62b0 223 /** @defgroup GPIO_LL_EM_WRITE_READ Common Write and read registers Macros
<> 128:9bcdf88f62b0 224 * @{
<> 128:9bcdf88f62b0 225 */
<> 128:9bcdf88f62b0 226
<> 128:9bcdf88f62b0 227 /**
<> 128:9bcdf88f62b0 228 * @brief Write a value in GPIO register
<> 128:9bcdf88f62b0 229 * @param __INSTANCE__ GPIO Instance
<> 128:9bcdf88f62b0 230 * @param __REG__ Register to be written
<> 128:9bcdf88f62b0 231 * @param __VALUE__ Value to be written in the register
<> 128:9bcdf88f62b0 232 * @retval None
<> 128:9bcdf88f62b0 233 */
<> 128:9bcdf88f62b0 234 #define LL_GPIO_WriteReg(__INSTANCE__, __REG__, __VALUE__) WRITE_REG(__INSTANCE__->__REG__, (__VALUE__))
<> 128:9bcdf88f62b0 235
<> 128:9bcdf88f62b0 236 /**
<> 128:9bcdf88f62b0 237 * @brief Read a value in GPIO register
<> 128:9bcdf88f62b0 238 * @param __INSTANCE__ GPIO Instance
<> 128:9bcdf88f62b0 239 * @param __REG__ Register to be read
<> 128:9bcdf88f62b0 240 * @retval Register value
<> 128:9bcdf88f62b0 241 */
<> 128:9bcdf88f62b0 242 #define LL_GPIO_ReadReg(__INSTANCE__, __REG__) READ_REG(__INSTANCE__->__REG__)
<> 128:9bcdf88f62b0 243 /**
<> 128:9bcdf88f62b0 244 * @}
<> 128:9bcdf88f62b0 245 */
<> 128:9bcdf88f62b0 246
<> 128:9bcdf88f62b0 247 /**
<> 128:9bcdf88f62b0 248 * @}
<> 128:9bcdf88f62b0 249 */
<> 128:9bcdf88f62b0 250
<> 128:9bcdf88f62b0 251 /* Exported functions --------------------------------------------------------*/
<> 128:9bcdf88f62b0 252 /** @defgroup GPIO_LL_Exported_Functions GPIO Exported Functions
<> 128:9bcdf88f62b0 253 * @{
<> 128:9bcdf88f62b0 254 */
<> 128:9bcdf88f62b0 255
<> 128:9bcdf88f62b0 256 /** @defgroup GPIO_LL_EF_Port_Configuration Port Configuration
<> 128:9bcdf88f62b0 257 * @{
<> 128:9bcdf88f62b0 258 */
<> 128:9bcdf88f62b0 259
<> 128:9bcdf88f62b0 260 /**
<> 128:9bcdf88f62b0 261 * @brief Configure gpio mode for a dedicated pin on dedicated port.
<> 128:9bcdf88f62b0 262 * @note I/O mode can be Input mode, General purpose output, Alternate function mode or Analog.
<> 128:9bcdf88f62b0 263 * @note Warning: only one pin can be passed as parameter.
<> 128:9bcdf88f62b0 264 * @rmtoll MODER MODEy LL_GPIO_SetPinMode
<> 128:9bcdf88f62b0 265 * @param GPIOx GPIO Port
<> 128:9bcdf88f62b0 266 * @param Pin This parameter can be one of the following values:
<> 128:9bcdf88f62b0 267 * @arg @ref LL_GPIO_PIN_0
<> 128:9bcdf88f62b0 268 * @arg @ref LL_GPIO_PIN_1
<> 128:9bcdf88f62b0 269 * @arg @ref LL_GPIO_PIN_2
<> 128:9bcdf88f62b0 270 * @arg @ref LL_GPIO_PIN_3
<> 128:9bcdf88f62b0 271 * @arg @ref LL_GPIO_PIN_4
<> 128:9bcdf88f62b0 272 * @arg @ref LL_GPIO_PIN_5
<> 128:9bcdf88f62b0 273 * @arg @ref LL_GPIO_PIN_6
<> 128:9bcdf88f62b0 274 * @arg @ref LL_GPIO_PIN_7
<> 128:9bcdf88f62b0 275 * @arg @ref LL_GPIO_PIN_8
<> 128:9bcdf88f62b0 276 * @arg @ref LL_GPIO_PIN_9
<> 128:9bcdf88f62b0 277 * @arg @ref LL_GPIO_PIN_10
<> 128:9bcdf88f62b0 278 * @arg @ref LL_GPIO_PIN_11
<> 128:9bcdf88f62b0 279 * @arg @ref LL_GPIO_PIN_12
<> 128:9bcdf88f62b0 280 * @arg @ref LL_GPIO_PIN_13
<> 128:9bcdf88f62b0 281 * @arg @ref LL_GPIO_PIN_14
<> 128:9bcdf88f62b0 282 * @arg @ref LL_GPIO_PIN_15
<> 128:9bcdf88f62b0 283 * @param Mode This parameter can be one of the following values:
<> 128:9bcdf88f62b0 284 * @arg @ref LL_GPIO_MODE_INPUT
<> 128:9bcdf88f62b0 285 * @arg @ref LL_GPIO_MODE_OUTPUT
<> 128:9bcdf88f62b0 286 * @arg @ref LL_GPIO_MODE_ALTERNATE
<> 128:9bcdf88f62b0 287 * @arg @ref LL_GPIO_MODE_ANALOG
<> 128:9bcdf88f62b0 288 * @retval None
<> 128:9bcdf88f62b0 289 */
<> 128:9bcdf88f62b0 290 __STATIC_INLINE void LL_GPIO_SetPinMode(GPIO_TypeDef *GPIOx, uint32_t Pin, uint32_t Mode)
<> 128:9bcdf88f62b0 291 {
<> 128:9bcdf88f62b0 292 MODIFY_REG(GPIOx->MODER, (GPIO_MODER_MODER0 << (POSITION_VAL(Pin) * 2U)), (Mode << (POSITION_VAL(Pin) * 2U)));
<> 128:9bcdf88f62b0 293 }
<> 128:9bcdf88f62b0 294
<> 128:9bcdf88f62b0 295 /**
<> 128:9bcdf88f62b0 296 * @brief Return gpio mode for a dedicated pin on dedicated port.
<> 128:9bcdf88f62b0 297 * @note I/O mode can be Input mode, General purpose output, Alternate function mode or Analog.
<> 128:9bcdf88f62b0 298 * @note Warning: only one pin can be passed as parameter.
<> 128:9bcdf88f62b0 299 * @rmtoll MODER MODEy LL_GPIO_GetPinMode
<> 128:9bcdf88f62b0 300 * @param GPIOx GPIO Port
<> 128:9bcdf88f62b0 301 * @param Pin This parameter can be one of the following values:
<> 128:9bcdf88f62b0 302 * @arg @ref LL_GPIO_PIN_0
<> 128:9bcdf88f62b0 303 * @arg @ref LL_GPIO_PIN_1
<> 128:9bcdf88f62b0 304 * @arg @ref LL_GPIO_PIN_2
<> 128:9bcdf88f62b0 305 * @arg @ref LL_GPIO_PIN_3
<> 128:9bcdf88f62b0 306 * @arg @ref LL_GPIO_PIN_4
<> 128:9bcdf88f62b0 307 * @arg @ref LL_GPIO_PIN_5
<> 128:9bcdf88f62b0 308 * @arg @ref LL_GPIO_PIN_6
<> 128:9bcdf88f62b0 309 * @arg @ref LL_GPIO_PIN_7
<> 128:9bcdf88f62b0 310 * @arg @ref LL_GPIO_PIN_8
<> 128:9bcdf88f62b0 311 * @arg @ref LL_GPIO_PIN_9
<> 128:9bcdf88f62b0 312 * @arg @ref LL_GPIO_PIN_10
<> 128:9bcdf88f62b0 313 * @arg @ref LL_GPIO_PIN_11
<> 128:9bcdf88f62b0 314 * @arg @ref LL_GPIO_PIN_12
<> 128:9bcdf88f62b0 315 * @arg @ref LL_GPIO_PIN_13
<> 128:9bcdf88f62b0 316 * @arg @ref LL_GPIO_PIN_14
<> 128:9bcdf88f62b0 317 * @arg @ref LL_GPIO_PIN_15
<> 128:9bcdf88f62b0 318 * @retval Returned value can be one of the following values:
<> 128:9bcdf88f62b0 319 * @arg @ref LL_GPIO_MODE_INPUT
<> 128:9bcdf88f62b0 320 * @arg @ref LL_GPIO_MODE_OUTPUT
<> 128:9bcdf88f62b0 321 * @arg @ref LL_GPIO_MODE_ALTERNATE
<> 128:9bcdf88f62b0 322 * @arg @ref LL_GPIO_MODE_ANALOG
<> 128:9bcdf88f62b0 323 */
<> 128:9bcdf88f62b0 324 __STATIC_INLINE uint32_t LL_GPIO_GetPinMode(GPIO_TypeDef *GPIOx, uint32_t Pin)
<> 128:9bcdf88f62b0 325 {
<> 128:9bcdf88f62b0 326 return (uint32_t)(READ_BIT(GPIOx->MODER,
<> 128:9bcdf88f62b0 327 (GPIO_MODER_MODER0 << (POSITION_VAL(Pin) * 2U))) >> (POSITION_VAL(Pin) * 2U));
<> 128:9bcdf88f62b0 328 }
<> 128:9bcdf88f62b0 329
<> 128:9bcdf88f62b0 330 /**
<> 128:9bcdf88f62b0 331 * @brief Configure gpio output type for several pins on dedicated port.
<> 128:9bcdf88f62b0 332 * @note Output type as to be set when gpio pin is in output or
<> 128:9bcdf88f62b0 333 * alternate modes. Possible type are Push-pull or Open-drain.
<> 128:9bcdf88f62b0 334 * @rmtoll OTYPER OTy LL_GPIO_SetPinOutputType
<> 128:9bcdf88f62b0 335 * @param GPIOx GPIO Port
<> 128:9bcdf88f62b0 336 * @param PinMask This parameter can be a combination of the following values:
<> 128:9bcdf88f62b0 337 * @arg @ref LL_GPIO_PIN_0
<> 128:9bcdf88f62b0 338 * @arg @ref LL_GPIO_PIN_1
<> 128:9bcdf88f62b0 339 * @arg @ref LL_GPIO_PIN_2
<> 128:9bcdf88f62b0 340 * @arg @ref LL_GPIO_PIN_3
<> 128:9bcdf88f62b0 341 * @arg @ref LL_GPIO_PIN_4
<> 128:9bcdf88f62b0 342 * @arg @ref LL_GPIO_PIN_5
<> 128:9bcdf88f62b0 343 * @arg @ref LL_GPIO_PIN_6
<> 128:9bcdf88f62b0 344 * @arg @ref LL_GPIO_PIN_7
<> 128:9bcdf88f62b0 345 * @arg @ref LL_GPIO_PIN_8
<> 128:9bcdf88f62b0 346 * @arg @ref LL_GPIO_PIN_9
<> 128:9bcdf88f62b0 347 * @arg @ref LL_GPIO_PIN_10
<> 128:9bcdf88f62b0 348 * @arg @ref LL_GPIO_PIN_11
<> 128:9bcdf88f62b0 349 * @arg @ref LL_GPIO_PIN_12
<> 128:9bcdf88f62b0 350 * @arg @ref LL_GPIO_PIN_13
<> 128:9bcdf88f62b0 351 * @arg @ref LL_GPIO_PIN_14
<> 128:9bcdf88f62b0 352 * @arg @ref LL_GPIO_PIN_15
<> 128:9bcdf88f62b0 353 * @arg @ref LL_GPIO_PIN_ALL
<> 128:9bcdf88f62b0 354 * @param OutputType This parameter can be one of the following values:
<> 128:9bcdf88f62b0 355 * @arg @ref LL_GPIO_OUTPUT_PUSHPULL
<> 128:9bcdf88f62b0 356 * @arg @ref LL_GPIO_OUTPUT_OPENDRAIN
<> 128:9bcdf88f62b0 357 * @retval None
<> 128:9bcdf88f62b0 358 */
<> 128:9bcdf88f62b0 359 __STATIC_INLINE void LL_GPIO_SetPinOutputType(GPIO_TypeDef *GPIOx, uint32_t PinMask, uint32_t OutputType)
<> 128:9bcdf88f62b0 360 {
<> 128:9bcdf88f62b0 361 MODIFY_REG(GPIOx->OTYPER, PinMask, (PinMask * OutputType));
<> 128:9bcdf88f62b0 362 }
<> 128:9bcdf88f62b0 363
<> 128:9bcdf88f62b0 364 /**
<> 128:9bcdf88f62b0 365 * @brief Return gpio output type for several pins on dedicated port.
<> 128:9bcdf88f62b0 366 * @note Output type as to be set when gpio pin is in output or
<> 128:9bcdf88f62b0 367 * alternate modes. Possible type are Push-pull or Open-drain.
<> 128:9bcdf88f62b0 368 * @note Warning: only one pin can be passed as parameter.
<> 128:9bcdf88f62b0 369 * @rmtoll OTYPER OTy LL_GPIO_GetPinOutputType
<> 128:9bcdf88f62b0 370 * @param GPIOx GPIO Port
<> 128:9bcdf88f62b0 371 * @param Pin This parameter can be one of the following values:
<> 128:9bcdf88f62b0 372 * @arg @ref LL_GPIO_PIN_0
<> 128:9bcdf88f62b0 373 * @arg @ref LL_GPIO_PIN_1
<> 128:9bcdf88f62b0 374 * @arg @ref LL_GPIO_PIN_2
<> 128:9bcdf88f62b0 375 * @arg @ref LL_GPIO_PIN_3
<> 128:9bcdf88f62b0 376 * @arg @ref LL_GPIO_PIN_4
<> 128:9bcdf88f62b0 377 * @arg @ref LL_GPIO_PIN_5
<> 128:9bcdf88f62b0 378 * @arg @ref LL_GPIO_PIN_6
<> 128:9bcdf88f62b0 379 * @arg @ref LL_GPIO_PIN_7
<> 128:9bcdf88f62b0 380 * @arg @ref LL_GPIO_PIN_8
<> 128:9bcdf88f62b0 381 * @arg @ref LL_GPIO_PIN_9
<> 128:9bcdf88f62b0 382 * @arg @ref LL_GPIO_PIN_10
<> 128:9bcdf88f62b0 383 * @arg @ref LL_GPIO_PIN_11
<> 128:9bcdf88f62b0 384 * @arg @ref LL_GPIO_PIN_12
<> 128:9bcdf88f62b0 385 * @arg @ref LL_GPIO_PIN_13
<> 128:9bcdf88f62b0 386 * @arg @ref LL_GPIO_PIN_14
<> 128:9bcdf88f62b0 387 * @arg @ref LL_GPIO_PIN_15
<> 128:9bcdf88f62b0 388 * @arg @ref LL_GPIO_PIN_ALL
<> 128:9bcdf88f62b0 389 * @retval Returned value can be one of the following values:
<> 128:9bcdf88f62b0 390 * @arg @ref LL_GPIO_OUTPUT_PUSHPULL
<> 128:9bcdf88f62b0 391 * @arg @ref LL_GPIO_OUTPUT_OPENDRAIN
<> 128:9bcdf88f62b0 392 */
<> 128:9bcdf88f62b0 393 __STATIC_INLINE uint32_t LL_GPIO_GetPinOutputType(GPIO_TypeDef *GPIOx, uint32_t Pin)
<> 128:9bcdf88f62b0 394 {
<> 128:9bcdf88f62b0 395 return (uint32_t)(READ_BIT(GPIOx->OTYPER, Pin) >> POSITION_VAL(Pin));
<> 128:9bcdf88f62b0 396 }
<> 128:9bcdf88f62b0 397
<> 128:9bcdf88f62b0 398 /**
<> 128:9bcdf88f62b0 399 * @brief Configure gpio speed for a dedicated pin on dedicated port.
<> 128:9bcdf88f62b0 400 * @note I/O speed can be Low, Medium, Fast or High speed.
<> 128:9bcdf88f62b0 401 * @note Warning: only one pin can be passed as parameter.
<> 128:9bcdf88f62b0 402 * @note Refer to datasheet for frequency specifications and the power
<> 128:9bcdf88f62b0 403 * supply and load conditions for each speed.
<> 128:9bcdf88f62b0 404 * @rmtoll OSPEEDR OSPEEDy LL_GPIO_SetPinSpeed
<> 128:9bcdf88f62b0 405 * @param GPIOx GPIO Port
<> 128:9bcdf88f62b0 406 * @param Pin This parameter can be one of the following values:
<> 128:9bcdf88f62b0 407 * @arg @ref LL_GPIO_PIN_0
<> 128:9bcdf88f62b0 408 * @arg @ref LL_GPIO_PIN_1
<> 128:9bcdf88f62b0 409 * @arg @ref LL_GPIO_PIN_2
<> 128:9bcdf88f62b0 410 * @arg @ref LL_GPIO_PIN_3
<> 128:9bcdf88f62b0 411 * @arg @ref LL_GPIO_PIN_4
<> 128:9bcdf88f62b0 412 * @arg @ref LL_GPIO_PIN_5
<> 128:9bcdf88f62b0 413 * @arg @ref LL_GPIO_PIN_6
<> 128:9bcdf88f62b0 414 * @arg @ref LL_GPIO_PIN_7
<> 128:9bcdf88f62b0 415 * @arg @ref LL_GPIO_PIN_8
<> 128:9bcdf88f62b0 416 * @arg @ref LL_GPIO_PIN_9
<> 128:9bcdf88f62b0 417 * @arg @ref LL_GPIO_PIN_10
<> 128:9bcdf88f62b0 418 * @arg @ref LL_GPIO_PIN_11
<> 128:9bcdf88f62b0 419 * @arg @ref LL_GPIO_PIN_12
<> 128:9bcdf88f62b0 420 * @arg @ref LL_GPIO_PIN_13
<> 128:9bcdf88f62b0 421 * @arg @ref LL_GPIO_PIN_14
<> 128:9bcdf88f62b0 422 * @arg @ref LL_GPIO_PIN_15
<> 128:9bcdf88f62b0 423 * @param Speed This parameter can be one of the following values:
<> 128:9bcdf88f62b0 424 * @arg @ref LL_GPIO_SPEED_FREQ_LOW
<> 128:9bcdf88f62b0 425 * @arg @ref LL_GPIO_SPEED_FREQ_MEDIUM
<> 128:9bcdf88f62b0 426 * @arg @ref LL_GPIO_SPEED_FREQ_HIGH
<> 128:9bcdf88f62b0 427 * @arg @ref LL_GPIO_SPEED_FREQ_VERY_HIGH
<> 128:9bcdf88f62b0 428 * @retval None
<> 128:9bcdf88f62b0 429 */
<> 128:9bcdf88f62b0 430 __STATIC_INLINE void LL_GPIO_SetPinSpeed(GPIO_TypeDef *GPIOx, uint32_t Pin, uint32_t Speed)
<> 128:9bcdf88f62b0 431 {
<> 128:9bcdf88f62b0 432 MODIFY_REG(GPIOx->OSPEEDR, (GPIO_OSPEEDER_OSPEEDR0 << (POSITION_VAL(Pin) * 2U)),
<> 128:9bcdf88f62b0 433 (Speed << (POSITION_VAL(Pin) * 2U)));
<> 128:9bcdf88f62b0 434 }
<> 128:9bcdf88f62b0 435
<> 128:9bcdf88f62b0 436 /**
<> 128:9bcdf88f62b0 437 * @brief Return gpio speed for a dedicated pin on dedicated port.
<> 128:9bcdf88f62b0 438 * @note I/O speed can be Low, Medium, Fast or High speed.
<> 128:9bcdf88f62b0 439 * @note Warning: only one pin can be passed as parameter.
<> 128:9bcdf88f62b0 440 * @note Refer to datasheet for frequency specifications and the power
<> 128:9bcdf88f62b0 441 * supply and load conditions for each speed.
<> 128:9bcdf88f62b0 442 * @rmtoll OSPEEDR OSPEEDy LL_GPIO_GetPinSpeed
<> 128:9bcdf88f62b0 443 * @param GPIOx GPIO Port
<> 128:9bcdf88f62b0 444 * @param Pin This parameter can be one of the following values:
<> 128:9bcdf88f62b0 445 * @arg @ref LL_GPIO_PIN_0
<> 128:9bcdf88f62b0 446 * @arg @ref LL_GPIO_PIN_1
<> 128:9bcdf88f62b0 447 * @arg @ref LL_GPIO_PIN_2
<> 128:9bcdf88f62b0 448 * @arg @ref LL_GPIO_PIN_3
<> 128:9bcdf88f62b0 449 * @arg @ref LL_GPIO_PIN_4
<> 128:9bcdf88f62b0 450 * @arg @ref LL_GPIO_PIN_5
<> 128:9bcdf88f62b0 451 * @arg @ref LL_GPIO_PIN_6
<> 128:9bcdf88f62b0 452 * @arg @ref LL_GPIO_PIN_7
<> 128:9bcdf88f62b0 453 * @arg @ref LL_GPIO_PIN_8
<> 128:9bcdf88f62b0 454 * @arg @ref LL_GPIO_PIN_9
<> 128:9bcdf88f62b0 455 * @arg @ref LL_GPIO_PIN_10
<> 128:9bcdf88f62b0 456 * @arg @ref LL_GPIO_PIN_11
<> 128:9bcdf88f62b0 457 * @arg @ref LL_GPIO_PIN_12
<> 128:9bcdf88f62b0 458 * @arg @ref LL_GPIO_PIN_13
<> 128:9bcdf88f62b0 459 * @arg @ref LL_GPIO_PIN_14
<> 128:9bcdf88f62b0 460 * @arg @ref LL_GPIO_PIN_15
<> 128:9bcdf88f62b0 461 * @retval Returned value can be one of the following values:
<> 128:9bcdf88f62b0 462 * @arg @ref LL_GPIO_SPEED_FREQ_LOW
<> 128:9bcdf88f62b0 463 * @arg @ref LL_GPIO_SPEED_FREQ_MEDIUM
<> 128:9bcdf88f62b0 464 * @arg @ref LL_GPIO_SPEED_FREQ_HIGH
<> 128:9bcdf88f62b0 465 * @arg @ref LL_GPIO_SPEED_FREQ_VERY_HIGH
<> 128:9bcdf88f62b0 466 */
<> 128:9bcdf88f62b0 467 __STATIC_INLINE uint32_t LL_GPIO_GetPinSpeed(GPIO_TypeDef *GPIOx, uint32_t Pin)
<> 128:9bcdf88f62b0 468 {
<> 128:9bcdf88f62b0 469 return (uint32_t)(READ_BIT(GPIOx->OSPEEDR,
<> 128:9bcdf88f62b0 470 (GPIO_OSPEEDER_OSPEEDR0 << (POSITION_VAL(Pin) * 2U))) >> (POSITION_VAL(Pin) * 2U));
<> 128:9bcdf88f62b0 471 }
<> 128:9bcdf88f62b0 472
<> 128:9bcdf88f62b0 473 /**
<> 128:9bcdf88f62b0 474 * @brief Configure gpio pull-up or pull-down for a dedicated pin on a dedicated port.
<> 128:9bcdf88f62b0 475 * @note Warning: only one pin can be passed as parameter.
<> 128:9bcdf88f62b0 476 * @rmtoll PUPDR PUPDy LL_GPIO_SetPinPull
<> 128:9bcdf88f62b0 477 * @param GPIOx GPIO Port
<> 128:9bcdf88f62b0 478 * @param Pin This parameter can be one of the following values:
<> 128:9bcdf88f62b0 479 * @arg @ref LL_GPIO_PIN_0
<> 128:9bcdf88f62b0 480 * @arg @ref LL_GPIO_PIN_1
<> 128:9bcdf88f62b0 481 * @arg @ref LL_GPIO_PIN_2
<> 128:9bcdf88f62b0 482 * @arg @ref LL_GPIO_PIN_3
<> 128:9bcdf88f62b0 483 * @arg @ref LL_GPIO_PIN_4
<> 128:9bcdf88f62b0 484 * @arg @ref LL_GPIO_PIN_5
<> 128:9bcdf88f62b0 485 * @arg @ref LL_GPIO_PIN_6
<> 128:9bcdf88f62b0 486 * @arg @ref LL_GPIO_PIN_7
<> 128:9bcdf88f62b0 487 * @arg @ref LL_GPIO_PIN_8
<> 128:9bcdf88f62b0 488 * @arg @ref LL_GPIO_PIN_9
<> 128:9bcdf88f62b0 489 * @arg @ref LL_GPIO_PIN_10
<> 128:9bcdf88f62b0 490 * @arg @ref LL_GPIO_PIN_11
<> 128:9bcdf88f62b0 491 * @arg @ref LL_GPIO_PIN_12
<> 128:9bcdf88f62b0 492 * @arg @ref LL_GPIO_PIN_13
<> 128:9bcdf88f62b0 493 * @arg @ref LL_GPIO_PIN_14
<> 128:9bcdf88f62b0 494 * @arg @ref LL_GPIO_PIN_15
<> 128:9bcdf88f62b0 495 * @param Pull This parameter can be one of the following values:
<> 128:9bcdf88f62b0 496 * @arg @ref LL_GPIO_PULL_NO
<> 128:9bcdf88f62b0 497 * @arg @ref LL_GPIO_PULL_UP
<> 128:9bcdf88f62b0 498 * @arg @ref LL_GPIO_PULL_DOWN
<> 128:9bcdf88f62b0 499 * @retval None
<> 128:9bcdf88f62b0 500 */
<> 128:9bcdf88f62b0 501 __STATIC_INLINE void LL_GPIO_SetPinPull(GPIO_TypeDef *GPIOx, uint32_t Pin, uint32_t Pull)
<> 128:9bcdf88f62b0 502 {
<> 128:9bcdf88f62b0 503 MODIFY_REG(GPIOx->PUPDR, (GPIO_PUPDR_PUPDR0 << (POSITION_VAL(Pin) * 2U)), (Pull << (POSITION_VAL(Pin) * 2U)));
<> 128:9bcdf88f62b0 504 }
<> 128:9bcdf88f62b0 505
<> 128:9bcdf88f62b0 506 /**
<> 128:9bcdf88f62b0 507 * @brief Return gpio pull-up or pull-down for a dedicated pin on a dedicated port
<> 128:9bcdf88f62b0 508 * @note Warning: only one pin can be passed as parameter.
<> 128:9bcdf88f62b0 509 * @rmtoll PUPDR PUPDy LL_GPIO_GetPinPull
<> 128:9bcdf88f62b0 510 * @param GPIOx GPIO Port
<> 128:9bcdf88f62b0 511 * @param Pin This parameter can be one of the following values:
<> 128:9bcdf88f62b0 512 * @arg @ref LL_GPIO_PIN_0
<> 128:9bcdf88f62b0 513 * @arg @ref LL_GPIO_PIN_1
<> 128:9bcdf88f62b0 514 * @arg @ref LL_GPIO_PIN_2
<> 128:9bcdf88f62b0 515 * @arg @ref LL_GPIO_PIN_3
<> 128:9bcdf88f62b0 516 * @arg @ref LL_GPIO_PIN_4
<> 128:9bcdf88f62b0 517 * @arg @ref LL_GPIO_PIN_5
<> 128:9bcdf88f62b0 518 * @arg @ref LL_GPIO_PIN_6
<> 128:9bcdf88f62b0 519 * @arg @ref LL_GPIO_PIN_7
<> 128:9bcdf88f62b0 520 * @arg @ref LL_GPIO_PIN_8
<> 128:9bcdf88f62b0 521 * @arg @ref LL_GPIO_PIN_9
<> 128:9bcdf88f62b0 522 * @arg @ref LL_GPIO_PIN_10
<> 128:9bcdf88f62b0 523 * @arg @ref LL_GPIO_PIN_11
<> 128:9bcdf88f62b0 524 * @arg @ref LL_GPIO_PIN_12
<> 128:9bcdf88f62b0 525 * @arg @ref LL_GPIO_PIN_13
<> 128:9bcdf88f62b0 526 * @arg @ref LL_GPIO_PIN_14
<> 128:9bcdf88f62b0 527 * @arg @ref LL_GPIO_PIN_15
<> 128:9bcdf88f62b0 528 * @retval Returned value can be one of the following values:
<> 128:9bcdf88f62b0 529 * @arg @ref LL_GPIO_PULL_NO
<> 128:9bcdf88f62b0 530 * @arg @ref LL_GPIO_PULL_UP
<> 128:9bcdf88f62b0 531 * @arg @ref LL_GPIO_PULL_DOWN
<> 128:9bcdf88f62b0 532 */
<> 128:9bcdf88f62b0 533 __STATIC_INLINE uint32_t LL_GPIO_GetPinPull(GPIO_TypeDef *GPIOx, uint32_t Pin)
<> 128:9bcdf88f62b0 534 {
<> 128:9bcdf88f62b0 535 return (uint32_t)(READ_BIT(GPIOx->PUPDR,
<> 128:9bcdf88f62b0 536 (GPIO_PUPDR_PUPDR0 << (POSITION_VAL(Pin) * 2U))) >> (POSITION_VAL(Pin) * 2U));
<> 128:9bcdf88f62b0 537 }
<> 128:9bcdf88f62b0 538
<> 128:9bcdf88f62b0 539 /**
<> 128:9bcdf88f62b0 540 * @brief Configure gpio alternate function of a dedicated pin from 0 to 7 for a dedicated port.
<> 128:9bcdf88f62b0 541 * @note Possible values are from AF0 to AF15 depending on target.
<> 128:9bcdf88f62b0 542 * @note Warning: only one pin can be passed as parameter.
<> 128:9bcdf88f62b0 543 * @rmtoll AFRL AFSELy LL_GPIO_SetAFPin_0_7
<> 128:9bcdf88f62b0 544 * @param GPIOx GPIO Port
<> 128:9bcdf88f62b0 545 * @param Pin This parameter can be one of the following values:
<> 128:9bcdf88f62b0 546 * @arg @ref LL_GPIO_PIN_0
<> 128:9bcdf88f62b0 547 * @arg @ref LL_GPIO_PIN_1
<> 128:9bcdf88f62b0 548 * @arg @ref LL_GPIO_PIN_2
<> 128:9bcdf88f62b0 549 * @arg @ref LL_GPIO_PIN_3
<> 128:9bcdf88f62b0 550 * @arg @ref LL_GPIO_PIN_4
<> 128:9bcdf88f62b0 551 * @arg @ref LL_GPIO_PIN_5
<> 128:9bcdf88f62b0 552 * @arg @ref LL_GPIO_PIN_6
<> 128:9bcdf88f62b0 553 * @arg @ref LL_GPIO_PIN_7
<> 128:9bcdf88f62b0 554 * @param Alternate This parameter can be one of the following values:
<> 128:9bcdf88f62b0 555 * @arg @ref LL_GPIO_AF_0
<> 128:9bcdf88f62b0 556 * @arg @ref LL_GPIO_AF_1
<> 128:9bcdf88f62b0 557 * @arg @ref LL_GPIO_AF_2
<> 128:9bcdf88f62b0 558 * @arg @ref LL_GPIO_AF_3
<> 128:9bcdf88f62b0 559 * @arg @ref LL_GPIO_AF_4
<> 128:9bcdf88f62b0 560 * @arg @ref LL_GPIO_AF_5
<> 128:9bcdf88f62b0 561 * @arg @ref LL_GPIO_AF_6
<> 128:9bcdf88f62b0 562 * @arg @ref LL_GPIO_AF_7
<> 128:9bcdf88f62b0 563 * @arg @ref LL_GPIO_AF_8
<> 128:9bcdf88f62b0 564 * @arg @ref LL_GPIO_AF_9
<> 128:9bcdf88f62b0 565 * @arg @ref LL_GPIO_AF_10
<> 128:9bcdf88f62b0 566 * @arg @ref LL_GPIO_AF_11
<> 128:9bcdf88f62b0 567 * @arg @ref LL_GPIO_AF_12
<> 128:9bcdf88f62b0 568 * @arg @ref LL_GPIO_AF_13
<> 128:9bcdf88f62b0 569 * @arg @ref LL_GPIO_AF_14
<> 128:9bcdf88f62b0 570 * @arg @ref LL_GPIO_AF_15
<> 128:9bcdf88f62b0 571 * @retval None
<> 128:9bcdf88f62b0 572 */
<> 128:9bcdf88f62b0 573 __STATIC_INLINE void LL_GPIO_SetAFPin_0_7(GPIO_TypeDef *GPIOx, uint32_t Pin, uint32_t Alternate)
<> 128:9bcdf88f62b0 574 {
AnnaBridge 165:d1b4690b3f8b 575 MODIFY_REG(GPIOx->AFR[0], (GPIO_AFRL_AFSEL0 << (POSITION_VAL(Pin) * 4U)),
<> 128:9bcdf88f62b0 576 (Alternate << (POSITION_VAL(Pin) * 4U)));
<> 128:9bcdf88f62b0 577 }
<> 128:9bcdf88f62b0 578
<> 128:9bcdf88f62b0 579 /**
<> 128:9bcdf88f62b0 580 * @brief Return gpio alternate function of a dedicated pin from 0 to 7 for a dedicated port.
<> 128:9bcdf88f62b0 581 * @rmtoll AFRL AFSELy LL_GPIO_GetAFPin_0_7
<> 128:9bcdf88f62b0 582 * @param GPIOx GPIO Port
<> 128:9bcdf88f62b0 583 * @param Pin This parameter can be one of the following values:
<> 128:9bcdf88f62b0 584 * @arg @ref LL_GPIO_PIN_0
<> 128:9bcdf88f62b0 585 * @arg @ref LL_GPIO_PIN_1
<> 128:9bcdf88f62b0 586 * @arg @ref LL_GPIO_PIN_2
<> 128:9bcdf88f62b0 587 * @arg @ref LL_GPIO_PIN_3
<> 128:9bcdf88f62b0 588 * @arg @ref LL_GPIO_PIN_4
<> 128:9bcdf88f62b0 589 * @arg @ref LL_GPIO_PIN_5
<> 128:9bcdf88f62b0 590 * @arg @ref LL_GPIO_PIN_6
<> 128:9bcdf88f62b0 591 * @arg @ref LL_GPIO_PIN_7
<> 128:9bcdf88f62b0 592 * @retval Returned value can be one of the following values:
<> 128:9bcdf88f62b0 593 * @arg @ref LL_GPIO_AF_0
<> 128:9bcdf88f62b0 594 * @arg @ref LL_GPIO_AF_1
<> 128:9bcdf88f62b0 595 * @arg @ref LL_GPIO_AF_2
<> 128:9bcdf88f62b0 596 * @arg @ref LL_GPIO_AF_3
<> 128:9bcdf88f62b0 597 * @arg @ref LL_GPIO_AF_4
<> 128:9bcdf88f62b0 598 * @arg @ref LL_GPIO_AF_5
<> 128:9bcdf88f62b0 599 * @arg @ref LL_GPIO_AF_6
<> 128:9bcdf88f62b0 600 * @arg @ref LL_GPIO_AF_7
<> 128:9bcdf88f62b0 601 * @arg @ref LL_GPIO_AF_8
<> 128:9bcdf88f62b0 602 * @arg @ref LL_GPIO_AF_9
<> 128:9bcdf88f62b0 603 * @arg @ref LL_GPIO_AF_10
<> 128:9bcdf88f62b0 604 * @arg @ref LL_GPIO_AF_11
<> 128:9bcdf88f62b0 605 * @arg @ref LL_GPIO_AF_12
<> 128:9bcdf88f62b0 606 * @arg @ref LL_GPIO_AF_13
<> 128:9bcdf88f62b0 607 * @arg @ref LL_GPIO_AF_14
<> 128:9bcdf88f62b0 608 * @arg @ref LL_GPIO_AF_15
<> 128:9bcdf88f62b0 609 */
<> 128:9bcdf88f62b0 610 __STATIC_INLINE uint32_t LL_GPIO_GetAFPin_0_7(GPIO_TypeDef *GPIOx, uint32_t Pin)
<> 128:9bcdf88f62b0 611 {
<> 128:9bcdf88f62b0 612 return (uint32_t)(READ_BIT(GPIOx->AFR[0],
AnnaBridge 165:d1b4690b3f8b 613 (GPIO_AFRL_AFSEL0 << (POSITION_VAL(Pin) * 4U))) >> (POSITION_VAL(Pin) * 4U));
<> 128:9bcdf88f62b0 614 }
<> 128:9bcdf88f62b0 615
<> 128:9bcdf88f62b0 616 /**
<> 128:9bcdf88f62b0 617 * @brief Configure gpio alternate function of a dedicated pin from 8 to 15 for a dedicated port.
<> 128:9bcdf88f62b0 618 * @note Possible values are from AF0 to AF15 depending on target.
<> 128:9bcdf88f62b0 619 * @note Warning: only one pin can be passed as parameter.
<> 128:9bcdf88f62b0 620 * @rmtoll AFRH AFSELy LL_GPIO_SetAFPin_8_15
<> 128:9bcdf88f62b0 621 * @param GPIOx GPIO Port
<> 128:9bcdf88f62b0 622 * @param Pin This parameter can be one of the following values:
<> 128:9bcdf88f62b0 623 * @arg @ref LL_GPIO_PIN_8
<> 128:9bcdf88f62b0 624 * @arg @ref LL_GPIO_PIN_9
<> 128:9bcdf88f62b0 625 * @arg @ref LL_GPIO_PIN_10
<> 128:9bcdf88f62b0 626 * @arg @ref LL_GPIO_PIN_11
<> 128:9bcdf88f62b0 627 * @arg @ref LL_GPIO_PIN_12
<> 128:9bcdf88f62b0 628 * @arg @ref LL_GPIO_PIN_13
<> 128:9bcdf88f62b0 629 * @arg @ref LL_GPIO_PIN_14
<> 128:9bcdf88f62b0 630 * @arg @ref LL_GPIO_PIN_15
<> 128:9bcdf88f62b0 631 * @param Alternate This parameter can be one of the following values:
<> 128:9bcdf88f62b0 632 * @arg @ref LL_GPIO_AF_0
<> 128:9bcdf88f62b0 633 * @arg @ref LL_GPIO_AF_1
<> 128:9bcdf88f62b0 634 * @arg @ref LL_GPIO_AF_2
<> 128:9bcdf88f62b0 635 * @arg @ref LL_GPIO_AF_3
<> 128:9bcdf88f62b0 636 * @arg @ref LL_GPIO_AF_4
<> 128:9bcdf88f62b0 637 * @arg @ref LL_GPIO_AF_5
<> 128:9bcdf88f62b0 638 * @arg @ref LL_GPIO_AF_6
<> 128:9bcdf88f62b0 639 * @arg @ref LL_GPIO_AF_7
<> 128:9bcdf88f62b0 640 * @arg @ref LL_GPIO_AF_8
<> 128:9bcdf88f62b0 641 * @arg @ref LL_GPIO_AF_9
<> 128:9bcdf88f62b0 642 * @arg @ref LL_GPIO_AF_10
<> 128:9bcdf88f62b0 643 * @arg @ref LL_GPIO_AF_11
<> 128:9bcdf88f62b0 644 * @arg @ref LL_GPIO_AF_12
<> 128:9bcdf88f62b0 645 * @arg @ref LL_GPIO_AF_13
<> 128:9bcdf88f62b0 646 * @arg @ref LL_GPIO_AF_14
<> 128:9bcdf88f62b0 647 * @arg @ref LL_GPIO_AF_15
<> 128:9bcdf88f62b0 648 * @retval None
<> 128:9bcdf88f62b0 649 */
<> 128:9bcdf88f62b0 650 __STATIC_INLINE void LL_GPIO_SetAFPin_8_15(GPIO_TypeDef *GPIOx, uint32_t Pin, uint32_t Alternate)
<> 128:9bcdf88f62b0 651 {
AnnaBridge 165:d1b4690b3f8b 652 MODIFY_REG(GPIOx->AFR[1], (GPIO_AFRH_AFSEL8 << (POSITION_VAL(Pin >> 8U) * 4U)),
<> 128:9bcdf88f62b0 653 (Alternate << (POSITION_VAL(Pin >> 8U) * 4U)));
<> 128:9bcdf88f62b0 654 }
<> 128:9bcdf88f62b0 655
<> 128:9bcdf88f62b0 656 /**
<> 128:9bcdf88f62b0 657 * @brief Return gpio alternate function of a dedicated pin from 8 to 15 for a dedicated port.
<> 128:9bcdf88f62b0 658 * @note Possible values are from AF0 to AF15 depending on target.
<> 128:9bcdf88f62b0 659 * @rmtoll AFRH AFSELy LL_GPIO_GetAFPin_8_15
<> 128:9bcdf88f62b0 660 * @param GPIOx GPIO Port
<> 128:9bcdf88f62b0 661 * @param Pin This parameter can be one of the following values:
<> 128:9bcdf88f62b0 662 * @arg @ref LL_GPIO_PIN_8
<> 128:9bcdf88f62b0 663 * @arg @ref LL_GPIO_PIN_9
<> 128:9bcdf88f62b0 664 * @arg @ref LL_GPIO_PIN_10
<> 128:9bcdf88f62b0 665 * @arg @ref LL_GPIO_PIN_11
<> 128:9bcdf88f62b0 666 * @arg @ref LL_GPIO_PIN_12
<> 128:9bcdf88f62b0 667 * @arg @ref LL_GPIO_PIN_13
<> 128:9bcdf88f62b0 668 * @arg @ref LL_GPIO_PIN_14
<> 128:9bcdf88f62b0 669 * @arg @ref LL_GPIO_PIN_15
<> 128:9bcdf88f62b0 670 * @retval Returned value can be one of the following values:
<> 128:9bcdf88f62b0 671 * @arg @ref LL_GPIO_AF_0
<> 128:9bcdf88f62b0 672 * @arg @ref LL_GPIO_AF_1
<> 128:9bcdf88f62b0 673 * @arg @ref LL_GPIO_AF_2
<> 128:9bcdf88f62b0 674 * @arg @ref LL_GPIO_AF_3
<> 128:9bcdf88f62b0 675 * @arg @ref LL_GPIO_AF_4
<> 128:9bcdf88f62b0 676 * @arg @ref LL_GPIO_AF_5
<> 128:9bcdf88f62b0 677 * @arg @ref LL_GPIO_AF_6
<> 128:9bcdf88f62b0 678 * @arg @ref LL_GPIO_AF_7
<> 128:9bcdf88f62b0 679 * @arg @ref LL_GPIO_AF_8
<> 128:9bcdf88f62b0 680 * @arg @ref LL_GPIO_AF_9
<> 128:9bcdf88f62b0 681 * @arg @ref LL_GPIO_AF_10
<> 128:9bcdf88f62b0 682 * @arg @ref LL_GPIO_AF_11
<> 128:9bcdf88f62b0 683 * @arg @ref LL_GPIO_AF_12
<> 128:9bcdf88f62b0 684 * @arg @ref LL_GPIO_AF_13
<> 128:9bcdf88f62b0 685 * @arg @ref LL_GPIO_AF_14
<> 128:9bcdf88f62b0 686 * @arg @ref LL_GPIO_AF_15
<> 128:9bcdf88f62b0 687 */
<> 128:9bcdf88f62b0 688 __STATIC_INLINE uint32_t LL_GPIO_GetAFPin_8_15(GPIO_TypeDef *GPIOx, uint32_t Pin)
<> 128:9bcdf88f62b0 689 {
<> 128:9bcdf88f62b0 690 return (uint32_t)(READ_BIT(GPIOx->AFR[1],
AnnaBridge 165:d1b4690b3f8b 691 (GPIO_AFRH_AFSEL8 << (POSITION_VAL(Pin >> 8U) * 4U))) >> (POSITION_VAL(Pin >> 8U) * 4U));
<> 128:9bcdf88f62b0 692 }
<> 128:9bcdf88f62b0 693
<> 128:9bcdf88f62b0 694
<> 128:9bcdf88f62b0 695 /**
<> 128:9bcdf88f62b0 696 * @brief Lock configuration of several pins for a dedicated port.
<> 128:9bcdf88f62b0 697 * @note When the lock sequence has been applied on a port bit, the
<> 128:9bcdf88f62b0 698 * value of this port bit can no longer be modified until the
<> 128:9bcdf88f62b0 699 * next reset.
<> 128:9bcdf88f62b0 700 * @note Each lock bit freezes a specific configuration register
<> 128:9bcdf88f62b0 701 * (control and alternate function registers).
<> 128:9bcdf88f62b0 702 * @rmtoll LCKR LCKK LL_GPIO_LockPin
<> 128:9bcdf88f62b0 703 * @param GPIOx GPIO Port
<> 128:9bcdf88f62b0 704 * @param PinMask This parameter can be a combination of the following values:
<> 128:9bcdf88f62b0 705 * @arg @ref LL_GPIO_PIN_0
<> 128:9bcdf88f62b0 706 * @arg @ref LL_GPIO_PIN_1
<> 128:9bcdf88f62b0 707 * @arg @ref LL_GPIO_PIN_2
<> 128:9bcdf88f62b0 708 * @arg @ref LL_GPIO_PIN_3
<> 128:9bcdf88f62b0 709 * @arg @ref LL_GPIO_PIN_4
<> 128:9bcdf88f62b0 710 * @arg @ref LL_GPIO_PIN_5
<> 128:9bcdf88f62b0 711 * @arg @ref LL_GPIO_PIN_6
<> 128:9bcdf88f62b0 712 * @arg @ref LL_GPIO_PIN_7
<> 128:9bcdf88f62b0 713 * @arg @ref LL_GPIO_PIN_8
<> 128:9bcdf88f62b0 714 * @arg @ref LL_GPIO_PIN_9
<> 128:9bcdf88f62b0 715 * @arg @ref LL_GPIO_PIN_10
<> 128:9bcdf88f62b0 716 * @arg @ref LL_GPIO_PIN_11
<> 128:9bcdf88f62b0 717 * @arg @ref LL_GPIO_PIN_12
<> 128:9bcdf88f62b0 718 * @arg @ref LL_GPIO_PIN_13
<> 128:9bcdf88f62b0 719 * @arg @ref LL_GPIO_PIN_14
<> 128:9bcdf88f62b0 720 * @arg @ref LL_GPIO_PIN_15
<> 128:9bcdf88f62b0 721 * @arg @ref LL_GPIO_PIN_ALL
<> 128:9bcdf88f62b0 722 * @retval None
<> 128:9bcdf88f62b0 723 */
<> 128:9bcdf88f62b0 724 __STATIC_INLINE void LL_GPIO_LockPin(GPIO_TypeDef *GPIOx, uint32_t PinMask)
<> 128:9bcdf88f62b0 725 {
<> 128:9bcdf88f62b0 726 __IO uint32_t temp;
<> 128:9bcdf88f62b0 727 WRITE_REG(GPIOx->LCKR, GPIO_LCKR_LCKK | PinMask);
<> 128:9bcdf88f62b0 728 WRITE_REG(GPIOx->LCKR, PinMask);
<> 128:9bcdf88f62b0 729 WRITE_REG(GPIOx->LCKR, GPIO_LCKR_LCKK | PinMask);
<> 128:9bcdf88f62b0 730 temp = READ_REG(GPIOx->LCKR);
<> 128:9bcdf88f62b0 731 (void) temp;
<> 128:9bcdf88f62b0 732 }
<> 128:9bcdf88f62b0 733
<> 128:9bcdf88f62b0 734 /**
<> 128:9bcdf88f62b0 735 * @brief Return 1 if all pins passed as parameter, of a dedicated port, are locked. else Return 0.
<> 128:9bcdf88f62b0 736 * @rmtoll LCKR LCKy LL_GPIO_IsPinLocked
<> 128:9bcdf88f62b0 737 * @param GPIOx GPIO Port
<> 128:9bcdf88f62b0 738 * @param PinMask This parameter can be a combination of the following values:
<> 128:9bcdf88f62b0 739 * @arg @ref LL_GPIO_PIN_0
<> 128:9bcdf88f62b0 740 * @arg @ref LL_GPIO_PIN_1
<> 128:9bcdf88f62b0 741 * @arg @ref LL_GPIO_PIN_2
<> 128:9bcdf88f62b0 742 * @arg @ref LL_GPIO_PIN_3
<> 128:9bcdf88f62b0 743 * @arg @ref LL_GPIO_PIN_4
<> 128:9bcdf88f62b0 744 * @arg @ref LL_GPIO_PIN_5
<> 128:9bcdf88f62b0 745 * @arg @ref LL_GPIO_PIN_6
<> 128:9bcdf88f62b0 746 * @arg @ref LL_GPIO_PIN_7
<> 128:9bcdf88f62b0 747 * @arg @ref LL_GPIO_PIN_8
<> 128:9bcdf88f62b0 748 * @arg @ref LL_GPIO_PIN_9
<> 128:9bcdf88f62b0 749 * @arg @ref LL_GPIO_PIN_10
<> 128:9bcdf88f62b0 750 * @arg @ref LL_GPIO_PIN_11
<> 128:9bcdf88f62b0 751 * @arg @ref LL_GPIO_PIN_12
<> 128:9bcdf88f62b0 752 * @arg @ref LL_GPIO_PIN_13
<> 128:9bcdf88f62b0 753 * @arg @ref LL_GPIO_PIN_14
<> 128:9bcdf88f62b0 754 * @arg @ref LL_GPIO_PIN_15
<> 128:9bcdf88f62b0 755 * @arg @ref LL_GPIO_PIN_ALL
<> 128:9bcdf88f62b0 756 * @retval State of bit (1 or 0).
<> 128:9bcdf88f62b0 757 */
<> 128:9bcdf88f62b0 758 __STATIC_INLINE uint32_t LL_GPIO_IsPinLocked(GPIO_TypeDef *GPIOx, uint32_t PinMask)
<> 128:9bcdf88f62b0 759 {
<> 128:9bcdf88f62b0 760 return (READ_BIT(GPIOx->LCKR, PinMask) == (PinMask));
<> 128:9bcdf88f62b0 761 }
<> 128:9bcdf88f62b0 762
<> 128:9bcdf88f62b0 763 /**
<> 128:9bcdf88f62b0 764 * @brief Return 1 if one of the pin of a dedicated port is locked. else return 0.
<> 128:9bcdf88f62b0 765 * @rmtoll LCKR LCKK LL_GPIO_IsAnyPinLocked
<> 128:9bcdf88f62b0 766 * @param GPIOx GPIO Port
<> 128:9bcdf88f62b0 767 * @retval State of bit (1 or 0).
<> 128:9bcdf88f62b0 768 */
<> 128:9bcdf88f62b0 769 __STATIC_INLINE uint32_t LL_GPIO_IsAnyPinLocked(GPIO_TypeDef *GPIOx)
<> 128:9bcdf88f62b0 770 {
<> 128:9bcdf88f62b0 771 return (READ_BIT(GPIOx->LCKR, GPIO_LCKR_LCKK) == (GPIO_LCKR_LCKK));
<> 128:9bcdf88f62b0 772 }
<> 128:9bcdf88f62b0 773
<> 128:9bcdf88f62b0 774 /**
<> 128:9bcdf88f62b0 775 * @}
<> 128:9bcdf88f62b0 776 */
<> 128:9bcdf88f62b0 777
<> 128:9bcdf88f62b0 778 /** @defgroup GPIO_LL_EF_Data_Access Data Access
<> 128:9bcdf88f62b0 779 * @{
<> 128:9bcdf88f62b0 780 */
<> 128:9bcdf88f62b0 781
<> 128:9bcdf88f62b0 782 /**
<> 128:9bcdf88f62b0 783 * @brief Return full input data register value for a dedicated port.
<> 128:9bcdf88f62b0 784 * @rmtoll IDR IDy LL_GPIO_ReadInputPort
<> 128:9bcdf88f62b0 785 * @param GPIOx GPIO Port
<> 128:9bcdf88f62b0 786 * @retval Input data register value of port
<> 128:9bcdf88f62b0 787 */
<> 128:9bcdf88f62b0 788 __STATIC_INLINE uint32_t LL_GPIO_ReadInputPort(GPIO_TypeDef *GPIOx)
<> 128:9bcdf88f62b0 789 {
<> 128:9bcdf88f62b0 790 return (uint32_t)(READ_REG(GPIOx->IDR));
<> 128:9bcdf88f62b0 791 }
<> 128:9bcdf88f62b0 792
<> 128:9bcdf88f62b0 793 /**
<> 128:9bcdf88f62b0 794 * @brief Return if input data level for several pins of dedicated port is high or low.
<> 128:9bcdf88f62b0 795 * @rmtoll IDR IDy LL_GPIO_IsInputPinSet
<> 128:9bcdf88f62b0 796 * @param GPIOx GPIO Port
<> 128:9bcdf88f62b0 797 * @param PinMask This parameter can be a combination of the following values:
<> 128:9bcdf88f62b0 798 * @arg @ref LL_GPIO_PIN_0
<> 128:9bcdf88f62b0 799 * @arg @ref LL_GPIO_PIN_1
<> 128:9bcdf88f62b0 800 * @arg @ref LL_GPIO_PIN_2
<> 128:9bcdf88f62b0 801 * @arg @ref LL_GPIO_PIN_3
<> 128:9bcdf88f62b0 802 * @arg @ref LL_GPIO_PIN_4
<> 128:9bcdf88f62b0 803 * @arg @ref LL_GPIO_PIN_5
<> 128:9bcdf88f62b0 804 * @arg @ref LL_GPIO_PIN_6
<> 128:9bcdf88f62b0 805 * @arg @ref LL_GPIO_PIN_7
<> 128:9bcdf88f62b0 806 * @arg @ref LL_GPIO_PIN_8
<> 128:9bcdf88f62b0 807 * @arg @ref LL_GPIO_PIN_9
<> 128:9bcdf88f62b0 808 * @arg @ref LL_GPIO_PIN_10
<> 128:9bcdf88f62b0 809 * @arg @ref LL_GPIO_PIN_11
<> 128:9bcdf88f62b0 810 * @arg @ref LL_GPIO_PIN_12
<> 128:9bcdf88f62b0 811 * @arg @ref LL_GPIO_PIN_13
<> 128:9bcdf88f62b0 812 * @arg @ref LL_GPIO_PIN_14
<> 128:9bcdf88f62b0 813 * @arg @ref LL_GPIO_PIN_15
<> 128:9bcdf88f62b0 814 * @arg @ref LL_GPIO_PIN_ALL
<> 128:9bcdf88f62b0 815 * @retval State of bit (1 or 0).
<> 128:9bcdf88f62b0 816 */
<> 128:9bcdf88f62b0 817 __STATIC_INLINE uint32_t LL_GPIO_IsInputPinSet(GPIO_TypeDef *GPIOx, uint32_t PinMask)
<> 128:9bcdf88f62b0 818 {
<> 128:9bcdf88f62b0 819 return (READ_BIT(GPIOx->IDR, PinMask) == (PinMask));
<> 128:9bcdf88f62b0 820 }
<> 128:9bcdf88f62b0 821
<> 128:9bcdf88f62b0 822 /**
<> 128:9bcdf88f62b0 823 * @brief Write output data register for the port.
<> 128:9bcdf88f62b0 824 * @rmtoll ODR ODy LL_GPIO_WriteOutputPort
<> 128:9bcdf88f62b0 825 * @param GPIOx GPIO Port
<> 128:9bcdf88f62b0 826 * @param PortValue Level value for each pin of the port
<> 128:9bcdf88f62b0 827 * @retval None
<> 128:9bcdf88f62b0 828 */
<> 128:9bcdf88f62b0 829 __STATIC_INLINE void LL_GPIO_WriteOutputPort(GPIO_TypeDef *GPIOx, uint32_t PortValue)
<> 128:9bcdf88f62b0 830 {
<> 128:9bcdf88f62b0 831 WRITE_REG(GPIOx->ODR, PortValue);
<> 128:9bcdf88f62b0 832 }
<> 128:9bcdf88f62b0 833
<> 128:9bcdf88f62b0 834 /**
<> 128:9bcdf88f62b0 835 * @brief Return full output data register value for a dedicated port.
<> 128:9bcdf88f62b0 836 * @rmtoll ODR ODy LL_GPIO_ReadOutputPort
<> 128:9bcdf88f62b0 837 * @param GPIOx GPIO Port
<> 128:9bcdf88f62b0 838 * @retval Output data register value of port
<> 128:9bcdf88f62b0 839 */
<> 128:9bcdf88f62b0 840 __STATIC_INLINE uint32_t LL_GPIO_ReadOutputPort(GPIO_TypeDef *GPIOx)
<> 128:9bcdf88f62b0 841 {
<> 128:9bcdf88f62b0 842 return (uint32_t)(READ_REG(GPIOx->ODR));
<> 128:9bcdf88f62b0 843 }
<> 128:9bcdf88f62b0 844
<> 128:9bcdf88f62b0 845 /**
<> 128:9bcdf88f62b0 846 * @brief Return if input data level for several pins of dedicated port is high or low.
<> 128:9bcdf88f62b0 847 * @rmtoll ODR ODy LL_GPIO_IsOutputPinSet
<> 128:9bcdf88f62b0 848 * @param GPIOx GPIO Port
<> 128:9bcdf88f62b0 849 * @param PinMask This parameter can be a combination of the following values:
<> 128:9bcdf88f62b0 850 * @arg @ref LL_GPIO_PIN_0
<> 128:9bcdf88f62b0 851 * @arg @ref LL_GPIO_PIN_1
<> 128:9bcdf88f62b0 852 * @arg @ref LL_GPIO_PIN_2
<> 128:9bcdf88f62b0 853 * @arg @ref LL_GPIO_PIN_3
<> 128:9bcdf88f62b0 854 * @arg @ref LL_GPIO_PIN_4
<> 128:9bcdf88f62b0 855 * @arg @ref LL_GPIO_PIN_5
<> 128:9bcdf88f62b0 856 * @arg @ref LL_GPIO_PIN_6
<> 128:9bcdf88f62b0 857 * @arg @ref LL_GPIO_PIN_7
<> 128:9bcdf88f62b0 858 * @arg @ref LL_GPIO_PIN_8
<> 128:9bcdf88f62b0 859 * @arg @ref LL_GPIO_PIN_9
<> 128:9bcdf88f62b0 860 * @arg @ref LL_GPIO_PIN_10
<> 128:9bcdf88f62b0 861 * @arg @ref LL_GPIO_PIN_11
<> 128:9bcdf88f62b0 862 * @arg @ref LL_GPIO_PIN_12
<> 128:9bcdf88f62b0 863 * @arg @ref LL_GPIO_PIN_13
<> 128:9bcdf88f62b0 864 * @arg @ref LL_GPIO_PIN_14
<> 128:9bcdf88f62b0 865 * @arg @ref LL_GPIO_PIN_15
<> 128:9bcdf88f62b0 866 * @arg @ref LL_GPIO_PIN_ALL
<> 128:9bcdf88f62b0 867 * @retval State of bit (1 or 0).
<> 128:9bcdf88f62b0 868 */
<> 128:9bcdf88f62b0 869 __STATIC_INLINE uint32_t LL_GPIO_IsOutputPinSet(GPIO_TypeDef *GPIOx, uint32_t PinMask)
<> 128:9bcdf88f62b0 870 {
<> 128:9bcdf88f62b0 871 return (READ_BIT(GPIOx->ODR, PinMask) == (PinMask));
<> 128:9bcdf88f62b0 872 }
<> 128:9bcdf88f62b0 873
<> 128:9bcdf88f62b0 874 /**
<> 128:9bcdf88f62b0 875 * @brief Set several pins to high level on dedicated gpio port.
<> 128:9bcdf88f62b0 876 * @rmtoll BSRR BSy LL_GPIO_SetOutputPin
<> 128:9bcdf88f62b0 877 * @param GPIOx GPIO Port
<> 128:9bcdf88f62b0 878 * @param PinMask This parameter can be a combination of the following values:
<> 128:9bcdf88f62b0 879 * @arg @ref LL_GPIO_PIN_0
<> 128:9bcdf88f62b0 880 * @arg @ref LL_GPIO_PIN_1
<> 128:9bcdf88f62b0 881 * @arg @ref LL_GPIO_PIN_2
<> 128:9bcdf88f62b0 882 * @arg @ref LL_GPIO_PIN_3
<> 128:9bcdf88f62b0 883 * @arg @ref LL_GPIO_PIN_4
<> 128:9bcdf88f62b0 884 * @arg @ref LL_GPIO_PIN_5
<> 128:9bcdf88f62b0 885 * @arg @ref LL_GPIO_PIN_6
<> 128:9bcdf88f62b0 886 * @arg @ref LL_GPIO_PIN_7
<> 128:9bcdf88f62b0 887 * @arg @ref LL_GPIO_PIN_8
<> 128:9bcdf88f62b0 888 * @arg @ref LL_GPIO_PIN_9
<> 128:9bcdf88f62b0 889 * @arg @ref LL_GPIO_PIN_10
<> 128:9bcdf88f62b0 890 * @arg @ref LL_GPIO_PIN_11
<> 128:9bcdf88f62b0 891 * @arg @ref LL_GPIO_PIN_12
<> 128:9bcdf88f62b0 892 * @arg @ref LL_GPIO_PIN_13
<> 128:9bcdf88f62b0 893 * @arg @ref LL_GPIO_PIN_14
<> 128:9bcdf88f62b0 894 * @arg @ref LL_GPIO_PIN_15
<> 128:9bcdf88f62b0 895 * @arg @ref LL_GPIO_PIN_ALL
<> 128:9bcdf88f62b0 896 * @retval None
<> 128:9bcdf88f62b0 897 */
<> 128:9bcdf88f62b0 898 __STATIC_INLINE void LL_GPIO_SetOutputPin(GPIO_TypeDef *GPIOx, uint32_t PinMask)
<> 128:9bcdf88f62b0 899 {
<> 128:9bcdf88f62b0 900 WRITE_REG(GPIOx->BSRR, PinMask);
<> 128:9bcdf88f62b0 901 }
<> 128:9bcdf88f62b0 902
<> 128:9bcdf88f62b0 903 /**
<> 128:9bcdf88f62b0 904 * @brief Set several pins to low level on dedicated gpio port.
<> 128:9bcdf88f62b0 905 * @rmtoll BRR BRy LL_GPIO_ResetOutputPin\n
<> 128:9bcdf88f62b0 906 * @rmtoll BSRR BRy LL_GPIO_ResetOutputPin
<> 128:9bcdf88f62b0 907 * @param GPIOx GPIO Port
<> 128:9bcdf88f62b0 908 * @param PinMask This parameter can be a combination of the following values:
<> 128:9bcdf88f62b0 909 * @arg @ref LL_GPIO_PIN_0
<> 128:9bcdf88f62b0 910 * @arg @ref LL_GPIO_PIN_1
<> 128:9bcdf88f62b0 911 * @arg @ref LL_GPIO_PIN_2
<> 128:9bcdf88f62b0 912 * @arg @ref LL_GPIO_PIN_3
<> 128:9bcdf88f62b0 913 * @arg @ref LL_GPIO_PIN_4
<> 128:9bcdf88f62b0 914 * @arg @ref LL_GPIO_PIN_5
<> 128:9bcdf88f62b0 915 * @arg @ref LL_GPIO_PIN_6
<> 128:9bcdf88f62b0 916 * @arg @ref LL_GPIO_PIN_7
<> 128:9bcdf88f62b0 917 * @arg @ref LL_GPIO_PIN_8
<> 128:9bcdf88f62b0 918 * @arg @ref LL_GPIO_PIN_9
<> 128:9bcdf88f62b0 919 * @arg @ref LL_GPIO_PIN_10
<> 128:9bcdf88f62b0 920 * @arg @ref LL_GPIO_PIN_11
<> 128:9bcdf88f62b0 921 * @arg @ref LL_GPIO_PIN_12
<> 128:9bcdf88f62b0 922 * @arg @ref LL_GPIO_PIN_13
<> 128:9bcdf88f62b0 923 * @arg @ref LL_GPIO_PIN_14
<> 128:9bcdf88f62b0 924 * @arg @ref LL_GPIO_PIN_15
<> 128:9bcdf88f62b0 925 * @arg @ref LL_GPIO_PIN_ALL
<> 128:9bcdf88f62b0 926 * @retval None
<> 128:9bcdf88f62b0 927 */
<> 128:9bcdf88f62b0 928 __STATIC_INLINE void LL_GPIO_ResetOutputPin(GPIO_TypeDef *GPIOx, uint32_t PinMask)
<> 128:9bcdf88f62b0 929 {
<> 128:9bcdf88f62b0 930 #if defined(GPIO_BRR_BR_0)
<> 128:9bcdf88f62b0 931 WRITE_REG(GPIOx->BRR, PinMask);
<> 128:9bcdf88f62b0 932 #else
<> 128:9bcdf88f62b0 933 WRITE_REG(GPIOx->BSRR, (PinMask << 16));
<> 128:9bcdf88f62b0 934 #endif /* GPIO_BRR_BR_0 */
<> 128:9bcdf88f62b0 935 }
<> 128:9bcdf88f62b0 936
<> 128:9bcdf88f62b0 937 /**
<> 128:9bcdf88f62b0 938 * @brief Toggle data value for several pin of dedicated port.
<> 128:9bcdf88f62b0 939 * @rmtoll ODR ODy LL_GPIO_TogglePin
<> 128:9bcdf88f62b0 940 * @param GPIOx GPIO Port
<> 128:9bcdf88f62b0 941 * @param PinMask This parameter can be a combination of the following values:
<> 128:9bcdf88f62b0 942 * @arg @ref LL_GPIO_PIN_0
<> 128:9bcdf88f62b0 943 * @arg @ref LL_GPIO_PIN_1
<> 128:9bcdf88f62b0 944 * @arg @ref LL_GPIO_PIN_2
<> 128:9bcdf88f62b0 945 * @arg @ref LL_GPIO_PIN_3
<> 128:9bcdf88f62b0 946 * @arg @ref LL_GPIO_PIN_4
<> 128:9bcdf88f62b0 947 * @arg @ref LL_GPIO_PIN_5
<> 128:9bcdf88f62b0 948 * @arg @ref LL_GPIO_PIN_6
<> 128:9bcdf88f62b0 949 * @arg @ref LL_GPIO_PIN_7
<> 128:9bcdf88f62b0 950 * @arg @ref LL_GPIO_PIN_8
<> 128:9bcdf88f62b0 951 * @arg @ref LL_GPIO_PIN_9
<> 128:9bcdf88f62b0 952 * @arg @ref LL_GPIO_PIN_10
<> 128:9bcdf88f62b0 953 * @arg @ref LL_GPIO_PIN_11
<> 128:9bcdf88f62b0 954 * @arg @ref LL_GPIO_PIN_12
<> 128:9bcdf88f62b0 955 * @arg @ref LL_GPIO_PIN_13
<> 128:9bcdf88f62b0 956 * @arg @ref LL_GPIO_PIN_14
<> 128:9bcdf88f62b0 957 * @arg @ref LL_GPIO_PIN_15
<> 128:9bcdf88f62b0 958 * @arg @ref LL_GPIO_PIN_ALL
<> 128:9bcdf88f62b0 959 * @retval None
<> 128:9bcdf88f62b0 960 */
<> 128:9bcdf88f62b0 961 __STATIC_INLINE void LL_GPIO_TogglePin(GPIO_TypeDef *GPIOx, uint32_t PinMask)
<> 128:9bcdf88f62b0 962 {
<> 128:9bcdf88f62b0 963 WRITE_REG(GPIOx->ODR, READ_REG(GPIOx->ODR) ^ PinMask);
<> 128:9bcdf88f62b0 964 }
<> 128:9bcdf88f62b0 965
<> 128:9bcdf88f62b0 966 /**
<> 128:9bcdf88f62b0 967 * @}
<> 128:9bcdf88f62b0 968 */
<> 128:9bcdf88f62b0 969
<> 128:9bcdf88f62b0 970 #if defined(USE_FULL_LL_DRIVER)
<> 128:9bcdf88f62b0 971 /** @defgroup GPIO_LL_EF_Init Initialization and de-initialization functions
<> 128:9bcdf88f62b0 972 * @{
<> 128:9bcdf88f62b0 973 */
<> 128:9bcdf88f62b0 974
<> 128:9bcdf88f62b0 975 ErrorStatus LL_GPIO_DeInit(GPIO_TypeDef *GPIOx);
<> 128:9bcdf88f62b0 976 ErrorStatus LL_GPIO_Init(GPIO_TypeDef *GPIOx, LL_GPIO_InitTypeDef *GPIO_InitStruct);
<> 128:9bcdf88f62b0 977 void LL_GPIO_StructInit(LL_GPIO_InitTypeDef *GPIO_InitStruct);
<> 128:9bcdf88f62b0 978
<> 128:9bcdf88f62b0 979 /**
<> 128:9bcdf88f62b0 980 * @}
<> 128:9bcdf88f62b0 981 */
<> 128:9bcdf88f62b0 982 #endif /* USE_FULL_LL_DRIVER */
<> 128:9bcdf88f62b0 983
<> 128:9bcdf88f62b0 984 /**
<> 128:9bcdf88f62b0 985 * @}
<> 128:9bcdf88f62b0 986 */
<> 128:9bcdf88f62b0 987
<> 128:9bcdf88f62b0 988 /**
<> 128:9bcdf88f62b0 989 * @}
<> 128:9bcdf88f62b0 990 */
<> 128:9bcdf88f62b0 991
<> 128:9bcdf88f62b0 992 #endif /* defined (GPIOA) || defined (GPIOB) || defined (GPIOC) || defined (GPIOD) || defined (GPIOE) || defined (GPIOF) || defined (GPIOG) || defined (GPIOH) */
<> 128:9bcdf88f62b0 993 /**
<> 128:9bcdf88f62b0 994 * @}
<> 128:9bcdf88f62b0 995 */
<> 128:9bcdf88f62b0 996
<> 128:9bcdf88f62b0 997 #ifdef __cplusplus
<> 128:9bcdf88f62b0 998 }
<> 128:9bcdf88f62b0 999 #endif
<> 128:9bcdf88f62b0 1000
<> 128:9bcdf88f62b0 1001 #endif /* __STM32L1xx_LL_GPIO_H */
<> 128:9bcdf88f62b0 1002
<> 128:9bcdf88f62b0 1003 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/