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TARGET_NUCLEO_F746ZG/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_ll_usart.h@169:a7c7b631e539, 2018-06-22 (annotated)

Committer:
Anna Bridge
Date:
Fri Jun 22 15:38:59 2018 +0100
Revision:
169:a7c7b631e539
Parent:
163:e59c8e839560 
mbed library. Release version 162

Who changed what in which revision?

UserRevisionLine numberNew contents of line
<> 139:856d2700e60b 1 /**
<> 139:856d2700e60b 2 ******************************************************************************
<> 139:856d2700e60b 3 * @file stm32f7xx_ll_usart.h
<> 139:856d2700e60b 4 * @author MCD Application Team
<> 139:856d2700e60b 5 * @brief Header file of USART LL module.
<> 139:856d2700e60b 6 ******************************************************************************
<> 139:856d2700e60b 7 * @attention
<> 139:856d2700e60b 8 *
<> 139:856d2700e60b 9 * <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
<> 139:856d2700e60b 10 *
<> 139:856d2700e60b 11 * Redistribution and use in source and binary forms, with or without modification,
<> 139:856d2700e60b 12 * are permitted provided that the following conditions are met:
<> 139:856d2700e60b 13 * 1. Redistributions of source code must retain the above copyright notice,
<> 139:856d2700e60b 14 * this list of conditions and the following disclaimer.
<> 139:856d2700e60b 15 * 2. Redistributions in binary form must reproduce the above copyright notice,
<> 139:856d2700e60b 16 * this list of conditions and the following disclaimer in the documentation
<> 139:856d2700e60b 17 * and/or other materials provided with the distribution.
<> 139:856d2700e60b 18 * 3. Neither the name of STMicroelectronics nor the names of its contributors
<> 139:856d2700e60b 19 * may be used to endorse or promote products derived from this software
<> 139:856d2700e60b 20 * without specific prior written permission.
<> 139:856d2700e60b 21 *
<> 139:856d2700e60b 22 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
<> 139:856d2700e60b 23 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
<> 139:856d2700e60b 24 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
<> 139:856d2700e60b 25 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
<> 139:856d2700e60b 26 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
<> 139:856d2700e60b 27 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
<> 139:856d2700e60b 28 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
<> 139:856d2700e60b 29 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
<> 139:856d2700e60b 30 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
<> 139:856d2700e60b 31 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
<> 139:856d2700e60b 32 *
<> 139:856d2700e60b 33 ******************************************************************************
<> 139:856d2700e60b 34 */
<> 139:856d2700e60b 35
<> 139:856d2700e60b 36 /* Define to prevent recursive inclusion -------------------------------------*/
<> 139:856d2700e60b 37 #ifndef __STM32F7xx_LL_USART_H
<> 139:856d2700e60b 38 #define __STM32F7xx_LL_USART_H
<> 139:856d2700e60b 39
<> 139:856d2700e60b 40 #ifdef __cplusplus
<> 139:856d2700e60b 41 extern "C" {
<> 139:856d2700e60b 42 #endif
<> 139:856d2700e60b 43
<> 139:856d2700e60b 44 /* Includes ------------------------------------------------------------------*/
<> 139:856d2700e60b 45 #include "stm32f7xx.h"
<> 139:856d2700e60b 46
<> 139:856d2700e60b 47 /** @addtogroup STM32F7xx_LL_Driver
<> 139:856d2700e60b 48 * @{
<> 139:856d2700e60b 49 */
<> 139:856d2700e60b 50
<> 139:856d2700e60b 51 #if defined (USART1) || defined (USART2) || defined (USART3) || defined (USART6) || defined (UART4) || defined (UART5) || defined (UART7) || defined (UART8)
<> 139:856d2700e60b 52
<> 139:856d2700e60b 53 /** @defgroup USART_LL USART
<> 139:856d2700e60b 54 * @{
<> 139:856d2700e60b 55 */
<> 139:856d2700e60b 56
<> 139:856d2700e60b 57 /* Private types -------------------------------------------------------------*/
<> 139:856d2700e60b 58 /* Private variables ---------------------------------------------------------*/
<> 139:856d2700e60b 59
<> 139:856d2700e60b 60 /* Private constants ---------------------------------------------------------*/
<> 139:856d2700e60b 61 /** @defgroup USART_LL_Private_Constants USART Private Constants
<> 139:856d2700e60b 62 * @{
<> 139:856d2700e60b 63 */
<> 139:856d2700e60b 64 /**
<> 139:856d2700e60b 65 * @}
<> 139:856d2700e60b 66 */
<> 139:856d2700e60b 67
<> 139:856d2700e60b 68 /* Private macros ------------------------------------------------------------*/
<> 139:856d2700e60b 69 #if defined(USE_FULL_LL_DRIVER)
<> 139:856d2700e60b 70 /** @defgroup USART_LL_Private_Macros USART Private Macros
<> 139:856d2700e60b 71 * @{
<> 139:856d2700e60b 72 */
<> 139:856d2700e60b 73 /**
<> 139:856d2700e60b 74 * @}
<> 139:856d2700e60b 75 */
<> 139:856d2700e60b 76 #endif /*USE_FULL_LL_DRIVER*/
<> 139:856d2700e60b 77
<> 139:856d2700e60b 78 /* Exported types ------------------------------------------------------------*/
<> 139:856d2700e60b 79 #if defined(USE_FULL_LL_DRIVER)
<> 139:856d2700e60b 80 /** @defgroup USART_LL_ES_INIT USART Exported Init structures
<> 139:856d2700e60b 81 * @{
<> 139:856d2700e60b 82 */
<> 139:856d2700e60b 83
<> 139:856d2700e60b 84 /**
<> 139:856d2700e60b 85 * @brief LL USART Init Structure definition
<> 139:856d2700e60b 86 */
<> 139:856d2700e60b 87 typedef struct
<> 139:856d2700e60b 88 {
<> 139:856d2700e60b 89 uint32_t BaudRate; /*!< This field defines expected Usart communication baud rate.
<> 139:856d2700e60b 90
<> 139:856d2700e60b 91 This feature can be modified afterwards using unitary function @ref LL_USART_SetBaudRate().*/
<> 139:856d2700e60b 92
<> 139:856d2700e60b 93 uint32_t DataWidth; /*!< Specifies the number of data bits transmitted or received in a frame.
<> 139:856d2700e60b 94 This parameter can be a value of @ref USART_LL_EC_DATAWIDTH.
<> 139:856d2700e60b 95
<> 139:856d2700e60b 96 This feature can be modified afterwards using unitary function @ref LL_USART_SetDataWidth().*/
<> 139:856d2700e60b 97
<> 139:856d2700e60b 98 uint32_t StopBits; /*!< Specifies the number of stop bits transmitted.
<> 139:856d2700e60b 99 This parameter can be a value of @ref USART_LL_EC_STOPBITS.
<> 139:856d2700e60b 100
<> 139:856d2700e60b 101 This feature can be modified afterwards using unitary function @ref LL_USART_SetStopBitsLength().*/
<> 139:856d2700e60b 102
<> 139:856d2700e60b 103 uint32_t Parity; /*!< Specifies the parity mode.
<> 139:856d2700e60b 104 This parameter can be a value of @ref USART_LL_EC_PARITY.
<> 139:856d2700e60b 105
<> 139:856d2700e60b 106 This feature can be modified afterwards using unitary function @ref LL_USART_SetParity().*/
<> 139:856d2700e60b 107
<> 139:856d2700e60b 108 uint32_t TransferDirection; /*!< Specifies whether the Receive and/or Transmit mode is enabled or disabled.
<> 139:856d2700e60b 109 This parameter can be a value of @ref USART_LL_EC_DIRECTION.
<> 139:856d2700e60b 110
<> 139:856d2700e60b 111 This feature can be modified afterwards using unitary function @ref LL_USART_SetTransferDirection().*/
<> 139:856d2700e60b 112
<> 139:856d2700e60b 113 uint32_t HardwareFlowControl; /*!< Specifies whether the hardware flow control mode is enabled or disabled.
<> 139:856d2700e60b 114 This parameter can be a value of @ref USART_LL_EC_HWCONTROL.
<> 139:856d2700e60b 115
<> 139:856d2700e60b 116 This feature can be modified afterwards using unitary function @ref LL_USART_SetHWFlowCtrl().*/
<> 139:856d2700e60b 117
<> 139:856d2700e60b 118 uint32_t OverSampling; /*!< Specifies whether USART oversampling mode is 16 or 8.
<> 139:856d2700e60b 119 This parameter can be a value of @ref USART_LL_EC_OVERSAMPLING.
<> 139:856d2700e60b 120
<> 139:856d2700e60b 121 This feature can be modified afterwards using unitary function @ref LL_USART_SetOverSampling().*/
<> 139:856d2700e60b 122
<> 139:856d2700e60b 123 } LL_USART_InitTypeDef;
<> 139:856d2700e60b 124
<> 139:856d2700e60b 125 /**
<> 139:856d2700e60b 126 * @brief LL USART Clock Init Structure definition
<> 139:856d2700e60b 127 */
<> 139:856d2700e60b 128 typedef struct
<> 139:856d2700e60b 129 {
<> 139:856d2700e60b 130 uint32_t ClockOutput; /*!< Specifies whether the USART clock is enabled or disabled.
<> 139:856d2700e60b 131 This parameter can be a value of @ref USART_LL_EC_CLOCK.
<> 139:856d2700e60b 132
<> 139:856d2700e60b 133 USART HW configuration can be modified afterwards using unitary functions
<> 139:856d2700e60b 134 @ref LL_USART_EnableSCLKOutput() or @ref LL_USART_DisableSCLKOutput().
<> 139:856d2700e60b 135 For more details, refer to description of this function. */
<> 139:856d2700e60b 136
<> 139:856d2700e60b 137 uint32_t ClockPolarity; /*!< Specifies the steady state of the serial clock.
<> 139:856d2700e60b 138 This parameter can be a value of @ref USART_LL_EC_POLARITY.
<> 139:856d2700e60b 139
<> 139:856d2700e60b 140 USART HW configuration can be modified afterwards using unitary functions @ref LL_USART_SetClockPolarity().
<> 139:856d2700e60b 141 For more details, refer to description of this function. */
<> 139:856d2700e60b 142
<> 139:856d2700e60b 143 uint32_t ClockPhase; /*!< Specifies the clock transition on which the bit capture is made.
<> 139:856d2700e60b 144 This parameter can be a value of @ref USART_LL_EC_PHASE.
<> 139:856d2700e60b 145
<> 139:856d2700e60b 146 USART HW configuration can be modified afterwards using unitary functions @ref LL_USART_SetClockPhase().
<> 139:856d2700e60b 147 For more details, refer to description of this function. */
<> 139:856d2700e60b 148
<> 139:856d2700e60b 149 uint32_t LastBitClockPulse; /*!< Specifies whether the clock pulse corresponding to the last transmitted
<> 139:856d2700e60b 150 data bit (MSB) has to be output on the SCLK pin in synchronous mode.
<> 139:856d2700e60b 151 This parameter can be a value of @ref USART_LL_EC_LASTCLKPULSE.
<> 139:856d2700e60b 152
<> 139:856d2700e60b 153 USART HW configuration can be modified afterwards using unitary functions @ref LL_USART_SetLastClkPulseOutput().
<> 139:856d2700e60b 154 For more details, refer to description of this function. */
<> 139:856d2700e60b 155
<> 139:856d2700e60b 156 } LL_USART_ClockInitTypeDef;
<> 139:856d2700e60b 157
<> 139:856d2700e60b 158 /**
<> 139:856d2700e60b 159 * @}
<> 139:856d2700e60b 160 */
<> 139:856d2700e60b 161 #endif /* USE_FULL_LL_DRIVER */
<> 139:856d2700e60b 162
<> 139:856d2700e60b 163 /* Exported constants --------------------------------------------------------*/
<> 139:856d2700e60b 164 /** @defgroup USART_LL_Exported_Constants USART Exported Constants
<> 139:856d2700e60b 165 * @{
<> 139:856d2700e60b 166 */
<> 139:856d2700e60b 167
<> 139:856d2700e60b 168 /** @defgroup USART_LL_EC_CLEAR_FLAG Clear Flags Defines
<> 139:856d2700e60b 169 * @brief Flags defines which can be used with LL_USART_WriteReg function
<> 139:856d2700e60b 170 * @{
<> 139:856d2700e60b 171 */
<> 139:856d2700e60b 172 #define LL_USART_ICR_PECF USART_ICR_PECF /*!< Parity error flag */
<> 139:856d2700e60b 173 #define LL_USART_ICR_FECF USART_ICR_FECF /*!< Framing error flag */
<> 139:856d2700e60b 174 #define LL_USART_ICR_NCF USART_ICR_NCF /*!< Noise detected flag */
<> 139:856d2700e60b 175 #define LL_USART_ICR_ORECF USART_ICR_ORECF /*!< Overrun error flag */
<> 139:856d2700e60b 176 #define LL_USART_ICR_IDLECF USART_ICR_IDLECF /*!< Idle line detected flag */
<> 139:856d2700e60b 177 #define LL_USART_ICR_TCCF USART_ICR_TCCF /*!< Transmission complete flag */
<> 139:856d2700e60b 178 #if defined(USART_TCBGT_SUPPORT)
<> 139:856d2700e60b 179 #define LL_USART_ICR_TCBGTCF USART_ICR_TCBGTCF /*!< Transmission completed before guard time flag */
<> 139:856d2700e60b 180 #endif
<> 139:856d2700e60b 181 #define LL_USART_ICR_LBDCF USART_ICR_LBDCF /*!< LIN break detection flag */
<> 139:856d2700e60b 182 #define LL_USART_ICR_CTSCF USART_ICR_CTSCF /*!< CTS flag */
<> 139:856d2700e60b 183 #define LL_USART_ICR_RTOCF USART_ICR_RTOCF /*!< Receiver timeout flag */
<> 139:856d2700e60b 184 #define LL_USART_ICR_EOBCF USART_ICR_EOBCF /*!< End of block flag */
<> 139:856d2700e60b 185 #define LL_USART_ICR_CMCF USART_ICR_CMCF /*!< Character match flag */
<> 139:856d2700e60b 186 /**
<> 139:856d2700e60b 187 * @}
<> 139:856d2700e60b 188 */
<> 139:856d2700e60b 189
<> 139:856d2700e60b 190 /** @defgroup USART_LL_EC_GET_FLAG Get Flags Defines
<> 139:856d2700e60b 191 * @brief Flags defines which can be used with LL_USART_ReadReg function
<> 139:856d2700e60b 192 * @{
<> 139:856d2700e60b 193 */
<> 139:856d2700e60b 194 #define LL_USART_ISR_PE USART_ISR_PE /*!< Parity error flag */
<> 139:856d2700e60b 195 #define LL_USART_ISR_FE USART_ISR_FE /*!< Framing error flag */
<> 139:856d2700e60b 196 #define LL_USART_ISR_NE USART_ISR_NE /*!< Noise detected flag */
<> 139:856d2700e60b 197 #define LL_USART_ISR_ORE USART_ISR_ORE /*!< Overrun error flag */
<> 139:856d2700e60b 198 #define LL_USART_ISR_IDLE USART_ISR_IDLE /*!< Idle line detected flag */
<> 139:856d2700e60b 199 #define LL_USART_ISR_RXNE USART_ISR_RXNE /*!< Read data register not empty flag */
<> 139:856d2700e60b 200 #define LL_USART_ISR_TC USART_ISR_TC /*!< Transmission complete flag */
<> 139:856d2700e60b 201 #define LL_USART_ISR_TXE USART_ISR_TXE /*!< Transmit data register empty flag */
<> 139:856d2700e60b 202 #define LL_USART_ISR_LBDF USART_ISR_LBDF /*!< LIN break detection flag */
<> 139:856d2700e60b 203 #define LL_USART_ISR_CTSIF USART_ISR_CTSIF /*!< CTS interrupt flag */
<> 139:856d2700e60b 204 #define LL_USART_ISR_CTS USART_ISR_CTS /*!< CTS flag */
<> 139:856d2700e60b 205 #define LL_USART_ISR_RTOF USART_ISR_RTOF /*!< Receiver timeout flag */
<> 139:856d2700e60b 206 #define LL_USART_ISR_EOBF USART_ISR_EOBF /*!< End of block flag */
<> 139:856d2700e60b 207 #define LL_USART_ISR_ABRE USART_ISR_ABRE /*!< Auto baud rate error flag */
<> 139:856d2700e60b 208 #define LL_USART_ISR_ABRF USART_ISR_ABRF /*!< Auto baud rate flag */
<> 139:856d2700e60b 209 #define LL_USART_ISR_BUSY USART_ISR_BUSY /*!< Busy flag */
<> 139:856d2700e60b 210 #define LL_USART_ISR_CMF USART_ISR_CMF /*!< Character match flag */
<> 139:856d2700e60b 211 #define LL_USART_ISR_SBKF USART_ISR_SBKF /*!< Send break flag */
<> 139:856d2700e60b 212 #define LL_USART_ISR_RWU USART_ISR_RWU /*!< Receiver wakeup from Mute mode flag */
<> 139:856d2700e60b 213 #define LL_USART_ISR_TEACK USART_ISR_TEACK /*!< Transmit enable acknowledge flag */
<> 139:856d2700e60b 214 #if defined(USART_TCBGT_SUPPORT)
<> 139:856d2700e60b 215 #define LL_USART_ISR_TCBGT USART_ISR_TCBGT /*!< Transmission complete before guard time completion flag */
<> 139:856d2700e60b 216 #endif
<> 139:856d2700e60b 217 /**
<> 139:856d2700e60b 218 * @}
<> 139:856d2700e60b 219 */
<> 139:856d2700e60b 220
<> 139:856d2700e60b 221 /** @defgroup USART_LL_EC_IT IT Defines
<> 139:856d2700e60b 222 * @brief IT defines which can be used with LL_USART_ReadReg and LL_USART_WriteReg functions
<> 139:856d2700e60b 223 * @{
<> 139:856d2700e60b 224 */
<> 139:856d2700e60b 225 #define LL_USART_CR1_IDLEIE USART_CR1_IDLEIE /*!< IDLE interrupt enable */
<> 139:856d2700e60b 226 #define LL_USART_CR1_RXNEIE USART_CR1_RXNEIE /*!< Read data register not empty interrupt enable */
<> 139:856d2700e60b 227 #define LL_USART_CR1_TCIE USART_CR1_TCIE /*!< Transmission complete interrupt enable */
<> 139:856d2700e60b 228 #define LL_USART_CR1_TXEIE USART_CR1_TXEIE /*!< Transmit data register empty interrupt enable */
<> 139:856d2700e60b 229 #define LL_USART_CR1_PEIE USART_CR1_PEIE /*!< Parity error */
<> 139:856d2700e60b 230 #define LL_USART_CR1_CMIE USART_CR1_CMIE /*!< Character match interrupt enable */
<> 139:856d2700e60b 231 #define LL_USART_CR1_RTOIE USART_CR1_RTOIE /*!< Receiver timeout interrupt enable */
<> 139:856d2700e60b 232 #define LL_USART_CR1_EOBIE USART_CR1_EOBIE /*!< End of Block interrupt enable */
<> 139:856d2700e60b 233 #define LL_USART_CR2_LBDIE USART_CR2_LBDIE /*!< LIN break detection interrupt enable */
<> 139:856d2700e60b 234 #define LL_USART_CR3_EIE USART_CR3_EIE /*!< Error interrupt enable */
<> 139:856d2700e60b 235 #define LL_USART_CR3_CTSIE USART_CR3_CTSIE /*!< CTS interrupt enable */
<> 139:856d2700e60b 236 #if defined(USART_TCBGT_SUPPORT)
<> 139:856d2700e60b 237 #define LL_USART_CR3_TCBGTIE USART_CR3_TCBGTIE /*!< Transmission complete before guard time interrupt enable */
<> 139:856d2700e60b 238 #endif
<> 139:856d2700e60b 239 /**
<> 139:856d2700e60b 240 * @}
<> 139:856d2700e60b 241 */
<> 139:856d2700e60b 242
<> 139:856d2700e60b 243 /** @defgroup USART_LL_EC_DIRECTION Communication Direction
<> 139:856d2700e60b 244 * @{
<> 139:856d2700e60b 245 */
<> 139:856d2700e60b 246 #define LL_USART_DIRECTION_NONE 0x00000000U /*!< Transmitter and Receiver are disabled */
<> 139:856d2700e60b 247 #define LL_USART_DIRECTION_RX USART_CR1_RE /*!< Transmitter is disabled and Receiver is enabled */
<> 139:856d2700e60b 248 #define LL_USART_DIRECTION_TX USART_CR1_TE /*!< Transmitter is enabled and Receiver is disabled */
<> 139:856d2700e60b 249 #define LL_USART_DIRECTION_TX_RX (USART_CR1_TE |USART_CR1_RE) /*!< Transmitter and Receiver are enabled */
<> 139:856d2700e60b 250 /**
<> 139:856d2700e60b 251 * @}
<> 139:856d2700e60b 252 */
<> 139:856d2700e60b 253
<> 139:856d2700e60b 254 /** @defgroup USART_LL_EC_PARITY Parity Control
<> 139:856d2700e60b 255 * @{
<> 139:856d2700e60b 256 */
<> 139:856d2700e60b 257 #define LL_USART_PARITY_NONE 0x00000000U /*!< Parity control disabled */
<> 139:856d2700e60b 258 #define LL_USART_PARITY_EVEN USART_CR1_PCE /*!< Parity control enabled and Even Parity is selected */
<> 139:856d2700e60b 259 #define LL_USART_PARITY_ODD (USART_CR1_PCE | USART_CR1_PS) /*!< Parity control enabled and Odd Parity is selected */
<> 139:856d2700e60b 260 /**
<> 139:856d2700e60b 261 * @}
<> 139:856d2700e60b 262 */
<> 139:856d2700e60b 263
<> 139:856d2700e60b 264 /** @defgroup USART_LL_EC_WAKEUP Wakeup
<> 139:856d2700e60b 265 * @{
<> 139:856d2700e60b 266 */
<> 139:856d2700e60b 267 #define LL_USART_WAKEUP_IDLELINE 0x00000000U /*!< USART wake up from Mute mode on Idle Line */
<> 139:856d2700e60b 268 #define LL_USART_WAKEUP_ADDRESSMARK USART_CR1_WAKE /*!< USART wake up from Mute mode on Address Mark */
<> 139:856d2700e60b 269 /**
<> 139:856d2700e60b 270 * @}
<> 139:856d2700e60b 271 */
<> 139:856d2700e60b 272
<> 139:856d2700e60b 273 /** @defgroup USART_LL_EC_DATAWIDTH Datawidth
<> 139:856d2700e60b 274 * @{
<> 139:856d2700e60b 275 */
<> 139:856d2700e60b 276 #define LL_USART_DATAWIDTH_7B USART_CR1_M1 /*!< 7 bits word length : Start bit, 7 data bits, n stop bits */
<> 139:856d2700e60b 277 #define LL_USART_DATAWIDTH_8B 0x00000000U /*!< 8 bits word length : Start bit, 8 data bits, n stop bits */
<> 139:856d2700e60b 278 #define LL_USART_DATAWIDTH_9B USART_CR1_M0 /*!< 9 bits word length : Start bit, 9 data bits, n stop bits */
<> 139:856d2700e60b 279 /**
<> 139:856d2700e60b 280 * @}
<> 139:856d2700e60b 281 */
<> 139:856d2700e60b 282
<> 139:856d2700e60b 283 /** @defgroup USART_LL_EC_OVERSAMPLING Oversampling
<> 139:856d2700e60b 284 * @{
<> 139:856d2700e60b 285 */
<> 139:856d2700e60b 286 #define LL_USART_OVERSAMPLING_16 0x00000000U /*!< Oversampling by 16 */
<> 139:856d2700e60b 287 #define LL_USART_OVERSAMPLING_8 USART_CR1_OVER8 /*!< Oversampling by 8 */
<> 139:856d2700e60b 288 /**
<> 139:856d2700e60b 289 * @}
<> 139:856d2700e60b 290 */
<> 139:856d2700e60b 291
<> 139:856d2700e60b 292 #if defined(USE_FULL_LL_DRIVER)
<> 139:856d2700e60b 293 /** @defgroup USART_LL_EC_CLOCK Clock Signal
<> 139:856d2700e60b 294 * @{
<> 139:856d2700e60b 295 */
<> 139:856d2700e60b 296
<> 139:856d2700e60b 297 #define LL_USART_CLOCK_DISABLE 0x00000000U /*!< Clock signal not provided */
<> 139:856d2700e60b 298 #define LL_USART_CLOCK_ENABLE USART_CR2_CLKEN /*!< Clock signal provided */
<> 139:856d2700e60b 299 /**
<> 139:856d2700e60b 300 * @}
<> 139:856d2700e60b 301 */
<> 139:856d2700e60b 302 #endif /*USE_FULL_LL_DRIVER*/
<> 139:856d2700e60b 303
<> 139:856d2700e60b 304 /** @defgroup USART_LL_EC_LASTCLKPULSE Last Clock Pulse
<> 139:856d2700e60b 305 * @{
<> 139:856d2700e60b 306 */
<> 139:856d2700e60b 307 #define LL_USART_LASTCLKPULSE_NO_OUTPUT 0x00000000U /*!< The clock pulse of the last data bit is not output to the SCLK pin */
<> 139:856d2700e60b 308 #define LL_USART_LASTCLKPULSE_OUTPUT USART_CR2_LBCL /*!< The clock pulse of the last data bit is output to the SCLK pin */
<> 139:856d2700e60b 309 /**
<> 139:856d2700e60b 310 * @}
<> 139:856d2700e60b 311 */
<> 139:856d2700e60b 312
<> 139:856d2700e60b 313 /** @defgroup USART_LL_EC_PHASE Clock Phase
<> 139:856d2700e60b 314 * @{
<> 139:856d2700e60b 315 */
<> 139:856d2700e60b 316 #define LL_USART_PHASE_1EDGE 0x00000000U /*!< The first clock transition is the first data capture edge */
<> 139:856d2700e60b 317 #define LL_USART_PHASE_2EDGE USART_CR2_CPHA /*!< The second clock transition is the first data capture edge */
<> 139:856d2700e60b 318 /**
<> 139:856d2700e60b 319 * @}
<> 139:856d2700e60b 320 */
<> 139:856d2700e60b 321
<> 139:856d2700e60b 322 /** @defgroup USART_LL_EC_POLARITY Clock Polarity
<> 139:856d2700e60b 323 * @{
<> 139:856d2700e60b 324 */
<> 139:856d2700e60b 325 #define LL_USART_POLARITY_LOW 0x00000000U /*!< Steady low value on SCLK pin outside transmission window*/
<> 139:856d2700e60b 326 #define LL_USART_POLARITY_HIGH USART_CR2_CPOL /*!< Steady high value on SCLK pin outside transmission window */
<> 139:856d2700e60b 327 /**
<> 139:856d2700e60b 328 * @}
<> 139:856d2700e60b 329 */
<> 139:856d2700e60b 330
<> 139:856d2700e60b 331 /** @defgroup USART_LL_EC_STOPBITS Stop Bits
<> 139:856d2700e60b 332 * @{
<> 139:856d2700e60b 333 */
<> 139:856d2700e60b 334 #define LL_USART_STOPBITS_0_5 USART_CR2_STOP_0 /*!< 0.5 stop bit */
<> 139:856d2700e60b 335 #define LL_USART_STOPBITS_1 0x00000000U /*!< 1 stop bit */
<> 139:856d2700e60b 336 #define LL_USART_STOPBITS_1_5 (USART_CR2_STOP_0 | USART_CR2_STOP_1) /*!< 1.5 stop bits */
<> 139:856d2700e60b 337 #define LL_USART_STOPBITS_2 USART_CR2_STOP_1 /*!< 2 stop bits */
<> 139:856d2700e60b 338 /**
<> 139:856d2700e60b 339 * @}
<> 139:856d2700e60b 340 */
<> 139:856d2700e60b 341
<> 139:856d2700e60b 342 /** @defgroup USART_LL_EC_TXRX TX RX Pins Swap
<> 139:856d2700e60b 343 * @{
<> 139:856d2700e60b 344 */
<> 139:856d2700e60b 345 #define LL_USART_TXRX_STANDARD 0x00000000U /*!< TX/RX pins are used as defined in standard pinout */
<> 139:856d2700e60b 346 #define LL_USART_TXRX_SWAPPED (USART_CR2_SWAP) /*!< TX and RX pins functions are swapped. */
<> 139:856d2700e60b 347 /**
<> 139:856d2700e60b 348 * @}
<> 139:856d2700e60b 349 */
<> 139:856d2700e60b 350
<> 139:856d2700e60b 351 /** @defgroup USART_LL_EC_RXPIN_LEVEL RX Pin Active Level Inversion
<> 139:856d2700e60b 352 * @{
<> 139:856d2700e60b 353 */
<> 139:856d2700e60b 354 #define LL_USART_RXPIN_LEVEL_STANDARD 0x00000000U /*!< RX pin signal works using the standard logic levels */
<> 139:856d2700e60b 355 #define LL_USART_RXPIN_LEVEL_INVERTED (USART_CR2_RXINV) /*!< RX pin signal values are inverted. */
<> 139:856d2700e60b 356 /**
<> 139:856d2700e60b 357 * @}
<> 139:856d2700e60b 358 */
<> 139:856d2700e60b 359
<> 139:856d2700e60b 360 /** @defgroup USART_LL_EC_TXPIN_LEVEL TX Pin Active Level Inversion
<> 139:856d2700e60b 361 * @{
<> 139:856d2700e60b 362 */
<> 139:856d2700e60b 363 #define LL_USART_TXPIN_LEVEL_STANDARD 0x00000000U /*!< TX pin signal works using the standard logic levels */
<> 139:856d2700e60b 364 #define LL_USART_TXPIN_LEVEL_INVERTED (USART_CR2_TXINV) /*!< TX pin signal values are inverted. */
<> 139:856d2700e60b 365 /**
<> 139:856d2700e60b 366 * @}
<> 139:856d2700e60b 367 */
<> 139:856d2700e60b 368
<> 139:856d2700e60b 369 /** @defgroup USART_LL_EC_BINARY_LOGIC Binary Data Inversion
<> 139:856d2700e60b 370 * @{
<> 139:856d2700e60b 371 */
<> 139:856d2700e60b 372 #define LL_USART_BINARY_LOGIC_POSITIVE 0x00000000U /*!< Logical data from the data register are send/received in positive/direct logic. (1=H, 0=L) */
<> 139:856d2700e60b 373 #define LL_USART_BINARY_LOGIC_NEGATIVE USART_CR2_DATAINV /*!< Logical data from the data register are send/received in negative/inverse logic. (1=L, 0=H). The parity bit is also inverted. */
<> 139:856d2700e60b 374 /**
<> 139:856d2700e60b 375 * @}
<> 139:856d2700e60b 376 */
<> 139:856d2700e60b 377
<> 139:856d2700e60b 378 /** @defgroup USART_LL_EC_BITORDER Bit Order
<> 139:856d2700e60b 379 * @{
<> 139:856d2700e60b 380 */
<> 139:856d2700e60b 381 #define LL_USART_BITORDER_LSBFIRST 0x00000000U /*!< data is transmitted/received with data bit 0 first, following the start bit */
<> 139:856d2700e60b 382 #define LL_USART_BITORDER_MSBFIRST USART_CR2_MSBFIRST /*!< data is transmitted/received with the MSB first, following the start bit */
<> 139:856d2700e60b 383 /**
<> 139:856d2700e60b 384 * @}
<> 139:856d2700e60b 385 */
<> 139:856d2700e60b 386
<> 139:856d2700e60b 387 /** @defgroup USART_LL_EC_AUTOBAUD_DETECT_ON Autobaud Detection
<> 139:856d2700e60b 388 * @{
<> 139:856d2700e60b 389 */
<> 139:856d2700e60b 390 #define LL_USART_AUTOBAUD_DETECT_ON_STARTBIT 0x00000000U /*!< Measurement of the start bit is used to detect the baud rate */
<> 139:856d2700e60b 391 #define LL_USART_AUTOBAUD_DETECT_ON_FALLINGEDGE USART_CR2_ABRMODE_0 /*!< Falling edge to falling edge measurement. Received frame must start with a single bit = 1 -> Frame = Start10xxxxxx */
<> 139:856d2700e60b 392 #define LL_USART_AUTOBAUD_DETECT_ON_7F_FRAME USART_CR2_ABRMODE_1 /*!< 0x7F frame detection */
<> 139:856d2700e60b 393 #define LL_USART_AUTOBAUD_DETECT_ON_55_FRAME (USART_CR2_ABRMODE_1 | USART_CR2_ABRMODE_0) /*!< 0x55 frame detection */
<> 139:856d2700e60b 394 /**
<> 139:856d2700e60b 395 * @}
<> 139:856d2700e60b 396 */
<> 139:856d2700e60b 397
<> 139:856d2700e60b 398 /** @defgroup USART_LL_EC_ADDRESS_DETECT Address Length Detection
<> 139:856d2700e60b 399 * @{
<> 139:856d2700e60b 400 */
<> 139:856d2700e60b 401 #define LL_USART_ADDRESS_DETECT_4B 0x00000000U /*!< 4-bit address detection method selected */
<> 139:856d2700e60b 402 #define LL_USART_ADDRESS_DETECT_7B USART_CR2_ADDM7 /*!< 7-bit address detection (in 8-bit data mode) method selected */
<> 139:856d2700e60b 403 /**
<> 139:856d2700e60b 404 * @}
<> 139:856d2700e60b 405 */
<> 139:856d2700e60b 406
<> 139:856d2700e60b 407 /** @defgroup USART_LL_EC_HWCONTROL Hardware Control
<> 139:856d2700e60b 408 * @{
<> 139:856d2700e60b 409 */
<> 139:856d2700e60b 410 #define LL_USART_HWCONTROL_NONE 0x00000000U /*!< CTS and RTS hardware flow control disabled */
<> 139:856d2700e60b 411 #define LL_USART_HWCONTROL_RTS USART_CR3_RTSE /*!< RTS output enabled, data is only requested when there is space in the receive buffer */
<> 139:856d2700e60b 412 #define LL_USART_HWCONTROL_CTS USART_CR3_CTSE /*!< CTS mode enabled, data is only transmitted when the nCTS input is asserted (tied to 0) */
<> 139:856d2700e60b 413 #define LL_USART_HWCONTROL_RTS_CTS (USART_CR3_RTSE | USART_CR3_CTSE) /*!< CTS and RTS hardware flow control enabled */
<> 139:856d2700e60b 414 /**
<> 139:856d2700e60b 415 * @}
<> 139:856d2700e60b 416 */
<> 139:856d2700e60b 417
<> 139:856d2700e60b 418
<> 139:856d2700e60b 419 /** @defgroup USART_LL_EC_IRDA_POWER IrDA Power
<> 139:856d2700e60b 420 * @{
<> 139:856d2700e60b 421 */
<> 139:856d2700e60b 422 #define LL_USART_IRDA_POWER_NORMAL 0x00000000U /*!< IrDA normal power mode */
<> 139:856d2700e60b 423 #define LL_USART_IRDA_POWER_LOW USART_CR3_IRLP /*!< IrDA low power mode */
<> 139:856d2700e60b 424 /**
<> 139:856d2700e60b 425 * @}
<> 139:856d2700e60b 426 */
<> 139:856d2700e60b 427
<> 139:856d2700e60b 428 /** @defgroup USART_LL_EC_LINBREAK_DETECT LIN Break Detection Length
<> 139:856d2700e60b 429 * @{
<> 139:856d2700e60b 430 */
<> 139:856d2700e60b 431 #define LL_USART_LINBREAK_DETECT_10B 0x00000000U /*!< 10-bit break detection method selected */
<> 139:856d2700e60b 432 #define LL_USART_LINBREAK_DETECT_11B USART_CR2_LBDL /*!< 11-bit break detection method selected */
<> 139:856d2700e60b 433 /**
<> 139:856d2700e60b 434 * @}
<> 139:856d2700e60b 435 */
<> 139:856d2700e60b 436
<> 139:856d2700e60b 437 /** @defgroup USART_LL_EC_DE_POLARITY Driver Enable Polarity
<> 139:856d2700e60b 438 * @{
<> 139:856d2700e60b 439 */
<> 139:856d2700e60b 440 #define LL_USART_DE_POLARITY_HIGH 0x00000000U /*!< DE signal is active high */
<> 139:856d2700e60b 441 #define LL_USART_DE_POLARITY_LOW USART_CR3_DEP /*!< DE signal is active low */
<> 139:856d2700e60b 442 /**
<> 139:856d2700e60b 443 * @}
<> 139:856d2700e60b 444 */
<> 139:856d2700e60b 445
<> 139:856d2700e60b 446 /** @defgroup USART_LL_EC_DMA_REG_DATA DMA Register Data
<> 139:856d2700e60b 447 * @{
<> 139:856d2700e60b 448 */
<> 139:856d2700e60b 449 #define LL_USART_DMA_REG_DATA_TRANSMIT 0x00000000U /*!< Get address of data register used for transmission */
<> 139:856d2700e60b 450 #define LL_USART_DMA_REG_DATA_RECEIVE 0x00000001U /*!< Get address of data register used for reception */
<> 139:856d2700e60b 451 /**
<> 139:856d2700e60b 452 * @}
<> 139:856d2700e60b 453 */
<> 139:856d2700e60b 454
<> 139:856d2700e60b 455 /**
<> 139:856d2700e60b 456 * @}
<> 139:856d2700e60b 457 */
<> 139:856d2700e60b 458
<> 139:856d2700e60b 459 /* Exported macro ------------------------------------------------------------*/
<> 139:856d2700e60b 460 /** @defgroup USART_LL_Exported_Macros USART Exported Macros
<> 139:856d2700e60b 461 * @{
<> 139:856d2700e60b 462 */
<> 139:856d2700e60b 463
<> 139:856d2700e60b 464 /** @defgroup USART_LL_EM_WRITE_READ Common Write and read registers Macros
<> 139:856d2700e60b 465 * @{
<> 139:856d2700e60b 466 */
<> 139:856d2700e60b 467
<> 139:856d2700e60b 468 /**
<> 139:856d2700e60b 469 * @brief Write a value in USART register
<> 139:856d2700e60b 470 * @param __INSTANCE__ USART Instance
<> 139:856d2700e60b 471 * @param __REG__ Register to be written
<> 139:856d2700e60b 472 * @param __VALUE__ Value to be written in the register
<> 139:856d2700e60b 473 * @retval None
<> 139:856d2700e60b 474 */
<> 139:856d2700e60b 475 #define LL_USART_WriteReg(__INSTANCE__, __REG__, __VALUE__) WRITE_REG(__INSTANCE__->__REG__, (__VALUE__))
<> 139:856d2700e60b 476
<> 139:856d2700e60b 477 /**
<> 139:856d2700e60b 478 * @brief Read a value in USART register
<> 139:856d2700e60b 479 * @param __INSTANCE__ USART Instance
<> 139:856d2700e60b 480 * @param __REG__ Register to be read
<> 139:856d2700e60b 481 * @retval Register value
<> 139:856d2700e60b 482 */
<> 139:856d2700e60b 483 #define LL_USART_ReadReg(__INSTANCE__, __REG__) READ_REG(__INSTANCE__->__REG__)
<> 139:856d2700e60b 484 /**
<> 139:856d2700e60b 485 * @}
<> 139:856d2700e60b 486 */
<> 139:856d2700e60b 487
<> 139:856d2700e60b 488 /** @defgroup USART_LL_EM_Exported_Macros_Helper Exported_Macros_Helper
<> 139:856d2700e60b 489 * @{
<> 139:856d2700e60b 490 */
<> 139:856d2700e60b 491
<> 139:856d2700e60b 492 /**
<> 139:856d2700e60b 493 * @brief Compute USARTDIV value according to Peripheral Clock and
<> 139:856d2700e60b 494 * expected Baud Rate in 8 bits sampling mode (32 bits value of USARTDIV is returned)
<> 139:856d2700e60b 495 * @param __PERIPHCLK__ Peripheral Clock frequency used for USART instance
<> 139:856d2700e60b 496 * @param __BAUDRATE__ Baud rate value to achieve
<> 139:856d2700e60b 497 * @retval USARTDIV value to be used for BRR register filling in OverSampling_8 case
<> 139:856d2700e60b 498 */
<> 139:856d2700e60b 499 #define __LL_USART_DIV_SAMPLING8(__PERIPHCLK__, __BAUDRATE__) ((((__PERIPHCLK__)*2) + ((__BAUDRATE__)/2))/(__BAUDRATE__))
<> 139:856d2700e60b 500
<> 139:856d2700e60b 501 /**
<> 139:856d2700e60b 502 * @brief Compute USARTDIV value according to Peripheral Clock and
<> 139:856d2700e60b 503 * expected Baud Rate in 16 bits sampling mode (32 bits value of USARTDIV is returned)
<> 139:856d2700e60b 504 * @param __PERIPHCLK__ Peripheral Clock frequency used for USART instance
<> 139:856d2700e60b 505 * @param __BAUDRATE__ Baud rate value to achieve
<> 139:856d2700e60b 506 * @retval USARTDIV value to be used for BRR register filling in OverSampling_16 case
<> 139:856d2700e60b 507 */
<> 139:856d2700e60b 508 #define __LL_USART_DIV_SAMPLING16(__PERIPHCLK__, __BAUDRATE__) (((__PERIPHCLK__) + ((__BAUDRATE__)/2))/(__BAUDRATE__))
<> 139:856d2700e60b 509
<> 139:856d2700e60b 510 /**
<> 139:856d2700e60b 511 * @}
<> 139:856d2700e60b 512 */
<> 139:856d2700e60b 513
<> 139:856d2700e60b 514 /**
<> 139:856d2700e60b 515 * @}
<> 139:856d2700e60b 516 */
<> 139:856d2700e60b 517
<> 139:856d2700e60b 518 /* Exported functions --------------------------------------------------------*/
<> 139:856d2700e60b 519
<> 139:856d2700e60b 520 /** @defgroup USART_LL_Exported_Functions USART Exported Functions
<> 139:856d2700e60b 521 * @{
<> 139:856d2700e60b 522 */
<> 139:856d2700e60b 523
<> 139:856d2700e60b 524 /** @defgroup USART_LL_EF_Configuration Configuration functions
<> 139:856d2700e60b 525 * @{
<> 139:856d2700e60b 526 */
<> 139:856d2700e60b 527
<> 139:856d2700e60b 528 /**
<> 139:856d2700e60b 529 * @brief USART Enable
<> 139:856d2700e60b 530 * @rmtoll CR1 UE LL_USART_Enable
<> 139:856d2700e60b 531 * @param USARTx USART Instance
<> 139:856d2700e60b 532 * @retval None
<> 139:856d2700e60b 533 */
<> 139:856d2700e60b 534 __STATIC_INLINE void LL_USART_Enable(USART_TypeDef *USARTx)
<> 139:856d2700e60b 535 {
<> 139:856d2700e60b 536 SET_BIT(USARTx->CR1, USART_CR1_UE);
<> 139:856d2700e60b 537 }
<> 139:856d2700e60b 538
<> 139:856d2700e60b 539 /**
<> 139:856d2700e60b 540 * @brief USART Disable (all USART prescalers and outputs are disabled)
<> 139:856d2700e60b 541 * @note When USART is disabled, USART prescalers and outputs are stopped immediately,
<> 139:856d2700e60b 542 * and current operations are discarded. The configuration of the USART is kept, but all the status
<> 139:856d2700e60b 543 * flags, in the USARTx_ISR are set to their default values.
<> 139:856d2700e60b 544 * @rmtoll CR1 UE LL_USART_Disable
<> 139:856d2700e60b 545 * @param USARTx USART Instance
<> 139:856d2700e60b 546 * @retval None
<> 139:856d2700e60b 547 */
<> 139:856d2700e60b 548 __STATIC_INLINE void LL_USART_Disable(USART_TypeDef *USARTx)
<> 139:856d2700e60b 549 {
<> 139:856d2700e60b 550 CLEAR_BIT(USARTx->CR1, USART_CR1_UE);
<> 139:856d2700e60b 551 }
<> 139:856d2700e60b 552
<> 139:856d2700e60b 553 /**
<> 139:856d2700e60b 554 * @brief Indicate if USART is enabled
<> 139:856d2700e60b 555 * @rmtoll CR1 UE LL_USART_IsEnabled
<> 139:856d2700e60b 556 * @param USARTx USART Instance
<> 139:856d2700e60b 557 * @retval State of bit (1 or 0).
<> 139:856d2700e60b 558 */
<> 139:856d2700e60b 559 __STATIC_INLINE uint32_t LL_USART_IsEnabled(USART_TypeDef *USARTx)
<> 139:856d2700e60b 560 {
<> 139:856d2700e60b 561 return (READ_BIT(USARTx->CR1, USART_CR1_UE) == (USART_CR1_UE));
<> 139:856d2700e60b 562 }
<> 139:856d2700e60b 563
<> 139:856d2700e60b 564
<> 139:856d2700e60b 565 /**
<> 139:856d2700e60b 566 * @brief Receiver Enable (Receiver is enabled and begins searching for a start bit)
<> 139:856d2700e60b 567 * @rmtoll CR1 RE LL_USART_EnableDirectionRx
<> 139:856d2700e60b 568 * @param USARTx USART Instance
<> 139:856d2700e60b 569 * @retval None
<> 139:856d2700e60b 570 */
<> 139:856d2700e60b 571 __STATIC_INLINE void LL_USART_EnableDirectionRx(USART_TypeDef *USARTx)
<> 139:856d2700e60b 572 {
<> 139:856d2700e60b 573 SET_BIT(USARTx->CR1, USART_CR1_RE);
<> 139:856d2700e60b 574 }
<> 139:856d2700e60b 575
<> 139:856d2700e60b 576 /**
<> 139:856d2700e60b 577 * @brief Receiver Disable
<> 139:856d2700e60b 578 * @rmtoll CR1 RE LL_USART_DisableDirectionRx
<> 139:856d2700e60b 579 * @param USARTx USART Instance
<> 139:856d2700e60b 580 * @retval None
<> 139:856d2700e60b 581 */
<> 139:856d2700e60b 582 __STATIC_INLINE void LL_USART_DisableDirectionRx(USART_TypeDef *USARTx)
<> 139:856d2700e60b 583 {
<> 139:856d2700e60b 584 CLEAR_BIT(USARTx->CR1, USART_CR1_RE);
<> 139:856d2700e60b 585 }
<> 139:856d2700e60b 586
<> 139:856d2700e60b 587 /**
<> 139:856d2700e60b 588 * @brief Transmitter Enable
<> 139:856d2700e60b 589 * @rmtoll CR1 TE LL_USART_EnableDirectionTx
<> 139:856d2700e60b 590 * @param USARTx USART Instance
<> 139:856d2700e60b 591 * @retval None
<> 139:856d2700e60b 592 */
<> 139:856d2700e60b 593 __STATIC_INLINE void LL_USART_EnableDirectionTx(USART_TypeDef *USARTx)
<> 139:856d2700e60b 594 {
<> 139:856d2700e60b 595 SET_BIT(USARTx->CR1, USART_CR1_TE);
<> 139:856d2700e60b 596 }
<> 139:856d2700e60b 597
<> 139:856d2700e60b 598 /**
<> 139:856d2700e60b 599 * @brief Transmitter Disable
<> 139:856d2700e60b 600 * @rmtoll CR1 TE LL_USART_DisableDirectionTx
<> 139:856d2700e60b 601 * @param USARTx USART Instance
<> 139:856d2700e60b 602 * @retval None
<> 139:856d2700e60b 603 */
<> 139:856d2700e60b 604 __STATIC_INLINE void LL_USART_DisableDirectionTx(USART_TypeDef *USARTx)
<> 139:856d2700e60b 605 {
<> 139:856d2700e60b 606 CLEAR_BIT(USARTx->CR1, USART_CR1_TE);
<> 139:856d2700e60b 607 }
<> 139:856d2700e60b 608
<> 139:856d2700e60b 609 /**
<> 139:856d2700e60b 610 * @brief Configure simultaneously enabled/disabled states
<> 139:856d2700e60b 611 * of Transmitter and Receiver
<> 139:856d2700e60b 612 * @rmtoll CR1 RE LL_USART_SetTransferDirection\n
<> 139:856d2700e60b 613 * CR1 TE LL_USART_SetTransferDirection
<> 139:856d2700e60b 614 * @param USARTx USART Instance
<> 139:856d2700e60b 615 * @param TransferDirection This parameter can be one of the following values:
<> 139:856d2700e60b 616 * @arg @ref LL_USART_DIRECTION_NONE
<> 139:856d2700e60b 617 * @arg @ref LL_USART_DIRECTION_RX
<> 139:856d2700e60b 618 * @arg @ref LL_USART_DIRECTION_TX
<> 139:856d2700e60b 619 * @arg @ref LL_USART_DIRECTION_TX_RX
<> 139:856d2700e60b 620 * @retval None
<> 139:856d2700e60b 621 */
<> 139:856d2700e60b 622 __STATIC_INLINE void LL_USART_SetTransferDirection(USART_TypeDef *USARTx, uint32_t TransferDirection)
<> 139:856d2700e60b 623 {
<> 139:856d2700e60b 624 MODIFY_REG(USARTx->CR1, USART_CR1_RE | USART_CR1_TE, TransferDirection);
<> 139:856d2700e60b 625 }
<> 139:856d2700e60b 626
<> 139:856d2700e60b 627 /**
<> 139:856d2700e60b 628 * @brief Return enabled/disabled states of Transmitter and Receiver
<> 139:856d2700e60b 629 * @rmtoll CR1 RE LL_USART_GetTransferDirection\n
<> 139:856d2700e60b 630 * CR1 TE LL_USART_GetTransferDirection
<> 139:856d2700e60b 631 * @param USARTx USART Instance
<> 139:856d2700e60b 632 * @retval Returned value can be one of the following values:
<> 139:856d2700e60b 633 * @arg @ref LL_USART_DIRECTION_NONE
<> 139:856d2700e60b 634 * @arg @ref LL_USART_DIRECTION_RX
<> 139:856d2700e60b 635 * @arg @ref LL_USART_DIRECTION_TX
<> 139:856d2700e60b 636 * @arg @ref LL_USART_DIRECTION_TX_RX
<> 139:856d2700e60b 637 */
<> 139:856d2700e60b 638 __STATIC_INLINE uint32_t LL_USART_GetTransferDirection(USART_TypeDef *USARTx)
<> 139:856d2700e60b 639 {
<> 139:856d2700e60b 640 return (uint32_t)(READ_BIT(USARTx->CR1, USART_CR1_RE | USART_CR1_TE));
<> 139:856d2700e60b 641 }
<> 139:856d2700e60b 642
<> 139:856d2700e60b 643 /**
<> 139:856d2700e60b 644 * @brief Configure Parity (enabled/disabled and parity mode if enabled).
<> 139:856d2700e60b 645 * @note This function selects if hardware parity control (generation and detection) is enabled or disabled.
<> 139:856d2700e60b 646 * When the parity control is enabled (Odd or Even), computed parity bit is inserted at the MSB position
<> 139:856d2700e60b 647 * (9th or 8th bit depending on data width) and parity is checked on the received data.
<> 139:856d2700e60b 648 * @rmtoll CR1 PS LL_USART_SetParity\n
<> 139:856d2700e60b 649 * CR1 PCE LL_USART_SetParity
<> 139:856d2700e60b 650 * @param USARTx USART Instance
<> 139:856d2700e60b 651 * @param Parity This parameter can be one of the following values:
<> 139:856d2700e60b 652 * @arg @ref LL_USART_PARITY_NONE
<> 139:856d2700e60b 653 * @arg @ref LL_USART_PARITY_EVEN
<> 139:856d2700e60b 654 * @arg @ref LL_USART_PARITY_ODD
<> 139:856d2700e60b 655 * @retval None
<> 139:856d2700e60b 656 */
<> 139:856d2700e60b 657 __STATIC_INLINE void LL_USART_SetParity(USART_TypeDef *USARTx, uint32_t Parity)
<> 139:856d2700e60b 658 {
<> 139:856d2700e60b 659 MODIFY_REG(USARTx->CR1, USART_CR1_PS | USART_CR1_PCE, Parity);
<> 139:856d2700e60b 660 }
<> 139:856d2700e60b 661
<> 139:856d2700e60b 662 /**
<> 139:856d2700e60b 663 * @brief Return Parity configuration (enabled/disabled and parity mode if enabled)
<> 139:856d2700e60b 664 * @rmtoll CR1 PS LL_USART_GetParity\n
<> 139:856d2700e60b 665 * CR1 PCE LL_USART_GetParity
<> 139:856d2700e60b 666 * @param USARTx USART Instance
<> 139:856d2700e60b 667 * @retval Returned value can be one of the following values:
<> 139:856d2700e60b 668 * @arg @ref LL_USART_PARITY_NONE
<> 139:856d2700e60b 669 * @arg @ref LL_USART_PARITY_EVEN
<> 139:856d2700e60b 670 * @arg @ref LL_USART_PARITY_ODD
<> 139:856d2700e60b 671 */
<> 139:856d2700e60b 672 __STATIC_INLINE uint32_t LL_USART_GetParity(USART_TypeDef *USARTx)
<> 139:856d2700e60b 673 {
<> 139:856d2700e60b 674 return (uint32_t)(READ_BIT(USARTx->CR1, USART_CR1_PS | USART_CR1_PCE));
<> 139:856d2700e60b 675 }
<> 139:856d2700e60b 676
<> 139:856d2700e60b 677 /**
<> 139:856d2700e60b 678 * @brief Set Receiver Wake Up method from Mute mode.
<> 139:856d2700e60b 679 * @rmtoll CR1 WAKE LL_USART_SetWakeUpMethod
<> 139:856d2700e60b 680 * @param USARTx USART Instance
<> 139:856d2700e60b 681 * @param Method This parameter can be one of the following values:
<> 139:856d2700e60b 682 * @arg @ref LL_USART_WAKEUP_IDLELINE
<> 139:856d2700e60b 683 * @arg @ref LL_USART_WAKEUP_ADDRESSMARK
<> 139:856d2700e60b 684 * @retval None
<> 139:856d2700e60b 685 */
<> 139:856d2700e60b 686 __STATIC_INLINE void LL_USART_SetWakeUpMethod(USART_TypeDef *USARTx, uint32_t Method)
<> 139:856d2700e60b 687 {
<> 139:856d2700e60b 688 MODIFY_REG(USARTx->CR1, USART_CR1_WAKE, Method);
<> 139:856d2700e60b 689 }
<> 139:856d2700e60b 690
<> 139:856d2700e60b 691 /**
<> 139:856d2700e60b 692 * @brief Return Receiver Wake Up method from Mute mode
<> 139:856d2700e60b 693 * @rmtoll CR1 WAKE LL_USART_GetWakeUpMethod
<> 139:856d2700e60b 694 * @param USARTx USART Instance
<> 139:856d2700e60b 695 * @retval Returned value can be one of the following values:
<> 139:856d2700e60b 696 * @arg @ref LL_USART_WAKEUP_IDLELINE
<> 139:856d2700e60b 697 * @arg @ref LL_USART_WAKEUP_ADDRESSMARK
<> 139:856d2700e60b 698 */
<> 139:856d2700e60b 699 __STATIC_INLINE uint32_t LL_USART_GetWakeUpMethod(USART_TypeDef *USARTx)
<> 139:856d2700e60b 700 {
<> 139:856d2700e60b 701 return (uint32_t)(READ_BIT(USARTx->CR1, USART_CR1_WAKE));
<> 139:856d2700e60b 702 }
<> 139:856d2700e60b 703
<> 139:856d2700e60b 704 /**
<> 139:856d2700e60b 705 * @brief Set Word length (i.e. nb of data bits, excluding start and stop bits)
<> 139:856d2700e60b 706 * @rmtoll CR1 M0 LL_USART_SetDataWidth\n
<> 139:856d2700e60b 707 * CR1 M1 LL_USART_SetDataWidth
<> 139:856d2700e60b 708 * @param USARTx USART Instance
<> 139:856d2700e60b 709 * @param DataWidth This parameter can be one of the following values:
<> 139:856d2700e60b 710 * @arg @ref LL_USART_DATAWIDTH_7B
<> 139:856d2700e60b 711 * @arg @ref LL_USART_DATAWIDTH_8B
<> 139:856d2700e60b 712 * @arg @ref LL_USART_DATAWIDTH_9B
<> 139:856d2700e60b 713 * @retval None
<> 139:856d2700e60b 714 */
<> 139:856d2700e60b 715 __STATIC_INLINE void LL_USART_SetDataWidth(USART_TypeDef *USARTx, uint32_t DataWidth)
<> 139:856d2700e60b 716 {
<> 139:856d2700e60b 717 MODIFY_REG(USARTx->CR1, USART_CR1_M, DataWidth);
<> 139:856d2700e60b 718 }
<> 139:856d2700e60b 719
<> 139:856d2700e60b 720 /**
<> 139:856d2700e60b 721 * @brief Return Word length (i.e. nb of data bits, excluding start and stop bits)
<> 139:856d2700e60b 722 * @rmtoll CR1 M0 LL_USART_GetDataWidth\n
<> 139:856d2700e60b 723 * CR1 M1 LL_USART_GetDataWidth
<> 139:856d2700e60b 724 * @param USARTx USART Instance
<> 139:856d2700e60b 725 * @retval Returned value can be one of the following values:
<> 139:856d2700e60b 726 * @arg @ref LL_USART_DATAWIDTH_7B
<> 139:856d2700e60b 727 * @arg @ref LL_USART_DATAWIDTH_8B
<> 139:856d2700e60b 728 * @arg @ref LL_USART_DATAWIDTH_9B
<> 139:856d2700e60b 729 */
<> 139:856d2700e60b 730 __STATIC_INLINE uint32_t LL_USART_GetDataWidth(USART_TypeDef *USARTx)
<> 139:856d2700e60b 731 {
<> 139:856d2700e60b 732 return (uint32_t)(READ_BIT(USARTx->CR1, USART_CR1_M));
<> 139:856d2700e60b 733 }
<> 139:856d2700e60b 734
<> 139:856d2700e60b 735 /**
<> 139:856d2700e60b 736 * @brief Allow switch between Mute Mode and Active mode
<> 139:856d2700e60b 737 * @rmtoll CR1 MME LL_USART_EnableMuteMode
<> 139:856d2700e60b 738 * @param USARTx USART Instance
<> 139:856d2700e60b 739 * @retval None
<> 139:856d2700e60b 740 */
<> 139:856d2700e60b 741 __STATIC_INLINE void LL_USART_EnableMuteMode(USART_TypeDef *USARTx)
<> 139:856d2700e60b 742 {
<> 139:856d2700e60b 743 SET_BIT(USARTx->CR1, USART_CR1_MME);
<> 139:856d2700e60b 744 }
<> 139:856d2700e60b 745
<> 139:856d2700e60b 746 /**
<> 139:856d2700e60b 747 * @brief Prevent Mute Mode use. Set Receiver in active mode permanently.
<> 139:856d2700e60b 748 * @rmtoll CR1 MME LL_USART_DisableMuteMode
<> 139:856d2700e60b 749 * @param USARTx USART Instance
<> 139:856d2700e60b 750 * @retval None
<> 139:856d2700e60b 751 */
<> 139:856d2700e60b 752 __STATIC_INLINE void LL_USART_DisableMuteMode(USART_TypeDef *USARTx)
<> 139:856d2700e60b 753 {
<> 139:856d2700e60b 754 CLEAR_BIT(USARTx->CR1, USART_CR1_MME);
<> 139:856d2700e60b 755 }
<> 139:856d2700e60b 756
<> 139:856d2700e60b 757 /**
<> 139:856d2700e60b 758 * @brief Indicate if switch between Mute Mode and Active mode is allowed
<> 139:856d2700e60b 759 * @rmtoll CR1 MME LL_USART_IsEnabledMuteMode
<> 139:856d2700e60b 760 * @param USARTx USART Instance
<> 139:856d2700e60b 761 * @retval State of bit (1 or 0).
<> 139:856d2700e60b 762 */
<> 139:856d2700e60b 763 __STATIC_INLINE uint32_t LL_USART_IsEnabledMuteMode(USART_TypeDef *USARTx)
<> 139:856d2700e60b 764 {
<> 139:856d2700e60b 765 return (READ_BIT(USARTx->CR1, USART_CR1_MME) == (USART_CR1_MME));
<> 139:856d2700e60b 766 }
<> 139:856d2700e60b 767
<> 139:856d2700e60b 768 /**
<> 139:856d2700e60b 769 * @brief Set Oversampling to 8-bit or 16-bit mode
<> 139:856d2700e60b 770 * @rmtoll CR1 OVER8 LL_USART_SetOverSampling
<> 139:856d2700e60b 771 * @param USARTx USART Instance
<> 139:856d2700e60b 772 * @param OverSampling This parameter can be one of the following values:
<> 139:856d2700e60b 773 * @arg @ref LL_USART_OVERSAMPLING_16
<> 139:856d2700e60b 774 * @arg @ref LL_USART_OVERSAMPLING_8
<> 139:856d2700e60b 775 * @retval None
<> 139:856d2700e60b 776 */
<> 139:856d2700e60b 777 __STATIC_INLINE void LL_USART_SetOverSampling(USART_TypeDef *USARTx, uint32_t OverSampling)
<> 139:856d2700e60b 778 {
<> 139:856d2700e60b 779 MODIFY_REG(USARTx->CR1, USART_CR1_OVER8, OverSampling);
<> 139:856d2700e60b 780 }
<> 139:856d2700e60b 781
<> 139:856d2700e60b 782 /**
<> 139:856d2700e60b 783 * @brief Return Oversampling mode
<> 139:856d2700e60b 784 * @rmtoll CR1 OVER8 LL_USART_GetOverSampling
<> 139:856d2700e60b 785 * @param USARTx USART Instance
<> 139:856d2700e60b 786 * @retval Returned value can be one of the following values:
<> 139:856d2700e60b 787 * @arg @ref LL_USART_OVERSAMPLING_16
<> 139:856d2700e60b 788 * @arg @ref LL_USART_OVERSAMPLING_8
<> 139:856d2700e60b 789 */
<> 139:856d2700e60b 790 __STATIC_INLINE uint32_t LL_USART_GetOverSampling(USART_TypeDef *USARTx)
<> 139:856d2700e60b 791 {
<> 139:856d2700e60b 792 return (uint32_t)(READ_BIT(USARTx->CR1, USART_CR1_OVER8));
<> 139:856d2700e60b 793 }
<> 139:856d2700e60b 794
<> 139:856d2700e60b 795 /**
<> 139:856d2700e60b 796 * @brief Configure if Clock pulse of the last data bit is output to the SCLK pin or not
<> 139:856d2700e60b 797 * @note Macro @ref IS_USART_INSTANCE(USARTx) can be used to check whether or not
<> 139:856d2700e60b 798 * Synchronous mode is supported by the USARTx instance.
<> 139:856d2700e60b 799 * @rmtoll CR2 LBCL LL_USART_SetLastClkPulseOutput
<> 139:856d2700e60b 800 * @param USARTx USART Instance
<> 139:856d2700e60b 801 * @param LastBitClockPulse This parameter can be one of the following values:
<> 139:856d2700e60b 802 * @arg @ref LL_USART_LASTCLKPULSE_NO_OUTPUT
<> 139:856d2700e60b 803 * @arg @ref LL_USART_LASTCLKPULSE_OUTPUT
<> 139:856d2700e60b 804 * @retval None
<> 139:856d2700e60b 805 */
<> 139:856d2700e60b 806 __STATIC_INLINE void LL_USART_SetLastClkPulseOutput(USART_TypeDef *USARTx, uint32_t LastBitClockPulse)
<> 139:856d2700e60b 807 {
<> 139:856d2700e60b 808 MODIFY_REG(USARTx->CR2, USART_CR2_LBCL, LastBitClockPulse);
<> 139:856d2700e60b 809 }
<> 139:856d2700e60b 810
<> 139:856d2700e60b 811 /**
<> 139:856d2700e60b 812 * @brief Retrieve Clock pulse of the last data bit output configuration
<> 139:856d2700e60b 813 * (Last bit Clock pulse output to the SCLK pin or not)
<> 139:856d2700e60b 814 * @note Macro @ref IS_USART_INSTANCE(USARTx) can be used to check whether or not
<> 139:856d2700e60b 815 * Synchronous mode is supported by the USARTx instance.
<> 139:856d2700e60b 816 * @rmtoll CR2 LBCL LL_USART_GetLastClkPulseOutput
<> 139:856d2700e60b 817 * @param USARTx USART Instance
<> 139:856d2700e60b 818 * @retval Returned value can be one of the following values:
<> 139:856d2700e60b 819 * @arg @ref LL_USART_LASTCLKPULSE_NO_OUTPUT
<> 139:856d2700e60b 820 * @arg @ref LL_USART_LASTCLKPULSE_OUTPUT
<> 139:856d2700e60b 821 */
<> 139:856d2700e60b 822 __STATIC_INLINE uint32_t LL_USART_GetLastClkPulseOutput(USART_TypeDef *USARTx)
<> 139:856d2700e60b 823 {
<> 139:856d2700e60b 824 return (uint32_t)(READ_BIT(USARTx->CR2, USART_CR2_LBCL));
<> 139:856d2700e60b 825 }
<> 139:856d2700e60b 826
<> 139:856d2700e60b 827 /**
<> 139:856d2700e60b 828 * @brief Select the phase of the clock output on the SCLK pin in synchronous mode
<> 139:856d2700e60b 829 * @note Macro @ref IS_USART_INSTANCE(USARTx) can be used to check whether or not
<> 139:856d2700e60b 830 * Synchronous mode is supported by the USARTx instance.
<> 139:856d2700e60b 831 * @rmtoll CR2 CPHA LL_USART_SetClockPhase
<> 139:856d2700e60b 832 * @param USARTx USART Instance
<> 139:856d2700e60b 833 * @param ClockPhase This parameter can be one of the following values:
<> 139:856d2700e60b 834 * @arg @ref LL_USART_PHASE_1EDGE
<> 139:856d2700e60b 835 * @arg @ref LL_USART_PHASE_2EDGE
<> 139:856d2700e60b 836 * @retval None
<> 139:856d2700e60b 837 */
<> 139:856d2700e60b 838 __STATIC_INLINE void LL_USART_SetClockPhase(USART_TypeDef *USARTx, uint32_t ClockPhase)
<> 139:856d2700e60b 839 {
<> 139:856d2700e60b 840 MODIFY_REG(USARTx->CR2, USART_CR2_CPHA, ClockPhase);
<> 139:856d2700e60b 841 }
<> 139:856d2700e60b 842
<> 139:856d2700e60b 843 /**
<> 139:856d2700e60b 844 * @brief Return phase of the clock output on the SCLK pin in synchronous mode
<> 139:856d2700e60b 845 * @note Macro @ref IS_USART_INSTANCE(USARTx) can be used to check whether or not
<> 139:856d2700e60b 846 * Synchronous mode is supported by the USARTx instance.
<> 139:856d2700e60b 847 * @rmtoll CR2 CPHA LL_USART_GetClockPhase
<> 139:856d2700e60b 848 * @param USARTx USART Instance
<> 139:856d2700e60b 849 * @retval Returned value can be one of the following values:
<> 139:856d2700e60b 850 * @arg @ref LL_USART_PHASE_1EDGE
<> 139:856d2700e60b 851 * @arg @ref LL_USART_PHASE_2EDGE
<> 139:856d2700e60b 852 */
<> 139:856d2700e60b 853 __STATIC_INLINE uint32_t LL_USART_GetClockPhase(USART_TypeDef *USARTx)
<> 139:856d2700e60b 854 {
<> 139:856d2700e60b 855 return (uint32_t)(READ_BIT(USARTx->CR2, USART_CR2_CPHA));
<> 139:856d2700e60b 856 }
<> 139:856d2700e60b 857
<> 139:856d2700e60b 858 /**
<> 139:856d2700e60b 859 * @brief Select the polarity of the clock output on the SCLK pin in synchronous mode
<> 139:856d2700e60b 860 * @note Macro @ref IS_USART_INSTANCE(USARTx) can be used to check whether or not
<> 139:856d2700e60b 861 * Synchronous mode is supported by the USARTx instance.
<> 139:856d2700e60b 862 * @rmtoll CR2 CPOL LL_USART_SetClockPolarity
<> 139:856d2700e60b 863 * @param USARTx USART Instance
<> 139:856d2700e60b 864 * @param ClockPolarity This parameter can be one of the following values:
<> 139:856d2700e60b 865 * @arg @ref LL_USART_POLARITY_LOW
<> 139:856d2700e60b 866 * @arg @ref LL_USART_POLARITY_HIGH
<> 139:856d2700e60b 867 * @retval None
<> 139:856d2700e60b 868 */
<> 139:856d2700e60b 869 __STATIC_INLINE void LL_USART_SetClockPolarity(USART_TypeDef *USARTx, uint32_t ClockPolarity)
<> 139:856d2700e60b 870 {
<> 139:856d2700e60b 871 MODIFY_REG(USARTx->CR2, USART_CR2_CPOL, ClockPolarity);
<> 139:856d2700e60b 872 }
<> 139:856d2700e60b 873
<> 139:856d2700e60b 874 /**
<> 139:856d2700e60b 875 * @brief Return polarity of the clock output on the SCLK pin in synchronous mode
<> 139:856d2700e60b 876 * @note Macro @ref IS_USART_INSTANCE(USARTx) can be used to check whether or not
<> 139:856d2700e60b 877 * Synchronous mode is supported by the USARTx instance.
<> 139:856d2700e60b 878 * @rmtoll CR2 CPOL LL_USART_GetClockPolarity
<> 139:856d2700e60b 879 * @param USARTx USART Instance
<> 139:856d2700e60b 880 * @retval Returned value can be one of the following values:
<> 139:856d2700e60b 881 * @arg @ref LL_USART_POLARITY_LOW
<> 139:856d2700e60b 882 * @arg @ref LL_USART_POLARITY_HIGH
<> 139:856d2700e60b 883 */
<> 139:856d2700e60b 884 __STATIC_INLINE uint32_t LL_USART_GetClockPolarity(USART_TypeDef *USARTx)
<> 139:856d2700e60b 885 {
<> 139:856d2700e60b 886 return (uint32_t)(READ_BIT(USARTx->CR2, USART_CR2_CPOL));
<> 139:856d2700e60b 887 }
<> 139:856d2700e60b 888
<> 139:856d2700e60b 889 /**
<> 139:856d2700e60b 890 * @brief Configure Clock signal format (Phase Polarity and choice about output of last bit clock pulse)
<> 139:856d2700e60b 891 * @note Macro @ref IS_USART_INSTANCE(USARTx) can be used to check whether or not
<> 139:856d2700e60b 892 * Synchronous mode is supported by the USARTx instance.
<> 139:856d2700e60b 893 * @note Call of this function is equivalent to following function call sequence :
<> 139:856d2700e60b 894 * - Clock Phase configuration using @ref LL_USART_SetClockPhase() function
<> 139:856d2700e60b 895 * - Clock Polarity configuration using @ref LL_USART_SetClockPolarity() function
<> 139:856d2700e60b 896 * - Output of Last bit Clock pulse configuration using @ref LL_USART_SetLastClkPulseOutput() function
<> 139:856d2700e60b 897 * @rmtoll CR2 CPHA LL_USART_ConfigClock\n
<> 139:856d2700e60b 898 * CR2 CPOL LL_USART_ConfigClock\n
<> 139:856d2700e60b 899 * CR2 LBCL LL_USART_ConfigClock
<> 139:856d2700e60b 900 * @param USARTx USART Instance
<> 139:856d2700e60b 901 * @param Phase This parameter can be one of the following values:
<> 139:856d2700e60b 902 * @arg @ref LL_USART_PHASE_1EDGE
<> 139:856d2700e60b 903 * @arg @ref LL_USART_PHASE_2EDGE
<> 139:856d2700e60b 904 * @param Polarity This parameter can be one of the following values:
<> 139:856d2700e60b 905 * @arg @ref LL_USART_POLARITY_LOW
<> 139:856d2700e60b 906 * @arg @ref LL_USART_POLARITY_HIGH
<> 139:856d2700e60b 907 * @param LBCPOutput This parameter can be one of the following values:
<> 139:856d2700e60b 908 * @arg @ref LL_USART_LASTCLKPULSE_NO_OUTPUT
<> 139:856d2700e60b 909 * @arg @ref LL_USART_LASTCLKPULSE_OUTPUT
<> 139:856d2700e60b 910 * @retval None
<> 139:856d2700e60b 911 */
<> 139:856d2700e60b 912 __STATIC_INLINE void LL_USART_ConfigClock(USART_TypeDef *USARTx, uint32_t Phase, uint32_t Polarity, uint32_t LBCPOutput)
<> 139:856d2700e60b 913 {
<> 139:856d2700e60b 914 MODIFY_REG(USARTx->CR2, USART_CR2_CPHA | USART_CR2_CPOL | USART_CR2_LBCL, Phase | Polarity | LBCPOutput);
<> 139:856d2700e60b 915 }
<> 139:856d2700e60b 916
<> 139:856d2700e60b 917 /**
<> 139:856d2700e60b 918 * @brief Enable Clock output on SCLK pin
<> 139:856d2700e60b 919 * @note Macro @ref IS_USART_INSTANCE(USARTx) can be used to check whether or not
<> 139:856d2700e60b 920 * Synchronous mode is supported by the USARTx instance.
<> 139:856d2700e60b 921 * @rmtoll CR2 CLKEN LL_USART_EnableSCLKOutput
<> 139:856d2700e60b 922 * @param USARTx USART Instance
<> 139:856d2700e60b 923 * @retval None
<> 139:856d2700e60b 924 */
<> 139:856d2700e60b 925 __STATIC_INLINE void LL_USART_EnableSCLKOutput(USART_TypeDef *USARTx)
<> 139:856d2700e60b 926 {
<> 139:856d2700e60b 927 SET_BIT(USARTx->CR2, USART_CR2_CLKEN);
<> 139:856d2700e60b 928 }
<> 139:856d2700e60b 929
<> 139:856d2700e60b 930 /**
<> 139:856d2700e60b 931 * @brief Disable Clock output on SCLK pin
<> 139:856d2700e60b 932 * @note Macro @ref IS_USART_INSTANCE(USARTx) can be used to check whether or not
<> 139:856d2700e60b 933 * Synchronous mode is supported by the USARTx instance.
<> 139:856d2700e60b 934 * @rmtoll CR2 CLKEN LL_USART_DisableSCLKOutput
<> 139:856d2700e60b 935 * @param USARTx USART Instance
<> 139:856d2700e60b 936 * @retval None
<> 139:856d2700e60b 937 */
<> 139:856d2700e60b 938 __STATIC_INLINE void LL_USART_DisableSCLKOutput(USART_TypeDef *USARTx)
<> 139:856d2700e60b 939 {
<> 139:856d2700e60b 940 CLEAR_BIT(USARTx->CR2, USART_CR2_CLKEN);
<> 139:856d2700e60b 941 }
<> 139:856d2700e60b 942
<> 139:856d2700e60b 943 /**
<> 139:856d2700e60b 944 * @brief Indicate if Clock output on SCLK pin is enabled
<> 139:856d2700e60b 945 * @note Macro @ref IS_USART_INSTANCE(USARTx) can be used to check whether or not
<> 139:856d2700e60b 946 * Synchronous mode is supported by the USARTx instance.
<> 139:856d2700e60b 947 * @rmtoll CR2 CLKEN LL_USART_IsEnabledSCLKOutput
<> 139:856d2700e60b 948 * @param USARTx USART Instance
<> 139:856d2700e60b 949 * @retval State of bit (1 or 0).
<> 139:856d2700e60b 950 */
<> 139:856d2700e60b 951 __STATIC_INLINE uint32_t LL_USART_IsEnabledSCLKOutput(USART_TypeDef *USARTx)
<> 139:856d2700e60b 952 {
<> 139:856d2700e60b 953 return (READ_BIT(USARTx->CR2, USART_CR2_CLKEN) == (USART_CR2_CLKEN));
<> 139:856d2700e60b 954 }
<> 139:856d2700e60b 955
<> 139:856d2700e60b 956 /**
<> 139:856d2700e60b 957 * @brief Set the length of the stop bits
<> 139:856d2700e60b 958 * @rmtoll CR2 STOP LL_USART_SetStopBitsLength
<> 139:856d2700e60b 959 * @param USARTx USART Instance
<> 139:856d2700e60b 960 * @param StopBits This parameter can be one of the following values:
<> 139:856d2700e60b 961 * @arg @ref LL_USART_STOPBITS_0_5
<> 139:856d2700e60b 962 * @arg @ref LL_USART_STOPBITS_1
<> 139:856d2700e60b 963 * @arg @ref LL_USART_STOPBITS_1_5
<> 139:856d2700e60b 964 * @arg @ref LL_USART_STOPBITS_2
<> 139:856d2700e60b 965 * @retval None
<> 139:856d2700e60b 966 */
<> 139:856d2700e60b 967 __STATIC_INLINE void LL_USART_SetStopBitsLength(USART_TypeDef *USARTx, uint32_t StopBits)
<> 139:856d2700e60b 968 {
<> 139:856d2700e60b 969 MODIFY_REG(USARTx->CR2, USART_CR2_STOP, StopBits);
<> 139:856d2700e60b 970 }
<> 139:856d2700e60b 971
<> 139:856d2700e60b 972 /**
<> 139:856d2700e60b 973 * @brief Retrieve the length of the stop bits
<> 139:856d2700e60b 974 * @rmtoll CR2 STOP LL_USART_GetStopBitsLength
<> 139:856d2700e60b 975 * @param USARTx USART Instance
<> 139:856d2700e60b 976 * @retval Returned value can be one of the following values:
<> 139:856d2700e60b 977 * @arg @ref LL_USART_STOPBITS_0_5
<> 139:856d2700e60b 978 * @arg @ref LL_USART_STOPBITS_1
<> 139:856d2700e60b 979 * @arg @ref LL_USART_STOPBITS_1_5
<> 139:856d2700e60b 980 * @arg @ref LL_USART_STOPBITS_2
<> 139:856d2700e60b 981 */
<> 139:856d2700e60b 982 __STATIC_INLINE uint32_t LL_USART_GetStopBitsLength(USART_TypeDef *USARTx)
<> 139:856d2700e60b 983 {
<> 139:856d2700e60b 984 return (uint32_t)(READ_BIT(USARTx->CR2, USART_CR2_STOP));
<> 139:856d2700e60b 985 }
<> 139:856d2700e60b 986
<> 139:856d2700e60b 987 /**
<> 139:856d2700e60b 988 * @brief Configure Character frame format (Datawidth, Parity control, Stop Bits)
<> 139:856d2700e60b 989 * @note Call of this function is equivalent to following function call sequence :
<> 139:856d2700e60b 990 * - Data Width configuration using @ref LL_USART_SetDataWidth() function
<> 139:856d2700e60b 991 * - Parity Control and mode configuration using @ref LL_USART_SetParity() function
<> 139:856d2700e60b 992 * - Stop bits configuration using @ref LL_USART_SetStopBitsLength() function
<> 139:856d2700e60b 993 * @rmtoll CR1 PS LL_USART_ConfigCharacter\n
<> 139:856d2700e60b 994 * CR1 PCE LL_USART_ConfigCharacter\n
<> 139:856d2700e60b 995 * CR1 M0 LL_USART_ConfigCharacter\n
<> 139:856d2700e60b 996 * CR1 M1 LL_USART_ConfigCharacter\n
<> 139:856d2700e60b 997 * CR2 STOP LL_USART_ConfigCharacter
<> 139:856d2700e60b 998 * @param USARTx USART Instance
<> 139:856d2700e60b 999 * @param DataWidth This parameter can be one of the following values:
<> 139:856d2700e60b 1000 * @arg @ref LL_USART_DATAWIDTH_7B
<> 139:856d2700e60b 1001 * @arg @ref LL_USART_DATAWIDTH_8B
<> 139:856d2700e60b 1002 * @arg @ref LL_USART_DATAWIDTH_9B
<> 139:856d2700e60b 1003 * @param Parity This parameter can be one of the following values:
<> 139:856d2700e60b 1004 * @arg @ref LL_USART_PARITY_NONE
<> 139:856d2700e60b 1005 * @arg @ref LL_USART_PARITY_EVEN
<> 139:856d2700e60b 1006 * @arg @ref LL_USART_PARITY_ODD
<> 139:856d2700e60b 1007 * @param StopBits This parameter can be one of the following values:
<> 139:856d2700e60b 1008 * @arg @ref LL_USART_STOPBITS_0_5
<> 139:856d2700e60b 1009 * @arg @ref LL_USART_STOPBITS_1
<> 139:856d2700e60b 1010 * @arg @ref LL_USART_STOPBITS_1_5
<> 139:856d2700e60b 1011 * @arg @ref LL_USART_STOPBITS_2
<> 139:856d2700e60b 1012 * @retval None
<> 139:856d2700e60b 1013 */
<> 139:856d2700e60b 1014 __STATIC_INLINE void LL_USART_ConfigCharacter(USART_TypeDef *USARTx, uint32_t DataWidth, uint32_t Parity,
<> 139:856d2700e60b 1015 uint32_t StopBits)
<> 139:856d2700e60b 1016 {
<> 139:856d2700e60b 1017 MODIFY_REG(USARTx->CR1, USART_CR1_PS | USART_CR1_PCE | USART_CR1_M, Parity | DataWidth);
<> 139:856d2700e60b 1018 MODIFY_REG(USARTx->CR2, USART_CR2_STOP, StopBits);
<> 139:856d2700e60b 1019 }
<> 139:856d2700e60b 1020
<> 139:856d2700e60b 1021 /**
<> 139:856d2700e60b 1022 * @brief Configure TX/RX pins swapping setting.
<> 139:856d2700e60b 1023 * @rmtoll CR2 SWAP LL_USART_SetTXRXSwap
<> 139:856d2700e60b 1024 * @param USARTx USART Instance
<> 139:856d2700e60b 1025 * @param SwapConfig This parameter can be one of the following values:
<> 139:856d2700e60b 1026 * @arg @ref LL_USART_TXRX_STANDARD
<> 139:856d2700e60b 1027 * @arg @ref LL_USART_TXRX_SWAPPED
<> 139:856d2700e60b 1028 * @retval None
<> 139:856d2700e60b 1029 */
<> 139:856d2700e60b 1030 __STATIC_INLINE void LL_USART_SetTXRXSwap(USART_TypeDef *USARTx, uint32_t SwapConfig)
<> 139:856d2700e60b 1031 {
<> 139:856d2700e60b 1032 MODIFY_REG(USARTx->CR2, USART_CR2_SWAP, SwapConfig);
<> 139:856d2700e60b 1033 }
<> 139:856d2700e60b 1034
<> 139:856d2700e60b 1035 /**
<> 139:856d2700e60b 1036 * @brief Retrieve TX/RX pins swapping configuration.
<> 139:856d2700e60b 1037 * @rmtoll CR2 SWAP LL_USART_GetTXRXSwap
<> 139:856d2700e60b 1038 * @param USARTx USART Instance
<> 139:856d2700e60b 1039 * @retval Returned value can be one of the following values:
<> 139:856d2700e60b 1040 * @arg @ref LL_USART_TXRX_STANDARD
<> 139:856d2700e60b 1041 * @arg @ref LL_USART_TXRX_SWAPPED
<> 139:856d2700e60b 1042 */
<> 139:856d2700e60b 1043 __STATIC_INLINE uint32_t LL_USART_GetTXRXSwap(USART_TypeDef *USARTx)
<> 139:856d2700e60b 1044 {
<> 139:856d2700e60b 1045 return (uint32_t)(READ_BIT(USARTx->CR2, USART_CR2_SWAP));
<> 139:856d2700e60b 1046 }
<> 139:856d2700e60b 1047
<> 139:856d2700e60b 1048 /**
<> 139:856d2700e60b 1049 * @brief Configure RX pin active level logic
<> 139:856d2700e60b 1050 * @rmtoll CR2 RXINV LL_USART_SetRXPinLevel
<> 139:856d2700e60b 1051 * @param USARTx USART Instance
<> 139:856d2700e60b 1052 * @param PinInvMethod This parameter can be one of the following values:
<> 139:856d2700e60b 1053 * @arg @ref LL_USART_RXPIN_LEVEL_STANDARD
<> 139:856d2700e60b 1054 * @arg @ref LL_USART_RXPIN_LEVEL_INVERTED
<> 139:856d2700e60b 1055 * @retval None
<> 139:856d2700e60b 1056 */
<> 139:856d2700e60b 1057 __STATIC_INLINE void LL_USART_SetRXPinLevel(USART_TypeDef *USARTx, uint32_t PinInvMethod)
<> 139:856d2700e60b 1058 {
<> 139:856d2700e60b 1059 MODIFY_REG(USARTx->CR2, USART_CR2_RXINV, PinInvMethod);
<> 139:856d2700e60b 1060 }
<> 139:856d2700e60b 1061
<> 139:856d2700e60b 1062 /**
<> 139:856d2700e60b 1063 * @brief Retrieve RX pin active level logic configuration
<> 139:856d2700e60b 1064 * @rmtoll CR2 RXINV LL_USART_GetRXPinLevel
<> 139:856d2700e60b 1065 * @param USARTx USART Instance
<> 139:856d2700e60b 1066 * @retval Returned value can be one of the following values:
<> 139:856d2700e60b 1067 * @arg @ref LL_USART_RXPIN_LEVEL_STANDARD
<> 139:856d2700e60b 1068 * @arg @ref LL_USART_RXPIN_LEVEL_INVERTED
<> 139:856d2700e60b 1069 */
<> 139:856d2700e60b 1070 __STATIC_INLINE uint32_t LL_USART_GetRXPinLevel(USART_TypeDef *USARTx)
<> 139:856d2700e60b 1071 {
<> 139:856d2700e60b 1072 return (uint32_t)(READ_BIT(USARTx->CR2, USART_CR2_RXINV));
<> 139:856d2700e60b 1073 }
<> 139:856d2700e60b 1074
<> 139:856d2700e60b 1075 /**
<> 139:856d2700e60b 1076 * @brief Configure TX pin active level logic
<> 139:856d2700e60b 1077 * @rmtoll CR2 TXINV LL_USART_SetTXPinLevel
<> 139:856d2700e60b 1078 * @param USARTx USART Instance
<> 139:856d2700e60b 1079 * @param PinInvMethod This parameter can be one of the following values:
<> 139:856d2700e60b 1080 * @arg @ref LL_USART_TXPIN_LEVEL_STANDARD
<> 139:856d2700e60b 1081 * @arg @ref LL_USART_TXPIN_LEVEL_INVERTED
<> 139:856d2700e60b 1082 * @retval None
<> 139:856d2700e60b 1083 */
<> 139:856d2700e60b 1084 __STATIC_INLINE void LL_USART_SetTXPinLevel(USART_TypeDef *USARTx, uint32_t PinInvMethod)
<> 139:856d2700e60b 1085 {
<> 139:856d2700e60b 1086 MODIFY_REG(USARTx->CR2, USART_CR2_TXINV, PinInvMethod);
<> 139:856d2700e60b 1087 }
<> 139:856d2700e60b 1088
<> 139:856d2700e60b 1089 /**
<> 139:856d2700e60b 1090 * @brief Retrieve TX pin active level logic configuration
<> 139:856d2700e60b 1091 * @rmtoll CR2 TXINV LL_USART_GetTXPinLevel
<> 139:856d2700e60b 1092 * @param USARTx USART Instance
<> 139:856d2700e60b 1093 * @retval Returned value can be one of the following values:
<> 139:856d2700e60b 1094 * @arg @ref LL_USART_TXPIN_LEVEL_STANDARD
<> 139:856d2700e60b 1095 * @arg @ref LL_USART_TXPIN_LEVEL_INVERTED
<> 139:856d2700e60b 1096 */
<> 139:856d2700e60b 1097 __STATIC_INLINE uint32_t LL_USART_GetTXPinLevel(USART_TypeDef *USARTx)
<> 139:856d2700e60b 1098 {
<> 139:856d2700e60b 1099 return (uint32_t)(READ_BIT(USARTx->CR2, USART_CR2_TXINV));
<> 139:856d2700e60b 1100 }
<> 139:856d2700e60b 1101
<> 139:856d2700e60b 1102 /**
<> 139:856d2700e60b 1103 * @brief Configure Binary data logic.
<> 139:856d2700e60b 1104 * @note Allow to define how Logical data from the data register are send/received :
<> 139:856d2700e60b 1105 * either in positive/direct logic (1=H, 0=L) or in negative/inverse logic (1=L, 0=H)
<> 139:856d2700e60b 1106 * @rmtoll CR2 DATAINV LL_USART_SetBinaryDataLogic
<> 139:856d2700e60b 1107 * @param USARTx USART Instance
<> 139:856d2700e60b 1108 * @param DataLogic This parameter can be one of the following values:
<> 139:856d2700e60b 1109 * @arg @ref LL_USART_BINARY_LOGIC_POSITIVE
<> 139:856d2700e60b 1110 * @arg @ref LL_USART_BINARY_LOGIC_NEGATIVE
<> 139:856d2700e60b 1111 * @retval None
<> 139:856d2700e60b 1112 */
<> 139:856d2700e60b 1113 __STATIC_INLINE void LL_USART_SetBinaryDataLogic(USART_TypeDef *USARTx, uint32_t DataLogic)
<> 139:856d2700e60b 1114 {
<> 139:856d2700e60b 1115 MODIFY_REG(USARTx->CR2, USART_CR2_DATAINV, DataLogic);
<> 139:856d2700e60b 1116 }
<> 139:856d2700e60b 1117
<> 139:856d2700e60b 1118 /**
<> 139:856d2700e60b 1119 * @brief Retrieve Binary data configuration
<> 139:856d2700e60b 1120 * @rmtoll CR2 DATAINV LL_USART_GetBinaryDataLogic
<> 139:856d2700e60b 1121 * @param USARTx USART Instance
<> 139:856d2700e60b 1122 * @retval Returned value can be one of the following values:
<> 139:856d2700e60b 1123 * @arg @ref LL_USART_BINARY_LOGIC_POSITIVE
<> 139:856d2700e60b 1124 * @arg @ref LL_USART_BINARY_LOGIC_NEGATIVE
<> 139:856d2700e60b 1125 */
<> 139:856d2700e60b 1126 __STATIC_INLINE uint32_t LL_USART_GetBinaryDataLogic(USART_TypeDef *USARTx)
<> 139:856d2700e60b 1127 {
<> 139:856d2700e60b 1128 return (uint32_t)(READ_BIT(USARTx->CR2, USART_CR2_DATAINV));
<> 139:856d2700e60b 1129 }
<> 139:856d2700e60b 1130
<> 139:856d2700e60b 1131 /**
<> 139:856d2700e60b 1132 * @brief Configure transfer bit order (either Less or Most Significant Bit First)
<> 139:856d2700e60b 1133 * @note MSB First means data is transmitted/received with the MSB first, following the start bit.
<> 139:856d2700e60b 1134 * LSB First means data is transmitted/received with data bit 0 first, following the start bit.
<> 139:856d2700e60b 1135 * @rmtoll CR2 MSBFIRST LL_USART_SetTransferBitOrder
<> 139:856d2700e60b 1136 * @param USARTx USART Instance
<> 139:856d2700e60b 1137 * @param BitOrder This parameter can be one of the following values:
<> 139:856d2700e60b 1138 * @arg @ref LL_USART_BITORDER_LSBFIRST
<> 139:856d2700e60b 1139 * @arg @ref LL_USART_BITORDER_MSBFIRST
<> 139:856d2700e60b 1140 * @retval None
<> 139:856d2700e60b 1141 */
<> 139:856d2700e60b 1142 __STATIC_INLINE void LL_USART_SetTransferBitOrder(USART_TypeDef *USARTx, uint32_t BitOrder)
<> 139:856d2700e60b 1143 {
<> 139:856d2700e60b 1144 MODIFY_REG(USARTx->CR2, USART_CR2_MSBFIRST, BitOrder);
<> 139:856d2700e60b 1145 }
<> 139:856d2700e60b 1146
<> 139:856d2700e60b 1147 /**
<> 139:856d2700e60b 1148 * @brief Return transfer bit order (either Less or Most Significant Bit First)
<> 139:856d2700e60b 1149 * @note MSB First means data is transmitted/received with the MSB first, following the start bit.
<> 139:856d2700e60b 1150 * LSB First means data is transmitted/received with data bit 0 first, following the start bit.
<> 139:856d2700e60b 1151 * @rmtoll CR2 MSBFIRST LL_USART_GetTransferBitOrder
<> 139:856d2700e60b 1152 * @param USARTx USART Instance
<> 139:856d2700e60b 1153 * @retval Returned value can be one of the following values:
<> 139:856d2700e60b 1154 * @arg @ref LL_USART_BITORDER_LSBFIRST
<> 139:856d2700e60b 1155 * @arg @ref LL_USART_BITORDER_MSBFIRST
<> 139:856d2700e60b 1156 */
<> 139:856d2700e60b 1157 __STATIC_INLINE uint32_t LL_USART_GetTransferBitOrder(USART_TypeDef *USARTx)
<> 139:856d2700e60b 1158 {
<> 139:856d2700e60b 1159 return (uint32_t)(READ_BIT(USARTx->CR2, USART_CR2_MSBFIRST));
<> 139:856d2700e60b 1160 }
<> 139:856d2700e60b 1161
<> 139:856d2700e60b 1162 /**
<> 139:856d2700e60b 1163 * @brief Enable Auto Baud-Rate Detection
<> 139:856d2700e60b 1164 * @note Macro @ref IS_USART_AUTOBAUDRATE_DETECTION_INSTANCE(USARTx) can be used to check whether or not
<> 139:856d2700e60b 1165 * Auto Baud Rate detection feature is supported by the USARTx instance.
<> 139:856d2700e60b 1166 * @rmtoll CR2 ABREN LL_USART_EnableAutoBaudRate
<> 139:856d2700e60b 1167 * @param USARTx USART Instance
<> 139:856d2700e60b 1168 * @retval None
<> 139:856d2700e60b 1169 */
<> 139:856d2700e60b 1170 __STATIC_INLINE void LL_USART_EnableAutoBaudRate(USART_TypeDef *USARTx)
<> 139:856d2700e60b 1171 {
<> 139:856d2700e60b 1172 SET_BIT(USARTx->CR2, USART_CR2_ABREN);
<> 139:856d2700e60b 1173 }
<> 139:856d2700e60b 1174
<> 139:856d2700e60b 1175 /**
<> 139:856d2700e60b 1176 * @brief Disable Auto Baud-Rate Detection
<> 139:856d2700e60b 1177 * @note Macro @ref IS_USART_AUTOBAUDRATE_DETECTION_INSTANCE(USARTx) can be used to check whether or not
<> 139:856d2700e60b 1178 * Auto Baud Rate detection feature is supported by the USARTx instance.
<> 139:856d2700e60b 1179 * @rmtoll CR2 ABREN LL_USART_DisableAutoBaudRate
<> 139:856d2700e60b 1180 * @param USARTx USART Instance
<> 139:856d2700e60b 1181 * @retval None
<> 139:856d2700e60b 1182 */
<> 139:856d2700e60b 1183 __STATIC_INLINE void LL_USART_DisableAutoBaudRate(USART_TypeDef *USARTx)
<> 139:856d2700e60b 1184 {
<> 139:856d2700e60b 1185 CLEAR_BIT(USARTx->CR2, USART_CR2_ABREN);
<> 139:856d2700e60b 1186 }
<> 139:856d2700e60b 1187
<> 139:856d2700e60b 1188 /**
<> 139:856d2700e60b 1189 * @brief Indicate if Auto Baud-Rate Detection mechanism is enabled
<> 139:856d2700e60b 1190 * @note Macro @ref IS_USART_AUTOBAUDRATE_DETECTION_INSTANCE(USARTx) can be used to check whether or not
<> 139:856d2700e60b 1191 * Auto Baud Rate detection feature is supported by the USARTx instance.
<> 139:856d2700e60b 1192 * @rmtoll CR2 ABREN LL_USART_IsEnabledAutoBaud
<> 139:856d2700e60b 1193 * @param USARTx USART Instance
<> 139:856d2700e60b 1194 * @retval State of bit (1 or 0).
<> 139:856d2700e60b 1195 */
<> 139:856d2700e60b 1196 __STATIC_INLINE uint32_t LL_USART_IsEnabledAutoBaud(USART_TypeDef *USARTx)
<> 139:856d2700e60b 1197 {
<> 139:856d2700e60b 1198 return (READ_BIT(USARTx->CR2, USART_CR2_ABREN) == (USART_CR2_ABREN));
<> 139:856d2700e60b 1199 }
<> 139:856d2700e60b 1200
<> 139:856d2700e60b 1201 /**
<> 139:856d2700e60b 1202 * @brief Set Auto Baud-Rate mode bits
<> 139:856d2700e60b 1203 * @note Macro @ref IS_USART_AUTOBAUDRATE_DETECTION_INSTANCE(USARTx) can be used to check whether or not
<> 139:856d2700e60b 1204 * Auto Baud Rate detection feature is supported by the USARTx instance.
<> 139:856d2700e60b 1205 * @rmtoll CR2 ABRMODE LL_USART_SetAutoBaudRateMode
<> 139:856d2700e60b 1206 * @param USARTx USART Instance
<> 139:856d2700e60b 1207 * @param AutoBaudRateMode This parameter can be one of the following values:
<> 139:856d2700e60b 1208 * @arg @ref LL_USART_AUTOBAUD_DETECT_ON_STARTBIT
<> 139:856d2700e60b 1209 * @arg @ref LL_USART_AUTOBAUD_DETECT_ON_FALLINGEDGE
<> 139:856d2700e60b 1210 * @arg @ref LL_USART_AUTOBAUD_DETECT_ON_7F_FRAME
<> 139:856d2700e60b 1211 * @arg @ref LL_USART_AUTOBAUD_DETECT_ON_55_FRAME
<> 139:856d2700e60b 1212 * @retval None
<> 139:856d2700e60b 1213 */
<> 139:856d2700e60b 1214 __STATIC_INLINE void LL_USART_SetAutoBaudRateMode(USART_TypeDef *USARTx, uint32_t AutoBaudRateMode)
<> 139:856d2700e60b 1215 {
<> 139:856d2700e60b 1216 MODIFY_REG(USARTx->CR2, USART_CR2_ABRMODE, AutoBaudRateMode);
<> 139:856d2700e60b 1217 }
<> 139:856d2700e60b 1218
<> 139:856d2700e60b 1219 /**
<> 139:856d2700e60b 1220 * @brief Return Auto Baud-Rate mode
<> 139:856d2700e60b 1221 * @note Macro @ref IS_USART_AUTOBAUDRATE_DETECTION_INSTANCE(USARTx) can be used to check whether or not
<> 139:856d2700e60b 1222 * Auto Baud Rate detection feature is supported by the USARTx instance.
<> 139:856d2700e60b 1223 * @rmtoll CR2 ABRMODE LL_USART_GetAutoBaudRateMode
<> 139:856d2700e60b 1224 * @param USARTx USART Instance
<> 139:856d2700e60b 1225 * @retval Returned value can be one of the following values:
<> 139:856d2700e60b 1226 * @arg @ref LL_USART_AUTOBAUD_DETECT_ON_STARTBIT
<> 139:856d2700e60b 1227 * @arg @ref LL_USART_AUTOBAUD_DETECT_ON_FALLINGEDGE
<> 139:856d2700e60b 1228 * @arg @ref LL_USART_AUTOBAUD_DETECT_ON_7F_FRAME
<> 139:856d2700e60b 1229 * @arg @ref LL_USART_AUTOBAUD_DETECT_ON_55_FRAME
<> 139:856d2700e60b 1230 */
<> 139:856d2700e60b 1231 __STATIC_INLINE uint32_t LL_USART_GetAutoBaudRateMode(USART_TypeDef *USARTx)
<> 139:856d2700e60b 1232 {
<> 139:856d2700e60b 1233 return (uint32_t)(READ_BIT(USARTx->CR2, USART_CR2_ABRMODE));
<> 139:856d2700e60b 1234 }
<> 139:856d2700e60b 1235
<> 139:856d2700e60b 1236 /**
<> 139:856d2700e60b 1237 * @brief Enable Receiver Timeout
<> 139:856d2700e60b 1238 * @rmtoll CR2 RTOEN LL_USART_EnableRxTimeout
<> 139:856d2700e60b 1239 * @param USARTx USART Instance
<> 139:856d2700e60b 1240 * @retval None
<> 139:856d2700e60b 1241 */
<> 139:856d2700e60b 1242 __STATIC_INLINE void LL_USART_EnableRxTimeout(USART_TypeDef *USARTx)
<> 139:856d2700e60b 1243 {
<> 139:856d2700e60b 1244 SET_BIT(USARTx->CR2, USART_CR2_RTOEN);
<> 139:856d2700e60b 1245 }
<> 139:856d2700e60b 1246
<> 139:856d2700e60b 1247 /**
<> 139:856d2700e60b 1248 * @brief Disable Receiver Timeout
<> 139:856d2700e60b 1249 * @rmtoll CR2 RTOEN LL_USART_DisableRxTimeout
<> 139:856d2700e60b 1250 * @param USARTx USART Instance
<> 139:856d2700e60b 1251 * @retval None
<> 139:856d2700e60b 1252 */
<> 139:856d2700e60b 1253 __STATIC_INLINE void LL_USART_DisableRxTimeout(USART_TypeDef *USARTx)
<> 139:856d2700e60b 1254 {
<> 139:856d2700e60b 1255 CLEAR_BIT(USARTx->CR2, USART_CR2_RTOEN);
<> 139:856d2700e60b 1256 }
<> 139:856d2700e60b 1257
<> 139:856d2700e60b 1258 /**
<> 139:856d2700e60b 1259 * @brief Indicate if Receiver Timeout feature is enabled
<> 139:856d2700e60b 1260 * @rmtoll CR2 RTOEN LL_USART_IsEnabledRxTimeout
<> 139:856d2700e60b 1261 * @param USARTx USART Instance
<> 139:856d2700e60b 1262 * @retval State of bit (1 or 0).
<> 139:856d2700e60b 1263 */
<> 139:856d2700e60b 1264 __STATIC_INLINE uint32_t LL_USART_IsEnabledRxTimeout(USART_TypeDef *USARTx)
<> 139:856d2700e60b 1265 {
<> 139:856d2700e60b 1266 return (READ_BIT(USARTx->CR2, USART_CR2_RTOEN) == (USART_CR2_RTOEN));
<> 139:856d2700e60b 1267 }
<> 139:856d2700e60b 1268
<> 139:856d2700e60b 1269 /**
<> 139:856d2700e60b 1270 * @brief Set Address of the USART node.
<> 139:856d2700e60b 1271 * @note This is used in multiprocessor communication during Mute mode or Stop mode,
<> 139:856d2700e60b 1272 * for wake up with address mark detection.
<> 139:856d2700e60b 1273 * @note 4bits address node is used when 4-bit Address Detection is selected in ADDM7.
<> 139:856d2700e60b 1274 * (b7-b4 should be set to 0)
<> 139:856d2700e60b 1275 * 8bits address node is used when 7-bit Address Detection is selected in ADDM7.
<> 139:856d2700e60b 1276 * (This is used in multiprocessor communication during Mute mode or Stop mode,
<> 139:856d2700e60b 1277 * for wake up with 7-bit address mark detection.
<> 139:856d2700e60b 1278 * The MSB of the character sent by the transmitter should be equal to 1.
<> 139:856d2700e60b 1279 * It may also be used for character detection during normal reception,
<> 139:856d2700e60b 1280 * Mute mode inactive (for example, end of block detection in ModBus protocol).
<> 139:856d2700e60b 1281 * In this case, the whole received character (8-bit) is compared to the ADD[7:0]
<> 139:856d2700e60b 1282 * value and CMF flag is set on match)
<> 139:856d2700e60b 1283 * @rmtoll CR2 ADD LL_USART_ConfigNodeAddress\n
<> 139:856d2700e60b 1284 * CR2 ADDM7 LL_USART_ConfigNodeAddress
<> 139:856d2700e60b 1285 * @param USARTx USART Instance
<> 139:856d2700e60b 1286 * @param AddressLen This parameter can be one of the following values:
<> 139:856d2700e60b 1287 * @arg @ref LL_USART_ADDRESS_DETECT_4B
<> 139:856d2700e60b 1288 * @arg @ref LL_USART_ADDRESS_DETECT_7B
<> 139:856d2700e60b 1289 * @param NodeAddress 4 or 7 bit Address of the USART node.
<> 139:856d2700e60b 1290 * @retval None
<> 139:856d2700e60b 1291 */
<> 139:856d2700e60b 1292 __STATIC_INLINE void LL_USART_ConfigNodeAddress(USART_TypeDef *USARTx, uint32_t AddressLen, uint32_t NodeAddress)
<> 139:856d2700e60b 1293 {
<> 139:856d2700e60b 1294 MODIFY_REG(USARTx->CR2, USART_CR2_ADD | USART_CR2_ADDM7,
<> 139:856d2700e60b 1295 (uint32_t)(AddressLen | (NodeAddress << USART_CR2_ADD_Pos)));
<> 139:856d2700e60b 1296 }
<> 139:856d2700e60b 1297
<> 139:856d2700e60b 1298 /**
<> 139:856d2700e60b 1299 * @brief Return 8 bit Address of the USART node as set in ADD field of CR2.
<> 139:856d2700e60b 1300 * @note If 4-bit Address Detection is selected in ADDM7,
<> 139:856d2700e60b 1301 * only 4bits (b3-b0) of returned value are relevant (b31-b4 are not relevant)
<> 139:856d2700e60b 1302 * If 7-bit Address Detection is selected in ADDM7,
<> 139:856d2700e60b 1303 * only 8bits (b7-b0) of returned value are relevant (b31-b8 are not relevant)
<> 139:856d2700e60b 1304 * @rmtoll CR2 ADD LL_USART_GetNodeAddress
<> 139:856d2700e60b 1305 * @param USARTx USART Instance
<> 139:856d2700e60b 1306 * @retval Address of the USART node (Value between Min_Data=0 and Max_Data=255)
<> 139:856d2700e60b 1307 */
<> 139:856d2700e60b 1308 __STATIC_INLINE uint32_t LL_USART_GetNodeAddress(USART_TypeDef *USARTx)
<> 139:856d2700e60b 1309 {
<> 139:856d2700e60b 1310 return (uint32_t)(READ_BIT(USARTx->CR2, USART_CR2_ADD) >> USART_CR2_ADD_Pos);
<> 139:856d2700e60b 1311 }
<> 139:856d2700e60b 1312
<> 139:856d2700e60b 1313 /**
<> 139:856d2700e60b 1314 * @brief Return Length of Node Address used in Address Detection mode (7-bit or 4-bit)
<> 139:856d2700e60b 1315 * @rmtoll CR2 ADDM7 LL_USART_GetNodeAddressLen
<> 139:856d2700e60b 1316 * @param USARTx USART Instance
<> 139:856d2700e60b 1317 * @retval Returned value can be one of the following values:
<> 139:856d2700e60b 1318 * @arg @ref LL_USART_ADDRESS_DETECT_4B
<> 139:856d2700e60b 1319 * @arg @ref LL_USART_ADDRESS_DETECT_7B
<> 139:856d2700e60b 1320 */
<> 139:856d2700e60b 1321 __STATIC_INLINE uint32_t LL_USART_GetNodeAddressLen(USART_TypeDef *USARTx)
<> 139:856d2700e60b 1322 {
<> 139:856d2700e60b 1323 return (uint32_t)(READ_BIT(USARTx->CR2, USART_CR2_ADDM7));
<> 139:856d2700e60b 1324 }
<> 139:856d2700e60b 1325
<> 139:856d2700e60b 1326 /**
<> 139:856d2700e60b 1327 * @brief Enable RTS HW Flow Control
<> 139:856d2700e60b 1328 * @note Macro @ref IS_UART_HWFLOW_INSTANCE(USARTx) can be used to check whether or not
<> 139:856d2700e60b 1329 * Hardware Flow control feature is supported by the USARTx instance.
<> 139:856d2700e60b 1330 * @rmtoll CR3 RTSE LL_USART_EnableRTSHWFlowCtrl
<> 139:856d2700e60b 1331 * @param USARTx USART Instance
<> 139:856d2700e60b 1332 * @retval None
<> 139:856d2700e60b 1333 */
<> 139:856d2700e60b 1334 __STATIC_INLINE void LL_USART_EnableRTSHWFlowCtrl(USART_TypeDef *USARTx)
<> 139:856d2700e60b 1335 {
<> 139:856d2700e60b 1336 SET_BIT(USARTx->CR3, USART_CR3_RTSE);
<> 139:856d2700e60b 1337 }
<> 139:856d2700e60b 1338
<> 139:856d2700e60b 1339 /**
<> 139:856d2700e60b 1340 * @brief Disable RTS HW Flow Control
<> 139:856d2700e60b 1341 * @note Macro @ref IS_UART_HWFLOW_INSTANCE(USARTx) can be used to check whether or not
<> 139:856d2700e60b 1342 * Hardware Flow control feature is supported by the USARTx instance.
<> 139:856d2700e60b 1343 * @rmtoll CR3 RTSE LL_USART_DisableRTSHWFlowCtrl
<> 139:856d2700e60b 1344 * @param USARTx USART Instance
<> 139:856d2700e60b 1345 * @retval None
<> 139:856d2700e60b 1346 */
<> 139:856d2700e60b 1347 __STATIC_INLINE void LL_USART_DisableRTSHWFlowCtrl(USART_TypeDef *USARTx)
<> 139:856d2700e60b 1348 {
<> 139:856d2700e60b 1349 CLEAR_BIT(USARTx->CR3, USART_CR3_RTSE);
<> 139:856d2700e60b 1350 }
<> 139:856d2700e60b 1351
<> 139:856d2700e60b 1352 /**
<> 139:856d2700e60b 1353 * @brief Enable CTS HW Flow Control
<> 139:856d2700e60b 1354 * @note Macro @ref IS_UART_HWFLOW_INSTANCE(USARTx) can be used to check whether or not
<> 139:856d2700e60b 1355 * Hardware Flow control feature is supported by the USARTx instance.
<> 139:856d2700e60b 1356 * @rmtoll CR3 CTSE LL_USART_EnableCTSHWFlowCtrl
<> 139:856d2700e60b 1357 * @param USARTx USART Instance
<> 139:856d2700e60b 1358 * @retval None
<> 139:856d2700e60b 1359 */
<> 139:856d2700e60b 1360 __STATIC_INLINE void LL_USART_EnableCTSHWFlowCtrl(USART_TypeDef *USARTx)
<> 139:856d2700e60b 1361 {
<> 139:856d2700e60b 1362 SET_BIT(USARTx->CR3, USART_CR3_CTSE);
<> 139:856d2700e60b 1363 }
<> 139:856d2700e60b 1364
<> 139:856d2700e60b 1365 /**
<> 139:856d2700e60b 1366 * @brief Disable CTS HW Flow Control
<> 139:856d2700e60b 1367 * @note Macro @ref IS_UART_HWFLOW_INSTANCE(USARTx) can be used to check whether or not
<> 139:856d2700e60b 1368 * Hardware Flow control feature is supported by the USARTx instance.
<> 139:856d2700e60b 1369 * @rmtoll CR3 CTSE LL_USART_DisableCTSHWFlowCtrl
<> 139:856d2700e60b 1370 * @param USARTx USART Instance
<> 139:856d2700e60b 1371 * @retval None
<> 139:856d2700e60b 1372 */
<> 139:856d2700e60b 1373 __STATIC_INLINE void LL_USART_DisableCTSHWFlowCtrl(USART_TypeDef *USARTx)
<> 139:856d2700e60b 1374 {
<> 139:856d2700e60b 1375 CLEAR_BIT(USARTx->CR3, USART_CR3_CTSE);
<> 139:856d2700e60b 1376 }
<> 139:856d2700e60b 1377
<> 139:856d2700e60b 1378 /**
<> 139:856d2700e60b 1379 * @brief Configure HW Flow Control mode (both CTS and RTS)
<> 139:856d2700e60b 1380 * @note Macro @ref IS_UART_HWFLOW_INSTANCE(USARTx) can be used to check whether or not
<> 139:856d2700e60b 1381 * Hardware Flow control feature is supported by the USARTx instance.
<> 139:856d2700e60b 1382 * @rmtoll CR3 RTSE LL_USART_SetHWFlowCtrl\n
<> 139:856d2700e60b 1383 * CR3 CTSE LL_USART_SetHWFlowCtrl
<> 139:856d2700e60b 1384 * @param USARTx USART Instance
<> 139:856d2700e60b 1385 * @param HardwareFlowControl This parameter can be one of the following values:
<> 139:856d2700e60b 1386 * @arg @ref LL_USART_HWCONTROL_NONE
<> 139:856d2700e60b 1387 * @arg @ref LL_USART_HWCONTROL_RTS
<> 139:856d2700e60b 1388 * @arg @ref LL_USART_HWCONTROL_CTS
<> 139:856d2700e60b 1389 * @arg @ref LL_USART_HWCONTROL_RTS_CTS
<> 139:856d2700e60b 1390 * @retval None
<> 139:856d2700e60b 1391 */
<> 139:856d2700e60b 1392 __STATIC_INLINE void LL_USART_SetHWFlowCtrl(USART_TypeDef *USARTx, uint32_t HardwareFlowControl)
<> 139:856d2700e60b 1393 {
<> 139:856d2700e60b 1394 MODIFY_REG(USARTx->CR3, USART_CR3_RTSE | USART_CR3_CTSE, HardwareFlowControl);
<> 139:856d2700e60b 1395 }
<> 139:856d2700e60b 1396
<> 139:856d2700e60b 1397 /**
<> 139:856d2700e60b 1398 * @brief Return HW Flow Control configuration (both CTS and RTS)
<> 139:856d2700e60b 1399 * @note Macro @ref IS_UART_HWFLOW_INSTANCE(USARTx) can be used to check whether or not
<> 139:856d2700e60b 1400 * Hardware Flow control feature is supported by the USARTx instance.
<> 139:856d2700e60b 1401 * @rmtoll CR3 RTSE LL_USART_GetHWFlowCtrl\n
<> 139:856d2700e60b 1402 * CR3 CTSE LL_USART_GetHWFlowCtrl
<> 139:856d2700e60b 1403 * @param USARTx USART Instance
<> 139:856d2700e60b 1404 * @retval Returned value can be one of the following values:
<> 139:856d2700e60b 1405 * @arg @ref LL_USART_HWCONTROL_NONE
<> 139:856d2700e60b 1406 * @arg @ref LL_USART_HWCONTROL_RTS
<> 139:856d2700e60b 1407 * @arg @ref LL_USART_HWCONTROL_CTS
<> 139:856d2700e60b 1408 * @arg @ref LL_USART_HWCONTROL_RTS_CTS
<> 139:856d2700e60b 1409 */
<> 139:856d2700e60b 1410 __STATIC_INLINE uint32_t LL_USART_GetHWFlowCtrl(USART_TypeDef *USARTx)
<> 139:856d2700e60b 1411 {
<> 139:856d2700e60b 1412 return (uint32_t)(READ_BIT(USARTx->CR3, USART_CR3_RTSE | USART_CR3_CTSE));
<> 139:856d2700e60b 1413 }
<> 139:856d2700e60b 1414
<> 139:856d2700e60b 1415 /**
<> 139:856d2700e60b 1416 * @brief Enable One bit sampling method
<> 139:856d2700e60b 1417 * @rmtoll CR3 ONEBIT LL_USART_EnableOneBitSamp
<> 139:856d2700e60b 1418 * @param USARTx USART Instance
<> 139:856d2700e60b 1419 * @retval None
<> 139:856d2700e60b 1420 */
<> 139:856d2700e60b 1421 __STATIC_INLINE void LL_USART_EnableOneBitSamp(USART_TypeDef *USARTx)
<> 139:856d2700e60b 1422 {
<> 139:856d2700e60b 1423 SET_BIT(USARTx->CR3, USART_CR3_ONEBIT);
<> 139:856d2700e60b 1424 }
<> 139:856d2700e60b 1425
<> 139:856d2700e60b 1426 /**
<> 139:856d2700e60b 1427 * @brief Disable One bit sampling method
<> 139:856d2700e60b 1428 * @rmtoll CR3 ONEBIT LL_USART_DisableOneBitSamp
<> 139:856d2700e60b 1429 * @param USARTx USART Instance
<> 139:856d2700e60b 1430 * @retval None
<> 139:856d2700e60b 1431 */
<> 139:856d2700e60b 1432 __STATIC_INLINE void LL_USART_DisableOneBitSamp(USART_TypeDef *USARTx)
<> 139:856d2700e60b 1433 {
<> 139:856d2700e60b 1434 CLEAR_BIT(USARTx->CR3, USART_CR3_ONEBIT);
<> 139:856d2700e60b 1435 }
<> 139:856d2700e60b 1436
<> 139:856d2700e60b 1437 /**
<> 139:856d2700e60b 1438 * @brief Indicate if One bit sampling method is enabled
<> 139:856d2700e60b 1439 * @rmtoll CR3 ONEBIT LL_USART_IsEnabledOneBitSamp
<> 139:856d2700e60b 1440 * @param USARTx USART Instance
<> 139:856d2700e60b 1441 * @retval State of bit (1 or 0).
<> 139:856d2700e60b 1442 */
<> 139:856d2700e60b 1443 __STATIC_INLINE uint32_t LL_USART_IsEnabledOneBitSamp(USART_TypeDef *USARTx)
<> 139:856d2700e60b 1444 {
<> 139:856d2700e60b 1445 return (READ_BIT(USARTx->CR3, USART_CR3_ONEBIT) == (USART_CR3_ONEBIT));
<> 139:856d2700e60b 1446 }
<> 139:856d2700e60b 1447
<> 139:856d2700e60b 1448 /**
<> 139:856d2700e60b 1449 * @brief Enable Overrun detection
<> 139:856d2700e60b 1450 * @rmtoll CR3 OVRDIS LL_USART_EnableOverrunDetect
<> 139:856d2700e60b 1451 * @param USARTx USART Instance
<> 139:856d2700e60b 1452 * @retval None
<> 139:856d2700e60b 1453 */
<> 139:856d2700e60b 1454 __STATIC_INLINE void LL_USART_EnableOverrunDetect(USART_TypeDef *USARTx)
<> 139:856d2700e60b 1455 {
<> 139:856d2700e60b 1456 CLEAR_BIT(USARTx->CR3, USART_CR3_OVRDIS);
<> 139:856d2700e60b 1457 }
<> 139:856d2700e60b 1458
<> 139:856d2700e60b 1459 /**
<> 139:856d2700e60b 1460 * @brief Disable Overrun detection
<> 139:856d2700e60b 1461 * @rmtoll CR3 OVRDIS LL_USART_DisableOverrunDetect
<> 139:856d2700e60b 1462 * @param USARTx USART Instance
<> 139:856d2700e60b 1463 * @retval None
<> 139:856d2700e60b 1464 */
<> 139:856d2700e60b 1465 __STATIC_INLINE void LL_USART_DisableOverrunDetect(USART_TypeDef *USARTx)
<> 139:856d2700e60b 1466 {
<> 139:856d2700e60b 1467 SET_BIT(USARTx->CR3, USART_CR3_OVRDIS);
<> 139:856d2700e60b 1468 }
<> 139:856d2700e60b 1469
<> 139:856d2700e60b 1470 /**
<> 139:856d2700e60b 1471 * @brief Indicate if Overrun detection is enabled
<> 139:856d2700e60b 1472 * @rmtoll CR3 OVRDIS LL_USART_IsEnabledOverrunDetect
<> 139:856d2700e60b 1473 * @param USARTx USART Instance
<> 139:856d2700e60b 1474 * @retval State of bit (1 or 0).
<> 139:856d2700e60b 1475 */
<> 139:856d2700e60b 1476 __STATIC_INLINE uint32_t LL_USART_IsEnabledOverrunDetect(USART_TypeDef *USARTx)
<> 139:856d2700e60b 1477 {
<> 139:856d2700e60b 1478 return (READ_BIT(USARTx->CR3, USART_CR3_OVRDIS) != USART_CR3_OVRDIS);
<> 139:856d2700e60b 1479 }
<> 139:856d2700e60b 1480
<> 139:856d2700e60b 1481
<> 139:856d2700e60b 1482 /**
<> 139:856d2700e60b 1483 * @brief Configure USART BRR register for achieving expected Baud Rate value.
<> 139:856d2700e60b 1484 * @note Compute and set USARTDIV value in BRR Register (full BRR content)
<> 139:856d2700e60b 1485 * according to used Peripheral Clock, Oversampling mode, and expected Baud Rate values
<> 139:856d2700e60b 1486 * @note Peripheral clock and Baud rate values provided as function parameters should be valid
<> 139:856d2700e60b 1487 * (Baud rate value != 0)
<> 139:856d2700e60b 1488 * @note In case of oversampling by 16 and 8, BRR content must be greater than or equal to 16d.
<> 139:856d2700e60b 1489 * @rmtoll BRR BRR LL_USART_SetBaudRate
<> 139:856d2700e60b 1490 * @param USARTx USART Instance
<> 139:856d2700e60b 1491 * @param PeriphClk Peripheral Clock
<> 139:856d2700e60b 1492 * @param OverSampling This parameter can be one of the following values:
<> 139:856d2700e60b 1493 * @arg @ref LL_USART_OVERSAMPLING_16
<> 139:856d2700e60b 1494 * @arg @ref LL_USART_OVERSAMPLING_8
<> 139:856d2700e60b 1495 * @param BaudRate Baud Rate
<> 139:856d2700e60b 1496 * @retval None
<> 139:856d2700e60b 1497 */
<> 139:856d2700e60b 1498 __STATIC_INLINE void LL_USART_SetBaudRate(USART_TypeDef *USARTx, uint32_t PeriphClk, uint32_t OverSampling,
<> 139:856d2700e60b 1499 uint32_t BaudRate)
<> 139:856d2700e60b 1500 {
<> 139:856d2700e60b 1501 register uint32_t usartdiv = 0x0U;
<> 139:856d2700e60b 1502 register uint32_t brrtemp = 0x0U;
<> 139:856d2700e60b 1503
<> 139:856d2700e60b 1504 if (OverSampling == LL_USART_OVERSAMPLING_8)
<> 139:856d2700e60b 1505 {
<> 139:856d2700e60b 1506 usartdiv = (uint16_t)(__LL_USART_DIV_SAMPLING8(PeriphClk, BaudRate));
<> 139:856d2700e60b 1507 brrtemp = usartdiv & 0xFFF0U;
<> 139:856d2700e60b 1508 brrtemp |= (uint16_t)((usartdiv & (uint16_t)0x000FU) >> 1U);
<> 139:856d2700e60b 1509 USARTx->BRR = brrtemp;
<> 139:856d2700e60b 1510 }
<> 139:856d2700e60b 1511 else
<> 139:856d2700e60b 1512 {
<> 139:856d2700e60b 1513 USARTx->BRR = (uint16_t)(__LL_USART_DIV_SAMPLING16(PeriphClk, BaudRate));
<> 139:856d2700e60b 1514 }
<> 139:856d2700e60b 1515 }
<> 139:856d2700e60b 1516
<> 139:856d2700e60b 1517 /**
<> 139:856d2700e60b 1518 * @brief Return current Baud Rate value, according to USARTDIV present in BRR register
<> 139:856d2700e60b 1519 * (full BRR content), and to used Peripheral Clock and Oversampling mode values
<> 139:856d2700e60b 1520 * @note In case of non-initialized or invalid value stored in BRR register, value 0 will be returned.
<> 139:856d2700e60b 1521 * @note In case of oversampling by 16 and 8, BRR content must be greater than or equal to 16d.
<> 139:856d2700e60b 1522 * @rmtoll BRR BRR LL_USART_GetBaudRate
<> 139:856d2700e60b 1523 * @param USARTx USART Instance
<> 139:856d2700e60b 1524 * @param PeriphClk Peripheral Clock
<> 139:856d2700e60b 1525 * @param OverSampling This parameter can be one of the following values:
<> 139:856d2700e60b 1526 * @arg @ref LL_USART_OVERSAMPLING_16
<> 139:856d2700e60b 1527 * @arg @ref LL_USART_OVERSAMPLING_8
<> 139:856d2700e60b 1528 * @retval Baud Rate
<> 139:856d2700e60b 1529 */
<> 139:856d2700e60b 1530 __STATIC_INLINE uint32_t LL_USART_GetBaudRate(USART_TypeDef *USARTx, uint32_t PeriphClk, uint32_t OverSampling)
<> 139:856d2700e60b 1531 {
<> 139:856d2700e60b 1532 register uint32_t usartdiv = 0x0U;
<> 139:856d2700e60b 1533 register uint32_t brrresult = 0x0U;
<> 139:856d2700e60b 1534
<> 139:856d2700e60b 1535 usartdiv = USARTx->BRR;
<> 139:856d2700e60b 1536
<> 139:856d2700e60b 1537 if (OverSampling == LL_USART_OVERSAMPLING_8)
<> 139:856d2700e60b 1538 {
<> 139:856d2700e60b 1539 if ((usartdiv & 0xFFF7U) != 0U)
<> 139:856d2700e60b 1540 {
<> 139:856d2700e60b 1541 usartdiv = (uint16_t)((usartdiv & 0xFFF0U) | ((usartdiv & 0x0007U) << 1U)) ;
<> 139:856d2700e60b 1542 brrresult = (PeriphClk * 2U) / usartdiv;
<> 139:856d2700e60b 1543 }
<> 139:856d2700e60b 1544 }
<> 139:856d2700e60b 1545 else
<> 139:856d2700e60b 1546 {
<> 139:856d2700e60b 1547 if ((usartdiv & 0xFFFFU) != 0U)
<> 139:856d2700e60b 1548 {
<> 139:856d2700e60b 1549 brrresult = PeriphClk / usartdiv;
<> 139:856d2700e60b 1550 }
<> 139:856d2700e60b 1551 }
<> 139:856d2700e60b 1552 return (brrresult);
<> 139:856d2700e60b 1553 }
<> 139:856d2700e60b 1554
<> 139:856d2700e60b 1555 /**
<> 139:856d2700e60b 1556 * @brief Set Receiver Time Out Value (expressed in nb of bits duration)
<> 139:856d2700e60b 1557 * @rmtoll RTOR RTO LL_USART_SetRxTimeout
<> 139:856d2700e60b 1558 * @param USARTx USART Instance
<> 139:856d2700e60b 1559 * @param Timeout Value between Min_Data=0x00 and Max_Data=0x00FFFFFF
<> 139:856d2700e60b 1560 * @retval None
<> 139:856d2700e60b 1561 */
<> 139:856d2700e60b 1562 __STATIC_INLINE void LL_USART_SetRxTimeout(USART_TypeDef *USARTx, uint32_t Timeout)
<> 139:856d2700e60b 1563 {
<> 139:856d2700e60b 1564 MODIFY_REG(USARTx->RTOR, USART_RTOR_RTO, Timeout);
<> 139:856d2700e60b 1565 }
<> 139:856d2700e60b 1566
<> 139:856d2700e60b 1567 /**
<> 139:856d2700e60b 1568 * @brief Get Receiver Time Out Value (expressed in nb of bits duration)
<> 139:856d2700e60b 1569 * @rmtoll RTOR RTO LL_USART_GetRxTimeout
<> 139:856d2700e60b 1570 * @param USARTx USART Instance
<> 139:856d2700e60b 1571 * @retval Value between Min_Data=0x00 and Max_Data=0x00FFFFFF
<> 139:856d2700e60b 1572 */
<> 139:856d2700e60b 1573 __STATIC_INLINE uint32_t LL_USART_GetRxTimeout(USART_TypeDef *USARTx)
<> 139:856d2700e60b 1574 {
<> 139:856d2700e60b 1575 return (uint32_t)(READ_BIT(USARTx->RTOR, USART_RTOR_RTO));
<> 139:856d2700e60b 1576 }
<> 139:856d2700e60b 1577
<> 139:856d2700e60b 1578 /**
<> 139:856d2700e60b 1579 * @brief Set Block Length value in reception
<> 139:856d2700e60b 1580 * @rmtoll RTOR BLEN LL_USART_SetBlockLength
<> 139:856d2700e60b 1581 * @param USARTx USART Instance
<> 139:856d2700e60b 1582 * @param BlockLength Value between Min_Data=0x00 and Max_Data=0xFF
<> 139:856d2700e60b 1583 * @retval None
<> 139:856d2700e60b 1584 */
<> 139:856d2700e60b 1585 __STATIC_INLINE void LL_USART_SetBlockLength(USART_TypeDef *USARTx, uint32_t BlockLength)
<> 139:856d2700e60b 1586 {
<> 139:856d2700e60b 1587 MODIFY_REG(USARTx->RTOR, USART_RTOR_BLEN, BlockLength << USART_RTOR_BLEN_Pos);
<> 139:856d2700e60b 1588 }
<> 139:856d2700e60b 1589
<> 139:856d2700e60b 1590 /**
<> 139:856d2700e60b 1591 * @brief Get Block Length value in reception
<> 139:856d2700e60b 1592 * @rmtoll RTOR BLEN LL_USART_GetBlockLength
<> 139:856d2700e60b 1593 * @param USARTx USART Instance
<> 139:856d2700e60b 1594 * @retval Value between Min_Data=0x00 and Max_Data=0xFF
<> 139:856d2700e60b 1595 */
<> 139:856d2700e60b 1596 __STATIC_INLINE uint32_t LL_USART_GetBlockLength(USART_TypeDef *USARTx)
<> 139:856d2700e60b 1597 {
<> 139:856d2700e60b 1598 return (uint32_t)(READ_BIT(USARTx->RTOR, USART_RTOR_BLEN) >> USART_RTOR_BLEN_Pos);
<> 139:856d2700e60b 1599 }
<> 139:856d2700e60b 1600
<> 139:856d2700e60b 1601 /**
<> 139:856d2700e60b 1602 * @}
<> 139:856d2700e60b 1603 */
<> 139:856d2700e60b 1604
<> 139:856d2700e60b 1605 /** @defgroup USART_LL_EF_Configuration_IRDA Configuration functions related to Irda feature
<> 139:856d2700e60b 1606 * @{
<> 139:856d2700e60b 1607 */
<> 139:856d2700e60b 1608
<> 139:856d2700e60b 1609 /**
<> 139:856d2700e60b 1610 * @brief Enable IrDA mode
<> 139:856d2700e60b 1611 * @note Macro @ref IS_IRDA_INSTANCE(USARTx) can be used to check whether or not
<> 139:856d2700e60b 1612 * IrDA feature is supported by the USARTx instance.
<> 139:856d2700e60b 1613 * @rmtoll CR3 IREN LL_USART_EnableIrda
<> 139:856d2700e60b 1614 * @param USARTx USART Instance
<> 139:856d2700e60b 1615 * @retval None
<> 139:856d2700e60b 1616 */
<> 139:856d2700e60b 1617 __STATIC_INLINE void LL_USART_EnableIrda(USART_TypeDef *USARTx)
<> 139:856d2700e60b 1618 {
<> 139:856d2700e60b 1619 SET_BIT(USARTx->CR3, USART_CR3_IREN);
<> 139:856d2700e60b 1620 }
<> 139:856d2700e60b 1621
<> 139:856d2700e60b 1622 /**
<> 139:856d2700e60b 1623 * @brief Disable IrDA mode
<> 139:856d2700e60b 1624 * @note Macro @ref IS_IRDA_INSTANCE(USARTx) can be used to check whether or not
<> 139:856d2700e60b 1625 * IrDA feature is supported by the USARTx instance.
<> 139:856d2700e60b 1626 * @rmtoll CR3 IREN LL_USART_DisableIrda
<> 139:856d2700e60b 1627 * @param USARTx USART Instance
<> 139:856d2700e60b 1628 * @retval None
<> 139:856d2700e60b 1629 */
<> 139:856d2700e60b 1630 __STATIC_INLINE void LL_USART_DisableIrda(USART_TypeDef *USARTx)
<> 139:856d2700e60b 1631 {
<> 139:856d2700e60b 1632 CLEAR_BIT(USARTx->CR3, USART_CR3_IREN);
<> 139:856d2700e60b 1633 }
<> 139:856d2700e60b 1634
<> 139:856d2700e60b 1635 /**
<> 139:856d2700e60b 1636 * @brief Indicate if IrDA mode is enabled
<> 139:856d2700e60b 1637 * @note Macro @ref IS_IRDA_INSTANCE(USARTx) can be used to check whether or not
<> 139:856d2700e60b 1638 * IrDA feature is supported by the USARTx instance.
<> 139:856d2700e60b 1639 * @rmtoll CR3 IREN LL_USART_IsEnabledIrda
<> 139:856d2700e60b 1640 * @param USARTx USART Instance
<> 139:856d2700e60b 1641 * @retval State of bit (1 or 0).
<> 139:856d2700e60b 1642 */
<> 139:856d2700e60b 1643 __STATIC_INLINE uint32_t LL_USART_IsEnabledIrda(USART_TypeDef *USARTx)
<> 139:856d2700e60b 1644 {
<> 139:856d2700e60b 1645 return (READ_BIT(USARTx->CR3, USART_CR3_IREN) == (USART_CR3_IREN));
<> 139:856d2700e60b 1646 }
<> 139:856d2700e60b 1647
<> 139:856d2700e60b 1648 /**
<> 139:856d2700e60b 1649 * @brief Configure IrDA Power Mode (Normal or Low Power)
<> 139:856d2700e60b 1650 * @note Macro @ref IS_IRDA_INSTANCE(USARTx) can be used to check whether or not
<> 139:856d2700e60b 1651 * IrDA feature is supported by the USARTx instance.
<> 139:856d2700e60b 1652 * @rmtoll CR3 IRLP LL_USART_SetIrdaPowerMode
<> 139:856d2700e60b 1653 * @param USARTx USART Instance
<> 139:856d2700e60b 1654 * @param PowerMode This parameter can be one of the following values:
<> 139:856d2700e60b 1655 * @arg @ref LL_USART_IRDA_POWER_NORMAL
<> 139:856d2700e60b 1656 * @arg @ref LL_USART_IRDA_POWER_LOW
<> 139:856d2700e60b 1657 * @retval None
<> 139:856d2700e60b 1658 */
<> 139:856d2700e60b 1659 __STATIC_INLINE void LL_USART_SetIrdaPowerMode(USART_TypeDef *USARTx, uint32_t PowerMode)
<> 139:856d2700e60b 1660 {
<> 139:856d2700e60b 1661 MODIFY_REG(USARTx->CR3, USART_CR3_IRLP, PowerMode);
<> 139:856d2700e60b 1662 }
<> 139:856d2700e60b 1663
<> 139:856d2700e60b 1664 /**
<> 139:856d2700e60b 1665 * @brief Retrieve IrDA Power Mode configuration (Normal or Low Power)
<> 139:856d2700e60b 1666 * @note Macro @ref IS_IRDA_INSTANCE(USARTx) can be used to check whether or not
<> 139:856d2700e60b 1667 * IrDA feature is supported by the USARTx instance.
<> 139:856d2700e60b 1668 * @rmtoll CR3 IRLP LL_USART_GetIrdaPowerMode
<> 139:856d2700e60b 1669 * @param USARTx USART Instance
<> 139:856d2700e60b 1670 * @retval Returned value can be one of the following values:
<> 139:856d2700e60b 1671 * @arg @ref LL_USART_IRDA_POWER_NORMAL
<> 139:856d2700e60b 1672 * @arg @ref LL_USART_PHASE_2EDGE
<> 139:856d2700e60b 1673 */
<> 139:856d2700e60b 1674 __STATIC_INLINE uint32_t LL_USART_GetIrdaPowerMode(USART_TypeDef *USARTx)
<> 139:856d2700e60b 1675 {
<> 139:856d2700e60b 1676 return (uint32_t)(READ_BIT(USARTx->CR3, USART_CR3_IRLP));
<> 139:856d2700e60b 1677 }
<> 139:856d2700e60b 1678
<> 139:856d2700e60b 1679 /**
<> 139:856d2700e60b 1680 * @brief Set Irda prescaler value, used for dividing the USART clock source
<> 139:856d2700e60b 1681 * to achieve the Irda Low Power frequency (8 bits value)
<> 139:856d2700e60b 1682 * @note Macro @ref IS_IRDA_INSTANCE(USARTx) can be used to check whether or not
<> 139:856d2700e60b 1683 * IrDA feature is supported by the USARTx instance.
<> 139:856d2700e60b 1684 * @rmtoll GTPR PSC LL_USART_SetIrdaPrescaler
<> 139:856d2700e60b 1685 * @param USARTx USART Instance
<> 139:856d2700e60b 1686 * @param PrescalerValue Value between Min_Data=0x00 and Max_Data=0xFF
<> 139:856d2700e60b 1687 * @retval None
<> 139:856d2700e60b 1688 */
<> 139:856d2700e60b 1689 __STATIC_INLINE void LL_USART_SetIrdaPrescaler(USART_TypeDef *USARTx, uint32_t PrescalerValue)
<> 139:856d2700e60b 1690 {
<> 139:856d2700e60b 1691 MODIFY_REG(USARTx->GTPR, USART_GTPR_PSC, PrescalerValue);
<> 139:856d2700e60b 1692 }
<> 139:856d2700e60b 1693
<> 139:856d2700e60b 1694 /**
<> 139:856d2700e60b 1695 * @brief Return Irda prescaler value, used for dividing the USART clock source
<> 139:856d2700e60b 1696 * to achieve the Irda Low Power frequency (8 bits value)
<> 139:856d2700e60b 1697 * @note Macro @ref IS_IRDA_INSTANCE(USARTx) can be used to check whether or not
<> 139:856d2700e60b 1698 * IrDA feature is supported by the USARTx instance.
<> 139:856d2700e60b 1699 * @rmtoll GTPR PSC LL_USART_GetIrdaPrescaler
<> 139:856d2700e60b 1700 * @param USARTx USART Instance
<> 139:856d2700e60b 1701 * @retval Irda prescaler value (Value between Min_Data=0x00 and Max_Data=0xFF)
<> 139:856d2700e60b 1702 */
<> 139:856d2700e60b 1703 __STATIC_INLINE uint32_t LL_USART_GetIrdaPrescaler(USART_TypeDef *USARTx)
<> 139:856d2700e60b 1704 {
<> 139:856d2700e60b 1705 return (uint32_t)(READ_BIT(USARTx->GTPR, USART_GTPR_PSC));
<> 139:856d2700e60b 1706 }
<> 139:856d2700e60b 1707
<> 139:856d2700e60b 1708 /**
<> 139:856d2700e60b 1709 * @}
<> 139:856d2700e60b 1710 */
<> 139:856d2700e60b 1711
<> 139:856d2700e60b 1712 /** @defgroup USART_LL_EF_Configuration_Smartcard Configuration functions related to Smartcard feature
<> 139:856d2700e60b 1713 * @{
<> 139:856d2700e60b 1714 */
<> 139:856d2700e60b 1715
<> 139:856d2700e60b 1716 /**
<> 139:856d2700e60b 1717 * @brief Enable Smartcard NACK transmission
<> 139:856d2700e60b 1718 * @note Macro @ref IS_SMARTCARD_INSTANCE(USARTx) can be used to check whether or not
<> 139:856d2700e60b 1719 * Smartcard feature is supported by the USARTx instance.
<> 139:856d2700e60b 1720 * @rmtoll CR3 NACK LL_USART_EnableSmartcardNACK
<> 139:856d2700e60b 1721 * @param USARTx USART Instance
<> 139:856d2700e60b 1722 * @retval None
<> 139:856d2700e60b 1723 */
<> 139:856d2700e60b 1724 __STATIC_INLINE void LL_USART_EnableSmartcardNACK(USART_TypeDef *USARTx)
<> 139:856d2700e60b 1725 {
<> 139:856d2700e60b 1726 SET_BIT(USARTx->CR3, USART_CR3_NACK);
<> 139:856d2700e60b 1727 }
<> 139:856d2700e60b 1728
<> 139:856d2700e60b 1729 /**
<> 139:856d2700e60b 1730 * @brief Disable Smartcard NACK transmission
<> 139:856d2700e60b 1731 * @note Macro @ref IS_SMARTCARD_INSTANCE(USARTx) can be used to check whether or not
<> 139:856d2700e60b 1732 * Smartcard feature is supported by the USARTx instance.
<> 139:856d2700e60b 1733 * @rmtoll CR3 NACK LL_USART_DisableSmartcardNACK
<> 139:856d2700e60b 1734 * @param USARTx USART Instance
<> 139:856d2700e60b 1735 * @retval None
<> 139:856d2700e60b 1736 */
<> 139:856d2700e60b 1737 __STATIC_INLINE void LL_USART_DisableSmartcardNACK(USART_TypeDef *USARTx)
<> 139:856d2700e60b 1738 {
<> 139:856d2700e60b 1739 CLEAR_BIT(USARTx->CR3, USART_CR3_NACK);
<> 139:856d2700e60b 1740 }
<> 139:856d2700e60b 1741
<> 139:856d2700e60b 1742 /**
<> 139:856d2700e60b 1743 * @brief Indicate if Smartcard NACK transmission is enabled
<> 139:856d2700e60b 1744 * @note Macro @ref IS_SMARTCARD_INSTANCE(USARTx) can be used to check whether or not
<> 139:856d2700e60b 1745 * Smartcard feature is supported by the USARTx instance.
<> 139:856d2700e60b 1746 * @rmtoll CR3 NACK LL_USART_IsEnabledSmartcardNACK
<> 139:856d2700e60b 1747 * @param USARTx USART Instance
<> 139:856d2700e60b 1748 * @retval State of bit (1 or 0).
<> 139:856d2700e60b 1749 */
<> 139:856d2700e60b 1750 __STATIC_INLINE uint32_t LL_USART_IsEnabledSmartcardNACK(USART_TypeDef *USARTx)
<> 139:856d2700e60b 1751 {
<> 139:856d2700e60b 1752 return (READ_BIT(USARTx->CR3, USART_CR3_NACK) == (USART_CR3_NACK));
<> 139:856d2700e60b 1753 }
<> 139:856d2700e60b 1754
<> 139:856d2700e60b 1755 /**
<> 139:856d2700e60b 1756 * @brief Enable Smartcard mode
<> 139:856d2700e60b 1757 * @note Macro @ref IS_SMARTCARD_INSTANCE(USARTx) can be used to check whether or not
<> 139:856d2700e60b 1758 * Smartcard feature is supported by the USARTx instance.
<> 139:856d2700e60b 1759 * @rmtoll CR3 SCEN LL_USART_EnableSmartcard
<> 139:856d2700e60b 1760 * @param USARTx USART Instance
<> 139:856d2700e60b 1761 * @retval None
<> 139:856d2700e60b 1762 */
<> 139:856d2700e60b 1763 __STATIC_INLINE void LL_USART_EnableSmartcard(USART_TypeDef *USARTx)
<> 139:856d2700e60b 1764 {
<> 139:856d2700e60b 1765 SET_BIT(USARTx->CR3, USART_CR3_SCEN);
<> 139:856d2700e60b 1766 }
<> 139:856d2700e60b 1767
<> 139:856d2700e60b 1768 /**
<> 139:856d2700e60b 1769 * @brief Disable Smartcard mode
<> 139:856d2700e60b 1770 * @note Macro @ref IS_SMARTCARD_INSTANCE(USARTx) can be used to check whether or not
<> 139:856d2700e60b 1771 * Smartcard feature is supported by the USARTx instance.
<> 139:856d2700e60b 1772 * @rmtoll CR3 SCEN LL_USART_DisableSmartcard
<> 139:856d2700e60b 1773 * @param USARTx USART Instance
<> 139:856d2700e60b 1774 * @retval None
<> 139:856d2700e60b 1775 */
<> 139:856d2700e60b 1776 __STATIC_INLINE void LL_USART_DisableSmartcard(USART_TypeDef *USARTx)
<> 139:856d2700e60b 1777 {
<> 139:856d2700e60b 1778 CLEAR_BIT(USARTx->CR3, USART_CR3_SCEN);
<> 139:856d2700e60b 1779 }
<> 139:856d2700e60b 1780
<> 139:856d2700e60b 1781 /**
<> 139:856d2700e60b 1782 * @brief Indicate if Smartcard mode is enabled
<> 139:856d2700e60b 1783 * @note Macro @ref IS_SMARTCARD_INSTANCE(USARTx) can be used to check whether or not
<> 139:856d2700e60b 1784 * Smartcard feature is supported by the USARTx instance.
<> 139:856d2700e60b 1785 * @rmtoll CR3 SCEN LL_USART_IsEnabledSmartcard
<> 139:856d2700e60b 1786 * @param USARTx USART Instance
<> 139:856d2700e60b 1787 * @retval State of bit (1 or 0).
<> 139:856d2700e60b 1788 */
<> 139:856d2700e60b 1789 __STATIC_INLINE uint32_t LL_USART_IsEnabledSmartcard(USART_TypeDef *USARTx)
<> 139:856d2700e60b 1790 {
<> 139:856d2700e60b 1791 return (READ_BIT(USARTx->CR3, USART_CR3_SCEN) == (USART_CR3_SCEN));
<> 139:856d2700e60b 1792 }
<> 139:856d2700e60b 1793
<> 139:856d2700e60b 1794 /**
<> 139:856d2700e60b 1795 * @brief Set Smartcard Auto-Retry Count value (SCARCNT[2:0] bits)
<> 139:856d2700e60b 1796 * @note Macro @ref IS_SMARTCARD_INSTANCE(USARTx) can be used to check whether or not
<> 139:856d2700e60b 1797 * Smartcard feature is supported by the USARTx instance.
<> 139:856d2700e60b 1798 * @note This bit-field specifies the number of retries in transmit and receive, in Smartcard mode.
<> 139:856d2700e60b 1799 * In transmission mode, it specifies the number of automatic retransmission retries, before
<> 139:856d2700e60b 1800 * generating a transmission error (FE bit set).
<> 139:856d2700e60b 1801 * In reception mode, it specifies the number or erroneous reception trials, before generating a
<> 139:856d2700e60b 1802 * reception error (RXNE and PE bits set)
<> 139:856d2700e60b 1803 * @rmtoll CR3 SCARCNT LL_USART_SetSmartcardAutoRetryCount
<> 139:856d2700e60b 1804 * @param USARTx USART Instance
<> 139:856d2700e60b 1805 * @param AutoRetryCount Value between Min_Data=0 and Max_Data=7
<> 139:856d2700e60b 1806 * @retval None
<> 139:856d2700e60b 1807 */
<> 139:856d2700e60b 1808 __STATIC_INLINE void LL_USART_SetSmartcardAutoRetryCount(USART_TypeDef *USARTx, uint32_t AutoRetryCount)
<> 139:856d2700e60b 1809 {
<> 139:856d2700e60b 1810 MODIFY_REG(USARTx->CR3, USART_CR3_SCARCNT, AutoRetryCount << USART_CR3_SCARCNT_Pos);
<> 139:856d2700e60b 1811 }
<> 139:856d2700e60b 1812
<> 139:856d2700e60b 1813 /**
<> 139:856d2700e60b 1814 * @brief Return Smartcard Auto-Retry Count value (SCARCNT[2:0] bits)
<> 139:856d2700e60b 1815 * @note Macro @ref IS_SMARTCARD_INSTANCE(USARTx) can be used to check whether or not
<> 139:856d2700e60b 1816 * Smartcard feature is supported by the USARTx instance.
<> 139:856d2700e60b 1817 * @rmtoll CR3 SCARCNT LL_USART_GetSmartcardAutoRetryCount
<> 139:856d2700e60b 1818 * @param USARTx USART Instance
<> 139:856d2700e60b 1819 * @retval Smartcard Auto-Retry Count value (Value between Min_Data=0 and Max_Data=7)
<> 139:856d2700e60b 1820 */
<> 139:856d2700e60b 1821 __STATIC_INLINE uint32_t LL_USART_GetSmartcardAutoRetryCount(USART_TypeDef *USARTx)
<> 139:856d2700e60b 1822 {
<> 139:856d2700e60b 1823 return (uint32_t)(READ_BIT(USARTx->CR3, USART_CR3_SCARCNT) >> USART_CR3_SCARCNT_Pos);
<> 139:856d2700e60b 1824 }
<> 139:856d2700e60b 1825
<> 139:856d2700e60b 1826 /**
<> 139:856d2700e60b 1827 * @brief Set Smartcard prescaler value, used for dividing the USART clock
<> 139:856d2700e60b 1828 * source to provide the SMARTCARD Clock (5 bits value)
<> 139:856d2700e60b 1829 * @note Macro @ref IS_SMARTCARD_INSTANCE(USARTx) can be used to check whether or not
<> 139:856d2700e60b 1830 * Smartcard feature is supported by the USARTx instance.
<> 139:856d2700e60b 1831 * @rmtoll GTPR PSC LL_USART_SetSmartcardPrescaler
<> 139:856d2700e60b 1832 * @param USARTx USART Instance
<> 139:856d2700e60b 1833 * @param PrescalerValue Value between Min_Data=0 and Max_Data=31
<> 139:856d2700e60b 1834 * @retval None
<> 139:856d2700e60b 1835 */
<> 139:856d2700e60b 1836 __STATIC_INLINE void LL_USART_SetSmartcardPrescaler(USART_TypeDef *USARTx, uint32_t PrescalerValue)
<> 139:856d2700e60b 1837 {
<> 139:856d2700e60b 1838 MODIFY_REG(USARTx->GTPR, USART_GTPR_PSC, PrescalerValue);
<> 139:856d2700e60b 1839 }
<> 139:856d2700e60b 1840
<> 139:856d2700e60b 1841 /**
<> 139:856d2700e60b 1842 * @brief Return Smartcard prescaler value, used for dividing the USART clock
<> 139:856d2700e60b 1843 * source to provide the SMARTCARD Clock (5 bits value)
<> 139:856d2700e60b 1844 * @note Macro @ref IS_SMARTCARD_INSTANCE(USARTx) can be used to check whether or not
<> 139:856d2700e60b 1845 * Smartcard feature is supported by the USARTx instance.
<> 139:856d2700e60b 1846 * @rmtoll GTPR PSC LL_USART_GetSmartcardPrescaler
<> 139:856d2700e60b 1847 * @param USARTx USART Instance
<> 139:856d2700e60b 1848 * @retval Smartcard prescaler value (Value between Min_Data=0 and Max_Data=31)
<> 139:856d2700e60b 1849 */
<> 139:856d2700e60b 1850 __STATIC_INLINE uint32_t LL_USART_GetSmartcardPrescaler(USART_TypeDef *USARTx)
<> 139:856d2700e60b 1851 {
<> 139:856d2700e60b 1852 return (uint32_t)(READ_BIT(USARTx->GTPR, USART_GTPR_PSC));
<> 139:856d2700e60b 1853 }
<> 139:856d2700e60b 1854
<> 139:856d2700e60b 1855 /**
<> 139:856d2700e60b 1856 * @brief Set Smartcard Guard time value, expressed in nb of baud clocks periods
<> 139:856d2700e60b 1857 * (GT[7:0] bits : Guard time value)
<> 139:856d2700e60b 1858 * @note Macro @ref IS_SMARTCARD_INSTANCE(USARTx) can be used to check whether or not
<> 139:856d2700e60b 1859 * Smartcard feature is supported by the USARTx instance.
<> 139:856d2700e60b 1860 * @rmtoll GTPR GT LL_USART_SetSmartcardGuardTime
<> 139:856d2700e60b 1861 * @param USARTx USART Instance
<> 139:856d2700e60b 1862 * @param GuardTime Value between Min_Data=0x00 and Max_Data=0xFF
<> 139:856d2700e60b 1863 * @retval None
<> 139:856d2700e60b 1864 */
<> 139:856d2700e60b 1865 __STATIC_INLINE void LL_USART_SetSmartcardGuardTime(USART_TypeDef *USARTx, uint32_t GuardTime)
<> 139:856d2700e60b 1866 {
<> 139:856d2700e60b 1867 MODIFY_REG(USARTx->GTPR, USART_GTPR_GT, GuardTime << USART_GTPR_GT_Pos);
<> 139:856d2700e60b 1868 }
<> 139:856d2700e60b 1869
<> 139:856d2700e60b 1870 /**
<> 139:856d2700e60b 1871 * @brief Return Smartcard Guard time value, expressed in nb of baud clocks periods
<> 139:856d2700e60b 1872 * (GT[7:0] bits : Guard time value)
<> 139:856d2700e60b 1873 * @note Macro @ref IS_SMARTCARD_INSTANCE(USARTx) can be used to check whether or not
<> 139:856d2700e60b 1874 * Smartcard feature is supported by the USARTx instance.
<> 139:856d2700e60b 1875 * @rmtoll GTPR GT LL_USART_GetSmartcardGuardTime
<> 139:856d2700e60b 1876 * @param USARTx USART Instance
<> 139:856d2700e60b 1877 * @retval Smartcard Guard time value (Value between Min_Data=0x00 and Max_Data=0xFF)
<> 139:856d2700e60b 1878 */
<> 139:856d2700e60b 1879 __STATIC_INLINE uint32_t LL_USART_GetSmartcardGuardTime(USART_TypeDef *USARTx)
<> 139:856d2700e60b 1880 {
<> 139:856d2700e60b 1881 return (uint32_t)(READ_BIT(USARTx->GTPR, USART_GTPR_GT) >> USART_GTPR_GT_Pos);
<> 139:856d2700e60b 1882 }
<> 139:856d2700e60b 1883
<> 139:856d2700e60b 1884 /**
<> 139:856d2700e60b 1885 * @}
<> 139:856d2700e60b 1886 */
<> 139:856d2700e60b 1887
<> 139:856d2700e60b 1888 /** @defgroup USART_LL_EF_Configuration_HalfDuplex Configuration functions related to Half Duplex feature
<> 139:856d2700e60b 1889 * @{
<> 139:856d2700e60b 1890 */
<> 139:856d2700e60b 1891
<> 139:856d2700e60b 1892 /**
<> 139:856d2700e60b 1893 * @brief Enable Single Wire Half-Duplex mode
<> 139:856d2700e60b 1894 * @note Macro @ref IS_UART_HALFDUPLEX_INSTANCE(USARTx) can be used to check whether or not
<> 139:856d2700e60b 1895 * Half-Duplex mode is supported by the USARTx instance.
<> 139:856d2700e60b 1896 * @rmtoll CR3 HDSEL LL_USART_EnableHalfDuplex
<> 139:856d2700e60b 1897 * @param USARTx USART Instance
<> 139:856d2700e60b 1898 * @retval None
<> 139:856d2700e60b 1899 */
<> 139:856d2700e60b 1900 __STATIC_INLINE void LL_USART_EnableHalfDuplex(USART_TypeDef *USARTx)
<> 139:856d2700e60b 1901 {
<> 139:856d2700e60b 1902 SET_BIT(USARTx->CR3, USART_CR3_HDSEL);
<> 139:856d2700e60b 1903 }
<> 139:856d2700e60b 1904
<> 139:856d2700e60b 1905 /**
<> 139:856d2700e60b 1906 * @brief Disable Single Wire Half-Duplex mode
<> 139:856d2700e60b 1907 * @note Macro @ref IS_UART_HALFDUPLEX_INSTANCE(USARTx) can be used to check whether or not
<> 139:856d2700e60b 1908 * Half-Duplex mode is supported by the USARTx instance.
<> 139:856d2700e60b 1909 * @rmtoll CR3 HDSEL LL_USART_DisableHalfDuplex
<> 139:856d2700e60b 1910 * @param USARTx USART Instance
<> 139:856d2700e60b 1911 * @retval None
<> 139:856d2700e60b 1912 */
<> 139:856d2700e60b 1913 __STATIC_INLINE void LL_USART_DisableHalfDuplex(USART_TypeDef *USARTx)
<> 139:856d2700e60b 1914 {
<> 139:856d2700e60b 1915 CLEAR_BIT(USARTx->CR3, USART_CR3_HDSEL);
<> 139:856d2700e60b 1916 }
<> 139:856d2700e60b 1917
<> 139:856d2700e60b 1918 /**
<> 139:856d2700e60b 1919 * @brief Indicate if Single Wire Half-Duplex mode is enabled
<> 139:856d2700e60b 1920 * @note Macro @ref IS_UART_HALFDUPLEX_INSTANCE(USARTx) can be used to check whether or not
<> 139:856d2700e60b 1921 * Half-Duplex mode is supported by the USARTx instance.
<> 139:856d2700e60b 1922 * @rmtoll CR3 HDSEL LL_USART_IsEnabledHalfDuplex
<> 139:856d2700e60b 1923 * @param USARTx USART Instance
<> 139:856d2700e60b 1924 * @retval State of bit (1 or 0).
<> 139:856d2700e60b 1925 */
<> 139:856d2700e60b 1926 __STATIC_INLINE uint32_t LL_USART_IsEnabledHalfDuplex(USART_TypeDef *USARTx)
<> 139:856d2700e60b 1927 {
<> 139:856d2700e60b 1928 return (READ_BIT(USARTx->CR3, USART_CR3_HDSEL) == (USART_CR3_HDSEL));
<> 139:856d2700e60b 1929 }
<> 139:856d2700e60b 1930
<> 139:856d2700e60b 1931 /**
<> 139:856d2700e60b 1932 * @}
<> 139:856d2700e60b 1933 */
<> 139:856d2700e60b 1934
<> 139:856d2700e60b 1935 /** @defgroup USART_LL_EF_Configuration_LIN Configuration functions related to LIN feature
<> 139:856d2700e60b 1936 * @{
<> 139:856d2700e60b 1937 */
<> 139:856d2700e60b 1938
<> 139:856d2700e60b 1939 /**
<> 139:856d2700e60b 1940 * @brief Set LIN Break Detection Length
<> 139:856d2700e60b 1941 * @note Macro @ref IS_UART_LIN_INSTANCE(USARTx) can be used to check whether or not
<> 139:856d2700e60b 1942 * LIN feature is supported by the USARTx instance.
<> 139:856d2700e60b 1943 * @rmtoll CR2 LBDL LL_USART_SetLINBrkDetectionLen
<> 139:856d2700e60b 1944 * @param USARTx USART Instance
<> 139:856d2700e60b 1945 * @param LINBDLength This parameter can be one of the following values:
<> 139:856d2700e60b 1946 * @arg @ref LL_USART_LINBREAK_DETECT_10B
<> 139:856d2700e60b 1947 * @arg @ref LL_USART_LINBREAK_DETECT_11B
<> 139:856d2700e60b 1948 * @retval None
<> 139:856d2700e60b 1949 */
<> 139:856d2700e60b 1950 __STATIC_INLINE void LL_USART_SetLINBrkDetectionLen(USART_TypeDef *USARTx, uint32_t LINBDLength)
<> 139:856d2700e60b 1951 {
<> 139:856d2700e60b 1952 MODIFY_REG(USARTx->CR2, USART_CR2_LBDL, LINBDLength);
<> 139:856d2700e60b 1953 }
<> 139:856d2700e60b 1954
<> 139:856d2700e60b 1955 /**
<> 139:856d2700e60b 1956 * @brief Return LIN Break Detection Length
<> 139:856d2700e60b 1957 * @note Macro @ref IS_UART_LIN_INSTANCE(USARTx) can be used to check whether or not
<> 139:856d2700e60b 1958 * LIN feature is supported by the USARTx instance.
<> 139:856d2700e60b 1959 * @rmtoll CR2 LBDL LL_USART_GetLINBrkDetectionLen
<> 139:856d2700e60b 1960 * @param USARTx USART Instance
<> 139:856d2700e60b 1961 * @retval Returned value can be one of the following values:
<> 139:856d2700e60b 1962 * @arg @ref LL_USART_LINBREAK_DETECT_10B
<> 139:856d2700e60b 1963 * @arg @ref LL_USART_LINBREAK_DETECT_11B
<> 139:856d2700e60b 1964 */
<> 139:856d2700e60b 1965 __STATIC_INLINE uint32_t LL_USART_GetLINBrkDetectionLen(USART_TypeDef *USARTx)
<> 139:856d2700e60b 1966 {
<> 139:856d2700e60b 1967 return (uint32_t)(READ_BIT(USARTx->CR2, USART_CR2_LBDL));
<> 139:856d2700e60b 1968 }
<> 139:856d2700e60b 1969
<> 139:856d2700e60b 1970 /**
<> 139:856d2700e60b 1971 * @brief Enable LIN mode
<> 139:856d2700e60b 1972 * @note Macro @ref IS_UART_LIN_INSTANCE(USARTx) can be used to check whether or not
<> 139:856d2700e60b 1973 * LIN feature is supported by the USARTx instance.
<> 139:856d2700e60b 1974 * @rmtoll CR2 LINEN LL_USART_EnableLIN
<> 139:856d2700e60b 1975 * @param USARTx USART Instance
<> 139:856d2700e60b 1976 * @retval None
<> 139:856d2700e60b 1977 */
<> 139:856d2700e60b 1978 __STATIC_INLINE void LL_USART_EnableLIN(USART_TypeDef *USARTx)
<> 139:856d2700e60b 1979 {
<> 139:856d2700e60b 1980 SET_BIT(USARTx->CR2, USART_CR2_LINEN);
<> 139:856d2700e60b 1981 }
<> 139:856d2700e60b 1982
<> 139:856d2700e60b 1983 /**
<> 139:856d2700e60b 1984 * @brief Disable LIN mode
<> 139:856d2700e60b 1985 * @note Macro @ref IS_UART_LIN_INSTANCE(USARTx) can be used to check whether or not
<> 139:856d2700e60b 1986 * LIN feature is supported by the USARTx instance.
<> 139:856d2700e60b 1987 * @rmtoll CR2 LINEN LL_USART_DisableLIN
<> 139:856d2700e60b 1988 * @param USARTx USART Instance
<> 139:856d2700e60b 1989 * @retval None
<> 139:856d2700e60b 1990 */
<> 139:856d2700e60b 1991 __STATIC_INLINE void LL_USART_DisableLIN(USART_TypeDef *USARTx)
<> 139:856d2700e60b 1992 {
<> 139:856d2700e60b 1993 CLEAR_BIT(USARTx->CR2, USART_CR2_LINEN);
<> 139:856d2700e60b 1994 }
<> 139:856d2700e60b 1995
<> 139:856d2700e60b 1996 /**
<> 139:856d2700e60b 1997 * @brief Indicate if LIN mode is enabled
<> 139:856d2700e60b 1998 * @note Macro @ref IS_UART_LIN_INSTANCE(USARTx) can be used to check whether or not
<> 139:856d2700e60b 1999 * LIN feature is supported by the USARTx instance.
<> 139:856d2700e60b 2000 * @rmtoll CR2 LINEN LL_USART_IsEnabledLIN
<> 139:856d2700e60b 2001 * @param USARTx USART Instance
<> 139:856d2700e60b 2002 * @retval State of bit (1 or 0).
<> 139:856d2700e60b 2003 */
<> 139:856d2700e60b 2004 __STATIC_INLINE uint32_t LL_USART_IsEnabledLIN(USART_TypeDef *USARTx)
<> 139:856d2700e60b 2005 {
<> 139:856d2700e60b 2006 return (READ_BIT(USARTx->CR2, USART_CR2_LINEN) == (USART_CR2_LINEN));
<> 139:856d2700e60b 2007 }
<> 139:856d2700e60b 2008
<> 139:856d2700e60b 2009 /**
<> 139:856d2700e60b 2010 * @}
<> 139:856d2700e60b 2011 */
<> 139:856d2700e60b 2012
<> 139:856d2700e60b 2013 /** @defgroup USART_LL_EF_Configuration_DE Configuration functions related to Driver Enable feature
<> 139:856d2700e60b 2014 * @{
<> 139:856d2700e60b 2015 */
<> 139:856d2700e60b 2016
<> 139:856d2700e60b 2017 /**
<> 139:856d2700e60b 2018 * @brief Set DEDT (Driver Enable De-Assertion Time), Time value expressed on 5 bits ([4:0] bits).
<> 139:856d2700e60b 2019 * @note Macro @ref IS_UART_DRIVER_ENABLE_INSTANCE(USARTx) can be used to check whether or not
<> 139:856d2700e60b 2020 * Driver Enable feature is supported by the USARTx instance.
<> 139:856d2700e60b 2021 * @rmtoll CR1 DEDT LL_USART_SetDEDeassertionTime
<> 139:856d2700e60b 2022 * @param USARTx USART Instance
<> 139:856d2700e60b 2023 * @param Time Value between Min_Data=0 and Max_Data=31
<> 139:856d2700e60b 2024 * @retval None
<> 139:856d2700e60b 2025 */
<> 139:856d2700e60b 2026 __STATIC_INLINE void LL_USART_SetDEDeassertionTime(USART_TypeDef *USARTx, uint32_t Time)
<> 139:856d2700e60b 2027 {
<> 139:856d2700e60b 2028 MODIFY_REG(USARTx->CR1, USART_CR1_DEDT, Time << USART_CR1_DEDT_Pos);
<> 139:856d2700e60b 2029 }
<> 139:856d2700e60b 2030
<> 139:856d2700e60b 2031 /**
<> 139:856d2700e60b 2032 * @brief Return DEDT (Driver Enable De-Assertion Time)
<> 139:856d2700e60b 2033 * @note Macro @ref IS_UART_DRIVER_ENABLE_INSTANCE(USARTx) can be used to check whether or not
<> 139:856d2700e60b 2034 * Driver Enable feature is supported by the USARTx instance.
<> 139:856d2700e60b 2035 * @rmtoll CR1 DEDT LL_USART_GetDEDeassertionTime
<> 139:856d2700e60b 2036 * @param USARTx USART Instance
<> 139:856d2700e60b 2037 * @retval Time value expressed on 5 bits ([4:0] bits) : Value between Min_Data=0 and Max_Data=31
<> 139:856d2700e60b 2038 */
<> 139:856d2700e60b 2039 __STATIC_INLINE uint32_t LL_USART_GetDEDeassertionTime(USART_TypeDef *USARTx)
<> 139:856d2700e60b 2040 {
<> 139:856d2700e60b 2041 return (uint32_t)(READ_BIT(USARTx->CR1, USART_CR1_DEDT) >> USART_CR1_DEDT_Pos);
<> 139:856d2700e60b 2042 }
<> 139:856d2700e60b 2043
<> 139:856d2700e60b 2044 /**
<> 139:856d2700e60b 2045 * @brief Set DEAT (Driver Enable Assertion Time), Time value expressed on 5 bits ([4:0] bits).
<> 139:856d2700e60b 2046 * @note Macro @ref IS_UART_DRIVER_ENABLE_INSTANCE(USARTx) can be used to check whether or not
<> 139:856d2700e60b 2047 * Driver Enable feature is supported by the USARTx instance.
<> 139:856d2700e60b 2048 * @rmtoll CR1 DEAT LL_USART_SetDEAssertionTime
<> 139:856d2700e60b 2049 * @param USARTx USART Instance
<> 139:856d2700e60b 2050 * @param Time Value between Min_Data=0 and Max_Data=31
<> 139:856d2700e60b 2051 * @retval None
<> 139:856d2700e60b 2052 */
<> 139:856d2700e60b 2053 __STATIC_INLINE void LL_USART_SetDEAssertionTime(USART_TypeDef *USARTx, uint32_t Time)
<> 139:856d2700e60b 2054 {
<> 139:856d2700e60b 2055 MODIFY_REG(USARTx->CR1, USART_CR1_DEAT, Time << USART_CR1_DEAT_Pos);
<> 139:856d2700e60b 2056 }
<> 139:856d2700e60b 2057
<> 139:856d2700e60b 2058 /**
<> 139:856d2700e60b 2059 * @brief Return DEAT (Driver Enable Assertion Time)
<> 139:856d2700e60b 2060 * @note Macro @ref IS_UART_DRIVER_ENABLE_INSTANCE(USARTx) can be used to check whether or not
<> 139:856d2700e60b 2061 * Driver Enable feature is supported by the USARTx instance.
<> 139:856d2700e60b 2062 * @rmtoll CR1 DEAT LL_USART_GetDEAssertionTime
<> 139:856d2700e60b 2063 * @param USARTx USART Instance
<> 139:856d2700e60b 2064 * @retval Time value expressed on 5 bits ([4:0] bits) : Value between Min_Data=0 and Max_Data=31
<> 139:856d2700e60b 2065 */
<> 139:856d2700e60b 2066 __STATIC_INLINE uint32_t LL_USART_GetDEAssertionTime(USART_TypeDef *USARTx)
<> 139:856d2700e60b 2067 {
<> 139:856d2700e60b 2068 return (uint32_t)(READ_BIT(USARTx->CR1, USART_CR1_DEAT) >> USART_CR1_DEAT_Pos);
<> 139:856d2700e60b 2069 }
<> 139:856d2700e60b 2070
<> 139:856d2700e60b 2071 /**
<> 139:856d2700e60b 2072 * @brief Enable Driver Enable (DE) Mode
<> 139:856d2700e60b 2073 * @note Macro @ref IS_UART_DRIVER_ENABLE_INSTANCE(USARTx) can be used to check whether or not
<> 139:856d2700e60b 2074 * Driver Enable feature is supported by the USARTx instance.
<> 139:856d2700e60b 2075 * @rmtoll CR3 DEM LL_USART_EnableDEMode
<> 139:856d2700e60b 2076 * @param USARTx USART Instance
<> 139:856d2700e60b 2077 * @retval None
<> 139:856d2700e60b 2078 */
<> 139:856d2700e60b 2079 __STATIC_INLINE void LL_USART_EnableDEMode(USART_TypeDef *USARTx)
<> 139:856d2700e60b 2080 {
<> 139:856d2700e60b 2081 SET_BIT(USARTx->CR3, USART_CR3_DEM);
<> 139:856d2700e60b 2082 }
<> 139:856d2700e60b 2083
<> 139:856d2700e60b 2084 /**
<> 139:856d2700e60b 2085 * @brief Disable Driver Enable (DE) Mode
<> 139:856d2700e60b 2086 * @note Macro @ref IS_UART_DRIVER_ENABLE_INSTANCE(USARTx) can be used to check whether or not
<> 139:856d2700e60b 2087 * Driver Enable feature is supported by the USARTx instance.
<> 139:856d2700e60b 2088 * @rmtoll CR3 DEM LL_USART_DisableDEMode
<> 139:856d2700e60b 2089 * @param USARTx USART Instance
<> 139:856d2700e60b 2090 * @retval None
<> 139:856d2700e60b 2091 */
<> 139:856d2700e60b 2092 __STATIC_INLINE void LL_USART_DisableDEMode(USART_TypeDef *USARTx)
<> 139:856d2700e60b 2093 {
<> 139:856d2700e60b 2094 CLEAR_BIT(USARTx->CR3, USART_CR3_DEM);
<> 139:856d2700e60b 2095 }
<> 139:856d2700e60b 2096
<> 139:856d2700e60b 2097 /**
<> 139:856d2700e60b 2098 * @brief Indicate if Driver Enable (DE) Mode is enabled
<> 139:856d2700e60b 2099 * @note Macro @ref IS_UART_DRIVER_ENABLE_INSTANCE(USARTx) can be used to check whether or not
<> 139:856d2700e60b 2100 * Driver Enable feature is supported by the USARTx instance.
<> 139:856d2700e60b 2101 * @rmtoll CR3 DEM LL_USART_IsEnabledDEMode
<> 139:856d2700e60b 2102 * @param USARTx USART Instance
<> 139:856d2700e60b 2103 * @retval State of bit (1 or 0).
<> 139:856d2700e60b 2104 */
<> 139:856d2700e60b 2105 __STATIC_INLINE uint32_t LL_USART_IsEnabledDEMode(USART_TypeDef *USARTx)
<> 139:856d2700e60b 2106 {
<> 139:856d2700e60b 2107 return (READ_BIT(USARTx->CR3, USART_CR3_DEM) == (USART_CR3_DEM));
<> 139:856d2700e60b 2108 }
<> 139:856d2700e60b 2109
<> 139:856d2700e60b 2110 /**
<> 139:856d2700e60b 2111 * @brief Select Driver Enable Polarity
<> 139:856d2700e60b 2112 * @note Macro @ref IS_UART_DRIVER_ENABLE_INSTANCE(USARTx) can be used to check whether or not
<> 139:856d2700e60b 2113 * Driver Enable feature is supported by the USARTx instance.
<> 139:856d2700e60b 2114 * @rmtoll CR3 DEP LL_USART_SetDESignalPolarity
<> 139:856d2700e60b 2115 * @param USARTx USART Instance
<> 139:856d2700e60b 2116 * @param Polarity This parameter can be one of the following values:
<> 139:856d2700e60b 2117 * @arg @ref LL_USART_DE_POLARITY_HIGH
<> 139:856d2700e60b 2118 * @arg @ref LL_USART_DE_POLARITY_LOW
<> 139:856d2700e60b 2119 * @retval None
<> 139:856d2700e60b 2120 */
<> 139:856d2700e60b 2121 __STATIC_INLINE void LL_USART_SetDESignalPolarity(USART_TypeDef *USARTx, uint32_t Polarity)
<> 139:856d2700e60b 2122 {
<> 139:856d2700e60b 2123 MODIFY_REG(USARTx->CR3, USART_CR3_DEP, Polarity);
<> 139:856d2700e60b 2124 }
<> 139:856d2700e60b 2125
<> 139:856d2700e60b 2126 /**
<> 139:856d2700e60b 2127 * @brief Return Driver Enable Polarity
<> 139:856d2700e60b 2128 * @note Macro @ref IS_UART_DRIVER_ENABLE_INSTANCE(USARTx) can be used to check whether or not
<> 139:856d2700e60b 2129 * Driver Enable feature is supported by the USARTx instance.
<> 139:856d2700e60b 2130 * @rmtoll CR3 DEP LL_USART_GetDESignalPolarity
<> 139:856d2700e60b 2131 * @param USARTx USART Instance
<> 139:856d2700e60b 2132 * @retval Returned value can be one of the following values:
<> 139:856d2700e60b 2133 * @arg @ref LL_USART_DE_POLARITY_HIGH
<> 139:856d2700e60b 2134 * @arg @ref LL_USART_DE_POLARITY_LOW
<> 139:856d2700e60b 2135 */
<> 139:856d2700e60b 2136 __STATIC_INLINE uint32_t LL_USART_GetDESignalPolarity(USART_TypeDef *USARTx)
<> 139:856d2700e60b 2137 {
<> 139:856d2700e60b 2138 return (uint32_t)(READ_BIT(USARTx->CR3, USART_CR3_DEP));
<> 139:856d2700e60b 2139 }
<> 139:856d2700e60b 2140
<> 139:856d2700e60b 2141 /**
<> 139:856d2700e60b 2142 * @}
<> 139:856d2700e60b 2143 */
<> 139:856d2700e60b 2144
<> 139:856d2700e60b 2145 /** @defgroup USART_LL_EF_AdvancedConfiguration Advanced Configurations services
<> 139:856d2700e60b 2146 * @{
<> 139:856d2700e60b 2147 */
<> 139:856d2700e60b 2148
<> 139:856d2700e60b 2149 /**
<> 139:856d2700e60b 2150 * @brief Perform basic configuration of USART for enabling use in Asynchronous Mode (UART)
<> 139:856d2700e60b 2151 * @note In UART mode, the following bits must be kept cleared:
<> 139:856d2700e60b 2152 * - LINEN bit in the USART_CR2 register,
<> 139:856d2700e60b 2153 * - CLKEN bit in the USART_CR2 register,
<> 139:856d2700e60b 2154 * - SCEN bit in the USART_CR3 register,
<> 139:856d2700e60b 2155 * - IREN bit in the USART_CR3 register,
<> 139:856d2700e60b 2156 * - HDSEL bit in the USART_CR3 register.
<> 139:856d2700e60b 2157 * @note Call of this function is equivalent to following function call sequence :
<> 139:856d2700e60b 2158 * - Clear LINEN in CR2 using @ref LL_USART_DisableLIN() function
<> 139:856d2700e60b 2159 * - Clear CLKEN in CR2 using @ref LL_USART_DisableSCLKOutput() function
<> 139:856d2700e60b 2160 * - Clear SCEN in CR3 using @ref LL_USART_DisableSmartcard() function
<> 139:856d2700e60b 2161 * - Clear IREN in CR3 using @ref LL_USART_DisableIrda() function
<> 139:856d2700e60b 2162 * - Clear HDSEL in CR3 using @ref LL_USART_DisableHalfDuplex() function
<> 139:856d2700e60b 2163 * @note Other remaining configurations items related to Asynchronous Mode
<> 139:856d2700e60b 2164 * (as Baud Rate, Word length, Parity, ...) should be set using
<> 139:856d2700e60b 2165 * dedicated functions
<> 139:856d2700e60b 2166 * @rmtoll CR2 LINEN LL_USART_ConfigAsyncMode\n
<> 139:856d2700e60b 2167 * CR2 CLKEN LL_USART_ConfigAsyncMode\n
<> 139:856d2700e60b 2168 * CR3 SCEN LL_USART_ConfigAsyncMode\n
<> 139:856d2700e60b 2169 * CR3 IREN LL_USART_ConfigAsyncMode\n
<> 139:856d2700e60b 2170 * CR3 HDSEL LL_USART_ConfigAsyncMode
<> 139:856d2700e60b 2171 * @param USARTx USART Instance
<> 139:856d2700e60b 2172 * @retval None
<> 139:856d2700e60b 2173 */
<> 139:856d2700e60b 2174 __STATIC_INLINE void LL_USART_ConfigAsyncMode(USART_TypeDef *USARTx)
<> 139:856d2700e60b 2175 {
<> 139:856d2700e60b 2176 /* In Asynchronous mode, the following bits must be kept cleared:
<> 139:856d2700e60b 2177 - LINEN, CLKEN bits in the USART_CR2 register,
<> 139:856d2700e60b 2178 - SCEN, IREN and HDSEL bits in the USART_CR3 register.*/
<> 139:856d2700e60b 2179 CLEAR_BIT(USARTx->CR2, (USART_CR2_LINEN | USART_CR2_CLKEN));
<> 139:856d2700e60b 2180 CLEAR_BIT(USARTx->CR3, (USART_CR3_SCEN | USART_CR3_IREN | USART_CR3_HDSEL));
<> 139:856d2700e60b 2181 }
<> 139:856d2700e60b 2182
<> 139:856d2700e60b 2183 /**
<> 139:856d2700e60b 2184 * @brief Perform basic configuration of USART for enabling use in Synchronous Mode
<> 139:856d2700e60b 2185 * @note In Synchronous mode, the following bits must be kept cleared:
<> 139:856d2700e60b 2186 * - LINEN bit in the USART_CR2 register,
<> 139:856d2700e60b 2187 * - SCEN bit in the USART_CR3 register,
<> 139:856d2700e60b 2188 * - IREN bit in the USART_CR3 register,
<> 139:856d2700e60b 2189 * - HDSEL bit in the USART_CR3 register.
<> 139:856d2700e60b 2190 * This function also sets the USART in Synchronous mode.
<> 139:856d2700e60b 2191 * @note Macro @ref IS_USART_INSTANCE(USARTx) can be used to check whether or not
<> 139:856d2700e60b 2192 * Synchronous mode is supported by the USARTx instance.
<> 139:856d2700e60b 2193 * @note Call of this function is equivalent to following function call sequence :
<> 139:856d2700e60b 2194 * - Clear LINEN in CR2 using @ref LL_USART_DisableLIN() function
<> 139:856d2700e60b 2195 * - Clear IREN in CR3 using @ref LL_USART_DisableIrda() function
<> 139:856d2700e60b 2196 * - Clear SCEN in CR3 using @ref LL_USART_DisableSmartcard() function
<> 139:856d2700e60b 2197 * - Clear HDSEL in CR3 using @ref LL_USART_DisableHalfDuplex() function
<> 139:856d2700e60b 2198 * - Set CLKEN in CR2 using @ref LL_USART_EnableSCLKOutput() function
<> 139:856d2700e60b 2199 * @note Other remaining configurations items related to Synchronous Mode
<> 139:856d2700e60b 2200 * (as Baud Rate, Word length, Parity, Clock Polarity, ...) should be set using
<> 139:856d2700e60b 2201 * dedicated functions
<> 139:856d2700e60b 2202 * @rmtoll CR2 LINEN LL_USART_ConfigSyncMode\n
<> 139:856d2700e60b 2203 * CR2 CLKEN LL_USART_ConfigSyncMode\n
<> 139:856d2700e60b 2204 * CR3 SCEN LL_USART_ConfigSyncMode\n
<> 139:856d2700e60b 2205 * CR3 IREN LL_USART_ConfigSyncMode\n
<> 139:856d2700e60b 2206 * CR3 HDSEL LL_USART_ConfigSyncMode
<> 139:856d2700e60b 2207 * @param USARTx USART Instance
<> 139:856d2700e60b 2208 * @retval None
<> 139:856d2700e60b 2209 */
<> 139:856d2700e60b 2210 __STATIC_INLINE void LL_USART_ConfigSyncMode(USART_TypeDef *USARTx)
<> 139:856d2700e60b 2211 {
<> 139:856d2700e60b 2212 /* In Synchronous mode, the following bits must be kept cleared:
<> 139:856d2700e60b 2213 - LINEN bit in the USART_CR2 register,
<> 139:856d2700e60b 2214 - SCEN, IREN and HDSEL bits in the USART_CR3 register.*/
<> 139:856d2700e60b 2215 CLEAR_BIT(USARTx->CR2, (USART_CR2_LINEN));
<> 139:856d2700e60b 2216 CLEAR_BIT(USARTx->CR3, (USART_CR3_SCEN | USART_CR3_IREN | USART_CR3_HDSEL));
<> 139:856d2700e60b 2217 /* set the UART/USART in Synchronous mode */
<> 139:856d2700e60b 2218 SET_BIT(USARTx->CR2, USART_CR2_CLKEN);
<> 139:856d2700e60b 2219 }
<> 139:856d2700e60b 2220
<> 139:856d2700e60b 2221 /**
<> 139:856d2700e60b 2222 * @brief Perform basic configuration of USART for enabling use in LIN Mode
<> 139:856d2700e60b 2223 * @note In LIN mode, the following bits must be kept cleared:
<> 139:856d2700e60b 2224 * - STOP and CLKEN bits in the USART_CR2 register,
<> 139:856d2700e60b 2225 * - SCEN bit in the USART_CR3 register,
<> 139:856d2700e60b 2226 * - IREN bit in the USART_CR3 register,
<> 139:856d2700e60b 2227 * - HDSEL bit in the USART_CR3 register.
<> 139:856d2700e60b 2228 * This function also set the UART/USART in LIN mode.
<> 139:856d2700e60b 2229 * @note Macro @ref IS_UART_LIN_INSTANCE(USARTx) can be used to check whether or not
<> 139:856d2700e60b 2230 * LIN feature is supported by the USARTx instance.
<> 139:856d2700e60b 2231 * @note Call of this function is equivalent to following function call sequence :
<> 139:856d2700e60b 2232 * - Clear CLKEN in CR2 using @ref LL_USART_DisableSCLKOutput() function
<> 139:856d2700e60b 2233 * - Clear STOP in CR2 using @ref LL_USART_SetStopBitsLength() function
<> 139:856d2700e60b 2234 * - Clear SCEN in CR3 using @ref LL_USART_DisableSmartcard() function
<> 139:856d2700e60b 2235 * - Clear IREN in CR3 using @ref LL_USART_DisableIrda() function
<> 139:856d2700e60b 2236 * - Clear HDSEL in CR3 using @ref LL_USART_DisableHalfDuplex() function
<> 139:856d2700e60b 2237 * - Set LINEN in CR2 using @ref LL_USART_EnableLIN() function
<> 139:856d2700e60b 2238 * @note Other remaining configurations items related to LIN Mode
<> 139:856d2700e60b 2239 * (as Baud Rate, Word length, LIN Break Detection Length, ...) should be set using
<> 139:856d2700e60b 2240 * dedicated functions
<> 139:856d2700e60b 2241 * @rmtoll CR2 CLKEN LL_USART_ConfigLINMode\n
<> 139:856d2700e60b 2242 * CR2 STOP LL_USART_ConfigLINMode\n
<> 139:856d2700e60b 2243 * CR2 LINEN LL_USART_ConfigLINMode\n
<> 139:856d2700e60b 2244 * CR3 IREN LL_USART_ConfigLINMode\n
<> 139:856d2700e60b 2245 * CR3 SCEN LL_USART_ConfigLINMode\n
<> 139:856d2700e60b 2246 * CR3 HDSEL LL_USART_ConfigLINMode
<> 139:856d2700e60b 2247 * @param USARTx USART Instance
<> 139:856d2700e60b 2248 * @retval None
<> 139:856d2700e60b 2249 */
<> 139:856d2700e60b 2250 __STATIC_INLINE void LL_USART_ConfigLINMode(USART_TypeDef *USARTx)
<> 139:856d2700e60b 2251 {
<> 139:856d2700e60b 2252 /* In LIN mode, the following bits must be kept cleared:
<> 139:856d2700e60b 2253 - STOP and CLKEN bits in the USART_CR2 register,
<> 139:856d2700e60b 2254 - IREN, SCEN and HDSEL bits in the USART_CR3 register.*/
<> 139:856d2700e60b 2255 CLEAR_BIT(USARTx->CR2, (USART_CR2_CLKEN | USART_CR2_STOP));
<> 139:856d2700e60b 2256 CLEAR_BIT(USARTx->CR3, (USART_CR3_IREN | USART_CR3_SCEN | USART_CR3_HDSEL));
<> 139:856d2700e60b 2257 /* Set the UART/USART in LIN mode */
<> 139:856d2700e60b 2258 SET_BIT(USARTx->CR2, USART_CR2_LINEN);
<> 139:856d2700e60b 2259 }
<> 139:856d2700e60b 2260
<> 139:856d2700e60b 2261 /**
<> 139:856d2700e60b 2262 * @brief Perform basic configuration of USART for enabling use in Half Duplex Mode
<> 139:856d2700e60b 2263 * @note In Half Duplex mode, the following bits must be kept cleared:
<> 139:856d2700e60b 2264 * - LINEN bit in the USART_CR2 register,
<> 139:856d2700e60b 2265 * - CLKEN bit in the USART_CR2 register,
<> 139:856d2700e60b 2266 * - SCEN bit in the USART_CR3 register,
<> 139:856d2700e60b 2267 * - IREN bit in the USART_CR3 register,
<> 139:856d2700e60b 2268 * This function also sets the UART/USART in Half Duplex mode.
<> 139:856d2700e60b 2269 * @note Macro @ref IS_UART_HALFDUPLEX_INSTANCE(USARTx) can be used to check whether or not
<> 139:856d2700e60b 2270 * Half-Duplex mode is supported by the USARTx instance.
<> 139:856d2700e60b 2271 * @note Call of this function is equivalent to following function call sequence :
<> 139:856d2700e60b 2272 * - Clear LINEN in CR2 using @ref LL_USART_DisableLIN() function
<> 139:856d2700e60b 2273 * - Clear CLKEN in CR2 using @ref LL_USART_DisableSCLKOutput() function
<> 139:856d2700e60b 2274 * - Clear SCEN in CR3 using @ref LL_USART_DisableSmartcard() function
<> 139:856d2700e60b 2275 * - Clear IREN in CR3 using @ref LL_USART_DisableIrda() function
<> 139:856d2700e60b 2276 * - Set HDSEL in CR3 using @ref LL_USART_EnableHalfDuplex() function
<> 139:856d2700e60b 2277 * @note Other remaining configurations items related to Half Duplex Mode
<> 139:856d2700e60b 2278 * (as Baud Rate, Word length, Parity, ...) should be set using
<> 139:856d2700e60b 2279 * dedicated functions
<> 139:856d2700e60b 2280 * @rmtoll CR2 LINEN LL_USART_ConfigHalfDuplexMode\n
<> 139:856d2700e60b 2281 * CR2 CLKEN LL_USART_ConfigHalfDuplexMode\n
<> 139:856d2700e60b 2282 * CR3 HDSEL LL_USART_ConfigHalfDuplexMode\n
<> 139:856d2700e60b 2283 * CR3 SCEN LL_USART_ConfigHalfDuplexMode\n
<> 139:856d2700e60b 2284 * CR3 IREN LL_USART_ConfigHalfDuplexMode
<> 139:856d2700e60b 2285 * @param USARTx USART Instance
<> 139:856d2700e60b 2286 * @retval None
<> 139:856d2700e60b 2287 */
<> 139:856d2700e60b 2288 __STATIC_INLINE void LL_USART_ConfigHalfDuplexMode(USART_TypeDef *USARTx)
<> 139:856d2700e60b 2289 {
<> 139:856d2700e60b 2290 /* In Half Duplex mode, the following bits must be kept cleared:
<> 139:856d2700e60b 2291 - LINEN and CLKEN bits in the USART_CR2 register,
<> 139:856d2700e60b 2292 - SCEN and IREN bits in the USART_CR3 register.*/
<> 139:856d2700e60b 2293 CLEAR_BIT(USARTx->CR2, (USART_CR2_LINEN | USART_CR2_CLKEN));
<> 139:856d2700e60b 2294 CLEAR_BIT(USARTx->CR3, (USART_CR3_SCEN | USART_CR3_IREN));
<> 139:856d2700e60b 2295 /* set the UART/USART in Half Duplex mode */
<> 139:856d2700e60b 2296 SET_BIT(USARTx->CR3, USART_CR3_HDSEL);
<> 139:856d2700e60b 2297 }
<> 139:856d2700e60b 2298
<> 139:856d2700e60b 2299 /**
<> 139:856d2700e60b 2300 * @brief Perform basic configuration of USART for enabling use in Smartcard Mode
<> 139:856d2700e60b 2301 * @note In Smartcard mode, the following bits must be kept cleared:
<> 139:856d2700e60b 2302 * - LINEN bit in the USART_CR2 register,
<> 139:856d2700e60b 2303 * - IREN bit in the USART_CR3 register,
<> 139:856d2700e60b 2304 * - HDSEL bit in the USART_CR3 register.
<> 139:856d2700e60b 2305 * This function also configures Stop bits to 1.5 bits and
<> 139:856d2700e60b 2306 * sets the USART in Smartcard mode (SCEN bit).
<> 139:856d2700e60b 2307 * Clock Output is also enabled (CLKEN).
<> 139:856d2700e60b 2308 * @note Macro @ref IS_SMARTCARD_INSTANCE(USARTx) can be used to check whether or not
<> 139:856d2700e60b 2309 * Smartcard feature is supported by the USARTx instance.
<> 139:856d2700e60b 2310 * @note Call of this function is equivalent to following function call sequence :
<> 139:856d2700e60b 2311 * - Clear LINEN in CR2 using @ref LL_USART_DisableLIN() function
<> 139:856d2700e60b 2312 * - Clear IREN in CR3 using @ref LL_USART_DisableIrda() function
<> 139:856d2700e60b 2313 * - Clear HDSEL in CR3 using @ref LL_USART_DisableHalfDuplex() function
<> 139:856d2700e60b 2314 * - Configure STOP in CR2 using @ref LL_USART_SetStopBitsLength() function
<> 139:856d2700e60b 2315 * - Set CLKEN in CR2 using @ref LL_USART_EnableSCLKOutput() function
<> 139:856d2700e60b 2316 * - Set SCEN in CR3 using @ref LL_USART_EnableSmartcard() function
<> 139:856d2700e60b 2317 * @note Other remaining configurations items related to Smartcard Mode
<> 139:856d2700e60b 2318 * (as Baud Rate, Word length, Parity, ...) should be set using
<> 139:856d2700e60b 2319 * dedicated functions
<> 139:856d2700e60b 2320 * @rmtoll CR2 LINEN LL_USART_ConfigSmartcardMode\n
<> 139:856d2700e60b 2321 * CR2 STOP LL_USART_ConfigSmartcardMode\n
<> 139:856d2700e60b 2322 * CR2 CLKEN LL_USART_ConfigSmartcardMode\n
<> 139:856d2700e60b 2323 * CR3 HDSEL LL_USART_ConfigSmartcardMode\n
<> 139:856d2700e60b 2324 * CR3 SCEN LL_USART_ConfigSmartcardMode
<> 139:856d2700e60b 2325 * @param USARTx USART Instance
<> 139:856d2700e60b 2326 * @retval None
<> 139:856d2700e60b 2327 */
<> 139:856d2700e60b 2328 __STATIC_INLINE void LL_USART_ConfigSmartcardMode(USART_TypeDef *USARTx)
<> 139:856d2700e60b 2329 {
<> 139:856d2700e60b 2330 /* In Smartcard mode, the following bits must be kept cleared:
<> 139:856d2700e60b 2331 - LINEN bit in the USART_CR2 register,
<> 139:856d2700e60b 2332 - IREN and HDSEL bits in the USART_CR3 register.*/
<> 139:856d2700e60b 2333 CLEAR_BIT(USARTx->CR2, (USART_CR2_LINEN));
<> 139:856d2700e60b 2334 CLEAR_BIT(USARTx->CR3, (USART_CR3_IREN | USART_CR3_HDSEL));
<> 139:856d2700e60b 2335 /* Configure Stop bits to 1.5 bits */
<> 139:856d2700e60b 2336 /* Synchronous mode is activated by default */
<> 139:856d2700e60b 2337 SET_BIT(USARTx->CR2, (USART_CR2_STOP_0 | USART_CR2_STOP_1 | USART_CR2_CLKEN));
<> 139:856d2700e60b 2338 /* set the UART/USART in Smartcard mode */
<> 139:856d2700e60b 2339 SET_BIT(USARTx->CR3, USART_CR3_SCEN);
<> 139:856d2700e60b 2340 }
<> 139:856d2700e60b 2341
<> 139:856d2700e60b 2342 /**
<> 139:856d2700e60b 2343 * @brief Perform basic configuration of USART for enabling use in Irda Mode
<> 139:856d2700e60b 2344 * @note In IRDA mode, the following bits must be kept cleared:
<> 139:856d2700e60b 2345 * - LINEN bit in the USART_CR2 register,
<> 139:856d2700e60b 2346 * - STOP and CLKEN bits in the USART_CR2 register,
<> 139:856d2700e60b 2347 * - SCEN bit in the USART_CR3 register,
<> 139:856d2700e60b 2348 * - HDSEL bit in the USART_CR3 register.
<> 139:856d2700e60b 2349 * This function also sets the UART/USART in IRDA mode (IREN bit).
<> 139:856d2700e60b 2350 * @note Macro @ref IS_IRDA_INSTANCE(USARTx) can be used to check whether or not
<> 139:856d2700e60b 2351 * IrDA feature is supported by the USARTx instance.
<> 139:856d2700e60b 2352 * @note Call of this function is equivalent to following function call sequence :
<> 139:856d2700e60b 2353 * - Clear LINEN in CR2 using @ref LL_USART_DisableLIN() function
<> 139:856d2700e60b 2354 * - Clear CLKEN in CR2 using @ref LL_USART_DisableSCLKOutput() function
<> 139:856d2700e60b 2355 * - Clear SCEN in CR3 using @ref LL_USART_DisableSmartcard() function
<> 139:856d2700e60b 2356 * - Clear HDSEL in CR3 using @ref LL_USART_DisableHalfDuplex() function
<> 139:856d2700e60b 2357 * - Configure STOP in CR2 using @ref LL_USART_SetStopBitsLength() function
<> 139:856d2700e60b 2358 * - Set IREN in CR3 using @ref LL_USART_EnableIrda() function
<> 139:856d2700e60b 2359 * @note Other remaining configurations items related to Irda Mode
<> 139:856d2700e60b 2360 * (as Baud Rate, Word length, Power mode, ...) should be set using
<> 139:856d2700e60b 2361 * dedicated functions
<> 139:856d2700e60b 2362 * @rmtoll CR2 LINEN LL_USART_ConfigIrdaMode\n
<> 139:856d2700e60b 2363 * CR2 CLKEN LL_USART_ConfigIrdaMode\n
<> 139:856d2700e60b 2364 * CR2 STOP LL_USART_ConfigIrdaMode\n
<> 139:856d2700e60b 2365 * CR3 SCEN LL_USART_ConfigIrdaMode\n
<> 139:856d2700e60b 2366 * CR3 HDSEL LL_USART_ConfigIrdaMode\n
<> 139:856d2700e60b 2367 * CR3 IREN LL_USART_ConfigIrdaMode
<> 139:856d2700e60b 2368 * @param USARTx USART Instance
<> 139:856d2700e60b 2369 * @retval None
<> 139:856d2700e60b 2370 */
<> 139:856d2700e60b 2371 __STATIC_INLINE void LL_USART_ConfigIrdaMode(USART_TypeDef *USARTx)
<> 139:856d2700e60b 2372 {
<> 139:856d2700e60b 2373 /* In IRDA mode, the following bits must be kept cleared:
<> 139:856d2700e60b 2374 - LINEN, STOP and CLKEN bits in the USART_CR2 register,
<> 139:856d2700e60b 2375 - SCEN and HDSEL bits in the USART_CR3 register.*/
<> 139:856d2700e60b 2376 CLEAR_BIT(USARTx->CR2, (USART_CR2_LINEN | USART_CR2_CLKEN | USART_CR2_STOP));
<> 139:856d2700e60b 2377 CLEAR_BIT(USARTx->CR3, (USART_CR3_SCEN | USART_CR3_HDSEL));
<> 139:856d2700e60b 2378 /* set the UART/USART in IRDA mode */
<> 139:856d2700e60b 2379 SET_BIT(USARTx->CR3, USART_CR3_IREN);
<> 139:856d2700e60b 2380 }
<> 139:856d2700e60b 2381
<> 139:856d2700e60b 2382 /**
<> 139:856d2700e60b 2383 * @brief Perform basic configuration of USART for enabling use in Multi processor Mode
<> 139:856d2700e60b 2384 * (several USARTs connected in a network, one of the USARTs can be the master,
<> 139:856d2700e60b 2385 * its TX output connected to the RX inputs of the other slaves USARTs).
<> 139:856d2700e60b 2386 * @note In MultiProcessor mode, the following bits must be kept cleared:
<> 139:856d2700e60b 2387 * - LINEN bit in the USART_CR2 register,
<> 139:856d2700e60b 2388 * - CLKEN bit in the USART_CR2 register,
<> 139:856d2700e60b 2389 * - SCEN bit in the USART_CR3 register,
<> 139:856d2700e60b 2390 * - IREN bit in the USART_CR3 register,
<> 139:856d2700e60b 2391 * - HDSEL bit in the USART_CR3 register.
<> 139:856d2700e60b 2392 * @note Call of this function is equivalent to following function call sequence :
<> 139:856d2700e60b 2393 * - Clear LINEN in CR2 using @ref LL_USART_DisableLIN() function
<> 139:856d2700e60b 2394 * - Clear CLKEN in CR2 using @ref LL_USART_DisableSCLKOutput() function
<> 139:856d2700e60b 2395 * - Clear SCEN in CR3 using @ref LL_USART_DisableSmartcard() function
<> 139:856d2700e60b 2396 * - Clear IREN in CR3 using @ref LL_USART_DisableIrda() function
<> 139:856d2700e60b 2397 * - Clear HDSEL in CR3 using @ref LL_USART_DisableHalfDuplex() function
<> 139:856d2700e60b 2398 * @note Other remaining configurations items related to Multi processor Mode
<> 139:856d2700e60b 2399 * (as Baud Rate, Wake Up Method, Node address, ...) should be set using
<> 139:856d2700e60b 2400 * dedicated functions
<> 139:856d2700e60b 2401 * @rmtoll CR2 LINEN LL_USART_ConfigMultiProcessMode\n
<> 139:856d2700e60b 2402 * CR2 CLKEN LL_USART_ConfigMultiProcessMode\n
<> 139:856d2700e60b 2403 * CR3 SCEN LL_USART_ConfigMultiProcessMode\n
<> 139:856d2700e60b 2404 * CR3 HDSEL LL_USART_ConfigMultiProcessMode\n
<> 139:856d2700e60b 2405 * CR3 IREN LL_USART_ConfigMultiProcessMode
<> 139:856d2700e60b 2406 * @param USARTx USART Instance
<> 139:856d2700e60b 2407 * @retval None
<> 139:856d2700e60b 2408 */
<> 139:856d2700e60b 2409 __STATIC_INLINE void LL_USART_ConfigMultiProcessMode(USART_TypeDef *USARTx)
<> 139:856d2700e60b 2410 {
<> 139:856d2700e60b 2411 /* In Multi Processor mode, the following bits must be kept cleared:
<> 139:856d2700e60b 2412 - LINEN and CLKEN bits in the USART_CR2 register,
<> 139:856d2700e60b 2413 - IREN, SCEN and HDSEL bits in the USART_CR3 register.*/
<> 139:856d2700e60b 2414 CLEAR_BIT(USARTx->CR2, (USART_CR2_LINEN | USART_CR2_CLKEN));
<> 139:856d2700e60b 2415 CLEAR_BIT(USARTx->CR3, (USART_CR3_SCEN | USART_CR3_HDSEL | USART_CR3_IREN));
<> 139:856d2700e60b 2416 }
<> 139:856d2700e60b 2417
<> 139:856d2700e60b 2418 /**
<> 139:856d2700e60b 2419 * @}
<> 139:856d2700e60b 2420 */
<> 139:856d2700e60b 2421
<> 139:856d2700e60b 2422 /** @defgroup USART_LL_EF_FLAG_Management FLAG_Management
<> 139:856d2700e60b 2423 * @{
<> 139:856d2700e60b 2424 */
<> 139:856d2700e60b 2425
<> 139:856d2700e60b 2426 /**
<> 139:856d2700e60b 2427 * @brief Check if the USART Parity Error Flag is set or not
<> 139:856d2700e60b 2428 * @rmtoll ISR PE LL_USART_IsActiveFlag_PE
<> 139:856d2700e60b 2429 * @param USARTx USART Instance
<> 139:856d2700e60b 2430 * @retval State of bit (1 or 0).
<> 139:856d2700e60b 2431 */
<> 139:856d2700e60b 2432 __STATIC_INLINE uint32_t LL_USART_IsActiveFlag_PE(USART_TypeDef *USARTx)
<> 139:856d2700e60b 2433 {
<> 139:856d2700e60b 2434 return (READ_BIT(USARTx->ISR, USART_ISR_PE) == (USART_ISR_PE));
<> 139:856d2700e60b 2435 }
<> 139:856d2700e60b 2436
<> 139:856d2700e60b 2437 /**
<> 139:856d2700e60b 2438 * @brief Check if the USART Framing Error Flag is set or not
<> 139:856d2700e60b 2439 * @rmtoll ISR FE LL_USART_IsActiveFlag_FE
<> 139:856d2700e60b 2440 * @param USARTx USART Instance
<> 139:856d2700e60b 2441 * @retval State of bit (1 or 0).
<> 139:856d2700e60b 2442 */
<> 139:856d2700e60b 2443 __STATIC_INLINE uint32_t LL_USART_IsActiveFlag_FE(USART_TypeDef *USARTx)
<> 139:856d2700e60b 2444 {
<> 139:856d2700e60b 2445 return (READ_BIT(USARTx->ISR, USART_ISR_FE) == (USART_ISR_FE));
<> 139:856d2700e60b 2446 }
<> 139:856d2700e60b 2447
<> 139:856d2700e60b 2448 /**
<> 139:856d2700e60b 2449 * @brief Check if the USART Noise error detected Flag is set or not
<> 139:856d2700e60b 2450 * @rmtoll ISR NF LL_USART_IsActiveFlag_NE
<> 139:856d2700e60b 2451 * @param USARTx USART Instance
<> 139:856d2700e60b 2452 * @retval State of bit (1 or 0).
<> 139:856d2700e60b 2453 */
<> 139:856d2700e60b 2454 __STATIC_INLINE uint32_t LL_USART_IsActiveFlag_NE(USART_TypeDef *USARTx)
<> 139:856d2700e60b 2455 {
<> 139:856d2700e60b 2456 return (READ_BIT(USARTx->ISR, USART_ISR_NE) == (USART_ISR_NE));
<> 139:856d2700e60b 2457 }
<> 139:856d2700e60b 2458
<> 139:856d2700e60b 2459 /**
<> 139:856d2700e60b 2460 * @brief Check if the USART OverRun Error Flag is set or not
<> 139:856d2700e60b 2461 * @rmtoll ISR ORE LL_USART_IsActiveFlag_ORE
<> 139:856d2700e60b 2462 * @param USARTx USART Instance
<> 139:856d2700e60b 2463 * @retval State of bit (1 or 0).
<> 139:856d2700e60b 2464 */
<> 139:856d2700e60b 2465 __STATIC_INLINE uint32_t LL_USART_IsActiveFlag_ORE(USART_TypeDef *USARTx)
<> 139:856d2700e60b 2466 {
<> 139:856d2700e60b 2467 return (READ_BIT(USARTx->ISR, USART_ISR_ORE) == (USART_ISR_ORE));
<> 139:856d2700e60b 2468 }
<> 139:856d2700e60b 2469
<> 139:856d2700e60b 2470 /**
<> 139:856d2700e60b 2471 * @brief Check if the USART IDLE line detected Flag is set or not
<> 139:856d2700e60b 2472 * @rmtoll ISR IDLE LL_USART_IsActiveFlag_IDLE
<> 139:856d2700e60b 2473 * @param USARTx USART Instance
<> 139:856d2700e60b 2474 * @retval State of bit (1 or 0).
<> 139:856d2700e60b 2475 */
<> 139:856d2700e60b 2476 __STATIC_INLINE uint32_t LL_USART_IsActiveFlag_IDLE(USART_TypeDef *USARTx)
<> 139:856d2700e60b 2477 {
<> 139:856d2700e60b 2478 return (READ_BIT(USARTx->ISR, USART_ISR_IDLE) == (USART_ISR_IDLE));
<> 139:856d2700e60b 2479 }
<> 139:856d2700e60b 2480
<> 139:856d2700e60b 2481 /**
<> 139:856d2700e60b 2482 * @brief Check if the USART Read Data Register Not Empty Flag is set or not
<> 139:856d2700e60b 2483 * @rmtoll ISR RXNE LL_USART_IsActiveFlag_RXNE
<> 139:856d2700e60b 2484 * @param USARTx USART Instance
<> 139:856d2700e60b 2485 * @retval State of bit (1 or 0).
<> 139:856d2700e60b 2486 */
<> 139:856d2700e60b 2487 __STATIC_INLINE uint32_t LL_USART_IsActiveFlag_RXNE(USART_TypeDef *USARTx)
<> 139:856d2700e60b 2488 {
<> 139:856d2700e60b 2489 return (READ_BIT(USARTx->ISR, USART_ISR_RXNE) == (USART_ISR_RXNE));
<> 139:856d2700e60b 2490 }
<> 139:856d2700e60b 2491
<> 139:856d2700e60b 2492 /**
<> 139:856d2700e60b 2493 * @brief Check if the USART Transmission Complete Flag is set or not
<> 139:856d2700e60b 2494 * @rmtoll ISR TC LL_USART_IsActiveFlag_TC
<> 139:856d2700e60b 2495 * @param USARTx USART Instance
<> 139:856d2700e60b 2496 * @retval State of bit (1 or 0).
<> 139:856d2700e60b 2497 */
<> 139:856d2700e60b 2498 __STATIC_INLINE uint32_t LL_USART_IsActiveFlag_TC(USART_TypeDef *USARTx)
<> 139:856d2700e60b 2499 {
<> 139:856d2700e60b 2500 return (READ_BIT(USARTx->ISR, USART_ISR_TC) == (USART_ISR_TC));
<> 139:856d2700e60b 2501 }
<> 139:856d2700e60b 2502
<> 139:856d2700e60b 2503 /**
<> 139:856d2700e60b 2504 * @brief Check if the USART Transmit Data Register Empty Flag is set or not
<> 139:856d2700e60b 2505 * @rmtoll ISR TXE LL_USART_IsActiveFlag_TXE
<> 139:856d2700e60b 2506 * @param USARTx USART Instance
<> 139:856d2700e60b 2507 * @retval State of bit (1 or 0).
<> 139:856d2700e60b 2508 */
<> 139:856d2700e60b 2509 __STATIC_INLINE uint32_t LL_USART_IsActiveFlag_TXE(USART_TypeDef *USARTx)
<> 139:856d2700e60b 2510 {
<> 139:856d2700e60b 2511 return (READ_BIT(USARTx->ISR, USART_ISR_TXE) == (USART_ISR_TXE));
<> 139:856d2700e60b 2512 }
<> 139:856d2700e60b 2513
<> 139:856d2700e60b 2514 /**
<> 139:856d2700e60b 2515 * @brief Check if the USART LIN Break Detection Flag is set or not
<> 139:856d2700e60b 2516 * @note Macro @ref IS_UART_LIN_INSTANCE(USARTx) can be used to check whether or not
<> 139:856d2700e60b 2517 * LIN feature is supported by the USARTx instance.
<> 139:856d2700e60b 2518 * @rmtoll ISR LBDF LL_USART_IsActiveFlag_LBD
<> 139:856d2700e60b 2519 * @param USARTx USART Instance
<> 139:856d2700e60b 2520 * @retval State of bit (1 or 0).
<> 139:856d2700e60b 2521 */
<> 139:856d2700e60b 2522 __STATIC_INLINE uint32_t LL_USART_IsActiveFlag_LBD(USART_TypeDef *USARTx)
<> 139:856d2700e60b 2523 {
<> 139:856d2700e60b 2524 return (READ_BIT(USARTx->ISR, USART_ISR_LBDF) == (USART_ISR_LBDF));
<> 139:856d2700e60b 2525 }
<> 139:856d2700e60b 2526
<> 139:856d2700e60b 2527 /**
<> 139:856d2700e60b 2528 * @brief Check if the USART CTS interrupt Flag is set or not
<> 139:856d2700e60b 2529 * @note Macro @ref IS_UART_HWFLOW_INSTANCE(USARTx) can be used to check whether or not
<> 139:856d2700e60b 2530 * Hardware Flow control feature is supported by the USARTx instance.
<> 139:856d2700e60b 2531 * @rmtoll ISR CTSIF LL_USART_IsActiveFlag_nCTS
<> 139:856d2700e60b 2532 * @param USARTx USART Instance
<> 139:856d2700e60b 2533 * @retval State of bit (1 or 0).
<> 139:856d2700e60b 2534 */
<> 139:856d2700e60b 2535 __STATIC_INLINE uint32_t LL_USART_IsActiveFlag_nCTS(USART_TypeDef *USARTx)
<> 139:856d2700e60b 2536 {
<> 139:856d2700e60b 2537 return (READ_BIT(USARTx->ISR, USART_ISR_CTSIF) == (USART_ISR_CTSIF));
<> 139:856d2700e60b 2538 }
<> 139:856d2700e60b 2539
<> 139:856d2700e60b 2540 /**
<> 139:856d2700e60b 2541 * @brief Check if the USART CTS Flag is set or not
<> 139:856d2700e60b 2542 * @note Macro @ref IS_UART_HWFLOW_INSTANCE(USARTx) can be used to check whether or not
<> 139:856d2700e60b 2543 * Hardware Flow control feature is supported by the USARTx instance.
<> 139:856d2700e60b 2544 * @rmtoll ISR CTS LL_USART_IsActiveFlag_CTS
<> 139:856d2700e60b 2545 * @param USARTx USART Instance
<> 139:856d2700e60b 2546 * @retval State of bit (1 or 0).
<> 139:856d2700e60b 2547 */
<> 139:856d2700e60b 2548 __STATIC_INLINE uint32_t LL_USART_IsActiveFlag_CTS(USART_TypeDef *USARTx)
<> 139:856d2700e60b 2549 {
<> 139:856d2700e60b 2550 return (READ_BIT(USARTx->ISR, USART_ISR_CTS) == (USART_ISR_CTS));
<> 139:856d2700e60b 2551 }
<> 139:856d2700e60b 2552
<> 139:856d2700e60b 2553 /**
<> 139:856d2700e60b 2554 * @brief Check if the USART Receiver Time Out Flag is set or not
<> 139:856d2700e60b 2555 * @rmtoll ISR RTOF LL_USART_IsActiveFlag_RTO
<> 139:856d2700e60b 2556 * @param USARTx USART Instance
<> 139:856d2700e60b 2557 * @retval State of bit (1 or 0).
<> 139:856d2700e60b 2558 */
<> 139:856d2700e60b 2559 __STATIC_INLINE uint32_t LL_USART_IsActiveFlag_RTO(USART_TypeDef *USARTx)
<> 139:856d2700e60b 2560 {
<> 139:856d2700e60b 2561 return (READ_BIT(USARTx->ISR, USART_ISR_RTOF) == (USART_ISR_RTOF));
<> 139:856d2700e60b 2562 }
<> 139:856d2700e60b 2563
<> 139:856d2700e60b 2564 /**
<> 139:856d2700e60b 2565 * @brief Check if the USART End Of Block Flag is set or not
<> 139:856d2700e60b 2566 * @note Macro @ref IS_SMARTCARD_INSTANCE(USARTx) can be used to check whether or not
<> 139:856d2700e60b 2567 * Smartcard feature is supported by the USARTx instance.
<> 139:856d2700e60b 2568 * @rmtoll ISR EOBF LL_USART_IsActiveFlag_EOB
<> 139:856d2700e60b 2569 * @param USARTx USART Instance
<> 139:856d2700e60b 2570 * @retval State of bit (1 or 0).
<> 139:856d2700e60b 2571 */
<> 139:856d2700e60b 2572 __STATIC_INLINE uint32_t LL_USART_IsActiveFlag_EOB(USART_TypeDef *USARTx)
<> 139:856d2700e60b 2573 {
<> 139:856d2700e60b 2574 return (READ_BIT(USARTx->ISR, USART_ISR_EOBF) == (USART_ISR_EOBF));
<> 139:856d2700e60b 2575 }
<> 139:856d2700e60b 2576
<> 139:856d2700e60b 2577 /**
<> 139:856d2700e60b 2578 * @brief Check if the USART Auto-Baud Rate Error Flag is set or not
<> 139:856d2700e60b 2579 * @note Macro @ref IS_USART_AUTOBAUDRATE_DETECTION_INSTANCE(USARTx) can be used to check whether or not
<> 139:856d2700e60b 2580 * Auto Baud Rate detection feature is supported by the USARTx instance.
<> 139:856d2700e60b 2581 * @rmtoll ISR ABRE LL_USART_IsActiveFlag_ABRE
<> 139:856d2700e60b 2582 * @param USARTx USART Instance
<> 139:856d2700e60b 2583 * @retval State of bit (1 or 0).
<> 139:856d2700e60b 2584 */
<> 139:856d2700e60b 2585 __STATIC_INLINE uint32_t LL_USART_IsActiveFlag_ABRE(USART_TypeDef *USARTx)
<> 139:856d2700e60b 2586 {
<> 139:856d2700e60b 2587 return (READ_BIT(USARTx->ISR, USART_ISR_ABRE) == (USART_ISR_ABRE));
<> 139:856d2700e60b 2588 }
<> 139:856d2700e60b 2589
<> 139:856d2700e60b 2590 /**
<> 139:856d2700e60b 2591 * @brief Check if the USART Auto-Baud Rate Flag is set or not
<> 139:856d2700e60b 2592 * @note Macro @ref IS_USART_AUTOBAUDRATE_DETECTION_INSTANCE(USARTx) can be used to check whether or not
<> 139:856d2700e60b 2593 * Auto Baud Rate detection feature is supported by the USARTx instance.
<> 139:856d2700e60b 2594 * @rmtoll ISR ABRF LL_USART_IsActiveFlag_ABR
<> 139:856d2700e60b 2595 * @param USARTx USART Instance
<> 139:856d2700e60b 2596 * @retval State of bit (1 or 0).
<> 139:856d2700e60b 2597 */
<> 139:856d2700e60b 2598 __STATIC_INLINE uint32_t LL_USART_IsActiveFlag_ABR(USART_TypeDef *USARTx)
<> 139:856d2700e60b 2599 {
<> 139:856d2700e60b 2600 return (READ_BIT(USARTx->ISR, USART_ISR_ABRF) == (USART_ISR_ABRF));
<> 139:856d2700e60b 2601 }
<> 139:856d2700e60b 2602
<> 139:856d2700e60b 2603 /**
<> 139:856d2700e60b 2604 * @brief Check if the USART Busy Flag is set or not
<> 139:856d2700e60b 2605 * @rmtoll ISR BUSY LL_USART_IsActiveFlag_BUSY
<> 139:856d2700e60b 2606 * @param USARTx USART Instance
<> 139:856d2700e60b 2607 * @retval State of bit (1 or 0).
<> 139:856d2700e60b 2608 */
<> 139:856d2700e60b 2609 __STATIC_INLINE uint32_t LL_USART_IsActiveFlag_BUSY(USART_TypeDef *USARTx)
<> 139:856d2700e60b 2610 {
<> 139:856d2700e60b 2611 return (READ_BIT(USARTx->ISR, USART_ISR_BUSY) == (USART_ISR_BUSY));
<> 139:856d2700e60b 2612 }
<> 139:856d2700e60b 2613
<> 139:856d2700e60b 2614 /**
<> 139:856d2700e60b 2615 * @brief Check if the USART Character Match Flag is set or not
<> 139:856d2700e60b 2616 * @rmtoll ISR CMF LL_USART_IsActiveFlag_CM
<> 139:856d2700e60b 2617 * @param USARTx USART Instance
<> 139:856d2700e60b 2618 * @retval State of bit (1 or 0).
<> 139:856d2700e60b 2619 */
<> 139:856d2700e60b 2620 __STATIC_INLINE uint32_t LL_USART_IsActiveFlag_CM(USART_TypeDef *USARTx)
<> 139:856d2700e60b 2621 {
<> 139:856d2700e60b 2622 return (READ_BIT(USARTx->ISR, USART_ISR_CMF) == (USART_ISR_CMF));
<> 139:856d2700e60b 2623 }
<> 139:856d2700e60b 2624
<> 139:856d2700e60b 2625 /**
<> 139:856d2700e60b 2626 * @brief Check if the USART Send Break Flag is set or not
<> 139:856d2700e60b 2627 * @rmtoll ISR SBKF LL_USART_IsActiveFlag_SBK
<> 139:856d2700e60b 2628 * @param USARTx USART Instance
<> 139:856d2700e60b 2629 * @retval State of bit (1 or 0).
<> 139:856d2700e60b 2630 */
<> 139:856d2700e60b 2631 __STATIC_INLINE uint32_t LL_USART_IsActiveFlag_SBK(USART_TypeDef *USARTx)
<> 139:856d2700e60b 2632 {
<> 139:856d2700e60b 2633 return (READ_BIT(USARTx->ISR, USART_ISR_SBKF) == (USART_ISR_SBKF));
<> 139:856d2700e60b 2634 }
<> 139:856d2700e60b 2635
<> 139:856d2700e60b 2636 /**
<> 139:856d2700e60b 2637 * @brief Check if the USART Receive Wake Up from mute mode Flag is set or not
<> 139:856d2700e60b 2638 * @rmtoll ISR RWU LL_USART_IsActiveFlag_RWU
<> 139:856d2700e60b 2639 * @param USARTx USART Instance
<> 139:856d2700e60b 2640 * @retval State of bit (1 or 0).
<> 139:856d2700e60b 2641 */
<> 139:856d2700e60b 2642 __STATIC_INLINE uint32_t LL_USART_IsActiveFlag_RWU(USART_TypeDef *USARTx)
<> 139:856d2700e60b 2643 {
<> 139:856d2700e60b 2644 return (READ_BIT(USARTx->ISR, USART_ISR_RWU) == (USART_ISR_RWU));
<> 139:856d2700e60b 2645 }
<> 139:856d2700e60b 2646
<> 139:856d2700e60b 2647
<> 139:856d2700e60b 2648 /**
<> 139:856d2700e60b 2649 * @brief Check if the USART Transmit Enable Acknowledge Flag is set or not
<> 139:856d2700e60b 2650 * @rmtoll ISR TEACK LL_USART_IsActiveFlag_TEACK
<> 139:856d2700e60b 2651 * @param USARTx USART Instance
<> 139:856d2700e60b 2652 * @retval State of bit (1 or 0).
<> 139:856d2700e60b 2653 */
<> 139:856d2700e60b 2654 __STATIC_INLINE uint32_t LL_USART_IsActiveFlag_TEACK(USART_TypeDef *USARTx)
<> 139:856d2700e60b 2655 {
<> 139:856d2700e60b 2656 return (READ_BIT(USARTx->ISR, USART_ISR_TEACK) == (USART_ISR_TEACK));
<> 139:856d2700e60b 2657 }
<> 139:856d2700e60b 2658
<> 139:856d2700e60b 2659
<> 139:856d2700e60b 2660 #if defined(USART_TCBGT_SUPPORT)
<> 139:856d2700e60b 2661 /* Function available only on devices supporting Transmit Complete before Guard Time feature */
<> 139:856d2700e60b 2662 /**
<> 139:856d2700e60b 2663 * @brief Check if the Smartcard Transmission Complete Before Guard Time Flag is set or not
<> 139:856d2700e60b 2664 * @rmtoll ISR TCBGT LL_USART_IsActiveFlag_TCBGT
<> 139:856d2700e60b 2665 * @param USARTx USART Instance
<> 139:856d2700e60b 2666 * @retval State of bit (1 or 0).
<> 139:856d2700e60b 2667 */
<> 139:856d2700e60b 2668 __STATIC_INLINE uint32_t LL_USART_IsActiveFlag_TCBGT(USART_TypeDef *USARTx)
<> 139:856d2700e60b 2669 {
<> 139:856d2700e60b 2670 return (READ_BIT(USARTx->ISR, USART_ISR_TCBGT) == (USART_ISR_TCBGT));
<> 139:856d2700e60b 2671 }
<> 139:856d2700e60b 2672 #endif
<> 139:856d2700e60b 2673
<> 139:856d2700e60b 2674 /**
<> 139:856d2700e60b 2675 * @brief Clear Parity Error Flag
<> 139:856d2700e60b 2676 * @rmtoll ICR PECF LL_USART_ClearFlag_PE
<> 139:856d2700e60b 2677 * @param USARTx USART Instance
<> 139:856d2700e60b 2678 * @retval None
<> 139:856d2700e60b 2679 */
<> 139:856d2700e60b 2680 __STATIC_INLINE void LL_USART_ClearFlag_PE(USART_TypeDef *USARTx)
<> 139:856d2700e60b 2681 {
<> 139:856d2700e60b 2682 WRITE_REG(USARTx->ICR, USART_ICR_PECF);
<> 139:856d2700e60b 2683 }
<> 139:856d2700e60b 2684
<> 139:856d2700e60b 2685 /**
<> 139:856d2700e60b 2686 * @brief Clear Framing Error Flag
<> 139:856d2700e60b 2687 * @rmtoll ICR FECF LL_USART_ClearFlag_FE
<> 139:856d2700e60b 2688 * @param USARTx USART Instance
<> 139:856d2700e60b 2689 * @retval None
<> 139:856d2700e60b 2690 */
<> 139:856d2700e60b 2691 __STATIC_INLINE void LL_USART_ClearFlag_FE(USART_TypeDef *USARTx)
<> 139:856d2700e60b 2692 {
<> 139:856d2700e60b 2693 WRITE_REG(USARTx->ICR, USART_ICR_FECF);
<> 139:856d2700e60b 2694 }
<> 139:856d2700e60b 2695
<> 139:856d2700e60b 2696 /**
<> 139:856d2700e60b 2697 * @brief Clear Noise detected Flag
<> 139:856d2700e60b 2698 * @rmtoll ICR NCF LL_USART_ClearFlag_NE
<> 139:856d2700e60b 2699 * @param USARTx USART Instance
<> 139:856d2700e60b 2700 * @retval None
<> 139:856d2700e60b 2701 */
<> 139:856d2700e60b 2702 __STATIC_INLINE void LL_USART_ClearFlag_NE(USART_TypeDef *USARTx)
<> 139:856d2700e60b 2703 {
<> 139:856d2700e60b 2704 WRITE_REG(USARTx->ICR, USART_ICR_NCF);
<> 139:856d2700e60b 2705 }
<> 139:856d2700e60b 2706
<> 139:856d2700e60b 2707 /**
<> 139:856d2700e60b 2708 * @brief Clear OverRun Error Flag
<> 139:856d2700e60b 2709 * @rmtoll ICR ORECF LL_USART_ClearFlag_ORE
<> 139:856d2700e60b 2710 * @param USARTx USART Instance
<> 139:856d2700e60b 2711 * @retval None
<> 139:856d2700e60b 2712 */
<> 139:856d2700e60b 2713 __STATIC_INLINE void LL_USART_ClearFlag_ORE(USART_TypeDef *USARTx)
<> 139:856d2700e60b 2714 {
<> 139:856d2700e60b 2715 WRITE_REG(USARTx->ICR, USART_ICR_ORECF);
<> 139:856d2700e60b 2716 }
<> 139:856d2700e60b 2717
<> 139:856d2700e60b 2718 /**
<> 139:856d2700e60b 2719 * @brief Clear IDLE line detected Flag
<> 139:856d2700e60b 2720 * @rmtoll ICR IDLECF LL_USART_ClearFlag_IDLE
<> 139:856d2700e60b 2721 * @param USARTx USART Instance
<> 139:856d2700e60b 2722 * @retval None
<> 139:856d2700e60b 2723 */
<> 139:856d2700e60b 2724 __STATIC_INLINE void LL_USART_ClearFlag_IDLE(USART_TypeDef *USARTx)
<> 139:856d2700e60b 2725 {
<> 139:856d2700e60b 2726 WRITE_REG(USARTx->ICR, USART_ICR_IDLECF);
<> 139:856d2700e60b 2727 }
<> 139:856d2700e60b 2728
<> 139:856d2700e60b 2729 /**
<> 139:856d2700e60b 2730 * @brief Clear Transmission Complete Flag
<> 139:856d2700e60b 2731 * @rmtoll ICR TCCF LL_USART_ClearFlag_TC
<> 139:856d2700e60b 2732 * @param USARTx USART Instance
<> 139:856d2700e60b 2733 * @retval None
<> 139:856d2700e60b 2734 */
<> 139:856d2700e60b 2735 __STATIC_INLINE void LL_USART_ClearFlag_TC(USART_TypeDef *USARTx)
<> 139:856d2700e60b 2736 {
<> 139:856d2700e60b 2737 WRITE_REG(USARTx->ICR, USART_ICR_TCCF);
<> 139:856d2700e60b 2738 }
<> 139:856d2700e60b 2739
<> 139:856d2700e60b 2740 #if defined(USART_TCBGT_SUPPORT)
<> 139:856d2700e60b 2741 /* Function available only on devices supporting Transmit Complete before Guard Time feature */
<> 139:856d2700e60b 2742 /**
<> 139:856d2700e60b 2743 * @brief Clear Smartcard Transmission Complete Before Guard Time Flag
<> 139:856d2700e60b 2744 * @rmtoll ICR TCBGTCF LL_USART_ClearFlag_TCBGT
<> 139:856d2700e60b 2745 * @param USARTx USART Instance
<> 139:856d2700e60b 2746 * @retval None
<> 139:856d2700e60b 2747 */
<> 139:856d2700e60b 2748 __STATIC_INLINE void LL_USART_ClearFlag_TCBGT(USART_TypeDef *USARTx)
<> 139:856d2700e60b 2749 {
<> 139:856d2700e60b 2750 WRITE_REG(USARTx->ICR, USART_ICR_TCBGTCF);
<> 139:856d2700e60b 2751 }
<> 139:856d2700e60b 2752 #endif
<> 139:856d2700e60b 2753
<> 139:856d2700e60b 2754 /**
<> 139:856d2700e60b 2755 * @brief Clear LIN Break Detection Flag
<> 139:856d2700e60b 2756 * @note Macro @ref IS_UART_LIN_INSTANCE(USARTx) can be used to check whether or not
<> 139:856d2700e60b 2757 * LIN feature is supported by the USARTx instance.
<> 139:856d2700e60b 2758 * @rmtoll ICR LBDCF LL_USART_ClearFlag_LBD
<> 139:856d2700e60b 2759 * @param USARTx USART Instance
<> 139:856d2700e60b 2760 * @retval None
<> 139:856d2700e60b 2761 */
<> 139:856d2700e60b 2762 __STATIC_INLINE void LL_USART_ClearFlag_LBD(USART_TypeDef *USARTx)
<> 139:856d2700e60b 2763 {
<> 139:856d2700e60b 2764 WRITE_REG(USARTx->ICR, USART_ICR_LBDCF);
<> 139:856d2700e60b 2765 }
<> 139:856d2700e60b 2766
<> 139:856d2700e60b 2767 /**
<> 139:856d2700e60b 2768 * @brief Clear CTS Interrupt Flag
<> 139:856d2700e60b 2769 * @note Macro @ref IS_UART_HWFLOW_INSTANCE(USARTx) can be used to check whether or not
<> 139:856d2700e60b 2770 * Hardware Flow control feature is supported by the USARTx instance.
<> 139:856d2700e60b 2771 * @rmtoll ICR CTSCF LL_USART_ClearFlag_nCTS
<> 139:856d2700e60b 2772 * @param USARTx USART Instance
<> 139:856d2700e60b 2773 * @retval None
<> 139:856d2700e60b 2774 */
<> 139:856d2700e60b 2775 __STATIC_INLINE void LL_USART_ClearFlag_nCTS(USART_TypeDef *USARTx)
<> 139:856d2700e60b 2776 {
<> 139:856d2700e60b 2777 WRITE_REG(USARTx->ICR, USART_ICR_CTSCF);
<> 139:856d2700e60b 2778 }
<> 139:856d2700e60b 2779
<> 139:856d2700e60b 2780 /**
<> 139:856d2700e60b 2781 * @brief Clear Receiver Time Out Flag
<> 139:856d2700e60b 2782 * @rmtoll ICR RTOCF LL_USART_ClearFlag_RTO
<> 139:856d2700e60b 2783 * @param USARTx USART Instance
<> 139:856d2700e60b 2784 * @retval None
<> 139:856d2700e60b 2785 */
<> 139:856d2700e60b 2786 __STATIC_INLINE void LL_USART_ClearFlag_RTO(USART_TypeDef *USARTx)
<> 139:856d2700e60b 2787 {
<> 139:856d2700e60b 2788 WRITE_REG(USARTx->ICR, USART_ICR_RTOCF);
<> 139:856d2700e60b 2789 }
<> 139:856d2700e60b 2790
<> 139:856d2700e60b 2791 /**
<> 139:856d2700e60b 2792 * @brief Clear End Of Block Flag
<> 139:856d2700e60b 2793 * @note Macro @ref IS_SMARTCARD_INSTANCE(USARTx) can be used to check whether or not
<> 139:856d2700e60b 2794 * Smartcard feature is supported by the USARTx instance.
<> 139:856d2700e60b 2795 * @rmtoll ICR EOBCF LL_USART_ClearFlag_EOB
<> 139:856d2700e60b 2796 * @param USARTx USART Instance
<> 139:856d2700e60b 2797 * @retval None
<> 139:856d2700e60b 2798 */
<> 139:856d2700e60b 2799 __STATIC_INLINE void LL_USART_ClearFlag_EOB(USART_TypeDef *USARTx)
<> 139:856d2700e60b 2800 {
<> 139:856d2700e60b 2801 WRITE_REG(USARTx->ICR, USART_ICR_EOBCF);
<> 139:856d2700e60b 2802 }
<> 139:856d2700e60b 2803
<> 139:856d2700e60b 2804 /**
<> 139:856d2700e60b 2805 * @brief Clear Character Match Flag
<> 139:856d2700e60b 2806 * @rmtoll ICR CMCF LL_USART_ClearFlag_CM
<> 139:856d2700e60b 2807 * @param USARTx USART Instance
<> 139:856d2700e60b 2808 * @retval None
<> 139:856d2700e60b 2809 */
<> 139:856d2700e60b 2810 __STATIC_INLINE void LL_USART_ClearFlag_CM(USART_TypeDef *USARTx)
<> 139:856d2700e60b 2811 {
<> 139:856d2700e60b 2812 WRITE_REG(USARTx->ICR, USART_ICR_CMCF);
<> 139:856d2700e60b 2813 }
<> 139:856d2700e60b 2814
<> 139:856d2700e60b 2815
<> 139:856d2700e60b 2816 /**
<> 139:856d2700e60b 2817 * @}
<> 139:856d2700e60b 2818 */
<> 139:856d2700e60b 2819
<> 139:856d2700e60b 2820 /** @defgroup USART_LL_EF_IT_Management IT_Management
<> 139:856d2700e60b 2821 * @{
<> 139:856d2700e60b 2822 */
<> 139:856d2700e60b 2823
<> 139:856d2700e60b 2824 /**
<> 139:856d2700e60b 2825 * @brief Enable IDLE Interrupt
<> 139:856d2700e60b 2826 * @rmtoll CR1 IDLEIE LL_USART_EnableIT_IDLE
<> 139:856d2700e60b 2827 * @param USARTx USART Instance
<> 139:856d2700e60b 2828 * @retval None
<> 139:856d2700e60b 2829 */
<> 139:856d2700e60b 2830 __STATIC_INLINE void LL_USART_EnableIT_IDLE(USART_TypeDef *USARTx)
<> 139:856d2700e60b 2831 {
<> 139:856d2700e60b 2832 SET_BIT(USARTx->CR1, USART_CR1_IDLEIE);
<> 139:856d2700e60b 2833 }
<> 139:856d2700e60b 2834
<> 139:856d2700e60b 2835 /**
<> 139:856d2700e60b 2836 * @brief Enable RX Not Empty Interrupt
<> 139:856d2700e60b 2837 * @rmtoll CR1 RXNEIE LL_USART_EnableIT_RXNE
<> 139:856d2700e60b 2838 * @param USARTx USART Instance
<> 139:856d2700e60b 2839 * @retval None
<> 139:856d2700e60b 2840 */
<> 139:856d2700e60b 2841 __STATIC_INLINE void LL_USART_EnableIT_RXNE(USART_TypeDef *USARTx)
<> 139:856d2700e60b 2842 {
<> 139:856d2700e60b 2843 SET_BIT(USARTx->CR1, USART_CR1_RXNEIE);
<> 139:856d2700e60b 2844 }
<> 139:856d2700e60b 2845
<> 139:856d2700e60b 2846 /**
<> 139:856d2700e60b 2847 * @brief Enable Transmission Complete Interrupt
<> 139:856d2700e60b 2848 * @rmtoll CR1 TCIE LL_USART_EnableIT_TC
<> 139:856d2700e60b 2849 * @param USARTx USART Instance
<> 139:856d2700e60b 2850 * @retval None
<> 139:856d2700e60b 2851 */
<> 139:856d2700e60b 2852 __STATIC_INLINE void LL_USART_EnableIT_TC(USART_TypeDef *USARTx)
<> 139:856d2700e60b 2853 {
<> 139:856d2700e60b 2854 SET_BIT(USARTx->CR1, USART_CR1_TCIE);
<> 139:856d2700e60b 2855 }
<> 139:856d2700e60b 2856
<> 139:856d2700e60b 2857 /**
<> 139:856d2700e60b 2858 * @brief Enable TX Empty Interrupt
<> 139:856d2700e60b 2859 * @rmtoll CR1 TXEIE LL_USART_EnableIT_TXE
<> 139:856d2700e60b 2860 * @param USARTx USART Instance
<> 139:856d2700e60b 2861 * @retval None
<> 139:856d2700e60b 2862 */
<> 139:856d2700e60b 2863 __STATIC_INLINE void LL_USART_EnableIT_TXE(USART_TypeDef *USARTx)
<> 139:856d2700e60b 2864 {
<> 139:856d2700e60b 2865 SET_BIT(USARTx->CR1, USART_CR1_TXEIE);
<> 139:856d2700e60b 2866 }
<> 139:856d2700e60b 2867
<> 139:856d2700e60b 2868 /**
<> 139:856d2700e60b 2869 * @brief Enable Parity Error Interrupt
<> 139:856d2700e60b 2870 * @rmtoll CR1 PEIE LL_USART_EnableIT_PE
<> 139:856d2700e60b 2871 * @param USARTx USART Instance
<> 139:856d2700e60b 2872 * @retval None
<> 139:856d2700e60b 2873 */
<> 139:856d2700e60b 2874 __STATIC_INLINE void LL_USART_EnableIT_PE(USART_TypeDef *USARTx)
<> 139:856d2700e60b 2875 {
<> 139:856d2700e60b 2876 SET_BIT(USARTx->CR1, USART_CR1_PEIE);
<> 139:856d2700e60b 2877 }
<> 139:856d2700e60b 2878
<> 139:856d2700e60b 2879 /**
<> 139:856d2700e60b 2880 * @brief Enable Character Match Interrupt
<> 139:856d2700e60b 2881 * @rmtoll CR1 CMIE LL_USART_EnableIT_CM
<> 139:856d2700e60b 2882 * @param USARTx USART Instance
<> 139:856d2700e60b 2883 * @retval None
<> 139:856d2700e60b 2884 */
<> 139:856d2700e60b 2885 __STATIC_INLINE void LL_USART_EnableIT_CM(USART_TypeDef *USARTx)
<> 139:856d2700e60b 2886 {
<> 139:856d2700e60b 2887 SET_BIT(USARTx->CR1, USART_CR1_CMIE);
<> 139:856d2700e60b 2888 }
<> 139:856d2700e60b 2889
<> 139:856d2700e60b 2890 /**
<> 139:856d2700e60b 2891 * @brief Enable Receiver Timeout Interrupt
<> 139:856d2700e60b 2892 * @rmtoll CR1 RTOIE LL_USART_EnableIT_RTO
<> 139:856d2700e60b 2893 * @param USARTx USART Instance
<> 139:856d2700e60b 2894 * @retval None
<> 139:856d2700e60b 2895 */
<> 139:856d2700e60b 2896 __STATIC_INLINE void LL_USART_EnableIT_RTO(USART_TypeDef *USARTx)
<> 139:856d2700e60b 2897 {
<> 139:856d2700e60b 2898 SET_BIT(USARTx->CR1, USART_CR1_RTOIE);
<> 139:856d2700e60b 2899 }
<> 139:856d2700e60b 2900
<> 139:856d2700e60b 2901 /**
<> 139:856d2700e60b 2902 * @brief Enable End Of Block Interrupt
<> 139:856d2700e60b 2903 * @note Macro @ref IS_SMARTCARD_INSTANCE(USARTx) can be used to check whether or not
<> 139:856d2700e60b 2904 * Smartcard feature is supported by the USARTx instance.
<> 139:856d2700e60b 2905 * @rmtoll CR1 EOBIE LL_USART_EnableIT_EOB
<> 139:856d2700e60b 2906 * @param USARTx USART Instance
<> 139:856d2700e60b 2907 * @retval None
<> 139:856d2700e60b 2908 */
<> 139:856d2700e60b 2909 __STATIC_INLINE void LL_USART_EnableIT_EOB(USART_TypeDef *USARTx)
<> 139:856d2700e60b 2910 {
<> 139:856d2700e60b 2911 SET_BIT(USARTx->CR1, USART_CR1_EOBIE);
<> 139:856d2700e60b 2912 }
<> 139:856d2700e60b 2913
<> 139:856d2700e60b 2914 /**
<> 139:856d2700e60b 2915 * @brief Enable LIN Break Detection Interrupt
<> 139:856d2700e60b 2916 * @note Macro @ref IS_UART_LIN_INSTANCE(USARTx) can be used to check whether or not
<> 139:856d2700e60b 2917 * LIN feature is supported by the USARTx instance.
<> 139:856d2700e60b 2918 * @rmtoll CR2 LBDIE LL_USART_EnableIT_LBD
<> 139:856d2700e60b 2919 * @param USARTx USART Instance
<> 139:856d2700e60b 2920 * @retval None
<> 139:856d2700e60b 2921 */
<> 139:856d2700e60b 2922 __STATIC_INLINE void LL_USART_EnableIT_LBD(USART_TypeDef *USARTx)
<> 139:856d2700e60b 2923 {
<> 139:856d2700e60b 2924 SET_BIT(USARTx->CR2, USART_CR2_LBDIE);
<> 139:856d2700e60b 2925 }
<> 139:856d2700e60b 2926
<> 139:856d2700e60b 2927 /**
<> 139:856d2700e60b 2928 * @brief Enable Error Interrupt
<> 139:856d2700e60b 2929 * @note When set, Error Interrupt Enable Bit is enabling interrupt generation in case of a framing
<> 139:856d2700e60b 2930 * error, overrun error or noise flag (FE=1 or ORE=1 or NF=1 in the USARTx_ISR register).
<> 139:856d2700e60b 2931 * 0: Interrupt is inhibited
<> 139:856d2700e60b 2932 * 1: An interrupt is generated when FE=1 or ORE=1 or NF=1 in the USARTx_ISR register.
<> 139:856d2700e60b 2933 * @rmtoll CR3 EIE LL_USART_EnableIT_ERROR
<> 139:856d2700e60b 2934 * @param USARTx USART Instance
<> 139:856d2700e60b 2935 * @retval None
<> 139:856d2700e60b 2936 */
<> 139:856d2700e60b 2937 __STATIC_INLINE void LL_USART_EnableIT_ERROR(USART_TypeDef *USARTx)
<> 139:856d2700e60b 2938 {
<> 139:856d2700e60b 2939 SET_BIT(USARTx->CR3, USART_CR3_EIE);
<> 139:856d2700e60b 2940 }
<> 139:856d2700e60b 2941
<> 139:856d2700e60b 2942 /**
<> 139:856d2700e60b 2943 * @brief Enable CTS Interrupt
<> 139:856d2700e60b 2944 * @note Macro @ref IS_UART_HWFLOW_INSTANCE(USARTx) can be used to check whether or not
<> 139:856d2700e60b 2945 * Hardware Flow control feature is supported by the USARTx instance.
<> 139:856d2700e60b 2946 * @rmtoll CR3 CTSIE LL_USART_EnableIT_CTS
<> 139:856d2700e60b 2947 * @param USARTx USART Instance
<> 139:856d2700e60b 2948 * @retval None
<> 139:856d2700e60b 2949 */
<> 139:856d2700e60b 2950 __STATIC_INLINE void LL_USART_EnableIT_CTS(USART_TypeDef *USARTx)
<> 139:856d2700e60b 2951 {
<> 139:856d2700e60b 2952 SET_BIT(USARTx->CR3, USART_CR3_CTSIE);
<> 139:856d2700e60b 2953 }
<> 139:856d2700e60b 2954
<> 139:856d2700e60b 2955
<> 139:856d2700e60b 2956 #if defined(USART_TCBGT_SUPPORT)
<> 139:856d2700e60b 2957 /* Function available only on devices supporting Transmit Complete before Guard Time feature */
<> 139:856d2700e60b 2958 /**
<> 139:856d2700e60b 2959 * @brief Enable Smartcard Transmission Complete Before Guard Time Interrupt
<> 139:856d2700e60b 2960 * @note Macro @ref IS_SMARTCARD_INSTANCE(USARTx) can be used to check whether or not
<> 139:856d2700e60b 2961 * Smartcard feature is supported by the USARTx instance.
<> 139:856d2700e60b 2962 * @rmtoll CR3 TCBGTIE LL_USART_EnableIT_TCBGT
<> 139:856d2700e60b 2963 * @param USARTx USART Instance
<> 139:856d2700e60b 2964 * @retval None
<> 139:856d2700e60b 2965 */
<> 139:856d2700e60b 2966 __STATIC_INLINE void LL_USART_EnableIT_TCBGT(USART_TypeDef *USARTx)
<> 139:856d2700e60b 2967 {
<> 139:856d2700e60b 2968 SET_BIT(USARTx->CR3, USART_CR3_TCBGTIE);
<> 139:856d2700e60b 2969 }
<> 139:856d2700e60b 2970 #endif
<> 139:856d2700e60b 2971
<> 139:856d2700e60b 2972 /**
<> 139:856d2700e60b 2973 * @brief Disable IDLE Interrupt
<> 139:856d2700e60b 2974 * @rmtoll CR1 IDLEIE LL_USART_DisableIT_IDLE
<> 139:856d2700e60b 2975 * @param USARTx USART Instance
<> 139:856d2700e60b 2976 * @retval None
<> 139:856d2700e60b 2977 */
<> 139:856d2700e60b 2978 __STATIC_INLINE void LL_USART_DisableIT_IDLE(USART_TypeDef *USARTx)
<> 139:856d2700e60b 2979 {
<> 139:856d2700e60b 2980 CLEAR_BIT(USARTx->CR1, USART_CR1_IDLEIE);
<> 139:856d2700e60b 2981 }
<> 139:856d2700e60b 2982
<> 139:856d2700e60b 2983 /**
<> 139:856d2700e60b 2984 * @brief Disable RX Not Empty Interrupt
<> 139:856d2700e60b 2985 * @rmtoll CR1 RXNEIE LL_USART_DisableIT_RXNE
<> 139:856d2700e60b 2986 * @param USARTx USART Instance
<> 139:856d2700e60b 2987 * @retval None
<> 139:856d2700e60b 2988 */
<> 139:856d2700e60b 2989 __STATIC_INLINE void LL_USART_DisableIT_RXNE(USART_TypeDef *USARTx)
<> 139:856d2700e60b 2990 {
<> 139:856d2700e60b 2991 CLEAR_BIT(USARTx->CR1, USART_CR1_RXNEIE);
<> 139:856d2700e60b 2992 }
<> 139:856d2700e60b 2993
<> 139:856d2700e60b 2994 /**
<> 139:856d2700e60b 2995 * @brief Disable Transmission Complete Interrupt
<> 139:856d2700e60b 2996 * @rmtoll CR1 TCIE LL_USART_DisableIT_TC
<> 139:856d2700e60b 2997 * @param USARTx USART Instance
<> 139:856d2700e60b 2998 * @retval None
<> 139:856d2700e60b 2999 */
<> 139:856d2700e60b 3000 __STATIC_INLINE void LL_USART_DisableIT_TC(USART_TypeDef *USARTx)
<> 139:856d2700e60b 3001 {
<> 139:856d2700e60b 3002 CLEAR_BIT(USARTx->CR1, USART_CR1_TCIE);
<> 139:856d2700e60b 3003 }
<> 139:856d2700e60b 3004
<> 139:856d2700e60b 3005 /**
<> 139:856d2700e60b 3006 * @brief Disable TX Empty Interrupt
<> 139:856d2700e60b 3007 * @rmtoll CR1 TXEIE LL_USART_DisableIT_TXE
<> 139:856d2700e60b 3008 * @param USARTx USART Instance
<> 139:856d2700e60b 3009 * @retval None
<> 139:856d2700e60b 3010 */
<> 139:856d2700e60b 3011 __STATIC_INLINE void LL_USART_DisableIT_TXE(USART_TypeDef *USARTx)
<> 139:856d2700e60b 3012 {
<> 139:856d2700e60b 3013 CLEAR_BIT(USARTx->CR1, USART_CR1_TXEIE);
<> 139:856d2700e60b 3014 }
<> 139:856d2700e60b 3015
<> 139:856d2700e60b 3016 /**
<> 139:856d2700e60b 3017 * @brief Disable Parity Error Interrupt
<> 139:856d2700e60b 3018 * @rmtoll CR1 PEIE LL_USART_DisableIT_PE
<> 139:856d2700e60b 3019 * @param USARTx USART Instance
<> 139:856d2700e60b 3020 * @retval None
<> 139:856d2700e60b 3021 */
<> 139:856d2700e60b 3022 __STATIC_INLINE void LL_USART_DisableIT_PE(USART_TypeDef *USARTx)
<> 139:856d2700e60b 3023 {
<> 139:856d2700e60b 3024 CLEAR_BIT(USARTx->CR1, USART_CR1_PEIE);
<> 139:856d2700e60b 3025 }
<> 139:856d2700e60b 3026
<> 139:856d2700e60b 3027 /**
<> 139:856d2700e60b 3028 * @brief Disable Character Match Interrupt
<> 139:856d2700e60b 3029 * @rmtoll CR1 CMIE LL_USART_DisableIT_CM
<> 139:856d2700e60b 3030 * @param USARTx USART Instance
<> 139:856d2700e60b 3031 * @retval None
<> 139:856d2700e60b 3032 */
<> 139:856d2700e60b 3033 __STATIC_INLINE void LL_USART_DisableIT_CM(USART_TypeDef *USARTx)
<> 139:856d2700e60b 3034 {
<> 139:856d2700e60b 3035 CLEAR_BIT(USARTx->CR1, USART_CR1_CMIE);
<> 139:856d2700e60b 3036 }
<> 139:856d2700e60b 3037
<> 139:856d2700e60b 3038 /**
<> 139:856d2700e60b 3039 * @brief Disable Receiver Timeout Interrupt
<> 139:856d2700e60b 3040 * @rmtoll CR1 RTOIE LL_USART_DisableIT_RTO
<> 139:856d2700e60b 3041 * @param USARTx USART Instance
<> 139:856d2700e60b 3042 * @retval None
<> 139:856d2700e60b 3043 */
<> 139:856d2700e60b 3044 __STATIC_INLINE void LL_USART_DisableIT_RTO(USART_TypeDef *USARTx)
<> 139:856d2700e60b 3045 {
<> 139:856d2700e60b 3046 CLEAR_BIT(USARTx->CR1, USART_CR1_RTOIE);
<> 139:856d2700e60b 3047 }
<> 139:856d2700e60b 3048
<> 139:856d2700e60b 3049 /**
<> 139:856d2700e60b 3050 * @brief Disable End Of Block Interrupt
<> 139:856d2700e60b 3051 * @note Macro @ref IS_SMARTCARD_INSTANCE(USARTx) can be used to check whether or not
<> 139:856d2700e60b 3052 * Smartcard feature is supported by the USARTx instance.
<> 139:856d2700e60b 3053 * @rmtoll CR1 EOBIE LL_USART_DisableIT_EOB
<> 139:856d2700e60b 3054 * @param USARTx USART Instance
<> 139:856d2700e60b 3055 * @retval None
<> 139:856d2700e60b 3056 */
<> 139:856d2700e60b 3057 __STATIC_INLINE void LL_USART_DisableIT_EOB(USART_TypeDef *USARTx)
<> 139:856d2700e60b 3058 {
<> 139:856d2700e60b 3059 CLEAR_BIT(USARTx->CR1, USART_CR1_EOBIE);
<> 139:856d2700e60b 3060 }
<> 139:856d2700e60b 3061
<> 139:856d2700e60b 3062 /**
<> 139:856d2700e60b 3063 * @brief Disable LIN Break Detection Interrupt
<> 139:856d2700e60b 3064 * @note Macro @ref IS_UART_LIN_INSTANCE(USARTx) can be used to check whether or not
<> 139:856d2700e60b 3065 * LIN feature is supported by the USARTx instance.
<> 139:856d2700e60b 3066 * @rmtoll CR2 LBDIE LL_USART_DisableIT_LBD
<> 139:856d2700e60b 3067 * @param USARTx USART Instance
<> 139:856d2700e60b 3068 * @retval None
<> 139:856d2700e60b 3069 */
<> 139:856d2700e60b 3070 __STATIC_INLINE void LL_USART_DisableIT_LBD(USART_TypeDef *USARTx)
<> 139:856d2700e60b 3071 {
<> 139:856d2700e60b 3072 CLEAR_BIT(USARTx->CR2, USART_CR2_LBDIE);
<> 139:856d2700e60b 3073 }
<> 139:856d2700e60b 3074
<> 139:856d2700e60b 3075 /**
<> 139:856d2700e60b 3076 * @brief Disable Error Interrupt
<> 139:856d2700e60b 3077 * @note When set, Error Interrupt Enable Bit is enabling interrupt generation in case of a framing
<> 139:856d2700e60b 3078 * error, overrun error or noise flag (FE=1 or ORE=1 or NF=1 in the USARTx_ISR register).
<> 139:856d2700e60b 3079 * 0: Interrupt is inhibited
<> 139:856d2700e60b 3080 * 1: An interrupt is generated when FE=1 or ORE=1 or NF=1 in the USARTx_ISR register.
<> 139:856d2700e60b 3081 * @rmtoll CR3 EIE LL_USART_DisableIT_ERROR
<> 139:856d2700e60b 3082 * @param USARTx USART Instance
<> 139:856d2700e60b 3083 * @retval None
<> 139:856d2700e60b 3084 */
<> 139:856d2700e60b 3085 __STATIC_INLINE void LL_USART_DisableIT_ERROR(USART_TypeDef *USARTx)
<> 139:856d2700e60b 3086 {
<> 139:856d2700e60b 3087 CLEAR_BIT(USARTx->CR3, USART_CR3_EIE);
<> 139:856d2700e60b 3088 }
<> 139:856d2700e60b 3089
<> 139:856d2700e60b 3090 /**
<> 139:856d2700e60b 3091 * @brief Disable CTS Interrupt
<> 139:856d2700e60b 3092 * @note Macro @ref IS_UART_HWFLOW_INSTANCE(USARTx) can be used to check whether or not
<> 139:856d2700e60b 3093 * Hardware Flow control feature is supported by the USARTx instance.
<> 139:856d2700e60b 3094 * @rmtoll CR3 CTSIE LL_USART_DisableIT_CTS
<> 139:856d2700e60b 3095 * @param USARTx USART Instance
<> 139:856d2700e60b 3096 * @retval None
<> 139:856d2700e60b 3097 */
<> 139:856d2700e60b 3098 __STATIC_INLINE void LL_USART_DisableIT_CTS(USART_TypeDef *USARTx)
<> 139:856d2700e60b 3099 {
<> 139:856d2700e60b 3100 CLEAR_BIT(USARTx->CR3, USART_CR3_CTSIE);
<> 139:856d2700e60b 3101 }
<> 139:856d2700e60b 3102
<> 139:856d2700e60b 3103
<> 139:856d2700e60b 3104 #if defined(USART_TCBGT_SUPPORT)
<> 139:856d2700e60b 3105 /* Function available only on devices supporting Transmit Complete before Guard Time feature */
<> 139:856d2700e60b 3106 /**
<> 139:856d2700e60b 3107 * @brief Disable Smartcard Transmission Complete Before Guard Time Interrupt
<> 139:856d2700e60b 3108 * @note Macro @ref IS_SMARTCARD_INSTANCE(USARTx) can be used to check whether or not
<> 139:856d2700e60b 3109 * Smartcard feature is supported by the USARTx instance.
<> 139:856d2700e60b 3110 * @rmtoll CR3 TCBGTIE LL_USART_DisableIT_TCBGT
<> 139:856d2700e60b 3111 * @param USARTx USART Instance
<> 139:856d2700e60b 3112 * @retval None
<> 139:856d2700e60b 3113 */
<> 139:856d2700e60b 3114 __STATIC_INLINE void LL_USART_DisableIT_TCBGT(USART_TypeDef *USARTx)
<> 139:856d2700e60b 3115 {
<> 139:856d2700e60b 3116 CLEAR_BIT(USARTx->CR3, USART_CR3_TCBGTIE);
<> 139:856d2700e60b 3117 }
<> 139:856d2700e60b 3118 #endif
<> 139:856d2700e60b 3119
<> 139:856d2700e60b 3120 /**
<> 139:856d2700e60b 3121 * @brief Check if the USART IDLE Interrupt source is enabled or disabled.
<> 139:856d2700e60b 3122 * @rmtoll CR1 IDLEIE LL_USART_IsEnabledIT_IDLE
<> 139:856d2700e60b 3123 * @param USARTx USART Instance
<> 139:856d2700e60b 3124 * @retval State of bit (1 or 0).
<> 139:856d2700e60b 3125 */
<> 139:856d2700e60b 3126 __STATIC_INLINE uint32_t LL_USART_IsEnabledIT_IDLE(USART_TypeDef *USARTx)
<> 139:856d2700e60b 3127 {
<> 139:856d2700e60b 3128 return (READ_BIT(USARTx->CR1, USART_CR1_IDLEIE) == (USART_CR1_IDLEIE));
<> 139:856d2700e60b 3129 }
<> 139:856d2700e60b 3130
<> 139:856d2700e60b 3131 /**
<> 139:856d2700e60b 3132 * @brief Check if the USART RX Not Empty Interrupt is enabled or disabled.
<> 139:856d2700e60b 3133 * @rmtoll CR1 RXNEIE LL_USART_IsEnabledIT_RXNE
<> 139:856d2700e60b 3134 * @param USARTx USART Instance
<> 139:856d2700e60b 3135 * @retval State of bit (1 or 0).
<> 139:856d2700e60b 3136 */
<> 139:856d2700e60b 3137 __STATIC_INLINE uint32_t LL_USART_IsEnabledIT_RXNE(USART_TypeDef *USARTx)
<> 139:856d2700e60b 3138 {
<> 139:856d2700e60b 3139 return (READ_BIT(USARTx->CR1, USART_CR1_RXNEIE) == (USART_CR1_RXNEIE));
<> 139:856d2700e60b 3140 }
<> 139:856d2700e60b 3141
<> 139:856d2700e60b 3142 /**
<> 139:856d2700e60b 3143 * @brief Check if the USART Transmission Complete Interrupt is enabled or disabled.
<> 139:856d2700e60b 3144 * @rmtoll CR1 TCIE LL_USART_IsEnabledIT_TC
<> 139:856d2700e60b 3145 * @param USARTx USART Instance
<> 139:856d2700e60b 3146 * @retval State of bit (1 or 0).
<> 139:856d2700e60b 3147 */
<> 139:856d2700e60b 3148 __STATIC_INLINE uint32_t LL_USART_IsEnabledIT_TC(USART_TypeDef *USARTx)
<> 139:856d2700e60b 3149 {
<> 139:856d2700e60b 3150 return (READ_BIT(USARTx->CR1, USART_CR1_TCIE) == (USART_CR1_TCIE));
<> 139:856d2700e60b 3151 }
<> 139:856d2700e60b 3152
<> 139:856d2700e60b 3153 /**
<> 139:856d2700e60b 3154 * @brief Check if the USART TX Empty Interrupt is enabled or disabled.
<> 139:856d2700e60b 3155 * @rmtoll CR1 TXEIE LL_USART_IsEnabledIT_TXE
<> 139:856d2700e60b 3156 * @param USARTx USART Instance
<> 139:856d2700e60b 3157 * @retval State of bit (1 or 0).
<> 139:856d2700e60b 3158 */
<> 139:856d2700e60b 3159 __STATIC_INLINE uint32_t LL_USART_IsEnabledIT_TXE(USART_TypeDef *USARTx)
<> 139:856d2700e60b 3160 {
<> 139:856d2700e60b 3161 return (READ_BIT(USARTx->CR1, USART_CR1_TXEIE) == (USART_CR1_TXEIE));
<> 139:856d2700e60b 3162 }
<> 139:856d2700e60b 3163
<> 139:856d2700e60b 3164 /**
<> 139:856d2700e60b 3165 * @brief Check if the USART Parity Error Interrupt is enabled or disabled.
<> 139:856d2700e60b 3166 * @rmtoll CR1 PEIE LL_USART_IsEnabledIT_PE
<> 139:856d2700e60b 3167 * @param USARTx USART Instance
<> 139:856d2700e60b 3168 * @retval State of bit (1 or 0).
<> 139:856d2700e60b 3169 */
<> 139:856d2700e60b 3170 __STATIC_INLINE uint32_t LL_USART_IsEnabledIT_PE(USART_TypeDef *USARTx)
<> 139:856d2700e60b 3171 {
<> 139:856d2700e60b 3172 return (READ_BIT(USARTx->CR1, USART_CR1_PEIE) == (USART_CR1_PEIE));
<> 139:856d2700e60b 3173 }
<> 139:856d2700e60b 3174
<> 139:856d2700e60b 3175 /**
<> 139:856d2700e60b 3176 * @brief Check if the USART Character Match Interrupt is enabled or disabled.
<> 139:856d2700e60b 3177 * @rmtoll CR1 CMIE LL_USART_IsEnabledIT_CM
<> 139:856d2700e60b 3178 * @param USARTx USART Instance
<> 139:856d2700e60b 3179 * @retval State of bit (1 or 0).
<> 139:856d2700e60b 3180 */
<> 139:856d2700e60b 3181 __STATIC_INLINE uint32_t LL_USART_IsEnabledIT_CM(USART_TypeDef *USARTx)
<> 139:856d2700e60b 3182 {
<> 139:856d2700e60b 3183 return (READ_BIT(USARTx->CR1, USART_CR1_CMIE) == (USART_CR1_CMIE));
<> 139:856d2700e60b 3184 }
<> 139:856d2700e60b 3185
<> 139:856d2700e60b 3186 /**
<> 139:856d2700e60b 3187 * @brief Check if the USART Receiver Timeout Interrupt is enabled or disabled.
<> 139:856d2700e60b 3188 * @rmtoll CR1 RTOIE LL_USART_IsEnabledIT_RTO
<> 139:856d2700e60b 3189 * @param USARTx USART Instance
<> 139:856d2700e60b 3190 * @retval State of bit (1 or 0).
<> 139:856d2700e60b 3191 */
<> 139:856d2700e60b 3192 __STATIC_INLINE uint32_t LL_USART_IsEnabledIT_RTO(USART_TypeDef *USARTx)
<> 139:856d2700e60b 3193 {
<> 139:856d2700e60b 3194 return (READ_BIT(USARTx->CR1, USART_CR1_RTOIE) == (USART_CR1_RTOIE));
<> 139:856d2700e60b 3195 }
<> 139:856d2700e60b 3196
<> 139:856d2700e60b 3197 /**
<> 139:856d2700e60b 3198 * @brief Check if the USART End Of Block Interrupt is enabled or disabled.
<> 139:856d2700e60b 3199 * @note Macro @ref IS_SMARTCARD_INSTANCE(USARTx) can be used to check whether or not
<> 139:856d2700e60b 3200 * Smartcard feature is supported by the USARTx instance.
<> 139:856d2700e60b 3201 * @rmtoll CR1 EOBIE LL_USART_IsEnabledIT_EOB
<> 139:856d2700e60b 3202 * @param USARTx USART Instance
<> 139:856d2700e60b 3203 * @retval State of bit (1 or 0).
<> 139:856d2700e60b 3204 */
<> 139:856d2700e60b 3205 __STATIC_INLINE uint32_t LL_USART_IsEnabledIT_EOB(USART_TypeDef *USARTx)
<> 139:856d2700e60b 3206 {
<> 139:856d2700e60b 3207 return (READ_BIT(USARTx->CR1, USART_CR1_EOBIE) == (USART_CR1_EOBIE));
<> 139:856d2700e60b 3208 }
<> 139:856d2700e60b 3209
<> 139:856d2700e60b 3210 /**
<> 139:856d2700e60b 3211 * @brief Check if the USART LIN Break Detection Interrupt is enabled or disabled.
<> 139:856d2700e60b 3212 * @note Macro @ref IS_UART_LIN_INSTANCE(USARTx) can be used to check whether or not
<> 139:856d2700e60b 3213 * LIN feature is supported by the USARTx instance.
<> 139:856d2700e60b 3214 * @rmtoll CR2 LBDIE LL_USART_IsEnabledIT_LBD
<> 139:856d2700e60b 3215 * @param USARTx USART Instance
<> 139:856d2700e60b 3216 * @retval State of bit (1 or 0).
<> 139:856d2700e60b 3217 */
<> 139:856d2700e60b 3218 __STATIC_INLINE uint32_t LL_USART_IsEnabledIT_LBD(USART_TypeDef *USARTx)
<> 139:856d2700e60b 3219 {
<> 139:856d2700e60b 3220 return (READ_BIT(USARTx->CR2, USART_CR2_LBDIE) == (USART_CR2_LBDIE));
<> 139:856d2700e60b 3221 }
<> 139:856d2700e60b 3222
<> 139:856d2700e60b 3223 /**
<> 139:856d2700e60b 3224 * @brief Check if the USART Error Interrupt is enabled or disabled.
<> 139:856d2700e60b 3225 * @rmtoll CR3 EIE LL_USART_IsEnabledIT_ERROR
<> 139:856d2700e60b 3226 * @param USARTx USART Instance
<> 139:856d2700e60b 3227 * @retval State of bit (1 or 0).
<> 139:856d2700e60b 3228 */
<> 139:856d2700e60b 3229 __STATIC_INLINE uint32_t LL_USART_IsEnabledIT_ERROR(USART_TypeDef *USARTx)
<> 139:856d2700e60b 3230 {
<> 139:856d2700e60b 3231 return (READ_BIT(USARTx->CR3, USART_CR3_EIE) == (USART_CR3_EIE));
<> 139:856d2700e60b 3232 }
<> 139:856d2700e60b 3233
<> 139:856d2700e60b 3234 /**
<> 139:856d2700e60b 3235 * @brief Check if the USART CTS Interrupt is enabled or disabled.
<> 139:856d2700e60b 3236 * @note Macro @ref IS_UART_HWFLOW_INSTANCE(USARTx) can be used to check whether or not
<> 139:856d2700e60b 3237 * Hardware Flow control feature is supported by the USARTx instance.
<> 139:856d2700e60b 3238 * @rmtoll CR3 CTSIE LL_USART_IsEnabledIT_CTS
<> 139:856d2700e60b 3239 * @param USARTx USART Instance
<> 139:856d2700e60b 3240 * @retval State of bit (1 or 0).
<> 139:856d2700e60b 3241 */
<> 139:856d2700e60b 3242 __STATIC_INLINE uint32_t LL_USART_IsEnabledIT_CTS(USART_TypeDef *USARTx)
<> 139:856d2700e60b 3243 {
<> 139:856d2700e60b 3244 return (READ_BIT(USARTx->CR3, USART_CR3_CTSIE) == (USART_CR3_CTSIE));
<> 139:856d2700e60b 3245 }
<> 139:856d2700e60b 3246
<> 139:856d2700e60b 3247
<> 139:856d2700e60b 3248 #if defined(USART_TCBGT_SUPPORT)
<> 139:856d2700e60b 3249 /* Function available only on devices supporting Transmit Complete before Guard Time feature */
<> 139:856d2700e60b 3250 /**
<> 139:856d2700e60b 3251 * @brief Check if the Smartcard Transmission Complete Before Guard Time Interrupt is enabled or disabled.
<> 139:856d2700e60b 3252 * @note Macro @ref IS_SMARTCARD_INSTANCE(USARTx) can be used to check whether or not
<> 139:856d2700e60b 3253 * Smartcard feature is supported by the USARTx instance.
<> 139:856d2700e60b 3254 * @rmtoll CR3 TCBGTIE LL_USART_IsEnabledIT_TCBGT
<> 139:856d2700e60b 3255 * @param USARTx USART Instance
<> 139:856d2700e60b 3256 * @retval State of bit (1 or 0).
<> 139:856d2700e60b 3257 */
<> 139:856d2700e60b 3258 __STATIC_INLINE uint32_t LL_USART_IsEnabledIT_TCBGT(USART_TypeDef *USARTx)
<> 139:856d2700e60b 3259 {
<> 139:856d2700e60b 3260 return (READ_BIT(USARTx->CR3, USART_CR3_TCBGTIE) == (USART_CR3_TCBGTIE));
<> 139:856d2700e60b 3261 }
<> 139:856d2700e60b 3262 #endif
<> 139:856d2700e60b 3263
<> 139:856d2700e60b 3264 /**
<> 139:856d2700e60b 3265 * @}
<> 139:856d2700e60b 3266 */
<> 139:856d2700e60b 3267
<> 139:856d2700e60b 3268 /** @defgroup USART_LL_EF_DMA_Management DMA_Management
<> 139:856d2700e60b 3269 * @{
<> 139:856d2700e60b 3270 */
<> 139:856d2700e60b 3271
<> 139:856d2700e60b 3272 /**
<> 139:856d2700e60b 3273 * @brief Enable DMA Mode for reception
<> 139:856d2700e60b 3274 * @rmtoll CR3 DMAR LL_USART_EnableDMAReq_RX
<> 139:856d2700e60b 3275 * @param USARTx USART Instance
<> 139:856d2700e60b 3276 * @retval None
<> 139:856d2700e60b 3277 */
<> 139:856d2700e60b 3278 __STATIC_INLINE void LL_USART_EnableDMAReq_RX(USART_TypeDef *USARTx)
<> 139:856d2700e60b 3279 {
<> 139:856d2700e60b 3280 SET_BIT(USARTx->CR3, USART_CR3_DMAR);
<> 139:856d2700e60b 3281 }
<> 139:856d2700e60b 3282
<> 139:856d2700e60b 3283 /**
<> 139:856d2700e60b 3284 * @brief Disable DMA Mode for reception
<> 139:856d2700e60b 3285 * @rmtoll CR3 DMAR LL_USART_DisableDMAReq_RX
<> 139:856d2700e60b 3286 * @param USARTx USART Instance
<> 139:856d2700e60b 3287 * @retval None
<> 139:856d2700e60b 3288 */
<> 139:856d2700e60b 3289 __STATIC_INLINE void LL_USART_DisableDMAReq_RX(USART_TypeDef *USARTx)
<> 139:856d2700e60b 3290 {
<> 139:856d2700e60b 3291 CLEAR_BIT(USARTx->CR3, USART_CR3_DMAR);
<> 139:856d2700e60b 3292 }
<> 139:856d2700e60b 3293
<> 139:856d2700e60b 3294 /**
<> 139:856d2700e60b 3295 * @brief Check if DMA Mode is enabled for reception
<> 139:856d2700e60b 3296 * @rmtoll CR3 DMAR LL_USART_IsEnabledDMAReq_RX
<> 139:856d2700e60b 3297 * @param USARTx USART Instance
<> 139:856d2700e60b 3298 * @retval State of bit (1 or 0).
<> 139:856d2700e60b 3299 */
<> 139:856d2700e60b 3300 __STATIC_INLINE uint32_t LL_USART_IsEnabledDMAReq_RX(USART_TypeDef *USARTx)
<> 139:856d2700e60b 3301 {
<> 139:856d2700e60b 3302 return (READ_BIT(USARTx->CR3, USART_CR3_DMAR) == (USART_CR3_DMAR));
<> 139:856d2700e60b 3303 }
<> 139:856d2700e60b 3304
<> 139:856d2700e60b 3305 /**
<> 139:856d2700e60b 3306 * @brief Enable DMA Mode for transmission
<> 139:856d2700e60b 3307 * @rmtoll CR3 DMAT LL_USART_EnableDMAReq_TX
<> 139:856d2700e60b 3308 * @param USARTx USART Instance
<> 139:856d2700e60b 3309 * @retval None
<> 139:856d2700e60b 3310 */
<> 139:856d2700e60b 3311 __STATIC_INLINE void LL_USART_EnableDMAReq_TX(USART_TypeDef *USARTx)
<> 139:856d2700e60b 3312 {
<> 139:856d2700e60b 3313 SET_BIT(USARTx->CR3, USART_CR3_DMAT);
<> 139:856d2700e60b 3314 }
<> 139:856d2700e60b 3315
<> 139:856d2700e60b 3316 /**
<> 139:856d2700e60b 3317 * @brief Disable DMA Mode for transmission
<> 139:856d2700e60b 3318 * @rmtoll CR3 DMAT LL_USART_DisableDMAReq_TX
<> 139:856d2700e60b 3319 * @param USARTx USART Instance
<> 139:856d2700e60b 3320 * @retval None
<> 139:856d2700e60b 3321 */
<> 139:856d2700e60b 3322 __STATIC_INLINE void LL_USART_DisableDMAReq_TX(USART_TypeDef *USARTx)
<> 139:856d2700e60b 3323 {
<> 139:856d2700e60b 3324 CLEAR_BIT(USARTx->CR3, USART_CR3_DMAT);
<> 139:856d2700e60b 3325 }
<> 139:856d2700e60b 3326
<> 139:856d2700e60b 3327 /**
<> 139:856d2700e60b 3328 * @brief Check if DMA Mode is enabled for transmission
<> 139:856d2700e60b 3329 * @rmtoll CR3 DMAT LL_USART_IsEnabledDMAReq_TX
<> 139:856d2700e60b 3330 * @param USARTx USART Instance
<> 139:856d2700e60b 3331 * @retval State of bit (1 or 0).
<> 139:856d2700e60b 3332 */
<> 139:856d2700e60b 3333 __STATIC_INLINE uint32_t LL_USART_IsEnabledDMAReq_TX(USART_TypeDef *USARTx)
<> 139:856d2700e60b 3334 {
<> 139:856d2700e60b 3335 return (READ_BIT(USARTx->CR3, USART_CR3_DMAT) == (USART_CR3_DMAT));
<> 139:856d2700e60b 3336 }
<> 139:856d2700e60b 3337
<> 139:856d2700e60b 3338 /**
<> 139:856d2700e60b 3339 * @brief Enable DMA Disabling on Reception Error
<> 139:856d2700e60b 3340 * @rmtoll CR3 DDRE LL_USART_EnableDMADeactOnRxErr
<> 139:856d2700e60b 3341 * @param USARTx USART Instance
<> 139:856d2700e60b 3342 * @retval None
<> 139:856d2700e60b 3343 */
<> 139:856d2700e60b 3344 __STATIC_INLINE void LL_USART_EnableDMADeactOnRxErr(USART_TypeDef *USARTx)
<> 139:856d2700e60b 3345 {
<> 139:856d2700e60b 3346 SET_BIT(USARTx->CR3, USART_CR3_DDRE);
<> 139:856d2700e60b 3347 }
<> 139:856d2700e60b 3348
<> 139:856d2700e60b 3349 /**
<> 139:856d2700e60b 3350 * @brief Disable DMA Disabling on Reception Error
<> 139:856d2700e60b 3351 * @rmtoll CR3 DDRE LL_USART_DisableDMADeactOnRxErr
<> 139:856d2700e60b 3352 * @param USARTx USART Instance
<> 139:856d2700e60b 3353 * @retval None
<> 139:856d2700e60b 3354 */
<> 139:856d2700e60b 3355 __STATIC_INLINE void LL_USART_DisableDMADeactOnRxErr(USART_TypeDef *USARTx)
<> 139:856d2700e60b 3356 {
<> 139:856d2700e60b 3357 CLEAR_BIT(USARTx->CR3, USART_CR3_DDRE);
<> 139:856d2700e60b 3358 }
<> 139:856d2700e60b 3359
<> 139:856d2700e60b 3360 /**
<> 139:856d2700e60b 3361 * @brief Indicate if DMA Disabling on Reception Error is disabled
<> 139:856d2700e60b 3362 * @rmtoll CR3 DDRE LL_USART_IsEnabledDMADeactOnRxErr
<> 139:856d2700e60b 3363 * @param USARTx USART Instance
<> 139:856d2700e60b 3364 * @retval State of bit (1 or 0).
<> 139:856d2700e60b 3365 */
<> 139:856d2700e60b 3366 __STATIC_INLINE uint32_t LL_USART_IsEnabledDMADeactOnRxErr(USART_TypeDef *USARTx)
<> 139:856d2700e60b 3367 {
<> 139:856d2700e60b 3368 return (READ_BIT(USARTx->CR3, USART_CR3_DDRE) == (USART_CR3_DDRE));
<> 139:856d2700e60b 3369 }
<> 139:856d2700e60b 3370
<> 139:856d2700e60b 3371 /**
<> 139:856d2700e60b 3372 * @brief Get the data register address used for DMA transfer
<> 139:856d2700e60b 3373 * @rmtoll RDR RDR LL_USART_DMA_GetRegAddr\n
<> 139:856d2700e60b 3374 * @rmtoll TDR TDR LL_USART_DMA_GetRegAddr
<> 139:856d2700e60b 3375 * @param USARTx USART Instance
<> 139:856d2700e60b 3376 * @param Direction This parameter can be one of the following values:
<> 139:856d2700e60b 3377 * @arg @ref LL_USART_DMA_REG_DATA_TRANSMIT
<> 139:856d2700e60b 3378 * @arg @ref LL_USART_DMA_REG_DATA_RECEIVE
<> 139:856d2700e60b 3379 * @retval Address of data register
<> 139:856d2700e60b 3380 */
<> 139:856d2700e60b 3381 __STATIC_INLINE uint32_t LL_USART_DMA_GetRegAddr(USART_TypeDef *USARTx, uint32_t Direction)
<> 139:856d2700e60b 3382 {
<> 139:856d2700e60b 3383 register uint32_t data_reg_addr = 0U;
<> 139:856d2700e60b 3384
<> 139:856d2700e60b 3385 if (Direction == LL_USART_DMA_REG_DATA_TRANSMIT)
<> 139:856d2700e60b 3386 {
<> 139:856d2700e60b 3387 /* return address of TDR register */
<> 139:856d2700e60b 3388 data_reg_addr = (uint32_t) &(USARTx->TDR);
<> 139:856d2700e60b 3389 }
<> 139:856d2700e60b 3390 else
<> 139:856d2700e60b 3391 {
<> 139:856d2700e60b 3392 /* return address of RDR register */
<> 139:856d2700e60b 3393 data_reg_addr = (uint32_t) &(USARTx->RDR);
<> 139:856d2700e60b 3394 }
<> 139:856d2700e60b 3395
<> 139:856d2700e60b 3396 return data_reg_addr;
<> 139:856d2700e60b 3397 }
<> 139:856d2700e60b 3398
<> 139:856d2700e60b 3399 /**
<> 139:856d2700e60b 3400 * @}
<> 139:856d2700e60b 3401 */
<> 139:856d2700e60b 3402
<> 139:856d2700e60b 3403 /** @defgroup USART_LL_EF_Data_Management Data_Management
<> 139:856d2700e60b 3404 * @{
<> 139:856d2700e60b 3405 */
<> 139:856d2700e60b 3406
<> 139:856d2700e60b 3407 /**
<> 139:856d2700e60b 3408 * @brief Read Receiver Data register (Receive Data value, 8 bits)
<> 139:856d2700e60b 3409 * @rmtoll RDR RDR LL_USART_ReceiveData8
<> 139:856d2700e60b 3410 * @param USARTx USART Instance
<> 139:856d2700e60b 3411 * @retval Value between Min_Data=0x00 and Max_Data=0xFF
<> 139:856d2700e60b 3412 */
<> 139:856d2700e60b 3413 __STATIC_INLINE uint8_t LL_USART_ReceiveData8(USART_TypeDef *USARTx)
<> 139:856d2700e60b 3414 {
<> 139:856d2700e60b 3415 return (uint8_t)(READ_BIT(USARTx->RDR, USART_RDR_RDR));
<> 139:856d2700e60b 3416 }
<> 139:856d2700e60b 3417
<> 139:856d2700e60b 3418 /**
<> 139:856d2700e60b 3419 * @brief Read Receiver Data register (Receive Data value, 9 bits)
<> 139:856d2700e60b 3420 * @rmtoll RDR RDR LL_USART_ReceiveData9
<> 139:856d2700e60b 3421 * @param USARTx USART Instance
<> 139:856d2700e60b 3422 * @retval Value between Min_Data=0x00 and Max_Data=0x1FF
<> 139:856d2700e60b 3423 */
<> 139:856d2700e60b 3424 __STATIC_INLINE uint16_t LL_USART_ReceiveData9(USART_TypeDef *USARTx)
<> 139:856d2700e60b 3425 {
<> 139:856d2700e60b 3426 return (uint16_t)(READ_BIT(USARTx->RDR, USART_RDR_RDR));
<> 139:856d2700e60b 3427 }
<> 139:856d2700e60b 3428
<> 139:856d2700e60b 3429 /**
<> 139:856d2700e60b 3430 * @brief Write in Transmitter Data Register (Transmit Data value, 8 bits)
<> 139:856d2700e60b 3431 * @rmtoll TDR TDR LL_USART_TransmitData8
<> 139:856d2700e60b 3432 * @param USARTx USART Instance
<> 139:856d2700e60b 3433 * @param Value between Min_Data=0x00 and Max_Data=0xFF
<> 139:856d2700e60b 3434 * @retval None
<> 139:856d2700e60b 3435 */
<> 139:856d2700e60b 3436 __STATIC_INLINE void LL_USART_TransmitData8(USART_TypeDef *USARTx, uint8_t Value)
<> 139:856d2700e60b 3437 {
<> 139:856d2700e60b 3438 USARTx->TDR = Value;
<> 139:856d2700e60b 3439 }
<> 139:856d2700e60b 3440
<> 139:856d2700e60b 3441 /**
<> 139:856d2700e60b 3442 * @brief Write in Transmitter Data Register (Transmit Data value, 9 bits)
<> 139:856d2700e60b 3443 * @rmtoll TDR TDR LL_USART_TransmitData9
<> 139:856d2700e60b 3444 * @param USARTx USART Instance
<> 139:856d2700e60b 3445 * @param Value between Min_Data=0x00 and Max_Data=0x1FF
<> 139:856d2700e60b 3446 * @retval None
<> 139:856d2700e60b 3447 */
<> 139:856d2700e60b 3448 __STATIC_INLINE void LL_USART_TransmitData9(USART_TypeDef *USARTx, uint16_t Value)
<> 139:856d2700e60b 3449 {
<> 139:856d2700e60b 3450 USARTx->TDR = Value & 0x1FFU;
<> 139:856d2700e60b 3451 }
<> 139:856d2700e60b 3452
<> 139:856d2700e60b 3453 /**
<> 139:856d2700e60b 3454 * @}
<> 139:856d2700e60b 3455 */
<> 139:856d2700e60b 3456
<> 139:856d2700e60b 3457 /** @defgroup USART_LL_EF_Execution Execution
<> 139:856d2700e60b 3458 * @{
<> 139:856d2700e60b 3459 */
<> 139:856d2700e60b 3460
<> 139:856d2700e60b 3461 /**
<> 139:856d2700e60b 3462 * @brief Request an Automatic Baud Rate measurement on next received data frame
<> 139:856d2700e60b 3463 * @note Macro @ref IS_USART_AUTOBAUDRATE_DETECTION_INSTANCE(USARTx) can be used to check whether or not
<> 139:856d2700e60b 3464 * Auto Baud Rate detection feature is supported by the USARTx instance.
<> 139:856d2700e60b 3465 * @rmtoll RQR ABRRQ LL_USART_RequestAutoBaudRate
<> 139:856d2700e60b 3466 * @param USARTx USART Instance
<> 139:856d2700e60b 3467 * @retval None
<> 139:856d2700e60b 3468 */
<> 139:856d2700e60b 3469 __STATIC_INLINE void LL_USART_RequestAutoBaudRate(USART_TypeDef *USARTx)
<> 139:856d2700e60b 3470 {
<> 139:856d2700e60b 3471 SET_BIT(USARTx->RQR, USART_RQR_ABRRQ);
<> 139:856d2700e60b 3472 }
<> 139:856d2700e60b 3473
<> 139:856d2700e60b 3474 /**
<> 139:856d2700e60b 3475 * @brief Request Break sending
<> 139:856d2700e60b 3476 * @rmtoll RQR SBKRQ LL_USART_RequestBreakSending
<> 139:856d2700e60b 3477 * @param USARTx USART Instance
<> 139:856d2700e60b 3478 * @retval None
<> 139:856d2700e60b 3479 */
<> 139:856d2700e60b 3480 __STATIC_INLINE void LL_USART_RequestBreakSending(USART_TypeDef *USARTx)
<> 139:856d2700e60b 3481 {
<> 139:856d2700e60b 3482 SET_BIT(USARTx->RQR, USART_RQR_SBKRQ);
<> 139:856d2700e60b 3483 }
<> 139:856d2700e60b 3484
<> 139:856d2700e60b 3485 /**
<> 139:856d2700e60b 3486 * @brief Put USART in mute mode and set the RWU flag
<> 139:856d2700e60b 3487 * @rmtoll RQR MMRQ LL_USART_RequestEnterMuteMode
<> 139:856d2700e60b 3488 * @param USARTx USART Instance
<> 139:856d2700e60b 3489 * @retval None
<> 139:856d2700e60b 3490 */
<> 139:856d2700e60b 3491 __STATIC_INLINE void LL_USART_RequestEnterMuteMode(USART_TypeDef *USARTx)
<> 139:856d2700e60b 3492 {
<> 139:856d2700e60b 3493 SET_BIT(USARTx->RQR, USART_RQR_MMRQ);
<> 139:856d2700e60b 3494 }
<> 139:856d2700e60b 3495
<> 139:856d2700e60b 3496 /**
<> 139:856d2700e60b 3497 * @brief Request a Receive Data flush
<> 139:856d2700e60b 3498 * @rmtoll RQR RXFRQ LL_USART_RequestRxDataFlush
<> 139:856d2700e60b 3499 * @param USARTx USART Instance
<> 139:856d2700e60b 3500 * @retval None
<> 139:856d2700e60b 3501 */
<> 139:856d2700e60b 3502 __STATIC_INLINE void LL_USART_RequestRxDataFlush(USART_TypeDef *USARTx)
<> 139:856d2700e60b 3503 {
<> 139:856d2700e60b 3504 SET_BIT(USARTx->RQR, USART_RQR_RXFRQ);
<> 139:856d2700e60b 3505 }
<> 139:856d2700e60b 3506
<> 139:856d2700e60b 3507 /**
<> 139:856d2700e60b 3508 * @brief Request a Transmit data flush
<> 139:856d2700e60b 3509 * @note Macro @ref IS_SMARTCARD_INSTANCE(USARTx) can be used to check whether or not
<> 139:856d2700e60b 3510 * Smartcard feature is supported by the USARTx instance.
<> 139:856d2700e60b 3511 * @rmtoll RQR TXFRQ LL_USART_RequestTxDataFlush
<> 139:856d2700e60b 3512 * @param USARTx USART Instance
<> 139:856d2700e60b 3513 * @retval None
<> 139:856d2700e60b 3514 */
<> 139:856d2700e60b 3515 __STATIC_INLINE void LL_USART_RequestTxDataFlush(USART_TypeDef *USARTx)
<> 139:856d2700e60b 3516 {
<> 139:856d2700e60b 3517 SET_BIT(USARTx->RQR, USART_RQR_TXFRQ);
<> 139:856d2700e60b 3518 }
<> 139:856d2700e60b 3519
<> 139:856d2700e60b 3520 /**
<> 139:856d2700e60b 3521 * @}
<> 139:856d2700e60b 3522 */
<> 139:856d2700e60b 3523
<> 139:856d2700e60b 3524 #if defined(USE_FULL_LL_DRIVER)
<> 139:856d2700e60b 3525 /** @defgroup USART_LL_EF_Init Initialization and de-initialization functions
<> 139:856d2700e60b 3526 * @{
<> 139:856d2700e60b 3527 */
<> 139:856d2700e60b 3528 ErrorStatus LL_USART_DeInit(USART_TypeDef *USARTx);
<> 139:856d2700e60b 3529 ErrorStatus LL_USART_Init(USART_TypeDef *USARTx, LL_USART_InitTypeDef *USART_InitStruct);
<> 139:856d2700e60b 3530 void LL_USART_StructInit(LL_USART_InitTypeDef *USART_InitStruct);
<> 139:856d2700e60b 3531 ErrorStatus LL_USART_ClockInit(USART_TypeDef *USARTx, LL_USART_ClockInitTypeDef *USART_ClockInitStruct);
<> 139:856d2700e60b 3532 void LL_USART_ClockStructInit(LL_USART_ClockInitTypeDef *USART_ClockInitStruct);
<> 139:856d2700e60b 3533 /**
<> 139:856d2700e60b 3534 * @}
<> 139:856d2700e60b 3535 */
<> 139:856d2700e60b 3536 #endif /* USE_FULL_LL_DRIVER */
<> 139:856d2700e60b 3537
<> 139:856d2700e60b 3538 /**
<> 139:856d2700e60b 3539 * @}
<> 139:856d2700e60b 3540 */
<> 139:856d2700e60b 3541
<> 139:856d2700e60b 3542 /**
<> 139:856d2700e60b 3543 * @}
<> 139:856d2700e60b 3544 */
<> 139:856d2700e60b 3545
<> 139:856d2700e60b 3546 #endif /* USART1 || USART2 || USART3 || USART6 || UART4 || UART5 || UART7 || UART8 */
<> 139:856d2700e60b 3547
<> 139:856d2700e60b 3548 /**
<> 139:856d2700e60b 3549 * @}
<> 139:856d2700e60b 3550 */
<> 139:856d2700e60b 3551
<> 139:856d2700e60b 3552 #ifdef __cplusplus
<> 139:856d2700e60b 3553 }
<> 139:856d2700e60b 3554 #endif
<> 139:856d2700e60b 3555
<> 139:856d2700e60b 3556 #endif /* __STM32F7xx_LL_USART_H */
<> 139:856d2700e60b 3557
<> 139:856d2700e60b 3558 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/