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Dependents:   hello SerialTestv11 SerialTestv12 Sierpinski ... more

TARGET_KL43Z/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_KL43Z/drivers/fsl_port.h@133:99b5ccf27215, 2017-01-04 (annotated)

Committer:
<>
Date:
Wed Jan 04 14:13:01 2017 +0000
Revision:
133:99b5ccf27215
Parent:
TARGET_KL43Z/TARGET_Freescale/TARGET_KSDK2_MCUS/TARGET_KL43Z/drivers/fsl_port.h@124:2241e3a39974 
Release 133 of the mbed library



Ports for Upcoming Targets



3459: Target: Add new target UBLOX_EVK_NINA_B1 https://github.com/ARMmbed/mbed-os/pull/3459



Fixes and Changes



3430: Fix ci shield eeprom test https://github.com/ARMmbed/mbed-os/pull/3430

3381: STM32F1 : map ST HAL assert into MBED assert https://github.com/ARMmbed/mbed-os/pull/3381

3389: STM32F2 : map ST HAL assert into MBED assert https://github.com/ARMmbed/mbed-os/pull/3389

3390: STM32F3 : map ST HAL assert into MBED assert https://github.com/ARMmbed/mbed-os/pull/3390

3410: STM32L4 : map ST HAL assert into MBED assert https://github.com/ARMmbed/mbed-os/pull/3410

3422: Enable CAN on DISCO_F303VC https://github.com/ARMmbed/mbed-os/pull/3422

3442: Dev stm i2c f1 https://github.com/ARMmbed/mbed-os/pull/3442

3460: KSDK I2C: Update the return value to match the API documentation change https://github.com/ARMmbed/mbed-os/pull/3460

3472: [RZ/A1H]Fix TTB setting of RO_DATA area https://github.com/ARMmbed/mbed-os/pull/3472

3451: Rename KSDK2 to MCUXpresso. This is the new name of this package https://github.com/ARMmbed/mbed-os/pull/3451

3391: STM32F4 : map ST HAL assert into MBED assert https://github.com/ARMmbed/mbed-os/pull/3391

3454: STM32: Refactor lp_ticker.c + rtc_api.c + sleep.c + rtc_api_hal.h files  https://github.com/ARMmbed/mbed-os/pull/3454

3489: NUCLEO_F103RB - Correct CAN and PWM alternate-functions https://github.com/ARMmbed/mbed-os/pull/3489

3405: Repair the transmit mailbox (0,1,2) empty interrupt flag not clear BUG https://github.com/ARMmbed/mbed-os/pull/3405

3502: MCUXpresso I2C: Handle 0 byte write https://github.com/ARMmbed/mbed-os/pull/3502

3365: [NUC472/M453] Support USB device https://github.com/ARMmbed/mbed-os/pull/3365

Who changed what in which revision?

UserRevisionLine numberNew contents of line
Kojto 124:2241e3a39974 1 /*
Kojto 124:2241e3a39974 2 * Copyright (c) 2015, Freescale Semiconductor, Inc.
Kojto 124:2241e3a39974 3 * All rights reserved.
Kojto 124:2241e3a39974 4 *
Kojto 124:2241e3a39974 5 * Redistribution and use in source and binary forms, with or without modification,
Kojto 124:2241e3a39974 6 * are permitted provided that the following conditions are met:
Kojto 124:2241e3a39974 7 *
Kojto 124:2241e3a39974 8 * o Redistributions of source code must retain the above copyright notice, this list
Kojto 124:2241e3a39974 9 * of conditions and the following disclaimer.
Kojto 124:2241e3a39974 10 *
Kojto 124:2241e3a39974 11 * o Redistributions in binary form must reproduce the above copyright notice, this
Kojto 124:2241e3a39974 12 * list of conditions and the following disclaimer in the documentation and/or
Kojto 124:2241e3a39974 13 * other materials provided with the distribution.
Kojto 124:2241e3a39974 14 *
Kojto 124:2241e3a39974 15 * o Neither the name of Freescale Semiconductor, Inc. nor the names of its
Kojto 124:2241e3a39974 16 * contributors may be used to endorse or promote products derived from this
Kojto 124:2241e3a39974 17 * software without specific prior written permission.
Kojto 124:2241e3a39974 18 *
Kojto 124:2241e3a39974 19 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
Kojto 124:2241e3a39974 20 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
Kojto 124:2241e3a39974 21 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
Kojto 124:2241e3a39974 22 * DISCLAIMED. IN NO EVENT SDRVL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
Kojto 124:2241e3a39974 23 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
Kojto 124:2241e3a39974 24 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
Kojto 124:2241e3a39974 25 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
Kojto 124:2241e3a39974 26 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
Kojto 124:2241e3a39974 27 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
Kojto 124:2241e3a39974 28 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
Kojto 124:2241e3a39974 29 */
Kojto 124:2241e3a39974 30 #ifndef _FSL_PORT_H_
Kojto 124:2241e3a39974 31 #define _FSL_PORT_H_
Kojto 124:2241e3a39974 32
Kojto 124:2241e3a39974 33 #include "fsl_common.h"
Kojto 124:2241e3a39974 34
Kojto 124:2241e3a39974 35 /*!
Kojto 124:2241e3a39974 36 * @addtogroup port_driver
Kojto 124:2241e3a39974 37 * @{
Kojto 124:2241e3a39974 38 */
Kojto 124:2241e3a39974 39
Kojto 124:2241e3a39974 40 /*! @file */
Kojto 124:2241e3a39974 41
Kojto 124:2241e3a39974 42 /*******************************************************************************
Kojto 124:2241e3a39974 43 * Definitions
Kojto 124:2241e3a39974 44 ******************************************************************************/
Kojto 124:2241e3a39974 45
Kojto 124:2241e3a39974 46 /*! @name Driver version */
Kojto 124:2241e3a39974 47 /*@{*/
Kojto 124:2241e3a39974 48 /*! Version 2.0.1. */
Kojto 124:2241e3a39974 49 #define FSL_PORT_DRIVER_VERSION (MAKE_VERSION(2, 0, 1))
Kojto 124:2241e3a39974 50 /*@}*/
Kojto 124:2241e3a39974 51
Kojto 124:2241e3a39974 52 /*! @brief Internal resistor pull feature selection */
Kojto 124:2241e3a39974 53 enum _port_pull
Kojto 124:2241e3a39974 54 {
Kojto 124:2241e3a39974 55 kPORT_PullDisable = 0U, /*!< internal pull-up/down resistor is disabled. */
Kojto 124:2241e3a39974 56 kPORT_PullDown = 2U, /*!< internal pull-down resistor is enabled. */
Kojto 124:2241e3a39974 57 kPORT_PullUp = 3U, /*!< internal pull-up resistor is enabled. */
Kojto 124:2241e3a39974 58 };
Kojto 124:2241e3a39974 59
Kojto 124:2241e3a39974 60 /*! @brief Slew rate selection */
Kojto 124:2241e3a39974 61 enum _port_slew_rate
Kojto 124:2241e3a39974 62 {
Kojto 124:2241e3a39974 63 kPORT_FastSlewRate = 0U, /*!< fast slew rate is configured. */
Kojto 124:2241e3a39974 64 kPORT_SlowSlewRate = 1U, /*!< slow slew rate is configured. */
Kojto 124:2241e3a39974 65 };
Kojto 124:2241e3a39974 66
Kojto 124:2241e3a39974 67 #if defined(FSL_FEATURE_PORT_HAS_OPEN_DRAIN) && FSL_FEATURE_PORT_HAS_OPEN_DRAIN
Kojto 124:2241e3a39974 68 /*! @brief Internal resistor pull feature enable/disable */
Kojto 124:2241e3a39974 69 enum _port_open_drain_enable
Kojto 124:2241e3a39974 70 {
Kojto 124:2241e3a39974 71 kPORT_OpenDrainDisable = 0U, /*!< internal pull-down resistor is disabled. */
Kojto 124:2241e3a39974 72 kPORT_OpenDrainEnable = 1U, /*!< internal pull-up resistor is enabled. */
Kojto 124:2241e3a39974 73 };
Kojto 124:2241e3a39974 74 #endif /* FSL_FEATURE_PORT_HAS_OPEN_DRAIN */
Kojto 124:2241e3a39974 75
Kojto 124:2241e3a39974 76 /*! @brief Passive filter feature enable/disable */
Kojto 124:2241e3a39974 77 enum _port_passive_filter_enable
Kojto 124:2241e3a39974 78 {
Kojto 124:2241e3a39974 79 kPORT_PassiveFilterDisable = 0U, /*!< fast slew rate is configured. */
Kojto 124:2241e3a39974 80 kPORT_PassiveFilterEnable = 1U, /*!< slow slew rate is configured. */
Kojto 124:2241e3a39974 81 };
Kojto 124:2241e3a39974 82
Kojto 124:2241e3a39974 83 /*! @brief Configures the drive strength. */
Kojto 124:2241e3a39974 84 enum _port_drive_strength
Kojto 124:2241e3a39974 85 {
Kojto 124:2241e3a39974 86 kPORT_LowDriveStrength = 0U, /*!< low drive strength is configured. */
Kojto 124:2241e3a39974 87 kPORT_HighDriveStrength = 1U, /*!< high drive strength is configured. */
Kojto 124:2241e3a39974 88 };
Kojto 124:2241e3a39974 89
Kojto 124:2241e3a39974 90 #if defined(FSL_FEATURE_PORT_HAS_PIN_CONTROL_LOCK) && FSL_FEATURE_PORT_HAS_PIN_CONTROL_LOCK
Kojto 124:2241e3a39974 91 /*! @brief Unlock/lock the pin control register field[15:0] */
Kojto 124:2241e3a39974 92 enum _port_lock_register
Kojto 124:2241e3a39974 93 {
Kojto 124:2241e3a39974 94 kPORT_UnlockRegister = 0U, /*!< Pin Control Register fields [15:0] are not locked. */
Kojto 124:2241e3a39974 95 kPORT_LockRegister = 1U, /*!< Pin Control Register fields [15:0] are locked. */
Kojto 124:2241e3a39974 96 };
Kojto 124:2241e3a39974 97 #endif /* FSL_FEATURE_PORT_HAS_PIN_CONTROL_LOCK */
Kojto 124:2241e3a39974 98
Kojto 124:2241e3a39974 99 /*! @brief Pin mux selection */
Kojto 124:2241e3a39974 100 typedef enum _port_mux
Kojto 124:2241e3a39974 101 {
Kojto 124:2241e3a39974 102 kPORT_PinDisabledOrAnalog = 0U, /*!< corresponding pin is disabled, but is used as an analog pin. */
Kojto 124:2241e3a39974 103 kPORT_MuxAsGpio = 1U, /*!< corresponding pin is configured as GPIO. */
Kojto 124:2241e3a39974 104 kPORT_MuxAlt2 = 2U, /*!< chip-specific */
Kojto 124:2241e3a39974 105 kPORT_MuxAlt3 = 3U, /*!< chip-specific */
Kojto 124:2241e3a39974 106 kPORT_MuxAlt4 = 4U, /*!< chip-specific */
Kojto 124:2241e3a39974 107 kPORT_MuxAlt5 = 5U, /*!< chip-specific */
Kojto 124:2241e3a39974 108 kPORT_MuxAlt6 = 6U, /*!< chip-specific */
Kojto 124:2241e3a39974 109 kPORT_MuxAlt7 = 7U, /*!< chip-specific */
Kojto 124:2241e3a39974 110 } port_mux_t;
Kojto 124:2241e3a39974 111
Kojto 124:2241e3a39974 112 /*! @brief Configures the interrupt generation condition. */
Kojto 124:2241e3a39974 113 typedef enum _port_interrupt
Kojto 124:2241e3a39974 114 {
Kojto 124:2241e3a39974 115 kPORT_InterruptOrDMADisabled = 0x0U, /*!< Interrupt/DMA request is disabled. */
Kojto 124:2241e3a39974 116 #if defined(FSL_FEATURE_PORT_HAS_DMA_REQUEST) && FSL_FEATURE_PORT_HAS_DMA_REQUEST
Kojto 124:2241e3a39974 117 kPORT_DMARisingEdge = 0x1U, /*!< DMA request on rising edge. */
Kojto 124:2241e3a39974 118 kPORT_DMAFallingEdge = 0x2U, /*!< DMA request on falling edge. */
Kojto 124:2241e3a39974 119 kPORT_DMAEitherEdge = 0x3U, /*!< DMA request on either edge. */
Kojto 124:2241e3a39974 120 #endif
Kojto 124:2241e3a39974 121 #if defined(FSL_FEATURE_PORT_HAS_IRQC_FLAG) && FSL_FEATURE_PORT_HAS_IRQC_FLAG
Kojto 124:2241e3a39974 122 kPORT_FlagRisingEdge = 0x05U, /*!< Flag sets on rising edge. */
Kojto 124:2241e3a39974 123 kPORT_FlagFallingEdge = 0x06U, /*!< Flag sets on falling edge. */
Kojto 124:2241e3a39974 124 kPORT_FlagEitherEdge = 0x07U, /*!< Flag sets on either edge. */
Kojto 124:2241e3a39974 125 #endif
Kojto 124:2241e3a39974 126 kPORT_InterruptLogicZero = 0x8U, /*!< Interrupt when logic zero. */
Kojto 124:2241e3a39974 127 kPORT_InterruptRisingEdge = 0x9U, /*!< Interrupt on rising edge. */
Kojto 124:2241e3a39974 128 kPORT_InterruptFallingEdge = 0xAU, /*!< Interrupt on falling edge. */
Kojto 124:2241e3a39974 129 kPORT_InterruptEitherEdge = 0xBU, /*!< Interrupt on either edge. */
Kojto 124:2241e3a39974 130 kPORT_InterruptLogicOne = 0xCU, /*!< Interrupt when logic one. */
Kojto 124:2241e3a39974 131 #if defined(FSL_FEATURE_PORT_HAS_IRQC_TRIGGER) && FSL_FEATURE_PORT_HAS_IRQC_TRIGGER
Kojto 124:2241e3a39974 132 kPORT_ActiveHighTriggerOutputEnable = 0xDU, /*!< Enable active high trigger output. */
Kojto 124:2241e3a39974 133 kPORT_ActiveLowTriggerOutputEnable = 0xEU, /*!< Enable active low trigger output. */
Kojto 124:2241e3a39974 134 #endif
Kojto 124:2241e3a39974 135 } port_interrupt_t;
Kojto 124:2241e3a39974 136
Kojto 124:2241e3a39974 137 #if defined(FSL_FEATURE_PORT_HAS_DIGITAL_FILTER) && FSL_FEATURE_PORT_HAS_DIGITAL_FILTER
Kojto 124:2241e3a39974 138 /*! @brief Digital filter clock source selection */
Kojto 124:2241e3a39974 139 typedef enum _port_digital_filter_clock_source
Kojto 124:2241e3a39974 140 {
Kojto 124:2241e3a39974 141 kPORT_BusClock = 0U, /*!< Digital filters are clocked by the bus clock. */
Kojto 124:2241e3a39974 142 kPORT_LpoClock = 1U, /*!< Digital filters are clocked by the 1 kHz LPO clock. */
Kojto 124:2241e3a39974 143 } port_digital_filter_clock_source_t;
Kojto 124:2241e3a39974 144
Kojto 124:2241e3a39974 145 /*! @brief PORT digital filter feature configuration definition */
Kojto 124:2241e3a39974 146 typedef struct _port_digital_filter_config
Kojto 124:2241e3a39974 147 {
Kojto 124:2241e3a39974 148 uint32_t digitalFilterWidth; /*!< Set digital filter width */
Kojto 124:2241e3a39974 149 port_digital_filter_clock_source_t clockSource; /*!< Set digital filter clockSource */
Kojto 124:2241e3a39974 150 } port_digital_filter_config_t;
Kojto 124:2241e3a39974 151 #endif /* FSL_FEATURE_PORT_HAS_DIGITAL_FILTER */
Kojto 124:2241e3a39974 152
Kojto 124:2241e3a39974 153 /*! @brief PORT pin config structure */
Kojto 124:2241e3a39974 154 typedef struct _port_pin_config
Kojto 124:2241e3a39974 155 {
Kojto 124:2241e3a39974 156 uint16_t pullSelect : 2; /*!< no-pull/pull-down/pull-up select */
Kojto 124:2241e3a39974 157 uint16_t slewRate : 1; /*!< fast/slow slew rate Configure */
Kojto 124:2241e3a39974 158 uint16_t : 1;
Kojto 124:2241e3a39974 159 uint16_t passiveFilterEnable : 1; /*!< passive filter enable/disable */
Kojto 124:2241e3a39974 160 #if defined(FSL_FEATURE_PORT_HAS_OPEN_DRAIN) && FSL_FEATURE_PORT_HAS_OPEN_DRAIN
Kojto 124:2241e3a39974 161 uint16_t openDrainEnable : 1; /*!< open drain enable/disable */
Kojto 124:2241e3a39974 162 #else
Kojto 124:2241e3a39974 163 uint16_t : 1;
Kojto 124:2241e3a39974 164 #endif /* FSL_FEATURE_PORT_HAS_OPEN_DRAIN */
Kojto 124:2241e3a39974 165 uint16_t driveStrength : 1; /*!< fast/slow drive strength configure */
Kojto 124:2241e3a39974 166 uint16_t : 1;
Kojto 124:2241e3a39974 167 uint16_t mux : 3; /*!< pin mux Configure */
Kojto 124:2241e3a39974 168 uint16_t : 4;
Kojto 124:2241e3a39974 169 #if defined(FSL_FEATURE_PORT_HAS_PIN_CONTROL_LOCK) && FSL_FEATURE_PORT_HAS_PIN_CONTROL_LOCK
Kojto 124:2241e3a39974 170 uint16_t lockRegister : 1; /*!< lock/unlock the pcr field[15:0] */
Kojto 124:2241e3a39974 171 #else
Kojto 124:2241e3a39974 172 uint16_t : 1;
Kojto 124:2241e3a39974 173 #endif /* FSL_FEATURE_PORT_HAS_PIN_CONTROL_LOCK */
Kojto 124:2241e3a39974 174 } port_pin_config_t;
Kojto 124:2241e3a39974 175
Kojto 124:2241e3a39974 176 /*******************************************************************************
Kojto 124:2241e3a39974 177 * API
Kojto 124:2241e3a39974 178 ******************************************************************************/
Kojto 124:2241e3a39974 179
Kojto 124:2241e3a39974 180 #if defined(__cplusplus)
Kojto 124:2241e3a39974 181 extern "C" {
Kojto 124:2241e3a39974 182 #endif
Kojto 124:2241e3a39974 183
Kojto 124:2241e3a39974 184 /*! @name Configuration */
Kojto 124:2241e3a39974 185 /*@{*/
Kojto 124:2241e3a39974 186
Kojto 124:2241e3a39974 187 /*!
Kojto 124:2241e3a39974 188 * @brief Sets the port PCR register.
Kojto 124:2241e3a39974 189 *
Kojto 124:2241e3a39974 190 * This is an example to define an input pin or output pin PCR configuration:
Kojto 124:2241e3a39974 191 * @code
Kojto 124:2241e3a39974 192 * // Define a digital input pin PCR configuration
Kojto 124:2241e3a39974 193 * port_pin_config_t config = {
Kojto 124:2241e3a39974 194 * kPORT_PullUp,
Kojto 124:2241e3a39974 195 * kPORT_FastSlewRate,
Kojto 124:2241e3a39974 196 * kPORT_PassiveFilterDisable,
Kojto 124:2241e3a39974 197 * kPORT_OpenDrainDisable,
Kojto 124:2241e3a39974 198 * kPORT_LowDriveStrength,
Kojto 124:2241e3a39974 199 * kPORT_MuxAsGpio,
Kojto 124:2241e3a39974 200 * kPORT_UnLockRegister,
Kojto 124:2241e3a39974 201 * };
Kojto 124:2241e3a39974 202 * @endcode
Kojto 124:2241e3a39974 203 *
Kojto 124:2241e3a39974 204 * @param base PORT peripheral base pointer.
Kojto 124:2241e3a39974 205 * @param pin PORT pin number.
Kojto 124:2241e3a39974 206 * @param config PORT PCR register configure structure.
Kojto 124:2241e3a39974 207 */
Kojto 124:2241e3a39974 208 static inline void PORT_SetPinConfig(PORT_Type *base, uint32_t pin, const port_pin_config_t *config)
Kojto 124:2241e3a39974 209 {
Kojto 124:2241e3a39974 210 assert(config);
Kojto 124:2241e3a39974 211 uint32_t addr = (uint32_t)&base->PCR[pin];
Kojto 124:2241e3a39974 212 *(volatile uint16_t *)(addr) = *((const uint16_t *)config);
Kojto 124:2241e3a39974 213 }
Kojto 124:2241e3a39974 214
Kojto 124:2241e3a39974 215 /*!
Kojto 124:2241e3a39974 216 * @brief Sets the port PCR register for multiple pins.
Kojto 124:2241e3a39974 217 *
Kojto 124:2241e3a39974 218 * This is an example to define input pins or output pins PCR configuration:
Kojto 124:2241e3a39974 219 * @code
Kojto 124:2241e3a39974 220 * // Define a digital input pin PCR configuration
Kojto 124:2241e3a39974 221 * port_pin_config_t config = {
Kojto 124:2241e3a39974 222 * kPORT_PullUp ,
Kojto 124:2241e3a39974 223 * kPORT_PullEnable,
Kojto 124:2241e3a39974 224 * kPORT_FastSlewRate,
Kojto 124:2241e3a39974 225 * kPORT_PassiveFilterDisable,
Kojto 124:2241e3a39974 226 * kPORT_OpenDrainDisable,
Kojto 124:2241e3a39974 227 * kPORT_LowDriveStrength,
Kojto 124:2241e3a39974 228 * kPORT_MuxAsGpio,
Kojto 124:2241e3a39974 229 * kPORT_UnlockRegister,
Kojto 124:2241e3a39974 230 * };
Kojto 124:2241e3a39974 231 * @endcode
Kojto 124:2241e3a39974 232 *
Kojto 124:2241e3a39974 233 * @param base PORT peripheral base pointer.
Kojto 124:2241e3a39974 234 * @param mask PORT pins' numbers macro.
Kojto 124:2241e3a39974 235 * @param config PORT PCR register configure structure.
Kojto 124:2241e3a39974 236 */
Kojto 124:2241e3a39974 237 static inline void PORT_SetMultiplePinsConfig(PORT_Type *base, uint32_t mask, const port_pin_config_t *config)
Kojto 124:2241e3a39974 238 {
Kojto 124:2241e3a39974 239 assert(config);
Kojto 124:2241e3a39974 240
Kojto 124:2241e3a39974 241 uint16_t pcrl = *((const uint16_t *)config);
Kojto 124:2241e3a39974 242
Kojto 124:2241e3a39974 243 if (mask & 0xffffU)
Kojto 124:2241e3a39974 244 {
Kojto 124:2241e3a39974 245 base->GPCLR = ((mask & 0xffffU) << 16) | pcrl;
Kojto 124:2241e3a39974 246 }
Kojto 124:2241e3a39974 247 if (mask >> 16)
Kojto 124:2241e3a39974 248 {
Kojto 124:2241e3a39974 249 base->GPCHR = (mask & 0xffff0000U) | pcrl;
Kojto 124:2241e3a39974 250 }
Kojto 124:2241e3a39974 251 }
Kojto 124:2241e3a39974 252
Kojto 124:2241e3a39974 253 /*!
Kojto 124:2241e3a39974 254 * @brief Configures the pin muxing.
Kojto 124:2241e3a39974 255 *
Kojto 124:2241e3a39974 256 * @param base PORT peripheral base pointer.
Kojto 124:2241e3a39974 257 * @param pin PORT pin number.
Kojto 124:2241e3a39974 258 * @param mux pin muxing slot selection.
Kojto 124:2241e3a39974 259 * - #kPORT_PinDisabledOrAnalog: Pin disabled or work in analog function.
Kojto 124:2241e3a39974 260 * - #kPORT_MuxAsGpio : Set as GPIO.
Kojto 124:2241e3a39974 261 * - #kPORT_MuxAlt2 : chip-specific.
Kojto 124:2241e3a39974 262 * - #kPORT_MuxAlt3 : chip-specific.
Kojto 124:2241e3a39974 263 * - #kPORT_MuxAlt4 : chip-specific.
Kojto 124:2241e3a39974 264 * - #kPORT_MuxAlt5 : chip-specific.
Kojto 124:2241e3a39974 265 * - #kPORT_MuxAlt6 : chip-specific.
Kojto 124:2241e3a39974 266 * - #kPORT_MuxAlt7 : chip-specific.
Kojto 124:2241e3a39974 267 * @Note : This function is NOT recommended to use together with the PORT_SetPinsConfig, because
Kojto 124:2241e3a39974 268 * the PORT_SetPinsConfig need to configure the pin mux anyway (Otherwise the pin mux will
Kojto 124:2241e3a39974 269 * be reset to zero : kPORT_PinDisabledOrAnalog).
Kojto 124:2241e3a39974 270 * This function is recommended to use in the case you just need to reset the pin mux
Kojto 124:2241e3a39974 271 *
Kojto 124:2241e3a39974 272 */
Kojto 124:2241e3a39974 273 static inline void PORT_SetPinMux(PORT_Type *base, uint32_t pin, port_mux_t mux)
Kojto 124:2241e3a39974 274 {
Kojto 124:2241e3a39974 275 base->PCR[pin] = (base->PCR[pin] & ~PORT_PCR_MUX_MASK) | PORT_PCR_MUX(mux);
Kojto 124:2241e3a39974 276 }
Kojto 124:2241e3a39974 277
Kojto 124:2241e3a39974 278 #if defined(FSL_FEATURE_PORT_HAS_DIGITAL_FILTER) && FSL_FEATURE_PORT_HAS_DIGITAL_FILTER
Kojto 124:2241e3a39974 279
Kojto 124:2241e3a39974 280 /*!
Kojto 124:2241e3a39974 281 * @brief Enables the digital filter in one port, each bit of the 32-bit register represents one pin.
Kojto 124:2241e3a39974 282 *
Kojto 124:2241e3a39974 283 * @param base PORT peripheral base pointer.
Kojto 124:2241e3a39974 284 * @param mask PORT pins' numbers macro.
Kojto 124:2241e3a39974 285 */
Kojto 124:2241e3a39974 286 static inline void PORT_EnablePinsDigitalFilter(PORT_Type *base, uint32_t mask, bool enable)
Kojto 124:2241e3a39974 287 {
Kojto 124:2241e3a39974 288 if (enable == true)
Kojto 124:2241e3a39974 289 {
Kojto 124:2241e3a39974 290 base->DFER |= mask;
Kojto 124:2241e3a39974 291 }
Kojto 124:2241e3a39974 292 else
Kojto 124:2241e3a39974 293 {
Kojto 124:2241e3a39974 294 base->DFER &= ~mask;
Kojto 124:2241e3a39974 295 }
Kojto 124:2241e3a39974 296 }
Kojto 124:2241e3a39974 297
Kojto 124:2241e3a39974 298 /*!
Kojto 124:2241e3a39974 299 * @brief Sets the digital filter in one port, each bit of the 32-bit register represents one pin.
Kojto 124:2241e3a39974 300 *
Kojto 124:2241e3a39974 301 * @param base PORT peripheral base pointer.
Kojto 124:2241e3a39974 302 * @param config PORT digital filter configuration structure.
Kojto 124:2241e3a39974 303 */
Kojto 124:2241e3a39974 304 static inline void PORT_SetDigitalFilterConfig(PORT_Type *base, const port_digital_filter_config_t *config)
Kojto 124:2241e3a39974 305 {
Kojto 124:2241e3a39974 306 assert(config);
Kojto 124:2241e3a39974 307
Kojto 124:2241e3a39974 308 base->DFCR = PORT_DFCR_CS(config->clockSource);
Kojto 124:2241e3a39974 309 base->DFWR = PORT_DFWR_FILT(config->digitalFilterWidth);
Kojto 124:2241e3a39974 310 }
Kojto 124:2241e3a39974 311
Kojto 124:2241e3a39974 312 #endif /* FSL_FEATURE_PORT_HAS_DIGITAL_FILTER */
Kojto 124:2241e3a39974 313
Kojto 124:2241e3a39974 314 /*@}*/
Kojto 124:2241e3a39974 315
Kojto 124:2241e3a39974 316 /*! @name Interrupt */
Kojto 124:2241e3a39974 317 /*@{*/
Kojto 124:2241e3a39974 318
Kojto 124:2241e3a39974 319 /*!
Kojto 124:2241e3a39974 320 * @brief Configures the port pin interrupt/DMA request.
Kojto 124:2241e3a39974 321 *
Kojto 124:2241e3a39974 322 * @param base PORT peripheral base pointer.
Kojto 124:2241e3a39974 323 * @param pin PORT pin number.
Kojto 124:2241e3a39974 324 * @param config PORT pin interrupt configuration.
Kojto 124:2241e3a39974 325 * - #kPORT_InterruptOrDMADisabled: Interrupt/DMA request disabled.
Kojto 124:2241e3a39974 326 * - #kPORT_DMARisingEdge : DMA request on rising edge(if the DMA requests exit).
Kojto 124:2241e3a39974 327 * - #kPORT_DMAFallingEdge: DMA request on falling edge(if the DMA requests exit).
Kojto 124:2241e3a39974 328 * - #kPORT_DMAEitherEdge : DMA request on either edge(if the DMA requests exit).
Kojto 124:2241e3a39974 329 * - #kPORT_FlagRisingEdge : Flag sets on rising edge(if the Flag states exit).
Kojto 124:2241e3a39974 330 * - #kPORT_FlagFallingEdge : Flag sets on falling edge(if the Flag states exit).
Kojto 124:2241e3a39974 331 * - #kPORT_FlagEitherEdge : Flag sets on either edge(if the Flag states exit).
Kojto 124:2241e3a39974 332 * - #kPORT_InterruptLogicZero : Interrupt when logic zero.
Kojto 124:2241e3a39974 333 * - #kPORT_InterruptRisingEdge : Interrupt on rising edge.
Kojto 124:2241e3a39974 334 * - #kPORT_InterruptFallingEdge: Interrupt on falling edge.
Kojto 124:2241e3a39974 335 * - #kPORT_InterruptEitherEdge : Interrupt on either edge.
Kojto 124:2241e3a39974 336 * - #kPORT_InterruptLogicOne : Interrupt when logic one.
Kojto 124:2241e3a39974 337 * - #kPORT_ActiveHighTriggerOutputEnable : Enable active high trigger output(if the trigger states exit).
Kojto 124:2241e3a39974 338 * - #kPORT_ActiveLowTriggerOutputEnable : Enable active low trigger output(if the trigger states exit).
Kojto 124:2241e3a39974 339 */
Kojto 124:2241e3a39974 340 static inline void PORT_SetPinInterruptConfig(PORT_Type *base, uint32_t pin, port_interrupt_t config)
Kojto 124:2241e3a39974 341 {
Kojto 124:2241e3a39974 342 base->PCR[pin] = (base->PCR[pin] & ~PORT_PCR_IRQC_MASK) | PORT_PCR_IRQC(config);
Kojto 124:2241e3a39974 343 }
Kojto 124:2241e3a39974 344
Kojto 124:2241e3a39974 345 /*!
Kojto 124:2241e3a39974 346 * @brief Reads the whole port status flag.
Kojto 124:2241e3a39974 347 *
Kojto 124:2241e3a39974 348 * If a pin is configured to generate the DMA request, the corresponding flag
Kojto 124:2241e3a39974 349 * is cleared automatically at the completion of the requested DMA transfer.
Kojto 124:2241e3a39974 350 * Otherwise, the flag remains set until a logic one is written to that flag.
Kojto 124:2241e3a39974 351 * If configured for a level sensitive interrupt that remains asserted, the flag
Kojto 124:2241e3a39974 352 * is set again immediately.
Kojto 124:2241e3a39974 353 *
Kojto 124:2241e3a39974 354 * @param base PORT peripheral base pointer.
Kojto 124:2241e3a39974 355 * @return Current port interrupt status flags, for example, 0x00010001 means the
Kojto 124:2241e3a39974 356 * pin 0 and 17 have the interrupt.
Kojto 124:2241e3a39974 357 */
Kojto 124:2241e3a39974 358 static inline uint32_t PORT_GetPinsInterruptFlags(PORT_Type *base)
Kojto 124:2241e3a39974 359 {
Kojto 124:2241e3a39974 360 return base->ISFR;
Kojto 124:2241e3a39974 361 }
Kojto 124:2241e3a39974 362
Kojto 124:2241e3a39974 363 /*!
Kojto 124:2241e3a39974 364 * @brief Clears the multiple pins' interrupt status flag.
Kojto 124:2241e3a39974 365 *
Kojto 124:2241e3a39974 366 * @param base PORT peripheral base pointer.
Kojto 124:2241e3a39974 367 * @param mask PORT pins' numbers macro.
Kojto 124:2241e3a39974 368 */
Kojto 124:2241e3a39974 369 static inline void PORT_ClearPinsInterruptFlags(PORT_Type *base, uint32_t mask)
Kojto 124:2241e3a39974 370 {
Kojto 124:2241e3a39974 371 base->ISFR = mask;
Kojto 124:2241e3a39974 372 }
Kojto 124:2241e3a39974 373
Kojto 124:2241e3a39974 374 /*@}*/
Kojto 124:2241e3a39974 375
Kojto 124:2241e3a39974 376 #if defined(__cplusplus)
Kojto 124:2241e3a39974 377 }
Kojto 124:2241e3a39974 378 #endif
Kojto 124:2241e3a39974 379
Kojto 124:2241e3a39974 380 /*! @}*/
Kojto 124:2241e3a39974 381
Kojto 124:2241e3a39974 382 #endif /* _FSL_PORT_H_ */