mbed official / mbed

Dependents:   hello SerialTestv11 SerialTestv12 Sierpinski ... more

Committer:
<>
Date:
Wed Jan 04 14:13:01 2017 +0000
Revision:
133:99b5ccf27215
Parent:
TARGET_KL43Z/TARGET_Freescale/TARGET_KSDK2_MCUS/TARGET_KL43Z/drivers/fsl_gpio.h@124:2241e3a39974
Release 133 of the mbed library

Ports for Upcoming Targets

3459: Target: Add new target UBLOX_EVK_NINA_B1 https://github.com/ARMmbed/mbed-os/pull/3459

Fixes and Changes

3430: Fix ci shield eeprom test https://github.com/ARMmbed/mbed-os/pull/3430
3381: STM32F1 : map ST HAL assert into MBED assert https://github.com/ARMmbed/mbed-os/pull/3381
3389: STM32F2 : map ST HAL assert into MBED assert https://github.com/ARMmbed/mbed-os/pull/3389
3390: STM32F3 : map ST HAL assert into MBED assert https://github.com/ARMmbed/mbed-os/pull/3390
3410: STM32L4 : map ST HAL assert into MBED assert https://github.com/ARMmbed/mbed-os/pull/3410
3422: Enable CAN on DISCO_F303VC https://github.com/ARMmbed/mbed-os/pull/3422
3442: Dev stm i2c f1 https://github.com/ARMmbed/mbed-os/pull/3442
3460: KSDK I2C: Update the return value to match the API documentation change https://github.com/ARMmbed/mbed-os/pull/3460
3472: [RZ/A1H]Fix TTB setting of RO_DATA area https://github.com/ARMmbed/mbed-os/pull/3472
3451: Rename KSDK2 to MCUXpresso. This is the new name of this package https://github.com/ARMmbed/mbed-os/pull/3451
3391: STM32F4 : map ST HAL assert into MBED assert https://github.com/ARMmbed/mbed-os/pull/3391
3454: STM32: Refactor lp_ticker.c + rtc_api.c + sleep.c + rtc_api_hal.h files https://github.com/ARMmbed/mbed-os/pull/3454
3489: NUCLEO_F103RB - Correct CAN and PWM alternate-functions https://github.com/ARMmbed/mbed-os/pull/3489
3405: Repair the transmit mailbox (0,1,2) empty interrupt flag not clear BUG https://github.com/ARMmbed/mbed-os/pull/3405
3502: MCUXpresso I2C: Handle 0 byte write https://github.com/ARMmbed/mbed-os/pull/3502
3365: [NUC472/M453] Support USB device https://github.com/ARMmbed/mbed-os/pull/3365

Who changed what in which revision?

UserRevisionLine numberNew contents of line
Kojto 124:2241e3a39974 1 /*
Kojto 124:2241e3a39974 2 * Copyright (c) 2015, Freescale Semiconductor, Inc.
Kojto 124:2241e3a39974 3 * All rights reserved.
Kojto 124:2241e3a39974 4 *
Kojto 124:2241e3a39974 5 * Redistribution and use in source and binary forms, with or without modification,
Kojto 124:2241e3a39974 6 * are permitted provided that the following conditions are met:
Kojto 124:2241e3a39974 7 *
Kojto 124:2241e3a39974 8 * o Redistributions of source code must retain the above copyright notice, this list
Kojto 124:2241e3a39974 9 * of conditions and the following disclaimer.
Kojto 124:2241e3a39974 10 *
Kojto 124:2241e3a39974 11 * o Redistributions in binary form must reproduce the above copyright notice, this
Kojto 124:2241e3a39974 12 * list of conditions and the following disclaimer in the documentation and/or
Kojto 124:2241e3a39974 13 * other materials provided with the distribution.
Kojto 124:2241e3a39974 14 *
Kojto 124:2241e3a39974 15 * o Neither the name of Freescale Semiconductor, Inc. nor the names of its
Kojto 124:2241e3a39974 16 * contributors may be used to endorse or promote products derived from this
Kojto 124:2241e3a39974 17 * software without specific prior written permission.
Kojto 124:2241e3a39974 18 *
Kojto 124:2241e3a39974 19 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
Kojto 124:2241e3a39974 20 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
Kojto 124:2241e3a39974 21 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
Kojto 124:2241e3a39974 22 * DISCLAIMED. IN NO EVENT SDRVL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
Kojto 124:2241e3a39974 23 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
Kojto 124:2241e3a39974 24 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
Kojto 124:2241e3a39974 25 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
Kojto 124:2241e3a39974 26 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
Kojto 124:2241e3a39974 27 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
Kojto 124:2241e3a39974 28 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
Kojto 124:2241e3a39974 29 */
Kojto 124:2241e3a39974 30
Kojto 124:2241e3a39974 31 #ifndef _FSL_GPIO_H_
Kojto 124:2241e3a39974 32 #define _FSL_GPIO_H_
Kojto 124:2241e3a39974 33
Kojto 124:2241e3a39974 34 #include "fsl_common.h"
Kojto 124:2241e3a39974 35
Kojto 124:2241e3a39974 36 /*!
Kojto 124:2241e3a39974 37 * @addtogroup gpio
Kojto 124:2241e3a39974 38 * @{
Kojto 124:2241e3a39974 39 */
Kojto 124:2241e3a39974 40
Kojto 124:2241e3a39974 41 /*! @file */
Kojto 124:2241e3a39974 42
Kojto 124:2241e3a39974 43 /*******************************************************************************
Kojto 124:2241e3a39974 44 * Definitions
Kojto 124:2241e3a39974 45 ******************************************************************************/
Kojto 124:2241e3a39974 46
Kojto 124:2241e3a39974 47 /*! @name Driver version */
Kojto 124:2241e3a39974 48 /*@{*/
Kojto 124:2241e3a39974 49 /*! @brief GPIO driver version 2.1.0. */
Kojto 124:2241e3a39974 50 #define FSL_GPIO_DRIVER_VERSION (MAKE_VERSION(2, 1, 0))
Kojto 124:2241e3a39974 51 /*@}*/
Kojto 124:2241e3a39974 52
Kojto 124:2241e3a39974 53 /*! @brief GPIO direction definition*/
Kojto 124:2241e3a39974 54 typedef enum _gpio_pin_direction
Kojto 124:2241e3a39974 55 {
Kojto 124:2241e3a39974 56 kGPIO_DigitalInput = 0U, /*!< Set current pin as digital input*/
Kojto 124:2241e3a39974 57 kGPIO_DigitalOutput = 1U, /*!< Set current pin as digital output*/
Kojto 124:2241e3a39974 58 } gpio_pin_direction_t;
Kojto 124:2241e3a39974 59
Kojto 124:2241e3a39974 60 /*!
Kojto 124:2241e3a39974 61 * @brief The GPIO pin configuration structure.
Kojto 124:2241e3a39974 62 *
Kojto 124:2241e3a39974 63 * Every pin can only be configured as either output pin or input pin at a time.
Kojto 124:2241e3a39974 64 * If configured as a input pin, then leave the outputConfig unused
Kojto 124:2241e3a39974 65 * Note : In some cases, the corresponding port property should be configured in advance
Kojto 124:2241e3a39974 66 * with the PORT_SetPinConfig()
Kojto 124:2241e3a39974 67 */
Kojto 124:2241e3a39974 68 typedef struct _gpio_pin_config
Kojto 124:2241e3a39974 69 {
Kojto 124:2241e3a39974 70 gpio_pin_direction_t pinDirection; /*!< gpio direction, input or output */
Kojto 124:2241e3a39974 71 /* Output configurations, please ignore if configured as a input one */
Kojto 124:2241e3a39974 72 uint8_t outputLogic; /*!< Set default output logic, no use in input */
Kojto 124:2241e3a39974 73 } gpio_pin_config_t;
Kojto 124:2241e3a39974 74
Kojto 124:2241e3a39974 75 /*! @} */
Kojto 124:2241e3a39974 76
Kojto 124:2241e3a39974 77 /*******************************************************************************
Kojto 124:2241e3a39974 78 * API
Kojto 124:2241e3a39974 79 ******************************************************************************/
Kojto 124:2241e3a39974 80
Kojto 124:2241e3a39974 81 #if defined(__cplusplus)
Kojto 124:2241e3a39974 82 extern "C" {
Kojto 124:2241e3a39974 83 #endif
Kojto 124:2241e3a39974 84
Kojto 124:2241e3a39974 85 /*!
Kojto 124:2241e3a39974 86 * @addtogroup gpio_driver
Kojto 124:2241e3a39974 87 * @{
Kojto 124:2241e3a39974 88 */
Kojto 124:2241e3a39974 89
Kojto 124:2241e3a39974 90 /*! @name GPIO Configuration */
Kojto 124:2241e3a39974 91 /*@{*/
Kojto 124:2241e3a39974 92
Kojto 124:2241e3a39974 93 /*!
Kojto 124:2241e3a39974 94 * @brief Initializes a GPIO pin used by the board.
Kojto 124:2241e3a39974 95 *
Kojto 124:2241e3a39974 96 * To initialize the GPIO, define a pin configuration, either input or output, in the user file.
Kojto 124:2241e3a39974 97 * Then, call the GPIO_PinInit() function.
Kojto 124:2241e3a39974 98 *
Kojto 124:2241e3a39974 99 * This is an example to define an input pin or output pin configuration:
Kojto 124:2241e3a39974 100 * @code
Kojto 124:2241e3a39974 101 * // Define a digital input pin configuration,
Kojto 124:2241e3a39974 102 * gpio_pin_config_t config =
Kojto 124:2241e3a39974 103 * {
Kojto 124:2241e3a39974 104 * kGPIO_DigitalInput,
Kojto 124:2241e3a39974 105 * 0,
Kojto 124:2241e3a39974 106 * }
Kojto 124:2241e3a39974 107 * //Define a digital output pin configuration,
Kojto 124:2241e3a39974 108 * gpio_pin_config_t config =
Kojto 124:2241e3a39974 109 * {
Kojto 124:2241e3a39974 110 * kGPIO_DigitalOutput,
Kojto 124:2241e3a39974 111 * 0,
Kojto 124:2241e3a39974 112 * }
Kojto 124:2241e3a39974 113 * @endcode
Kojto 124:2241e3a39974 114 *
Kojto 124:2241e3a39974 115 * @param base GPIO peripheral base pointer(GPIOA, GPIOB, GPIOC, and so on.)
Kojto 124:2241e3a39974 116 * @param pin GPIO port pin number
Kojto 124:2241e3a39974 117 * @param config GPIO pin configuration pointer
Kojto 124:2241e3a39974 118 */
Kojto 124:2241e3a39974 119 void GPIO_PinInit(GPIO_Type *base, uint32_t pin, const gpio_pin_config_t *config);
Kojto 124:2241e3a39974 120
Kojto 124:2241e3a39974 121 /*@}*/
Kojto 124:2241e3a39974 122
Kojto 124:2241e3a39974 123 /*! @name GPIO Output Operations */
Kojto 124:2241e3a39974 124 /*@{*/
Kojto 124:2241e3a39974 125
Kojto 124:2241e3a39974 126 /*!
Kojto 124:2241e3a39974 127 * @brief Sets the output level of the multiple GPIO pins to the logic 1 or 0.
Kojto 124:2241e3a39974 128 *
Kojto 124:2241e3a39974 129 * @param base GPIO peripheral base pointer(GPIOA, GPIOB, GPIOC, and so on.)
Kojto 124:2241e3a39974 130 * @param pin GPIO pin's number
Kojto 124:2241e3a39974 131 * @param output GPIO pin output logic level.
Kojto 124:2241e3a39974 132 * - 0: corresponding pin output low logic level.
Kojto 124:2241e3a39974 133 * - 1: corresponding pin output high logic level.
Kojto 124:2241e3a39974 134 */
Kojto 124:2241e3a39974 135 static inline void GPIO_WritePinOutput(GPIO_Type *base, uint32_t pin, uint8_t output)
Kojto 124:2241e3a39974 136 {
Kojto 124:2241e3a39974 137 if (output == 0U)
Kojto 124:2241e3a39974 138 {
Kojto 124:2241e3a39974 139 base->PCOR = 1 << pin;
Kojto 124:2241e3a39974 140 }
Kojto 124:2241e3a39974 141 else
Kojto 124:2241e3a39974 142 {
Kojto 124:2241e3a39974 143 base->PSOR = 1 << pin;
Kojto 124:2241e3a39974 144 }
Kojto 124:2241e3a39974 145 }
Kojto 124:2241e3a39974 146
Kojto 124:2241e3a39974 147 /*!
Kojto 124:2241e3a39974 148 * @brief Sets the output level of the multiple GPIO pins to the logic 1.
Kojto 124:2241e3a39974 149 *
Kojto 124:2241e3a39974 150 * @param base GPIO peripheral base pointer(GPIOA, GPIOB, GPIOC, and so on.)
Kojto 124:2241e3a39974 151 * @param mask GPIO pins' numbers macro
Kojto 124:2241e3a39974 152 */
Kojto 124:2241e3a39974 153 static inline void GPIO_SetPinsOutput(GPIO_Type *base, uint32_t mask)
Kojto 124:2241e3a39974 154 {
Kojto 124:2241e3a39974 155 base->PSOR = mask;
Kojto 124:2241e3a39974 156 }
Kojto 124:2241e3a39974 157
Kojto 124:2241e3a39974 158 /*!
Kojto 124:2241e3a39974 159 * @brief Sets the output level of the multiple GPIO pins to the logic 0.
Kojto 124:2241e3a39974 160 *
Kojto 124:2241e3a39974 161 * @param base GPIO peripheral base pointer(GPIOA, GPIOB, GPIOC, and so on.)
Kojto 124:2241e3a39974 162 * @param mask GPIO pins' numbers macro
Kojto 124:2241e3a39974 163 */
Kojto 124:2241e3a39974 164 static inline void GPIO_ClearPinsOutput(GPIO_Type *base, uint32_t mask)
Kojto 124:2241e3a39974 165 {
Kojto 124:2241e3a39974 166 base->PCOR = mask;
Kojto 124:2241e3a39974 167 }
Kojto 124:2241e3a39974 168
Kojto 124:2241e3a39974 169 /*!
Kojto 124:2241e3a39974 170 * @brief Reverses current output logic of the multiple GPIO pins.
Kojto 124:2241e3a39974 171 *
Kojto 124:2241e3a39974 172 * @param base GPIO peripheral base pointer(GPIOA, GPIOB, GPIOC, and so on.)
Kojto 124:2241e3a39974 173 * @param mask GPIO pins' numbers macro
Kojto 124:2241e3a39974 174 */
Kojto 124:2241e3a39974 175 static inline void GPIO_TogglePinsOutput(GPIO_Type *base, uint32_t mask)
Kojto 124:2241e3a39974 176 {
Kojto 124:2241e3a39974 177 base->PTOR = mask;
Kojto 124:2241e3a39974 178 }
Kojto 124:2241e3a39974 179 /*@}*/
Kojto 124:2241e3a39974 180
Kojto 124:2241e3a39974 181 /*! @name GPIO Input Operations */
Kojto 124:2241e3a39974 182 /*@{*/
Kojto 124:2241e3a39974 183
Kojto 124:2241e3a39974 184 /*!
Kojto 124:2241e3a39974 185 * @brief Reads the current input value of the whole GPIO port.
Kojto 124:2241e3a39974 186 *
Kojto 124:2241e3a39974 187 * @param base GPIO peripheral base pointer(GPIOA, GPIOB, GPIOC, and so on.)
Kojto 124:2241e3a39974 188 * @param pin GPIO pin's number
Kojto 124:2241e3a39974 189 * @retval GPIO port input value
Kojto 124:2241e3a39974 190 * - 0: corresponding pin input low logic level.
Kojto 124:2241e3a39974 191 * - 1: corresponding pin input high logic level.
Kojto 124:2241e3a39974 192 */
Kojto 124:2241e3a39974 193 static inline uint32_t GPIO_ReadPinInput(GPIO_Type *base, uint32_t pin)
Kojto 124:2241e3a39974 194 {
Kojto 124:2241e3a39974 195 return (((base->PDIR) >> pin) & 0x01U);
Kojto 124:2241e3a39974 196 }
Kojto 124:2241e3a39974 197 /*@}*/
Kojto 124:2241e3a39974 198
Kojto 124:2241e3a39974 199 /*! @name GPIO Interrupt */
Kojto 124:2241e3a39974 200 /*@{*/
Kojto 124:2241e3a39974 201
Kojto 124:2241e3a39974 202 /*!
Kojto 124:2241e3a39974 203 * @brief Reads whole GPIO port interrupt status flag.
Kojto 124:2241e3a39974 204 *
Kojto 124:2241e3a39974 205 * If a pin is configured to generate the DMA request, the corresponding flag
Kojto 124:2241e3a39974 206 * is cleared automatically at the completion of the requested DMA transfer.
Kojto 124:2241e3a39974 207 * Otherwise, the flag remains set until a logic one is written to that flag.
Kojto 124:2241e3a39974 208 * If configured for a level sensitive interrupt that remains asserted, the flag
Kojto 124:2241e3a39974 209 * is set again immediately.
Kojto 124:2241e3a39974 210 *
Kojto 124:2241e3a39974 211 * @param base GPIO peripheral base pointer(GPIOA, GPIOB, GPIOC, and so on.)
Kojto 124:2241e3a39974 212 * @retval Current GPIO port interrupt status flag, for example, 0x00010001 means the
Kojto 124:2241e3a39974 213 * pin 0 and 17 have the interrupt.
Kojto 124:2241e3a39974 214 */
Kojto 124:2241e3a39974 215 uint32_t GPIO_GetPinsInterruptFlags(GPIO_Type *base);
Kojto 124:2241e3a39974 216
Kojto 124:2241e3a39974 217 /*!
Kojto 124:2241e3a39974 218 * @brief Clears multiple GPIO pins' interrupt status flag.
Kojto 124:2241e3a39974 219 *
Kojto 124:2241e3a39974 220 * @param base GPIO peripheral base pointer(GPIOA, GPIOB, GPIOC, and so on.)
Kojto 124:2241e3a39974 221 * @param mask GPIO pins' numbers macro
Kojto 124:2241e3a39974 222 */
Kojto 124:2241e3a39974 223 void GPIO_ClearPinsInterruptFlags(GPIO_Type *base, uint32_t mask);
Kojto 124:2241e3a39974 224
Kojto 124:2241e3a39974 225 /*@}*/
Kojto 124:2241e3a39974 226 /*! @} */
Kojto 124:2241e3a39974 227
Kojto 124:2241e3a39974 228 /*!
Kojto 124:2241e3a39974 229 * @addtogroup fgpio_driver
Kojto 124:2241e3a39974 230 * @{
Kojto 124:2241e3a39974 231 */
Kojto 124:2241e3a39974 232
Kojto 124:2241e3a39974 233 /*
Kojto 124:2241e3a39974 234 * Introduce the FGPIO feature.
Kojto 124:2241e3a39974 235 *
Kojto 124:2241e3a39974 236 * The FGPIO features are only support on some of Kinetis chips. The FGPIO registers are aliased to the IOPORT
Kojto 124:2241e3a39974 237 * interface. Accesses via the IOPORT interface occur in parallel with any instruction fetches and will therefore
Kojto 124:2241e3a39974 238 * complete in a single cycle. This aliased Fast GPIO memory map is called FGPIO.
Kojto 124:2241e3a39974 239 */
Kojto 124:2241e3a39974 240
Kojto 124:2241e3a39974 241 #if defined(FSL_FEATURE_SOC_FGPIO_COUNT) && FSL_FEATURE_SOC_FGPIO_COUNT
Kojto 124:2241e3a39974 242
Kojto 124:2241e3a39974 243 /*! @name FGPIO Configuration */
Kojto 124:2241e3a39974 244 /*@{*/
Kojto 124:2241e3a39974 245
Kojto 124:2241e3a39974 246 /*!
Kojto 124:2241e3a39974 247 * @brief Initializes a FGPIO pin used by the board.
Kojto 124:2241e3a39974 248 *
Kojto 124:2241e3a39974 249 * To initialize the FGPIO driver, define a pin configuration, either input or output, in the user file.
Kojto 124:2241e3a39974 250 * Then, call the FGPIO_PinInit() function.
Kojto 124:2241e3a39974 251 *
Kojto 124:2241e3a39974 252 * This is an example to define an input pin or output pin configuration:
Kojto 124:2241e3a39974 253 * @code
Kojto 124:2241e3a39974 254 * // Define a digital input pin configuration,
Kojto 124:2241e3a39974 255 * gpio_pin_config_t config =
Kojto 124:2241e3a39974 256 * {
Kojto 124:2241e3a39974 257 * kGPIO_DigitalInput,
Kojto 124:2241e3a39974 258 * 0,
Kojto 124:2241e3a39974 259 * }
Kojto 124:2241e3a39974 260 * //Define a digital output pin configuration,
Kojto 124:2241e3a39974 261 * gpio_pin_config_t config =
Kojto 124:2241e3a39974 262 * {
Kojto 124:2241e3a39974 263 * kGPIO_DigitalOutput,
Kojto 124:2241e3a39974 264 * 0,
Kojto 124:2241e3a39974 265 * }
Kojto 124:2241e3a39974 266 * @endcode
Kojto 124:2241e3a39974 267 *
Kojto 124:2241e3a39974 268 * @param base FGPIO peripheral base pointer(GPIOA, GPIOB, GPIOC, and so on.)
Kojto 124:2241e3a39974 269 * @param pin FGPIO port pin number
Kojto 124:2241e3a39974 270 * @param config FGPIO pin configuration pointer
Kojto 124:2241e3a39974 271 */
Kojto 124:2241e3a39974 272 void FGPIO_PinInit(FGPIO_Type *base, uint32_t pin, const gpio_pin_config_t *config);
Kojto 124:2241e3a39974 273
Kojto 124:2241e3a39974 274 /*@}*/
Kojto 124:2241e3a39974 275
Kojto 124:2241e3a39974 276 /*! @name FGPIO Output Operations */
Kojto 124:2241e3a39974 277 /*@{*/
Kojto 124:2241e3a39974 278
Kojto 124:2241e3a39974 279 /*!
Kojto 124:2241e3a39974 280 * @brief Sets the output level of the multiple FGPIO pins to the logic 1 or 0.
Kojto 124:2241e3a39974 281 *
Kojto 124:2241e3a39974 282 * @param base FGPIO peripheral base pointer(GPIOA, GPIOB, GPIOC, and so on.)
Kojto 124:2241e3a39974 283 * @param pin FGPIO pin's number
Kojto 124:2241e3a39974 284 * @param output FGPIOpin output logic level.
Kojto 124:2241e3a39974 285 * - 0: corresponding pin output low logic level.
Kojto 124:2241e3a39974 286 * - 1: corresponding pin output high logic level.
Kojto 124:2241e3a39974 287 */
Kojto 124:2241e3a39974 288 static inline void FGPIO_WritePinOutput(FGPIO_Type *base, uint32_t pin, uint8_t output)
Kojto 124:2241e3a39974 289 {
Kojto 124:2241e3a39974 290 if (output == 0U)
Kojto 124:2241e3a39974 291 {
Kojto 124:2241e3a39974 292 base->PCOR = 1 << pin;
Kojto 124:2241e3a39974 293 }
Kojto 124:2241e3a39974 294 else
Kojto 124:2241e3a39974 295 {
Kojto 124:2241e3a39974 296 base->PSOR = 1 << pin;
Kojto 124:2241e3a39974 297 }
Kojto 124:2241e3a39974 298 }
Kojto 124:2241e3a39974 299
Kojto 124:2241e3a39974 300 /*!
Kojto 124:2241e3a39974 301 * @brief Sets the output level of the multiple FGPIO pins to the logic 1.
Kojto 124:2241e3a39974 302 *
Kojto 124:2241e3a39974 303 * @param base FGPIO peripheral base pointer(GPIOA, GPIOB, GPIOC, and so on.)
Kojto 124:2241e3a39974 304 * @param mask FGPIO pins' numbers macro
Kojto 124:2241e3a39974 305 */
Kojto 124:2241e3a39974 306 static inline void FGPIO_SetPinsOutput(FGPIO_Type *base, uint32_t mask)
Kojto 124:2241e3a39974 307 {
Kojto 124:2241e3a39974 308 base->PSOR = mask;
Kojto 124:2241e3a39974 309 }
Kojto 124:2241e3a39974 310
Kojto 124:2241e3a39974 311 /*!
Kojto 124:2241e3a39974 312 * @brief Sets the output level of the multiple FGPIO pins to the logic 0.
Kojto 124:2241e3a39974 313 *
Kojto 124:2241e3a39974 314 * @param base FGPIO peripheral base pointer(GPIOA, GPIOB, GPIOC, and so on.)
Kojto 124:2241e3a39974 315 * @param mask FGPIO pins' numbers macro
Kojto 124:2241e3a39974 316 */
Kojto 124:2241e3a39974 317 static inline void FGPIO_ClearPinsOutput(FGPIO_Type *base, uint32_t mask)
Kojto 124:2241e3a39974 318 {
Kojto 124:2241e3a39974 319 base->PCOR = mask;
Kojto 124:2241e3a39974 320 }
Kojto 124:2241e3a39974 321
Kojto 124:2241e3a39974 322 /*!
Kojto 124:2241e3a39974 323 * @brief Reverses current output logic of the multiple FGPIO pins.
Kojto 124:2241e3a39974 324 *
Kojto 124:2241e3a39974 325 * @param base FGPIO peripheral base pointer(GPIOA, GPIOB, GPIOC, and so on.)
Kojto 124:2241e3a39974 326 * @param mask FGPIO pins' numbers macro
Kojto 124:2241e3a39974 327 */
Kojto 124:2241e3a39974 328 static inline void FGPIO_TogglePinsOutput(FGPIO_Type *base, uint32_t mask)
Kojto 124:2241e3a39974 329 {
Kojto 124:2241e3a39974 330 base->PTOR = mask;
Kojto 124:2241e3a39974 331 }
Kojto 124:2241e3a39974 332 /*@}*/
Kojto 124:2241e3a39974 333
Kojto 124:2241e3a39974 334 /*! @name FGPIO Input Operations */
Kojto 124:2241e3a39974 335 /*@{*/
Kojto 124:2241e3a39974 336
Kojto 124:2241e3a39974 337 /*!
Kojto 124:2241e3a39974 338 * @brief Reads the current input value of the whole FGPIO port.
Kojto 124:2241e3a39974 339 *
Kojto 124:2241e3a39974 340 * @param base FGPIO peripheral base pointer(GPIOA, GPIOB, GPIOC, and so on.)
Kojto 124:2241e3a39974 341 * @param pin FGPIO pin's number
Kojto 124:2241e3a39974 342 * @retval FGPIO port input value
Kojto 124:2241e3a39974 343 * - 0: corresponding pin input low logic level.
Kojto 124:2241e3a39974 344 * - 1: corresponding pin input high logic level.
Kojto 124:2241e3a39974 345 */
Kojto 124:2241e3a39974 346 static inline uint32_t FGPIO_ReadPinInput(FGPIO_Type *base, uint32_t pin)
Kojto 124:2241e3a39974 347 {
Kojto 124:2241e3a39974 348 return (((base->PDIR) >> pin) & 0x01U);
Kojto 124:2241e3a39974 349 }
Kojto 124:2241e3a39974 350 /*@}*/
Kojto 124:2241e3a39974 351
Kojto 124:2241e3a39974 352 /*! @name FGPIO Interrupt */
Kojto 124:2241e3a39974 353 /*@{*/
Kojto 124:2241e3a39974 354
Kojto 124:2241e3a39974 355 /*!
Kojto 124:2241e3a39974 356 * @brief Reads the whole FGPIO port interrupt status flag.
Kojto 124:2241e3a39974 357 *
Kojto 124:2241e3a39974 358 * If a pin is configured to generate the DMA request, the corresponding flag
Kojto 124:2241e3a39974 359 * is cleared automatically at the completion of the requested DMA transfer.
Kojto 124:2241e3a39974 360 * Otherwise, the flag remains set until a logic one is written to that flag.
Kojto 124:2241e3a39974 361 * If configured for a level sensitive interrupt that remains asserted, the flag
Kojto 124:2241e3a39974 362 * is set again immediately.
Kojto 124:2241e3a39974 363 *
Kojto 124:2241e3a39974 364 * @param base FGPIO peripheral base pointer(GPIOA, GPIOB, GPIOC, and so on.)
Kojto 124:2241e3a39974 365 * @retval Current FGPIO port interrupt status flags, for example, 0x00010001 means the
Kojto 124:2241e3a39974 366 * pin 0 and 17 have the interrupt.
Kojto 124:2241e3a39974 367 */
Kojto 124:2241e3a39974 368 uint32_t FGPIO_GetPinsInterruptFlags(FGPIO_Type *base);
Kojto 124:2241e3a39974 369
Kojto 124:2241e3a39974 370 /*!
Kojto 124:2241e3a39974 371 * @brief Clears the multiple FGPIO pins' interrupt status flag.
Kojto 124:2241e3a39974 372 *
Kojto 124:2241e3a39974 373 * @param base FGPIO peripheral base pointer(GPIOA, GPIOB, GPIOC, and so on.)
Kojto 124:2241e3a39974 374 * @param mask FGPIO pins' numbers macro
Kojto 124:2241e3a39974 375 */
Kojto 124:2241e3a39974 376 void FGPIO_ClearPinsInterruptFlags(FGPIO_Type *base, uint32_t mask);
Kojto 124:2241e3a39974 377
Kojto 124:2241e3a39974 378 /*@}*/
Kojto 124:2241e3a39974 379
Kojto 124:2241e3a39974 380 #endif /* FSL_FEATURE_SOC_FGPIO_COUNT */
Kojto 124:2241e3a39974 381
Kojto 124:2241e3a39974 382 #if defined(__cplusplus)
Kojto 124:2241e3a39974 383 }
Kojto 124:2241e3a39974 384 #endif
Kojto 124:2241e3a39974 385
Kojto 124:2241e3a39974 386 /*!
Kojto 124:2241e3a39974 387 * @}
Kojto 124:2241e3a39974 388 */
Kojto 124:2241e3a39974 389
Kojto 124:2241e3a39974 390 #endif /* _FSL_GPIO_H_*/