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TARGET_NUCLEO_F767ZI/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_nand.h@139:856d2700e60b, 2017-03-30 (annotated)
- Committer:
- <>
- Date:
- Thu Mar 30 13:26:47 2017 +0100
- Revision:
- 139:856d2700e60b
- Parent:
- 135:176b8275d35d
- Child:
- 146:22da6e220af6
Release 139 of the mbed library
Ports for Upcoming Targets
3934: [Silicon Labs] Update to HAL and devices https://github.com/ARMmbed/mbed-os/pull/3934
Known Issues
There is an issue with LPC1768 failing the 'Semihost file system' test with this release.
Fixes and Changes
3691: [TLS / hw acceleration] AES ECB for NUCLEO_F439ZI https://github.com/ARMmbed/mbed-os/pull/3691
3869: NCS36510: Default range changed from 0 to 950mV - ADC https://github.com/ARMmbed/mbed-os/pull/3869
3893: [STM32F7] Update STM32 Cube version v1.6.0 https://github.com/ARMmbed/mbed-os/pull/3893
3917: Fix mistake register setting in serial_format() https://github.com/ARMmbed/mbed-os/pull/3917
3927: [DELTA_DFBM_NQ620] Add RC calibration setting and revise mbed_overrides.c https://github.com/ARMmbed/mbed-os/pull/3927
3918: [NUC472/M453] Support unique locally administered MAC address and other driver updates https://github.com/ARMmbed/mbed-os/pull/3918
3920: Heap size adjusted to work for both tls-client and mbed-client https://github.com/ARMmbed/mbed-os/pull/3920
3969: NUCLEO_F302R8: Add missing PB_8/PB_9 CAN pins https://github.com/ARMmbed/mbed-os/pull/3969
Who changed what in which revision?
| User | Revision | Line number | New contents of line |
|---|---|---|---|
| AnnaBridge | 126:abea610beb85 | 1 | /** |
| AnnaBridge | 126:abea610beb85 | 2 | ****************************************************************************** |
| AnnaBridge | 126:abea610beb85 | 3 | * @file stm32f7xx_hal_nand.h |
| AnnaBridge | 126:abea610beb85 | 4 | * @author MCD Application Team |
| <> | 139:856d2700e60b | 5 | * @version V1.2.0 |
| <> | 139:856d2700e60b | 6 | * @date 30-December-2016 |
| AnnaBridge | 126:abea610beb85 | 7 | * @brief Header file of NAND HAL module. |
| AnnaBridge | 126:abea610beb85 | 8 | ****************************************************************************** |
| AnnaBridge | 126:abea610beb85 | 9 | * @attention |
| AnnaBridge | 126:abea610beb85 | 10 | * |
| AnnaBridge | 126:abea610beb85 | 11 | * <h2><center>© COPYRIGHT(c) 2016 STMicroelectronics</center></h2> |
| AnnaBridge | 126:abea610beb85 | 12 | * |
| AnnaBridge | 126:abea610beb85 | 13 | * Redistribution and use in source and binary forms, with or without modification, |
| AnnaBridge | 126:abea610beb85 | 14 | * are permitted provided that the following conditions are met: |
| AnnaBridge | 126:abea610beb85 | 15 | * 1. Redistributions of source code must retain the above copyright notice, |
| AnnaBridge | 126:abea610beb85 | 16 | * this list of conditions and the following disclaimer. |
| AnnaBridge | 126:abea610beb85 | 17 | * 2. Redistributions in binary form must reproduce the above copyright notice, |
| AnnaBridge | 126:abea610beb85 | 18 | * this list of conditions and the following disclaimer in the documentation |
| AnnaBridge | 126:abea610beb85 | 19 | * and/or other materials provided with the distribution. |
| AnnaBridge | 126:abea610beb85 | 20 | * 3. Neither the name of STMicroelectronics nor the names of its contributors |
| AnnaBridge | 126:abea610beb85 | 21 | * may be used to endorse or promote products derived from this software |
| AnnaBridge | 126:abea610beb85 | 22 | * without specific prior written permission. |
| AnnaBridge | 126:abea610beb85 | 23 | * |
| AnnaBridge | 126:abea610beb85 | 24 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
| AnnaBridge | 126:abea610beb85 | 25 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
| AnnaBridge | 126:abea610beb85 | 26 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
| AnnaBridge | 126:abea610beb85 | 27 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
| AnnaBridge | 126:abea610beb85 | 28 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
| AnnaBridge | 126:abea610beb85 | 29 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
| AnnaBridge | 126:abea610beb85 | 30 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
| AnnaBridge | 126:abea610beb85 | 31 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
| AnnaBridge | 126:abea610beb85 | 32 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
| AnnaBridge | 126:abea610beb85 | 33 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
| AnnaBridge | 126:abea610beb85 | 34 | * |
| AnnaBridge | 126:abea610beb85 | 35 | ****************************************************************************** |
| AnnaBridge | 126:abea610beb85 | 36 | */ |
| AnnaBridge | 126:abea610beb85 | 37 | |
| AnnaBridge | 126:abea610beb85 | 38 | /* Define to prevent recursive inclusion -------------------------------------*/ |
| AnnaBridge | 126:abea610beb85 | 39 | #ifndef __STM32F7xx_HAL_NAND_H |
| AnnaBridge | 126:abea610beb85 | 40 | #define __STM32F7xx_HAL_NAND_H |
| AnnaBridge | 126:abea610beb85 | 41 | |
| AnnaBridge | 126:abea610beb85 | 42 | #ifdef __cplusplus |
| AnnaBridge | 126:abea610beb85 | 43 | extern "C" { |
| AnnaBridge | 126:abea610beb85 | 44 | #endif |
| AnnaBridge | 126:abea610beb85 | 45 | |
| AnnaBridge | 126:abea610beb85 | 46 | /* Includes ------------------------------------------------------------------*/ |
| AnnaBridge | 126:abea610beb85 | 47 | #include "stm32f7xx_ll_fmc.h" |
| AnnaBridge | 126:abea610beb85 | 48 | |
| AnnaBridge | 126:abea610beb85 | 49 | /** @addtogroup STM32F7xx_HAL_Driver |
| AnnaBridge | 126:abea610beb85 | 50 | * @{ |
| AnnaBridge | 126:abea610beb85 | 51 | */ |
| AnnaBridge | 126:abea610beb85 | 52 | |
| AnnaBridge | 126:abea610beb85 | 53 | /** @addtogroup NAND |
| AnnaBridge | 126:abea610beb85 | 54 | * @{ |
| AnnaBridge | 126:abea610beb85 | 55 | */ |
| AnnaBridge | 126:abea610beb85 | 56 | |
| AnnaBridge | 126:abea610beb85 | 57 | /* Exported typedef ----------------------------------------------------------*/ |
| AnnaBridge | 126:abea610beb85 | 58 | /* Exported types ------------------------------------------------------------*/ |
| AnnaBridge | 126:abea610beb85 | 59 | /** @defgroup NAND_Exported_Types NAND Exported Types |
| AnnaBridge | 126:abea610beb85 | 60 | * @{ |
| AnnaBridge | 126:abea610beb85 | 61 | */ |
| AnnaBridge | 126:abea610beb85 | 62 | |
| AnnaBridge | 126:abea610beb85 | 63 | /** |
| AnnaBridge | 126:abea610beb85 | 64 | * @brief HAL NAND State structures definition |
| AnnaBridge | 126:abea610beb85 | 65 | */ |
| AnnaBridge | 126:abea610beb85 | 66 | typedef enum |
| AnnaBridge | 126:abea610beb85 | 67 | { |
| AnnaBridge | 126:abea610beb85 | 68 | HAL_NAND_STATE_RESET = 0x00U, /*!< NAND not yet initialized or disabled */ |
| AnnaBridge | 126:abea610beb85 | 69 | HAL_NAND_STATE_READY = 0x01U, /*!< NAND initialized and ready for use */ |
| AnnaBridge | 126:abea610beb85 | 70 | HAL_NAND_STATE_BUSY = 0x02U, /*!< NAND internal process is ongoing */ |
| AnnaBridge | 126:abea610beb85 | 71 | HAL_NAND_STATE_ERROR = 0x03U /*!< NAND error state */ |
| AnnaBridge | 126:abea610beb85 | 72 | }HAL_NAND_StateTypeDef; |
| AnnaBridge | 126:abea610beb85 | 73 | |
| AnnaBridge | 126:abea610beb85 | 74 | /** |
| AnnaBridge | 126:abea610beb85 | 75 | * @brief NAND Memory electronic signature Structure definition |
| AnnaBridge | 126:abea610beb85 | 76 | */ |
| AnnaBridge | 126:abea610beb85 | 77 | typedef struct |
| AnnaBridge | 126:abea610beb85 | 78 | { |
| AnnaBridge | 126:abea610beb85 | 79 | /*<! NAND memory electronic signature maker and device IDs */ |
| AnnaBridge | 126:abea610beb85 | 80 | |
| AnnaBridge | 126:abea610beb85 | 81 | uint8_t Maker_Id; |
| AnnaBridge | 126:abea610beb85 | 82 | |
| AnnaBridge | 126:abea610beb85 | 83 | uint8_t Device_Id; |
| AnnaBridge | 126:abea610beb85 | 84 | |
| AnnaBridge | 126:abea610beb85 | 85 | uint8_t Third_Id; |
| AnnaBridge | 126:abea610beb85 | 86 | |
| AnnaBridge | 126:abea610beb85 | 87 | uint8_t Fourth_Id; |
| AnnaBridge | 126:abea610beb85 | 88 | }NAND_IDTypeDef; |
| AnnaBridge | 126:abea610beb85 | 89 | |
| AnnaBridge | 126:abea610beb85 | 90 | /** |
| AnnaBridge | 126:abea610beb85 | 91 | * @brief NAND Memory address Structure definition |
| AnnaBridge | 126:abea610beb85 | 92 | */ |
| AnnaBridge | 126:abea610beb85 | 93 | typedef struct |
| AnnaBridge | 126:abea610beb85 | 94 | { |
| AnnaBridge | 126:abea610beb85 | 95 | uint16_t Page; /*!< NAND memory Page address */ |
| AnnaBridge | 126:abea610beb85 | 96 | |
| <> | 139:856d2700e60b | 97 | uint16_t Plane; /*!< NAND memory Zone address */ |
| AnnaBridge | 126:abea610beb85 | 98 | |
| AnnaBridge | 126:abea610beb85 | 99 | uint16_t Block; /*!< NAND memory Block address */ |
| AnnaBridge | 126:abea610beb85 | 100 | |
| AnnaBridge | 126:abea610beb85 | 101 | }NAND_AddressTypeDef; |
| AnnaBridge | 126:abea610beb85 | 102 | |
| AnnaBridge | 126:abea610beb85 | 103 | /** |
| AnnaBridge | 126:abea610beb85 | 104 | * @brief NAND Memory info Structure definition |
| AnnaBridge | 126:abea610beb85 | 105 | */ |
| AnnaBridge | 126:abea610beb85 | 106 | typedef struct |
| AnnaBridge | 126:abea610beb85 | 107 | { |
| <> | 139:856d2700e60b | 108 | uint32_t PageSize; /*!< NAND memory page (without spare area) size measured in bytes |
| <> | 139:856d2700e60b | 109 | for 8 bits adressing or words for 16 bits addressing */ |
| AnnaBridge | 126:abea610beb85 | 110 | |
| <> | 139:856d2700e60b | 111 | uint32_t SpareAreaSize; /*!< NAND memory spare area size measured in bytes |
| <> | 139:856d2700e60b | 112 | for 8 bits adressing or words for 16 bits addressing */ |
| <> | 139:856d2700e60b | 113 | |
| <> | 139:856d2700e60b | 114 | uint32_t BlockSize; /*!< NAND memory block size measured in number of pages */ |
| AnnaBridge | 126:abea610beb85 | 115 | |
| <> | 139:856d2700e60b | 116 | uint32_t BlockNbr; /*!< NAND memory number of total blocks */ |
| <> | 139:856d2700e60b | 117 | |
| <> | 139:856d2700e60b | 118 | uint32_t PlaneNbr; /*!< NAND memory number of planes */ |
| <> | 139:856d2700e60b | 119 | |
| <> | 139:856d2700e60b | 120 | uint32_t PlaneSize; /*!< NAND memory zone size measured in number of blocks */ |
| AnnaBridge | 126:abea610beb85 | 121 | |
| <> | 139:856d2700e60b | 122 | FunctionalState ExtraCommandEnable; /*!< NAND extra command needed for Page reading mode. This |
| <> | 139:856d2700e60b | 123 | parameter is mandatory for some NAND parts after the read |
| <> | 139:856d2700e60b | 124 | command (NAND_CMD_AREA_TRUE1) and before DATA reading sequence. |
| <> | 139:856d2700e60b | 125 | Example: Toshiba THTH58BYG3S0HBAI6. |
| <> | 139:856d2700e60b | 126 | This parameter could be ENABLE or DISABLE |
| <> | 139:856d2700e60b | 127 | Please check the Read Mode sequnece in the NAND device datasheet */ |
| <> | 139:856d2700e60b | 128 | }NAND_DeviceConfigTypeDef; |
| AnnaBridge | 126:abea610beb85 | 129 | |
| AnnaBridge | 126:abea610beb85 | 130 | /** |
| AnnaBridge | 126:abea610beb85 | 131 | * @brief NAND handle Structure definition |
| AnnaBridge | 126:abea610beb85 | 132 | */ |
| AnnaBridge | 126:abea610beb85 | 133 | typedef struct |
| AnnaBridge | 126:abea610beb85 | 134 | { |
| <> | 139:856d2700e60b | 135 | FMC_NAND_TypeDef *Instance; /*!< Register base address */ |
| AnnaBridge | 126:abea610beb85 | 136 | |
| <> | 139:856d2700e60b | 137 | FMC_NAND_InitTypeDef Init; /*!< NAND device control configuration parameters */ |
| AnnaBridge | 126:abea610beb85 | 138 | |
| <> | 139:856d2700e60b | 139 | HAL_LockTypeDef Lock; /*!< NAND locking object */ |
| AnnaBridge | 126:abea610beb85 | 140 | |
| <> | 139:856d2700e60b | 141 | __IO HAL_NAND_StateTypeDef State; /*!< NAND device access state */ |
| AnnaBridge | 126:abea610beb85 | 142 | |
| <> | 139:856d2700e60b | 143 | NAND_DeviceConfigTypeDef Config; /*!< NAND phusical characteristic information structure */ |
| <> | 139:856d2700e60b | 144 | |
| AnnaBridge | 126:abea610beb85 | 145 | }NAND_HandleTypeDef; |
| AnnaBridge | 126:abea610beb85 | 146 | /** |
| AnnaBridge | 126:abea610beb85 | 147 | * @} |
| AnnaBridge | 126:abea610beb85 | 148 | */ |
| AnnaBridge | 126:abea610beb85 | 149 | |
| AnnaBridge | 126:abea610beb85 | 150 | /* Exported constants --------------------------------------------------------*/ |
| AnnaBridge | 126:abea610beb85 | 151 | /* Exported macro ------------------------------------------------------------*/ |
| AnnaBridge | 126:abea610beb85 | 152 | /** @defgroup NAND_Exported_Macros NAND Exported Macros |
| AnnaBridge | 126:abea610beb85 | 153 | * @{ |
| AnnaBridge | 126:abea610beb85 | 154 | */ |
| AnnaBridge | 126:abea610beb85 | 155 | |
| AnnaBridge | 126:abea610beb85 | 156 | /** @brief Reset NAND handle state |
| AnnaBridge | 126:abea610beb85 | 157 | * @param __HANDLE__: specifies the NAND handle. |
| AnnaBridge | 126:abea610beb85 | 158 | * @retval None |
| AnnaBridge | 126:abea610beb85 | 159 | */ |
| AnnaBridge | 126:abea610beb85 | 160 | #define __HAL_NAND_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_NAND_STATE_RESET) |
| AnnaBridge | 126:abea610beb85 | 161 | |
| AnnaBridge | 126:abea610beb85 | 162 | /** |
| AnnaBridge | 126:abea610beb85 | 163 | * @} |
| AnnaBridge | 126:abea610beb85 | 164 | */ |
| AnnaBridge | 126:abea610beb85 | 165 | |
| AnnaBridge | 126:abea610beb85 | 166 | /* Exported functions --------------------------------------------------------*/ |
| AnnaBridge | 126:abea610beb85 | 167 | /** @addtogroup NAND_Exported_Functions NAND Exported Functions |
| AnnaBridge | 126:abea610beb85 | 168 | * @{ |
| AnnaBridge | 126:abea610beb85 | 169 | */ |
| AnnaBridge | 126:abea610beb85 | 170 | |
| AnnaBridge | 126:abea610beb85 | 171 | /** @addtogroup NAND_Exported_Functions_Group1 Initialization and de-initialization functions |
| AnnaBridge | 126:abea610beb85 | 172 | * @{ |
| AnnaBridge | 126:abea610beb85 | 173 | */ |
| AnnaBridge | 126:abea610beb85 | 174 | |
| AnnaBridge | 126:abea610beb85 | 175 | /* Initialization/de-initialization functions ********************************/ |
| AnnaBridge | 126:abea610beb85 | 176 | HAL_StatusTypeDef HAL_NAND_Init(NAND_HandleTypeDef *hnand, FMC_NAND_PCC_TimingTypeDef *ComSpace_Timing, FMC_NAND_PCC_TimingTypeDef *AttSpace_Timing); |
| AnnaBridge | 126:abea610beb85 | 177 | HAL_StatusTypeDef HAL_NAND_DeInit(NAND_HandleTypeDef *hnand); |
| <> | 139:856d2700e60b | 178 | |
| <> | 139:856d2700e60b | 179 | HAL_StatusTypeDef HAL_NAND_ConfigDevice(NAND_HandleTypeDef *hnand, NAND_DeviceConfigTypeDef *pDeviceConfig); |
| <> | 139:856d2700e60b | 180 | |
| <> | 139:856d2700e60b | 181 | HAL_StatusTypeDef HAL_NAND_Read_ID(NAND_HandleTypeDef *hnand, NAND_IDTypeDef *pNAND_ID); |
| <> | 139:856d2700e60b | 182 | |
| AnnaBridge | 126:abea610beb85 | 183 | void HAL_NAND_MspInit(NAND_HandleTypeDef *hnand); |
| AnnaBridge | 126:abea610beb85 | 184 | void HAL_NAND_MspDeInit(NAND_HandleTypeDef *hnand); |
| AnnaBridge | 126:abea610beb85 | 185 | void HAL_NAND_IRQHandler(NAND_HandleTypeDef *hnand); |
| AnnaBridge | 126:abea610beb85 | 186 | void HAL_NAND_ITCallback(NAND_HandleTypeDef *hnand); |
| AnnaBridge | 126:abea610beb85 | 187 | |
| AnnaBridge | 126:abea610beb85 | 188 | /** |
| AnnaBridge | 126:abea610beb85 | 189 | * @} |
| AnnaBridge | 126:abea610beb85 | 190 | */ |
| AnnaBridge | 126:abea610beb85 | 191 | |
| AnnaBridge | 126:abea610beb85 | 192 | /** @addtogroup NAND_Exported_Functions_Group2 Input and Output functions |
| AnnaBridge | 126:abea610beb85 | 193 | * @{ |
| AnnaBridge | 126:abea610beb85 | 194 | */ |
| AnnaBridge | 126:abea610beb85 | 195 | |
| AnnaBridge | 126:abea610beb85 | 196 | /* IO operation functions ****************************************************/ |
| <> | 139:856d2700e60b | 197 | |
| AnnaBridge | 126:abea610beb85 | 198 | HAL_StatusTypeDef HAL_NAND_Reset(NAND_HandleTypeDef *hnand); |
| AnnaBridge | 126:abea610beb85 | 199 | |
| AnnaBridge | 126:abea610beb85 | 200 | HAL_StatusTypeDef HAL_NAND_Read_Page_8b(NAND_HandleTypeDef *hnand, NAND_AddressTypeDef *pAddress, uint8_t *pBuffer, uint32_t NumPageToRead); |
| <> | 139:856d2700e60b | 201 | HAL_StatusTypeDef HAL_NAND_Write_Page_8b(NAND_HandleTypeDef *hnand, NAND_AddressTypeDef *pAddress, uint8_t *pBuffer, uint32_t NumPageToWrite); |
| <> | 139:856d2700e60b | 202 | HAL_StatusTypeDef HAL_NAND_Read_SpareArea_8b(NAND_HandleTypeDef *hnand, NAND_AddressTypeDef *pAddress, uint8_t *pBuffer, uint32_t NumSpareAreaToRead); |
| <> | 139:856d2700e60b | 203 | HAL_StatusTypeDef HAL_NAND_Write_SpareArea_8b(NAND_HandleTypeDef *hnand, NAND_AddressTypeDef *pAddress, uint8_t *pBuffer, uint32_t NumSpareAreaTowrite); |
| <> | 139:856d2700e60b | 204 | |
| AnnaBridge | 126:abea610beb85 | 205 | HAL_StatusTypeDef HAL_NAND_Read_Page_16b(NAND_HandleTypeDef *hnand, NAND_AddressTypeDef *pAddress, uint16_t *pBuffer, uint32_t NumPageToRead); |
| AnnaBridge | 126:abea610beb85 | 206 | HAL_StatusTypeDef HAL_NAND_Write_Page_16b(NAND_HandleTypeDef *hnand, NAND_AddressTypeDef *pAddress, uint16_t *pBuffer, uint32_t NumPageToWrite); |
| AnnaBridge | 126:abea610beb85 | 207 | HAL_StatusTypeDef HAL_NAND_Read_SpareArea_16b(NAND_HandleTypeDef *hnand, NAND_AddressTypeDef *pAddress, uint16_t *pBuffer, uint32_t NumSpareAreaToRead); |
| AnnaBridge | 126:abea610beb85 | 208 | HAL_StatusTypeDef HAL_NAND_Write_SpareArea_16b(NAND_HandleTypeDef *hnand, NAND_AddressTypeDef *pAddress, uint16_t *pBuffer, uint32_t NumSpareAreaTowrite); |
| <> | 139:856d2700e60b | 209 | |
| AnnaBridge | 126:abea610beb85 | 210 | HAL_StatusTypeDef HAL_NAND_Erase_Block(NAND_HandleTypeDef *hnand, NAND_AddressTypeDef *pAddress); |
| <> | 139:856d2700e60b | 211 | |
| AnnaBridge | 126:abea610beb85 | 212 | uint32_t HAL_NAND_Address_Inc(NAND_HandleTypeDef *hnand, NAND_AddressTypeDef *pAddress); |
| AnnaBridge | 126:abea610beb85 | 213 | |
| AnnaBridge | 126:abea610beb85 | 214 | /** |
| AnnaBridge | 126:abea610beb85 | 215 | * @} |
| AnnaBridge | 126:abea610beb85 | 216 | */ |
| AnnaBridge | 126:abea610beb85 | 217 | |
| AnnaBridge | 126:abea610beb85 | 218 | /** @addtogroup NAND_Exported_Functions_Group3 Peripheral Control functions |
| AnnaBridge | 126:abea610beb85 | 219 | * @{ |
| AnnaBridge | 126:abea610beb85 | 220 | */ |
| AnnaBridge | 126:abea610beb85 | 221 | |
| AnnaBridge | 126:abea610beb85 | 222 | /* NAND Control functions ****************************************************/ |
| AnnaBridge | 126:abea610beb85 | 223 | HAL_StatusTypeDef HAL_NAND_ECC_Enable(NAND_HandleTypeDef *hnand); |
| AnnaBridge | 126:abea610beb85 | 224 | HAL_StatusTypeDef HAL_NAND_ECC_Disable(NAND_HandleTypeDef *hnand); |
| AnnaBridge | 126:abea610beb85 | 225 | HAL_StatusTypeDef HAL_NAND_GetECC(NAND_HandleTypeDef *hnand, uint32_t *ECCval, uint32_t Timeout); |
| AnnaBridge | 126:abea610beb85 | 226 | |
| AnnaBridge | 126:abea610beb85 | 227 | /** |
| AnnaBridge | 126:abea610beb85 | 228 | * @} |
| AnnaBridge | 126:abea610beb85 | 229 | */ |
| AnnaBridge | 126:abea610beb85 | 230 | |
| AnnaBridge | 126:abea610beb85 | 231 | /** @addtogroup NAND_Exported_Functions_Group4 Peripheral State functions |
| AnnaBridge | 126:abea610beb85 | 232 | * @{ |
| AnnaBridge | 126:abea610beb85 | 233 | */ |
| AnnaBridge | 126:abea610beb85 | 234 | /* NAND State functions *******************************************************/ |
| AnnaBridge | 126:abea610beb85 | 235 | HAL_NAND_StateTypeDef HAL_NAND_GetState(NAND_HandleTypeDef *hnand); |
| AnnaBridge | 126:abea610beb85 | 236 | uint32_t HAL_NAND_Read_Status(NAND_HandleTypeDef *hnand); |
| AnnaBridge | 126:abea610beb85 | 237 | /** |
| AnnaBridge | 126:abea610beb85 | 238 | * @} |
| AnnaBridge | 126:abea610beb85 | 239 | */ |
| AnnaBridge | 126:abea610beb85 | 240 | |
| AnnaBridge | 126:abea610beb85 | 241 | /** |
| AnnaBridge | 126:abea610beb85 | 242 | * @} |
| AnnaBridge | 126:abea610beb85 | 243 | */ |
| AnnaBridge | 126:abea610beb85 | 244 | /* Private types -------------------------------------------------------------*/ |
| AnnaBridge | 126:abea610beb85 | 245 | /* Private variables ---------------------------------------------------------*/ |
| AnnaBridge | 126:abea610beb85 | 246 | /* Private constants ---------------------------------------------------------*/ |
| AnnaBridge | 126:abea610beb85 | 247 | /** @defgroup NAND_Private_Constants NAND Private Constants |
| AnnaBridge | 126:abea610beb85 | 248 | * @{ |
| AnnaBridge | 126:abea610beb85 | 249 | */ |
| AnnaBridge | 126:abea610beb85 | 250 | #define NAND_DEVICE ((uint32_t)0x80000000U) |
| AnnaBridge | 126:abea610beb85 | 251 | #define NAND_WRITE_TIMEOUT ((uint32_t)0x01000000U) |
| AnnaBridge | 126:abea610beb85 | 252 | |
| AnnaBridge | 126:abea610beb85 | 253 | #define CMD_AREA ((uint32_t)(1<<16)) /* A16 = CLE high */ |
| AnnaBridge | 126:abea610beb85 | 254 | #define ADDR_AREA ((uint32_t)(1<<17)) /* A17 = ALE high */ |
| AnnaBridge | 126:abea610beb85 | 255 | |
| AnnaBridge | 126:abea610beb85 | 256 | #define NAND_CMD_AREA_A ((uint8_t)0x00U) |
| AnnaBridge | 126:abea610beb85 | 257 | #define NAND_CMD_AREA_B ((uint8_t)0x01U) |
| AnnaBridge | 126:abea610beb85 | 258 | #define NAND_CMD_AREA_C ((uint8_t)0x50U) |
| AnnaBridge | 126:abea610beb85 | 259 | #define NAND_CMD_AREA_TRUE1 ((uint8_t)0x30U) |
| AnnaBridge | 126:abea610beb85 | 260 | |
| AnnaBridge | 126:abea610beb85 | 261 | #define NAND_CMD_WRITE0 ((uint8_t)0x80U) |
| AnnaBridge | 126:abea610beb85 | 262 | #define NAND_CMD_WRITE_TRUE1 ((uint8_t)0x10U) |
| AnnaBridge | 126:abea610beb85 | 263 | #define NAND_CMD_ERASE0 ((uint8_t)0x60U) |
| AnnaBridge | 126:abea610beb85 | 264 | #define NAND_CMD_ERASE1 ((uint8_t)0xD0U) |
| AnnaBridge | 126:abea610beb85 | 265 | #define NAND_CMD_READID ((uint8_t)0x90U) |
| AnnaBridge | 126:abea610beb85 | 266 | #define NAND_CMD_STATUS ((uint8_t)0x70U) |
| AnnaBridge | 126:abea610beb85 | 267 | #define NAND_CMD_LOCK_STATUS ((uint8_t)0x7AU) |
| AnnaBridge | 126:abea610beb85 | 268 | #define NAND_CMD_RESET ((uint8_t)0xFFU) |
| AnnaBridge | 126:abea610beb85 | 269 | |
| AnnaBridge | 126:abea610beb85 | 270 | /* NAND memory status */ |
| AnnaBridge | 126:abea610beb85 | 271 | #define NAND_VALID_ADDRESS ((uint32_t)0x00000100U) |
| AnnaBridge | 126:abea610beb85 | 272 | #define NAND_INVALID_ADDRESS ((uint32_t)0x00000200U) |
| AnnaBridge | 126:abea610beb85 | 273 | #define NAND_TIMEOUT_ERROR ((uint32_t)0x00000400U) |
| AnnaBridge | 126:abea610beb85 | 274 | #define NAND_BUSY ((uint32_t)0x00000000U) |
| AnnaBridge | 126:abea610beb85 | 275 | #define NAND_ERROR ((uint32_t)0x00000001U) |
| AnnaBridge | 126:abea610beb85 | 276 | #define NAND_READY ((uint32_t)0x00000040U) |
| AnnaBridge | 126:abea610beb85 | 277 | /** |
| AnnaBridge | 126:abea610beb85 | 278 | * @} |
| AnnaBridge | 126:abea610beb85 | 279 | */ |
| AnnaBridge | 126:abea610beb85 | 280 | |
| AnnaBridge | 126:abea610beb85 | 281 | /* Private macros ------------------------------------------------------------*/ |
| AnnaBridge | 126:abea610beb85 | 282 | /** @defgroup NAND_Private_Macros NAND Private Macros |
| AnnaBridge | 126:abea610beb85 | 283 | * @{ |
| AnnaBridge | 126:abea610beb85 | 284 | */ |
| AnnaBridge | 126:abea610beb85 | 285 | |
| AnnaBridge | 126:abea610beb85 | 286 | /** |
| AnnaBridge | 126:abea610beb85 | 287 | * @brief NAND memory address computation. |
| AnnaBridge | 126:abea610beb85 | 288 | * @param __ADDRESS__: NAND memory address. |
| AnnaBridge | 126:abea610beb85 | 289 | * @param __HANDLE__ : NAND handle. |
| AnnaBridge | 126:abea610beb85 | 290 | * @retval NAND Raw address value |
| AnnaBridge | 126:abea610beb85 | 291 | */ |
| AnnaBridge | 126:abea610beb85 | 292 | #define ARRAY_ADDRESS(__ADDRESS__ , __HANDLE__) ((__ADDRESS__)->Page + \ |
| <> | 139:856d2700e60b | 293 | (((__ADDRESS__)->Block + (((__ADDRESS__)->Plane) * ((__HANDLE__)->Config.PlaneSize)))* ((__HANDLE__)->Config.BlockSize))) |
| <> | 139:856d2700e60b | 294 | |
| <> | 139:856d2700e60b | 295 | #define COLUMN_ADDRESS( __HANDLE__) ((__HANDLE__)->Config.PageSize) |
| AnnaBridge | 126:abea610beb85 | 296 | |
| AnnaBridge | 126:abea610beb85 | 297 | /** |
| AnnaBridge | 126:abea610beb85 | 298 | * @brief NAND memory address cycling. |
| AnnaBridge | 126:abea610beb85 | 299 | * @param __ADDRESS__: NAND memory address. |
| AnnaBridge | 126:abea610beb85 | 300 | * @retval NAND address cycling value. |
| AnnaBridge | 126:abea610beb85 | 301 | */ |
| AnnaBridge | 126:abea610beb85 | 302 | #define ADDR_1ST_CYCLE(__ADDRESS__) (uint8_t)(__ADDRESS__) /* 1st addressing cycle */ |
| AnnaBridge | 126:abea610beb85 | 303 | #define ADDR_2ND_CYCLE(__ADDRESS__) (uint8_t)((__ADDRESS__) >> 8) /* 2nd addressing cycle */ |
| AnnaBridge | 126:abea610beb85 | 304 | #define ADDR_3RD_CYCLE(__ADDRESS__) (uint8_t)((__ADDRESS__) >> 16) /* 3rd addressing cycle */ |
| AnnaBridge | 126:abea610beb85 | 305 | #define ADDR_4TH_CYCLE(__ADDRESS__) (uint8_t)((__ADDRESS__) >> 24) /* 4th addressing cycle */ |
| <> | 139:856d2700e60b | 306 | |
| <> | 139:856d2700e60b | 307 | /** |
| <> | 139:856d2700e60b | 308 | * @brief NAND memory Columns cycling. |
| <> | 139:856d2700e60b | 309 | * @param __ADDRESS__: NAND memory address. |
| <> | 139:856d2700e60b | 310 | * @retval NAND Column address cycling value. |
| <> | 139:856d2700e60b | 311 | */ |
| <> | 139:856d2700e60b | 312 | #define COLUMN_1ST_CYCLE(__ADDRESS__) (uint8_t)(__ADDRESS__) /* 1st Column addressing cycle */ |
| <> | 139:856d2700e60b | 313 | #define COLUMN_2ND_CYCLE(__ADDRESS__) (uint8_t)((__ADDRESS__) >> 8) /* 2nd Column addressing cycle */ |
| <> | 139:856d2700e60b | 314 | |
| AnnaBridge | 126:abea610beb85 | 315 | /** |
| AnnaBridge | 126:abea610beb85 | 316 | * @} |
| AnnaBridge | 126:abea610beb85 | 317 | */ |
| AnnaBridge | 126:abea610beb85 | 318 | |
| AnnaBridge | 126:abea610beb85 | 319 | /** |
| AnnaBridge | 126:abea610beb85 | 320 | * @} |
| AnnaBridge | 126:abea610beb85 | 321 | */ |
| AnnaBridge | 126:abea610beb85 | 322 | /** |
| AnnaBridge | 126:abea610beb85 | 323 | * @} |
| AnnaBridge | 126:abea610beb85 | 324 | */ |
| AnnaBridge | 126:abea610beb85 | 325 | |
| AnnaBridge | 126:abea610beb85 | 326 | /** |
| AnnaBridge | 126:abea610beb85 | 327 | * @} |
| AnnaBridge | 126:abea610beb85 | 328 | */ |
| AnnaBridge | 126:abea610beb85 | 329 | |
| AnnaBridge | 126:abea610beb85 | 330 | #ifdef __cplusplus |
| AnnaBridge | 126:abea610beb85 | 331 | } |
| AnnaBridge | 126:abea610beb85 | 332 | #endif |
| AnnaBridge | 126:abea610beb85 | 333 | |
| AnnaBridge | 126:abea610beb85 | 334 | #endif /* __STM32F7xx_HAL_NAND_H */ |
| AnnaBridge | 126:abea610beb85 | 335 | |
| AnnaBridge | 126:abea610beb85 | 336 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |


