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Dependents:   hello SerialTestv11 SerialTestv12 Sierpinski ... more

TARGET_EFM32PG_STK3401/TARGET_Silicon_Labs/TARGET_EFM32/emlib/inc/em_usart.h@139:856d2700e60b, 2017-03-30 (annotated)

Committer:
<>
Date:
Thu Mar 30 13:26:47 2017 +0100
Revision:
139:856d2700e60b
Parent:
128:9bcdf88f62b0 
Release 139 of the mbed library



Ports for Upcoming Targets



3934: [Silicon Labs] Update to HAL and devices https://github.com/ARMmbed/mbed-os/pull/3934



Known Issues



There is an issue with LPC1768 failing the 'Semihost file system' test with this release.



Fixes and Changes



3691: [TLS / hw acceleration] AES ECB for NUCLEO_F439ZI https://github.com/ARMmbed/mbed-os/pull/3691

3869: NCS36510: Default range changed from 0 to 950mV - ADC  https://github.com/ARMmbed/mbed-os/pull/3869

3893: [STM32F7] Update STM32 Cube version v1.6.0 https://github.com/ARMmbed/mbed-os/pull/3893

3917: Fix  mistake register setting in serial_format() https://github.com/ARMmbed/mbed-os/pull/3917

3927: [DELTA_DFBM_NQ620] Add RC calibration setting and revise mbed_overrides.c https://github.com/ARMmbed/mbed-os/pull/3927

3918: [NUC472/M453] Support unique locally administered MAC address and other driver updates https://github.com/ARMmbed/mbed-os/pull/3918

3920: Heap size adjusted to work for both tls-client and mbed-client https://github.com/ARMmbed/mbed-os/pull/3920

3969: NUCLEO_F302R8: Add missing PB_8/PB_9 CAN pins https://github.com/ARMmbed/mbed-os/pull/3969

Who changed what in which revision?

UserRevisionLine numberNew contents of line
Kojto 119:aae6fcc7d9bb 1 /***************************************************************************//**
Kojto 119:aae6fcc7d9bb 2 * @file em_usart.h
Kojto 119:aae6fcc7d9bb 3 * @brief Universal synchronous/asynchronous receiver/transmitter (USART/UART)
Kojto 119:aae6fcc7d9bb 4 * peripheral API
<> 139:856d2700e60b 5 * @version 5.1.2
Kojto 119:aae6fcc7d9bb 6 *******************************************************************************
Kojto 119:aae6fcc7d9bb 7 * @section License
<> 128:9bcdf88f62b0 8 * <b>Copyright 2016 Silicon Laboratories, Inc. http://www.silabs.com</b>
Kojto 119:aae6fcc7d9bb 9 *******************************************************************************
Kojto 119:aae6fcc7d9bb 10 *
Kojto 119:aae6fcc7d9bb 11 * Permission is granted to anyone to use this software for any purpose,
Kojto 119:aae6fcc7d9bb 12 * including commercial applications, and to alter it and redistribute it
Kojto 119:aae6fcc7d9bb 13 * freely, subject to the following restrictions:
Kojto 119:aae6fcc7d9bb 14 *
Kojto 119:aae6fcc7d9bb 15 * 1. The origin of this software must not be misrepresented; you must not
Kojto 119:aae6fcc7d9bb 16 * claim that you wrote the original software.
Kojto 119:aae6fcc7d9bb 17 * 2. Altered source versions must be plainly marked as such, and must not be
Kojto 119:aae6fcc7d9bb 18 * misrepresented as being the original software.
Kojto 119:aae6fcc7d9bb 19 * 3. This notice may not be removed or altered from any source distribution.
Kojto 119:aae6fcc7d9bb 20 *
Kojto 119:aae6fcc7d9bb 21 * DISCLAIMER OF WARRANTY/LIMITATION OF REMEDIES: Silicon Labs has no
Kojto 119:aae6fcc7d9bb 22 * obligation to support this Software. Silicon Labs is providing the
Kojto 119:aae6fcc7d9bb 23 * Software "AS IS", with no express or implied warranties of any kind,
Kojto 119:aae6fcc7d9bb 24 * including, but not limited to, any implied warranties of merchantability
Kojto 119:aae6fcc7d9bb 25 * or fitness for any particular purpose or warranties against infringement
Kojto 119:aae6fcc7d9bb 26 * of any proprietary rights of a third party.
Kojto 119:aae6fcc7d9bb 27 *
Kojto 119:aae6fcc7d9bb 28 * Silicon Labs will not be liable for any consequential, incidental, or
Kojto 119:aae6fcc7d9bb 29 * special damages, or any other relief, or for any claim by any third party,
Kojto 119:aae6fcc7d9bb 30 * arising from your use of this Software.
Kojto 119:aae6fcc7d9bb 31 *
Kojto 119:aae6fcc7d9bb 32 ******************************************************************************/
Kojto 119:aae6fcc7d9bb 33
Kojto 119:aae6fcc7d9bb 34
<> 128:9bcdf88f62b0 35 #ifndef EM_USART_H
<> 128:9bcdf88f62b0 36 #define EM_USART_H
Kojto 119:aae6fcc7d9bb 37
Kojto 119:aae6fcc7d9bb 38 #include "em_device.h"
Kojto 119:aae6fcc7d9bb 39 #if defined(USART_COUNT) && (USART_COUNT > 0)
Kojto 119:aae6fcc7d9bb 40
Kojto 119:aae6fcc7d9bb 41 #include <stdbool.h>
Kojto 119:aae6fcc7d9bb 42
Kojto 119:aae6fcc7d9bb 43 #ifdef __cplusplus
Kojto 119:aae6fcc7d9bb 44 extern "C" {
Kojto 119:aae6fcc7d9bb 45 #endif
Kojto 119:aae6fcc7d9bb 46
Kojto 119:aae6fcc7d9bb 47 /***************************************************************************//**
<> 128:9bcdf88f62b0 48 * @addtogroup emlib
Kojto 119:aae6fcc7d9bb 49 * @{
Kojto 119:aae6fcc7d9bb 50 ******************************************************************************/
Kojto 119:aae6fcc7d9bb 51
Kojto 119:aae6fcc7d9bb 52 /***************************************************************************//**
Kojto 119:aae6fcc7d9bb 53 * @addtogroup USART
<> 128:9bcdf88f62b0 54 * @brief Universal Synchronous/Asynchronous Receiver/Transmitter
<> 128:9bcdf88f62b0 55 * Peripheral API
<> 128:9bcdf88f62b0 56 * @details
<> 128:9bcdf88f62b0 57 * The Universal Synchronous/Asynchronous Receiver/Transmitter (USART)
<> 128:9bcdf88f62b0 58 * is a very flexible serial I/O module. It supports full duplex asynchronous UART
<> 128:9bcdf88f62b0 59 * communication as well as RS-485, SPI, MicroWire and 3-wire. It can also interface
<> 128:9bcdf88f62b0 60 * with ISO7816 Smart-Cards, and IrDA devices.
<> 128:9bcdf88f62b0 61 *
<> 128:9bcdf88f62b0 62 * The USART has a wide selection of operating modes, frame formats and baud rates.
<> 128:9bcdf88f62b0 63 * All features are supported through the API of this module.
<> 128:9bcdf88f62b0 64 *
<> 128:9bcdf88f62b0 65 * Triple buffering and DMA support makes high data-rates possible with minimal
<> 128:9bcdf88f62b0 66 * CPU intervention and it is possible to transmit and receive large frames while
<> 128:9bcdf88f62b0 67 * the MCU remains in EM1 Sleep.
<> 128:9bcdf88f62b0 68 *
<> 128:9bcdf88f62b0 69 * This module does not support DMA configuration. The @ref UARTDRV and @ref SPIDRV drivers
<> 128:9bcdf88f62b0 70 * provide full support for DMA and more.
<> 128:9bcdf88f62b0 71 *
<> 128:9bcdf88f62b0 72 * The following steps are necessary for basic operation:
<> 128:9bcdf88f62b0 73 *
<> 128:9bcdf88f62b0 74 * Clock enable:
<> 128:9bcdf88f62b0 75 * @include em_usart_clock_enable.c
<> 128:9bcdf88f62b0 76 *
<> 128:9bcdf88f62b0 77 * To initialize the USART for asynchronous operation (eg. UART):
<> 128:9bcdf88f62b0 78 * @include em_usart_init_async.c
<> 128:9bcdf88f62b0 79 *
<> 128:9bcdf88f62b0 80 * To initialize the USART for synchronous operation (eg. SPI):
<> 128:9bcdf88f62b0 81 * @include em_usart_init_sync.c
<> 128:9bcdf88f62b0 82 *
<> 128:9bcdf88f62b0 83 * After pins are assigned for the application/board, enable pins at the
<> 128:9bcdf88f62b0 84 * desired location. Available locations can be obtained from the Pin Definitions
<> 128:9bcdf88f62b0 85 * section in the datasheet.
<> 128:9bcdf88f62b0 86 * @if DOXYDOC_P1_DEVICE
<> 128:9bcdf88f62b0 87 * @include em_usart_route_p1.c
<> 128:9bcdf88f62b0 88 * @note UART hardware flow control is not directly supported in hardware on
<> 139:856d2700e60b 89 * @ref _SILICON_LABS_32B_SERIES_0 parts.
<> 128:9bcdf88f62b0 90 * @endif
<> 128:9bcdf88f62b0 91 * @if DOXYDOC_P2_DEVICE
<> 128:9bcdf88f62b0 92 * @include em_usart_route_p2.c
<> 128:9bcdf88f62b0 93 * @endif
<> 128:9bcdf88f62b0 94 * @note @ref UARTDRV supports all types of UART flow control. Software assisted
<> 128:9bcdf88f62b0 95 * hardware flow control is available for parts without true UART hardware
<> 128:9bcdf88f62b0 96 * flow control.
Kojto 119:aae6fcc7d9bb 97 * @{
Kojto 119:aae6fcc7d9bb 98 ******************************************************************************/
Kojto 119:aae6fcc7d9bb 99
Kojto 119:aae6fcc7d9bb 100 /*******************************************************************************
Kojto 119:aae6fcc7d9bb 101 ******************************** ENUMS ************************************
Kojto 119:aae6fcc7d9bb 102 ******************************************************************************/
Kojto 119:aae6fcc7d9bb 103
Kojto 119:aae6fcc7d9bb 104 /** Databit selection. */
Kojto 119:aae6fcc7d9bb 105 typedef enum
Kojto 119:aae6fcc7d9bb 106 {
Kojto 119:aae6fcc7d9bb 107 usartDatabits4 = USART_FRAME_DATABITS_FOUR, /**< 4 databits (not available for UART). */
Kojto 119:aae6fcc7d9bb 108 usartDatabits5 = USART_FRAME_DATABITS_FIVE, /**< 5 databits (not available for UART). */
Kojto 119:aae6fcc7d9bb 109 usartDatabits6 = USART_FRAME_DATABITS_SIX, /**< 6 databits (not available for UART). */
Kojto 119:aae6fcc7d9bb 110 usartDatabits7 = USART_FRAME_DATABITS_SEVEN, /**< 7 databits (not available for UART). */
Kojto 119:aae6fcc7d9bb 111 usartDatabits8 = USART_FRAME_DATABITS_EIGHT, /**< 8 databits. */
Kojto 119:aae6fcc7d9bb 112 usartDatabits9 = USART_FRAME_DATABITS_NINE, /**< 9 databits. */
Kojto 119:aae6fcc7d9bb 113 usartDatabits10 = USART_FRAME_DATABITS_TEN, /**< 10 databits (not available for UART). */
Kojto 119:aae6fcc7d9bb 114 usartDatabits11 = USART_FRAME_DATABITS_ELEVEN, /**< 11 databits (not available for UART). */
Kojto 119:aae6fcc7d9bb 115 usartDatabits12 = USART_FRAME_DATABITS_TWELVE, /**< 12 databits (not available for UART). */
Kojto 119:aae6fcc7d9bb 116 usartDatabits13 = USART_FRAME_DATABITS_THIRTEEN, /**< 13 databits (not available for UART). */
Kojto 119:aae6fcc7d9bb 117 usartDatabits14 = USART_FRAME_DATABITS_FOURTEEN, /**< 14 databits (not available for UART). */
Kojto 119:aae6fcc7d9bb 118 usartDatabits15 = USART_FRAME_DATABITS_FIFTEEN, /**< 15 databits (not available for UART). */
Kojto 119:aae6fcc7d9bb 119 usartDatabits16 = USART_FRAME_DATABITS_SIXTEEN /**< 16 databits (not available for UART). */
Kojto 119:aae6fcc7d9bb 120 } USART_Databits_TypeDef;
Kojto 119:aae6fcc7d9bb 121
Kojto 119:aae6fcc7d9bb 122
Kojto 119:aae6fcc7d9bb 123 /** Enable selection. */
Kojto 119:aae6fcc7d9bb 124 typedef enum
Kojto 119:aae6fcc7d9bb 125 {
Kojto 119:aae6fcc7d9bb 126 /** Disable both receiver and transmitter. */
Kojto 119:aae6fcc7d9bb 127 usartDisable = 0x0,
Kojto 119:aae6fcc7d9bb 128
Kojto 119:aae6fcc7d9bb 129 /** Enable receiver only, transmitter disabled. */
Kojto 119:aae6fcc7d9bb 130 usartEnableRx = USART_CMD_RXEN,
Kojto 119:aae6fcc7d9bb 131
Kojto 119:aae6fcc7d9bb 132 /** Enable transmitter only, receiver disabled. */
Kojto 119:aae6fcc7d9bb 133 usartEnableTx = USART_CMD_TXEN,
Kojto 119:aae6fcc7d9bb 134
Kojto 119:aae6fcc7d9bb 135 /** Enable both receiver and transmitter. */
Kojto 119:aae6fcc7d9bb 136 usartEnable = (USART_CMD_RXEN | USART_CMD_TXEN)
Kojto 119:aae6fcc7d9bb 137 } USART_Enable_TypeDef;
Kojto 119:aae6fcc7d9bb 138
Kojto 119:aae6fcc7d9bb 139
Kojto 119:aae6fcc7d9bb 140 /** Oversampling selection, used for asynchronous operation. */
Kojto 119:aae6fcc7d9bb 141 typedef enum
Kojto 119:aae6fcc7d9bb 142 {
Kojto 119:aae6fcc7d9bb 143 usartOVS16 = USART_CTRL_OVS_X16, /**< 16x oversampling (normal). */
Kojto 119:aae6fcc7d9bb 144 usartOVS8 = USART_CTRL_OVS_X8, /**< 8x oversampling. */
Kojto 119:aae6fcc7d9bb 145 usartOVS6 = USART_CTRL_OVS_X6, /**< 6x oversampling. */
Kojto 119:aae6fcc7d9bb 146 usartOVS4 = USART_CTRL_OVS_X4 /**< 4x oversampling. */
Kojto 119:aae6fcc7d9bb 147 } USART_OVS_TypeDef;
Kojto 119:aae6fcc7d9bb 148
Kojto 119:aae6fcc7d9bb 149
Kojto 119:aae6fcc7d9bb 150 /** Parity selection, mainly used for asynchronous operation. */
Kojto 119:aae6fcc7d9bb 151 typedef enum
Kojto 119:aae6fcc7d9bb 152 {
Kojto 119:aae6fcc7d9bb 153 usartNoParity = USART_FRAME_PARITY_NONE, /**< No parity. */
Kojto 119:aae6fcc7d9bb 154 usartEvenParity = USART_FRAME_PARITY_EVEN, /**< Even parity. */
Kojto 119:aae6fcc7d9bb 155 usartOddParity = USART_FRAME_PARITY_ODD /**< Odd parity. */
Kojto 119:aae6fcc7d9bb 156 } USART_Parity_TypeDef;
Kojto 119:aae6fcc7d9bb 157
Kojto 119:aae6fcc7d9bb 158
Kojto 119:aae6fcc7d9bb 159 /** Stopbits selection, used for asynchronous operation. */
Kojto 119:aae6fcc7d9bb 160 typedef enum
Kojto 119:aae6fcc7d9bb 161 {
Kojto 119:aae6fcc7d9bb 162 usartStopbits0p5 = USART_FRAME_STOPBITS_HALF, /**< 0.5 stopbits. */
Kojto 119:aae6fcc7d9bb 163 usartStopbits1 = USART_FRAME_STOPBITS_ONE, /**< 1 stopbits. */
Kojto 119:aae6fcc7d9bb 164 usartStopbits1p5 = USART_FRAME_STOPBITS_ONEANDAHALF, /**< 1.5 stopbits. */
Kojto 119:aae6fcc7d9bb 165 usartStopbits2 = USART_FRAME_STOPBITS_TWO /**< 2 stopbits. */
Kojto 119:aae6fcc7d9bb 166 } USART_Stopbits_TypeDef;
Kojto 119:aae6fcc7d9bb 167
Kojto 119:aae6fcc7d9bb 168
Kojto 119:aae6fcc7d9bb 169 /** Clock polarity/phase mode. */
Kojto 119:aae6fcc7d9bb 170 typedef enum
Kojto 119:aae6fcc7d9bb 171 {
Kojto 119:aae6fcc7d9bb 172 /** Clock idle low, sample on rising edge. */
Kojto 119:aae6fcc7d9bb 173 usartClockMode0 = USART_CTRL_CLKPOL_IDLELOW | USART_CTRL_CLKPHA_SAMPLELEADING,
Kojto 119:aae6fcc7d9bb 174
Kojto 119:aae6fcc7d9bb 175 /** Clock idle low, sample on falling edge. */
Kojto 119:aae6fcc7d9bb 176 usartClockMode1 = USART_CTRL_CLKPOL_IDLELOW | USART_CTRL_CLKPHA_SAMPLETRAILING,
Kojto 119:aae6fcc7d9bb 177
Kojto 119:aae6fcc7d9bb 178 /** Clock idle high, sample on falling edge. */
Kojto 119:aae6fcc7d9bb 179 usartClockMode2 = USART_CTRL_CLKPOL_IDLEHIGH | USART_CTRL_CLKPHA_SAMPLELEADING,
Kojto 119:aae6fcc7d9bb 180
Kojto 119:aae6fcc7d9bb 181 /** Clock idle high, sample on rising edge. */
Kojto 119:aae6fcc7d9bb 182 usartClockMode3 = USART_CTRL_CLKPOL_IDLEHIGH | USART_CTRL_CLKPHA_SAMPLETRAILING
Kojto 119:aae6fcc7d9bb 183 } USART_ClockMode_TypeDef;
Kojto 119:aae6fcc7d9bb 184
Kojto 119:aae6fcc7d9bb 185
Kojto 119:aae6fcc7d9bb 186 /** Pulse width selection for IrDA mode. */
Kojto 119:aae6fcc7d9bb 187 typedef enum
Kojto 119:aae6fcc7d9bb 188 {
Kojto 119:aae6fcc7d9bb 189 /** IrDA pulse width is 1/16 for OVS=0 and 1/8 for OVS=1 */
Kojto 119:aae6fcc7d9bb 190 usartIrDAPwONE = USART_IRCTRL_IRPW_ONE,
Kojto 119:aae6fcc7d9bb 191
Kojto 119:aae6fcc7d9bb 192 /** IrDA pulse width is 2/16 for OVS=0 and 2/8 for OVS=1 */
Kojto 119:aae6fcc7d9bb 193 usartIrDAPwTWO = USART_IRCTRL_IRPW_TWO,
Kojto 119:aae6fcc7d9bb 194
Kojto 119:aae6fcc7d9bb 195 /** IrDA pulse width is 3/16 for OVS=0 and 3/8 for OVS=1 */
Kojto 119:aae6fcc7d9bb 196 usartIrDAPwTHREE = USART_IRCTRL_IRPW_THREE,
Kojto 119:aae6fcc7d9bb 197
Kojto 119:aae6fcc7d9bb 198 /** IrDA pulse width is 4/16 for OVS=0 and 4/8 for OVS=1 */
Kojto 119:aae6fcc7d9bb 199 usartIrDAPwFOUR = USART_IRCTRL_IRPW_FOUR
Kojto 119:aae6fcc7d9bb 200 } USART_IrDAPw_Typedef;
Kojto 119:aae6fcc7d9bb 201
Kojto 119:aae6fcc7d9bb 202
Kojto 119:aae6fcc7d9bb 203 /** PRS channel selection for IrDA mode. */
Kojto 119:aae6fcc7d9bb 204 typedef enum
Kojto 119:aae6fcc7d9bb 205 {
Kojto 119:aae6fcc7d9bb 206 usartIrDAPrsCh0 = USART_IRCTRL_IRPRSSEL_PRSCH0, /**< PRS channel 0 */
Kojto 119:aae6fcc7d9bb 207 usartIrDAPrsCh1 = USART_IRCTRL_IRPRSSEL_PRSCH1, /**< PRS channel 1 */
Kojto 119:aae6fcc7d9bb 208 usartIrDAPrsCh2 = USART_IRCTRL_IRPRSSEL_PRSCH2, /**< PRS channel 2 */
Kojto 119:aae6fcc7d9bb 209 usartIrDAPrsCh3 = USART_IRCTRL_IRPRSSEL_PRSCH3, /**< PRS channel 3 */
Kojto 119:aae6fcc7d9bb 210 #if defined(USART_IRCTRL_IRPRSSEL_PRSCH4)
Kojto 119:aae6fcc7d9bb 211 usartIrDAPrsCh4 = USART_IRCTRL_IRPRSSEL_PRSCH4, /**< PRS channel 4 */
Kojto 119:aae6fcc7d9bb 212 #endif
Kojto 119:aae6fcc7d9bb 213 #if defined(USART_IRCTRL_IRPRSSEL_PRSCH5)
Kojto 119:aae6fcc7d9bb 214 usartIrDAPrsCh5 = USART_IRCTRL_IRPRSSEL_PRSCH5, /**< PRS channel 5 */
Kojto 119:aae6fcc7d9bb 215 #endif
Kojto 119:aae6fcc7d9bb 216 #if defined(USART_IRCTRL_IRPRSSEL_PRSCH6)
Kojto 119:aae6fcc7d9bb 217 usartIrDAPrsCh6 = USART_IRCTRL_IRPRSSEL_PRSCH6, /**< PRS channel 6 */
Kojto 119:aae6fcc7d9bb 218 #endif
Kojto 119:aae6fcc7d9bb 219 #if defined(USART_IRCTRL_IRPRSSEL_PRSCH7)
Kojto 119:aae6fcc7d9bb 220 usartIrDAPrsCh7 = USART_IRCTRL_IRPRSSEL_PRSCH7, /**< PRS channel 7 */
Kojto 119:aae6fcc7d9bb 221 #endif
Kojto 119:aae6fcc7d9bb 222 } USART_IrDAPrsSel_Typedef;
Kojto 119:aae6fcc7d9bb 223
Kojto 119:aae6fcc7d9bb 224 #if defined(_USART_I2SCTRL_MASK)
Kojto 119:aae6fcc7d9bb 225 /** I2S format selection. */
Kojto 119:aae6fcc7d9bb 226 typedef enum
Kojto 119:aae6fcc7d9bb 227 {
Kojto 119:aae6fcc7d9bb 228 usartI2sFormatW32D32 = USART_I2SCTRL_FORMAT_W32D32, /**< 32-bit word, 32-bit data */
Kojto 119:aae6fcc7d9bb 229 usartI2sFormatW32D24M = USART_I2SCTRL_FORMAT_W32D24M, /**< 32-bit word, 32-bit data with 8 lsb masked */
Kojto 119:aae6fcc7d9bb 230 usartI2sFormatW32D24 = USART_I2SCTRL_FORMAT_W32D24, /**< 32-bit word, 24-bit data */
Kojto 119:aae6fcc7d9bb 231 usartI2sFormatW32D16 = USART_I2SCTRL_FORMAT_W32D16, /**< 32-bit word, 16-bit data */
Kojto 119:aae6fcc7d9bb 232 usartI2sFormatW32D8 = USART_I2SCTRL_FORMAT_W32D8, /**< 32-bit word, 8-bit data */
Kojto 119:aae6fcc7d9bb 233 usartI2sFormatW16D16 = USART_I2SCTRL_FORMAT_W16D16, /**< 16-bit word, 16-bit data */
Kojto 119:aae6fcc7d9bb 234 usartI2sFormatW16D8 = USART_I2SCTRL_FORMAT_W16D8, /**< 16-bit word, 8-bit data */
Kojto 119:aae6fcc7d9bb 235 usartI2sFormatW8D8 = USART_I2SCTRL_FORMAT_W8D8 /**< 8-bit word, 8-bit data */
Kojto 119:aae6fcc7d9bb 236 } USART_I2sFormat_TypeDef;
Kojto 119:aae6fcc7d9bb 237
Kojto 119:aae6fcc7d9bb 238 /** I2S frame data justify. */
Kojto 119:aae6fcc7d9bb 239 typedef enum
Kojto 119:aae6fcc7d9bb 240 {
Kojto 119:aae6fcc7d9bb 241 usartI2sJustifyLeft = USART_I2SCTRL_JUSTIFY_LEFT, /**< Data is left-justified within the frame */
Kojto 119:aae6fcc7d9bb 242 usartI2sJustifyRight = USART_I2SCTRL_JUSTIFY_RIGHT /**< Data is right-justified within the frame */
Kojto 119:aae6fcc7d9bb 243 } USART_I2sJustify_TypeDef;
Kojto 119:aae6fcc7d9bb 244 #endif
Kojto 119:aae6fcc7d9bb 245
Kojto 119:aae6fcc7d9bb 246 #if defined(_USART_INPUT_MASK)
Kojto 119:aae6fcc7d9bb 247 /** USART Rx input PRS selection. */
Kojto 119:aae6fcc7d9bb 248 typedef enum
Kojto 119:aae6fcc7d9bb 249 {
Kojto 119:aae6fcc7d9bb 250 usartPrsRxCh0 = USART_INPUT_RXPRSSEL_PRSCH0, /**< PRSCH0 selected as USART_INPUT */
Kojto 119:aae6fcc7d9bb 251 usartPrsRxCh1 = USART_INPUT_RXPRSSEL_PRSCH1, /**< PRSCH1 selected as USART_INPUT */
Kojto 119:aae6fcc7d9bb 252 usartPrsRxCh2 = USART_INPUT_RXPRSSEL_PRSCH2, /**< PRSCH2 selected as USART_INPUT */
Kojto 119:aae6fcc7d9bb 253 usartPrsRxCh3 = USART_INPUT_RXPRSSEL_PRSCH3, /**< PRSCH3 selected as USART_INPUT */
Kojto 119:aae6fcc7d9bb 254
Kojto 119:aae6fcc7d9bb 255 #if defined(USART_INPUT_RXPRSSEL_PRSCH7)
Kojto 119:aae6fcc7d9bb 256 usartPrsRxCh4 = USART_INPUT_RXPRSSEL_PRSCH4, /**< PRSCH4 selected as USART_INPUT */
Kojto 119:aae6fcc7d9bb 257 usartPrsRxCh5 = USART_INPUT_RXPRSSEL_PRSCH5, /**< PRSCH5 selected as USART_INPUT */
Kojto 119:aae6fcc7d9bb 258 usartPrsRxCh6 = USART_INPUT_RXPRSSEL_PRSCH6, /**< PRSCH6 selected as USART_INPUT */
Kojto 119:aae6fcc7d9bb 259 usartPrsRxCh7 = USART_INPUT_RXPRSSEL_PRSCH7, /**< PRSCH7 selected as USART_INPUT */
Kojto 119:aae6fcc7d9bb 260 #endif
Kojto 119:aae6fcc7d9bb 261
Kojto 119:aae6fcc7d9bb 262 #if defined(USART_INPUT_RXPRSSEL_PRSCH11)
Kojto 119:aae6fcc7d9bb 263 usartPrsRxCh8 = USART_INPUT_RXPRSSEL_PRSCH8, /**< PRSCH8 selected as USART_INPUT */
Kojto 119:aae6fcc7d9bb 264 usartPrsRxCh9 = USART_INPUT_RXPRSSEL_PRSCH9, /**< PRSCH9 selected as USART_INPUT */
Kojto 119:aae6fcc7d9bb 265 usartPrsRxCh10 = USART_INPUT_RXPRSSEL_PRSCH10, /**< PRSCH10 selected as USART_INPUT */
Kojto 119:aae6fcc7d9bb 266 usartPrsRxCh11 = USART_INPUT_RXPRSSEL_PRSCH11 /**< PRSCH11 selected as USART_INPUT */
Kojto 119:aae6fcc7d9bb 267 #endif
Kojto 119:aae6fcc7d9bb 268 } USART_PrsRxCh_TypeDef;
Kojto 119:aae6fcc7d9bb 269 #endif
Kojto 119:aae6fcc7d9bb 270
Kojto 119:aae6fcc7d9bb 271 /** USART PRS Transmit Trigger Channels */
Kojto 119:aae6fcc7d9bb 272 typedef enum
Kojto 119:aae6fcc7d9bb 273 {
Kojto 119:aae6fcc7d9bb 274 usartPrsTriggerCh0 = USART_TRIGCTRL_TSEL_PRSCH0, /**< PRSCH0 selected as USART Trigger */
Kojto 119:aae6fcc7d9bb 275 usartPrsTriggerCh1 = USART_TRIGCTRL_TSEL_PRSCH1, /**< PRSCH0 selected as USART Trigger */
Kojto 119:aae6fcc7d9bb 276 usartPrsTriggerCh2 = USART_TRIGCTRL_TSEL_PRSCH2, /**< PRSCH0 selected as USART Trigger */
Kojto 119:aae6fcc7d9bb 277 usartPrsTriggerCh3 = USART_TRIGCTRL_TSEL_PRSCH3, /**< PRSCH0 selected as USART Trigger */
Kojto 119:aae6fcc7d9bb 278
Kojto 119:aae6fcc7d9bb 279 #if defined(USART_TRIGCTRL_TSEL_PRSCH7)
Kojto 119:aae6fcc7d9bb 280 usartPrsTriggerCh4 = USART_TRIGCTRL_TSEL_PRSCH4, /**< PRSCH0 selected as USART Trigger */
Kojto 119:aae6fcc7d9bb 281 usartPrsTriggerCh5 = USART_TRIGCTRL_TSEL_PRSCH5, /**< PRSCH0 selected as USART Trigger */
Kojto 119:aae6fcc7d9bb 282 usartPrsTriggerCh6 = USART_TRIGCTRL_TSEL_PRSCH6, /**< PRSCH0 selected as USART Trigger */
Kojto 119:aae6fcc7d9bb 283 usartPrsTriggerCh7 = USART_TRIGCTRL_TSEL_PRSCH7, /**< PRSCH0 selected as USART Trigger */
Kojto 119:aae6fcc7d9bb 284 #endif
Kojto 119:aae6fcc7d9bb 285 } USART_PrsTriggerCh_TypeDef;
Kojto 119:aae6fcc7d9bb 286
Kojto 119:aae6fcc7d9bb 287 /*******************************************************************************
Kojto 119:aae6fcc7d9bb 288 ******************************* STRUCTS ***********************************
Kojto 119:aae6fcc7d9bb 289 ******************************************************************************/
Kojto 119:aae6fcc7d9bb 290
Kojto 119:aae6fcc7d9bb 291 /** Asynchronous mode init structure. */
Kojto 119:aae6fcc7d9bb 292 typedef struct
Kojto 119:aae6fcc7d9bb 293 {
Kojto 119:aae6fcc7d9bb 294 /** Specifies whether TX and/or RX shall be enabled when init completed. */
Kojto 119:aae6fcc7d9bb 295 USART_Enable_TypeDef enable;
Kojto 119:aae6fcc7d9bb 296
Kojto 119:aae6fcc7d9bb 297 /**
Kojto 119:aae6fcc7d9bb 298 * USART/UART reference clock assumed when configuring baudrate setup. Set
Kojto 119:aae6fcc7d9bb 299 * it to 0 if currently configurated reference clock shall be used.
Kojto 119:aae6fcc7d9bb 300 */
Kojto 119:aae6fcc7d9bb 301 uint32_t refFreq;
Kojto 119:aae6fcc7d9bb 302
Kojto 119:aae6fcc7d9bb 303 /** Desired baudrate. */
Kojto 119:aae6fcc7d9bb 304 uint32_t baudrate;
Kojto 119:aae6fcc7d9bb 305
Kojto 119:aae6fcc7d9bb 306 /** Oversampling used. */
Kojto 119:aae6fcc7d9bb 307 USART_OVS_TypeDef oversampling;
Kojto 119:aae6fcc7d9bb 308
Kojto 119:aae6fcc7d9bb 309 /** Number of databits in frame. Notice that UART modules only support 8 or
Kojto 119:aae6fcc7d9bb 310 * 9 databits. */
Kojto 119:aae6fcc7d9bb 311 USART_Databits_TypeDef databits;
Kojto 119:aae6fcc7d9bb 312
Kojto 119:aae6fcc7d9bb 313 /** Parity mode to use. */
Kojto 119:aae6fcc7d9bb 314 USART_Parity_TypeDef parity;
Kojto 119:aae6fcc7d9bb 315
Kojto 119:aae6fcc7d9bb 316 /** Number of stopbits to use. */
Kojto 119:aae6fcc7d9bb 317 USART_Stopbits_TypeDef stopbits;
Kojto 119:aae6fcc7d9bb 318
Kojto 119:aae6fcc7d9bb 319 #if defined(USART_INPUT_RXPRS) && defined(USART_CTRL_MVDIS)
Kojto 119:aae6fcc7d9bb 320 /** Majority Vote Disable for 16x, 8x and 6x oversampling modes. */
Kojto 119:aae6fcc7d9bb 321 bool mvdis;
Kojto 119:aae6fcc7d9bb 322
Kojto 119:aae6fcc7d9bb 323 /** Enable USART Rx via PRS. */
Kojto 119:aae6fcc7d9bb 324 bool prsRxEnable;
Kojto 119:aae6fcc7d9bb 325
Kojto 119:aae6fcc7d9bb 326 /** Select PRS channel for USART Rx. (Only valid if prsRxEnable is true). */
Kojto 119:aae6fcc7d9bb 327 USART_PrsRxCh_TypeDef prsRxCh;
Kojto 119:aae6fcc7d9bb 328 #endif
Kojto 119:aae6fcc7d9bb 329 #if defined(_USART_TIMING_CSHOLD_MASK)
Kojto 119:aae6fcc7d9bb 330 /** Auto CS enabling */
<> 128:9bcdf88f62b0 331 bool autoCsEnable;
Kojto 119:aae6fcc7d9bb 332 /** Auto CS hold time in baud cycles */
<> 128:9bcdf88f62b0 333 uint8_t autoCsHold;
Kojto 119:aae6fcc7d9bb 334 /** Auto CS setup time in baud cycles */
<> 128:9bcdf88f62b0 335 uint8_t autoCsSetup;
Kojto 119:aae6fcc7d9bb 336 #endif
Kojto 119:aae6fcc7d9bb 337 } USART_InitAsync_TypeDef;
Kojto 119:aae6fcc7d9bb 338
Kojto 119:aae6fcc7d9bb 339 /** USART PRS trigger enable */
Kojto 119:aae6fcc7d9bb 340 typedef struct
Kojto 119:aae6fcc7d9bb 341 {
Kojto 119:aae6fcc7d9bb 342 #if defined(USART_TRIGCTRL_AUTOTXTEN)
Kojto 119:aae6fcc7d9bb 343 /** Enable AUTOTX */
Kojto 119:aae6fcc7d9bb 344 bool autoTxTriggerEnable;
Kojto 119:aae6fcc7d9bb 345 #endif
Kojto 119:aae6fcc7d9bb 346 /** Trigger receive via PRS channel */
Kojto 119:aae6fcc7d9bb 347 bool rxTriggerEnable;
Kojto 119:aae6fcc7d9bb 348 /** Trigger transmit via PRS channel */
Kojto 119:aae6fcc7d9bb 349 bool txTriggerEnable;
Kojto 119:aae6fcc7d9bb 350 /** PRS channel to be used to trigger auto transmission */
Kojto 119:aae6fcc7d9bb 351 USART_PrsTriggerCh_TypeDef prsTriggerChannel;
Kojto 119:aae6fcc7d9bb 352 } USART_PrsTriggerInit_TypeDef;
Kojto 119:aae6fcc7d9bb 353
Kojto 119:aae6fcc7d9bb 354 /** Default config for USART async init structure. */
Kojto 119:aae6fcc7d9bb 355 #if defined(_USART_TIMING_CSHOLD_MASK) && defined(USART_CTRL_MVDIS)
Kojto 119:aae6fcc7d9bb 356 #define USART_INITASYNC_DEFAULT \
Kojto 119:aae6fcc7d9bb 357 { \
Kojto 119:aae6fcc7d9bb 358 usartEnable, /* Enable RX/TX when init completed. */ \
Kojto 119:aae6fcc7d9bb 359 0, /* Use current configured reference clock for configuring baudrate. */ \
Kojto 119:aae6fcc7d9bb 360 115200, /* 115200 bits/s. */ \
Kojto 119:aae6fcc7d9bb 361 usartOVS16, /* 16x oversampling. */ \
Kojto 119:aae6fcc7d9bb 362 usartDatabits8, /* 8 databits. */ \
Kojto 119:aae6fcc7d9bb 363 usartNoParity, /* No parity. */ \
Kojto 119:aae6fcc7d9bb 364 usartStopbits1, /* 1 stopbit. */ \
Kojto 119:aae6fcc7d9bb 365 false, /* Do not disable majority vote. */ \
Kojto 119:aae6fcc7d9bb 366 false, /* Not USART PRS input mode. */ \
Kojto 119:aae6fcc7d9bb 367 usartPrsRxCh0, /* PRS channel 0. */ \
Kojto 119:aae6fcc7d9bb 368 false, /* Auto CS functionality enable/disable switch */ \
Kojto 119:aae6fcc7d9bb 369 0, /* Auto CS Hold cycles */ \
Kojto 119:aae6fcc7d9bb 370 0 /* Auto CS Setup cycles */ \
Kojto 119:aae6fcc7d9bb 371 }
Kojto 119:aae6fcc7d9bb 372 #elif defined(USART_INPUT_RXPRS) && defined(USART_CTRL_MVDIS)
Kojto 119:aae6fcc7d9bb 373 #define USART_INITASYNC_DEFAULT \
Kojto 119:aae6fcc7d9bb 374 { \
Kojto 119:aae6fcc7d9bb 375 usartEnable, /* Enable RX/TX when init completed. */ \
Kojto 119:aae6fcc7d9bb 376 0, /* Use current configured reference clock for configuring baudrate. */ \
Kojto 119:aae6fcc7d9bb 377 115200, /* 115200 bits/s. */ \
Kojto 119:aae6fcc7d9bb 378 usartOVS16, /* 16x oversampling. */ \
Kojto 119:aae6fcc7d9bb 379 usartDatabits8, /* 8 databits. */ \
Kojto 119:aae6fcc7d9bb 380 usartNoParity, /* No parity. */ \
Kojto 119:aae6fcc7d9bb 381 usartStopbits1, /* 1 stopbit. */ \
Kojto 119:aae6fcc7d9bb 382 false, /* Do not disable majority vote. */ \
Kojto 119:aae6fcc7d9bb 383 false, /* Not USART PRS input mode. */ \
Kojto 119:aae6fcc7d9bb 384 usartPrsRxCh0 /* PRS channel 0. */ \
Kojto 119:aae6fcc7d9bb 385 }
Kojto 119:aae6fcc7d9bb 386 #else
Kojto 119:aae6fcc7d9bb 387 #define USART_INITASYNC_DEFAULT \
Kojto 119:aae6fcc7d9bb 388 { \
Kojto 119:aae6fcc7d9bb 389 usartEnable, /* Enable RX/TX when init completed. */ \
Kojto 119:aae6fcc7d9bb 390 0, /* Use current configured reference clock for configuring baudrate. */ \
Kojto 119:aae6fcc7d9bb 391 115200, /* 115200 bits/s. */ \
Kojto 119:aae6fcc7d9bb 392 usartOVS16, /* 16x oversampling. */ \
Kojto 119:aae6fcc7d9bb 393 usartDatabits8, /* 8 databits. */ \
Kojto 119:aae6fcc7d9bb 394 usartNoParity, /* No parity. */ \
Kojto 119:aae6fcc7d9bb 395 usartStopbits1 /* 1 stopbit. */ \
Kojto 119:aae6fcc7d9bb 396 }
Kojto 119:aae6fcc7d9bb 397 #endif
Kojto 119:aae6fcc7d9bb 398
Kojto 119:aae6fcc7d9bb 399 /** Default config for USART PRS triggering structure. */
Kojto 119:aae6fcc7d9bb 400 #if defined(USART_TRIGCTRL_AUTOTXTEN)
Kojto 119:aae6fcc7d9bb 401 #define USART_INITPRSTRIGGER_DEFAULT \
Kojto 119:aae6fcc7d9bb 402 { \
Kojto 119:aae6fcc7d9bb 403 false, /* Do not enable autoTX triggering. */ \
Kojto 119:aae6fcc7d9bb 404 false, /* Do not enable receive triggering. */ \
Kojto 119:aae6fcc7d9bb 405 false, /* Do not enable transmit triggering. */ \
Kojto 119:aae6fcc7d9bb 406 usartPrsTriggerCh0 /* Set default channel to zero. */ \
Kojto 119:aae6fcc7d9bb 407 }
Kojto 119:aae6fcc7d9bb 408 #else
Kojto 119:aae6fcc7d9bb 409 #define USART_INITPRSTRIGGER_DEFAULT \
Kojto 119:aae6fcc7d9bb 410 { \
Kojto 119:aae6fcc7d9bb 411 false, /* Do not enable receive triggering. */ \
Kojto 119:aae6fcc7d9bb 412 false, /* Do not enable transmit triggering. */ \
Kojto 119:aae6fcc7d9bb 413 usartPrsTriggerCh0 /* Set default channel to zero. */ \
Kojto 119:aae6fcc7d9bb 414 }
Kojto 119:aae6fcc7d9bb 415 #endif
Kojto 119:aae6fcc7d9bb 416
Kojto 119:aae6fcc7d9bb 417 /** Synchronous mode init structure. */
Kojto 119:aae6fcc7d9bb 418 typedef struct
Kojto 119:aae6fcc7d9bb 419 {
Kojto 119:aae6fcc7d9bb 420 /** Specifies whether TX and/or RX shall be enabled when init completed. */
Kojto 119:aae6fcc7d9bb 421 USART_Enable_TypeDef enable;
Kojto 119:aae6fcc7d9bb 422
Kojto 119:aae6fcc7d9bb 423 /**
Kojto 119:aae6fcc7d9bb 424 * USART/UART reference clock assumed when configuring baudrate setup. Set
Kojto 119:aae6fcc7d9bb 425 * it to 0 if currently configurated reference clock shall be used.
Kojto 119:aae6fcc7d9bb 426 */
Kojto 119:aae6fcc7d9bb 427 uint32_t refFreq;
Kojto 119:aae6fcc7d9bb 428
Kojto 119:aae6fcc7d9bb 429 /** Desired baudrate. */
Kojto 119:aae6fcc7d9bb 430 uint32_t baudrate;
Kojto 119:aae6fcc7d9bb 431
Kojto 119:aae6fcc7d9bb 432 /** Number of databits in frame. */
Kojto 119:aae6fcc7d9bb 433 USART_Databits_TypeDef databits;
Kojto 119:aae6fcc7d9bb 434
Kojto 119:aae6fcc7d9bb 435 /** Select if to operate in master or slave mode. */
Kojto 119:aae6fcc7d9bb 436 bool master;
Kojto 119:aae6fcc7d9bb 437
Kojto 119:aae6fcc7d9bb 438 /** Select if to send most or least significant bit first. */
Kojto 119:aae6fcc7d9bb 439 bool msbf;
Kojto 119:aae6fcc7d9bb 440
Kojto 119:aae6fcc7d9bb 441 /** Clock polarity/phase mode. */
Kojto 119:aae6fcc7d9bb 442 USART_ClockMode_TypeDef clockMode;
Kojto 119:aae6fcc7d9bb 443
Kojto 119:aae6fcc7d9bb 444 #if defined(USART_INPUT_RXPRS) && defined(USART_TRIGCTRL_AUTOTXTEN)
Kojto 119:aae6fcc7d9bb 445 /** Enable USART Rx via PRS. */
Kojto 119:aae6fcc7d9bb 446 bool prsRxEnable;
Kojto 119:aae6fcc7d9bb 447
Kojto 119:aae6fcc7d9bb 448 /** Select PRS channel for USART Rx. (Only valid if prsRxEnable is true). */
Kojto 119:aae6fcc7d9bb 449 USART_PrsRxCh_TypeDef prsRxCh;
Kojto 119:aae6fcc7d9bb 450
Kojto 119:aae6fcc7d9bb 451 /** Enable AUTOTX mode. Transmits as long as RX is not full.
Kojto 119:aae6fcc7d9bb 452 * If TX is empty, underflows are generated. */
Kojto 119:aae6fcc7d9bb 453 bool autoTx;
Kojto 119:aae6fcc7d9bb 454 #endif
Kojto 119:aae6fcc7d9bb 455 #if defined(_USART_TIMING_CSHOLD_MASK)
Kojto 119:aae6fcc7d9bb 456 /** Auto CS enabling */
<> 128:9bcdf88f62b0 457 bool autoCsEnable;
Kojto 119:aae6fcc7d9bb 458 /** Auto CS hold time in baud cycles */
<> 128:9bcdf88f62b0 459 uint8_t autoCsHold;
Kojto 119:aae6fcc7d9bb 460 /** Auto CS setup time in baud cycles */
<> 128:9bcdf88f62b0 461 uint8_t autoCsSetup;
Kojto 119:aae6fcc7d9bb 462 #endif
Kojto 119:aae6fcc7d9bb 463 } USART_InitSync_TypeDef;
Kojto 119:aae6fcc7d9bb 464
Kojto 119:aae6fcc7d9bb 465 /** Default config for USART sync init structure. */
Kojto 119:aae6fcc7d9bb 466 #if defined(_USART_TIMING_CSHOLD_MASK)
Kojto 119:aae6fcc7d9bb 467 #define USART_INITSYNC_DEFAULT \
Kojto 119:aae6fcc7d9bb 468 { \
Kojto 119:aae6fcc7d9bb 469 usartEnable, /* Enable RX/TX when init completed. */ \
Kojto 119:aae6fcc7d9bb 470 0, /* Use current configured reference clock for configuring baudrate. */ \
Kojto 119:aae6fcc7d9bb 471 1000000, /* 1 Mbits/s. */ \
Kojto 119:aae6fcc7d9bb 472 usartDatabits8, /* 8 databits. */ \
Kojto 119:aae6fcc7d9bb 473 true, /* Master mode. */ \
Kojto 119:aae6fcc7d9bb 474 false, /* Send least significant bit first. */ \
Kojto 119:aae6fcc7d9bb 475 usartClockMode0, /* Clock idle low, sample on rising edge. */ \
Kojto 119:aae6fcc7d9bb 476 false, /* Not USART PRS input mode. */ \
Kojto 119:aae6fcc7d9bb 477 usartPrsRxCh0, /* PRS channel 0. */ \
Kojto 119:aae6fcc7d9bb 478 false, /* No AUTOTX mode. */ \
Kojto 119:aae6fcc7d9bb 479 false, /* No AUTOCS mode */ \
Kojto 119:aae6fcc7d9bb 480 0, /* Auto CS Hold cycles */ \
Kojto 119:aae6fcc7d9bb 481 0 /* Auto CS Setup cycles */ \
Kojto 119:aae6fcc7d9bb 482 }
Kojto 119:aae6fcc7d9bb 483 #elif defined(USART_INPUT_RXPRS) && defined(USART_TRIGCTRL_AUTOTXTEN)
Kojto 119:aae6fcc7d9bb 484 #define USART_INITSYNC_DEFAULT \
Kojto 119:aae6fcc7d9bb 485 { \
Kojto 119:aae6fcc7d9bb 486 usartEnable, /* Enable RX/TX when init completed. */ \
Kojto 119:aae6fcc7d9bb 487 0, /* Use current configured reference clock for configuring baudrate. */ \
Kojto 119:aae6fcc7d9bb 488 1000000, /* 1 Mbits/s. */ \
Kojto 119:aae6fcc7d9bb 489 usartDatabits8, /* 8 databits. */ \
Kojto 119:aae6fcc7d9bb 490 true, /* Master mode. */ \
Kojto 119:aae6fcc7d9bb 491 false, /* Send least significant bit first. */ \
Kojto 119:aae6fcc7d9bb 492 usartClockMode0, /* Clock idle low, sample on rising edge. */ \
Kojto 119:aae6fcc7d9bb 493 false, /* Not USART PRS input mode. */ \
Kojto 119:aae6fcc7d9bb 494 usartPrsRxCh0, /* PRS channel 0. */ \
Kojto 119:aae6fcc7d9bb 495 false /* No AUTOTX mode. */ \
Kojto 119:aae6fcc7d9bb 496 }
Kojto 119:aae6fcc7d9bb 497 #else
Kojto 119:aae6fcc7d9bb 498 #define USART_INITSYNC_DEFAULT \
Kojto 119:aae6fcc7d9bb 499 { \
Kojto 119:aae6fcc7d9bb 500 usartEnable, /* Enable RX/TX when init completed. */ \
Kojto 119:aae6fcc7d9bb 501 0, /* Use current configured reference clock for configuring baudrate. */ \
Kojto 119:aae6fcc7d9bb 502 1000000, /* 1 Mbits/s. */ \
Kojto 119:aae6fcc7d9bb 503 usartDatabits8, /* 8 databits. */ \
Kojto 119:aae6fcc7d9bb 504 true, /* Master mode. */ \
Kojto 119:aae6fcc7d9bb 505 false, /* Send least significant bit first. */ \
Kojto 119:aae6fcc7d9bb 506 usartClockMode0 /* Clock idle low, sample on rising edge. */ \
Kojto 119:aae6fcc7d9bb 507 }
Kojto 119:aae6fcc7d9bb 508 #endif
Kojto 119:aae6fcc7d9bb 509
Kojto 119:aae6fcc7d9bb 510
Kojto 119:aae6fcc7d9bb 511 /** IrDA mode init structure. Inherited from asynchronous mode init structure */
Kojto 119:aae6fcc7d9bb 512 typedef struct
Kojto 119:aae6fcc7d9bb 513 {
Kojto 119:aae6fcc7d9bb 514 /** General Async initialization structure. */
Kojto 119:aae6fcc7d9bb 515 USART_InitAsync_TypeDef async;
Kojto 119:aae6fcc7d9bb 516
Kojto 119:aae6fcc7d9bb 517 /** Set to invert Rx signal before IrDA demodulator. */
Kojto 119:aae6fcc7d9bb 518 bool irRxInv;
Kojto 119:aae6fcc7d9bb 519
Kojto 119:aae6fcc7d9bb 520 /** Set to enable filter on IrDA demodulator. */
Kojto 119:aae6fcc7d9bb 521 bool irFilt;
Kojto 119:aae6fcc7d9bb 522
Kojto 119:aae6fcc7d9bb 523 /** Configure the pulse width generated by the IrDA modulator as a fraction
Kojto 119:aae6fcc7d9bb 524 * of the configured USART bit period. */
Kojto 119:aae6fcc7d9bb 525 USART_IrDAPw_Typedef irPw;
Kojto 119:aae6fcc7d9bb 526
Kojto 119:aae6fcc7d9bb 527 /** Enable the PRS channel selected by irPrsSel as input to IrDA module
Kojto 119:aae6fcc7d9bb 528 * instead of TX. */
Kojto 119:aae6fcc7d9bb 529 bool irPrsEn;
Kojto 119:aae6fcc7d9bb 530
Kojto 119:aae6fcc7d9bb 531 /** A PRS can be used as input to the pulse modulator instead of TX.
Kojto 119:aae6fcc7d9bb 532 * This value selects the channel to use. */
Kojto 119:aae6fcc7d9bb 533 USART_IrDAPrsSel_Typedef irPrsSel;
Kojto 119:aae6fcc7d9bb 534 } USART_InitIrDA_TypeDef;
Kojto 119:aae6fcc7d9bb 535
Kojto 119:aae6fcc7d9bb 536
Kojto 119:aae6fcc7d9bb 537 /** Default config for IrDA mode init structure. */
<> 128:9bcdf88f62b0 538 #if defined(_USART_TIMING_CSHOLD_MASK) && defined(USART_CTRL_MVDIS)
<> 128:9bcdf88f62b0 539 #define USART_INITIRDA_DEFAULT \
<> 128:9bcdf88f62b0 540 { \
<> 128:9bcdf88f62b0 541 { \
<> 128:9bcdf88f62b0 542 usartEnable, /* Enable RX/TX when init completed. */ \
<> 128:9bcdf88f62b0 543 0, /* Use current configured reference clock for configuring baudrate. */ \
<> 128:9bcdf88f62b0 544 115200, /* 115200 bits/s. */ \
<> 128:9bcdf88f62b0 545 usartOVS16, /* 16x oversampling. */ \
<> 128:9bcdf88f62b0 546 usartDatabits8, /* 8 databits. */ \
<> 128:9bcdf88f62b0 547 usartEvenParity, /* Even parity. */ \
<> 128:9bcdf88f62b0 548 usartStopbits1, /* 1 stopbit. */ \
<> 128:9bcdf88f62b0 549 false, /* Do not disable majority vote. */ \
<> 128:9bcdf88f62b0 550 false, /* Not USART PRS input mode. */ \
<> 128:9bcdf88f62b0 551 usartPrsRxCh0, /* PRS channel 0. */ \
<> 128:9bcdf88f62b0 552 false, /* Auto CS functionality enable/disable switch */ \
<> 128:9bcdf88f62b0 553 0, /* Auto CS Hold cycles */ \
<> 128:9bcdf88f62b0 554 0 /* Auto CS Setup cycles */ \
<> 128:9bcdf88f62b0 555 }, \
<> 128:9bcdf88f62b0 556 false, /* Rx invert disabled. */ \
<> 128:9bcdf88f62b0 557 false, /* Filtering disabled. */ \
<> 128:9bcdf88f62b0 558 usartIrDAPwTHREE, /* Pulse width is set to ONE. */ \
<> 128:9bcdf88f62b0 559 false, /* Routing to PRS is disabled. */ \
<> 128:9bcdf88f62b0 560 usartIrDAPrsCh0 /* PRS channel 0. */ \
<> 128:9bcdf88f62b0 561 }
<> 128:9bcdf88f62b0 562 #elif defined(USART_INPUT_RXPRS) && defined(USART_CTRL_MVDIS)
<> 128:9bcdf88f62b0 563 #define USART_INITIRDA_DEFAULT \
<> 128:9bcdf88f62b0 564 { \
<> 128:9bcdf88f62b0 565 { \
<> 128:9bcdf88f62b0 566 usartEnable, /* Enable RX/TX when init completed. */ \
<> 128:9bcdf88f62b0 567 0, /* Use current configured reference clock for configuring baudrate. */ \
<> 128:9bcdf88f62b0 568 115200, /* 115200 bits/s. */ \
<> 128:9bcdf88f62b0 569 usartOVS16, /* 16x oversampling. */ \
<> 128:9bcdf88f62b0 570 usartDatabits8, /* 8 databits. */ \
<> 128:9bcdf88f62b0 571 usartEvenParity, /* Even parity. */ \
<> 128:9bcdf88f62b0 572 usartStopbits1, /* 1 stopbit. */ \
<> 128:9bcdf88f62b0 573 false, /* Do not disable majority vote. */ \
<> 128:9bcdf88f62b0 574 false, /* Not USART PRS input mode. */ \
<> 128:9bcdf88f62b0 575 usartPrsRxCh0 /* PRS channel 0. */ \
<> 128:9bcdf88f62b0 576 }, \
<> 128:9bcdf88f62b0 577 false, /* Rx invert disabled. */ \
<> 128:9bcdf88f62b0 578 false, /* Filtering disabled. */ \
<> 128:9bcdf88f62b0 579 usartIrDAPwTHREE, /* Pulse width is set to ONE. */ \
<> 128:9bcdf88f62b0 580 false, /* Routing to PRS is disabled. */ \
<> 128:9bcdf88f62b0 581 usartIrDAPrsCh0 /* PRS channel 0. */ \
<> 128:9bcdf88f62b0 582 }
<> 128:9bcdf88f62b0 583 #else
Kojto 119:aae6fcc7d9bb 584 #define USART_INITIRDA_DEFAULT \
Kojto 119:aae6fcc7d9bb 585 { \
Kojto 119:aae6fcc7d9bb 586 { \
Kojto 119:aae6fcc7d9bb 587 usartEnable, /* Enable RX/TX when init completed. */ \
Kojto 119:aae6fcc7d9bb 588 0, /* Use current configured reference clock for configuring baudrate. */ \
Kojto 119:aae6fcc7d9bb 589 115200, /* 115200 bits/s. */ \
Kojto 119:aae6fcc7d9bb 590 usartOVS16, /* 16x oversampling. */ \
Kojto 119:aae6fcc7d9bb 591 usartDatabits8, /* 8 databits. */ \
Kojto 119:aae6fcc7d9bb 592 usartEvenParity, /* Even parity. */ \
Kojto 119:aae6fcc7d9bb 593 usartStopbits1 /* 1 stopbit. */ \
Kojto 119:aae6fcc7d9bb 594 }, \
Kojto 119:aae6fcc7d9bb 595 false, /* Rx invert disabled. */ \
Kojto 119:aae6fcc7d9bb 596 false, /* Filtering disabled. */ \
Kojto 119:aae6fcc7d9bb 597 usartIrDAPwTHREE, /* Pulse width is set to ONE. */ \
Kojto 119:aae6fcc7d9bb 598 false, /* Routing to PRS is disabled. */ \
Kojto 119:aae6fcc7d9bb 599 usartIrDAPrsCh0 /* PRS channel 0. */ \
Kojto 119:aae6fcc7d9bb 600 }
<> 128:9bcdf88f62b0 601 #endif
Kojto 119:aae6fcc7d9bb 602
Kojto 119:aae6fcc7d9bb 603 #if defined(_USART_I2SCTRL_MASK)
Kojto 119:aae6fcc7d9bb 604 /** I2S mode init structure. Inherited from synchronous mode init structure */
Kojto 119:aae6fcc7d9bb 605 typedef struct
Kojto 119:aae6fcc7d9bb 606 {
Kojto 119:aae6fcc7d9bb 607 /** General Sync initialization structure. */
Kojto 119:aae6fcc7d9bb 608 USART_InitSync_TypeDef sync;
Kojto 119:aae6fcc7d9bb 609
Kojto 119:aae6fcc7d9bb 610 /** I2S mode. */
Kojto 119:aae6fcc7d9bb 611 USART_I2sFormat_TypeDef format;
Kojto 119:aae6fcc7d9bb 612
Kojto 119:aae6fcc7d9bb 613 /** Delay on I2S data. Set to add a one-cycle delay between a transition
Kojto 119:aae6fcc7d9bb 614 * on the word-clock and the start of the I2S word.
Kojto 119:aae6fcc7d9bb 615 * Should be set for standard I2S format. */
Kojto 119:aae6fcc7d9bb 616 bool delay;
Kojto 119:aae6fcc7d9bb 617
Kojto 119:aae6fcc7d9bb 618 /** Separate DMA Request For Left/Right Data. */
Kojto 119:aae6fcc7d9bb 619 bool dmaSplit;
Kojto 119:aae6fcc7d9bb 620
Kojto 119:aae6fcc7d9bb 621 /** Justification of I2S data within the frame */
Kojto 119:aae6fcc7d9bb 622 USART_I2sJustify_TypeDef justify;
Kojto 119:aae6fcc7d9bb 623
Kojto 119:aae6fcc7d9bb 624 /** Stero or Mono, set to true for mono. */
Kojto 119:aae6fcc7d9bb 625 bool mono;
Kojto 119:aae6fcc7d9bb 626 } USART_InitI2s_TypeDef;
Kojto 119:aae6fcc7d9bb 627
Kojto 119:aae6fcc7d9bb 628
Kojto 119:aae6fcc7d9bb 629 /** Default config for I2S mode init structure. */
<> 128:9bcdf88f62b0 630 #if defined(_USART_TIMING_CSHOLD_MASK)
<> 128:9bcdf88f62b0 631 #define USART_INITI2S_DEFAULT \
<> 128:9bcdf88f62b0 632 { \
<> 128:9bcdf88f62b0 633 { \
<> 128:9bcdf88f62b0 634 usartEnableTx, /* Enable TX when init completed. */ \
<> 128:9bcdf88f62b0 635 0, /* Use current configured reference clock for configuring baudrate. */ \
<> 128:9bcdf88f62b0 636 1000000, /* Baudrate 1M bits/s. */ \
<> 128:9bcdf88f62b0 637 usartDatabits16, /* 16 databits. */ \
<> 128:9bcdf88f62b0 638 true, /* Operate as I2S master. */ \
<> 128:9bcdf88f62b0 639 true, /* Most significant bit first. */ \
<> 128:9bcdf88f62b0 640 usartClockMode0, /* Clock idle low, sample on rising edge. */ \
<> 128:9bcdf88f62b0 641 false, /* Don't enable USARTRx via PRS. */ \
<> 128:9bcdf88f62b0 642 usartPrsRxCh0, /* PRS channel selection (dummy). */ \
<> 128:9bcdf88f62b0 643 false, /* Disable AUTOTX mode. */ \
<> 128:9bcdf88f62b0 644 false, /* No AUTOCS mode */ \
<> 128:9bcdf88f62b0 645 0, /* Auto CS Hold cycles */ \
<> 128:9bcdf88f62b0 646 0 /* Auto CS Setup cycles */ \
<> 128:9bcdf88f62b0 647 }, \
<> 128:9bcdf88f62b0 648 usartI2sFormatW16D16, /* 16-bit word, 16-bit data */ \
<> 128:9bcdf88f62b0 649 true, /* Delay on I2S data. */ \
<> 128:9bcdf88f62b0 650 false, /* No DMA split. */ \
<> 128:9bcdf88f62b0 651 usartI2sJustifyLeft, /* Data is left-justified within the frame */ \
<> 128:9bcdf88f62b0 652 false /* Stereo mode. */ \
<> 128:9bcdf88f62b0 653 }
<> 128:9bcdf88f62b0 654 #else
Kojto 119:aae6fcc7d9bb 655 #define USART_INITI2S_DEFAULT \
Kojto 119:aae6fcc7d9bb 656 { \
Kojto 119:aae6fcc7d9bb 657 { \
Kojto 119:aae6fcc7d9bb 658 usartEnableTx, /* Enable TX when init completed. */ \
Kojto 119:aae6fcc7d9bb 659 0, /* Use current configured reference clock for configuring baudrate. */ \
Kojto 119:aae6fcc7d9bb 660 1000000, /* Baudrate 1M bits/s. */ \
Kojto 119:aae6fcc7d9bb 661 usartDatabits16, /* 16 databits. */ \
Kojto 119:aae6fcc7d9bb 662 true, /* Operate as I2S master. */ \
Kojto 119:aae6fcc7d9bb 663 true, /* Most significant bit first. */ \
Kojto 119:aae6fcc7d9bb 664 usartClockMode0, /* Clock idle low, sample on rising edge. */ \
Kojto 119:aae6fcc7d9bb 665 false, /* Don't enable USARTRx via PRS. */ \
Kojto 119:aae6fcc7d9bb 666 usartPrsRxCh0, /* PRS channel selection (dummy). */ \
Kojto 119:aae6fcc7d9bb 667 false /* Disable AUTOTX mode. */ \
Kojto 119:aae6fcc7d9bb 668 }, \
Kojto 119:aae6fcc7d9bb 669 usartI2sFormatW16D16, /* 16-bit word, 16-bit data */ \
Kojto 119:aae6fcc7d9bb 670 true, /* Delay on I2S data. */ \
Kojto 119:aae6fcc7d9bb 671 false, /* No DMA split. */ \
Kojto 119:aae6fcc7d9bb 672 usartI2sJustifyLeft, /* Data is left-justified within the frame */ \
Kojto 119:aae6fcc7d9bb 673 false /* Stereo mode. */ \
Kojto 119:aae6fcc7d9bb 674 }
Kojto 119:aae6fcc7d9bb 675 #endif
<> 128:9bcdf88f62b0 676 #endif
Kojto 119:aae6fcc7d9bb 677
Kojto 119:aae6fcc7d9bb 678 /*******************************************************************************
Kojto 119:aae6fcc7d9bb 679 ***************************** PROTOTYPES **********************************
Kojto 119:aae6fcc7d9bb 680 ******************************************************************************/
Kojto 119:aae6fcc7d9bb 681
Kojto 119:aae6fcc7d9bb 682 void USART_BaudrateAsyncSet(USART_TypeDef *usart,
Kojto 119:aae6fcc7d9bb 683 uint32_t refFreq,
Kojto 119:aae6fcc7d9bb 684 uint32_t baudrate,
Kojto 119:aae6fcc7d9bb 685 USART_OVS_TypeDef ovs);
Kojto 119:aae6fcc7d9bb 686 uint32_t USART_BaudrateCalc(uint32_t refFreq,
Kojto 119:aae6fcc7d9bb 687 uint32_t clkdiv,
Kojto 119:aae6fcc7d9bb 688 bool syncmode,
Kojto 119:aae6fcc7d9bb 689 USART_OVS_TypeDef ovs);
Kojto 119:aae6fcc7d9bb 690 uint32_t USART_BaudrateGet(USART_TypeDef *usart);
Kojto 119:aae6fcc7d9bb 691 void USART_BaudrateSyncSet(USART_TypeDef *usart,
Kojto 119:aae6fcc7d9bb 692 uint32_t refFreq,
Kojto 119:aae6fcc7d9bb 693 uint32_t baudrate);
Kojto 119:aae6fcc7d9bb 694 void USART_Enable(USART_TypeDef *usart, USART_Enable_TypeDef enable);
Kojto 119:aae6fcc7d9bb 695
Kojto 119:aae6fcc7d9bb 696 void USART_InitAsync(USART_TypeDef *usart, const USART_InitAsync_TypeDef *init);
Kojto 119:aae6fcc7d9bb 697 void USART_InitSync(USART_TypeDef *usart, const USART_InitSync_TypeDef *init);
<> 128:9bcdf88f62b0 698 void USARTn_InitIrDA(USART_TypeDef *usart, const USART_InitIrDA_TypeDef *init);
Kojto 119:aae6fcc7d9bb 699
Kojto 119:aae6fcc7d9bb 700 #if defined(_USART_I2SCTRL_MASK)
Kojto 119:aae6fcc7d9bb 701 void USART_InitI2s(USART_TypeDef *usart, USART_InitI2s_TypeDef *init);
Kojto 119:aae6fcc7d9bb 702 #endif
Kojto 119:aae6fcc7d9bb 703 void USART_InitPrsTrigger(USART_TypeDef *usart, const USART_PrsTriggerInit_TypeDef *init);
Kojto 119:aae6fcc7d9bb 704
<> 128:9bcdf88f62b0 705 #if defined(DEFAULT_IRDA_USART) || defined(USART0) || ((USART_COUNT == 1) && defined(USART1))
<> 128:9bcdf88f62b0 706 /***************************************************************************//**
<> 128:9bcdf88f62b0 707 * @brief
<> 128:9bcdf88f62b0 708 * Init DEFAULT_IRDA_USART for asynchronous IrDA mode.
<> 128:9bcdf88f62b0 709 *
<> 128:9bcdf88f62b0 710 * @details
<> 128:9bcdf88f62b0 711 * This function will configure basic settings in order to operate in
<> 128:9bcdf88f62b0 712 * asynchronous IrDA mode.
<> 128:9bcdf88f62b0 713 *
<> 128:9bcdf88f62b0 714 * Special control setup not covered by this function must be done after
<> 128:9bcdf88f62b0 715 * using this function by direct modification of the CTRL and IRCTRL
<> 128:9bcdf88f62b0 716 * registers.
<> 128:9bcdf88f62b0 717 *
<> 128:9bcdf88f62b0 718 * Notice that pins used by the USART/UART module must be properly configured
<> 128:9bcdf88f62b0 719 * by the user explicitly, in order for the USART/UART to work as intended.
<> 128:9bcdf88f62b0 720 * (When configuring pins, one should remember to consider the sequence of
<> 128:9bcdf88f62b0 721 * configuration, in order to avoid unintended pulses/glitches on output
<> 128:9bcdf88f62b0 722 * pins.)
<> 128:9bcdf88f62b0 723 *
<> 128:9bcdf88f62b0 724 * @param[in] init
<> 128:9bcdf88f62b0 725 * Pointer to initialization structure used to configure async IrDA setup.
<> 128:9bcdf88f62b0 726 *
<> 128:9bcdf88f62b0 727 * @deprecated
<> 128:9bcdf88f62b0 728 * Deprecated function. New code should use USARTn_InitIrDA().
<> 128:9bcdf88f62b0 729 * This function uses DEFAULT_IRDA_USART, which unless otherwise specified, is
<> 128:9bcdf88f62b0 730 * USART0 on most devices, and USART1 on devices that don't have a USART0.
<> 128:9bcdf88f62b0 731 *
<> 128:9bcdf88f62b0 732 ******************************************************************************/
<> 128:9bcdf88f62b0 733 __STATIC_INLINE void USART_InitIrDA(const USART_InitIrDA_TypeDef *init)
<> 128:9bcdf88f62b0 734 {
<> 128:9bcdf88f62b0 735 #if defined(DEFAULT_IRDA_USART)
<> 128:9bcdf88f62b0 736 USART_TypeDef *usart = DEFAULT_IRDA_USART;
<> 128:9bcdf88f62b0 737 #elif (USART_COUNT == 1) && defined(USART1)
<> 128:9bcdf88f62b0 738 USART_TypeDef *usart = USART1;
<> 128:9bcdf88f62b0 739 #else
<> 128:9bcdf88f62b0 740 USART_TypeDef *usart = USART0;
<> 128:9bcdf88f62b0 741 #endif
<> 128:9bcdf88f62b0 742 USARTn_InitIrDA(usart, init);
<> 128:9bcdf88f62b0 743 }
<> 128:9bcdf88f62b0 744 #endif
Kojto 119:aae6fcc7d9bb 745
Kojto 119:aae6fcc7d9bb 746 /***************************************************************************//**
Kojto 119:aae6fcc7d9bb 747 * @brief
Kojto 119:aae6fcc7d9bb 748 * Clear one or more pending USART interrupts.
Kojto 119:aae6fcc7d9bb 749 *
Kojto 119:aae6fcc7d9bb 750 * @param[in] usart
Kojto 119:aae6fcc7d9bb 751 * Pointer to USART/UART peripheral register block.
Kojto 119:aae6fcc7d9bb 752 *
Kojto 119:aae6fcc7d9bb 753 * @param[in] flags
Kojto 119:aae6fcc7d9bb 754 * Pending USART/UART interrupt source(s) to clear. Use one or more valid
Kojto 119:aae6fcc7d9bb 755 * interrupt flags for the USART module (USART_IF_nnn) OR'ed together.
Kojto 119:aae6fcc7d9bb 756 ******************************************************************************/
Kojto 119:aae6fcc7d9bb 757 __STATIC_INLINE void USART_IntClear(USART_TypeDef *usart, uint32_t flags)
Kojto 119:aae6fcc7d9bb 758 {
Kojto 119:aae6fcc7d9bb 759 usart->IFC = flags;
Kojto 119:aae6fcc7d9bb 760 }
Kojto 119:aae6fcc7d9bb 761
Kojto 119:aae6fcc7d9bb 762
Kojto 119:aae6fcc7d9bb 763 /***************************************************************************//**
Kojto 119:aae6fcc7d9bb 764 * @brief
Kojto 119:aae6fcc7d9bb 765 * Disable one or more USART interrupts.
Kojto 119:aae6fcc7d9bb 766 *
Kojto 119:aae6fcc7d9bb 767 * @param[in] usart
Kojto 119:aae6fcc7d9bb 768 * Pointer to USART/UART peripheral register block.
Kojto 119:aae6fcc7d9bb 769 *
Kojto 119:aae6fcc7d9bb 770 * @param[in] flags
Kojto 119:aae6fcc7d9bb 771 * USART/UART interrupt source(s) to disable. Use one or more valid
Kojto 119:aae6fcc7d9bb 772 * interrupt flags for the USART module (USART_IF_nnn) OR'ed together.
Kojto 119:aae6fcc7d9bb 773 ******************************************************************************/
Kojto 119:aae6fcc7d9bb 774 __STATIC_INLINE void USART_IntDisable(USART_TypeDef *usart, uint32_t flags)
Kojto 119:aae6fcc7d9bb 775 {
Kojto 119:aae6fcc7d9bb 776 usart->IEN &= ~flags;
Kojto 119:aae6fcc7d9bb 777 }
Kojto 119:aae6fcc7d9bb 778
Kojto 119:aae6fcc7d9bb 779
Kojto 119:aae6fcc7d9bb 780 /***************************************************************************//**
Kojto 119:aae6fcc7d9bb 781 * @brief
Kojto 119:aae6fcc7d9bb 782 * Enable one or more USART interrupts.
Kojto 119:aae6fcc7d9bb 783 *
Kojto 119:aae6fcc7d9bb 784 * @note
Kojto 119:aae6fcc7d9bb 785 * Depending on the use, a pending interrupt may already be set prior to
Kojto 119:aae6fcc7d9bb 786 * enabling the interrupt. Consider using USART_IntClear() prior to enabling
Kojto 119:aae6fcc7d9bb 787 * if such a pending interrupt should be ignored.
Kojto 119:aae6fcc7d9bb 788 *
Kojto 119:aae6fcc7d9bb 789 * @param[in] usart
Kojto 119:aae6fcc7d9bb 790 * Pointer to USART/UART peripheral register block.
Kojto 119:aae6fcc7d9bb 791 *
Kojto 119:aae6fcc7d9bb 792 * @param[in] flags
Kojto 119:aae6fcc7d9bb 793 * USART/UART interrupt source(s) to enable. Use one or more valid
Kojto 119:aae6fcc7d9bb 794 * interrupt flags for the USART module (USART_IF_nnn) OR'ed together.
Kojto 119:aae6fcc7d9bb 795 ******************************************************************************/
Kojto 119:aae6fcc7d9bb 796 __STATIC_INLINE void USART_IntEnable(USART_TypeDef *usart, uint32_t flags)
Kojto 119:aae6fcc7d9bb 797 {
Kojto 119:aae6fcc7d9bb 798 usart->IEN |= flags;
Kojto 119:aae6fcc7d9bb 799 }
Kojto 119:aae6fcc7d9bb 800
Kojto 119:aae6fcc7d9bb 801
Kojto 119:aae6fcc7d9bb 802 /***************************************************************************//**
Kojto 119:aae6fcc7d9bb 803 * @brief
Kojto 119:aae6fcc7d9bb 804 * Get pending USART interrupt flags.
Kojto 119:aae6fcc7d9bb 805 *
Kojto 119:aae6fcc7d9bb 806 * @note
Kojto 119:aae6fcc7d9bb 807 * The event bits are not cleared by the use of this function.
Kojto 119:aae6fcc7d9bb 808 *
Kojto 119:aae6fcc7d9bb 809 * @param[in] usart
Kojto 119:aae6fcc7d9bb 810 * Pointer to USART/UART peripheral register block.
Kojto 119:aae6fcc7d9bb 811 *
Kojto 119:aae6fcc7d9bb 812 * @return
Kojto 119:aae6fcc7d9bb 813 * USART/UART interrupt source(s) pending. Returns one or more valid
Kojto 119:aae6fcc7d9bb 814 * interrupt flags for the USART module (USART_IF_nnn) OR'ed together.
Kojto 119:aae6fcc7d9bb 815 ******************************************************************************/
Kojto 119:aae6fcc7d9bb 816 __STATIC_INLINE uint32_t USART_IntGet(USART_TypeDef *usart)
Kojto 119:aae6fcc7d9bb 817 {
Kojto 119:aae6fcc7d9bb 818 return usart->IF;
Kojto 119:aae6fcc7d9bb 819 }
Kojto 119:aae6fcc7d9bb 820
Kojto 119:aae6fcc7d9bb 821
Kojto 119:aae6fcc7d9bb 822 /***************************************************************************//**
Kojto 119:aae6fcc7d9bb 823 * @brief
Kojto 119:aae6fcc7d9bb 824 * Get enabled and pending USART interrupt flags.
Kojto 119:aae6fcc7d9bb 825 * Useful for handling more interrupt sources in the same interrupt handler.
Kojto 119:aae6fcc7d9bb 826 *
Kojto 119:aae6fcc7d9bb 827 * @param[in] usart
Kojto 119:aae6fcc7d9bb 828 * Pointer to USART/UART peripheral register block.
Kojto 119:aae6fcc7d9bb 829 *
Kojto 119:aae6fcc7d9bb 830 * @note
Kojto 119:aae6fcc7d9bb 831 * Interrupt flags are not cleared by the use of this function.
Kojto 119:aae6fcc7d9bb 832 *
Kojto 119:aae6fcc7d9bb 833 * @return
Kojto 119:aae6fcc7d9bb 834 * Pending and enabled USART interrupt sources.
Kojto 119:aae6fcc7d9bb 835 * The return value is the bitwise AND combination of
Kojto 119:aae6fcc7d9bb 836 * - the OR combination of enabled interrupt sources in USARTx_IEN_nnn
Kojto 119:aae6fcc7d9bb 837 * register (USARTx_IEN_nnn) and
Kojto 119:aae6fcc7d9bb 838 * - the OR combination of valid interrupt flags of the USART module
Kojto 119:aae6fcc7d9bb 839 * (USARTx_IF_nnn).
Kojto 119:aae6fcc7d9bb 840 ******************************************************************************/
Kojto 119:aae6fcc7d9bb 841 __STATIC_INLINE uint32_t USART_IntGetEnabled(USART_TypeDef *usart)
Kojto 119:aae6fcc7d9bb 842 {
Kojto 119:aae6fcc7d9bb 843 uint32_t ien;
Kojto 119:aae6fcc7d9bb 844
Kojto 119:aae6fcc7d9bb 845 /* Store USARTx->IEN in temporary variable in order to define explicit order
Kojto 119:aae6fcc7d9bb 846 * of volatile accesses. */
Kojto 119:aae6fcc7d9bb 847 ien = usart->IEN;
Kojto 119:aae6fcc7d9bb 848
Kojto 119:aae6fcc7d9bb 849 /* Bitwise AND of pending and enabled interrupts */
Kojto 119:aae6fcc7d9bb 850 return usart->IF & ien;
Kojto 119:aae6fcc7d9bb 851 }
Kojto 119:aae6fcc7d9bb 852
Kojto 119:aae6fcc7d9bb 853
Kojto 119:aae6fcc7d9bb 854 /***************************************************************************//**
Kojto 119:aae6fcc7d9bb 855 * @brief
Kojto 119:aae6fcc7d9bb 856 * Set one or more pending USART interrupts from SW.
Kojto 119:aae6fcc7d9bb 857 *
Kojto 119:aae6fcc7d9bb 858 * @param[in] usart
Kojto 119:aae6fcc7d9bb 859 * Pointer to USART/UART peripheral register block.
Kojto 119:aae6fcc7d9bb 860 *
Kojto 119:aae6fcc7d9bb 861 * @param[in] flags
Kojto 119:aae6fcc7d9bb 862 * USART/UART interrupt source(s) to set to pending. Use one or more valid
Kojto 119:aae6fcc7d9bb 863 * interrupt flags for the USART module (USART_IF_nnn) OR'ed together.
Kojto 119:aae6fcc7d9bb 864 ******************************************************************************/
Kojto 119:aae6fcc7d9bb 865 __STATIC_INLINE void USART_IntSet(USART_TypeDef *usart, uint32_t flags)
Kojto 119:aae6fcc7d9bb 866 {
Kojto 119:aae6fcc7d9bb 867 usart->IFS = flags;
Kojto 119:aae6fcc7d9bb 868 }
Kojto 119:aae6fcc7d9bb 869
Kojto 119:aae6fcc7d9bb 870
Kojto 119:aae6fcc7d9bb 871 /***************************************************************************//**
Kojto 119:aae6fcc7d9bb 872 * @brief
Kojto 119:aae6fcc7d9bb 873 * Get USART STATUS register.
Kojto 119:aae6fcc7d9bb 874 *
Kojto 119:aae6fcc7d9bb 875 * @param[in] usart
Kojto 119:aae6fcc7d9bb 876 * Pointer to USART/UART peripheral register block.
Kojto 119:aae6fcc7d9bb 877 *
Kojto 119:aae6fcc7d9bb 878 * @return
Kojto 119:aae6fcc7d9bb 879 * STATUS register value.
Kojto 119:aae6fcc7d9bb 880 *
Kojto 119:aae6fcc7d9bb 881 ******************************************************************************/
Kojto 119:aae6fcc7d9bb 882 __STATIC_INLINE uint32_t USART_StatusGet(USART_TypeDef *usart)
Kojto 119:aae6fcc7d9bb 883 {
Kojto 119:aae6fcc7d9bb 884 return usart->STATUS;
Kojto 119:aae6fcc7d9bb 885 }
Kojto 119:aae6fcc7d9bb 886
Kojto 119:aae6fcc7d9bb 887 void USART_Reset(USART_TypeDef *usart);
Kojto 119:aae6fcc7d9bb 888 uint8_t USART_Rx(USART_TypeDef *usart);
Kojto 119:aae6fcc7d9bb 889 uint16_t USART_RxDouble(USART_TypeDef *usart);
Kojto 119:aae6fcc7d9bb 890 uint32_t USART_RxDoubleExt(USART_TypeDef *usart);
Kojto 119:aae6fcc7d9bb 891 uint16_t USART_RxExt(USART_TypeDef *usart);
Kojto 119:aae6fcc7d9bb 892
Kojto 119:aae6fcc7d9bb 893
Kojto 119:aae6fcc7d9bb 894 /***************************************************************************//**
Kojto 119:aae6fcc7d9bb 895 * @brief
Kojto 119:aae6fcc7d9bb 896 * Receive one 4-8 bit frame, (or part of 10-16 bit frame).
Kojto 119:aae6fcc7d9bb 897 *
Kojto 119:aae6fcc7d9bb 898 * @details
Kojto 119:aae6fcc7d9bb 899 * This function is used to quickly receive one 4-8 bits frame by reading the
Kojto 119:aae6fcc7d9bb 900 * RXDATA register directly, without checking the STATUS register for the
Kojto 119:aae6fcc7d9bb 901 * RXDATAV flag. This can be useful from the RXDATAV interrupt handler,
Kojto 119:aae6fcc7d9bb 902 * i.e. waiting is superfluous, in order to quickly read the received data.
Kojto 119:aae6fcc7d9bb 903 * Please refer to @ref USART_RxDataXGet() for reception of 9 bit frames.
Kojto 119:aae6fcc7d9bb 904 *
Kojto 119:aae6fcc7d9bb 905 * @note
Kojto 119:aae6fcc7d9bb 906 * Since this function does not check whether the RXDATA register actually
Kojto 119:aae6fcc7d9bb 907 * holds valid data, it should only be used in situations when it is certain
Kojto 119:aae6fcc7d9bb 908 * that there is valid data, ensured by some external program routine, e.g.
Kojto 119:aae6fcc7d9bb 909 * like when handling an RXDATAV interrupt. The @ref USART_Rx() is normally a
Kojto 119:aae6fcc7d9bb 910 * better choice if the validity of the RXDATA register is not certain.
Kojto 119:aae6fcc7d9bb 911 *
Kojto 119:aae6fcc7d9bb 912 * @note
Kojto 119:aae6fcc7d9bb 913 * Notice that possible parity/stop bits in asynchronous mode are not
Kojto 119:aae6fcc7d9bb 914 * considered part of specified frame bit length.
Kojto 119:aae6fcc7d9bb 915 *
Kojto 119:aae6fcc7d9bb 916 * @param[in] usart
Kojto 119:aae6fcc7d9bb 917 * Pointer to USART/UART peripheral register block.
Kojto 119:aae6fcc7d9bb 918 *
Kojto 119:aae6fcc7d9bb 919 * @return
Kojto 119:aae6fcc7d9bb 920 * Data received.
Kojto 119:aae6fcc7d9bb 921 ******************************************************************************/
Kojto 119:aae6fcc7d9bb 922 __STATIC_INLINE uint8_t USART_RxDataGet(USART_TypeDef *usart)
Kojto 119:aae6fcc7d9bb 923 {
Kojto 119:aae6fcc7d9bb 924 return (uint8_t)usart->RXDATA;
Kojto 119:aae6fcc7d9bb 925 }
Kojto 119:aae6fcc7d9bb 926
Kojto 119:aae6fcc7d9bb 927
Kojto 119:aae6fcc7d9bb 928 /***************************************************************************//**
Kojto 119:aae6fcc7d9bb 929 * @brief
Kojto 119:aae6fcc7d9bb 930 * Receive two 4-8 bit frames, or one 10-16 bit frame.
Kojto 119:aae6fcc7d9bb 931 *
Kojto 119:aae6fcc7d9bb 932 * @details
Kojto 119:aae6fcc7d9bb 933 * This function is used to quickly receive one 10-16 bits frame or two 4-8
Kojto 119:aae6fcc7d9bb 934 * bit frames by reading the RXDOUBLE register directly, without checking
Kojto 119:aae6fcc7d9bb 935 * the STATUS register for the RXDATAV flag. This can be useful from the
Kojto 119:aae6fcc7d9bb 936 * RXDATAV interrupt handler, i.e. waiting is superfluous, in order to
Kojto 119:aae6fcc7d9bb 937 * quickly read the received data.
Kojto 119:aae6fcc7d9bb 938 * This function is normally used to receive one frame when operating with
Kojto 119:aae6fcc7d9bb 939 * frame length 10-16 bits. Please refer to @ref USART_RxDoubleXGet()
Kojto 119:aae6fcc7d9bb 940 * for reception of two 9 bit frames.
Kojto 119:aae6fcc7d9bb 941 *
Kojto 119:aae6fcc7d9bb 942 * @note
Kojto 119:aae6fcc7d9bb 943 * Since this function does not check whether the RXDOUBLE register actually
Kojto 119:aae6fcc7d9bb 944 * holds valid data, it should only be used in situations when it is certain
Kojto 119:aae6fcc7d9bb 945 * that there is valid data, ensured by some external program routine, e.g.
Kojto 119:aae6fcc7d9bb 946 * like when handling an RXDATAV interrupt. The @ref USART_RxDouble() is
Kojto 119:aae6fcc7d9bb 947 * normally a better choice if the validity of the RXDOUBLE register is not
Kojto 119:aae6fcc7d9bb 948 * certain.
Kojto 119:aae6fcc7d9bb 949 *
Kojto 119:aae6fcc7d9bb 950 * @note
Kojto 119:aae6fcc7d9bb 951 * Notice that possible parity/stop bits in asynchronous mode are not
Kojto 119:aae6fcc7d9bb 952 * considered part of specified frame bit length.
Kojto 119:aae6fcc7d9bb 953 *
Kojto 119:aae6fcc7d9bb 954 * @param[in] usart
Kojto 119:aae6fcc7d9bb 955 * Pointer to USART/UART peripheral register block.
Kojto 119:aae6fcc7d9bb 956 *
Kojto 119:aae6fcc7d9bb 957 * @return
Kojto 119:aae6fcc7d9bb 958 * Data received.
Kojto 119:aae6fcc7d9bb 959 ******************************************************************************/
Kojto 119:aae6fcc7d9bb 960 __STATIC_INLINE uint16_t USART_RxDoubleGet(USART_TypeDef *usart)
Kojto 119:aae6fcc7d9bb 961 {
Kojto 119:aae6fcc7d9bb 962 return (uint16_t)usart->RXDOUBLE;
Kojto 119:aae6fcc7d9bb 963 }
Kojto 119:aae6fcc7d9bb 964
Kojto 119:aae6fcc7d9bb 965
Kojto 119:aae6fcc7d9bb 966 /***************************************************************************//**
Kojto 119:aae6fcc7d9bb 967 * @brief
Kojto 119:aae6fcc7d9bb 968 * Receive two 4-9 bit frames, or one 10-16 bit frame with extended
Kojto 119:aae6fcc7d9bb 969 * information.
Kojto 119:aae6fcc7d9bb 970 *
Kojto 119:aae6fcc7d9bb 971 * @details
Kojto 119:aae6fcc7d9bb 972 * This function is used to quickly receive one 10-16 bits frame or two 4-9
Kojto 119:aae6fcc7d9bb 973 * bit frames by reading the RXDOUBLEX register directly, without checking
Kojto 119:aae6fcc7d9bb 974 * the STATUS register for the RXDATAV flag. This can be useful from the
Kojto 119:aae6fcc7d9bb 975 * RXDATAV interrupt handler, i.e. waiting is superfluous, in order to
Kojto 119:aae6fcc7d9bb 976 * quickly read the received data.
Kojto 119:aae6fcc7d9bb 977 *
Kojto 119:aae6fcc7d9bb 978 * @note
Kojto 119:aae6fcc7d9bb 979 * Since this function does not check whether the RXDOUBLEX register actually
Kojto 119:aae6fcc7d9bb 980 * holds valid data, it should only be used in situations when it is certain
Kojto 119:aae6fcc7d9bb 981 * that there is valid data, ensured by some external program routine, e.g.
Kojto 119:aae6fcc7d9bb 982 * like when handling an RXDATAV interrupt. The @ref USART_RxDoubleExt() is
Kojto 119:aae6fcc7d9bb 983 * normally a better choice if the validity of the RXDOUBLEX register is not
Kojto 119:aae6fcc7d9bb 984 * certain.
Kojto 119:aae6fcc7d9bb 985 *
Kojto 119:aae6fcc7d9bb 986 * @note
Kojto 119:aae6fcc7d9bb 987 * Notice that possible parity/stop bits in asynchronous mode are not
Kojto 119:aae6fcc7d9bb 988 * considered part of specified frame bit length.
Kojto 119:aae6fcc7d9bb 989 *
Kojto 119:aae6fcc7d9bb 990 * @param[in] usart
Kojto 119:aae6fcc7d9bb 991 * Pointer to USART/UART peripheral register block.
Kojto 119:aae6fcc7d9bb 992 *
Kojto 119:aae6fcc7d9bb 993 * @return
Kojto 119:aae6fcc7d9bb 994 * Data received.
Kojto 119:aae6fcc7d9bb 995 ******************************************************************************/
Kojto 119:aae6fcc7d9bb 996 __STATIC_INLINE uint32_t USART_RxDoubleXGet(USART_TypeDef *usart)
Kojto 119:aae6fcc7d9bb 997 {
Kojto 119:aae6fcc7d9bb 998 return usart->RXDOUBLEX;
Kojto 119:aae6fcc7d9bb 999 }
Kojto 119:aae6fcc7d9bb 1000
Kojto 119:aae6fcc7d9bb 1001
Kojto 119:aae6fcc7d9bb 1002 /***************************************************************************//**
Kojto 119:aae6fcc7d9bb 1003 * @brief
Kojto 119:aae6fcc7d9bb 1004 * Receive one 4-9 bit frame, (or part of 10-16 bit frame) with extended
Kojto 119:aae6fcc7d9bb 1005 * information.
Kojto 119:aae6fcc7d9bb 1006 *
Kojto 119:aae6fcc7d9bb 1007 * @details
Kojto 119:aae6fcc7d9bb 1008 * This function is used to quickly receive one 4-9 bit frame, (or part of
Kojto 119:aae6fcc7d9bb 1009 * 10-16 bit frame) with extended information by reading the RXDATAX register
Kojto 119:aae6fcc7d9bb 1010 * directly, without checking the STATUS register for the RXDATAV flag. This
Kojto 119:aae6fcc7d9bb 1011 * can be useful from the RXDATAV interrupt handler, i.e. waiting is
Kojto 119:aae6fcc7d9bb 1012 * superfluous, in order to quickly read the received data.
Kojto 119:aae6fcc7d9bb 1013 *
Kojto 119:aae6fcc7d9bb 1014 * @note
Kojto 119:aae6fcc7d9bb 1015 * Since this function does not check whether the RXDATAX register actually
Kojto 119:aae6fcc7d9bb 1016 * holds valid data, it should only be used in situations when it is certain
Kojto 119:aae6fcc7d9bb 1017 * that there is valid data, ensured by some external program routine, e.g.
Kojto 119:aae6fcc7d9bb 1018 * like when handling an RXDATAV interrupt. The @ref USART_RxExt() is normally
Kojto 119:aae6fcc7d9bb 1019 * a better choice if the validity of the RXDATAX register is not certain.
Kojto 119:aae6fcc7d9bb 1020 *
Kojto 119:aae6fcc7d9bb 1021 * @note
Kojto 119:aae6fcc7d9bb 1022 * Notice that possible parity/stop bits in asynchronous mode are not
Kojto 119:aae6fcc7d9bb 1023 * considered part of specified frame bit length.
Kojto 119:aae6fcc7d9bb 1024 *
Kojto 119:aae6fcc7d9bb 1025 * @param[in] usart
Kojto 119:aae6fcc7d9bb 1026 * Pointer to USART/UART peripheral register block.
Kojto 119:aae6fcc7d9bb 1027 *
Kojto 119:aae6fcc7d9bb 1028 * @return
Kojto 119:aae6fcc7d9bb 1029 * Data received.
Kojto 119:aae6fcc7d9bb 1030 ******************************************************************************/
Kojto 119:aae6fcc7d9bb 1031 __STATIC_INLINE uint16_t USART_RxDataXGet(USART_TypeDef *usart)
Kojto 119:aae6fcc7d9bb 1032 {
Kojto 119:aae6fcc7d9bb 1033 return (uint16_t)usart->RXDATAX;
Kojto 119:aae6fcc7d9bb 1034 }
Kojto 119:aae6fcc7d9bb 1035
Kojto 119:aae6fcc7d9bb 1036 uint8_t USART_SpiTransfer(USART_TypeDef *usart, uint8_t data);
Kojto 119:aae6fcc7d9bb 1037 void USART_Tx(USART_TypeDef *usart, uint8_t data);
Kojto 119:aae6fcc7d9bb 1038 void USART_TxDouble(USART_TypeDef *usart, uint16_t data);
Kojto 119:aae6fcc7d9bb 1039 void USART_TxDoubleExt(USART_TypeDef *usart, uint32_t data);
Kojto 119:aae6fcc7d9bb 1040 void USART_TxExt(USART_TypeDef *usart, uint16_t data);
Kojto 119:aae6fcc7d9bb 1041
Kojto 119:aae6fcc7d9bb 1042
Kojto 119:aae6fcc7d9bb 1043 /** @} (end addtogroup USART) */
<> 128:9bcdf88f62b0 1044 /** @} (end addtogroup emlib) */
Kojto 119:aae6fcc7d9bb 1045
Kojto 119:aae6fcc7d9bb 1046 #ifdef __cplusplus
Kojto 119:aae6fcc7d9bb 1047 }
Kojto 119:aae6fcc7d9bb 1048 #endif
Kojto 119:aae6fcc7d9bb 1049
Kojto 119:aae6fcc7d9bb 1050 #endif /* defined(USART_COUNT) && (USART_COUNT > 0) */
<> 128:9bcdf88f62b0 1051 #endif /* EM_USART_H */