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Dependents:   hello SerialTestv11 SerialTestv12 Sierpinski ... more

TARGET_MTS_DRAGONFLY_F411RE/stm32f4xx_hal_sram.h@101:7cff1c4259d7, 2015-06-09 (annotated)

Committer:
Kojto
Date:
Tue Jun 09 14:29:26 2015 +0100
Revision:
101:7cff1c4259d7
Child:
106:ba1f97679dad
Release 101 of the mbed library



Changes:

- new platform: APPNEARME_MICRONFCBOARD, MTS_DRAGONFLY_F411RE, MAX32600MBED, WIZwiki_W7500

- Silabs memory optimization in gpio, pwm fixes

- SPI  - ssel documentation fixes and its use

Who changed what in which revision?

UserRevisionLine numberNew contents of line
Kojto 101:7cff1c4259d7 1 /**
Kojto 101:7cff1c4259d7 2 ******************************************************************************
Kojto 101:7cff1c4259d7 3 * @file stm32f4xx_hal_sram.h
Kojto 101:7cff1c4259d7 4 * @author MCD Application Team
Kojto 101:7cff1c4259d7 5 * @version V1.3.0
Kojto 101:7cff1c4259d7 6 * @date 09-March-2015
Kojto 101:7cff1c4259d7 7 * @brief Header file of SRAM HAL module.
Kojto 101:7cff1c4259d7 8 ******************************************************************************
Kojto 101:7cff1c4259d7 9 * @attention
Kojto 101:7cff1c4259d7 10 *
Kojto 101:7cff1c4259d7 11 * <h2><center>&copy; COPYRIGHT(c) 2015 STMicroelectronics</center></h2>
Kojto 101:7cff1c4259d7 12 *
Kojto 101:7cff1c4259d7 13 * Redistribution and use in source and binary forms, with or without modification,
Kojto 101:7cff1c4259d7 14 * are permitted provided that the following conditions are met:
Kojto 101:7cff1c4259d7 15 * 1. Redistributions of source code must retain the above copyright notice,
Kojto 101:7cff1c4259d7 16 * this list of conditions and the following disclaimer.
Kojto 101:7cff1c4259d7 17 * 2. Redistributions in binary form must reproduce the above copyright notice,
Kojto 101:7cff1c4259d7 18 * this list of conditions and the following disclaimer in the documentation
Kojto 101:7cff1c4259d7 19 * and/or other materials provided with the distribution.
Kojto 101:7cff1c4259d7 20 * 3. Neither the name of STMicroelectronics nor the names of its contributors
Kojto 101:7cff1c4259d7 21 * may be used to endorse or promote products derived from this software
Kojto 101:7cff1c4259d7 22 * without specific prior written permission.
Kojto 101:7cff1c4259d7 23 *
Kojto 101:7cff1c4259d7 24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
Kojto 101:7cff1c4259d7 25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
Kojto 101:7cff1c4259d7 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
Kojto 101:7cff1c4259d7 27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
Kojto 101:7cff1c4259d7 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
Kojto 101:7cff1c4259d7 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
Kojto 101:7cff1c4259d7 30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
Kojto 101:7cff1c4259d7 31 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
Kojto 101:7cff1c4259d7 32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
Kojto 101:7cff1c4259d7 33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
Kojto 101:7cff1c4259d7 34 *
Kojto 101:7cff1c4259d7 35 ******************************************************************************
Kojto 101:7cff1c4259d7 36 */
Kojto 101:7cff1c4259d7 37
Kojto 101:7cff1c4259d7 38 /* Define to prevent recursive inclusion -------------------------------------*/
Kojto 101:7cff1c4259d7 39 #ifndef __STM32F4xx_HAL_SRAM_H
Kojto 101:7cff1c4259d7 40 #define __STM32F4xx_HAL_SRAM_H
Kojto 101:7cff1c4259d7 41
Kojto 101:7cff1c4259d7 42 #ifdef __cplusplus
Kojto 101:7cff1c4259d7 43 extern "C" {
Kojto 101:7cff1c4259d7 44 #endif
Kojto 101:7cff1c4259d7 45
Kojto 101:7cff1c4259d7 46 /* Includes ------------------------------------------------------------------*/
Kojto 101:7cff1c4259d7 47 #if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx)|| defined(STM32F417xx)
Kojto 101:7cff1c4259d7 48 #include "stm32f4xx_ll_fsmc.h"
Kojto 101:7cff1c4259d7 49 #endif /* STM32F405xx || STM32F415xx || STM32F407xx || STM32F417xx */
Kojto 101:7cff1c4259d7 50
Kojto 101:7cff1c4259d7 51 #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx)|| defined(STM32F439xx) || defined(STM32F446xx)
Kojto 101:7cff1c4259d7 52 #include "stm32f4xx_ll_fmc.h"
Kojto 101:7cff1c4259d7 53 #endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F446xx */
Kojto 101:7cff1c4259d7 54
Kojto 101:7cff1c4259d7 55
Kojto 101:7cff1c4259d7 56 /** @addtogroup STM32F4xx_HAL_Driver
Kojto 101:7cff1c4259d7 57 * @{
Kojto 101:7cff1c4259d7 58 */
Kojto 101:7cff1c4259d7 59
Kojto 101:7cff1c4259d7 60 #if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx) || defined(STM32F417xx) ||\
Kojto 101:7cff1c4259d7 61 defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) ||\
Kojto 101:7cff1c4259d7 62 defined(STM32F446xx)
Kojto 101:7cff1c4259d7 63 /** @addtogroup SRAM
Kojto 101:7cff1c4259d7 64 * @{
Kojto 101:7cff1c4259d7 65 */
Kojto 101:7cff1c4259d7 66
Kojto 101:7cff1c4259d7 67 /* Exported typedef ----------------------------------------------------------*/
Kojto 101:7cff1c4259d7 68
Kojto 101:7cff1c4259d7 69 /** @defgroup SRAM_Exported_Types SRAM Exported Types
Kojto 101:7cff1c4259d7 70 * @{
Kojto 101:7cff1c4259d7 71 */
Kojto 101:7cff1c4259d7 72 /**
Kojto 101:7cff1c4259d7 73 * @brief HAL SRAM State structures definition
Kojto 101:7cff1c4259d7 74 */
Kojto 101:7cff1c4259d7 75 typedef enum
Kojto 101:7cff1c4259d7 76 {
Kojto 101:7cff1c4259d7 77 HAL_SRAM_STATE_RESET = 0x00, /*!< SRAM not yet initialized or disabled */
Kojto 101:7cff1c4259d7 78 HAL_SRAM_STATE_READY = 0x01, /*!< SRAM initialized and ready for use */
Kojto 101:7cff1c4259d7 79 HAL_SRAM_STATE_BUSY = 0x02, /*!< SRAM internal process is ongoing */
Kojto 101:7cff1c4259d7 80 HAL_SRAM_STATE_ERROR = 0x03, /*!< SRAM error state */
Kojto 101:7cff1c4259d7 81 HAL_SRAM_STATE_PROTECTED = 0x04 /*!< SRAM peripheral NORSRAM device write protected */
Kojto 101:7cff1c4259d7 82
Kojto 101:7cff1c4259d7 83 }HAL_SRAM_StateTypeDef;
Kojto 101:7cff1c4259d7 84
Kojto 101:7cff1c4259d7 85 /**
Kojto 101:7cff1c4259d7 86 * @brief SRAM handle Structure definition
Kojto 101:7cff1c4259d7 87 */
Kojto 101:7cff1c4259d7 88 typedef struct
Kojto 101:7cff1c4259d7 89 {
Kojto 101:7cff1c4259d7 90 FMC_NORSRAM_TypeDef *Instance; /*!< Register base address */
Kojto 101:7cff1c4259d7 91
Kojto 101:7cff1c4259d7 92 FMC_NORSRAM_EXTENDED_TypeDef *Extended; /*!< Extended mode register base address */
Kojto 101:7cff1c4259d7 93
Kojto 101:7cff1c4259d7 94 FMC_NORSRAM_InitTypeDef Init; /*!< SRAM device control configuration parameters */
Kojto 101:7cff1c4259d7 95
Kojto 101:7cff1c4259d7 96 HAL_LockTypeDef Lock; /*!< SRAM locking object */
Kojto 101:7cff1c4259d7 97
Kojto 101:7cff1c4259d7 98 __IO HAL_SRAM_StateTypeDef State; /*!< SRAM device access state */
Kojto 101:7cff1c4259d7 99
Kojto 101:7cff1c4259d7 100 DMA_HandleTypeDef *hdma; /*!< Pointer DMA handler */
Kojto 101:7cff1c4259d7 101
Kojto 101:7cff1c4259d7 102 }SRAM_HandleTypeDef;
Kojto 101:7cff1c4259d7 103
Kojto 101:7cff1c4259d7 104 /**
Kojto 101:7cff1c4259d7 105 * @}
Kojto 101:7cff1c4259d7 106 */
Kojto 101:7cff1c4259d7 107
Kojto 101:7cff1c4259d7 108 /* Exported constants --------------------------------------------------------*/
Kojto 101:7cff1c4259d7 109 /* Exported macro ------------------------------------------------------------*/
Kojto 101:7cff1c4259d7 110
Kojto 101:7cff1c4259d7 111 /** @defgroup SRAM_Exported_Macros SRAM Exported Macros
Kojto 101:7cff1c4259d7 112 * @{
Kojto 101:7cff1c4259d7 113 */
Kojto 101:7cff1c4259d7 114 /** @brief Reset SRAM handle state
Kojto 101:7cff1c4259d7 115 * @param __HANDLE__: SRAM handle
Kojto 101:7cff1c4259d7 116 * @retval None
Kojto 101:7cff1c4259d7 117 */
Kojto 101:7cff1c4259d7 118 #define __HAL_SRAM_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_SRAM_STATE_RESET)
Kojto 101:7cff1c4259d7 119
Kojto 101:7cff1c4259d7 120 /**
Kojto 101:7cff1c4259d7 121 * @}
Kojto 101:7cff1c4259d7 122 */
Kojto 101:7cff1c4259d7 123 /* Exported functions --------------------------------------------------------*/
Kojto 101:7cff1c4259d7 124
Kojto 101:7cff1c4259d7 125 /** @addtogroup SRAM_Exported_Functions
Kojto 101:7cff1c4259d7 126 * @{
Kojto 101:7cff1c4259d7 127 */
Kojto 101:7cff1c4259d7 128
Kojto 101:7cff1c4259d7 129 /** @addtogroup SRAM_Exported_Functions_Group1
Kojto 101:7cff1c4259d7 130 * @{
Kojto 101:7cff1c4259d7 131 */
Kojto 101:7cff1c4259d7 132 /* Initialization/de-initialization functions **********************************/
Kojto 101:7cff1c4259d7 133 HAL_StatusTypeDef HAL_SRAM_Init(SRAM_HandleTypeDef *hsram, FMC_NORSRAM_TimingTypeDef *Timing, FMC_NORSRAM_TimingTypeDef *ExtTiming);
Kojto 101:7cff1c4259d7 134 HAL_StatusTypeDef HAL_SRAM_DeInit(SRAM_HandleTypeDef *hsram);
Kojto 101:7cff1c4259d7 135 void HAL_SRAM_MspInit(SRAM_HandleTypeDef *hsram);
Kojto 101:7cff1c4259d7 136 void HAL_SRAM_MspDeInit(SRAM_HandleTypeDef *hsram);
Kojto 101:7cff1c4259d7 137
Kojto 101:7cff1c4259d7 138 void HAL_SRAM_DMA_XferCpltCallback(DMA_HandleTypeDef *hdma);
Kojto 101:7cff1c4259d7 139 void HAL_SRAM_DMA_XferErrorCallback(DMA_HandleTypeDef *hdma);
Kojto 101:7cff1c4259d7 140 /**
Kojto 101:7cff1c4259d7 141 * @}
Kojto 101:7cff1c4259d7 142 */
Kojto 101:7cff1c4259d7 143
Kojto 101:7cff1c4259d7 144 /** @addtogroup SRAM_Exported_Functions_Group2
Kojto 101:7cff1c4259d7 145 * @{
Kojto 101:7cff1c4259d7 146 */
Kojto 101:7cff1c4259d7 147 /* I/O operation functions *****************************************************/
Kojto 101:7cff1c4259d7 148 HAL_StatusTypeDef HAL_SRAM_Read_8b(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint8_t *pDstBuffer, uint32_t BufferSize);
Kojto 101:7cff1c4259d7 149 HAL_StatusTypeDef HAL_SRAM_Write_8b(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint8_t *pSrcBuffer, uint32_t BufferSize);
Kojto 101:7cff1c4259d7 150 HAL_StatusTypeDef HAL_SRAM_Read_16b(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint16_t *pDstBuffer, uint32_t BufferSize);
Kojto 101:7cff1c4259d7 151 HAL_StatusTypeDef HAL_SRAM_Write_16b(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint16_t *pSrcBuffer, uint32_t BufferSize);
Kojto 101:7cff1c4259d7 152 HAL_StatusTypeDef HAL_SRAM_Read_32b(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint32_t *pDstBuffer, uint32_t BufferSize);
Kojto 101:7cff1c4259d7 153 HAL_StatusTypeDef HAL_SRAM_Write_32b(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint32_t *pSrcBuffer, uint32_t BufferSize);
Kojto 101:7cff1c4259d7 154 HAL_StatusTypeDef HAL_SRAM_Read_DMA(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint32_t *pDstBuffer, uint32_t BufferSize);
Kojto 101:7cff1c4259d7 155 HAL_StatusTypeDef HAL_SRAM_Write_DMA(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint32_t *pSrcBuffer, uint32_t BufferSize);
Kojto 101:7cff1c4259d7 156 /**
Kojto 101:7cff1c4259d7 157 * @}
Kojto 101:7cff1c4259d7 158 */
Kojto 101:7cff1c4259d7 159
Kojto 101:7cff1c4259d7 160 /** @addtogroup SRAM_Exported_Functions_Group3
Kojto 101:7cff1c4259d7 161 * @{
Kojto 101:7cff1c4259d7 162 */
Kojto 101:7cff1c4259d7 163 /* SRAM Control functions ******************************************************/
Kojto 101:7cff1c4259d7 164 HAL_StatusTypeDef HAL_SRAM_WriteOperation_Enable(SRAM_HandleTypeDef *hsram);
Kojto 101:7cff1c4259d7 165 HAL_StatusTypeDef HAL_SRAM_WriteOperation_Disable(SRAM_HandleTypeDef *hsram);
Kojto 101:7cff1c4259d7 166 /**
Kojto 101:7cff1c4259d7 167 * @}
Kojto 101:7cff1c4259d7 168 */
Kojto 101:7cff1c4259d7 169
Kojto 101:7cff1c4259d7 170 /** @addtogroup SRAM_Exported_Functions_Group4
Kojto 101:7cff1c4259d7 171 * @{
Kojto 101:7cff1c4259d7 172 */
Kojto 101:7cff1c4259d7 173 /* SRAM State functions *********************************************************/
Kojto 101:7cff1c4259d7 174 HAL_SRAM_StateTypeDef HAL_SRAM_GetState(SRAM_HandleTypeDef *hsram);
Kojto 101:7cff1c4259d7 175 /**
Kojto 101:7cff1c4259d7 176 * @}
Kojto 101:7cff1c4259d7 177 */
Kojto 101:7cff1c4259d7 178
Kojto 101:7cff1c4259d7 179 /**
Kojto 101:7cff1c4259d7 180 * @}
Kojto 101:7cff1c4259d7 181 */
Kojto 101:7cff1c4259d7 182
Kojto 101:7cff1c4259d7 183 /* Private types -------------------------------------------------------------*/
Kojto 101:7cff1c4259d7 184 /* Private variables ---------------------------------------------------------*/
Kojto 101:7cff1c4259d7 185 /* Private constants ---------------------------------------------------------*/
Kojto 101:7cff1c4259d7 186 /* Private macros ------------------------------------------------------------*/
Kojto 101:7cff1c4259d7 187 /* Private functions ---------------------------------------------------------*/
Kojto 101:7cff1c4259d7 188 /**
Kojto 101:7cff1c4259d7 189 * @}
Kojto 101:7cff1c4259d7 190 */
Kojto 101:7cff1c4259d7 191
Kojto 101:7cff1c4259d7 192 #endif /* STM32F405xx || STM32F415xx || STM32F407xx || STM32F417xx || STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F446xx */
Kojto 101:7cff1c4259d7 193 /**
Kojto 101:7cff1c4259d7 194 * @}
Kojto 101:7cff1c4259d7 195 */
Kojto 101:7cff1c4259d7 196 #ifdef __cplusplus
Kojto 101:7cff1c4259d7 197 }
Kojto 101:7cff1c4259d7 198 #endif
Kojto 101:7cff1c4259d7 199
Kojto 101:7cff1c4259d7 200 #endif /* __STM32F4xx_HAL_SRAM_H */
Kojto 101:7cff1c4259d7 201
Kojto 101:7cff1c4259d7 202 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/