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TARGET_MAX32600MBED/spi_regs.h@101:7cff1c4259d7, 2015-06-09 (annotated)

Committer:
Kojto
Date:
Tue Jun 09 14:29:26 2015 +0100
Revision:
101:7cff1c4259d7
Child:
124:2241e3a39974
Release 101 of the mbed library



Changes:

- new platform: APPNEARME_MICRONFCBOARD, MTS_DRAGONFLY_F411RE, MAX32600MBED, WIZwiki_W7500

- Silabs memory optimization in gpio, pwm fixes

- SPI  - ssel documentation fixes and its use

Who changed what in which revision?

UserRevisionLine numberNew contents of line
Kojto 101:7cff1c4259d7 1 /*******************************************************************************
Kojto 101:7cff1c4259d7 2 * Copyright (C) 2015 Maxim Integrated Products, Inc., All Rights Reserved.
Kojto 101:7cff1c4259d7 3 *
Kojto 101:7cff1c4259d7 4 * Permission is hereby granted, free of charge, to any person obtaining a
Kojto 101:7cff1c4259d7 5 * copy of this software and associated documentation files (the "Software"),
Kojto 101:7cff1c4259d7 6 * to deal in the Software without restriction, including without limitation
Kojto 101:7cff1c4259d7 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
Kojto 101:7cff1c4259d7 8 * and/or sell copies of the Software, and to permit persons to whom the
Kojto 101:7cff1c4259d7 9 * Software is furnished to do so, subject to the following conditions:
Kojto 101:7cff1c4259d7 10 *
Kojto 101:7cff1c4259d7 11 * The above copyright notice and this permission notice shall be included
Kojto 101:7cff1c4259d7 12 * in all copies or substantial portions of the Software.
Kojto 101:7cff1c4259d7 13 *
Kojto 101:7cff1c4259d7 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
Kojto 101:7cff1c4259d7 15 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
Kojto 101:7cff1c4259d7 16 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
Kojto 101:7cff1c4259d7 17 * IN NO EVENT SHALL MAXIM INTEGRATED BE LIABLE FOR ANY CLAIM, DAMAGES
Kojto 101:7cff1c4259d7 18 * OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
Kojto 101:7cff1c4259d7 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
Kojto 101:7cff1c4259d7 20 * OTHER DEALINGS IN THE SOFTWARE.
Kojto 101:7cff1c4259d7 21 *
Kojto 101:7cff1c4259d7 22 * Except as contained in this notice, the name of Maxim Integrated
Kojto 101:7cff1c4259d7 23 * Products, Inc. shall not be used except as stated in the Maxim Integrated
Kojto 101:7cff1c4259d7 24 * Products, Inc. Branding Policy.
Kojto 101:7cff1c4259d7 25 *
Kojto 101:7cff1c4259d7 26 * The mere transfer of this software does not imply any licenses
Kojto 101:7cff1c4259d7 27 * of trade secrets, proprietary technology, copyrights, patents,
Kojto 101:7cff1c4259d7 28 * trademarks, maskwork rights, or any other form of intellectual
Kojto 101:7cff1c4259d7 29 * property whatsoever. Maxim Integrated Products, Inc. retains all
Kojto 101:7cff1c4259d7 30 * ownership rights.
Kojto 101:7cff1c4259d7 31 *******************************************************************************
Kojto 101:7cff1c4259d7 32 */
Kojto 101:7cff1c4259d7 33
Kojto 101:7cff1c4259d7 34 #ifndef _MXC_SPI_REGS_H
Kojto 101:7cff1c4259d7 35 #define _MXC_SPI_REGS_H
Kojto 101:7cff1c4259d7 36
Kojto 101:7cff1c4259d7 37 #ifdef __cplusplus
Kojto 101:7cff1c4259d7 38 extern "C" {
Kojto 101:7cff1c4259d7 39 #endif
Kojto 101:7cff1c4259d7 40
Kojto 101:7cff1c4259d7 41 #include <stdint.h>
Kojto 101:7cff1c4259d7 42
Kojto 101:7cff1c4259d7 43 /**
Kojto 101:7cff1c4259d7 44 * @file spi_regs.h
Kojto 101:7cff1c4259d7 45 * @addtogroup spi SPI
Kojto 101:7cff1c4259d7 46 * @{
Kojto 101:7cff1c4259d7 47 */
Kojto 101:7cff1c4259d7 48
Kojto 101:7cff1c4259d7 49 /* Offset Register Description
Kojto 101:7cff1c4259d7 50 ====== ============================================ */
Kojto 101:7cff1c4259d7 51 typedef struct {
Kojto 101:7cff1c4259d7 52 __IO uint32_t mstr_cfg; /* 0x0000 SPI Master Configuration Register */
Kojto 101:7cff1c4259d7 53 __IO uint32_t ss_sr_polarity; /* 0x0004 Polarity Control for SS and SR Signals */
Kojto 101:7cff1c4259d7 54 __IO uint32_t gen_ctrl; /* 0x0008 SPI Master General Control Register */
Kojto 101:7cff1c4259d7 55 __IO uint32_t fifo_ctrl; /* 0x000C SPI Master FIFO Control Register */
Kojto 101:7cff1c4259d7 56 __IO uint32_t spcl_ctrl; /* 0x0010 SPI Master Special Mode Controls */
Kojto 101:7cff1c4259d7 57 __IO uint32_t intfl; /* 0x0014 SPI Master Interrupt Flags */
Kojto 101:7cff1c4259d7 58 __IO uint32_t inten; /* 0x0018 SPI Master Interrupt Enable/Disable Settings */
Kojto 101:7cff1c4259d7 59 __I uint32_t rsv001C; /* 0x001C Deprecated - was SPI_AHB_RETRY */
Kojto 101:7cff1c4259d7 60 } mxc_spi_regs_t;
Kojto 101:7cff1c4259d7 61
Kojto 101:7cff1c4259d7 62 /**
Kojto 101:7cff1c4259d7 63 * @brief TX FIFO register. Can do 8, 16, or 32 bit access.
Kojto 101:7cff1c4259d7 64 */
Kojto 101:7cff1c4259d7 65 typedef struct {
Kojto 101:7cff1c4259d7 66 union {
Kojto 101:7cff1c4259d7 67 __O uint8_t txfifo_8;
Kojto 101:7cff1c4259d7 68 __O uint16_t txfifo_16;
Kojto 101:7cff1c4259d7 69 __O uint32_t txfifo_32;
Kojto 101:7cff1c4259d7 70 };
Kojto 101:7cff1c4259d7 71 } mxc_spi_txfifo_regs_t;
Kojto 101:7cff1c4259d7 72
Kojto 101:7cff1c4259d7 73 /**
Kojto 101:7cff1c4259d7 74 * @brief RX FIFO register. Can do 8, 16, or 32 bit access.
Kojto 101:7cff1c4259d7 75 */
Kojto 101:7cff1c4259d7 76 typedef struct {
Kojto 101:7cff1c4259d7 77 union {
Kojto 101:7cff1c4259d7 78 __I uint8_t rxfifo_8;
Kojto 101:7cff1c4259d7 79 __I uint16_t rxfifo_16;
Kojto 101:7cff1c4259d7 80 __I uint32_t rxfifo_32;
Kojto 101:7cff1c4259d7 81 };
Kojto 101:7cff1c4259d7 82 } mxc_spi_rxfifo_regs_t;
Kojto 101:7cff1c4259d7 83
Kojto 101:7cff1c4259d7 84 /*
Kojto 101:7cff1c4259d7 85 Register offsets for module SPI.
Kojto 101:7cff1c4259d7 86 */
Kojto 101:7cff1c4259d7 87 #define MXC_R_SPI_OFFS_MSTR_CFG ((uint32_t)0x00000000UL)
Kojto 101:7cff1c4259d7 88 #define MXC_R_SPI_OFFS_SS_SR_POLARITY ((uint32_t)0x00000004UL)
Kojto 101:7cff1c4259d7 89 #define MXC_R_SPI_OFFS_GEN_CTRL ((uint32_t)0x00000008UL)
Kojto 101:7cff1c4259d7 90 #define MXC_R_SPI_OFFS_FIFO_CTRL ((uint32_t)0x0000000CUL)
Kojto 101:7cff1c4259d7 91 #define MXC_R_SPI_OFFS_SPCL_CTRL ((uint32_t)0x00000010UL)
Kojto 101:7cff1c4259d7 92 #define MXC_R_SPI_OFFS_INTFL ((uint32_t)0x00000014UL)
Kojto 101:7cff1c4259d7 93 #define MXC_R_SPI_OFFS_INTEN ((uint32_t)0x00000018UL)
Kojto 101:7cff1c4259d7 94
Kojto 101:7cff1c4259d7 95 #define MXC_R_SPI_FIFO_OFFS_TRANS ((uint32_t)0x00000000UL)
Kojto 101:7cff1c4259d7 96 #define MXC_R_SPI_FIFO_OFFS_RSLTS ((uint32_t)0x00000800UL)
Kojto 101:7cff1c4259d7 97
Kojto 101:7cff1c4259d7 98 /*
Kojto 101:7cff1c4259d7 99 Field positions and masks for module SPI.
Kojto 101:7cff1c4259d7 100 */
Kojto 101:7cff1c4259d7 101 #define MXC_F_SPI_MSTR_CFG_SLAVE_SEL_POS 0
Kojto 101:7cff1c4259d7 102 #define MXC_F_SPI_MSTR_CFG_SLAVE_SEL ((uint32_t)(0x00000007UL << MXC_F_SPI_MSTR_CFG_SLAVE_SEL_POS))
Kojto 101:7cff1c4259d7 103 #define MXC_F_SPI_MSTR_CFG_THREE_WIRE_MODE_POS 3
Kojto 101:7cff1c4259d7 104 #define MXC_F_SPI_MSTR_CFG_THREE_WIRE_MODE ((uint32_t)(0x00000001UL << MXC_F_SPI_MSTR_CFG_THREE_WIRE_MODE_POS))
Kojto 101:7cff1c4259d7 105 #define MXC_F_SPI_MSTR_CFG_SPI_MODE_POS 4
Kojto 101:7cff1c4259d7 106 #define MXC_F_SPI_MSTR_CFG_SPI_MODE ((uint32_t)(0x00000003UL << MXC_F_SPI_MSTR_CFG_SPI_MODE_POS))
Kojto 101:7cff1c4259d7 107 #define MXC_F_SPI_MSTR_CFG_PAGE_SIZE_POS 6
Kojto 101:7cff1c4259d7 108 #define MXC_F_SPI_MSTR_CFG_PAGE_SIZE ((uint32_t)(0x00000003UL << MXC_F_SPI_MSTR_CFG_PAGE_SIZE_POS))
Kojto 101:7cff1c4259d7 109 #define MXC_F_SPI_MSTR_CFG_SCK_HI_CLK_POS 8
Kojto 101:7cff1c4259d7 110 #define MXC_F_SPI_MSTR_CFG_SCK_HI_CLK ((uint32_t)(0x0000000FUL << MXC_F_SPI_MSTR_CFG_SCK_HI_CLK_POS))
Kojto 101:7cff1c4259d7 111 #define MXC_F_SPI_MSTR_CFG_SCK_LO_CLK_POS 12
Kojto 101:7cff1c4259d7 112 #define MXC_F_SPI_MSTR_CFG_SCK_LO_CLK ((uint32_t)(0x0000000FUL << MXC_F_SPI_MSTR_CFG_SCK_LO_CLK_POS))
Kojto 101:7cff1c4259d7 113 #define MXC_F_SPI_MSTR_CFG_ACT_DELAY_POS 16
Kojto 101:7cff1c4259d7 114 #define MXC_F_SPI_MSTR_CFG_ACT_DELAY ((uint32_t)(0x00000003UL << MXC_F_SPI_MSTR_CFG_ACT_DELAY_POS))
Kojto 101:7cff1c4259d7 115 #define MXC_F_SPI_MSTR_CFG_INACT_DELAY_POS 18
Kojto 101:7cff1c4259d7 116 #define MXC_F_SPI_MSTR_CFG_INACT_DELAY ((uint32_t)(0x00000003UL << MXC_F_SPI_MSTR_CFG_INACT_DELAY_POS))
Kojto 101:7cff1c4259d7 117 #define MXC_F_SPI_MSTR_CFG_ALT_SCK_HI_CLK_POS 20
Kojto 101:7cff1c4259d7 118 #define MXC_F_SPI_MSTR_CFG_ALT_SCK_HI_CLK ((uint32_t)(0x0000000FUL << MXC_F_SPI_MSTR_CFG_ALT_SCK_HI_CLK_POS))
Kojto 101:7cff1c4259d7 119 #define MXC_F_SPI_MSTR_CFG_ALT_SCK_LO_CLK_POS 24
Kojto 101:7cff1c4259d7 120 #define MXC_F_SPI_MSTR_CFG_ALT_SCK_LO_CLK ((uint32_t)(0x0000000FUL << MXC_F_SPI_MSTR_CFG_ALT_SCK_LO_CLK_POS))
Kojto 101:7cff1c4259d7 121
Kojto 101:7cff1c4259d7 122 #define MXC_F_SPI_SS_SR_POLARITY_SS_POLARITY_POS 0
Kojto 101:7cff1c4259d7 123 #define MXC_F_SPI_SS_SR_POLARITY_SS_POLARITY ((uint32_t)(0x000000FFUL << MXC_F_SPI_SS_SR_POLARITY_SS_POLARITY_POS))
Kojto 101:7cff1c4259d7 124 #define MXC_F_SPI_SS_SR_POLARITY_FC_POLARITY_POS 8
Kojto 101:7cff1c4259d7 125 #define MXC_F_SPI_SS_SR_POLARITY_FC_POLARITY ((uint32_t)(0x000000FFUL << MXC_F_SPI_SS_SR_POLARITY_FC_POLARITY_POS))
Kojto 101:7cff1c4259d7 126
Kojto 101:7cff1c4259d7 127 #define MXC_F_SPI_GEN_CTRL_SPI_MSTR_EN_POS 0
Kojto 101:7cff1c4259d7 128 #define MXC_F_SPI_GEN_CTRL_SPI_MSTR_EN ((uint32_t)(0x00000001UL << MXC_F_SPI_GEN_CTRL_SPI_MSTR_EN_POS))
Kojto 101:7cff1c4259d7 129 #define MXC_F_SPI_GEN_CTRL_TX_FIFO_EN_POS 1
Kojto 101:7cff1c4259d7 130 #define MXC_F_SPI_GEN_CTRL_TX_FIFO_EN ((uint32_t)(0x00000001UL << MXC_F_SPI_GEN_CTRL_TX_FIFO_EN_POS))
Kojto 101:7cff1c4259d7 131 #define MXC_F_SPI_GEN_CTRL_RX_FIFO_EN_POS 2
Kojto 101:7cff1c4259d7 132 #define MXC_F_SPI_GEN_CTRL_RX_FIFO_EN ((uint32_t)(0x00000001UL << MXC_F_SPI_GEN_CTRL_RX_FIFO_EN_POS))
Kojto 101:7cff1c4259d7 133 #define MXC_F_SPI_GEN_CTRL_BIT_BANG_MODE_POS 3
Kojto 101:7cff1c4259d7 134 #define MXC_F_SPI_GEN_CTRL_BIT_BANG_MODE ((uint32_t)(0x00000001UL << MXC_F_SPI_GEN_CTRL_BIT_BANG_MODE_POS))
Kojto 101:7cff1c4259d7 135 #define MXC_F_SPI_GEN_CTRL_BB_SS_IN_OUT_POS 4
Kojto 101:7cff1c4259d7 136 #define MXC_F_SPI_GEN_CTRL_BB_SS_IN_OUT ((uint32_t)(0x00000001UL << MXC_F_SPI_GEN_CTRL_BB_SS_IN_OUT_POS))
Kojto 101:7cff1c4259d7 137 #define MXC_F_SPI_GEN_CTRL_BB_SR_IN_POS 5
Kojto 101:7cff1c4259d7 138 #define MXC_F_SPI_GEN_CTRL_BB_SR_IN ((uint32_t)(0x00000001UL << MXC_F_SPI_GEN_CTRL_BB_SR_IN_POS))
Kojto 101:7cff1c4259d7 139 #define MXC_F_SPI_GEN_CTRL_BB_SCK_IN_OUT_POS 6
Kojto 101:7cff1c4259d7 140 #define MXC_F_SPI_GEN_CTRL_BB_SCK_IN_OUT ((uint32_t)(0x00000001UL << MXC_F_SPI_GEN_CTRL_BB_SCK_IN_OUT_POS))
Kojto 101:7cff1c4259d7 141 #define MXC_F_SPI_GEN_CTRL_BB_SDIO_IN_POS 8
Kojto 101:7cff1c4259d7 142 #define MXC_F_SPI_GEN_CTRL_BB_SDIO_IN ((uint32_t)(0x0000000FUL << MXC_F_SPI_GEN_CTRL_BB_SDIO_IN_POS))
Kojto 101:7cff1c4259d7 143 #define MXC_F_SPI_GEN_CTRL_BB_SDIO_OUT_POS 12
Kojto 101:7cff1c4259d7 144 #define MXC_F_SPI_GEN_CTRL_BB_SDIO_OUT ((uint32_t)(0x0000000FUL << MXC_F_SPI_GEN_CTRL_BB_SDIO_OUT_POS))
Kojto 101:7cff1c4259d7 145 #define MXC_F_SPI_GEN_CTRL_BB_SDIO_DR_EN_POS 16
Kojto 101:7cff1c4259d7 146 #define MXC_F_SPI_GEN_CTRL_BB_SDIO_DR_EN ((uint32_t)(0x0000000FUL << MXC_F_SPI_GEN_CTRL_BB_SDIO_DR_EN_POS))
Kojto 101:7cff1c4259d7 147
Kojto 101:7cff1c4259d7 148 #define MXC_F_SPI_FIFO_CTRL_TX_FIFO_AE_LVL_POS 0
Kojto 101:7cff1c4259d7 149 #define MXC_F_SPI_FIFO_CTRL_TX_FIFO_AE_LVL ((uint32_t)(0x0000000FUL << MXC_F_SPI_FIFO_CTRL_TX_FIFO_AE_LVL_POS))
Kojto 101:7cff1c4259d7 150 #define MXC_F_SPI_FIFO_CTRL_TX_FIFO_USED_POS 8
Kojto 101:7cff1c4259d7 151 #define MXC_F_SPI_FIFO_CTRL_TX_FIFO_USED ((uint32_t)(0x0000001FUL << MXC_F_SPI_FIFO_CTRL_TX_FIFO_USED_POS))
Kojto 101:7cff1c4259d7 152 #define MXC_F_SPI_FIFO_CTRL_RX_FIFO_AF_LVL_POS 16
Kojto 101:7cff1c4259d7 153 #define MXC_F_SPI_FIFO_CTRL_RX_FIFO_AF_LVL ((uint32_t)(0x0000001FUL << MXC_F_SPI_FIFO_CTRL_RX_FIFO_AF_LVL_POS))
Kojto 101:7cff1c4259d7 154 #define MXC_F_SPI_FIFO_CTRL_RX_FIFO_USED_POS 24
Kojto 101:7cff1c4259d7 155 #define MXC_F_SPI_FIFO_CTRL_RX_FIFO_USED ((uint32_t)(0x0000003FUL << MXC_F_SPI_FIFO_CTRL_RX_FIFO_USED_POS))
Kojto 101:7cff1c4259d7 156
Kojto 101:7cff1c4259d7 157 #define MXC_F_SPI_SPCL_CTRL_SS_SAMPLE_MODE_POS 0
Kojto 101:7cff1c4259d7 158 #define MXC_F_SPI_SPCL_CTRL_SS_SAMPLE_MODE ((uint32_t)(0x00000001UL << MXC_F_SPI_SPCL_CTRL_SS_SAMPLE_MODE_POS))
Kojto 101:7cff1c4259d7 159 #define MXC_F_SPI_SPCL_CTRL_MISO_FC_EN_POS 1
Kojto 101:7cff1c4259d7 160 #define MXC_F_SPI_SPCL_CTRL_MISO_FC_EN ((uint32_t)(0x00000001UL << MXC_F_SPI_SPCL_CTRL_MISO_FC_EN_POS))
Kojto 101:7cff1c4259d7 161 #define MXC_F_SPI_SPCL_CTRL_SS_SA_SDIO_OUT_POS 4
Kojto 101:7cff1c4259d7 162 #define MXC_F_SPI_SPCL_CTRL_SS_SA_SDIO_OUT ((uint32_t)(0x0000000FUL << MXC_F_SPI_SPCL_CTRL_SS_SA_SDIO_OUT_POS))
Kojto 101:7cff1c4259d7 163 #define MXC_F_SPI_SPCL_CTRL_SS_SA_SDIO_DR_EN_POS 8
Kojto 101:7cff1c4259d7 164 #define MXC_F_SPI_SPCL_CTRL_SS_SA_SDIO_DR_EN ((uint32_t)(0x0000000FUL << MXC_F_SPI_SPCL_CTRL_SS_SA_SDIO_DR_EN_POS))
Kojto 101:7cff1c4259d7 165
Kojto 101:7cff1c4259d7 166 #define MXC_F_SPI_INTFL_TX_STALLED_POS 0
Kojto 101:7cff1c4259d7 167 #define MXC_F_SPI_INTFL_TX_STALLED ((uint32_t)(0x00000001UL << MXC_F_SPI_INTFL_TX_STALLED_POS))
Kojto 101:7cff1c4259d7 168 #define MXC_F_SPI_INTFL_RX_STALLED_POS 1
Kojto 101:7cff1c4259d7 169 #define MXC_F_SPI_INTFL_RX_STALLED ((uint32_t)(0x00000001UL << MXC_F_SPI_INTFL_RX_STALLED_POS))
Kojto 101:7cff1c4259d7 170 #define MXC_F_SPI_INTFL_TX_READY_POS 2
Kojto 101:7cff1c4259d7 171 #define MXC_F_SPI_INTFL_TX_READY ((uint32_t)(0x00000001UL << MXC_F_SPI_INTFL_TX_READY_POS))
Kojto 101:7cff1c4259d7 172 #define MXC_F_SPI_INTFL_RX_DONE_POS 3
Kojto 101:7cff1c4259d7 173 #define MXC_F_SPI_INTFL_RX_DONE ((uint32_t)(0x00000001UL << MXC_F_SPI_INTFL_RX_DONE_POS))
Kojto 101:7cff1c4259d7 174 #define MXC_F_SPI_INTFL_TX_FIFO_AE_POS 4
Kojto 101:7cff1c4259d7 175 #define MXC_F_SPI_INTFL_TX_FIFO_AE ((uint32_t)(0x00000001UL << MXC_F_SPI_INTFL_TX_FIFO_AE_POS))
Kojto 101:7cff1c4259d7 176 #define MXC_F_SPI_INTFL_RX_FIFO_AF_POS 5
Kojto 101:7cff1c4259d7 177 #define MXC_F_SPI_INTFL_RX_FIFO_AF ((uint32_t)(0x00000001UL << MXC_F_SPI_INTFL_RX_FIFO_AF_POS))
Kojto 101:7cff1c4259d7 178
Kojto 101:7cff1c4259d7 179 #define MXC_F_SPI_INTEN_TX_STALLED_POS 0
Kojto 101:7cff1c4259d7 180 #define MXC_F_SPI_INTEN_TX_STALLED ((uint32_t)(0x00000001UL << MXC_F_SPI_INTEN_TX_STALLED_POS))
Kojto 101:7cff1c4259d7 181 #define MXC_F_SPI_INTEN_RX_STALLED_POS 1
Kojto 101:7cff1c4259d7 182 #define MXC_F_SPI_INTEN_RX_STALLED ((uint32_t)(0x00000001UL << MXC_F_SPI_INTEN_RX_STALLED_POS))
Kojto 101:7cff1c4259d7 183 #define MXC_F_SPI_INTEN_TX_READY_POS 2
Kojto 101:7cff1c4259d7 184 #define MXC_F_SPI_INTEN_TX_READY ((uint32_t)(0x00000001UL << MXC_F_SPI_INTEN_TX_READY_POS))
Kojto 101:7cff1c4259d7 185 #define MXC_F_SPI_INTEN_RX_DONE_POS 3
Kojto 101:7cff1c4259d7 186 #define MXC_F_SPI_INTEN_RX_DONE ((uint32_t)(0x00000001UL << MXC_F_SPI_INTEN_RX_DONE_POS))
Kojto 101:7cff1c4259d7 187 #define MXC_F_SPI_INTEN_TX_FIFO_AE_POS 4
Kojto 101:7cff1c4259d7 188 #define MXC_F_SPI_INTEN_TX_FIFO_AE ((uint32_t)(0x00000001UL << MXC_F_SPI_INTEN_TX_FIFO_AE_POS))
Kojto 101:7cff1c4259d7 189 #define MXC_F_SPI_INTEN_RX_FIFO_AF_POS 5
Kojto 101:7cff1c4259d7 190 #define MXC_F_SPI_INTEN_RX_FIFO_AF ((uint32_t)(0x00000001UL << MXC_F_SPI_INTEN_RX_FIFO_AF_POS))
Kojto 101:7cff1c4259d7 191
Kojto 101:7cff1c4259d7 192 #define MXC_F_SPI_FIFO_DIR_POS 0
Kojto 101:7cff1c4259d7 193 #define MXC_F_SPI_FIFO_DIR ((uint32_t)(0x00000003UL << MXC_F_SPI_FIFO_DIR_POS))
Kojto 101:7cff1c4259d7 194 #define MXC_F_SPI_FIFO_UNIT_POS 2
Kojto 101:7cff1c4259d7 195 #define MXC_F_SPI_FIFO_UNIT ((uint32_t)(0x00000003UL << MXC_F_SPI_FIFO_UNIT_POS))
Kojto 101:7cff1c4259d7 196 #define MXC_F_SPI_FIFO_SIZE_POS 4
Kojto 101:7cff1c4259d7 197 #define MXC_F_SPI_FIFO_SIZE ((uint32_t)(0x0000000FUL << MXC_F_SPI_FIFO_SIZE_POS))
Kojto 101:7cff1c4259d7 198 #define MXC_F_SPI_FIFO_WIDTH_POS 9
Kojto 101:7cff1c4259d7 199 #define MXC_F_SPI_FIFO_WIDTH ((uint32_t)(0x00000001UL << MXC_F_SPI_FIFO_WIDTH_POS))
Kojto 101:7cff1c4259d7 200 #define MXC_F_SPI_FIFO_ALT_POS 11
Kojto 101:7cff1c4259d7 201 #define MXC_F_SPI_FIFO_ALT ((uint32_t)(0x00000001UL << MXC_F_SPI_FIFO_ALT_POS))
Kojto 101:7cff1c4259d7 202 #define MXC_F_SPI_FIFO_FLOW_POS 12
Kojto 101:7cff1c4259d7 203 #define MXC_F_SPI_FIFO_FLOW ((uint32_t)(0x00000001UL << MXC_F_SPI_FIFO_FLOW_POS))
Kojto 101:7cff1c4259d7 204 #define MXC_F_SPI_FIFO_DASS_POS 13
Kojto 101:7cff1c4259d7 205 #define MXC_F_SPI_FIFO_DASS ((uint32_t)(0x00000001UL << MXC_F_SPI_FIFO_DASS_POS))
Kojto 101:7cff1c4259d7 206
Kojto 101:7cff1c4259d7 207 #ifdef __cplusplus
Kojto 101:7cff1c4259d7 208 }
Kojto 101:7cff1c4259d7 209 #endif
Kojto 101:7cff1c4259d7 210
Kojto 101:7cff1c4259d7 211 /**
Kojto 101:7cff1c4259d7 212 * @}
Kojto 101:7cff1c4259d7 213 */
Kojto 101:7cff1c4259d7 214
Kojto 101:7cff1c4259d7 215 #endif /* _MXC_SPI_REGS_H */