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TARGET_NUCLEO_L433RC_P/TOOLCHAIN_IAR/stm32l433xx.icf@172:65be27845400, 2019-02-20 (annotated)

Committer:
AnnaBridge
Date:
Wed Feb 20 20:53:29 2019 +0000
Revision:
172:65be27845400
Parent:
171:3a7713b1edbc 
mbed library release version 165

Who changed what in which revision?

UserRevisionLine numberNew contents of line
Anna Bridge 160:5571c4ff569f 1 if (!isdefinedsymbol(MBED_APP_START)) { define symbol MBED_APP_START = 0x08000000; }
Anna Bridge 160:5571c4ff569f 2 if (!isdefinedsymbol(MBED_APP_SIZE)) { define symbol MBED_APP_SIZE = 0x40000; }
Anna Bridge 160:5571c4ff569f 3
Anna Bridge 160:5571c4ff569f 4 /* [ROM = 256kb = 0x40000] */
Anna Bridge 160:5571c4ff569f 5 define symbol __intvec_start__ = MBED_APP_START;
Anna Bridge 160:5571c4ff569f 6 define symbol __region_ROM_start__ = MBED_APP_START;
Anna Bridge 160:5571c4ff569f 7 define symbol __region_ROM_end__ = MBED_APP_START + MBED_APP_SIZE - 1;
Anna Bridge 160:5571c4ff569f 8
Anna Bridge 160:5571c4ff569f 9 /* [RAM = 48kb + 16kb = 0x10000] */
Anna Bridge 160:5571c4ff569f 10 /* Vector table dynamic copy: Total: 98 vectors = 392 bytes (0x188) to be reserved in RAM */
Anna Bridge 160:5571c4ff569f 11 define symbol __NVIC_start__ = 0x20000000;
AnnaBridge 171:3a7713b1edbc 12 define symbol __NVIC_end__ = 0x20000187; /* Aligned on 8 bytes (392 = 98 x 4) */
Anna Bridge 160:5571c4ff569f 13 define symbol __region_SRAM1_start__ = 0x20000188;
Anna Bridge 160:5571c4ff569f 14 define symbol __region_SRAM1_end__ = 0x2000FFFF;
Anna Bridge 160:5571c4ff569f 15
Anna Bridge 160:5571c4ff569f 16 /* Memory regions */
Anna Bridge 160:5571c4ff569f 17 define memory mem with size = 4G;
Anna Bridge 160:5571c4ff569f 18 define region ROM_region = mem:[from __region_ROM_start__ to __region_ROM_end__];
Anna Bridge 160:5571c4ff569f 19 define region SRAM1_region = mem:[from __region_SRAM1_start__ to __region_SRAM1_end__];
Anna Bridge 160:5571c4ff569f 20
Anna Bridge 160:5571c4ff569f 21 define symbol __size_cstack__ = 0x2000;
Anna Bridge 160:5571c4ff569f 22 define symbol __size_heap__ = 0x4000;
Anna Bridge 160:5571c4ff569f 23 define block CSTACK with alignment = 8, size = __size_cstack__ { };
Anna Bridge 160:5571c4ff569f 24 define block HEAP with alignment = 8, size = __size_heap__ { };
Anna Bridge 160:5571c4ff569f 25 define block STACKHEAP with fixed order { block HEAP, block CSTACK };
Anna Bridge 160:5571c4ff569f 26
Anna Bridge 160:5571c4ff569f 27 initialize by copy with packing = zeros { readwrite };
Anna Bridge 160:5571c4ff569f 28 do not initialize { section .noinit };
Anna Bridge 160:5571c4ff569f 29
Anna Bridge 160:5571c4ff569f 30 place at address mem:__intvec_start__ { readonly section .intvec };
Anna Bridge 160:5571c4ff569f 31
Anna Bridge 160:5571c4ff569f 32 place in ROM_region { readonly };
Anna Bridge 160:5571c4ff569f 33 place in SRAM1_region { readwrite, block STACKHEAP };