mbed official / mbed

Dependents:   hello SerialTestv11 SerialTestv12 Sierpinski ... more

Committer:
AnnaBridge
Date:
Wed Jun 21 17:31:38 2017 +0100
Revision:
145:64910690c574
Parent:
128:9bcdf88f62b0
Release 145 of the mbed library.

Who changed what in which revision?

UserRevisionLine numberNew contents of line
bogdanm 92:4fc01daae5a5 1 /**
bogdanm 92:4fc01daae5a5 2 ******************************************************************************
bogdanm 92:4fc01daae5a5 3 * @file stm32f4xx_hal_sd.h
bogdanm 92:4fc01daae5a5 4 * @author MCD Application Team
AnnaBridge 145:64910690c574 5 * @version V1.7.1
AnnaBridge 145:64910690c574 6 * @date 14-April-2017
bogdanm 92:4fc01daae5a5 7 * @brief Header file of SD HAL module.
bogdanm 92:4fc01daae5a5 8 ******************************************************************************
bogdanm 92:4fc01daae5a5 9 * @attention
bogdanm 92:4fc01daae5a5 10 *
AnnaBridge 145:64910690c574 11 * <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
bogdanm 92:4fc01daae5a5 12 *
bogdanm 92:4fc01daae5a5 13 * Redistribution and use in source and binary forms, with or without modification,
bogdanm 92:4fc01daae5a5 14 * are permitted provided that the following conditions are met:
bogdanm 92:4fc01daae5a5 15 * 1. Redistributions of source code must retain the above copyright notice,
bogdanm 92:4fc01daae5a5 16 * this list of conditions and the following disclaimer.
bogdanm 92:4fc01daae5a5 17 * 2. Redistributions in binary form must reproduce the above copyright notice,
bogdanm 92:4fc01daae5a5 18 * this list of conditions and the following disclaimer in the documentation
bogdanm 92:4fc01daae5a5 19 * and/or other materials provided with the distribution.
bogdanm 92:4fc01daae5a5 20 * 3. Neither the name of STMicroelectronics nor the names of its contributors
bogdanm 92:4fc01daae5a5 21 * may be used to endorse or promote products derived from this software
bogdanm 92:4fc01daae5a5 22 * without specific prior written permission.
bogdanm 92:4fc01daae5a5 23 *
bogdanm 92:4fc01daae5a5 24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
bogdanm 92:4fc01daae5a5 25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
bogdanm 92:4fc01daae5a5 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
bogdanm 92:4fc01daae5a5 27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
bogdanm 92:4fc01daae5a5 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
bogdanm 92:4fc01daae5a5 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
bogdanm 92:4fc01daae5a5 30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
bogdanm 92:4fc01daae5a5 31 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
bogdanm 92:4fc01daae5a5 32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
bogdanm 92:4fc01daae5a5 33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
bogdanm 92:4fc01daae5a5 34 *
bogdanm 92:4fc01daae5a5 35 ******************************************************************************
bogdanm 92:4fc01daae5a5 36 */
bogdanm 92:4fc01daae5a5 37
bogdanm 92:4fc01daae5a5 38 /* Define to prevent recursive inclusion -------------------------------------*/
bogdanm 92:4fc01daae5a5 39 #ifndef __STM32F4xx_HAL_SD_H
bogdanm 92:4fc01daae5a5 40 #define __STM32F4xx_HAL_SD_H
bogdanm 92:4fc01daae5a5 41
bogdanm 92:4fc01daae5a5 42 #ifdef __cplusplus
bogdanm 92:4fc01daae5a5 43 extern "C" {
bogdanm 92:4fc01daae5a5 44 #endif
AnnaBridge 145:64910690c574 45
Kojto 110:165afa46840b 46 #if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx) || defined(STM32F417xx) || \
Kojto 110:165afa46840b 47 defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) || \
Kojto 110:165afa46840b 48 defined(STM32F401xC) || defined(STM32F401xE) || defined(STM32F411xE) || defined(STM32F446xx) || \
Kojto 122:f9eeca106725 49 defined(STM32F469xx) || defined(STM32F479xx) || defined(STM32F412Zx) || defined(STM32F412Vx) || \
AnnaBridge 145:64910690c574 50 defined(STM32F412Rx) || defined(STM32F412Cx) || defined(STM32F413xx) || defined(STM32F423xx)
AnnaBridge 145:64910690c574 51
bogdanm 92:4fc01daae5a5 52 /* Includes ------------------------------------------------------------------*/
bogdanm 92:4fc01daae5a5 53 #include "stm32f4xx_ll_sdmmc.h"
bogdanm 92:4fc01daae5a5 54
bogdanm 92:4fc01daae5a5 55 /** @addtogroup STM32F4xx_HAL_Driver
bogdanm 92:4fc01daae5a5 56 * @{
bogdanm 92:4fc01daae5a5 57 */
bogdanm 92:4fc01daae5a5 58
Kojto 99:dbbf35b96557 59 /** @defgroup SD SD
Kojto 99:dbbf35b96557 60 * @brief SD HAL module driver
bogdanm 92:4fc01daae5a5 61 * @{
AnnaBridge 145:64910690c574 62 */
bogdanm 92:4fc01daae5a5 63
bogdanm 92:4fc01daae5a5 64 /* Exported types ------------------------------------------------------------*/
Kojto 99:dbbf35b96557 65 /** @defgroup SD_Exported_Types SD Exported Types
Kojto 99:dbbf35b96557 66 * @{
Kojto 99:dbbf35b96557 67 */
Kojto 99:dbbf35b96557 68
AnnaBridge 145:64910690c574 69 /** @defgroup SD_Exported_Types_Group1 SD State enumeration structure
AnnaBridge 145:64910690c574 70 * @{
AnnaBridge 145:64910690c574 71 */
AnnaBridge 145:64910690c574 72 typedef enum
AnnaBridge 145:64910690c574 73 {
AnnaBridge 145:64910690c574 74 HAL_SD_STATE_RESET = 0x00000000U, /*!< SD not yet initialized or disabled */
AnnaBridge 145:64910690c574 75 HAL_SD_STATE_READY = 0x00000001U, /*!< SD initialized and ready for use */
AnnaBridge 145:64910690c574 76 HAL_SD_STATE_TIMEOUT = 0x00000002U, /*!< SD Timeout state */
AnnaBridge 145:64910690c574 77 HAL_SD_STATE_BUSY = 0x00000003U, /*!< SD process ongoing */
AnnaBridge 145:64910690c574 78 HAL_SD_STATE_PROGRAMMING = 0x00000004U, /*!< SD Programming State */
AnnaBridge 145:64910690c574 79 HAL_SD_STATE_RECEIVING = 0x00000005U, /*!< SD Receinving State */
AnnaBridge 145:64910690c574 80 HAL_SD_STATE_TRANSFER = 0x00000006U, /*!< SD Transfert State */
AnnaBridge 145:64910690c574 81 HAL_SD_STATE_ERROR = 0x0000000FU /*!< SD is in error state */
AnnaBridge 145:64910690c574 82 }HAL_SD_StateTypeDef;
AnnaBridge 145:64910690c574 83 /**
AnnaBridge 145:64910690c574 84 * @}
AnnaBridge 145:64910690c574 85 */
AnnaBridge 145:64910690c574 86
AnnaBridge 145:64910690c574 87 /** @defgroup SD_Exported_Types_Group2 SD Card State enumeration structure
AnnaBridge 145:64910690c574 88 * @{
AnnaBridge 145:64910690c574 89 */
AnnaBridge 145:64910690c574 90 typedef enum
AnnaBridge 145:64910690c574 91 {
AnnaBridge 145:64910690c574 92 HAL_SD_CARD_READY = 0x00000001U, /*!< Card state is ready */
AnnaBridge 145:64910690c574 93 HAL_SD_CARD_IDENTIFICATION = 0x00000002U, /*!< Card is in identification state */
AnnaBridge 145:64910690c574 94 HAL_SD_CARD_STANDBY = 0x00000003U, /*!< Card is in standby state */
AnnaBridge 145:64910690c574 95 HAL_SD_CARD_TRANSFER = 0x00000004U, /*!< Card is in transfer state */
AnnaBridge 145:64910690c574 96 HAL_SD_CARD_SENDING = 0x00000005U, /*!< Card is sending an operation */
AnnaBridge 145:64910690c574 97 HAL_SD_CARD_RECEIVING = 0x00000006U, /*!< Card is receiving operation information */
AnnaBridge 145:64910690c574 98 HAL_SD_CARD_PROGRAMMING = 0x00000007U, /*!< Card is in programming state */
AnnaBridge 145:64910690c574 99 HAL_SD_CARD_DISCONNECTED = 0x00000008U, /*!< Card is disconnected */
AnnaBridge 145:64910690c574 100 HAL_SD_CARD_ERROR = 0x000000FFU /*!< Card response Error */
AnnaBridge 145:64910690c574 101 }HAL_SD_CardStateTypeDef;
AnnaBridge 145:64910690c574 102 /**
AnnaBridge 145:64910690c574 103 * @}
AnnaBridge 145:64910690c574 104 */
AnnaBridge 145:64910690c574 105
AnnaBridge 145:64910690c574 106 /** @defgroup SD_Exported_Types_Group3 SD Handle Structure definition
bogdanm 92:4fc01daae5a5 107 * @{
bogdanm 92:4fc01daae5a5 108 */
bogdanm 92:4fc01daae5a5 109 #define SD_InitTypeDef SDIO_InitTypeDef
bogdanm 92:4fc01daae5a5 110 #define SD_TypeDef SDIO_TypeDef
bogdanm 92:4fc01daae5a5 111
AnnaBridge 145:64910690c574 112 /**
AnnaBridge 145:64910690c574 113 * @brief SD Card Information Structure definition
AnnaBridge 145:64910690c574 114 */
AnnaBridge 145:64910690c574 115 typedef struct
AnnaBridge 145:64910690c574 116 {
AnnaBridge 145:64910690c574 117 uint32_t CardType; /*!< Specifies the card Type */
AnnaBridge 145:64910690c574 118
AnnaBridge 145:64910690c574 119 uint32_t CardVersion; /*!< Specifies the card version */
AnnaBridge 145:64910690c574 120
AnnaBridge 145:64910690c574 121 uint32_t Class; /*!< Specifies the class of the card class */
AnnaBridge 145:64910690c574 122
AnnaBridge 145:64910690c574 123 uint32_t RelCardAdd; /*!< Specifies the Relative Card Address */
AnnaBridge 145:64910690c574 124
AnnaBridge 145:64910690c574 125 uint32_t BlockNbr; /*!< Specifies the Card Capacity in blocks */
AnnaBridge 145:64910690c574 126
AnnaBridge 145:64910690c574 127 uint32_t BlockSize; /*!< Specifies one block size in bytes */
AnnaBridge 145:64910690c574 128
AnnaBridge 145:64910690c574 129 uint32_t LogBlockNbr; /*!< Specifies the Card logical Capacity in blocks */
AnnaBridge 145:64910690c574 130
AnnaBridge 145:64910690c574 131 uint32_t LogBlockSize; /*!< Specifies logical block size in bytes */
AnnaBridge 145:64910690c574 132
AnnaBridge 145:64910690c574 133 }HAL_SD_CardInfoTypeDef;
AnnaBridge 145:64910690c574 134
AnnaBridge 145:64910690c574 135 /**
AnnaBridge 145:64910690c574 136 * @brief SD handle Structure definition
AnnaBridge 145:64910690c574 137 */
bogdanm 92:4fc01daae5a5 138 typedef struct
bogdanm 92:4fc01daae5a5 139 {
AnnaBridge 145:64910690c574 140 SD_TypeDef *Instance; /*!< SD registers base address */
bogdanm 92:4fc01daae5a5 141
AnnaBridge 145:64910690c574 142 SD_InitTypeDef Init; /*!< SD required parameters */
bogdanm 92:4fc01daae5a5 143
AnnaBridge 145:64910690c574 144 HAL_LockTypeDef Lock; /*!< SD locking object */
bogdanm 92:4fc01daae5a5 145
AnnaBridge 145:64910690c574 146 uint32_t *pTxBuffPtr; /*!< Pointer to SD Tx transfer Buffer */
AnnaBridge 145:64910690c574 147
AnnaBridge 145:64910690c574 148 uint32_t TxXferSize; /*!< SD Tx Transfer size */
AnnaBridge 145:64910690c574 149
AnnaBridge 145:64910690c574 150 uint32_t *pRxBuffPtr; /*!< Pointer to SD Rx transfer Buffer */
AnnaBridge 145:64910690c574 151
AnnaBridge 145:64910690c574 152 uint32_t RxXferSize; /*!< SD Rx Transfer size */
bogdanm 92:4fc01daae5a5 153
AnnaBridge 145:64910690c574 154 __IO uint32_t Context; /*!< SD transfer context */
AnnaBridge 145:64910690c574 155
AnnaBridge 145:64910690c574 156 __IO HAL_SD_StateTypeDef State; /*!< SD card State */
bogdanm 92:4fc01daae5a5 157
AnnaBridge 145:64910690c574 158 __IO uint32_t ErrorCode; /*!< SD Card Error codes */
AnnaBridge 145:64910690c574 159
AnnaBridge 145:64910690c574 160 DMA_HandleTypeDef *hdmarx; /*!< SD Rx DMA handle parameters */
bogdanm 92:4fc01daae5a5 161
AnnaBridge 145:64910690c574 162 DMA_HandleTypeDef *hdmatx; /*!< SD Tx DMA handle parameters */
bogdanm 92:4fc01daae5a5 163
AnnaBridge 145:64910690c574 164 HAL_SD_CardInfoTypeDef SdCard; /*!< SD Card information */
bogdanm 92:4fc01daae5a5 165
AnnaBridge 145:64910690c574 166 uint32_t CSD[4]; /*!< SD card specific data table */
bogdanm 92:4fc01daae5a5 167
AnnaBridge 145:64910690c574 168 uint32_t CID[4]; /*!< SD card identification number table */
bogdanm 92:4fc01daae5a5 169
bogdanm 92:4fc01daae5a5 170 }SD_HandleTypeDef;
AnnaBridge 145:64910690c574 171
Kojto 99:dbbf35b96557 172 /**
Kojto 99:dbbf35b96557 173 * @}
Kojto 99:dbbf35b96557 174 */
bogdanm 92:4fc01daae5a5 175
AnnaBridge 145:64910690c574 176 /** @defgroup SD_Exported_Types_Group4 Card Specific Data: CSD Register
Kojto 99:dbbf35b96557 177 * @{
AnnaBridge 145:64910690c574 178 */
bogdanm 92:4fc01daae5a5 179 typedef struct
bogdanm 92:4fc01daae5a5 180 {
bogdanm 92:4fc01daae5a5 181 __IO uint8_t CSDStruct; /*!< CSD structure */
bogdanm 92:4fc01daae5a5 182 __IO uint8_t SysSpecVersion; /*!< System specification version */
bogdanm 92:4fc01daae5a5 183 __IO uint8_t Reserved1; /*!< Reserved */
bogdanm 92:4fc01daae5a5 184 __IO uint8_t TAAC; /*!< Data read access time 1 */
bogdanm 92:4fc01daae5a5 185 __IO uint8_t NSAC; /*!< Data read access time 2 in CLK cycles */
bogdanm 92:4fc01daae5a5 186 __IO uint8_t MaxBusClkFrec; /*!< Max. bus clock frequency */
bogdanm 92:4fc01daae5a5 187 __IO uint16_t CardComdClasses; /*!< Card command classes */
bogdanm 92:4fc01daae5a5 188 __IO uint8_t RdBlockLen; /*!< Max. read data block length */
bogdanm 92:4fc01daae5a5 189 __IO uint8_t PartBlockRead; /*!< Partial blocks for read allowed */
bogdanm 92:4fc01daae5a5 190 __IO uint8_t WrBlockMisalign; /*!< Write block misalignment */
bogdanm 92:4fc01daae5a5 191 __IO uint8_t RdBlockMisalign; /*!< Read block misalignment */
bogdanm 92:4fc01daae5a5 192 __IO uint8_t DSRImpl; /*!< DSR implemented */
bogdanm 92:4fc01daae5a5 193 __IO uint8_t Reserved2; /*!< Reserved */
bogdanm 92:4fc01daae5a5 194 __IO uint32_t DeviceSize; /*!< Device Size */
bogdanm 92:4fc01daae5a5 195 __IO uint8_t MaxRdCurrentVDDMin; /*!< Max. read current @ VDD min */
bogdanm 92:4fc01daae5a5 196 __IO uint8_t MaxRdCurrentVDDMax; /*!< Max. read current @ VDD max */
bogdanm 92:4fc01daae5a5 197 __IO uint8_t MaxWrCurrentVDDMin; /*!< Max. write current @ VDD min */
bogdanm 92:4fc01daae5a5 198 __IO uint8_t MaxWrCurrentVDDMax; /*!< Max. write current @ VDD max */
bogdanm 92:4fc01daae5a5 199 __IO uint8_t DeviceSizeMul; /*!< Device size multiplier */
bogdanm 92:4fc01daae5a5 200 __IO uint8_t EraseGrSize; /*!< Erase group size */
bogdanm 92:4fc01daae5a5 201 __IO uint8_t EraseGrMul; /*!< Erase group size multiplier */
bogdanm 92:4fc01daae5a5 202 __IO uint8_t WrProtectGrSize; /*!< Write protect group size */
bogdanm 92:4fc01daae5a5 203 __IO uint8_t WrProtectGrEnable; /*!< Write protect group enable */
bogdanm 92:4fc01daae5a5 204 __IO uint8_t ManDeflECC; /*!< Manufacturer default ECC */
bogdanm 92:4fc01daae5a5 205 __IO uint8_t WrSpeedFact; /*!< Write speed factor */
bogdanm 92:4fc01daae5a5 206 __IO uint8_t MaxWrBlockLen; /*!< Max. write data block length */
bogdanm 92:4fc01daae5a5 207 __IO uint8_t WriteBlockPaPartial; /*!< Partial blocks for write allowed */
bogdanm 92:4fc01daae5a5 208 __IO uint8_t Reserved3; /*!< Reserved */
bogdanm 92:4fc01daae5a5 209 __IO uint8_t ContentProtectAppli; /*!< Content protection application */
bogdanm 92:4fc01daae5a5 210 __IO uint8_t FileFormatGrouop; /*!< File format group */
bogdanm 92:4fc01daae5a5 211 __IO uint8_t CopyFlag; /*!< Copy flag (OTP) */
bogdanm 92:4fc01daae5a5 212 __IO uint8_t PermWrProtect; /*!< Permanent write protection */
bogdanm 92:4fc01daae5a5 213 __IO uint8_t TempWrProtect; /*!< Temporary write protection */
bogdanm 92:4fc01daae5a5 214 __IO uint8_t FileFormat; /*!< File format */
bogdanm 92:4fc01daae5a5 215 __IO uint8_t ECC; /*!< ECC code */
bogdanm 92:4fc01daae5a5 216 __IO uint8_t CSD_CRC; /*!< CSD CRC */
bogdanm 92:4fc01daae5a5 217 __IO uint8_t Reserved4; /*!< Always 1 */
AnnaBridge 145:64910690c574 218
AnnaBridge 145:64910690c574 219 }HAL_SD_CardCSDTypeDef;
Kojto 99:dbbf35b96557 220 /**
Kojto 99:dbbf35b96557 221 * @}
Kojto 99:dbbf35b96557 222 */
bogdanm 92:4fc01daae5a5 223
AnnaBridge 145:64910690c574 224 /** @defgroup SD_Exported_Types_Group5 Card Identification Data: CID Register
Kojto 99:dbbf35b96557 225 * @{
AnnaBridge 145:64910690c574 226 */
bogdanm 92:4fc01daae5a5 227 typedef struct
bogdanm 92:4fc01daae5a5 228 {
bogdanm 92:4fc01daae5a5 229 __IO uint8_t ManufacturerID; /*!< Manufacturer ID */
bogdanm 92:4fc01daae5a5 230 __IO uint16_t OEM_AppliID; /*!< OEM/Application ID */
bogdanm 92:4fc01daae5a5 231 __IO uint32_t ProdName1; /*!< Product Name part1 */
bogdanm 92:4fc01daae5a5 232 __IO uint8_t ProdName2; /*!< Product Name part2 */
bogdanm 92:4fc01daae5a5 233 __IO uint8_t ProdRev; /*!< Product Revision */
bogdanm 92:4fc01daae5a5 234 __IO uint32_t ProdSN; /*!< Product Serial Number */
bogdanm 92:4fc01daae5a5 235 __IO uint8_t Reserved1; /*!< Reserved1 */
bogdanm 92:4fc01daae5a5 236 __IO uint16_t ManufactDate; /*!< Manufacturing Date */
bogdanm 92:4fc01daae5a5 237 __IO uint8_t CID_CRC; /*!< CID CRC */
bogdanm 92:4fc01daae5a5 238 __IO uint8_t Reserved2; /*!< Always 1 */
bogdanm 92:4fc01daae5a5 239
AnnaBridge 145:64910690c574 240 }HAL_SD_CardCIDTypeDef;
Kojto 99:dbbf35b96557 241 /**
Kojto 99:dbbf35b96557 242 * @}
Kojto 99:dbbf35b96557 243 */
bogdanm 92:4fc01daae5a5 244
AnnaBridge 145:64910690c574 245 /** @defgroup SD_Exported_Types_Group6 SD Card Status returned by ACMD13
Kojto 99:dbbf35b96557 246 * @{
AnnaBridge 145:64910690c574 247 */
bogdanm 92:4fc01daae5a5 248 typedef struct
bogdanm 92:4fc01daae5a5 249 {
AnnaBridge 145:64910690c574 250 __IO uint8_t DataBusWidth; /*!< Shows the currently defined data bus width */
AnnaBridge 145:64910690c574 251 __IO uint8_t SecuredMode; /*!< Card is in secured mode of operation */
AnnaBridge 145:64910690c574 252 __IO uint16_t CardType; /*!< Carries information about card type */
AnnaBridge 145:64910690c574 253 __IO uint32_t ProtectedAreaSize; /*!< Carries information about the capacity of protected area */
AnnaBridge 145:64910690c574 254 __IO uint8_t SpeedClass; /*!< Carries information about the speed class of the card */
AnnaBridge 145:64910690c574 255 __IO uint8_t PerformanceMove; /*!< Carries information about the card's performance move */
AnnaBridge 145:64910690c574 256 __IO uint8_t AllocationUnitSize; /*!< Carries information about the card's allocation unit size */
AnnaBridge 145:64910690c574 257 __IO uint16_t EraseSize; /*!< Determines the number of AUs to be erased in one operation */
AnnaBridge 145:64910690c574 258 __IO uint8_t EraseTimeout; /*!< Determines the timeout for any number of AU erase */
AnnaBridge 145:64910690c574 259 __IO uint8_t EraseOffset; /*!< Carries information about the erase offset */
bogdanm 92:4fc01daae5a5 260
AnnaBridge 145:64910690c574 261 }HAL_SD_CardStatusTypeDef;
Kojto 99:dbbf35b96557 262 /**
Kojto 99:dbbf35b96557 263 * @}
Kojto 99:dbbf35b96557 264 */
bogdanm 92:4fc01daae5a5 265
Kojto 99:dbbf35b96557 266 /**
Kojto 99:dbbf35b96557 267 * @}
Kojto 99:dbbf35b96557 268 */
bogdanm 92:4fc01daae5a5 269
AnnaBridge 145:64910690c574 270 /* Exported constants --------------------------------------------------------*/
AnnaBridge 145:64910690c574 271 /** @defgroup SD_Exported_Constants Exported Constants
AnnaBridge 145:64910690c574 272 * @{
AnnaBridge 145:64910690c574 273 */
AnnaBridge 145:64910690c574 274
AnnaBridge 145:64910690c574 275 #define BLOCKSIZE 512U /*!< Block size is 512 bytes */
AnnaBridge 145:64910690c574 276
AnnaBridge 145:64910690c574 277 /** @defgroup SD_Exported_Constansts_Group1 SD Error status enumeration Structure definition
Kojto 99:dbbf35b96557 278 * @{
AnnaBridge 145:64910690c574 279 */
AnnaBridge 145:64910690c574 280 #define HAL_SD_ERROR_NONE SDMMC_ERROR_NONE /*!< No error */
AnnaBridge 145:64910690c574 281 #define HAL_SD_ERROR_CMD_CRC_FAIL SDMMC_ERROR_CMD_CRC_FAIL /*!< Command response received (but CRC check failed) */
AnnaBridge 145:64910690c574 282 #define HAL_SD_ERROR_DATA_CRC_FAIL SDMMC_ERROR_DATA_CRC_FAIL /*!< Data block sent/received (CRC check failed) */
AnnaBridge 145:64910690c574 283 #define HAL_SD_ERROR_CMD_RSP_TIMEOUT SDMMC_ERROR_CMD_RSP_TIMEOUT /*!< Command response timeout */
AnnaBridge 145:64910690c574 284 #define HAL_SD_ERROR_DATA_TIMEOUT SDMMC_ERROR_DATA_TIMEOUT /*!< Data timeout */
AnnaBridge 145:64910690c574 285 #define HAL_SD_ERROR_TX_UNDERRUN SDMMC_ERROR_TX_UNDERRUN /*!< Transmit FIFO underrun */
AnnaBridge 145:64910690c574 286 #define HAL_SD_ERROR_RX_OVERRUN SDMMC_ERROR_RX_OVERRUN /*!< Receive FIFO overrun */
AnnaBridge 145:64910690c574 287 #define HAL_SD_ERROR_ADDR_MISALIGNED SDMMC_ERROR_ADDR_MISALIGNED /*!< Misaligned address */
AnnaBridge 145:64910690c574 288 #define HAL_SD_ERROR_BLOCK_LEN_ERR SDMMC_ERROR_BLOCK_LEN_ERR /*!< Transferred block length is not allowed for the card or the
AnnaBridge 145:64910690c574 289 number of transferred bytes does not match the block length */
AnnaBridge 145:64910690c574 290 #define HAL_SD_ERROR_ERASE_SEQ_ERR SDMMC_ERROR_ERASE_SEQ_ERR /*!< An error in the sequence of erase command occurs */
AnnaBridge 145:64910690c574 291 #define HAL_SD_ERROR_BAD_ERASE_PARAM SDMMC_ERROR_BAD_ERASE_PARAM /*!< An invalid selection for erase groups */
AnnaBridge 145:64910690c574 292 #define HAL_SD_ERROR_WRITE_PROT_VIOLATION SDMMC_ERROR_WRITE_PROT_VIOLATION /*!< Attempt to program a write protect block */
AnnaBridge 145:64910690c574 293 #define HAL_SD_ERROR_LOCK_UNLOCK_FAILED SDMMC_ERROR_LOCK_UNLOCK_FAILED /*!< Sequence or password error has been detected in unlock
AnnaBridge 145:64910690c574 294 command or if there was an attempt to access a locked card */
AnnaBridge 145:64910690c574 295 #define HAL_SD_ERROR_COM_CRC_FAILED SDMMC_ERROR_COM_CRC_FAILED /*!< CRC check of the previous command failed */
AnnaBridge 145:64910690c574 296 #define HAL_SD_ERROR_ILLEGAL_CMD SDMMC_ERROR_ILLEGAL_CMD /*!< Command is not legal for the card state */
AnnaBridge 145:64910690c574 297 #define HAL_SD_ERROR_CARD_ECC_FAILED SDMMC_ERROR_CARD_ECC_FAILED /*!< Card internal ECC was applied but failed to correct the data */
AnnaBridge 145:64910690c574 298 #define HAL_SD_ERROR_CC_ERR SDMMC_ERROR_CC_ERR /*!< Internal card controller error */
AnnaBridge 145:64910690c574 299 #define HAL_SD_ERROR_GENERAL_UNKNOWN_ERR SDMMC_ERROR_GENERAL_UNKNOWN_ERR /*!< General or unknown error */
AnnaBridge 145:64910690c574 300 #define HAL_SD_ERROR_STREAM_READ_UNDERRUN SDMMC_ERROR_STREAM_READ_UNDERRUN /*!< The card could not sustain data reading in stream rmode */
AnnaBridge 145:64910690c574 301 #define HAL_SD_ERROR_STREAM_WRITE_OVERRUN SDMMC_ERROR_STREAM_WRITE_OVERRUN /*!< The card could not sustain data programming in stream mode */
AnnaBridge 145:64910690c574 302 #define HAL_SD_ERROR_CID_CSD_OVERWRITE SDMMC_ERROR_CID_CSD_OVERWRITE /*!< CID/CSD overwrite error */
AnnaBridge 145:64910690c574 303 #define HAL_SD_ERROR_WP_ERASE_SKIP SDMMC_ERROR_WP_ERASE_SKIP /*!< Only partial address space was erased */
AnnaBridge 145:64910690c574 304 #define HAL_SD_ERROR_CARD_ECC_DISABLED SDMMC_ERROR_CARD_ECC_DISABLED /*!< Command has been executed without using internal ECC */
AnnaBridge 145:64910690c574 305 #define HAL_SD_ERROR_ERASE_RESET SDMMC_ERROR_ERASE_RESET /*!< Erase sequence was cleared before executing because an out
AnnaBridge 145:64910690c574 306 of erase sequence command was received */
AnnaBridge 145:64910690c574 307 #define HAL_SD_ERROR_AKE_SEQ_ERR SDMMC_ERROR_AKE_SEQ_ERR /*!< Error in sequence of authentication */
AnnaBridge 145:64910690c574 308 #define HAL_SD_ERROR_INVALID_VOLTRANGE SDMMC_ERROR_INVALID_VOLTRANGE /*!< Error in case of invalid voltage range */
AnnaBridge 145:64910690c574 309 #define HAL_SD_ERROR_ADDR_OUT_OF_RANGE SDMMC_ERROR_ADDR_OUT_OF_RANGE /*!< Error when addressed block is out of range */
AnnaBridge 145:64910690c574 310 #define HAL_SD_ERROR_REQUEST_NOT_APPLICABLE SDMMC_ERROR_REQUEST_NOT_APPLICABLE /*!< Error when command request is not applicable */
AnnaBridge 145:64910690c574 311 #define HAL_SD_ERROR_PARAM SDMMC_ERROR_INVALID_PARAMETER /*!< the used parameter is not valid */
AnnaBridge 145:64910690c574 312 #define HAL_SD_ERROR_UNSUPPORTED_FEATURE SDMMC_ERROR_UNSUPPORTED_FEATURE /*!< Error when feature is not insupported */
AnnaBridge 145:64910690c574 313 #define HAL_SD_ERROR_BUSY SDMMC_ERROR_BUSY /*!< Error when transfer process is busy */
AnnaBridge 145:64910690c574 314 #define HAL_SD_ERROR_DMA SDMMC_ERROR_DMA /*!< Error while DMA transfer */
AnnaBridge 145:64910690c574 315 #define HAL_SD_ERROR_TIMEOUT SDMMC_ERROR_TIMEOUT /*!< Timeout error */
AnnaBridge 145:64910690c574 316
Kojto 99:dbbf35b96557 317 /**
Kojto 99:dbbf35b96557 318 * @}
Kojto 99:dbbf35b96557 319 */
AnnaBridge 145:64910690c574 320
AnnaBridge 145:64910690c574 321 /** @defgroup SD_Exported_Constansts_Group2 SD context enumeration
Kojto 99:dbbf35b96557 322 * @{
Kojto 99:dbbf35b96557 323 */
AnnaBridge 145:64910690c574 324 #define SD_CONTEXT_NONE 0x00000000U /*!< None */
AnnaBridge 145:64910690c574 325 #define SD_CONTEXT_READ_SINGLE_BLOCK 0x00000001U /*!< Read single block operation */
AnnaBridge 145:64910690c574 326 #define SD_CONTEXT_READ_MULTIPLE_BLOCK 0x00000002U /*!< Read multiple blocks operation */
AnnaBridge 145:64910690c574 327 #define SD_CONTEXT_WRITE_SINGLE_BLOCK 0x00000010U /*!< Write single block operation */
AnnaBridge 145:64910690c574 328 #define SD_CONTEXT_WRITE_MULTIPLE_BLOCK 0x00000020U /*!< Write multiple blocks operation */
AnnaBridge 145:64910690c574 329 #define SD_CONTEXT_IT 0x00000008U /*!< Process in Interrupt mode */
AnnaBridge 145:64910690c574 330 #define SD_CONTEXT_DMA 0x00000080U /*!< Process in DMA mode */
bogdanm 92:4fc01daae5a5 331
Kojto 99:dbbf35b96557 332 /**
Kojto 99:dbbf35b96557 333 * @}
Kojto 99:dbbf35b96557 334 */
bogdanm 92:4fc01daae5a5 335
AnnaBridge 145:64910690c574 336 /** @defgroup SD_Exported_Constansts_Group3 SD Supported Memory Cards
bogdanm 92:4fc01daae5a5 337 * @{
bogdanm 92:4fc01daae5a5 338 */
AnnaBridge 145:64910690c574 339 #define CARD_SDSC 0x00000000U
AnnaBridge 145:64910690c574 340 #define CARD_SDHC_SDXC 0x00000001U
AnnaBridge 145:64910690c574 341 #define CARD_SECURED 0x00000003U
AnnaBridge 145:64910690c574 342
AnnaBridge 145:64910690c574 343 /**
AnnaBridge 145:64910690c574 344 * @}
AnnaBridge 145:64910690c574 345 */
bogdanm 92:4fc01daae5a5 346
AnnaBridge 145:64910690c574 347 /** @defgroup SD_Exported_Constansts_Group4 SD Supported Version
AnnaBridge 145:64910690c574 348 * @{
bogdanm 92:4fc01daae5a5 349 */
AnnaBridge 145:64910690c574 350 #define CARD_V1_X 0x00000000U
AnnaBridge 145:64910690c574 351 #define CARD_V2_X 0x00000001U
AnnaBridge 145:64910690c574 352 /**
AnnaBridge 145:64910690c574 353 * @}
bogdanm 92:4fc01daae5a5 354 */
AnnaBridge 145:64910690c574 355
bogdanm 92:4fc01daae5a5 356 /**
bogdanm 92:4fc01daae5a5 357 * @}
bogdanm 92:4fc01daae5a5 358 */
bogdanm 92:4fc01daae5a5 359
bogdanm 92:4fc01daae5a5 360 /* Exported macro ------------------------------------------------------------*/
Kojto 99:dbbf35b96557 361 /** @defgroup SD_Exported_macros SD Exported Macros
AnnaBridge 145:64910690c574 362 * @brief macros to handle interrupts and specific clock configurations
AnnaBridge 145:64910690c574 363 * @{
AnnaBridge 145:64910690c574 364 */
bogdanm 92:4fc01daae5a5 365
bogdanm 92:4fc01daae5a5 366 /**
bogdanm 92:4fc01daae5a5 367 * @brief Enable the SD device.
bogdanm 92:4fc01daae5a5 368 * @retval None
bogdanm 92:4fc01daae5a5 369 */
AnnaBridge 145:64910690c574 370 #define __HAL_SD_ENABLE(__HANDLE__) __SDIO_ENABLE((__HANDLE__)->Instance)
bogdanm 92:4fc01daae5a5 371
bogdanm 92:4fc01daae5a5 372 /**
bogdanm 92:4fc01daae5a5 373 * @brief Disable the SD device.
bogdanm 92:4fc01daae5a5 374 * @retval None
bogdanm 92:4fc01daae5a5 375 */
AnnaBridge 145:64910690c574 376 #define __HAL_SD_DISABLE(__HANDLE__) __SDIO_DISABLE((__HANDLE__)->Instance)
bogdanm 92:4fc01daae5a5 377
bogdanm 92:4fc01daae5a5 378 /**
AnnaBridge 145:64910690c574 379 * @brief Enable the SDMMC DMA transfer.
bogdanm 92:4fc01daae5a5 380 * @retval None
bogdanm 92:4fc01daae5a5 381 */
AnnaBridge 145:64910690c574 382 #define __HAL_SD_DMA_ENABLE(__HANDLE__) __SDIO_DMA_ENABLE((__HANDLE__)->Instance)
bogdanm 92:4fc01daae5a5 383
bogdanm 92:4fc01daae5a5 384 /**
AnnaBridge 145:64910690c574 385 * @brief Disable the SDMMC DMA transfer.
bogdanm 92:4fc01daae5a5 386 * @retval None
bogdanm 92:4fc01daae5a5 387 */
AnnaBridge 145:64910690c574 388 #define __HAL_SD_DMA_DISABLE(__HANDLE__) __SDIO_DMA_DISABLE((__HANDLE__)->Instance)
bogdanm 92:4fc01daae5a5 389
bogdanm 92:4fc01daae5a5 390 /**
bogdanm 92:4fc01daae5a5 391 * @brief Enable the SD device interrupt.
bogdanm 92:4fc01daae5a5 392 * @param __HANDLE__: SD Handle
AnnaBridge 145:64910690c574 393 * @param __INTERRUPT__: specifies the SDMMC interrupt sources to be enabled.
bogdanm 92:4fc01daae5a5 394 * This parameter can be one or a combination of the following values:
bogdanm 92:4fc01daae5a5 395 * @arg SDIO_IT_CCRCFAIL: Command response received (CRC check failed) interrupt
bogdanm 92:4fc01daae5a5 396 * @arg SDIO_IT_DCRCFAIL: Data block sent/received (CRC check failed) interrupt
bogdanm 92:4fc01daae5a5 397 * @arg SDIO_IT_CTIMEOUT: Command response timeout interrupt
bogdanm 92:4fc01daae5a5 398 * @arg SDIO_IT_DTIMEOUT: Data timeout interrupt
bogdanm 92:4fc01daae5a5 399 * @arg SDIO_IT_TXUNDERR: Transmit FIFO underrun error interrupt
bogdanm 92:4fc01daae5a5 400 * @arg SDIO_IT_RXOVERR: Received FIFO overrun error interrupt
bogdanm 92:4fc01daae5a5 401 * @arg SDIO_IT_CMDREND: Command response received (CRC check passed) interrupt
bogdanm 92:4fc01daae5a5 402 * @arg SDIO_IT_CMDSENT: Command sent (no response required) interrupt
bogdanm 92:4fc01daae5a5 403 * @arg SDIO_IT_DATAEND: Data end (data counter, SDIDCOUNT, is zero) interrupt
bogdanm 92:4fc01daae5a5 404 * @arg SDIO_IT_DBCKEND: Data block sent/received (CRC check passed) interrupt
bogdanm 92:4fc01daae5a5 405 * @arg SDIO_IT_CMDACT: Command transfer in progress interrupt
bogdanm 92:4fc01daae5a5 406 * @arg SDIO_IT_TXACT: Data transmit in progress interrupt
bogdanm 92:4fc01daae5a5 407 * @arg SDIO_IT_RXACT: Data receive in progress interrupt
bogdanm 92:4fc01daae5a5 408 * @arg SDIO_IT_TXFIFOHE: Transmit FIFO Half Empty interrupt
bogdanm 92:4fc01daae5a5 409 * @arg SDIO_IT_RXFIFOHF: Receive FIFO Half Full interrupt
bogdanm 92:4fc01daae5a5 410 * @arg SDIO_IT_TXFIFOF: Transmit FIFO full interrupt
bogdanm 92:4fc01daae5a5 411 * @arg SDIO_IT_RXFIFOF: Receive FIFO full interrupt
bogdanm 92:4fc01daae5a5 412 * @arg SDIO_IT_TXFIFOE: Transmit FIFO empty interrupt
bogdanm 92:4fc01daae5a5 413 * @arg SDIO_IT_RXFIFOE: Receive FIFO empty interrupt
bogdanm 92:4fc01daae5a5 414 * @arg SDIO_IT_TXDAVL: Data available in transmit FIFO interrupt
bogdanm 92:4fc01daae5a5 415 * @arg SDIO_IT_RXDAVL: Data available in receive FIFO interrupt
bogdanm 92:4fc01daae5a5 416 * @arg SDIO_IT_SDIOIT: SD I/O interrupt received interrupt
bogdanm 92:4fc01daae5a5 417 * @retval None
bogdanm 92:4fc01daae5a5 418 */
AnnaBridge 145:64910690c574 419 #define __HAL_SD_ENABLE_IT(__HANDLE__, __INTERRUPT__) __SDIO_ENABLE_IT((__HANDLE__)->Instance, (__INTERRUPT__))
bogdanm 92:4fc01daae5a5 420
bogdanm 92:4fc01daae5a5 421 /**
bogdanm 92:4fc01daae5a5 422 * @brief Disable the SD device interrupt.
bogdanm 92:4fc01daae5a5 423 * @param __HANDLE__: SD Handle
AnnaBridge 145:64910690c574 424 * @param __INTERRUPT__: specifies the SDMMC interrupt sources to be disabled.
bogdanm 92:4fc01daae5a5 425 * This parameter can be one or a combination of the following values:
bogdanm 92:4fc01daae5a5 426 * @arg SDIO_IT_CCRCFAIL: Command response received (CRC check failed) interrupt
bogdanm 92:4fc01daae5a5 427 * @arg SDIO_IT_DCRCFAIL: Data block sent/received (CRC check failed) interrupt
bogdanm 92:4fc01daae5a5 428 * @arg SDIO_IT_CTIMEOUT: Command response timeout interrupt
bogdanm 92:4fc01daae5a5 429 * @arg SDIO_IT_DTIMEOUT: Data timeout interrupt
bogdanm 92:4fc01daae5a5 430 * @arg SDIO_IT_TXUNDERR: Transmit FIFO underrun error interrupt
bogdanm 92:4fc01daae5a5 431 * @arg SDIO_IT_RXOVERR: Received FIFO overrun error interrupt
bogdanm 92:4fc01daae5a5 432 * @arg SDIO_IT_CMDREND: Command response received (CRC check passed) interrupt
bogdanm 92:4fc01daae5a5 433 * @arg SDIO_IT_CMDSENT: Command sent (no response required) interrupt
bogdanm 92:4fc01daae5a5 434 * @arg SDIO_IT_DATAEND: Data end (data counter, SDIDCOUNT, is zero) interrupt
bogdanm 92:4fc01daae5a5 435 * @arg SDIO_IT_DBCKEND: Data block sent/received (CRC check passed) interrupt
bogdanm 92:4fc01daae5a5 436 * @arg SDIO_IT_CMDACT: Command transfer in progress interrupt
bogdanm 92:4fc01daae5a5 437 * @arg SDIO_IT_TXACT: Data transmit in progress interrupt
bogdanm 92:4fc01daae5a5 438 * @arg SDIO_IT_RXACT: Data receive in progress interrupt
bogdanm 92:4fc01daae5a5 439 * @arg SDIO_IT_TXFIFOHE: Transmit FIFO Half Empty interrupt
bogdanm 92:4fc01daae5a5 440 * @arg SDIO_IT_RXFIFOHF: Receive FIFO Half Full interrupt
bogdanm 92:4fc01daae5a5 441 * @arg SDIO_IT_TXFIFOF: Transmit FIFO full interrupt
bogdanm 92:4fc01daae5a5 442 * @arg SDIO_IT_RXFIFOF: Receive FIFO full interrupt
bogdanm 92:4fc01daae5a5 443 * @arg SDIO_IT_TXFIFOE: Transmit FIFO empty interrupt
bogdanm 92:4fc01daae5a5 444 * @arg SDIO_IT_RXFIFOE: Receive FIFO empty interrupt
bogdanm 92:4fc01daae5a5 445 * @arg SDIO_IT_TXDAVL: Data available in transmit FIFO interrupt
bogdanm 92:4fc01daae5a5 446 * @arg SDIO_IT_RXDAVL: Data available in receive FIFO interrupt
AnnaBridge 145:64910690c574 447 * @arg SDIO_IT_SDIOIT: SD I/O interrupt received interrupt
bogdanm 92:4fc01daae5a5 448 * @retval None
bogdanm 92:4fc01daae5a5 449 */
AnnaBridge 145:64910690c574 450 #define __HAL_SD_DISABLE_IT(__HANDLE__, __INTERRUPT__) __SDIO_DISABLE_IT((__HANDLE__)->Instance, (__INTERRUPT__))
bogdanm 92:4fc01daae5a5 451
bogdanm 92:4fc01daae5a5 452 /**
bogdanm 92:4fc01daae5a5 453 * @brief Check whether the specified SD flag is set or not.
bogdanm 92:4fc01daae5a5 454 * @param __HANDLE__: SD Handle
bogdanm 92:4fc01daae5a5 455 * @param __FLAG__: specifies the flag to check.
bogdanm 92:4fc01daae5a5 456 * This parameter can be one of the following values:
bogdanm 92:4fc01daae5a5 457 * @arg SDIO_FLAG_CCRCFAIL: Command response received (CRC check failed)
bogdanm 92:4fc01daae5a5 458 * @arg SDIO_FLAG_DCRCFAIL: Data block sent/received (CRC check failed)
bogdanm 92:4fc01daae5a5 459 * @arg SDIO_FLAG_CTIMEOUT: Command response timeout
bogdanm 92:4fc01daae5a5 460 * @arg SDIO_FLAG_DTIMEOUT: Data timeout
bogdanm 92:4fc01daae5a5 461 * @arg SDIO_FLAG_TXUNDERR: Transmit FIFO underrun error
bogdanm 92:4fc01daae5a5 462 * @arg SDIO_FLAG_RXOVERR: Received FIFO overrun error
bogdanm 92:4fc01daae5a5 463 * @arg SDIO_FLAG_CMDREND: Command response received (CRC check passed)
bogdanm 92:4fc01daae5a5 464 * @arg SDIO_FLAG_CMDSENT: Command sent (no response required)
bogdanm 92:4fc01daae5a5 465 * @arg SDIO_FLAG_DATAEND: Data end (data counter, SDIDCOUNT, is zero)
bogdanm 92:4fc01daae5a5 466 * @arg SDIO_FLAG_DBCKEND: Data block sent/received (CRC check passed)
bogdanm 92:4fc01daae5a5 467 * @arg SDIO_FLAG_CMDACT: Command transfer in progress
bogdanm 92:4fc01daae5a5 468 * @arg SDIO_FLAG_TXACT: Data transmit in progress
bogdanm 92:4fc01daae5a5 469 * @arg SDIO_FLAG_RXACT: Data receive in progress
bogdanm 92:4fc01daae5a5 470 * @arg SDIO_FLAG_TXFIFOHE: Transmit FIFO Half Empty
bogdanm 92:4fc01daae5a5 471 * @arg SDIO_FLAG_RXFIFOHF: Receive FIFO Half Full
bogdanm 92:4fc01daae5a5 472 * @arg SDIO_FLAG_TXFIFOF: Transmit FIFO full
bogdanm 92:4fc01daae5a5 473 * @arg SDIO_FLAG_RXFIFOF: Receive FIFO full
bogdanm 92:4fc01daae5a5 474 * @arg SDIO_FLAG_TXFIFOE: Transmit FIFO empty
bogdanm 92:4fc01daae5a5 475 * @arg SDIO_FLAG_RXFIFOE: Receive FIFO empty
bogdanm 92:4fc01daae5a5 476 * @arg SDIO_FLAG_TXDAVL: Data available in transmit FIFO
bogdanm 92:4fc01daae5a5 477 * @arg SDIO_FLAG_RXDAVL: Data available in receive FIFO
bogdanm 92:4fc01daae5a5 478 * @arg SDIO_FLAG_SDIOIT: SD I/O interrupt received
bogdanm 92:4fc01daae5a5 479 * @retval The new state of SD FLAG (SET or RESET).
bogdanm 92:4fc01daae5a5 480 */
AnnaBridge 145:64910690c574 481 #define __HAL_SD_GET_FLAG(__HANDLE__, __FLAG__) __SDIO_GET_FLAG((__HANDLE__)->Instance, (__FLAG__))
bogdanm 92:4fc01daae5a5 482
bogdanm 92:4fc01daae5a5 483 /**
bogdanm 92:4fc01daae5a5 484 * @brief Clear the SD's pending flags.
bogdanm 92:4fc01daae5a5 485 * @param __HANDLE__: SD Handle
bogdanm 92:4fc01daae5a5 486 * @param __FLAG__: specifies the flag to clear.
bogdanm 92:4fc01daae5a5 487 * This parameter can be one or a combination of the following values:
bogdanm 92:4fc01daae5a5 488 * @arg SDIO_FLAG_CCRCFAIL: Command response received (CRC check failed)
bogdanm 92:4fc01daae5a5 489 * @arg SDIO_FLAG_DCRCFAIL: Data block sent/received (CRC check failed)
bogdanm 92:4fc01daae5a5 490 * @arg SDIO_FLAG_CTIMEOUT: Command response timeout
bogdanm 92:4fc01daae5a5 491 * @arg SDIO_FLAG_DTIMEOUT: Data timeout
bogdanm 92:4fc01daae5a5 492 * @arg SDIO_FLAG_TXUNDERR: Transmit FIFO underrun error
bogdanm 92:4fc01daae5a5 493 * @arg SDIO_FLAG_RXOVERR: Received FIFO overrun error
bogdanm 92:4fc01daae5a5 494 * @arg SDIO_FLAG_CMDREND: Command response received (CRC check passed)
bogdanm 92:4fc01daae5a5 495 * @arg SDIO_FLAG_CMDSENT: Command sent (no response required)
bogdanm 92:4fc01daae5a5 496 * @arg SDIO_FLAG_DATAEND: Data end (data counter, SDIDCOUNT, is zero)
bogdanm 92:4fc01daae5a5 497 * @arg SDIO_FLAG_DBCKEND: Data block sent/received (CRC check passed)
bogdanm 92:4fc01daae5a5 498 * @arg SDIO_FLAG_SDIOIT: SD I/O interrupt received
bogdanm 92:4fc01daae5a5 499 * @retval None
bogdanm 92:4fc01daae5a5 500 */
AnnaBridge 145:64910690c574 501 #define __HAL_SD_CLEAR_FLAG(__HANDLE__, __FLAG__) __SDIO_CLEAR_FLAG((__HANDLE__)->Instance, (__FLAG__))
bogdanm 92:4fc01daae5a5 502
bogdanm 92:4fc01daae5a5 503 /**
bogdanm 92:4fc01daae5a5 504 * @brief Check whether the specified SD interrupt has occurred or not.
bogdanm 92:4fc01daae5a5 505 * @param __HANDLE__: SD Handle
AnnaBridge 145:64910690c574 506 * @param __INTERRUPT__: specifies the SDMMC interrupt source to check.
bogdanm 92:4fc01daae5a5 507 * This parameter can be one of the following values:
bogdanm 92:4fc01daae5a5 508 * @arg SDIO_IT_CCRCFAIL: Command response received (CRC check failed) interrupt
bogdanm 92:4fc01daae5a5 509 * @arg SDIO_IT_DCRCFAIL: Data block sent/received (CRC check failed) interrupt
bogdanm 92:4fc01daae5a5 510 * @arg SDIO_IT_CTIMEOUT: Command response timeout interrupt
bogdanm 92:4fc01daae5a5 511 * @arg SDIO_IT_DTIMEOUT: Data timeout interrupt
bogdanm 92:4fc01daae5a5 512 * @arg SDIO_IT_TXUNDERR: Transmit FIFO underrun error interrupt
bogdanm 92:4fc01daae5a5 513 * @arg SDIO_IT_RXOVERR: Received FIFO overrun error interrupt
bogdanm 92:4fc01daae5a5 514 * @arg SDIO_IT_CMDREND: Command response received (CRC check passed) interrupt
bogdanm 92:4fc01daae5a5 515 * @arg SDIO_IT_CMDSENT: Command sent (no response required) interrupt
bogdanm 92:4fc01daae5a5 516 * @arg SDIO_IT_DATAEND: Data end (data counter, SDIDCOUNT, is zero) interrupt
bogdanm 92:4fc01daae5a5 517 * @arg SDIO_IT_DBCKEND: Data block sent/received (CRC check passed) interrupt
bogdanm 92:4fc01daae5a5 518 * @arg SDIO_IT_CMDACT: Command transfer in progress interrupt
bogdanm 92:4fc01daae5a5 519 * @arg SDIO_IT_TXACT: Data transmit in progress interrupt
bogdanm 92:4fc01daae5a5 520 * @arg SDIO_IT_RXACT: Data receive in progress interrupt
bogdanm 92:4fc01daae5a5 521 * @arg SDIO_IT_TXFIFOHE: Transmit FIFO Half Empty interrupt
bogdanm 92:4fc01daae5a5 522 * @arg SDIO_IT_RXFIFOHF: Receive FIFO Half Full interrupt
bogdanm 92:4fc01daae5a5 523 * @arg SDIO_IT_TXFIFOF: Transmit FIFO full interrupt
bogdanm 92:4fc01daae5a5 524 * @arg SDIO_IT_RXFIFOF: Receive FIFO full interrupt
bogdanm 92:4fc01daae5a5 525 * @arg SDIO_IT_TXFIFOE: Transmit FIFO empty interrupt
bogdanm 92:4fc01daae5a5 526 * @arg SDIO_IT_RXFIFOE: Receive FIFO empty interrupt
bogdanm 92:4fc01daae5a5 527 * @arg SDIO_IT_TXDAVL: Data available in transmit FIFO interrupt
bogdanm 92:4fc01daae5a5 528 * @arg SDIO_IT_RXDAVL: Data available in receive FIFO interrupt
bogdanm 92:4fc01daae5a5 529 * @arg SDIO_IT_SDIOIT: SD I/O interrupt received interrupt
bogdanm 92:4fc01daae5a5 530 * @retval The new state of SD IT (SET or RESET).
bogdanm 92:4fc01daae5a5 531 */
AnnaBridge 145:64910690c574 532 #define __HAL_SD_GET_IT(__HANDLE__, __INTERRUPT__) __SDIO_GET_IT((__HANDLE__)->Instance, (__INTERRUPT__))
bogdanm 92:4fc01daae5a5 533
bogdanm 92:4fc01daae5a5 534 /**
bogdanm 92:4fc01daae5a5 535 * @brief Clear the SD's interrupt pending bits.
Kojto 122:f9eeca106725 536 * @param __HANDLE__: SD Handle
bogdanm 92:4fc01daae5a5 537 * @param __INTERRUPT__: specifies the interrupt pending bit to clear.
bogdanm 92:4fc01daae5a5 538 * This parameter can be one or a combination of the following values:
bogdanm 92:4fc01daae5a5 539 * @arg SDIO_IT_CCRCFAIL: Command response received (CRC check failed) interrupt
bogdanm 92:4fc01daae5a5 540 * @arg SDIO_IT_DCRCFAIL: Data block sent/received (CRC check failed) interrupt
bogdanm 92:4fc01daae5a5 541 * @arg SDIO_IT_CTIMEOUT: Command response timeout interrupt
bogdanm 92:4fc01daae5a5 542 * @arg SDIO_IT_DTIMEOUT: Data timeout interrupt
bogdanm 92:4fc01daae5a5 543 * @arg SDIO_IT_TXUNDERR: Transmit FIFO underrun error interrupt
bogdanm 92:4fc01daae5a5 544 * @arg SDIO_IT_RXOVERR: Received FIFO overrun error interrupt
bogdanm 92:4fc01daae5a5 545 * @arg SDIO_IT_CMDREND: Command response received (CRC check passed) interrupt
bogdanm 92:4fc01daae5a5 546 * @arg SDIO_IT_CMDSENT: Command sent (no response required) interrupt
AnnaBridge 145:64910690c574 547 * @arg SDIO_IT_DATAEND: Data end (data counter, SDMMC_DCOUNT, is zero) interrupt
bogdanm 92:4fc01daae5a5 548 * @arg SDIO_IT_SDIOIT: SD I/O interrupt received interrupt
bogdanm 92:4fc01daae5a5 549 * @retval None
bogdanm 92:4fc01daae5a5 550 */
AnnaBridge 145:64910690c574 551 #define __HAL_SD_CLEAR_IT(__HANDLE__, __INTERRUPT__) __SDIO_CLEAR_IT((__HANDLE__)->Instance, (__INTERRUPT__))
AnnaBridge 145:64910690c574 552
bogdanm 92:4fc01daae5a5 553 /**
bogdanm 92:4fc01daae5a5 554 * @}
bogdanm 92:4fc01daae5a5 555 */
bogdanm 92:4fc01daae5a5 556
bogdanm 92:4fc01daae5a5 557 /* Exported functions --------------------------------------------------------*/
Kojto 99:dbbf35b96557 558 /** @defgroup SD_Exported_Functions SD Exported Functions
bogdanm 92:4fc01daae5a5 559 * @{
bogdanm 92:4fc01daae5a5 560 */
AnnaBridge 145:64910690c574 561
Kojto 99:dbbf35b96557 562 /** @defgroup SD_Exported_Functions_Group1 Initialization and de-initialization functions
bogdanm 92:4fc01daae5a5 563 * @{
bogdanm 92:4fc01daae5a5 564 */
AnnaBridge 145:64910690c574 565 HAL_StatusTypeDef HAL_SD_Init(SD_HandleTypeDef *hsd);
AnnaBridge 145:64910690c574 566 HAL_StatusTypeDef HAL_SD_InitCard(SD_HandleTypeDef *hsd);
AnnaBridge 145:64910690c574 567 HAL_StatusTypeDef HAL_SD_DeInit (SD_HandleTypeDef *hsd);
bogdanm 92:4fc01daae5a5 568 void HAL_SD_MspInit(SD_HandleTypeDef *hsd);
bogdanm 92:4fc01daae5a5 569 void HAL_SD_MspDeInit(SD_HandleTypeDef *hsd);
bogdanm 92:4fc01daae5a5 570 /**
bogdanm 92:4fc01daae5a5 571 * @}
bogdanm 92:4fc01daae5a5 572 */
AnnaBridge 145:64910690c574 573
AnnaBridge 145:64910690c574 574 /** @defgroup SD_Exported_Functions_Group2 Input and Output operation functions
bogdanm 92:4fc01daae5a5 575 * @{
bogdanm 92:4fc01daae5a5 576 */
bogdanm 92:4fc01daae5a5 577 /* Blocking mode: Polling */
AnnaBridge 145:64910690c574 578 HAL_StatusTypeDef HAL_SD_ReadBlocks(SD_HandleTypeDef *hsd, uint8_t *pData, uint32_t BlockAdd, uint32_t NumberOfBlocks, uint32_t Timeout);
AnnaBridge 145:64910690c574 579 HAL_StatusTypeDef HAL_SD_WriteBlocks(SD_HandleTypeDef *hsd, uint8_t *pData, uint32_t BlockAdd, uint32_t NumberOfBlocks, uint32_t Timeout);
AnnaBridge 145:64910690c574 580 HAL_StatusTypeDef HAL_SD_Erase(SD_HandleTypeDef *hsd, uint32_t BlockStartAdd, uint32_t BlockEndAdd);
AnnaBridge 145:64910690c574 581 /* Non-Blocking mode: IT */
AnnaBridge 145:64910690c574 582 HAL_StatusTypeDef HAL_SD_ReadBlocks_IT(SD_HandleTypeDef *hsd, uint8_t *pData, uint32_t BlockAdd, uint32_t NumberOfBlocks);
AnnaBridge 145:64910690c574 583 HAL_StatusTypeDef HAL_SD_WriteBlocks_IT(SD_HandleTypeDef *hsd, uint8_t *pData, uint32_t BlockAdd, uint32_t NumberOfBlocks);
AnnaBridge 145:64910690c574 584 /* Non-Blocking mode: DMA */
AnnaBridge 145:64910690c574 585 HAL_StatusTypeDef HAL_SD_ReadBlocks_DMA(SD_HandleTypeDef *hsd, uint8_t *pData, uint32_t BlockAdd, uint32_t NumberOfBlocks);
AnnaBridge 145:64910690c574 586 HAL_StatusTypeDef HAL_SD_WriteBlocks_DMA(SD_HandleTypeDef *hsd, uint8_t *pData, uint32_t BlockAdd, uint32_t NumberOfBlocks);
bogdanm 92:4fc01daae5a5 587
bogdanm 92:4fc01daae5a5 588 void HAL_SD_IRQHandler(SD_HandleTypeDef *hsd);
bogdanm 92:4fc01daae5a5 589
bogdanm 92:4fc01daae5a5 590 /* Callback in non blocking modes (DMA) */
AnnaBridge 145:64910690c574 591 void HAL_SD_TxCpltCallback(SD_HandleTypeDef *hsd);
AnnaBridge 145:64910690c574 592 void HAL_SD_RxCpltCallback(SD_HandleTypeDef *hsd);
AnnaBridge 145:64910690c574 593 void HAL_SD_ErrorCallback(SD_HandleTypeDef *hsd);
AnnaBridge 145:64910690c574 594 void HAL_SD_AbortCallback(SD_HandleTypeDef *hsd);
AnnaBridge 145:64910690c574 595 /**
AnnaBridge 145:64910690c574 596 * @}
AnnaBridge 145:64910690c574 597 */
AnnaBridge 145:64910690c574 598
AnnaBridge 145:64910690c574 599 /** @defgroup SD_Exported_Functions_Group3 Peripheral Control functions
AnnaBridge 145:64910690c574 600 * @{
AnnaBridge 145:64910690c574 601 */
AnnaBridge 145:64910690c574 602 HAL_StatusTypeDef HAL_SD_ConfigWideBusOperation(SD_HandleTypeDef *hsd, uint32_t WideMode);
bogdanm 92:4fc01daae5a5 603 /**
bogdanm 92:4fc01daae5a5 604 * @}
bogdanm 92:4fc01daae5a5 605 */
Kojto 99:dbbf35b96557 606
AnnaBridge 145:64910690c574 607 /** @defgroup SD_Exported_Functions_Group4 SD card related functions
bogdanm 92:4fc01daae5a5 608 * @{
bogdanm 92:4fc01daae5a5 609 */
AnnaBridge 145:64910690c574 610 HAL_StatusTypeDef HAL_SD_SendSDStatus(SD_HandleTypeDef *hsd, uint32_t *pSDstatus);
AnnaBridge 145:64910690c574 611 HAL_SD_CardStateTypeDef HAL_SD_GetCardState(SD_HandleTypeDef *hsd);
AnnaBridge 145:64910690c574 612 HAL_StatusTypeDef HAL_SD_GetCardCID(SD_HandleTypeDef *hsd, HAL_SD_CardCIDTypeDef *pCID);
AnnaBridge 145:64910690c574 613 HAL_StatusTypeDef HAL_SD_GetCardCSD(SD_HandleTypeDef *hsd, HAL_SD_CardCSDTypeDef *pCSD);
AnnaBridge 145:64910690c574 614 HAL_StatusTypeDef HAL_SD_GetCardStatus(SD_HandleTypeDef *hsd, HAL_SD_CardStatusTypeDef *pStatus);
AnnaBridge 145:64910690c574 615 HAL_StatusTypeDef HAL_SD_GetCardInfo(SD_HandleTypeDef *hsd, HAL_SD_CardInfoTypeDef *pCardInfo);
bogdanm 92:4fc01daae5a5 616 /**
bogdanm 92:4fc01daae5a5 617 * @}
bogdanm 92:4fc01daae5a5 618 */
AnnaBridge 145:64910690c574 619
AnnaBridge 145:64910690c574 620 /** @defgroup SD_Exported_Functions_Group5 Peripheral State and Errors functions
bogdanm 92:4fc01daae5a5 621 * @{
bogdanm 92:4fc01daae5a5 622 */
AnnaBridge 145:64910690c574 623 HAL_SD_StateTypeDef HAL_SD_GetState(SD_HandleTypeDef *hsd);
AnnaBridge 145:64910690c574 624 uint32_t HAL_SD_GetError(SD_HandleTypeDef *hsd);
bogdanm 92:4fc01daae5a5 625 /**
bogdanm 92:4fc01daae5a5 626 * @}
bogdanm 92:4fc01daae5a5 627 */
AnnaBridge 145:64910690c574 628
AnnaBridge 145:64910690c574 629 /** @defgroup SD_Exported_Functions_Group6 Perioheral Abort management
AnnaBridge 145:64910690c574 630 * @{
AnnaBridge 145:64910690c574 631 */
AnnaBridge 145:64910690c574 632 HAL_StatusTypeDef HAL_SD_Abort(SD_HandleTypeDef *hsd);
AnnaBridge 145:64910690c574 633 HAL_StatusTypeDef HAL_SD_Abort_IT(SD_HandleTypeDef *hsd);
bogdanm 92:4fc01daae5a5 634 /**
bogdanm 92:4fc01daae5a5 635 * @}
bogdanm 92:4fc01daae5a5 636 */
bogdanm 92:4fc01daae5a5 637
Kojto 99:dbbf35b96557 638 /* Private types -------------------------------------------------------------*/
Kojto 99:dbbf35b96557 639 /** @defgroup SD_Private_Types SD Private Types
Kojto 99:dbbf35b96557 640 * @{
Kojto 99:dbbf35b96557 641 */
Kojto 99:dbbf35b96557 642
Kojto 99:dbbf35b96557 643 /**
Kojto 99:dbbf35b96557 644 * @}
Kojto 99:dbbf35b96557 645 */
Kojto 99:dbbf35b96557 646
Kojto 99:dbbf35b96557 647 /* Private defines -----------------------------------------------------------*/
Kojto 99:dbbf35b96557 648 /** @defgroup SD_Private_Defines SD Private Defines
Kojto 99:dbbf35b96557 649 * @{
Kojto 99:dbbf35b96557 650 */
Kojto 99:dbbf35b96557 651
Kojto 99:dbbf35b96557 652 /**
Kojto 99:dbbf35b96557 653 * @}
Kojto 99:dbbf35b96557 654 */
Kojto 99:dbbf35b96557 655
Kojto 99:dbbf35b96557 656 /* Private variables ---------------------------------------------------------*/
Kojto 99:dbbf35b96557 657 /** @defgroup SD_Private_Variables SD Private Variables
Kojto 99:dbbf35b96557 658 * @{
Kojto 99:dbbf35b96557 659 */
Kojto 99:dbbf35b96557 660
Kojto 99:dbbf35b96557 661 /**
Kojto 99:dbbf35b96557 662 * @}
Kojto 99:dbbf35b96557 663 */
Kojto 99:dbbf35b96557 664
Kojto 99:dbbf35b96557 665 /* Private constants ---------------------------------------------------------*/
Kojto 99:dbbf35b96557 666 /** @defgroup SD_Private_Constants SD Private Constants
Kojto 99:dbbf35b96557 667 * @{
Kojto 99:dbbf35b96557 668 */
Kojto 99:dbbf35b96557 669
Kojto 99:dbbf35b96557 670 /**
Kojto 99:dbbf35b96557 671 * @}
Kojto 99:dbbf35b96557 672 */
Kojto 99:dbbf35b96557 673
Kojto 99:dbbf35b96557 674 /* Private macros ------------------------------------------------------------*/
Kojto 99:dbbf35b96557 675 /** @defgroup SD_Private_Macros SD Private Macros
Kojto 99:dbbf35b96557 676 * @{
Kojto 99:dbbf35b96557 677 */
Kojto 99:dbbf35b96557 678
Kojto 99:dbbf35b96557 679 /**
Kojto 99:dbbf35b96557 680 * @}
Kojto 99:dbbf35b96557 681 */
Kojto 99:dbbf35b96557 682
Kojto 99:dbbf35b96557 683 /* Private functions prototypes ----------------------------------------------*/
Kojto 99:dbbf35b96557 684 /** @defgroup SD_Private_Functions_Prototypes SD Private Functions Prototypes
Kojto 99:dbbf35b96557 685 * @{
Kojto 99:dbbf35b96557 686 */
Kojto 99:dbbf35b96557 687
Kojto 99:dbbf35b96557 688 /**
Kojto 99:dbbf35b96557 689 * @}
Kojto 99:dbbf35b96557 690 */
Kojto 99:dbbf35b96557 691
Kojto 99:dbbf35b96557 692 /* Private functions ---------------------------------------------------------*/
Kojto 99:dbbf35b96557 693 /** @defgroup SD_Private_Functions SD Private Functions
Kojto 99:dbbf35b96557 694 * @{
Kojto 99:dbbf35b96557 695 */
Kojto 99:dbbf35b96557 696
Kojto 99:dbbf35b96557 697 /**
Kojto 99:dbbf35b96557 698 * @}
Kojto 99:dbbf35b96557 699 */
Kojto 99:dbbf35b96557 700
AnnaBridge 145:64910690c574 701
bogdanm 92:4fc01daae5a5 702 /**
bogdanm 92:4fc01daae5a5 703 * @}
bogdanm 92:4fc01daae5a5 704 */
bogdanm 92:4fc01daae5a5 705
bogdanm 92:4fc01daae5a5 706 /**
bogdanm 92:4fc01daae5a5 707 * @}
AnnaBridge 145:64910690c574 708 */
AnnaBridge 145:64910690c574 709
AnnaBridge 145:64910690c574 710 /**
AnnaBridge 145:64910690c574 711 * @}
AnnaBridge 145:64910690c574 712 */
AnnaBridge 145:64910690c574 713
Kojto 110:165afa46840b 714 #endif /* STM32F405xx || STM32F415xx || STM32F407xx || STM32F417xx || STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx ||
Kojto 122:f9eeca106725 715 STM32F401xC || STM32F401xE || STM32F411xE || STM32F446xx || STM32F469xx || STM32F479xx || STM32F412Zx || STM32F412Vx ||
AnnaBridge 145:64910690c574 716 STM32F412Rx || STM32F412Cx || STM32F413xx || STM32F423xx */
AnnaBridge 145:64910690c574 717
bogdanm 92:4fc01daae5a5 718 #ifdef __cplusplus
bogdanm 92:4fc01daae5a5 719 }
bogdanm 92:4fc01daae5a5 720 #endif
bogdanm 92:4fc01daae5a5 721
AnnaBridge 145:64910690c574 722
AnnaBridge 145:64910690c574 723 #endif /* __STM32F4xx_HAL_SD_H */
bogdanm 92:4fc01daae5a5 724
bogdanm 92:4fc01daae5a5 725 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/