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TARGET_DISCO_F429ZI/TARGET_STM/TARGET_STM32F4/device/stm32f4xx_hal_nor.h@160:5571c4ff569f, 2018-01-17 (annotated)

Committer:
Anna Bridge
Date:
Wed Jan 17 16:13:02 2018 +0000
Revision:
160:5571c4ff569f
Parent:
156:ff21514d8981
Child:
163:e59c8e839560
mbed library. Release version 158

Who changed what in which revision?

UserRevisionLine numberNew contents of line
AnnaBridge 156:ff21514d8981 1 /**
AnnaBridge 156:ff21514d8981 2 ******************************************************************************
AnnaBridge 156:ff21514d8981 3 * @file stm32f4xx_hal_nor.h
AnnaBridge 156:ff21514d8981 4 * @author MCD Application Team
AnnaBridge 156:ff21514d8981 5 * @version V1.7.1
AnnaBridge 156:ff21514d8981 6 * @date 14-April-2017
AnnaBridge 156:ff21514d8981 7 * @brief Header file of NOR HAL module.
AnnaBridge 156:ff21514d8981 8 ******************************************************************************
AnnaBridge 156:ff21514d8981 9 * @attention
AnnaBridge 156:ff21514d8981 10 *
AnnaBridge 156:ff21514d8981 11 * <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
AnnaBridge 156:ff21514d8981 12 *
AnnaBridge 156:ff21514d8981 13 * Redistribution and use in source and binary forms, with or without modification,
AnnaBridge 156:ff21514d8981 14 * are permitted provided that the following conditions are met:
AnnaBridge 156:ff21514d8981 15 * 1. Redistributions of source code must retain the above copyright notice,
AnnaBridge 156:ff21514d8981 16 * this list of conditions and the following disclaimer.
AnnaBridge 156:ff21514d8981 17 * 2. Redistributions in binary form must reproduce the above copyright notice,
AnnaBridge 156:ff21514d8981 18 * this list of conditions and the following disclaimer in the documentation
AnnaBridge 156:ff21514d8981 19 * and/or other materials provided with the distribution.
AnnaBridge 156:ff21514d8981 20 * 3. Neither the name of STMicroelectronics nor the names of its contributors
AnnaBridge 156:ff21514d8981 21 * may be used to endorse or promote products derived from this software
AnnaBridge 156:ff21514d8981 22 * without specific prior written permission.
AnnaBridge 156:ff21514d8981 23 *
AnnaBridge 156:ff21514d8981 24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
AnnaBridge 156:ff21514d8981 25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
AnnaBridge 156:ff21514d8981 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
AnnaBridge 156:ff21514d8981 27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
AnnaBridge 156:ff21514d8981 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
AnnaBridge 156:ff21514d8981 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
AnnaBridge 156:ff21514d8981 30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
AnnaBridge 156:ff21514d8981 31 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
AnnaBridge 156:ff21514d8981 32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
AnnaBridge 156:ff21514d8981 33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
AnnaBridge 156:ff21514d8981 34 *
AnnaBridge 156:ff21514d8981 35 ******************************************************************************
AnnaBridge 156:ff21514d8981 36 */
AnnaBridge 156:ff21514d8981 37
AnnaBridge 156:ff21514d8981 38 /* Define to prevent recursive inclusion -------------------------------------*/
AnnaBridge 156:ff21514d8981 39 #ifndef __STM32F4xx_HAL_NOR_H
AnnaBridge 156:ff21514d8981 40 #define __STM32F4xx_HAL_NOR_H
AnnaBridge 156:ff21514d8981 41
AnnaBridge 156:ff21514d8981 42 #ifdef __cplusplus
AnnaBridge 156:ff21514d8981 43 extern "C" {
AnnaBridge 156:ff21514d8981 44 #endif
AnnaBridge 156:ff21514d8981 45
AnnaBridge 156:ff21514d8981 46 /* Includes ------------------------------------------------------------------*/
AnnaBridge 156:ff21514d8981 47 #if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx) || defined(STM32F417xx) || defined(STM32F412Zx) ||\
AnnaBridge 156:ff21514d8981 48 defined(STM32F412Vx) || defined(STM32F413xx) || defined(STM32F423xx)
AnnaBridge 156:ff21514d8981 49 #include "stm32f4xx_ll_fsmc.h"
AnnaBridge 156:ff21514d8981 50 #endif /* STM32F405xx || STM32F415xx || STM32F407xx || STM32F417xx || STM32F412Zx || STM32F412Vx || STM32F413xx || STM32F423xx */
AnnaBridge 156:ff21514d8981 51
AnnaBridge 156:ff21514d8981 52 #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) ||\
AnnaBridge 156:ff21514d8981 53 defined(STM32F446xx) || defined(STM32F469xx) || defined(STM32F479xx)
AnnaBridge 156:ff21514d8981 54 #include "stm32f4xx_ll_fmc.h"
AnnaBridge 156:ff21514d8981 55 #endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F446xx || STM32F469xx || STM32F479xx */
AnnaBridge 156:ff21514d8981 56
AnnaBridge 156:ff21514d8981 57 /** @addtogroup STM32F4xx_HAL_Driver
AnnaBridge 156:ff21514d8981 58 * @{
AnnaBridge 156:ff21514d8981 59 */
AnnaBridge 156:ff21514d8981 60
AnnaBridge 156:ff21514d8981 61 /** @addtogroup NOR
AnnaBridge 156:ff21514d8981 62 * @{
AnnaBridge 156:ff21514d8981 63 */
AnnaBridge 156:ff21514d8981 64
AnnaBridge 156:ff21514d8981 65 #if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx) || defined(STM32F417xx) ||\
AnnaBridge 156:ff21514d8981 66 defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) ||\
AnnaBridge 156:ff21514d8981 67 defined(STM32F446xx) || defined(STM32F469xx) || defined(STM32F479xx) || defined(STM32F412Zx) ||\
AnnaBridge 156:ff21514d8981 68 defined(STM32F412Vx) || defined(STM32F413xx) || defined(STM32F423xx)
AnnaBridge 156:ff21514d8981 69
AnnaBridge 156:ff21514d8981 70 /* Exported typedef ----------------------------------------------------------*/
AnnaBridge 156:ff21514d8981 71 /** @defgroup NOR_Exported_Types NOR Exported Types
AnnaBridge 156:ff21514d8981 72 * @{
AnnaBridge 156:ff21514d8981 73 */
AnnaBridge 156:ff21514d8981 74
AnnaBridge 156:ff21514d8981 75 /**
AnnaBridge 156:ff21514d8981 76 * @brief HAL SRAM State structures definition
AnnaBridge 156:ff21514d8981 77 */
AnnaBridge 156:ff21514d8981 78 typedef enum
AnnaBridge 156:ff21514d8981 79 {
AnnaBridge 156:ff21514d8981 80 HAL_NOR_STATE_RESET = 0x00U, /*!< NOR not yet initialized or disabled */
AnnaBridge 156:ff21514d8981 81 HAL_NOR_STATE_READY = 0x01U, /*!< NOR initialized and ready for use */
AnnaBridge 156:ff21514d8981 82 HAL_NOR_STATE_BUSY = 0x02U, /*!< NOR internal processing is ongoing */
AnnaBridge 156:ff21514d8981 83 HAL_NOR_STATE_ERROR = 0x03U, /*!< NOR error state */
AnnaBridge 156:ff21514d8981 84 HAL_NOR_STATE_PROTECTED = 0x04U /*!< NOR NORSRAM device write protected */
AnnaBridge 156:ff21514d8981 85 }HAL_NOR_StateTypeDef;
AnnaBridge 156:ff21514d8981 86
AnnaBridge 156:ff21514d8981 87 /**
AnnaBridge 156:ff21514d8981 88 * @brief FMC NOR Status typedef
AnnaBridge 156:ff21514d8981 89 */
AnnaBridge 156:ff21514d8981 90 typedef enum
AnnaBridge 156:ff21514d8981 91 {
AnnaBridge 156:ff21514d8981 92 HAL_NOR_STATUS_SUCCESS = 0U,
AnnaBridge 156:ff21514d8981 93 HAL_NOR_STATUS_ONGOING,
AnnaBridge 156:ff21514d8981 94 HAL_NOR_STATUS_ERROR,
AnnaBridge 156:ff21514d8981 95 HAL_NOR_STATUS_TIMEOUT
AnnaBridge 156:ff21514d8981 96 }HAL_NOR_StatusTypeDef;
AnnaBridge 156:ff21514d8981 97
AnnaBridge 156:ff21514d8981 98 /**
AnnaBridge 156:ff21514d8981 99 * @brief FMC NOR ID typedef
AnnaBridge 156:ff21514d8981 100 */
AnnaBridge 156:ff21514d8981 101 typedef struct
AnnaBridge 156:ff21514d8981 102 {
AnnaBridge 156:ff21514d8981 103 uint16_t Manufacturer_Code; /*!< Defines the device's manufacturer code used to identify the memory */
AnnaBridge 156:ff21514d8981 104
AnnaBridge 156:ff21514d8981 105 uint16_t Device_Code1;
AnnaBridge 156:ff21514d8981 106
AnnaBridge 156:ff21514d8981 107 uint16_t Device_Code2;
AnnaBridge 156:ff21514d8981 108
AnnaBridge 156:ff21514d8981 109 uint16_t Device_Code3; /*!< Defines the device's codes used to identify the memory.
AnnaBridge 156:ff21514d8981 110 These codes can be accessed by performing read operations with specific
AnnaBridge 156:ff21514d8981 111 control signals and addresses set.They can also be accessed by issuing
AnnaBridge 156:ff21514d8981 112 an Auto Select command */
AnnaBridge 156:ff21514d8981 113 }NOR_IDTypeDef;
AnnaBridge 156:ff21514d8981 114
AnnaBridge 156:ff21514d8981 115 /**
AnnaBridge 156:ff21514d8981 116 * @brief FMC NOR CFI typedef
AnnaBridge 156:ff21514d8981 117 */
AnnaBridge 156:ff21514d8981 118 typedef struct
AnnaBridge 156:ff21514d8981 119 {
AnnaBridge 156:ff21514d8981 120 /*!< Defines the information stored in the memory's Common flash interface
AnnaBridge 156:ff21514d8981 121 which contains a description of various electrical and timing parameters,
AnnaBridge 156:ff21514d8981 122 density information and functions supported by the memory */
AnnaBridge 156:ff21514d8981 123
AnnaBridge 156:ff21514d8981 124 uint16_t CFI_1;
AnnaBridge 156:ff21514d8981 125
AnnaBridge 156:ff21514d8981 126 uint16_t CFI_2;
AnnaBridge 156:ff21514d8981 127
AnnaBridge 156:ff21514d8981 128 uint16_t CFI_3;
AnnaBridge 156:ff21514d8981 129
AnnaBridge 156:ff21514d8981 130 uint16_t CFI_4;
AnnaBridge 156:ff21514d8981 131 }NOR_CFITypeDef;
AnnaBridge 156:ff21514d8981 132
AnnaBridge 156:ff21514d8981 133 /**
AnnaBridge 156:ff21514d8981 134 * @brief NOR handle Structure definition
AnnaBridge 156:ff21514d8981 135 */
AnnaBridge 156:ff21514d8981 136 typedef struct
AnnaBridge 156:ff21514d8981 137 {
AnnaBridge 156:ff21514d8981 138 FMC_NORSRAM_TypeDef *Instance; /*!< Register base address */
AnnaBridge 156:ff21514d8981 139
AnnaBridge 156:ff21514d8981 140 FMC_NORSRAM_EXTENDED_TypeDef *Extended; /*!< Extended mode register base address */
AnnaBridge 156:ff21514d8981 141
AnnaBridge 156:ff21514d8981 142 FMC_NORSRAM_InitTypeDef Init; /*!< NOR device control configuration parameters */
AnnaBridge 156:ff21514d8981 143
AnnaBridge 156:ff21514d8981 144 HAL_LockTypeDef Lock; /*!< NOR locking object */
AnnaBridge 156:ff21514d8981 145
AnnaBridge 156:ff21514d8981 146 __IO HAL_NOR_StateTypeDef State; /*!< NOR device access state */
AnnaBridge 156:ff21514d8981 147
AnnaBridge 156:ff21514d8981 148 }NOR_HandleTypeDef;
AnnaBridge 156:ff21514d8981 149 /**
AnnaBridge 156:ff21514d8981 150 * @}
AnnaBridge 156:ff21514d8981 151 */
AnnaBridge 156:ff21514d8981 152
AnnaBridge 156:ff21514d8981 153 /* Exported constants --------------------------------------------------------*/
AnnaBridge 156:ff21514d8981 154 /* Exported macros ------------------------------------------------------------*/
AnnaBridge 156:ff21514d8981 155 /** @defgroup NOR_Exported_Macros NOR Exported Macros
AnnaBridge 156:ff21514d8981 156 * @{
AnnaBridge 156:ff21514d8981 157 */
AnnaBridge 156:ff21514d8981 158 /** @brief Reset NOR handle state
AnnaBridge 156:ff21514d8981 159 * @param __HANDLE__: specifies the NOR handle.
AnnaBridge 156:ff21514d8981 160 * @retval None
AnnaBridge 156:ff21514d8981 161 */
AnnaBridge 156:ff21514d8981 162 #define __HAL_NOR_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_NOR_STATE_RESET)
AnnaBridge 156:ff21514d8981 163 /**
AnnaBridge 156:ff21514d8981 164 * @}
AnnaBridge 156:ff21514d8981 165 */
AnnaBridge 156:ff21514d8981 166
AnnaBridge 156:ff21514d8981 167 /* Exported functions --------------------------------------------------------*/
AnnaBridge 156:ff21514d8981 168 /** @addtogroup NOR_Exported_Functions
AnnaBridge 156:ff21514d8981 169 * @{
AnnaBridge 156:ff21514d8981 170 */
AnnaBridge 156:ff21514d8981 171
AnnaBridge 156:ff21514d8981 172 /** @addtogroup NOR_Exported_Functions_Group1
AnnaBridge 156:ff21514d8981 173 * @{
AnnaBridge 156:ff21514d8981 174 */
AnnaBridge 156:ff21514d8981 175 /* Initialization/de-initialization functions ********************************/
AnnaBridge 156:ff21514d8981 176 HAL_StatusTypeDef HAL_NOR_Init(NOR_HandleTypeDef *hnor, FMC_NORSRAM_TimingTypeDef *Timing, FMC_NORSRAM_TimingTypeDef *ExtTiming);
AnnaBridge 156:ff21514d8981 177 HAL_StatusTypeDef HAL_NOR_DeInit(NOR_HandleTypeDef *hnor);
AnnaBridge 156:ff21514d8981 178 void HAL_NOR_MspInit(NOR_HandleTypeDef *hnor);
AnnaBridge 156:ff21514d8981 179 void HAL_NOR_MspDeInit(NOR_HandleTypeDef *hnor);
AnnaBridge 156:ff21514d8981 180 void HAL_NOR_MspWait(NOR_HandleTypeDef *hnor, uint32_t Timeout);
AnnaBridge 156:ff21514d8981 181 /**
AnnaBridge 156:ff21514d8981 182 * @}
AnnaBridge 156:ff21514d8981 183 */
AnnaBridge 156:ff21514d8981 184
AnnaBridge 156:ff21514d8981 185 /** @addtogroup NOR_Exported_Functions_Group2
AnnaBridge 156:ff21514d8981 186 * @{
AnnaBridge 156:ff21514d8981 187 */
AnnaBridge 156:ff21514d8981 188 /* I/O operation functions ***************************************************/
AnnaBridge 156:ff21514d8981 189 HAL_StatusTypeDef HAL_NOR_Read_ID(NOR_HandleTypeDef *hnor, NOR_IDTypeDef *pNOR_ID);
AnnaBridge 156:ff21514d8981 190 HAL_StatusTypeDef HAL_NOR_ReturnToReadMode(NOR_HandleTypeDef *hnor);
AnnaBridge 156:ff21514d8981 191 HAL_StatusTypeDef HAL_NOR_Read(NOR_HandleTypeDef *hnor, uint32_t *pAddress, uint16_t *pData);
AnnaBridge 156:ff21514d8981 192 HAL_StatusTypeDef HAL_NOR_Program(NOR_HandleTypeDef *hnor, uint32_t *pAddress, uint16_t *pData);
AnnaBridge 156:ff21514d8981 193
AnnaBridge 156:ff21514d8981 194 HAL_StatusTypeDef HAL_NOR_ReadBuffer(NOR_HandleTypeDef *hnor, uint32_t uwAddress, uint16_t *pData, uint32_t uwBufferSize);
AnnaBridge 156:ff21514d8981 195 HAL_StatusTypeDef HAL_NOR_ProgramBuffer(NOR_HandleTypeDef *hnor, uint32_t uwAddress, uint16_t *pData, uint32_t uwBufferSize);
AnnaBridge 156:ff21514d8981 196
AnnaBridge 156:ff21514d8981 197 HAL_StatusTypeDef HAL_NOR_Erase_Block(NOR_HandleTypeDef *hnor, uint32_t BlockAddress, uint32_t Address);
AnnaBridge 156:ff21514d8981 198 HAL_StatusTypeDef HAL_NOR_Erase_Chip(NOR_HandleTypeDef *hnor, uint32_t Address);
AnnaBridge 156:ff21514d8981 199 HAL_StatusTypeDef HAL_NOR_Read_CFI(NOR_HandleTypeDef *hnor, NOR_CFITypeDef *pNOR_CFI);
AnnaBridge 156:ff21514d8981 200 /**
AnnaBridge 156:ff21514d8981 201 * @}
AnnaBridge 156:ff21514d8981 202 */
AnnaBridge 156:ff21514d8981 203
AnnaBridge 156:ff21514d8981 204 /** @addtogroup NOR_Exported_Functions_Group3
AnnaBridge 156:ff21514d8981 205 * @{
AnnaBridge 156:ff21514d8981 206 */
AnnaBridge 156:ff21514d8981 207 /* NOR Control functions *****************************************************/
AnnaBridge 156:ff21514d8981 208 HAL_StatusTypeDef HAL_NOR_WriteOperation_Enable(NOR_HandleTypeDef *hnor);
AnnaBridge 156:ff21514d8981 209 HAL_StatusTypeDef HAL_NOR_WriteOperation_Disable(NOR_HandleTypeDef *hnor);
AnnaBridge 156:ff21514d8981 210 /**
AnnaBridge 156:ff21514d8981 211 * @}
AnnaBridge 156:ff21514d8981 212 */
AnnaBridge 156:ff21514d8981 213
AnnaBridge 156:ff21514d8981 214 /** @addtogroup NOR_Exported_Functions_Group4
AnnaBridge 156:ff21514d8981 215 * @{
AnnaBridge 156:ff21514d8981 216 */
AnnaBridge 156:ff21514d8981 217 /* NOR State functions ********************************************************/
AnnaBridge 156:ff21514d8981 218 HAL_NOR_StateTypeDef HAL_NOR_GetState(NOR_HandleTypeDef *hnor);
AnnaBridge 156:ff21514d8981 219 HAL_NOR_StatusTypeDef HAL_NOR_GetStatus(NOR_HandleTypeDef *hnor, uint32_t Address, uint32_t Timeout);
AnnaBridge 156:ff21514d8981 220 /**
AnnaBridge 156:ff21514d8981 221 * @}
AnnaBridge 156:ff21514d8981 222 */
AnnaBridge 156:ff21514d8981 223
AnnaBridge 156:ff21514d8981 224 /**
AnnaBridge 156:ff21514d8981 225 * @}
AnnaBridge 156:ff21514d8981 226 */
AnnaBridge 156:ff21514d8981 227
AnnaBridge 156:ff21514d8981 228 /* Private types -------------------------------------------------------------*/
AnnaBridge 156:ff21514d8981 229 /* Private variables ---------------------------------------------------------*/
AnnaBridge 156:ff21514d8981 230 /* Private constants ---------------------------------------------------------*/
AnnaBridge 156:ff21514d8981 231 /** @defgroup NOR_Private_Constants NOR Private Constants
AnnaBridge 156:ff21514d8981 232 * @{
AnnaBridge 156:ff21514d8981 233 */
AnnaBridge 156:ff21514d8981 234 /* NOR device IDs addresses */
AnnaBridge 156:ff21514d8981 235 #define MC_ADDRESS ((uint16_t)0x0000)
AnnaBridge 156:ff21514d8981 236 #define DEVICE_CODE1_ADDR ((uint16_t)0x0001)
AnnaBridge 156:ff21514d8981 237 #define DEVICE_CODE2_ADDR ((uint16_t)0x000E)
AnnaBridge 156:ff21514d8981 238 #define DEVICE_CODE3_ADDR ((uint16_t)0x000F)
AnnaBridge 156:ff21514d8981 239
AnnaBridge 156:ff21514d8981 240 /* NOR CFI IDs addresses */
AnnaBridge 156:ff21514d8981 241 #define CFI1_ADDRESS ((uint16_t)0x0061)
AnnaBridge 156:ff21514d8981 242 #define CFI2_ADDRESS ((uint16_t)0x0062)
AnnaBridge 156:ff21514d8981 243 #define CFI3_ADDRESS ((uint16_t)0x0063)
AnnaBridge 156:ff21514d8981 244 #define CFI4_ADDRESS ((uint16_t)0x0064)
AnnaBridge 156:ff21514d8981 245
AnnaBridge 156:ff21514d8981 246 /* NOR operation wait timeout */
AnnaBridge 156:ff21514d8981 247 #define NOR_TMEOUT ((uint16_t)0xFFFF)
AnnaBridge 156:ff21514d8981 248
AnnaBridge 156:ff21514d8981 249 /* NOR memory data width */
AnnaBridge 156:ff21514d8981 250 #define NOR_MEMORY_8B ((uint8_t)0x00)
AnnaBridge 156:ff21514d8981 251 #define NOR_MEMORY_16B ((uint8_t)0x01)
AnnaBridge 156:ff21514d8981 252
AnnaBridge 156:ff21514d8981 253 /* NOR memory device read/write start address */
AnnaBridge 156:ff21514d8981 254 #define NOR_MEMORY_ADRESS1 0x60000000U
AnnaBridge 156:ff21514d8981 255 #define NOR_MEMORY_ADRESS2 0x64000000U
AnnaBridge 156:ff21514d8981 256 #define NOR_MEMORY_ADRESS3 0x68000000U
AnnaBridge 156:ff21514d8981 257 #define NOR_MEMORY_ADRESS4 0x6C000000U
AnnaBridge 156:ff21514d8981 258 /**
AnnaBridge 156:ff21514d8981 259 * @}
AnnaBridge 156:ff21514d8981 260 */
AnnaBridge 156:ff21514d8981 261
AnnaBridge 156:ff21514d8981 262 /* Private macros ------------------------------------------------------------*/
AnnaBridge 156:ff21514d8981 263 /** @defgroup NOR_Private_Macros NOR Private Macros
AnnaBridge 156:ff21514d8981 264 * @{
AnnaBridge 156:ff21514d8981 265 */
AnnaBridge 156:ff21514d8981 266 /**
AnnaBridge 156:ff21514d8981 267 * @brief NOR memory address shifting.
AnnaBridge 156:ff21514d8981 268 * @param __NOR_ADDRESS__: NOR base address
AnnaBridge 156:ff21514d8981 269 * @param NOR_MEMORY_WIDTH: NOR memory width
AnnaBridge 156:ff21514d8981 270 * @param ADDRESS: NOR memory address
AnnaBridge 156:ff21514d8981 271 * @retval NOR shifted address value
AnnaBridge 156:ff21514d8981 272 */
AnnaBridge 156:ff21514d8981 273 #define NOR_ADDR_SHIFT(__NOR_ADDRESS__, NOR_MEMORY_WIDTH, ADDRESS) (uint32_t)(((NOR_MEMORY_WIDTH) == NOR_MEMORY_16B)? ((uint32_t)((__NOR_ADDRESS__) + (2U * (ADDRESS)))):\
AnnaBridge 156:ff21514d8981 274 ((uint32_t)((__NOR_ADDRESS__) + (ADDRESS))))
AnnaBridge 156:ff21514d8981 275
AnnaBridge 156:ff21514d8981 276 /**
AnnaBridge 156:ff21514d8981 277 * @brief NOR memory write data to specified address.
AnnaBridge 156:ff21514d8981 278 * @param ADDRESS: NOR memory address
AnnaBridge 156:ff21514d8981 279 * @param DATA: Data to write
AnnaBridge 156:ff21514d8981 280 * @retval None
AnnaBridge 156:ff21514d8981 281 */
AnnaBridge 156:ff21514d8981 282 #define NOR_WRITE(ADDRESS, DATA) (*(__IO uint16_t *)((uint32_t)(ADDRESS)) = (DATA))
AnnaBridge 156:ff21514d8981 283
AnnaBridge 156:ff21514d8981 284 /**
AnnaBridge 156:ff21514d8981 285 * @}
AnnaBridge 156:ff21514d8981 286 */
AnnaBridge 156:ff21514d8981 287 #endif /* STM32F405xx || STM32F415xx || STM32F407xx || STM32F417xx ||\
AnnaBridge 156:ff21514d8981 288 STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx ||\
AnnaBridge 156:ff21514d8981 289 STM32F446xx || STM32F469xx || STM32F479xx || STM32F412Zx ||\
AnnaBridge 156:ff21514d8981 290 STM32F412Vx || STM32F413xx || STM32F423xx */
AnnaBridge 156:ff21514d8981 291 /**
AnnaBridge 156:ff21514d8981 292 * @}
AnnaBridge 156:ff21514d8981 293 */
AnnaBridge 156:ff21514d8981 294
AnnaBridge 156:ff21514d8981 295 /**
AnnaBridge 156:ff21514d8981 296 * @}
AnnaBridge 156:ff21514d8981 297 */
AnnaBridge 156:ff21514d8981 298
AnnaBridge 156:ff21514d8981 299 #ifdef __cplusplus
AnnaBridge 156:ff21514d8981 300 }
AnnaBridge 156:ff21514d8981 301 #endif
AnnaBridge 156:ff21514d8981 302
AnnaBridge 156:ff21514d8981 303 #endif /* __STM32F4xx_HAL_NOR_H */
AnnaBridge 156:ff21514d8981 304
AnnaBridge 156:ff21514d8981 305 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/