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TARGET_MTS_DRAGONFLY_F411RE/stm32f4xx_hal_spi.h@114:252557024ec3, 2016-02-16 (annotated)

Committer:
Kojto
Date:
Tue Feb 16 14:28:01 2016 +0000
Revision:
114:252557024ec3
Parent:
110:165afa46840b
Child:
122:f9eeca106725
Release 114 of the mbed library



Changes:

- Atmel SAM - warnings fixes

- B96B F446VE - hw control flow addition

- Remove of GCC CW which was not active

- Remove GCC CS, not released anymore - deprecated

Who changed what in which revision?

UserRevisionLine numberNew contents of line
Kojto 101:7cff1c4259d7 1 /**
Kojto 101:7cff1c4259d7 2 ******************************************************************************
Kojto 101:7cff1c4259d7 3 * @file stm32f4xx_hal_spi.h
Kojto 101:7cff1c4259d7 4 * @author MCD Application Team
Kojto 110:165afa46840b 5 * @version V1.4.1
Kojto 110:165afa46840b 6 * @date 09-October-2015
Kojto 101:7cff1c4259d7 7 * @brief Header file of SPI HAL module.
Kojto 101:7cff1c4259d7 8 ******************************************************************************
Kojto 101:7cff1c4259d7 9 * @attention
Kojto 101:7cff1c4259d7 10 *
Kojto 101:7cff1c4259d7 11 * <h2><center>&copy; COPYRIGHT(c) 2015 STMicroelectronics</center></h2>
Kojto 101:7cff1c4259d7 12 *
Kojto 101:7cff1c4259d7 13 * Redistribution and use in source and binary forms, with or without modification,
Kojto 101:7cff1c4259d7 14 * are permitted provided that the following conditions are met:
Kojto 101:7cff1c4259d7 15 * 1. Redistributions of source code must retain the above copyright notice,
Kojto 101:7cff1c4259d7 16 * this list of conditions and the following disclaimer.
Kojto 101:7cff1c4259d7 17 * 2. Redistributions in binary form must reproduce the above copyright notice,
Kojto 101:7cff1c4259d7 18 * this list of conditions and the following disclaimer in the documentation
Kojto 101:7cff1c4259d7 19 * and/or other materials provided with the distribution.
Kojto 101:7cff1c4259d7 20 * 3. Neither the name of STMicroelectronics nor the names of its contributors
Kojto 101:7cff1c4259d7 21 * may be used to endorse or promote products derived from this software
Kojto 101:7cff1c4259d7 22 * without specific prior written permission.
Kojto 101:7cff1c4259d7 23 *
Kojto 101:7cff1c4259d7 24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
Kojto 101:7cff1c4259d7 25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
Kojto 101:7cff1c4259d7 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
Kojto 101:7cff1c4259d7 27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
Kojto 101:7cff1c4259d7 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
Kojto 101:7cff1c4259d7 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
Kojto 101:7cff1c4259d7 30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
Kojto 101:7cff1c4259d7 31 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
Kojto 101:7cff1c4259d7 32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
Kojto 101:7cff1c4259d7 33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
Kojto 101:7cff1c4259d7 34 *
Kojto 101:7cff1c4259d7 35 ******************************************************************************
Kojto 101:7cff1c4259d7 36 */
Kojto 101:7cff1c4259d7 37
Kojto 101:7cff1c4259d7 38 /* Define to prevent recursive inclusion -------------------------------------*/
Kojto 101:7cff1c4259d7 39 #ifndef __STM32F4xx_HAL_SPI_H
Kojto 101:7cff1c4259d7 40 #define __STM32F4xx_HAL_SPI_H
Kojto 101:7cff1c4259d7 41
Kojto 101:7cff1c4259d7 42 #ifdef __cplusplus
Kojto 101:7cff1c4259d7 43 extern "C" {
Kojto 101:7cff1c4259d7 44 #endif
Kojto 101:7cff1c4259d7 45
Kojto 101:7cff1c4259d7 46 /* Includes ------------------------------------------------------------------*/
Kojto 101:7cff1c4259d7 47 #include "stm32f4xx_hal_def.h"
Kojto 101:7cff1c4259d7 48
Kojto 101:7cff1c4259d7 49 /** @addtogroup STM32F4xx_HAL_Driver
Kojto 101:7cff1c4259d7 50 * @{
Kojto 101:7cff1c4259d7 51 */
Kojto 101:7cff1c4259d7 52
Kojto 101:7cff1c4259d7 53 /** @addtogroup SPI
Kojto 101:7cff1c4259d7 54 * @{
Kojto 101:7cff1c4259d7 55 */
Kojto 101:7cff1c4259d7 56
Kojto 101:7cff1c4259d7 57 /* Exported types ------------------------------------------------------------*/
Kojto 101:7cff1c4259d7 58 /** @defgroup SPI_Exported_Types SPI Exported Types
Kojto 101:7cff1c4259d7 59 * @{
Kojto 101:7cff1c4259d7 60 */
Kojto 101:7cff1c4259d7 61
Kojto 101:7cff1c4259d7 62 /**
Kojto 101:7cff1c4259d7 63 * @brief SPI Configuration Structure definition
Kojto 101:7cff1c4259d7 64 */
Kojto 101:7cff1c4259d7 65 typedef struct
Kojto 101:7cff1c4259d7 66 {
Kojto 101:7cff1c4259d7 67 uint32_t Mode; /*!< Specifies the SPI operating mode.
Kojto 101:7cff1c4259d7 68 This parameter can be a value of @ref SPI_mode */
Kojto 101:7cff1c4259d7 69
Kojto 101:7cff1c4259d7 70 uint32_t Direction; /*!< Specifies the SPI Directional mode state.
Kojto 101:7cff1c4259d7 71 This parameter can be a value of @ref SPI_Direction_mode */
Kojto 101:7cff1c4259d7 72
Kojto 101:7cff1c4259d7 73 uint32_t DataSize; /*!< Specifies the SPI data size.
Kojto 101:7cff1c4259d7 74 This parameter can be a value of @ref SPI_data_size */
Kojto 101:7cff1c4259d7 75
Kojto 101:7cff1c4259d7 76 uint32_t CLKPolarity; /*!< Specifies the serial clock steady state.
Kojto 101:7cff1c4259d7 77 This parameter can be a value of @ref SPI_Clock_Polarity */
Kojto 101:7cff1c4259d7 78
Kojto 101:7cff1c4259d7 79 uint32_t CLKPhase; /*!< Specifies the clock active edge for the bit capture.
Kojto 101:7cff1c4259d7 80 This parameter can be a value of @ref SPI_Clock_Phase */
Kojto 101:7cff1c4259d7 81
Kojto 101:7cff1c4259d7 82 uint32_t NSS; /*!< Specifies whether the NSS signal is managed by
Kojto 101:7cff1c4259d7 83 hardware (NSS pin) or by software using the SSI bit.
Kojto 101:7cff1c4259d7 84 This parameter can be a value of @ref SPI_Slave_Select_management */
Kojto 101:7cff1c4259d7 85
Kojto 101:7cff1c4259d7 86 uint32_t BaudRatePrescaler; /*!< Specifies the Baud Rate prescaler value which will be
Kojto 101:7cff1c4259d7 87 used to configure the transmit and receive SCK clock.
Kojto 101:7cff1c4259d7 88 This parameter can be a value of @ref SPI_BaudRate_Prescaler
Kojto 101:7cff1c4259d7 89 @note The communication clock is derived from the master
Kojto 101:7cff1c4259d7 90 clock. The slave clock does not need to be set */
Kojto 101:7cff1c4259d7 91
Kojto 101:7cff1c4259d7 92 uint32_t FirstBit; /*!< Specifies whether data transfers start from MSB or LSB bit.
Kojto 101:7cff1c4259d7 93 This parameter can be a value of @ref SPI_MSB_LSB_transmission */
Kojto 101:7cff1c4259d7 94
Kojto 101:7cff1c4259d7 95 uint32_t TIMode; /*!< Specifies if the TI mode is enabled or not.
Kojto 101:7cff1c4259d7 96 This parameter can be a value of @ref SPI_TI_mode */
Kojto 101:7cff1c4259d7 97
Kojto 101:7cff1c4259d7 98 uint32_t CRCCalculation; /*!< Specifies if the CRC calculation is enabled or not.
Kojto 101:7cff1c4259d7 99 This parameter can be a value of @ref SPI_CRC_Calculation */
Kojto 101:7cff1c4259d7 100
Kojto 101:7cff1c4259d7 101 uint32_t CRCPolynomial; /*!< Specifies the polynomial used for the CRC calculation.
Kojto 101:7cff1c4259d7 102 This parameter must be a number between Min_Data = 0 and Max_Data = 65535 */
Kojto 101:7cff1c4259d7 103
Kojto 101:7cff1c4259d7 104 }SPI_InitTypeDef;
Kojto 101:7cff1c4259d7 105
Kojto 101:7cff1c4259d7 106 /**
Kojto 101:7cff1c4259d7 107 * @brief HAL SPI State structure definition
Kojto 101:7cff1c4259d7 108 */
Kojto 101:7cff1c4259d7 109 typedef enum
Kojto 101:7cff1c4259d7 110 {
Kojto 101:7cff1c4259d7 111 HAL_SPI_STATE_RESET = 0x00, /*!< SPI not yet initialized or disabled */
Kojto 101:7cff1c4259d7 112 HAL_SPI_STATE_READY = 0x01, /*!< SPI initialized and ready for use */
Kojto 101:7cff1c4259d7 113 HAL_SPI_STATE_BUSY = 0x02, /*!< SPI process is ongoing */
Kojto 101:7cff1c4259d7 114 HAL_SPI_STATE_BUSY_TX = 0x12, /*!< Data Transmission process is ongoing */
Kojto 101:7cff1c4259d7 115 HAL_SPI_STATE_BUSY_RX = 0x22, /*!< Data Reception process is ongoing */
Kojto 101:7cff1c4259d7 116 HAL_SPI_STATE_BUSY_TX_RX = 0x32, /*!< Data Transmission and Reception process is ongoing */
Kojto 101:7cff1c4259d7 117 HAL_SPI_STATE_ERROR = 0x03 /*!< SPI error state */
Kojto 101:7cff1c4259d7 118
Kojto 101:7cff1c4259d7 119 }HAL_SPI_StateTypeDef;
Kojto 101:7cff1c4259d7 120
Kojto 101:7cff1c4259d7 121 /**
Kojto 101:7cff1c4259d7 122 * @brief SPI handle Structure definition
Kojto 101:7cff1c4259d7 123 */
Kojto 101:7cff1c4259d7 124 typedef struct __SPI_HandleTypeDef
Kojto 101:7cff1c4259d7 125 {
Kojto 101:7cff1c4259d7 126 SPI_TypeDef *Instance; /* SPI registers base address */
Kojto 101:7cff1c4259d7 127
Kojto 101:7cff1c4259d7 128 SPI_InitTypeDef Init; /* SPI communication parameters */
Kojto 101:7cff1c4259d7 129
Kojto 101:7cff1c4259d7 130 uint8_t *pTxBuffPtr; /* Pointer to SPI Tx transfer Buffer */
Kojto 101:7cff1c4259d7 131
Kojto 101:7cff1c4259d7 132 uint16_t TxXferSize; /* SPI Tx transfer size */
Kojto 101:7cff1c4259d7 133
Kojto 101:7cff1c4259d7 134 uint16_t TxXferCount; /* SPI Tx Transfer Counter */
Kojto 101:7cff1c4259d7 135
Kojto 101:7cff1c4259d7 136 uint8_t *pRxBuffPtr; /* Pointer to SPI Rx transfer Buffer */
Kojto 101:7cff1c4259d7 137
Kojto 101:7cff1c4259d7 138 uint16_t RxXferSize; /* SPI Rx transfer size */
Kojto 101:7cff1c4259d7 139
Kojto 101:7cff1c4259d7 140 uint16_t RxXferCount; /* SPI Rx Transfer Counter */
Kojto 101:7cff1c4259d7 141
Kojto 101:7cff1c4259d7 142 DMA_HandleTypeDef *hdmatx; /* SPI Tx DMA handle parameters */
Kojto 101:7cff1c4259d7 143
Kojto 101:7cff1c4259d7 144 DMA_HandleTypeDef *hdmarx; /* SPI Rx DMA handle parameters */
Kojto 101:7cff1c4259d7 145
Kojto 101:7cff1c4259d7 146 void (*RxISR)(struct __SPI_HandleTypeDef * hspi); /* function pointer on Rx ISR */
Kojto 101:7cff1c4259d7 147
Kojto 101:7cff1c4259d7 148 void (*TxISR)(struct __SPI_HandleTypeDef * hspi); /* function pointer on Tx ISR */
Kojto 101:7cff1c4259d7 149
Kojto 101:7cff1c4259d7 150 HAL_LockTypeDef Lock; /* SPI locking object */
Kojto 101:7cff1c4259d7 151
Kojto 101:7cff1c4259d7 152 __IO HAL_SPI_StateTypeDef State; /* SPI communication state */
Kojto 101:7cff1c4259d7 153
Kojto 101:7cff1c4259d7 154 __IO uint32_t ErrorCode; /* SPI Error code */
Kojto 101:7cff1c4259d7 155
Kojto 101:7cff1c4259d7 156 }SPI_HandleTypeDef;
Kojto 101:7cff1c4259d7 157 /**
Kojto 101:7cff1c4259d7 158 * @}
Kojto 101:7cff1c4259d7 159 */
Kojto 101:7cff1c4259d7 160
Kojto 101:7cff1c4259d7 161 /* Exported constants --------------------------------------------------------*/
Kojto 101:7cff1c4259d7 162 /** @defgroup SPI_Exported_Constants SPI Exported Constants
Kojto 101:7cff1c4259d7 163 * @{
Kojto 101:7cff1c4259d7 164 */
Kojto 101:7cff1c4259d7 165
Kojto 101:7cff1c4259d7 166 /** @defgroup SPI_Error_Code SPI Error Code
Kojto 101:7cff1c4259d7 167 * @brief SPI Error Code
Kojto 101:7cff1c4259d7 168 * @{
Kojto 101:7cff1c4259d7 169 */
Kojto 101:7cff1c4259d7 170 #define HAL_SPI_ERROR_NONE ((uint32_t)0x00000000) /*!< No error */
Kojto 101:7cff1c4259d7 171 #define HAL_SPI_ERROR_MODF ((uint32_t)0x00000001) /*!< MODF error */
Kojto 101:7cff1c4259d7 172 #define HAL_SPI_ERROR_CRC ((uint32_t)0x00000002) /*!< CRC error */
Kojto 101:7cff1c4259d7 173 #define HAL_SPI_ERROR_OVR ((uint32_t)0x00000004) /*!< OVR error */
Kojto 101:7cff1c4259d7 174 #define HAL_SPI_ERROR_FRE ((uint32_t)0x00000008) /*!< FRE error */
Kojto 101:7cff1c4259d7 175 #define HAL_SPI_ERROR_DMA ((uint32_t)0x00000010) /*!< DMA transfer error */
Kojto 106:ba1f97679dad 176 #define HAL_SPI_ERROR_FLAG ((uint32_t)0x00000020) /*!< Flag: RXNE,TXE, BSY */
Kojto 101:7cff1c4259d7 177 /**
Kojto 101:7cff1c4259d7 178 * @}
Kojto 101:7cff1c4259d7 179 */
Kojto 101:7cff1c4259d7 180
Kojto 101:7cff1c4259d7 181 /** @defgroup SPI_mode SPI Mode
Kojto 101:7cff1c4259d7 182 * @{
Kojto 101:7cff1c4259d7 183 */
Kojto 101:7cff1c4259d7 184 #define SPI_MODE_SLAVE ((uint32_t)0x00000000)
Kojto 101:7cff1c4259d7 185 #define SPI_MODE_MASTER (SPI_CR1_MSTR | SPI_CR1_SSI)
Kojto 101:7cff1c4259d7 186 /**
Kojto 101:7cff1c4259d7 187 * @}
Kojto 101:7cff1c4259d7 188 */
Kojto 101:7cff1c4259d7 189
Kojto 101:7cff1c4259d7 190 /** @defgroup SPI_Direction_mode SPI Direction Mode
Kojto 101:7cff1c4259d7 191 * @{
Kojto 101:7cff1c4259d7 192 */
Kojto 101:7cff1c4259d7 193 #define SPI_DIRECTION_2LINES ((uint32_t)0x00000000)
Kojto 101:7cff1c4259d7 194 #define SPI_DIRECTION_2LINES_RXONLY SPI_CR1_RXONLY
Kojto 101:7cff1c4259d7 195 #define SPI_DIRECTION_1LINE SPI_CR1_BIDIMODE
Kojto 101:7cff1c4259d7 196 /**
Kojto 101:7cff1c4259d7 197 * @}
Kojto 101:7cff1c4259d7 198 */
Kojto 101:7cff1c4259d7 199
Kojto 101:7cff1c4259d7 200 /** @defgroup SPI_data_size SPI Data Size
Kojto 101:7cff1c4259d7 201 * @{
Kojto 101:7cff1c4259d7 202 */
Kojto 101:7cff1c4259d7 203 #define SPI_DATASIZE_8BIT ((uint32_t)0x00000000)
Kojto 101:7cff1c4259d7 204 #define SPI_DATASIZE_16BIT SPI_CR1_DFF
Kojto 101:7cff1c4259d7 205 /**
Kojto 101:7cff1c4259d7 206 * @}
Kojto 101:7cff1c4259d7 207 */
Kojto 101:7cff1c4259d7 208
Kojto 101:7cff1c4259d7 209 /** @defgroup SPI_Clock_Polarity SPI Clock Polarity
Kojto 101:7cff1c4259d7 210 * @{
Kojto 101:7cff1c4259d7 211 */
Kojto 101:7cff1c4259d7 212 #define SPI_POLARITY_LOW ((uint32_t)0x00000000)
Kojto 101:7cff1c4259d7 213 #define SPI_POLARITY_HIGH SPI_CR1_CPOL
Kojto 101:7cff1c4259d7 214 /**
Kojto 101:7cff1c4259d7 215 * @}
Kojto 101:7cff1c4259d7 216 */
Kojto 101:7cff1c4259d7 217
Kojto 101:7cff1c4259d7 218 /** @defgroup SPI_Clock_Phase SPI Clock Phase
Kojto 101:7cff1c4259d7 219 * @{
Kojto 101:7cff1c4259d7 220 */
Kojto 101:7cff1c4259d7 221 #define SPI_PHASE_1EDGE ((uint32_t)0x00000000)
Kojto 101:7cff1c4259d7 222 #define SPI_PHASE_2EDGE SPI_CR1_CPHA
Kojto 101:7cff1c4259d7 223 /**
Kojto 101:7cff1c4259d7 224 * @}
Kojto 101:7cff1c4259d7 225 */
Kojto 101:7cff1c4259d7 226
Kojto 101:7cff1c4259d7 227 /** @defgroup SPI_Slave_Select_management SPI Slave Select Management
Kojto 101:7cff1c4259d7 228 * @{
Kojto 101:7cff1c4259d7 229 */
Kojto 101:7cff1c4259d7 230 #define SPI_NSS_SOFT SPI_CR1_SSM
Kojto 101:7cff1c4259d7 231 #define SPI_NSS_HARD_INPUT ((uint32_t)0x00000000)
Kojto 101:7cff1c4259d7 232 #define SPI_NSS_HARD_OUTPUT ((uint32_t)0x00040000)
Kojto 101:7cff1c4259d7 233 /**
Kojto 101:7cff1c4259d7 234 * @}
Kojto 101:7cff1c4259d7 235 */
Kojto 101:7cff1c4259d7 236
Kojto 101:7cff1c4259d7 237 /** @defgroup SPI_BaudRate_Prescaler SPI BaudRate Prescaler
Kojto 101:7cff1c4259d7 238 * @{
Kojto 101:7cff1c4259d7 239 */
Kojto 101:7cff1c4259d7 240 #define SPI_BAUDRATEPRESCALER_2 ((uint32_t)0x00000000)
Kojto 101:7cff1c4259d7 241 #define SPI_BAUDRATEPRESCALER_4 ((uint32_t)0x00000008)
Kojto 101:7cff1c4259d7 242 #define SPI_BAUDRATEPRESCALER_8 ((uint32_t)0x00000010)
Kojto 101:7cff1c4259d7 243 #define SPI_BAUDRATEPRESCALER_16 ((uint32_t)0x00000018)
Kojto 101:7cff1c4259d7 244 #define SPI_BAUDRATEPRESCALER_32 ((uint32_t)0x00000020)
Kojto 101:7cff1c4259d7 245 #define SPI_BAUDRATEPRESCALER_64 ((uint32_t)0x00000028)
Kojto 101:7cff1c4259d7 246 #define SPI_BAUDRATEPRESCALER_128 ((uint32_t)0x00000030)
Kojto 101:7cff1c4259d7 247 #define SPI_BAUDRATEPRESCALER_256 ((uint32_t)0x00000038)
Kojto 101:7cff1c4259d7 248 /**
Kojto 101:7cff1c4259d7 249 * @}
Kojto 101:7cff1c4259d7 250 */
Kojto 101:7cff1c4259d7 251
Kojto 101:7cff1c4259d7 252 /** @defgroup SPI_MSB_LSB_transmission SPI MSB LSB Transsmission
Kojto 101:7cff1c4259d7 253 * @{
Kojto 101:7cff1c4259d7 254 */
Kojto 101:7cff1c4259d7 255 #define SPI_FIRSTBIT_MSB ((uint32_t)0x00000000)
Kojto 101:7cff1c4259d7 256 #define SPI_FIRSTBIT_LSB SPI_CR1_LSBFIRST
Kojto 101:7cff1c4259d7 257 /**
Kojto 101:7cff1c4259d7 258 * @}
Kojto 101:7cff1c4259d7 259 */
Kojto 101:7cff1c4259d7 260
Kojto 101:7cff1c4259d7 261 /** @defgroup SPI_TI_mode SPI TI Mode
Kojto 101:7cff1c4259d7 262 * @{
Kojto 101:7cff1c4259d7 263 */
Kojto 101:7cff1c4259d7 264 #define SPI_TIMODE_DISABLE ((uint32_t)0x00000000)
Kojto 101:7cff1c4259d7 265 #define SPI_TIMODE_ENABLE SPI_CR2_FRF
Kojto 101:7cff1c4259d7 266 /**
Kojto 101:7cff1c4259d7 267 * @}
Kojto 101:7cff1c4259d7 268 */
Kojto 101:7cff1c4259d7 269
Kojto 101:7cff1c4259d7 270 /** @defgroup SPI_CRC_Calculation SPI CRC Calculation
Kojto 101:7cff1c4259d7 271 * @{
Kojto 101:7cff1c4259d7 272 */
Kojto 101:7cff1c4259d7 273 #define SPI_CRCCALCULATION_DISABLE ((uint32_t)0x00000000)
Kojto 101:7cff1c4259d7 274 #define SPI_CRCCALCULATION_ENABLE SPI_CR1_CRCEN
Kojto 101:7cff1c4259d7 275 /**
Kojto 101:7cff1c4259d7 276 * @}
Kojto 101:7cff1c4259d7 277 */
Kojto 101:7cff1c4259d7 278
Kojto 101:7cff1c4259d7 279 /** @defgroup SPI_Interrupt_definition SPI Interrupt Definition
Kojto 101:7cff1c4259d7 280 * @{
Kojto 101:7cff1c4259d7 281 */
Kojto 101:7cff1c4259d7 282 #define SPI_IT_TXE SPI_CR2_TXEIE
Kojto 101:7cff1c4259d7 283 #define SPI_IT_RXNE SPI_CR2_RXNEIE
Kojto 101:7cff1c4259d7 284 #define SPI_IT_ERR SPI_CR2_ERRIE
Kojto 101:7cff1c4259d7 285 /**
Kojto 101:7cff1c4259d7 286 * @}
Kojto 101:7cff1c4259d7 287 */
Kojto 101:7cff1c4259d7 288
Kojto 101:7cff1c4259d7 289 /** @defgroup SPI_Flags_definition SPI Flags Definition
Kojto 101:7cff1c4259d7 290 * @{
Kojto 101:7cff1c4259d7 291 */
Kojto 101:7cff1c4259d7 292 #define SPI_FLAG_RXNE SPI_SR_RXNE
Kojto 101:7cff1c4259d7 293 #define SPI_FLAG_TXE SPI_SR_TXE
Kojto 101:7cff1c4259d7 294 #define SPI_FLAG_CRCERR SPI_SR_CRCERR
Kojto 101:7cff1c4259d7 295 #define SPI_FLAG_MODF SPI_SR_MODF
Kojto 101:7cff1c4259d7 296 #define SPI_FLAG_OVR SPI_SR_OVR
Kojto 101:7cff1c4259d7 297 #define SPI_FLAG_BSY SPI_SR_BSY
Kojto 101:7cff1c4259d7 298 #define SPI_FLAG_FRE SPI_SR_FRE
Kojto 101:7cff1c4259d7 299 /**
Kojto 101:7cff1c4259d7 300 * @}
Kojto 101:7cff1c4259d7 301 */
Kojto 101:7cff1c4259d7 302
Kojto 101:7cff1c4259d7 303 /**
Kojto 101:7cff1c4259d7 304 * @}
Kojto 101:7cff1c4259d7 305 */
Kojto 101:7cff1c4259d7 306
Kojto 101:7cff1c4259d7 307 /* Exported macro ------------------------------------------------------------*/
Kojto 101:7cff1c4259d7 308 /** @defgroup SPI_Exported_Macros SPI Exported Macros
Kojto 101:7cff1c4259d7 309 * @{
Kojto 101:7cff1c4259d7 310 */
Kojto 101:7cff1c4259d7 311 /** @brief Reset SPI handle state
Kojto 101:7cff1c4259d7 312 * @param __HANDLE__: specifies the SPI handle.
Kojto 101:7cff1c4259d7 313 * This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral.
Kojto 101:7cff1c4259d7 314 * @retval None
Kojto 101:7cff1c4259d7 315 */
Kojto 101:7cff1c4259d7 316 #define __HAL_SPI_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_SPI_STATE_RESET)
Kojto 101:7cff1c4259d7 317
Kojto 101:7cff1c4259d7 318 /** @brief Enable or disable the specified SPI interrupts.
Kojto 101:7cff1c4259d7 319 * @param __HANDLE__: specifies the SPI handle.
Kojto 101:7cff1c4259d7 320 * This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral.
Kojto 101:7cff1c4259d7 321 * @param __INTERRUPT__: specifies the interrupt source to enable or disable.
Kojto 101:7cff1c4259d7 322 * This parameter can be one of the following values:
Kojto 101:7cff1c4259d7 323 * @arg SPI_IT_TXE: Tx buffer empty interrupt enable
Kojto 101:7cff1c4259d7 324 * @arg SPI_IT_RXNE: RX buffer not empty interrupt enable
Kojto 101:7cff1c4259d7 325 * @arg SPI_IT_ERR: Error interrupt enable
Kojto 101:7cff1c4259d7 326 * @retval None
Kojto 101:7cff1c4259d7 327 */
Kojto 101:7cff1c4259d7 328 #define __HAL_SPI_ENABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CR2 |= (__INTERRUPT__))
Kojto 101:7cff1c4259d7 329 #define __HAL_SPI_DISABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CR2 &= (~(__INTERRUPT__)))
Kojto 101:7cff1c4259d7 330
Kojto 101:7cff1c4259d7 331 /** @brief Check if the specified SPI interrupt source is enabled or disabled.
Kojto 101:7cff1c4259d7 332 * @param __HANDLE__: specifies the SPI handle.
Kojto 101:7cff1c4259d7 333 * This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral.
Kojto 101:7cff1c4259d7 334 * @param __INTERRUPT__: specifies the SPI interrupt source to check.
Kojto 101:7cff1c4259d7 335 * This parameter can be one of the following values:
Kojto 101:7cff1c4259d7 336 * @arg SPI_IT_TXE: Tx buffer empty interrupt enable
Kojto 101:7cff1c4259d7 337 * @arg SPI_IT_RXNE: RX buffer not empty interrupt enable
Kojto 101:7cff1c4259d7 338 * @arg SPI_IT_ERR: Error interrupt enable
Kojto 101:7cff1c4259d7 339 * @retval The new state of __IT__ (TRUE or FALSE).
Kojto 101:7cff1c4259d7 340 */
Kojto 101:7cff1c4259d7 341 #define __HAL_SPI_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->CR2 & (__INTERRUPT__)) == (__INTERRUPT__)) ? SET : RESET)
Kojto 101:7cff1c4259d7 342
Kojto 101:7cff1c4259d7 343 /** @brief Check whether the specified SPI flag is set or not.
Kojto 101:7cff1c4259d7 344 * @param __HANDLE__: specifies the SPI handle.
Kojto 101:7cff1c4259d7 345 * This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral.
Kojto 101:7cff1c4259d7 346 * @param __FLAG__: specifies the flag to check.
Kojto 101:7cff1c4259d7 347 * This parameter can be one of the following values:
Kojto 101:7cff1c4259d7 348 * @arg SPI_FLAG_RXNE: Receive buffer not empty flag
Kojto 101:7cff1c4259d7 349 * @arg SPI_FLAG_TXE: Transmit buffer empty flag
Kojto 101:7cff1c4259d7 350 * @arg SPI_FLAG_CRCERR: CRC error flag
Kojto 101:7cff1c4259d7 351 * @arg SPI_FLAG_MODF: Mode fault flag
Kojto 101:7cff1c4259d7 352 * @arg SPI_FLAG_OVR: Overrun flag
Kojto 101:7cff1c4259d7 353 * @arg SPI_FLAG_BSY: Busy flag
Kojto 101:7cff1c4259d7 354 * @arg SPI_FLAG_FRE: Frame format error flag
Kojto 101:7cff1c4259d7 355 * @retval The new state of __FLAG__ (TRUE or FALSE).
Kojto 101:7cff1c4259d7 356 */
Kojto 101:7cff1c4259d7 357 #define __HAL_SPI_GET_FLAG(__HANDLE__, __FLAG__) ((((__HANDLE__)->Instance->SR) & (__FLAG__)) == (__FLAG__))
Kojto 101:7cff1c4259d7 358
Kojto 101:7cff1c4259d7 359 /** @brief Clear the SPI CRCERR pending flag.
Kojto 101:7cff1c4259d7 360 * @param __HANDLE__: specifies the SPI handle.
Kojto 101:7cff1c4259d7 361 * This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral.
Kojto 101:7cff1c4259d7 362 * @retval None
Kojto 101:7cff1c4259d7 363 */
Kojto 101:7cff1c4259d7 364 #define __HAL_SPI_CLEAR_CRCERRFLAG(__HANDLE__) ((__HANDLE__)->Instance->SR = ~(SPI_FLAG_CRCERR))
Kojto 101:7cff1c4259d7 365
Kojto 101:7cff1c4259d7 366 /** @brief Clear the SPI MODF pending flag.
Kojto 101:7cff1c4259d7 367 * @param __HANDLE__: specifies the SPI handle.
Kojto 101:7cff1c4259d7 368 * This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral.
Kojto 101:7cff1c4259d7 369 * @retval None
Kojto 101:7cff1c4259d7 370 */
Kojto 101:7cff1c4259d7 371 #define __HAL_SPI_CLEAR_MODFFLAG(__HANDLE__) \
Kojto 101:7cff1c4259d7 372 do{ \
Kojto 101:7cff1c4259d7 373 __IO uint32_t tmpreg; \
Kojto 101:7cff1c4259d7 374 tmpreg = (__HANDLE__)->Instance->SR; \
Kojto 101:7cff1c4259d7 375 (__HANDLE__)->Instance->CR1 &= (~SPI_CR1_SPE); \
Kojto 101:7cff1c4259d7 376 UNUSED(tmpreg); \
Kojto 101:7cff1c4259d7 377 } while(0)
Kojto 101:7cff1c4259d7 378
Kojto 101:7cff1c4259d7 379 /** @brief Clear the SPI OVR pending flag.
Kojto 101:7cff1c4259d7 380 * @param __HANDLE__: specifies the SPI handle.
Kojto 101:7cff1c4259d7 381 * This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral.
Kojto 101:7cff1c4259d7 382 * @retval None
Kojto 101:7cff1c4259d7 383 */
Kojto 101:7cff1c4259d7 384 #define __HAL_SPI_CLEAR_OVRFLAG(__HANDLE__) \
Kojto 101:7cff1c4259d7 385 do{ \
Kojto 101:7cff1c4259d7 386 __IO uint32_t tmpreg; \
Kojto 101:7cff1c4259d7 387 tmpreg = (__HANDLE__)->Instance->DR; \
Kojto 101:7cff1c4259d7 388 tmpreg = (__HANDLE__)->Instance->SR; \
Kojto 101:7cff1c4259d7 389 UNUSED(tmpreg); \
Kojto 101:7cff1c4259d7 390 } while(0)
Kojto 101:7cff1c4259d7 391
Kojto 101:7cff1c4259d7 392 /** @brief Clear the SPI FRE pending flag.
Kojto 101:7cff1c4259d7 393 * @param __HANDLE__: specifies the SPI handle.
Kojto 101:7cff1c4259d7 394 * This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral.
Kojto 101:7cff1c4259d7 395 * @retval None
Kojto 101:7cff1c4259d7 396 */
Kojto 101:7cff1c4259d7 397 #define __HAL_SPI_CLEAR_FREFLAG(__HANDLE__) \
Kojto 101:7cff1c4259d7 398 do{ \
Kojto 101:7cff1c4259d7 399 __IO uint32_t tmpreg; \
Kojto 101:7cff1c4259d7 400 tmpreg = (__HANDLE__)->Instance->SR; \
Kojto 101:7cff1c4259d7 401 UNUSED(tmpreg); \
Kojto 101:7cff1c4259d7 402 }while(0)
Kojto 101:7cff1c4259d7 403
Kojto 101:7cff1c4259d7 404 /** @brief Enable SPI
Kojto 101:7cff1c4259d7 405 * @param __HANDLE__: specifies the SPI Handle.
Kojto 101:7cff1c4259d7 406 * @retval None
Kojto 101:7cff1c4259d7 407 */
Kojto 101:7cff1c4259d7 408 #define __HAL_SPI_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR1 |= SPI_CR1_SPE)
Kojto 101:7cff1c4259d7 409
Kojto 101:7cff1c4259d7 410 /** @brief Disable SPI
Kojto 101:7cff1c4259d7 411 * @param __HANDLE__: specifies the SPI Handle.
Kojto 101:7cff1c4259d7 412 * @retval None
Kojto 101:7cff1c4259d7 413 */
Kojto 101:7cff1c4259d7 414 #define __HAL_SPI_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR1 &= ~SPI_CR1_SPE)
Kojto 101:7cff1c4259d7 415 /**
Kojto 101:7cff1c4259d7 416 * @}
Kojto 101:7cff1c4259d7 417 */
Kojto 101:7cff1c4259d7 418
Kojto 101:7cff1c4259d7 419 /* Exported functions --------------------------------------------------------*/
Kojto 101:7cff1c4259d7 420 /** @addtogroup SPI_Exported_Functions
Kojto 101:7cff1c4259d7 421 * @{
Kojto 101:7cff1c4259d7 422 */
Kojto 101:7cff1c4259d7 423
Kojto 101:7cff1c4259d7 424 /** @addtogroup SPI_Exported_Functions_Group1
Kojto 101:7cff1c4259d7 425 * @{
Kojto 101:7cff1c4259d7 426 */
Kojto 101:7cff1c4259d7 427 /* Initialization/de-initialization functions **********************************/
Kojto 101:7cff1c4259d7 428 HAL_StatusTypeDef HAL_SPI_Init(SPI_HandleTypeDef *hspi);
Kojto 101:7cff1c4259d7 429 HAL_StatusTypeDef HAL_SPI_DeInit (SPI_HandleTypeDef *hspi);
Kojto 101:7cff1c4259d7 430 void HAL_SPI_MspInit(SPI_HandleTypeDef *hspi);
Kojto 101:7cff1c4259d7 431 void HAL_SPI_MspDeInit(SPI_HandleTypeDef *hspi);
Kojto 101:7cff1c4259d7 432 /**
Kojto 101:7cff1c4259d7 433 * @}
Kojto 101:7cff1c4259d7 434 */
Kojto 101:7cff1c4259d7 435
Kojto 101:7cff1c4259d7 436 /** @addtogroup SPI_Exported_Functions_Group2
Kojto 101:7cff1c4259d7 437 * @{
Kojto 101:7cff1c4259d7 438 */
Kojto 101:7cff1c4259d7 439 /* I/O operation functions *****************************************************/
Kojto 101:7cff1c4259d7 440 HAL_StatusTypeDef HAL_SPI_Transmit(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size, uint32_t Timeout);
Kojto 101:7cff1c4259d7 441 HAL_StatusTypeDef HAL_SPI_Receive(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size, uint32_t Timeout);
Kojto 101:7cff1c4259d7 442 HAL_StatusTypeDef HAL_SPI_TransmitReceive(SPI_HandleTypeDef *hspi, uint8_t *pTxData, uint8_t *pRxData, uint16_t Size, uint32_t Timeout);
Kojto 101:7cff1c4259d7 443 HAL_StatusTypeDef HAL_SPI_Transmit_IT(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size);
Kojto 101:7cff1c4259d7 444 HAL_StatusTypeDef HAL_SPI_Receive_IT(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size);
Kojto 101:7cff1c4259d7 445 HAL_StatusTypeDef HAL_SPI_TransmitReceive_IT(SPI_HandleTypeDef *hspi, uint8_t *pTxData, uint8_t *pRxData, uint16_t Size);
Kojto 101:7cff1c4259d7 446 HAL_StatusTypeDef HAL_SPI_Transmit_DMA(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size);
Kojto 101:7cff1c4259d7 447 HAL_StatusTypeDef HAL_SPI_Receive_DMA(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size);
Kojto 101:7cff1c4259d7 448 HAL_StatusTypeDef HAL_SPI_TransmitReceive_DMA(SPI_HandleTypeDef *hspi, uint8_t *pTxData, uint8_t *pRxData, uint16_t Size);
Kojto 101:7cff1c4259d7 449 HAL_StatusTypeDef HAL_SPI_DMAPause(SPI_HandleTypeDef *hspi);
Kojto 101:7cff1c4259d7 450 HAL_StatusTypeDef HAL_SPI_DMAResume(SPI_HandleTypeDef *hspi);
Kojto 101:7cff1c4259d7 451 HAL_StatusTypeDef HAL_SPI_DMAStop(SPI_HandleTypeDef *hspi);
Kojto 101:7cff1c4259d7 452
Kojto 101:7cff1c4259d7 453 void HAL_SPI_IRQHandler(SPI_HandleTypeDef *hspi);
Kojto 101:7cff1c4259d7 454 void HAL_SPI_TxCpltCallback(SPI_HandleTypeDef *hspi);
Kojto 101:7cff1c4259d7 455 void HAL_SPI_RxCpltCallback(SPI_HandleTypeDef *hspi);
Kojto 101:7cff1c4259d7 456 void HAL_SPI_TxRxCpltCallback(SPI_HandleTypeDef *hspi);
Kojto 101:7cff1c4259d7 457 void HAL_SPI_ErrorCallback(SPI_HandleTypeDef *hspi);
Kojto 101:7cff1c4259d7 458 void HAL_SPI_TxHalfCpltCallback(SPI_HandleTypeDef *hspi);
Kojto 101:7cff1c4259d7 459 void HAL_SPI_RxHalfCpltCallback(SPI_HandleTypeDef *hspi);
Kojto 101:7cff1c4259d7 460 void HAL_SPI_TxRxHalfCpltCallback(SPI_HandleTypeDef *hspi);
Kojto 101:7cff1c4259d7 461 /**
Kojto 101:7cff1c4259d7 462 * @}
Kojto 101:7cff1c4259d7 463 */
Kojto 101:7cff1c4259d7 464
Kojto 101:7cff1c4259d7 465 /** @addtogroup SPI_Exported_Functions_Group3
Kojto 101:7cff1c4259d7 466 * @{
Kojto 101:7cff1c4259d7 467 */
Kojto 101:7cff1c4259d7 468 /* Peripheral State and Control functions **************************************/
Kojto 101:7cff1c4259d7 469 HAL_SPI_StateTypeDef HAL_SPI_GetState(SPI_HandleTypeDef *hspi);
Kojto 101:7cff1c4259d7 470 uint32_t HAL_SPI_GetError(SPI_HandleTypeDef *hspi);
Kojto 101:7cff1c4259d7 471
Kojto 101:7cff1c4259d7 472 /**
Kojto 101:7cff1c4259d7 473 * @}
Kojto 101:7cff1c4259d7 474 */
Kojto 101:7cff1c4259d7 475
Kojto 101:7cff1c4259d7 476 /**
Kojto 101:7cff1c4259d7 477 * @}
Kojto 101:7cff1c4259d7 478 */
Kojto 101:7cff1c4259d7 479
Kojto 101:7cff1c4259d7 480 /* Private types -------------------------------------------------------------*/
Kojto 101:7cff1c4259d7 481 /* Private variables ---------------------------------------------------------*/
Kojto 101:7cff1c4259d7 482 /* Private constants ---------------------------------------------------------*/
Kojto 101:7cff1c4259d7 483 /** @defgroup SPI_Private_Constants SPI Private Constants
Kojto 101:7cff1c4259d7 484 * @{
Kojto 101:7cff1c4259d7 485 */
Kojto 101:7cff1c4259d7 486 /**
Kojto 101:7cff1c4259d7 487 * @}
Kojto 101:7cff1c4259d7 488 */
Kojto 101:7cff1c4259d7 489
Kojto 101:7cff1c4259d7 490 /* Private macros ------------------------------------------------------------*/
Kojto 101:7cff1c4259d7 491 /** @defgroup SPI_Private_Macros SPI Private Macros
Kojto 101:7cff1c4259d7 492 * @{
Kojto 101:7cff1c4259d7 493 */
Kojto 101:7cff1c4259d7 494
Kojto 101:7cff1c4259d7 495 #define IS_SPI_MODE(MODE) (((MODE) == SPI_MODE_SLAVE) || \
Kojto 101:7cff1c4259d7 496 ((MODE) == SPI_MODE_MASTER))
Kojto 101:7cff1c4259d7 497
Kojto 101:7cff1c4259d7 498
Kojto 101:7cff1c4259d7 499 #define IS_SPI_DIRECTION_MODE(MODE) (((MODE) == SPI_DIRECTION_2LINES) || \
Kojto 101:7cff1c4259d7 500 ((MODE) == SPI_DIRECTION_2LINES_RXONLY) || \
Kojto 101:7cff1c4259d7 501 ((MODE) == SPI_DIRECTION_1LINE))
Kojto 101:7cff1c4259d7 502
Kojto 101:7cff1c4259d7 503 #define IS_SPI_DIRECTION_2LINES_OR_1LINE(MODE) (((MODE) == SPI_DIRECTION_2LINES) || \
Kojto 101:7cff1c4259d7 504 ((MODE) == SPI_DIRECTION_1LINE))
Kojto 101:7cff1c4259d7 505
Kojto 101:7cff1c4259d7 506 #define IS_SPI_DIRECTION_2LINES(MODE) ((MODE) == SPI_DIRECTION_2LINES)
Kojto 101:7cff1c4259d7 507
Kojto 101:7cff1c4259d7 508 #define IS_SPI_DATASIZE(DATASIZE) (((DATASIZE) == SPI_DATASIZE_16BIT) || \
Kojto 101:7cff1c4259d7 509 ((DATASIZE) == SPI_DATASIZE_8BIT))
Kojto 101:7cff1c4259d7 510
Kojto 101:7cff1c4259d7 511 #define IS_SPI_CPOL(CPOL) (((CPOL) == SPI_POLARITY_LOW) || \
Kojto 101:7cff1c4259d7 512 ((CPOL) == SPI_POLARITY_HIGH))
Kojto 101:7cff1c4259d7 513
Kojto 101:7cff1c4259d7 514 #define IS_SPI_CPHA(CPHA) (((CPHA) == SPI_PHASE_1EDGE) || \
Kojto 101:7cff1c4259d7 515 ((CPHA) == SPI_PHASE_2EDGE))
Kojto 101:7cff1c4259d7 516
Kojto 101:7cff1c4259d7 517 #define IS_SPI_NSS(NSS) (((NSS) == SPI_NSS_SOFT) || \
Kojto 101:7cff1c4259d7 518 ((NSS) == SPI_NSS_HARD_INPUT) || \
Kojto 101:7cff1c4259d7 519 ((NSS) == SPI_NSS_HARD_OUTPUT))
Kojto 101:7cff1c4259d7 520
Kojto 101:7cff1c4259d7 521 #define IS_SPI_BAUDRATE_PRESCALER(PRESCALER) (((PRESCALER) == SPI_BAUDRATEPRESCALER_2) || \
Kojto 101:7cff1c4259d7 522 ((PRESCALER) == SPI_BAUDRATEPRESCALER_4) || \
Kojto 101:7cff1c4259d7 523 ((PRESCALER) == SPI_BAUDRATEPRESCALER_8) || \
Kojto 101:7cff1c4259d7 524 ((PRESCALER) == SPI_BAUDRATEPRESCALER_16) || \
Kojto 101:7cff1c4259d7 525 ((PRESCALER) == SPI_BAUDRATEPRESCALER_32) || \
Kojto 101:7cff1c4259d7 526 ((PRESCALER) == SPI_BAUDRATEPRESCALER_64) || \
Kojto 101:7cff1c4259d7 527 ((PRESCALER) == SPI_BAUDRATEPRESCALER_128) || \
Kojto 101:7cff1c4259d7 528 ((PRESCALER) == SPI_BAUDRATEPRESCALER_256))
Kojto 101:7cff1c4259d7 529
Kojto 101:7cff1c4259d7 530 #define IS_SPI_FIRST_BIT(BIT) (((BIT) == SPI_FIRSTBIT_MSB) || \
Kojto 101:7cff1c4259d7 531 ((BIT) == SPI_FIRSTBIT_LSB))
Kojto 101:7cff1c4259d7 532
Kojto 101:7cff1c4259d7 533 #define IS_SPI_TIMODE(MODE) (((MODE) == SPI_TIMODE_DISABLE) || \
Kojto 101:7cff1c4259d7 534 ((MODE) == SPI_TIMODE_ENABLE))
Kojto 101:7cff1c4259d7 535
Kojto 101:7cff1c4259d7 536 #define IS_SPI_CRC_CALCULATION(CALCULATION) (((CALCULATION) == SPI_CRCCALCULATION_DISABLE) || \
Kojto 101:7cff1c4259d7 537 ((CALCULATION) == SPI_CRCCALCULATION_ENABLE))
Kojto 101:7cff1c4259d7 538
Kojto 101:7cff1c4259d7 539 #define IS_SPI_CRC_POLYNOMIAL(POLYNOMIAL) (((POLYNOMIAL) >= 0x1) && ((POLYNOMIAL) <= 0xFFFF))
Kojto 101:7cff1c4259d7 540
Kojto 101:7cff1c4259d7 541 #define SPI_1LINE_TX(__HANDLE__) ((__HANDLE__)->Instance->CR1 |= SPI_CR1_BIDIOE)
Kojto 101:7cff1c4259d7 542
Kojto 101:7cff1c4259d7 543 #define SPI_1LINE_RX(__HANDLE__) ((__HANDLE__)->Instance->CR1 &= ~SPI_CR1_BIDIOE)
Kojto 101:7cff1c4259d7 544
Kojto 101:7cff1c4259d7 545 #define SPI_RESET_CRC(__HANDLE__) do{(__HANDLE__)->Instance->CR1 &= (~SPI_CR1_CRCEN);\
Kojto 101:7cff1c4259d7 546 (__HANDLE__)->Instance->CR1 |= SPI_CR1_CRCEN;}while(0)
Kojto 101:7cff1c4259d7 547 /**
Kojto 101:7cff1c4259d7 548 * @}
Kojto 101:7cff1c4259d7 549 */
Kojto 101:7cff1c4259d7 550
Kojto 101:7cff1c4259d7 551 /* Private functions ---------------------------------------------------------*/
Kojto 101:7cff1c4259d7 552 /** @defgroup SPI_Private_Functions SPI Private Functions
Kojto 101:7cff1c4259d7 553 * @{
Kojto 101:7cff1c4259d7 554 */
Kojto 101:7cff1c4259d7 555
Kojto 101:7cff1c4259d7 556 /**
Kojto 101:7cff1c4259d7 557 * @}
Kojto 101:7cff1c4259d7 558 */
Kojto 101:7cff1c4259d7 559
Kojto 101:7cff1c4259d7 560 /**
Kojto 101:7cff1c4259d7 561 * @}
Kojto 101:7cff1c4259d7 562 */
Kojto 101:7cff1c4259d7 563
Kojto 101:7cff1c4259d7 564 /**
Kojto 101:7cff1c4259d7 565 * @}
Kojto 101:7cff1c4259d7 566 */
Kojto 101:7cff1c4259d7 567
Kojto 101:7cff1c4259d7 568
Kojto 101:7cff1c4259d7 569 #ifdef __cplusplus
Kojto 101:7cff1c4259d7 570 }
Kojto 101:7cff1c4259d7 571 #endif
Kojto 101:7cff1c4259d7 572
Kojto 101:7cff1c4259d7 573 #endif /* __STM32F4xx_HAL_SPI_H */
Kojto 101:7cff1c4259d7 574
Kojto 101:7cff1c4259d7 575 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/