mbed official / mbed

Important changes to repositories hosted on mbed.com

Mbed hosted mercurial repositories are deprecated and are due to be permanently deleted in July 2026.

To keep a copy of this software download the repository Zip archive or clone locally using Mercurial.

It is also possible to export all your personal repositories from the account settings page.

Dependents:   hello SerialTestv11 SerialTestv12 Sierpinski ... more

TARGET_MAX32630FTHR/TARGET_Maxim/TARGET_MAX32630/mxc/gpio.h@135:176b8275d35d, 2017-02-02 (annotated)

Committer:
<>
Date:
Thu Feb 02 16:02:30 2017 +0000
Revision:
135:176b8275d35d
Release 135 of the mbed library



Ports for Upcoming Targets



3571: DISCO_F769NI introduction https://github.com/ARMmbed/mbed-os/pull/3571

3605: Add DELTA_DFCM_NNN50 platform https://github.com/ARMmbed/mbed-os/pull/3605

3640: [MAX32630FTHR] Adding new platform https://github.com/ARMmbed/mbed-os/pull/3640



Fixes and Changes



3397: Add uVisor support for the DISCO_F429ZI https://github.com/ARMmbed/mbed-os/pull/3397

3573: fix failing RTC initialization for MTS_DRAGONFLY_F411RE https://github.com/ARMmbed/mbed-os/pull/3573

3575: Dev stm factorize gpio https://github.com/ARMmbed/mbed-os/pull/3575

3584: STM32: make PeripheralPins.h a common file https://github.com/ARMmbed/mbed-os/pull/3584

3583: STM32F7 Cube FW new release v1.5.1 https://github.com/ARMmbed/mbed-os/pull/3583

3578: Target system - Inherit names from target parents https://github.com/ARMmbed/mbed-os/pull/3578

3599: K22F: Enable TRNG https://github.com/ARMmbed/mbed-os/pull/3599

3614: STM32: make PortNames.h a common file https://github.com/ARMmbed/mbed-os/pull/3614

3617: EFM32GG: Fix GCC_ARM linker script https://github.com/ARMmbed/mbed-os/pull/3617

3618: STM32: Move types definitions to a common file https://github.com/ARMmbed/mbed-os/pull/3618

3631: F3 CUBE update V1.7.0 https://github.com/ARMmbed/mbed-os/pull/3631

3635: STM32 I2C : Fix bug in i2c_byte_read function https://github.com/ARMmbed/mbed-os/pull/3635

3651: Max32630 - fix LED4 https://github.com/ARMmbed/mbed-os/pull/3651

Who changed what in which revision?

UserRevisionLine numberNew contents of line
<> 135:176b8275d35d 1 /**
<> 135:176b8275d35d 2 * @file
<> 135:176b8275d35d 3 * @brief General-Purpose Input/Output (GPIO) function prototypes and data types.
<> 135:176b8275d35d 4 */
<> 135:176b8275d35d 5
<> 135:176b8275d35d 6 /* ****************************************************************************
<> 135:176b8275d35d 7 * Copyright (C) 2016 Maxim Integrated Products, Inc., All Rights Reserved.
<> 135:176b8275d35d 8 *
<> 135:176b8275d35d 9 * Permission is hereby granted, free of charge, to any person obtaining a
<> 135:176b8275d35d 10 * copy of this software and associated documentation files (the "Software"),
<> 135:176b8275d35d 11 * to deal in the Software without restriction, including without limitation
<> 135:176b8275d35d 12 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
<> 135:176b8275d35d 13 * and/or sell copies of the Software, and to permit persons to whom the
<> 135:176b8275d35d 14 * Software is furnished to do so, subject to the following conditions:
<> 135:176b8275d35d 15 *
<> 135:176b8275d35d 16 * The above copyright notice and this permission notice shall be included
<> 135:176b8275d35d 17 * in all copies or substantial portions of the Software.
<> 135:176b8275d35d 18 *
<> 135:176b8275d35d 19 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
<> 135:176b8275d35d 20 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
<> 135:176b8275d35d 21 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
<> 135:176b8275d35d 22 * IN NO EVENT SHALL MAXIM INTEGRATED BE LIABLE FOR ANY CLAIM, DAMAGES
<> 135:176b8275d35d 23 * OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
<> 135:176b8275d35d 24 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
<> 135:176b8275d35d 25 * OTHER DEALINGS IN THE SOFTWARE.
<> 135:176b8275d35d 26 *
<> 135:176b8275d35d 27 * Except as contained in this notice, the name of Maxim Integrated
<> 135:176b8275d35d 28 * Products, Inc. shall not be used except as stated in the Maxim Integrated
<> 135:176b8275d35d 29 * Products, Inc. Branding Policy.
<> 135:176b8275d35d 30 *
<> 135:176b8275d35d 31 * The mere transfer of this software does not imply any licenses
<> 135:176b8275d35d 32 * of trade secrets, proprietary technology, copyrights, patents,
<> 135:176b8275d35d 33 * trademarks, maskwork rights, or any other form of intellectual
<> 135:176b8275d35d 34 * property whatsoever. Maxim Integrated Products, Inc. retains all
<> 135:176b8275d35d 35 * ownership rights.
<> 135:176b8275d35d 36 *
<> 135:176b8275d35d 37 * $Date: 2016-10-10 18:56:06 -0500 (Mon, 10 Oct 2016) $
<> 135:176b8275d35d 38 * $Revision: 24659 $
<> 135:176b8275d35d 39 *
<> 135:176b8275d35d 40 *************************************************************************** */
<> 135:176b8275d35d 41
<> 135:176b8275d35d 42 /* Define to prevent redundant inclusion */
<> 135:176b8275d35d 43 #ifndef _GPIO_H_
<> 135:176b8275d35d 44 #define _GPIO_H_
<> 135:176b8275d35d 45
<> 135:176b8275d35d 46 /* **** Includes **** */
<> 135:176b8275d35d 47 #include "mxc_config.h"
<> 135:176b8275d35d 48 #include "gpio_regs.h"
<> 135:176b8275d35d 49
<> 135:176b8275d35d 50 #ifdef __cplusplus
<> 135:176b8275d35d 51 extern "C" {
<> 135:176b8275d35d 52 #endif
<> 135:176b8275d35d 53
<> 135:176b8275d35d 54 // Doxy group definition for this peripheral module
<> 135:176b8275d35d 55 /**
<> 135:176b8275d35d 56 * @ingroup periphlibs
<> 135:176b8275d35d 57 * @defgroup gpio General-Purpose Input/Output (GPIO)
<> 135:176b8275d35d 58 * @{
<> 135:176b8275d35d 59 */
<> 135:176b8275d35d 60
<> 135:176b8275d35d 61 /* **** Definitions **** */
<> 135:176b8275d35d 62 /**
<> 135:176b8275d35d 63 * @defgroup gpio_port_pin Port and Pin Definitions
<> 135:176b8275d35d 64 * @ingroup gpio
<> 135:176b8275d35d 65 * @{
<> 135:176b8275d35d 66 * @defgroup gpio_port Port Definitions
<> 135:176b8275d35d 67 * @ingroup gpio_port_pin
<> 135:176b8275d35d 68 * @{
<> 135:176b8275d35d 69 */
<> 135:176b8275d35d 70 #define PORT_0 (0) /**< Port 0 Define*/
<> 135:176b8275d35d 71 #define PORT_1 (1) /**< Port 1 Define*/
<> 135:176b8275d35d 72 #define PORT_2 (2) /**< Port 2 Define*/
<> 135:176b8275d35d 73 #define PORT_3 (3) /**< Port 3 Define*/
<> 135:176b8275d35d 74 #define PORT_4 (4) /**< Port 4 Define*/
<> 135:176b8275d35d 75 #define PORT_5 (5) /**< Port 5 Define*/
<> 135:176b8275d35d 76 #define PORT_6 (6) /**< Port 6 Define*/
<> 135:176b8275d35d 77 #define PORT_7 (7) /**< Port 7 Define*/
<> 135:176b8275d35d 78 #define PORT_8 (8) /**< Port 8 Define*/
<> 135:176b8275d35d 79 #define PORT_9 (9) /**< Port 9 Define*/
<> 135:176b8275d35d 80 #define PORT_10 (10) /**< Port 10 Define*/
<> 135:176b8275d35d 81 #define PORT_11 (11) /**< Port 11 Define*/
<> 135:176b8275d35d 82 #define PORT_12 (12) /**< Port 12 Define*/
<> 135:176b8275d35d 83 #define PORT_13 (13) /**< Port 13 Define*/
<> 135:176b8275d35d 84 #define PORT_14 (14) /**< Port 14 Define*/
<> 135:176b8275d35d 85 #define PORT_15 (15) /**< Port 15 Define*/
<> 135:176b8275d35d 86 /**@} end of gpio_port group*/
<> 135:176b8275d35d 87 /**
<> 135:176b8275d35d 88 * @defgroup gpio_pin Pin Definitions
<> 135:176b8275d35d 89 * @ingroup gpio_port_pin
<> 135:176b8275d35d 90 * @{
<> 135:176b8275d35d 91 */
<> 135:176b8275d35d 92 #define PIN_0 (1 << 0) /**< Pin 0 Define */
<> 135:176b8275d35d 93 #define PIN_1 (1 << 1) /**< Pin 1 Define */
<> 135:176b8275d35d 94 #define PIN_2 (1 << 2) /**< Pin 2 Define */
<> 135:176b8275d35d 95 #define PIN_3 (1 << 3) /**< Pin 3 Define */
<> 135:176b8275d35d 96 #define PIN_4 (1 << 4) /**< Pin 4 Define */
<> 135:176b8275d35d 97 #define PIN_5 (1 << 5) /**< Pin 5 Define */
<> 135:176b8275d35d 98 #define PIN_6 (1 << 6) /**< Pin 6 Define */
<> 135:176b8275d35d 99 #define PIN_7 (1 << 7) /**< Pin 7 Define */
<> 135:176b8275d35d 100 /**@} end of gpio_pin group */
<> 135:176b8275d35d 101 /**@} end of gpio_port_pin group */
<> 135:176b8275d35d 102
<> 135:176b8275d35d 103 /**
<> 135:176b8275d35d 104 * Enumeration type for the GPIO Function Type
<> 135:176b8275d35d 105 */
<> 135:176b8275d35d 106 typedef enum {
<> 135:176b8275d35d 107 GPIO_FUNC_GPIO = MXC_V_GPIO_FUNC_SEL_MODE_GPIO, /**< GPIO Function Selection */
<> 135:176b8275d35d 108 GPIO_FUNC_PT = MXC_V_GPIO_FUNC_SEL_MODE_PT, /**< Pulse Train Function Selection */
<> 135:176b8275d35d 109 GPIO_FUNC_TMR = MXC_V_GPIO_FUNC_SEL_MODE_TMR /**< Timer Function Selection */
<> 135:176b8275d35d 110 }
<> 135:176b8275d35d 111 gpio_func_t;
<> 135:176b8275d35d 112
<> 135:176b8275d35d 113 /**
<> 135:176b8275d35d 114 * Enumeration type for the type of GPIO pad on a given pin.
<> 135:176b8275d35d 115 */
<> 135:176b8275d35d 116 typedef enum {
<> 135:176b8275d35d 117 GPIO_PAD_INPUT_PULLUP = MXC_V_GPIO_OUT_MODE_HIGH_Z_WEAK_PULLUP, /**< Set pad to high impedance, weak pull-up */
<> 135:176b8275d35d 118 GPIO_PAD_OPEN_DRAIN = MXC_V_GPIO_OUT_MODE_OPEN_DRAIN, /**< Set pad to open-drain with high impedance with input buffer */
<> 135:176b8275d35d 119 GPIO_PAD_OPEN_DRAIN_PULLUP = MXC_V_GPIO_OUT_MODE_OPEN_DRAIN_WEAK_PULLUP, /**< Set pad to open-drain with weak pull-up */
<> 135:176b8275d35d 120 GPIO_PAD_INPUT = MXC_V_GPIO_OUT_MODE_NORMAL_HIGH_Z, /**< Set pad to high impednace, input buffer enabled */
<> 135:176b8275d35d 121 GPIO_PAD_NORMAL = MXC_V_GPIO_OUT_MODE_NORMAL, /**< Set pad to normal drive mode for high an low output */
<> 135:176b8275d35d 122 GPIO_PAD_SLOW = MXC_V_GPIO_OUT_MODE_SLOW_DRIVE, /**< Set pad to slow drive mode, which is normal mode with negative feedback to slow edge transitions */
<> 135:176b8275d35d 123 GPIO_PAD_FAST = MXC_V_GPIO_OUT_MODE_FAST_DRIVE, /**< Set pad to fash drive mode, which is normal mode with a transistor drive to drive fast high and low */
<> 135:176b8275d35d 124 GPIO_PAD_INPUT_PULLDOWN = MXC_V_GPIO_OUT_MODE_HIGH_Z_WEAK_PULLDOWN, /**< Set pad to weak pulldown mode */
<> 135:176b8275d35d 125 GPIO_PAD_OPEN_SOURCE = MXC_V_GPIO_OUT_MODE_OPEN_SOURCE, /**< Set pad to open source mode, transistor drive to high */
<> 135:176b8275d35d 126 GPIO_PAD_OPEN_SOURCE_PULLDOWN = MXC_V_GPIO_OUT_MODE_OPEN_SOURCE_WEAK_PULLDOWN /**< Set pad to open source with weak pulldown mode, transistor drive to high, weak pulldown to GND for low */
<> 135:176b8275d35d 127 } gpio_pad_t;
<> 135:176b8275d35d 128
<> 135:176b8275d35d 129 /**
<> 135:176b8275d35d 130 * Structure type for configuring a GPIO port.
<> 135:176b8275d35d 131 */
<> 135:176b8275d35d 132 typedef struct {
<> 135:176b8275d35d 133 uint32_t port; /// Index of GPIO port
<> 135:176b8275d35d 134 uint32_t mask; /// Pin mask. Multiple bits can be set.
<> 135:176b8275d35d 135 gpio_func_t func; /// Function type
<> 135:176b8275d35d 136 gpio_pad_t pad; /// Pad type
<> 135:176b8275d35d 137 } gpio_cfg_t;
<> 135:176b8275d35d 138
<> 135:176b8275d35d 139 /**
<> 135:176b8275d35d 140 * Enumeration type for the interrupt type on a GPIO port.
<> 135:176b8275d35d 141 */
<> 135:176b8275d35d 142 typedef enum {
<> 135:176b8275d35d 143 GPIO_INT_DISABLE = MXC_V_GPIO_INT_MODE_DISABLE, /**< Disable interrupts */
<> 135:176b8275d35d 144 GPIO_INT_FALLING_EDGE = MXC_V_GPIO_INT_MODE_FALLING_EDGE, /**< Interrupt on Falling Edge */
<> 135:176b8275d35d 145 GPIO_INT_RISING_EDGE = MXC_V_GPIO_INT_MODE_RISING_EDGE, /**< Interrupt on Rising Edge */
<> 135:176b8275d35d 146 GPIO_INT_ANY_EDGE = MXC_V_GPIO_INT_MODE_ANY_EDGE, /**< Interrupt on Falling or Rising Edge */
<> 135:176b8275d35d 147 GPIO_INT_LOW_LEVEL = MXC_V_GPIO_INT_MODE_LOW_LVL, /**< Interrupt on a low level input detection */
<> 135:176b8275d35d 148 GPIO_INT_HIGH_LEVEL = MXC_V_GPIO_INT_MODE_HIGH_LVL /**< Interrupt on a high level input detection */
<> 135:176b8275d35d 149 } gpio_int_mode_t;
<> 135:176b8275d35d 150
<> 135:176b8275d35d 151 /* **** Function Prototypes **** */
<> 135:176b8275d35d 152
<> 135:176b8275d35d 153 /**
<> 135:176b8275d35d 154 * @brief Configure GPIO pin(s).
<> 135:176b8275d35d 155 * @param cfg Pointer to configuration structure describing the pin.
<> 135:176b8275d35d 156 *
<> 135:176b8275d35d 157 * @return #E_NO_ERROR if everything is successful.
<> 135:176b8275d35d 158 *
<> 135:176b8275d35d 159 */
<> 135:176b8275d35d 160 int GPIO_Config(const gpio_cfg_t *cfg);
<> 135:176b8275d35d 161
<> 135:176b8275d35d 162 /**
<> 135:176b8275d35d 163 * @brief Gets the pin(s) input state.
<> 135:176b8275d35d 164 * @param cfg Pointer to configuration structure describing the pin.
<> 135:176b8275d35d 165 *
<> 135:176b8275d35d 166 * @return The requested pin state.
<> 135:176b8275d35d 167 *
<> 135:176b8275d35d 168 */
<> 135:176b8275d35d 169 __STATIC_INLINE uint32_t GPIO_InGet(const gpio_cfg_t *cfg)
<> 135:176b8275d35d 170 {
<> 135:176b8275d35d 171 return (MXC_GPIO->in_val[cfg->port] & cfg->mask);
<> 135:176b8275d35d 172 }
<> 135:176b8275d35d 173
<> 135:176b8275d35d 174 /**
<> 135:176b8275d35d 175 * @brief Sets the pin(s) to a high level output.
<> 135:176b8275d35d 176 * @param cfg Pointer to configuration structure describing the pin.
<> 135:176b8275d35d 177 *
<> 135:176b8275d35d 178 */
<> 135:176b8275d35d 179 __STATIC_INLINE void GPIO_OutSet(const gpio_cfg_t *cfg)
<> 135:176b8275d35d 180 {
<> 135:176b8275d35d 181 MXC_GPIO->out_val[cfg->port] |= cfg->mask;
<> 135:176b8275d35d 182 }
<> 135:176b8275d35d 183
<> 135:176b8275d35d 184 /**
<> 135:176b8275d35d 185 * @brief Clears the pin(s) to a low level output.
<> 135:176b8275d35d 186 * @param cfg Pointer to configuration structure describing the pin.
<> 135:176b8275d35d 187 *
<> 135:176b8275d35d 188 */
<> 135:176b8275d35d 189 __STATIC_INLINE void GPIO_OutClr(const gpio_cfg_t *cfg)
<> 135:176b8275d35d 190 {
<> 135:176b8275d35d 191 MXC_GPIO->out_val[cfg->port] &= ~(cfg->mask);
<> 135:176b8275d35d 192 }
<> 135:176b8275d35d 193
<> 135:176b8275d35d 194 /**
<> 135:176b8275d35d 195 * @brief Gets the pin(s) output state.
<> 135:176b8275d35d 196 * @param cfg Pointer to configuration structure describing the pin.
<> 135:176b8275d35d 197 *
<> 135:176b8275d35d 198 * @return The state of the requested pin.
<> 135:176b8275d35d 199 *
<> 135:176b8275d35d 200 */
<> 135:176b8275d35d 201 __STATIC_INLINE uint32_t GPIO_OutGet(const gpio_cfg_t *cfg)
<> 135:176b8275d35d 202 {
<> 135:176b8275d35d 203 return (MXC_GPIO->out_val[cfg->port] & cfg->mask);
<> 135:176b8275d35d 204 }
<> 135:176b8275d35d 205
<> 135:176b8275d35d 206 /**
<> 135:176b8275d35d 207 * @brief Write the pin(s) to a desired output level.
<> 135:176b8275d35d 208 * @param cfg Pointer to configuration structure describing the pin.
<> 135:176b8275d35d 209 * @param val Desired output level of the pin(s). This will be masked
<> 135:176b8275d35d 210 * with the configuration mask.
<> 135:176b8275d35d 211 *
<> 135:176b8275d35d 212 */
<> 135:176b8275d35d 213 __STATIC_INLINE void GPIO_OutPut(const gpio_cfg_t *cfg, uint32_t val)
<> 135:176b8275d35d 214 {
<> 135:176b8275d35d 215 MXC_GPIO->out_val[cfg->port] = (MXC_GPIO->out_val[cfg->port] & ~cfg->mask) | (val & cfg->mask);
<> 135:176b8275d35d 216 }
<> 135:176b8275d35d 217
<> 135:176b8275d35d 218 /**
<> 135:176b8275d35d 219 * @brief Toggles the the pin(s) output level.
<> 135:176b8275d35d 220 * @param cfg Pointer to configuration structure describing the pin.
<> 135:176b8275d35d 221 *
<> 135:176b8275d35d 222 */
<> 135:176b8275d35d 223 __STATIC_INLINE void GPIO_OutToggle(const gpio_cfg_t *cfg)
<> 135:176b8275d35d 224 {
<> 135:176b8275d35d 225 MXC_GPIO->out_val[cfg->port] ^= cfg->mask;
<> 135:176b8275d35d 226 }
<> 135:176b8275d35d 227
<> 135:176b8275d35d 228 /**
<> 135:176b8275d35d 229 * @brief Configure GPIO interrupt(s)
<> 135:176b8275d35d 230 * @param cfg Pointer to configuration structure describing the pin.
<> 135:176b8275d35d 231 * @param mode Requested interrupt mode.
<> 135:176b8275d35d 232 *
<> 135:176b8275d35d 233 */
<> 135:176b8275d35d 234 void GPIO_IntConfig(const gpio_cfg_t *cfg, gpio_int_mode_t mode);
<> 135:176b8275d35d 235
<> 135:176b8275d35d 236 /**
<> 135:176b8275d35d 237 * @brief Enables the specified GPIO interrupt
<> 135:176b8275d35d 238 * @param cfg Pointer to configuration structure describing the pin.
<> 135:176b8275d35d 239 *
<> 135:176b8275d35d 240 */
<> 135:176b8275d35d 241 __STATIC_INLINE void GPIO_IntEnable(const gpio_cfg_t *cfg)
<> 135:176b8275d35d 242 {
<> 135:176b8275d35d 243 MXC_GPIO->inten[cfg->port] |= cfg->mask;
<> 135:176b8275d35d 244 }
<> 135:176b8275d35d 245
<> 135:176b8275d35d 246 /**
<> 135:176b8275d35d 247 * @brief Disables the specified GPIO interrupt.
<> 135:176b8275d35d 248 * @param cfg Pointer to configuration structure describing the pin.
<> 135:176b8275d35d 249 *
<> 135:176b8275d35d 250 */
<> 135:176b8275d35d 251 __STATIC_INLINE void GPIO_IntDisable(const gpio_cfg_t *cfg)
<> 135:176b8275d35d 252 {
<> 135:176b8275d35d 253 MXC_GPIO->inten[cfg->port] &= ~cfg->mask;
<> 135:176b8275d35d 254 }
<> 135:176b8275d35d 255
<> 135:176b8275d35d 256 /**
<> 135:176b8275d35d 257 * @brief Gets the interrupt(s) status on a GPIO pin.
<> 135:176b8275d35d 258 * @param cfg Pointer to configuration structure describing the pin
<> 135:176b8275d35d 259 * for which the status is being requested.
<> 135:176b8275d35d 260 *
<> 135:176b8275d35d 261 * @return The requested interrupt status.
<> 135:176b8275d35d 262 *
<> 135:176b8275d35d 263 */
<> 135:176b8275d35d 264 __STATIC_INLINE uint32_t GPIO_IntStatus(const gpio_cfg_t *cfg)
<> 135:176b8275d35d 265 {
<> 135:176b8275d35d 266 return (MXC_GPIO->intfl[cfg->port] & cfg->mask);
<> 135:176b8275d35d 267 }
<> 135:176b8275d35d 268
<> 135:176b8275d35d 269 /**
<> 135:176b8275d35d 270 * @brief Clears the interrupt(s) status on a GPIO pin.
<> 135:176b8275d35d 271 * @param cfg Pointer to configuration structure describing the pin
<> 135:176b8275d35d 272 * to clear the interrupt state of.
<> 135:176b8275d35d 273 *
<> 135:176b8275d35d 274 */
<> 135:176b8275d35d 275 __STATIC_INLINE void GPIO_IntClr(const gpio_cfg_t *cfg)
<> 135:176b8275d35d 276 {
<> 135:176b8275d35d 277 MXC_GPIO->intfl[cfg->port] = cfg->mask;
<> 135:176b8275d35d 278 }
<> 135:176b8275d35d 279
<> 135:176b8275d35d 280 /**
<> 135:176b8275d35d 281 * @brief Type alias for a GPIO callback function with prototype:
<> 135:176b8275d35d 282 * @code
<> 135:176b8275d35d 283 * void callback_fn(void *cbdata);
<> 135:176b8275d35d 284 * @endcode
<> 135:176b8275d35d 285 * @param cbdata A void pointer to the data type as registered when
<> 135:176b8275d35d 286 * @c GPIO_RegisterCallback() was called.
<> 135:176b8275d35d 287 *
<> 135:176b8275d35d 288 */
<> 135:176b8275d35d 289 typedef void (*gpio_callback_fn)(void *cbdata);
<> 135:176b8275d35d 290
<> 135:176b8275d35d 291 /**
<> 135:176b8275d35d 292 * @brief Registers a callback for the interrupt on a given port and pin.
<> 135:176b8275d35d 293 * @param cfg Pointer to configuration structure describing the pin
<> 135:176b8275d35d 294 * @param callback A pointer to a function of type #gpio_callback_fn.
<> 135:176b8275d35d 295 * @param cbdata The parameter to be passed to the callback function, #gpio_callback_fn, when an interrupt occurs.
<> 135:176b8275d35d 296 *
<> 135:176b8275d35d 297 */
<> 135:176b8275d35d 298 void GPIO_RegisterCallback(const gpio_cfg_t *cfg, gpio_callback_fn callback, void *cbdata);
<> 135:176b8275d35d 299
<> 135:176b8275d35d 300 /**
<> 135:176b8275d35d 301 * @brief GPIO IRQ Handler. @note If a callback is registered for a given
<> 135:176b8275d35d 302 * interrupt, the callback function will be called.
<> 135:176b8275d35d 303 *
<> 135:176b8275d35d 304 * @param port number of the port that generated the interrupt service routine.
<> 135:176b8275d35d 305 *
<> 135:176b8275d35d 306 */
<> 135:176b8275d35d 307 void GPIO_Handler(unsigned int port);
<> 135:176b8275d35d 308
<> 135:176b8275d35d 309 /**@} end of group gpio */
<> 135:176b8275d35d 310
<> 135:176b8275d35d 311 #ifdef __cplusplus
<> 135:176b8275d35d 312 }
<> 135:176b8275d35d 313 #endif
<> 135:176b8275d35d 314
<> 135:176b8275d35d 315 #endif /* _GPIO_H_ */