mbed official / mbed

Dependents:   hello SerialTestv11 SerialTestv12 Sierpinski ... more

Committer:
<>
Date:
Tue Nov 08 17:28:34 2016 +0000
Revision:
129:0ab6a29f35bf
Parent:
128:9bcdf88f62b0
Release 129 of the mbed library

Ports for Upcoming Targets

3011: Add u-blox Sara-N target. https://github.com/ARMmbed/mbed-os/pull/3011
3099: MAX32625 https://github.com/ARMmbed/mbed-os/pull/3099
3151: Add support for FRDM-K82F https://github.com/ARMmbed/mbed-os/pull/3151
3177: New mcu k22512 fixing pr 3136 https://github.com/ARMmbed/mbed-os/pull/3177

Fixes and Changes

3008: NUCLEO_F072RB: Fix wrong timer channel number on pwm PB_5 pin https://github.com/ARMmbed/mbed-os/pull/3008
3013: STM32xx - Change how the ADC internal pins are checked before pinmap_ https://github.com/ARMmbed/mbed-os/pull/3013
3041: [nRF5] - added implementation of API of serial port flow control configuration. https://github.com/ARMmbed/mbed-os/pull/3041
3084: [nrf5] fix in Digital I/O : a gpioe pin was uninitialized badly https://github.com/ARMmbed/mbed-os/pull/3084
3009: TRNG enabled. TRNG APIs implemented. REV A/B/C/D flags removed. Warnings removed https://github.com/ARMmbed/mbed-os/pull/3009
3074: Target stm init gcc alignement https://github.com/ARMmbed/mbed-os/pull/3074
2988: Update of can_api.c fixing #2987 https://github.com/ARMmbed/mbed-os/pull/2988
3173: [Exporters] Add a device_name to microbit entry in targets.json https://github.com/ARMmbed/mbed-os/pull/3173
2969: [nRF52] - switch irq priorities of driver handlers to the lowest level https://github.com/ARMmbed/mbed-os/pull/2969
3184: #3183 Compiler warning in trng_api.c with K64F https://github.com/ARMmbed/mbed-os/pull/3184
3104: [NuMaker] Support CAN and fix PWM CLK error https://github.com/ARMmbed/mbed-os/pull/3104
3186: MultiTech mDot - add back SPI3 pins https://github.com/ARMmbed/mbed-os/pull/3186
3075: nsapi - Add standardized return types for size and errors https://github.com/ARMmbed/mbed-os/pull/3075
3221: u-blox odin w2 drivers update https://github.com/ARMmbed/mbed-os/pull/3221

Who changed what in which revision?

UserRevisionLine numberNew contents of line
AnnaBridge 126:abea610beb85 1 /*
AnnaBridge 126:abea610beb85 2 * Copyright (c) 2015 Nordic Semiconductor ASA
AnnaBridge 126:abea610beb85 3 * All rights reserved.
AnnaBridge 126:abea610beb85 4 *
AnnaBridge 126:abea610beb85 5 * Redistribution and use in source and binary forms, with or without modification,
AnnaBridge 126:abea610beb85 6 * are permitted provided that the following conditions are met:
AnnaBridge 126:abea610beb85 7 *
AnnaBridge 126:abea610beb85 8 * 1. Redistributions of source code must retain the above copyright notice, this list
AnnaBridge 126:abea610beb85 9 * of conditions and the following disclaimer.
AnnaBridge 126:abea610beb85 10 *
AnnaBridge 126:abea610beb85 11 * 2. Redistributions in binary form, except as embedded into a Nordic Semiconductor ASA
AnnaBridge 126:abea610beb85 12 * integrated circuit in a product or a software update for such product, must reproduce
AnnaBridge 126:abea610beb85 13 * the above copyright notice, this list of conditions and the following disclaimer in
AnnaBridge 126:abea610beb85 14 * the documentation and/or other materials provided with the distribution.
AnnaBridge 126:abea610beb85 15 *
AnnaBridge 126:abea610beb85 16 * 3. Neither the name of Nordic Semiconductor ASA nor the names of its contributors may be
AnnaBridge 126:abea610beb85 17 * used to endorse or promote products derived from this software without specific prior
AnnaBridge 126:abea610beb85 18 * written permission.
AnnaBridge 126:abea610beb85 19 *
AnnaBridge 126:abea610beb85 20 * 4. This software, with or without modification, must only be used with a
AnnaBridge 126:abea610beb85 21 * Nordic Semiconductor ASA integrated circuit.
AnnaBridge 126:abea610beb85 22 *
AnnaBridge 126:abea610beb85 23 * 5. Any software provided in binary or object form under this license must not be reverse
AnnaBridge 126:abea610beb85 24 * engineered, decompiled, modified and/or disassembled.
AnnaBridge 126:abea610beb85 25 *
AnnaBridge 126:abea610beb85 26 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
AnnaBridge 126:abea610beb85 27 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
AnnaBridge 126:abea610beb85 28 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
AnnaBridge 126:abea610beb85 29 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
AnnaBridge 126:abea610beb85 30 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
AnnaBridge 126:abea610beb85 31 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
AnnaBridge 126:abea610beb85 32 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
AnnaBridge 126:abea610beb85 33 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
AnnaBridge 126:abea610beb85 34 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
AnnaBridge 126:abea610beb85 35 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
AnnaBridge 126:abea610beb85 36 *
AnnaBridge 126:abea610beb85 37 */
AnnaBridge 126:abea610beb85 38
AnnaBridge 126:abea610beb85 39
AnnaBridge 126:abea610beb85 40 #ifndef NRF51_TO_NRF52_H
AnnaBridge 126:abea610beb85 41 #define NRF51_TO_NRF52_H
AnnaBridge 126:abea610beb85 42
AnnaBridge 126:abea610beb85 43 /*lint ++flb "Enter library region */
AnnaBridge 126:abea610beb85 44
AnnaBridge 126:abea610beb85 45 /* This file is given to prevent your SW from not compiling with the name changes between nRF51 and nRF52 devices.
AnnaBridge 126:abea610beb85 46 * It redefines the old nRF51 names into the new ones as long as the functionality is still supported. If the
AnnaBridge 126:abea610beb85 47 * functionality is gone, there old names are not define, so compilation will fail. Note that also includes macros
AnnaBridge 126:abea610beb85 48 * from the nrf51_deprecated.h file. */
AnnaBridge 126:abea610beb85 49
AnnaBridge 126:abea610beb85 50
AnnaBridge 126:abea610beb85 51 /* IRQ */
AnnaBridge 126:abea610beb85 52 /* Several peripherals have been added to several indexes. Names of IRQ handlers and IRQ numbers have changed. */
AnnaBridge 126:abea610beb85 53 #define UART0_IRQHandler UARTE0_UART0_IRQHandler
AnnaBridge 126:abea610beb85 54 #define SPI0_TWI0_IRQHandler SPIM0_SPIS0_TWIM0_TWIS0_SPI0_TWI0_IRQHandler
AnnaBridge 126:abea610beb85 55 #define SPI1_TWI1_IRQHandler SPIM1_SPIS1_TWIM1_TWIS1_SPI1_TWI1_IRQHandler
AnnaBridge 126:abea610beb85 56 #define ADC_IRQHandler SAADC_IRQHandler
AnnaBridge 126:abea610beb85 57 #define LPCOMP_IRQHandler COMP_LPCOMP_IRQHandler
AnnaBridge 126:abea610beb85 58 #define SWI0_IRQHandler SWI0_EGU0_IRQHandler
AnnaBridge 126:abea610beb85 59 #define SWI1_IRQHandler SWI1_EGU1_IRQHandler
AnnaBridge 126:abea610beb85 60 #define SWI2_IRQHandler SWI2_EGU2_IRQHandler
AnnaBridge 126:abea610beb85 61 #define SWI3_IRQHandler SWI3_EGU3_IRQHandler
AnnaBridge 126:abea610beb85 62 #define SWI4_IRQHandler SWI4_EGU4_IRQHandler
AnnaBridge 126:abea610beb85 63 #define SWI5_IRQHandler SWI5_EGU5_IRQHandler
AnnaBridge 126:abea610beb85 64
AnnaBridge 126:abea610beb85 65 #define UART0_IRQn UARTE0_UART0_IRQn
AnnaBridge 126:abea610beb85 66 #define SPI0_TWI0_IRQn SPIM0_SPIS0_TWIM0_TWIS0_SPI0_TWI0_IRQn
AnnaBridge 126:abea610beb85 67 #define SPI1_TWI1_IRQn SPIM1_SPIS1_TWIM1_TWIS1_SPI1_TWI1_IRQn
AnnaBridge 126:abea610beb85 68 #define ADC_IRQn SAADC_IRQn
AnnaBridge 126:abea610beb85 69 #define LPCOMP_IRQn COMP_LPCOMP_IRQn
AnnaBridge 126:abea610beb85 70 #define SWI0_IRQn SWI0_EGU0_IRQn
AnnaBridge 126:abea610beb85 71 #define SWI1_IRQn SWI1_EGU1_IRQn
AnnaBridge 126:abea610beb85 72 #define SWI2_IRQn SWI2_EGU2_IRQn
AnnaBridge 126:abea610beb85 73 #define SWI3_IRQn SWI3_EGU3_IRQn
AnnaBridge 126:abea610beb85 74 #define SWI4_IRQn SWI4_EGU4_IRQn
AnnaBridge 126:abea610beb85 75 #define SWI5_IRQn SWI5_EGU5_IRQn
AnnaBridge 126:abea610beb85 76
AnnaBridge 126:abea610beb85 77
AnnaBridge 126:abea610beb85 78 /* UICR */
AnnaBridge 126:abea610beb85 79 /* Register RBPCONF was renamed to APPROTECT. */
AnnaBridge 126:abea610beb85 80 #define RBPCONF APPROTECT
AnnaBridge 126:abea610beb85 81
AnnaBridge 126:abea610beb85 82 #define UICR_RBPCONF_PALL_Pos UICR_APPROTECT_PALL_Pos
AnnaBridge 126:abea610beb85 83 #define UICR_RBPCONF_PALL_Msk UICR_APPROTECT_PALL_Msk
AnnaBridge 126:abea610beb85 84 #define UICR_RBPCONF_PALL_Enabled UICR_APPROTECT_PALL_Enabled
AnnaBridge 126:abea610beb85 85 #define UICR_RBPCONF_PALL_Disabled UICR_APPROTECT_PALL_Disabled
AnnaBridge 126:abea610beb85 86
AnnaBridge 126:abea610beb85 87
AnnaBridge 126:abea610beb85 88 /* GPIO */
AnnaBridge 126:abea610beb85 89 /* GPIO port was renamed to P0. */
AnnaBridge 126:abea610beb85 90 #define NRF_GPIO NRF_P0
AnnaBridge 126:abea610beb85 91 #define NRF_GPIO_BASE NRF_P0_BASE
AnnaBridge 126:abea610beb85 92
AnnaBridge 126:abea610beb85 93
AnnaBridge 126:abea610beb85 94 /* SPIS */
AnnaBridge 126:abea610beb85 95 /* The registers PSELSCK, PSELMISO, PSELMOSI, PSELCSN were restructured into a struct. */
AnnaBridge 126:abea610beb85 96 #define PSELSCK PSEL.SCK
AnnaBridge 126:abea610beb85 97 #define PSELMISO PSEL.MISO
AnnaBridge 126:abea610beb85 98 #define PSELMOSI PSEL.MOSI
AnnaBridge 126:abea610beb85 99 #define PSELCSN PSEL.CSN
AnnaBridge 126:abea610beb85 100
AnnaBridge 126:abea610beb85 101 /* The registers RXDPTR, MAXRX, AMOUNTRX were restructured into a struct */
AnnaBridge 126:abea610beb85 102 #define RXDPTR RXD.PTR
AnnaBridge 126:abea610beb85 103 #define MAXRX RXD.MAXCNT
AnnaBridge 126:abea610beb85 104 #define AMOUNTRX RXD.AMOUNT
AnnaBridge 126:abea610beb85 105
AnnaBridge 126:abea610beb85 106 #define SPIS_MAXRX_MAXRX_Pos SPIS_RXD_MAXCNT_MAXCNT_Pos
AnnaBridge 126:abea610beb85 107 #define SPIS_MAXRX_MAXRX_Msk SPIS_RXD_MAXCNT_MAXCNT_Msk
AnnaBridge 126:abea610beb85 108
AnnaBridge 126:abea610beb85 109 #define SPIS_AMOUNTRX_AMOUNTRX_Pos SPIS_RXD_AMOUNT_AMOUNT_Pos
AnnaBridge 126:abea610beb85 110 #define SPIS_AMOUNTRX_AMOUNTRX_Msk SPIS_RXD_AMOUNT_AMOUNT_Msk
AnnaBridge 126:abea610beb85 111
AnnaBridge 126:abea610beb85 112 /* The registers TXDPTR, MAXTX, AMOUNTTX were restructured into a struct */
AnnaBridge 126:abea610beb85 113 #define TXDPTR TXD.PTR
AnnaBridge 126:abea610beb85 114 #define MAXTX TXD.MAXCNT
AnnaBridge 126:abea610beb85 115 #define AMOUNTTX TXD.AMOUNT
AnnaBridge 126:abea610beb85 116
AnnaBridge 126:abea610beb85 117 #define SPIS_MAXTX_MAXTX_Pos SPIS_TXD_MAXCNT_MAXCNT_Pos
AnnaBridge 126:abea610beb85 118 #define SPIS_MAXTX_MAXTX_Msk SPIS_TXD_MAXCNT_MAXCNT_Msk
AnnaBridge 126:abea610beb85 119
AnnaBridge 126:abea610beb85 120 #define SPIS_AMOUNTTX_AMOUNTTX_Pos SPIS_TXD_AMOUNT_AMOUNT_Pos
AnnaBridge 126:abea610beb85 121 #define SPIS_AMOUNTTX_AMOUNTTX_Msk SPIS_TXD_AMOUNT_AMOUNT_Msk
AnnaBridge 126:abea610beb85 122
AnnaBridge 126:abea610beb85 123
AnnaBridge 126:abea610beb85 124 /* MPU */
AnnaBridge 126:abea610beb85 125 /* Part of MPU module was renamed BPROT, while the rest was eliminated. */
AnnaBridge 126:abea610beb85 126 #define NRF_MPU NRF_BPROT
AnnaBridge 126:abea610beb85 127
AnnaBridge 126:abea610beb85 128 /* Register DISABLEINDEBUG macros were affected. */
AnnaBridge 126:abea610beb85 129 #define MPU_DISABLEINDEBUG_DISABLEINDEBUG_Pos BPROT_DISABLEINDEBUG_DISABLEINDEBUG_Pos
AnnaBridge 126:abea610beb85 130 #define MPU_DISABLEINDEBUG_DISABLEINDEBUG_Msk BPROT_DISABLEINDEBUG_DISABLEINDEBUG_Msk
AnnaBridge 126:abea610beb85 131 #define MPU_DISABLEINDEBUG_DISABLEINDEBUG_Enabled BPROT_DISABLEINDEBUG_DISABLEINDEBUG_Enabled
AnnaBridge 126:abea610beb85 132 #define MPU_DISABLEINDEBUG_DISABLEINDEBUG_Disabled BPROT_DISABLEINDEBUG_DISABLEINDEBUG_Disabled
AnnaBridge 126:abea610beb85 133
AnnaBridge 126:abea610beb85 134 /* Registers PROTENSET0 and PROTENSET1 were affected and renamed as CONFIG0 and CONFIG1. */
AnnaBridge 126:abea610beb85 135 #define PROTENSET0 CONFIG0
AnnaBridge 126:abea610beb85 136 #define PROTENSET1 CONFIG1
AnnaBridge 126:abea610beb85 137
AnnaBridge 126:abea610beb85 138 #define MPU_PROTENSET1_PROTREG63_Pos BPROT_CONFIG1_REGION63_Pos
AnnaBridge 126:abea610beb85 139 #define MPU_PROTENSET1_PROTREG63_Msk BPROT_CONFIG1_REGION63_Msk
AnnaBridge 126:abea610beb85 140 #define MPU_PROTENSET1_PROTREG63_Disabled BPROT_CONFIG1_REGION63_Disabled
AnnaBridge 126:abea610beb85 141 #define MPU_PROTENSET1_PROTREG63_Enabled BPROT_CONFIG1_REGION63_Enabled
AnnaBridge 126:abea610beb85 142 #define MPU_PROTENSET1_PROTREG63_Set BPROT_CONFIG1_REGION63_Enabled
AnnaBridge 126:abea610beb85 143
AnnaBridge 126:abea610beb85 144 #define MPU_PROTENSET1_PROTREG62_Pos BPROT_CONFIG1_REGION62_Pos
AnnaBridge 126:abea610beb85 145 #define MPU_PROTENSET1_PROTREG62_Msk BPROT_CONFIG1_REGION62_Msk
AnnaBridge 126:abea610beb85 146 #define MPU_PROTENSET1_PROTREG62_Disabled BPROT_CONFIG1_REGION62_Disabled
AnnaBridge 126:abea610beb85 147 #define MPU_PROTENSET1_PROTREG62_Enabled BPROT_CONFIG1_REGION62_Enabled
AnnaBridge 126:abea610beb85 148 #define MPU_PROTENSET1_PROTREG62_Set BPROT_CONFIG1_REGION62_Enabled
AnnaBridge 126:abea610beb85 149
AnnaBridge 126:abea610beb85 150 #define MPU_PROTENSET1_PROTREG61_Pos BPROT_CONFIG1_REGION61_Pos
AnnaBridge 126:abea610beb85 151 #define MPU_PROTENSET1_PROTREG61_Msk BPROT_CONFIG1_REGION61_Msk
AnnaBridge 126:abea610beb85 152 #define MPU_PROTENSET1_PROTREG61_Disabled BPROT_CONFIG1_REGION61_Disabled
AnnaBridge 126:abea610beb85 153 #define MPU_PROTENSET1_PROTREG61_Enabled BPROT_CONFIG1_REGION61_Enabled
AnnaBridge 126:abea610beb85 154 #define MPU_PROTENSET1_PROTREG61_Set BPROT_CONFIG1_REGION61_Enabled
AnnaBridge 126:abea610beb85 155
AnnaBridge 126:abea610beb85 156 #define MPU_PROTENSET1_PROTREG60_Pos BPROT_CONFIG1_REGION60_Pos
AnnaBridge 126:abea610beb85 157 #define MPU_PROTENSET1_PROTREG60_Msk BPROT_CONFIG1_REGION60_Msk
AnnaBridge 126:abea610beb85 158 #define MPU_PROTENSET1_PROTREG60_Disabled BPROT_CONFIG1_REGION60_Disabled
AnnaBridge 126:abea610beb85 159 #define MPU_PROTENSET1_PROTREG60_Enabled BPROT_CONFIG1_REGION60_Enabled
AnnaBridge 126:abea610beb85 160 #define MPU_PROTENSET1_PROTREG60_Set BPROT_CONFIG1_REGION60_Enabled
AnnaBridge 126:abea610beb85 161
AnnaBridge 126:abea610beb85 162 #define MPU_PROTENSET1_PROTREG59_Pos BPROT_CONFIG1_REGION59_Pos
AnnaBridge 126:abea610beb85 163 #define MPU_PROTENSET1_PROTREG59_Msk BPROT_CONFIG1_REGION59_Msk
AnnaBridge 126:abea610beb85 164 #define MPU_PROTENSET1_PROTREG59_Disabled BPROT_CONFIG1_REGION59_Disabled
AnnaBridge 126:abea610beb85 165 #define MPU_PROTENSET1_PROTREG59_Enabled BPROT_CONFIG1_REGION59_Enabled
AnnaBridge 126:abea610beb85 166 #define MPU_PROTENSET1_PROTREG59_Set BPROT_CONFIG1_REGION59_Enabled
AnnaBridge 126:abea610beb85 167
AnnaBridge 126:abea610beb85 168 #define MPU_PROTENSET1_PROTREG58_Pos BPROT_CONFIG1_REGION58_Pos
AnnaBridge 126:abea610beb85 169 #define MPU_PROTENSET1_PROTREG58_Msk BPROT_CONFIG1_REGION58_Msk
AnnaBridge 126:abea610beb85 170 #define MPU_PROTENSET1_PROTREG58_Disabled BPROT_CONFIG1_REGION58_Disabled
AnnaBridge 126:abea610beb85 171 #define MPU_PROTENSET1_PROTREG58_Enabled BPROT_CONFIG1_REGION58_Enabled
AnnaBridge 126:abea610beb85 172 #define MPU_PROTENSET1_PROTREG58_Set BPROT_CONFIG1_REGION58_Enabled
AnnaBridge 126:abea610beb85 173
AnnaBridge 126:abea610beb85 174 #define MPU_PROTENSET1_PROTREG57_Pos BPROT_CONFIG1_REGION57_Pos
AnnaBridge 126:abea610beb85 175 #define MPU_PROTENSET1_PROTREG57_Msk BPROT_CONFIG1_REGION57_Msk
AnnaBridge 126:abea610beb85 176 #define MPU_PROTENSET1_PROTREG57_Disabled BPROT_CONFIG1_REGION57_Disabled
AnnaBridge 126:abea610beb85 177 #define MPU_PROTENSET1_PROTREG57_Enabled BPROT_CONFIG1_REGION57_Enabled
AnnaBridge 126:abea610beb85 178 #define MPU_PROTENSET1_PROTREG57_Set BPROT_CONFIG1_REGION57_Enabled
AnnaBridge 126:abea610beb85 179
AnnaBridge 126:abea610beb85 180 #define MPU_PROTENSET1_PROTREG56_Pos BPROT_CONFIG1_REGION56_Pos
AnnaBridge 126:abea610beb85 181 #define MPU_PROTENSET1_PROTREG56_Msk BPROT_CONFIG1_REGION56_Msk
AnnaBridge 126:abea610beb85 182 #define MPU_PROTENSET1_PROTREG56_Disabled BPROT_CONFIG1_REGION56_Disabled
AnnaBridge 126:abea610beb85 183 #define MPU_PROTENSET1_PROTREG56_Enabled BPROT_CONFIG1_REGION56_Enabled
AnnaBridge 126:abea610beb85 184 #define MPU_PROTENSET1_PROTREG56_Set BPROT_CONFIG1_REGION56_Enabled
AnnaBridge 126:abea610beb85 185
AnnaBridge 126:abea610beb85 186 #define MPU_PROTENSET1_PROTREG55_Pos BPROT_CONFIG1_REGION55_Pos
AnnaBridge 126:abea610beb85 187 #define MPU_PROTENSET1_PROTREG55_Msk BPROT_CONFIG1_REGION55_Msk
AnnaBridge 126:abea610beb85 188 #define MPU_PROTENSET1_PROTREG55_Disabled BPROT_CONFIG1_REGION55_Disabled
AnnaBridge 126:abea610beb85 189 #define MPU_PROTENSET1_PROTREG55_Enabled BPROT_CONFIG1_REGION55_Enabled
AnnaBridge 126:abea610beb85 190 #define MPU_PROTENSET1_PROTREG55_Set BPROT_CONFIG1_REGION55_Enabled
AnnaBridge 126:abea610beb85 191
AnnaBridge 126:abea610beb85 192 #define MPU_PROTENSET1_PROTREG54_Pos BPROT_CONFIG1_REGION54_Pos
AnnaBridge 126:abea610beb85 193 #define MPU_PROTENSET1_PROTREG54_Msk BPROT_CONFIG1_REGION54_Msk
AnnaBridge 126:abea610beb85 194 #define MPU_PROTENSET1_PROTREG54_Disabled BPROT_CONFIG1_REGION54_Disabled
AnnaBridge 126:abea610beb85 195 #define MPU_PROTENSET1_PROTREG54_Enabled BPROT_CONFIG1_REGION54_Enabled
AnnaBridge 126:abea610beb85 196 #define MPU_PROTENSET1_PROTREG54_Set BPROT_CONFIG1_REGION54_Enabled
AnnaBridge 126:abea610beb85 197
AnnaBridge 126:abea610beb85 198 #define MPU_PROTENSET1_PROTREG53_Pos BPROT_CONFIG1_REGION53_Pos
AnnaBridge 126:abea610beb85 199 #define MPU_PROTENSET1_PROTREG53_Msk BPROT_CONFIG1_REGION53_Msk
AnnaBridge 126:abea610beb85 200 #define MPU_PROTENSET1_PROTREG53_Disabled BPROT_CONFIG1_REGION53_Disabled
AnnaBridge 126:abea610beb85 201 #define MPU_PROTENSET1_PROTREG53_Enabled BPROT_CONFIG1_REGION53_Enabled
AnnaBridge 126:abea610beb85 202 #define MPU_PROTENSET1_PROTREG53_Set BPROT_CONFIG1_REGION53_Enabled
AnnaBridge 126:abea610beb85 203
AnnaBridge 126:abea610beb85 204 #define MPU_PROTENSET1_PROTREG52_Pos BPROT_CONFIG1_REGION52_Pos
AnnaBridge 126:abea610beb85 205 #define MPU_PROTENSET1_PROTREG52_Msk BPROT_CONFIG1_REGION52_Msk
AnnaBridge 126:abea610beb85 206 #define MPU_PROTENSET1_PROTREG52_Disabled BPROT_CONFIG1_REGION52_Disabled
AnnaBridge 126:abea610beb85 207 #define MPU_PROTENSET1_PROTREG52_Enabled BPROT_CONFIG1_REGION52_Enabled
AnnaBridge 126:abea610beb85 208 #define MPU_PROTENSET1_PROTREG52_Set BPROT_CONFIG1_REGION52_Enabled
AnnaBridge 126:abea610beb85 209
AnnaBridge 126:abea610beb85 210 #define MPU_PROTENSET1_PROTREG51_Pos BPROT_CONFIG1_REGION51_Pos
AnnaBridge 126:abea610beb85 211 #define MPU_PROTENSET1_PROTREG51_Msk BPROT_CONFIG1_REGION51_Msk
AnnaBridge 126:abea610beb85 212 #define MPU_PROTENSET1_PROTREG51_Disabled BPROT_CONFIG1_REGION51_Disabled
AnnaBridge 126:abea610beb85 213 #define MPU_PROTENSET1_PROTREG51_Enabled BPROT_CONFIG1_REGION51_Enabled
AnnaBridge 126:abea610beb85 214 #define MPU_PROTENSET1_PROTREG51_Set BPROT_CONFIG1_REGION51_Enabled
AnnaBridge 126:abea610beb85 215
AnnaBridge 126:abea610beb85 216 #define MPU_PROTENSET1_PROTREG50_Pos BPROT_CONFIG1_REGION50_Pos
AnnaBridge 126:abea610beb85 217 #define MPU_PROTENSET1_PROTREG50_Msk BPROT_CONFIG1_REGION50_Msk
AnnaBridge 126:abea610beb85 218 #define MPU_PROTENSET1_PROTREG50_Disabled BPROT_CONFIG1_REGION50_Disabled
AnnaBridge 126:abea610beb85 219 #define MPU_PROTENSET1_PROTREG50_Enabled BPROT_CONFIG1_REGION50_Enabled
AnnaBridge 126:abea610beb85 220 #define MPU_PROTENSET1_PROTREG50_Set BPROT_CONFIG1_REGION50_Enabled
AnnaBridge 126:abea610beb85 221
AnnaBridge 126:abea610beb85 222 #define MPU_PROTENSET1_PROTREG49_Pos BPROT_CONFIG1_REGION49_Pos
AnnaBridge 126:abea610beb85 223 #define MPU_PROTENSET1_PROTREG49_Msk BPROT_CONFIG1_REGION49_Msk
AnnaBridge 126:abea610beb85 224 #define MPU_PROTENSET1_PROTREG49_Disabled BPROT_CONFIG1_REGION49_Disabled
AnnaBridge 126:abea610beb85 225 #define MPU_PROTENSET1_PROTREG49_Enabled BPROT_CONFIG1_REGION49_Enabled
AnnaBridge 126:abea610beb85 226 #define MPU_PROTENSET1_PROTREG49_Set BPROT_CONFIG1_REGION49_Enabled
AnnaBridge 126:abea610beb85 227
AnnaBridge 126:abea610beb85 228 #define MPU_PROTENSET1_PROTREG48_Pos BPROT_CONFIG1_REGION48_Pos
AnnaBridge 126:abea610beb85 229 #define MPU_PROTENSET1_PROTREG48_Msk BPROT_CONFIG1_REGION48_Msk
AnnaBridge 126:abea610beb85 230 #define MPU_PROTENSET1_PROTREG48_Disabled BPROT_CONFIG1_REGION48_Disabled
AnnaBridge 126:abea610beb85 231 #define MPU_PROTENSET1_PROTREG48_Enabled BPROT_CONFIG1_REGION48_Enabled
AnnaBridge 126:abea610beb85 232 #define MPU_PROTENSET1_PROTREG48_Set BPROT_CONFIG1_REGION48_Enabled
AnnaBridge 126:abea610beb85 233
AnnaBridge 126:abea610beb85 234 #define MPU_PROTENSET1_PROTREG47_Pos BPROT_CONFIG1_REGION47_Pos
AnnaBridge 126:abea610beb85 235 #define MPU_PROTENSET1_PROTREG47_Msk BPROT_CONFIG1_REGION47_Msk
AnnaBridge 126:abea610beb85 236 #define MPU_PROTENSET1_PROTREG47_Disabled BPROT_CONFIG1_REGION47_Disabled
AnnaBridge 126:abea610beb85 237 #define MPU_PROTENSET1_PROTREG47_Enabled BPROT_CONFIG1_REGION47_Enabled
AnnaBridge 126:abea610beb85 238 #define MPU_PROTENSET1_PROTREG47_Set BPROT_CONFIG1_REGION47_Enabled
AnnaBridge 126:abea610beb85 239
AnnaBridge 126:abea610beb85 240 #define MPU_PROTENSET1_PROTREG46_Pos BPROT_CONFIG1_REGION46_Pos
AnnaBridge 126:abea610beb85 241 #define MPU_PROTENSET1_PROTREG46_Msk BPROT_CONFIG1_REGION46_Msk
AnnaBridge 126:abea610beb85 242 #define MPU_PROTENSET1_PROTREG46_Disabled BPROT_CONFIG1_REGION46_Disabled
AnnaBridge 126:abea610beb85 243 #define MPU_PROTENSET1_PROTREG46_Enabled BPROT_CONFIG1_REGION46_Enabled
AnnaBridge 126:abea610beb85 244 #define MPU_PROTENSET1_PROTREG46_Set BPROT_CONFIG1_REGION46_Enabled
AnnaBridge 126:abea610beb85 245
AnnaBridge 126:abea610beb85 246 #define MPU_PROTENSET1_PROTREG45_Pos BPROT_CONFIG1_REGION45_Pos
AnnaBridge 126:abea610beb85 247 #define MPU_PROTENSET1_PROTREG45_Msk BPROT_CONFIG1_REGION45_Msk
AnnaBridge 126:abea610beb85 248 #define MPU_PROTENSET1_PROTREG45_Disabled BPROT_CONFIG1_REGION45_Disabled
AnnaBridge 126:abea610beb85 249 #define MPU_PROTENSET1_PROTREG45_Enabled BPROT_CONFIG1_REGION45_Enabled
AnnaBridge 126:abea610beb85 250 #define MPU_PROTENSET1_PROTREG45_Set BPROT_CONFIG1_REGION45_Enabled
AnnaBridge 126:abea610beb85 251
AnnaBridge 126:abea610beb85 252 #define MPU_PROTENSET1_PROTREG44_Pos BPROT_CONFIG1_REGION44_Pos
AnnaBridge 126:abea610beb85 253 #define MPU_PROTENSET1_PROTREG44_Msk BPROT_CONFIG1_REGION44_Msk
AnnaBridge 126:abea610beb85 254 #define MPU_PROTENSET1_PROTREG44_Disabled BPROT_CONFIG1_REGION44_Disabled
AnnaBridge 126:abea610beb85 255 #define MPU_PROTENSET1_PROTREG44_Enabled BPROT_CONFIG1_REGION44_Enabled
AnnaBridge 126:abea610beb85 256 #define MPU_PROTENSET1_PROTREG44_Set BPROT_CONFIG1_REGION44_Enabled
AnnaBridge 126:abea610beb85 257
AnnaBridge 126:abea610beb85 258 #define MPU_PROTENSET1_PROTREG43_Pos BPROT_CONFIG1_REGION43_Pos
AnnaBridge 126:abea610beb85 259 #define MPU_PROTENSET1_PROTREG43_Msk BPROT_CONFIG1_REGION43_Msk
AnnaBridge 126:abea610beb85 260 #define MPU_PROTENSET1_PROTREG43_Disabled BPROT_CONFIG1_REGION43_Disabled
AnnaBridge 126:abea610beb85 261 #define MPU_PROTENSET1_PROTREG43_Enabled BPROT_CONFIG1_REGION43_Enabled
AnnaBridge 126:abea610beb85 262 #define MPU_PROTENSET1_PROTREG43_Set BPROT_CONFIG1_REGION43_Enabled
AnnaBridge 126:abea610beb85 263
AnnaBridge 126:abea610beb85 264 #define MPU_PROTENSET1_PROTREG42_Pos BPROT_CONFIG1_REGION42_Pos
AnnaBridge 126:abea610beb85 265 #define MPU_PROTENSET1_PROTREG42_Msk BPROT_CONFIG1_REGION42_Msk
AnnaBridge 126:abea610beb85 266 #define MPU_PROTENSET1_PROTREG42_Disabled BPROT_CONFIG1_REGION42_Disabled
AnnaBridge 126:abea610beb85 267 #define MPU_PROTENSET1_PROTREG42_Enabled BPROT_CONFIG1_REGION42_Enabled
AnnaBridge 126:abea610beb85 268 #define MPU_PROTENSET1_PROTREG42_Set BPROT_CONFIG1_REGION42_Enabled
AnnaBridge 126:abea610beb85 269
AnnaBridge 126:abea610beb85 270 #define MPU_PROTENSET1_PROTREG41_Pos BPROT_CONFIG1_REGION41_Pos
AnnaBridge 126:abea610beb85 271 #define MPU_PROTENSET1_PROTREG41_Msk BPROT_CONFIG1_REGION41_Msk
AnnaBridge 126:abea610beb85 272 #define MPU_PROTENSET1_PROTREG41_Disabled BPROT_CONFIG1_REGION41_Disabled
AnnaBridge 126:abea610beb85 273 #define MPU_PROTENSET1_PROTREG41_Enabled BPROT_CONFIG1_REGION41_Enabled
AnnaBridge 126:abea610beb85 274 #define MPU_PROTENSET1_PROTREG41_Set BPROT_CONFIG1_REGION41_Enabled
AnnaBridge 126:abea610beb85 275
AnnaBridge 126:abea610beb85 276 #define MPU_PROTENSET1_PROTREG40_Pos BPROT_CONFIG1_REGION40_Pos
AnnaBridge 126:abea610beb85 277 #define MPU_PROTENSET1_PROTREG40_Msk BPROT_CONFIG1_REGION40_Msk
AnnaBridge 126:abea610beb85 278 #define MPU_PROTENSET1_PROTREG40_Disabled BPROT_CONFIG1_REGION40_Disabled
AnnaBridge 126:abea610beb85 279 #define MPU_PROTENSET1_PROTREG40_Enabled BPROT_CONFIG1_REGION40_Enabled
AnnaBridge 126:abea610beb85 280 #define MPU_PROTENSET1_PROTREG40_Set BPROT_CONFIG1_REGION40_Enabled
AnnaBridge 126:abea610beb85 281
AnnaBridge 126:abea610beb85 282 #define MPU_PROTENSET1_PROTREG39_Pos BPROT_CONFIG1_REGION39_Pos
AnnaBridge 126:abea610beb85 283 #define MPU_PROTENSET1_PROTREG39_Msk BPROT_CONFIG1_REGION39_Msk
AnnaBridge 126:abea610beb85 284 #define MPU_PROTENSET1_PROTREG39_Disabled BPROT_CONFIG1_REGION39_Disabled
AnnaBridge 126:abea610beb85 285 #define MPU_PROTENSET1_PROTREG39_Enabled BPROT_CONFIG1_REGION39_Enabled
AnnaBridge 126:abea610beb85 286 #define MPU_PROTENSET1_PROTREG39_Set BPROT_CONFIG1_REGION39_Enabled
AnnaBridge 126:abea610beb85 287
AnnaBridge 126:abea610beb85 288 #define MPU_PROTENSET1_PROTREG38_Pos BPROT_CONFIG1_REGION38_Pos
AnnaBridge 126:abea610beb85 289 #define MPU_PROTENSET1_PROTREG38_Msk BPROT_CONFIG1_REGION38_Msk
AnnaBridge 126:abea610beb85 290 #define MPU_PROTENSET1_PROTREG38_Disabled BPROT_CONFIG1_REGION38_Disabled
AnnaBridge 126:abea610beb85 291 #define MPU_PROTENSET1_PROTREG38_Enabled BPROT_CONFIG1_REGION38_Enabled
AnnaBridge 126:abea610beb85 292 #define MPU_PROTENSET1_PROTREG38_Set BPROT_CONFIG1_REGION38_Enabled
AnnaBridge 126:abea610beb85 293
AnnaBridge 126:abea610beb85 294 #define MPU_PROTENSET1_PROTREG37_Pos BPROT_CONFIG1_REGION37_Pos
AnnaBridge 126:abea610beb85 295 #define MPU_PROTENSET1_PROTREG37_Msk BPROT_CONFIG1_REGION37_Msk
AnnaBridge 126:abea610beb85 296 #define MPU_PROTENSET1_PROTREG37_Disabled BPROT_CONFIG1_REGION37_Disabled
AnnaBridge 126:abea610beb85 297 #define MPU_PROTENSET1_PROTREG37_Enabled BPROT_CONFIG1_REGION37_Enabled
AnnaBridge 126:abea610beb85 298 #define MPU_PROTENSET1_PROTREG37_Set BPROT_CONFIG1_REGION37_Enabled
AnnaBridge 126:abea610beb85 299
AnnaBridge 126:abea610beb85 300 #define MPU_PROTENSET1_PROTREG36_Pos BPROT_CONFIG1_REGION36_Pos
AnnaBridge 126:abea610beb85 301 #define MPU_PROTENSET1_PROTREG36_Msk BPROT_CONFIG1_REGION36_Msk
AnnaBridge 126:abea610beb85 302 #define MPU_PROTENSET1_PROTREG36_Disabled BPROT_CONFIG1_REGION36_Disabled
AnnaBridge 126:abea610beb85 303 #define MPU_PROTENSET1_PROTREG36_Enabled BPROT_CONFIG1_REGION36_Enabled
AnnaBridge 126:abea610beb85 304 #define MPU_PROTENSET1_PROTREG36_Set BPROT_CONFIG1_REGION36_Enabled
AnnaBridge 126:abea610beb85 305
AnnaBridge 126:abea610beb85 306 #define MPU_PROTENSET1_PROTREG35_Pos BPROT_CONFIG1_REGION35_Pos
AnnaBridge 126:abea610beb85 307 #define MPU_PROTENSET1_PROTREG35_Msk BPROT_CONFIG1_REGION35_Msk
AnnaBridge 126:abea610beb85 308 #define MPU_PROTENSET1_PROTREG35_Disabled BPROT_CONFIG1_REGION35_Disabled
AnnaBridge 126:abea610beb85 309 #define MPU_PROTENSET1_PROTREG35_Enabled BPROT_CONFIG1_REGION35_Enabled
AnnaBridge 126:abea610beb85 310 #define MPU_PROTENSET1_PROTREG35_Set BPROT_CONFIG1_REGION35_Enabled
AnnaBridge 126:abea610beb85 311
AnnaBridge 126:abea610beb85 312 #define MPU_PROTENSET1_PROTREG34_Pos BPROT_CONFIG1_REGION34_Pos
AnnaBridge 126:abea610beb85 313 #define MPU_PROTENSET1_PROTREG34_Msk BPROT_CONFIG1_REGION34_Msk
AnnaBridge 126:abea610beb85 314 #define MPU_PROTENSET1_PROTREG34_Disabled BPROT_CONFIG1_REGION34_Disabled
AnnaBridge 126:abea610beb85 315 #define MPU_PROTENSET1_PROTREG34_Enabled BPROT_CONFIG1_REGION34_Enabled
AnnaBridge 126:abea610beb85 316 #define MPU_PROTENSET1_PROTREG34_Set BPROT_CONFIG1_REGION34_Enabled
AnnaBridge 126:abea610beb85 317
AnnaBridge 126:abea610beb85 318 #define MPU_PROTENSET1_PROTREG33_Pos BPROT_CONFIG1_REGION33_Pos
AnnaBridge 126:abea610beb85 319 #define MPU_PROTENSET1_PROTREG33_Msk BPROT_CONFIG1_REGION33_Msk
AnnaBridge 126:abea610beb85 320 #define MPU_PROTENSET1_PROTREG33_Disabled BPROT_CONFIG1_REGION33_Disabled
AnnaBridge 126:abea610beb85 321 #define MPU_PROTENSET1_PROTREG33_Enabled BPROT_CONFIG1_REGION33_Enabled
AnnaBridge 126:abea610beb85 322 #define MPU_PROTENSET1_PROTREG33_Set BPROT_CONFIG1_REGION33_Enabled
AnnaBridge 126:abea610beb85 323
AnnaBridge 126:abea610beb85 324 #define MPU_PROTENSET1_PROTREG32_Pos BPROT_CONFIG1_REGION32_Pos
AnnaBridge 126:abea610beb85 325 #define MPU_PROTENSET1_PROTREG32_Msk BPROT_CONFIG1_REGION32_Msk
AnnaBridge 126:abea610beb85 326 #define MPU_PROTENSET1_PROTREG32_Disabled BPROT_CONFIG1_REGION32_Disabled
AnnaBridge 126:abea610beb85 327 #define MPU_PROTENSET1_PROTREG32_Enabled BPROT_CONFIG1_REGION32_Enabled
AnnaBridge 126:abea610beb85 328 #define MPU_PROTENSET1_PROTREG32_Set BPROT_CONFIG1_REGION32_Enabled
AnnaBridge 126:abea610beb85 329
AnnaBridge 126:abea610beb85 330 #define MPU_PROTENSET0_PROTREG31_Pos BPROT_CONFIG0_REGION31_Pos
AnnaBridge 126:abea610beb85 331 #define MPU_PROTENSET0_PROTREG31_Msk BPROT_CONFIG0_REGION31_Msk
AnnaBridge 126:abea610beb85 332 #define MPU_PROTENSET0_PROTREG31_Disabled BPROT_CONFIG0_REGION31_Disabled
AnnaBridge 126:abea610beb85 333 #define MPU_PROTENSET0_PROTREG31_Enabled BPROT_CONFIG0_REGION31_Enabled
AnnaBridge 126:abea610beb85 334 #define MPU_PROTENSET0_PROTREG31_Set BPROT_CONFIG0_REGION31_Enabled
AnnaBridge 126:abea610beb85 335
AnnaBridge 126:abea610beb85 336 #define MPU_PROTENSET0_PROTREG30_Pos BPROT_CONFIG0_REGION30_Pos
AnnaBridge 126:abea610beb85 337 #define MPU_PROTENSET0_PROTREG30_Msk BPROT_CONFIG0_REGION30_Msk
AnnaBridge 126:abea610beb85 338 #define MPU_PROTENSET0_PROTREG30_Disabled BPROT_CONFIG0_REGION30_Disabled
AnnaBridge 126:abea610beb85 339 #define MPU_PROTENSET0_PROTREG30_Enabled BPROT_CONFIG0_REGION30_Enabled
AnnaBridge 126:abea610beb85 340 #define MPU_PROTENSET0_PROTREG30_Set BPROT_CONFIG0_REGION30_Enabled
AnnaBridge 126:abea610beb85 341
AnnaBridge 126:abea610beb85 342 #define MPU_PROTENSET0_PROTREG29_Pos BPROT_CONFIG0_REGION29_Pos
AnnaBridge 126:abea610beb85 343 #define MPU_PROTENSET0_PROTREG29_Msk BPROT_CONFIG0_REGION29_Msk
AnnaBridge 126:abea610beb85 344 #define MPU_PROTENSET0_PROTREG29_Disabled BPROT_CONFIG0_REGION29_Disabled
AnnaBridge 126:abea610beb85 345 #define MPU_PROTENSET0_PROTREG29_Enabled BPROT_CONFIG0_REGION29_Enabled
AnnaBridge 126:abea610beb85 346 #define MPU_PROTENSET0_PROTREG29_Set BPROT_CONFIG0_REGION29_Enabled
AnnaBridge 126:abea610beb85 347
AnnaBridge 126:abea610beb85 348 #define MPU_PROTENSET0_PROTREG28_Pos BPROT_CONFIG0_REGION28_Pos
AnnaBridge 126:abea610beb85 349 #define MPU_PROTENSET0_PROTREG28_Msk BPROT_CONFIG0_REGION28_Msk
AnnaBridge 126:abea610beb85 350 #define MPU_PROTENSET0_PROTREG28_Disabled BPROT_CONFIG0_REGION28_Disabled
AnnaBridge 126:abea610beb85 351 #define MPU_PROTENSET0_PROTREG28_Enabled BPROT_CONFIG0_REGION28_Enabled
AnnaBridge 126:abea610beb85 352 #define MPU_PROTENSET0_PROTREG28_Set BPROT_CONFIG0_REGION28_Enabled
AnnaBridge 126:abea610beb85 353
AnnaBridge 126:abea610beb85 354 #define MPU_PROTENSET0_PROTREG27_Pos BPROT_CONFIG0_REGION27_Pos
AnnaBridge 126:abea610beb85 355 #define MPU_PROTENSET0_PROTREG27_Msk BPROT_CONFIG0_REGION27_Msk
AnnaBridge 126:abea610beb85 356 #define MPU_PROTENSET0_PROTREG27_Disabled BPROT_CONFIG0_REGION27_Disabled
AnnaBridge 126:abea610beb85 357 #define MPU_PROTENSET0_PROTREG27_Enabled BPROT_CONFIG0_REGION27_Enabled
AnnaBridge 126:abea610beb85 358 #define MPU_PROTENSET0_PROTREG27_Set BPROT_CONFIG0_REGION27_Enabled
AnnaBridge 126:abea610beb85 359
AnnaBridge 126:abea610beb85 360 #define MPU_PROTENSET0_PROTREG26_Pos BPROT_CONFIG0_REGION26_Pos
AnnaBridge 126:abea610beb85 361 #define MPU_PROTENSET0_PROTREG26_Msk BPROT_CONFIG0_REGION26_Msk
AnnaBridge 126:abea610beb85 362 #define MPU_PROTENSET0_PROTREG26_Disabled BPROT_CONFIG0_REGION26_Disabled
AnnaBridge 126:abea610beb85 363 #define MPU_PROTENSET0_PROTREG26_Enabled BPROT_CONFIG0_REGION26_Enabled
AnnaBridge 126:abea610beb85 364 #define MPU_PROTENSET0_PROTREG26_Set BPROT_CONFIG0_REGION26_Enabled
AnnaBridge 126:abea610beb85 365
AnnaBridge 126:abea610beb85 366 #define MPU_PROTENSET0_PROTREG25_Pos BPROT_CONFIG0_REGION25_Pos
AnnaBridge 126:abea610beb85 367 #define MPU_PROTENSET0_PROTREG25_Msk BPROT_CONFIG0_REGION25_Msk
AnnaBridge 126:abea610beb85 368 #define MPU_PROTENSET0_PROTREG25_Disabled BPROT_CONFIG0_REGION25_Disabled
AnnaBridge 126:abea610beb85 369 #define MPU_PROTENSET0_PROTREG25_Enabled BPROT_CONFIG0_REGION25_Enabled
AnnaBridge 126:abea610beb85 370 #define MPU_PROTENSET0_PROTREG25_Set BPROT_CONFIG0_REGION25_Enabled
AnnaBridge 126:abea610beb85 371
AnnaBridge 126:abea610beb85 372 #define MPU_PROTENSET0_PROTREG24_Pos BPROT_CONFIG0_REGION24_Pos
AnnaBridge 126:abea610beb85 373 #define MPU_PROTENSET0_PROTREG24_Msk BPROT_CONFIG0_REGION24_Msk
AnnaBridge 126:abea610beb85 374 #define MPU_PROTENSET0_PROTREG24_Disabled BPROT_CONFIG0_REGION24_Disabled
AnnaBridge 126:abea610beb85 375 #define MPU_PROTENSET0_PROTREG24_Enabled BPROT_CONFIG0_REGION24_Enabled
AnnaBridge 126:abea610beb85 376 #define MPU_PROTENSET0_PROTREG24_Set BPROT_CONFIG0_REGION24_Enabled
AnnaBridge 126:abea610beb85 377
AnnaBridge 126:abea610beb85 378 #define MPU_PROTENSET0_PROTREG23_Pos BPROT_CONFIG0_REGION23_Pos
AnnaBridge 126:abea610beb85 379 #define MPU_PROTENSET0_PROTREG23_Msk BPROT_CONFIG0_REGION23_Msk
AnnaBridge 126:abea610beb85 380 #define MPU_PROTENSET0_PROTREG23_Disabled BPROT_CONFIG0_REGION23_Disabled
AnnaBridge 126:abea610beb85 381 #define MPU_PROTENSET0_PROTREG23_Enabled BPROT_CONFIG0_REGION23_Enabled
AnnaBridge 126:abea610beb85 382 #define MPU_PROTENSET0_PROTREG23_Set BPROT_CONFIG0_REGION23_Enabled
AnnaBridge 126:abea610beb85 383
AnnaBridge 126:abea610beb85 384 #define MPU_PROTENSET0_PROTREG22_Pos BPROT_CONFIG0_REGION22_Pos
AnnaBridge 126:abea610beb85 385 #define MPU_PROTENSET0_PROTREG22_Msk BPROT_CONFIG0_REGION22_Msk
AnnaBridge 126:abea610beb85 386 #define MPU_PROTENSET0_PROTREG22_Disabled BPROT_CONFIG0_REGION22_Disabled
AnnaBridge 126:abea610beb85 387 #define MPU_PROTENSET0_PROTREG22_Enabled BPROT_CONFIG0_REGION22_Enabled
AnnaBridge 126:abea610beb85 388 #define MPU_PROTENSET0_PROTREG22_Set BPROT_CONFIG0_REGION22_Enabled
AnnaBridge 126:abea610beb85 389
AnnaBridge 126:abea610beb85 390 #define MPU_PROTENSET0_PROTREG21_Pos BPROT_CONFIG0_REGION21_Pos
AnnaBridge 126:abea610beb85 391 #define MPU_PROTENSET0_PROTREG21_Msk BPROT_CONFIG0_REGION21_Msk
AnnaBridge 126:abea610beb85 392 #define MPU_PROTENSET0_PROTREG21_Disabled BPROT_CONFIG0_REGION21_Disabled
AnnaBridge 126:abea610beb85 393 #define MPU_PROTENSET0_PROTREG21_Enabled BPROT_CONFIG0_REGION21_Enabled
AnnaBridge 126:abea610beb85 394 #define MPU_PROTENSET0_PROTREG21_Set BPROT_CONFIG0_REGION21_Enabled
AnnaBridge 126:abea610beb85 395
AnnaBridge 126:abea610beb85 396 #define MPU_PROTENSET0_PROTREG20_Pos BPROT_CONFIG0_REGION20_Pos
AnnaBridge 126:abea610beb85 397 #define MPU_PROTENSET0_PROTREG20_Msk BPROT_CONFIG0_REGION20_Msk
AnnaBridge 126:abea610beb85 398 #define MPU_PROTENSET0_PROTREG20_Disabled BPROT_CONFIG0_REGION20_Disabled
AnnaBridge 126:abea610beb85 399 #define MPU_PROTENSET0_PROTREG20_Enabled BPROT_CONFIG0_REGION20_Enabled
AnnaBridge 126:abea610beb85 400 #define MPU_PROTENSET0_PROTREG20_Set BPROT_CONFIG0_REGION20_Enabled
AnnaBridge 126:abea610beb85 401
AnnaBridge 126:abea610beb85 402 #define MPU_PROTENSET0_PROTREG19_Pos BPROT_CONFIG0_REGION19_Pos
AnnaBridge 126:abea610beb85 403 #define MPU_PROTENSET0_PROTREG19_Msk BPROT_CONFIG0_REGION19_Msk
AnnaBridge 126:abea610beb85 404 #define MPU_PROTENSET0_PROTREG19_Disabled BPROT_CONFIG0_REGION19_Disabled
AnnaBridge 126:abea610beb85 405 #define MPU_PROTENSET0_PROTREG19_Enabled BPROT_CONFIG0_REGION19_Enabled
AnnaBridge 126:abea610beb85 406 #define MPU_PROTENSET0_PROTREG19_Set BPROT_CONFIG0_REGION19_Enabled
AnnaBridge 126:abea610beb85 407
AnnaBridge 126:abea610beb85 408 #define MPU_PROTENSET0_PROTREG18_Pos BPROT_CONFIG0_REGION18_Pos
AnnaBridge 126:abea610beb85 409 #define MPU_PROTENSET0_PROTREG18_Msk BPROT_CONFIG0_REGION18_Msk
AnnaBridge 126:abea610beb85 410 #define MPU_PROTENSET0_PROTREG18_Disabled BPROT_CONFIG0_REGION18_Disabled
AnnaBridge 126:abea610beb85 411 #define MPU_PROTENSET0_PROTREG18_Enabled BPROT_CONFIG0_REGION18_Enabled
AnnaBridge 126:abea610beb85 412 #define MPU_PROTENSET0_PROTREG18_Set BPROT_CONFIG0_REGION18_Enabled
AnnaBridge 126:abea610beb85 413
AnnaBridge 126:abea610beb85 414 #define MPU_PROTENSET0_PROTREG17_Pos BPROT_CONFIG0_REGION17_Pos
AnnaBridge 126:abea610beb85 415 #define MPU_PROTENSET0_PROTREG17_Msk BPROT_CONFIG0_REGION17_Msk
AnnaBridge 126:abea610beb85 416 #define MPU_PROTENSET0_PROTREG17_Disabled BPROT_CONFIG0_REGION17_Disabled
AnnaBridge 126:abea610beb85 417 #define MPU_PROTENSET0_PROTREG17_Enabled BPROT_CONFIG0_REGION17_Enabled
AnnaBridge 126:abea610beb85 418 #define MPU_PROTENSET0_PROTREG17_Set BPROT_CONFIG0_REGION17_Enabled
AnnaBridge 126:abea610beb85 419
AnnaBridge 126:abea610beb85 420 #define MPU_PROTENSET0_PROTREG16_Pos BPROT_CONFIG0_REGION16_Pos
AnnaBridge 126:abea610beb85 421 #define MPU_PROTENSET0_PROTREG16_Msk BPROT_CONFIG0_REGION16_Msk
AnnaBridge 126:abea610beb85 422 #define MPU_PROTENSET0_PROTREG16_Disabled BPROT_CONFIG0_REGION16_Disabled
AnnaBridge 126:abea610beb85 423 #define MPU_PROTENSET0_PROTREG16_Enabled BPROT_CONFIG0_REGION16_Enabled
AnnaBridge 126:abea610beb85 424 #define MPU_PROTENSET0_PROTREG16_Set BPROT_CONFIG0_REGION16_Enabled
AnnaBridge 126:abea610beb85 425
AnnaBridge 126:abea610beb85 426 #define MPU_PROTENSET0_PROTREG15_Pos BPROT_CONFIG0_REGION15_Pos
AnnaBridge 126:abea610beb85 427 #define MPU_PROTENSET0_PROTREG15_Msk BPROT_CONFIG0_REGION15_Msk
AnnaBridge 126:abea610beb85 428 #define MPU_PROTENSET0_PROTREG15_Disabled BPROT_CONFIG0_REGION15_Disabled
AnnaBridge 126:abea610beb85 429 #define MPU_PROTENSET0_PROTREG15_Enabled BPROT_CONFIG0_REGION15_Enabled
AnnaBridge 126:abea610beb85 430 #define MPU_PROTENSET0_PROTREG15_Set BPROT_CONFIG0_REGION15_Enabled
AnnaBridge 126:abea610beb85 431
AnnaBridge 126:abea610beb85 432 #define MPU_PROTENSET0_PROTREG14_Pos BPROT_CONFIG0_REGION14_Pos
AnnaBridge 126:abea610beb85 433 #define MPU_PROTENSET0_PROTREG14_Msk BPROT_CONFIG0_REGION14_Msk
AnnaBridge 126:abea610beb85 434 #define MPU_PROTENSET0_PROTREG14_Disabled BPROT_CONFIG0_REGION14_Disabled
AnnaBridge 126:abea610beb85 435 #define MPU_PROTENSET0_PROTREG14_Enabled BPROT_CONFIG0_REGION14_Enabled
AnnaBridge 126:abea610beb85 436 #define MPU_PROTENSET0_PROTREG14_Set BPROT_CONFIG0_REGION14_Enabled
AnnaBridge 126:abea610beb85 437
AnnaBridge 126:abea610beb85 438 #define MPU_PROTENSET0_PROTREG13_Pos BPROT_CONFIG0_REGION13_Pos
AnnaBridge 126:abea610beb85 439 #define MPU_PROTENSET0_PROTREG13_Msk BPROT_CONFIG0_REGION13_Msk
AnnaBridge 126:abea610beb85 440 #define MPU_PROTENSET0_PROTREG13_Disabled BPROT_CONFIG0_REGION13_Disabled
AnnaBridge 126:abea610beb85 441 #define MPU_PROTENSET0_PROTREG13_Enabled BPROT_CONFIG0_REGION13_Enabled
AnnaBridge 126:abea610beb85 442 #define MPU_PROTENSET0_PROTREG13_Set BPROT_CONFIG0_REGION13_Enabled
AnnaBridge 126:abea610beb85 443
AnnaBridge 126:abea610beb85 444 #define MPU_PROTENSET0_PROTREG12_Pos BPROT_CONFIG0_REGION12_Pos
AnnaBridge 126:abea610beb85 445 #define MPU_PROTENSET0_PROTREG12_Msk BPROT_CONFIG0_REGION12_Msk
AnnaBridge 126:abea610beb85 446 #define MPU_PROTENSET0_PROTREG12_Disabled BPROT_CONFIG0_REGION12_Disabled
AnnaBridge 126:abea610beb85 447 #define MPU_PROTENSET0_PROTREG12_Enabled BPROT_CONFIG0_REGION12_Enabled
AnnaBridge 126:abea610beb85 448 #define MPU_PROTENSET0_PROTREG12_Set BPROT_CONFIG0_REGION12_Enabled
AnnaBridge 126:abea610beb85 449
AnnaBridge 126:abea610beb85 450 #define MPU_PROTENSET0_PROTREG11_Pos BPROT_CONFIG0_REGION11_Pos
AnnaBridge 126:abea610beb85 451 #define MPU_PROTENSET0_PROTREG11_Msk BPROT_CONFIG0_REGION11_Msk
AnnaBridge 126:abea610beb85 452 #define MPU_PROTENSET0_PROTREG11_Disabled BPROT_CONFIG0_REGION11_Disabled
AnnaBridge 126:abea610beb85 453 #define MPU_PROTENSET0_PROTREG11_Enabled BPROT_CONFIG0_REGION11_Enabled
AnnaBridge 126:abea610beb85 454 #define MPU_PROTENSET0_PROTREG11_Set BPROT_CONFIG0_REGION11_Enabled
AnnaBridge 126:abea610beb85 455
AnnaBridge 126:abea610beb85 456 #define MPU_PROTENSET0_PROTREG10_Pos BPROT_CONFIG0_REGION10_Pos
AnnaBridge 126:abea610beb85 457 #define MPU_PROTENSET0_PROTREG10_Msk BPROT_CONFIG0_REGION10_Msk
AnnaBridge 126:abea610beb85 458 #define MPU_PROTENSET0_PROTREG10_Disabled BPROT_CONFIG0_REGION10_Disabled
AnnaBridge 126:abea610beb85 459 #define MPU_PROTENSET0_PROTREG10_Enabled BPROT_CONFIG0_REGION10_Enabled
AnnaBridge 126:abea610beb85 460 #define MPU_PROTENSET0_PROTREG10_Set BPROT_CONFIG0_REGION10_Enabled
AnnaBridge 126:abea610beb85 461
AnnaBridge 126:abea610beb85 462 #define MPU_PROTENSET0_PROTREG9_Pos BPROT_CONFIG0_REGION9_Pos
AnnaBridge 126:abea610beb85 463 #define MPU_PROTENSET0_PROTREG9_Msk BPROT_CONFIG0_REGION9_Msk
AnnaBridge 126:abea610beb85 464 #define MPU_PROTENSET0_PROTREG9_Disabled BPROT_CONFIG0_REGION9_Disabled
AnnaBridge 126:abea610beb85 465 #define MPU_PROTENSET0_PROTREG9_Enabled BPROT_CONFIG0_REGION9_Enabled
AnnaBridge 126:abea610beb85 466 #define MPU_PROTENSET0_PROTREG9_Set BPROT_CONFIG0_REGION9_Enabled
AnnaBridge 126:abea610beb85 467
AnnaBridge 126:abea610beb85 468 #define MPU_PROTENSET0_PROTREG8_Pos BPROT_CONFIG0_REGION8_Pos
AnnaBridge 126:abea610beb85 469 #define MPU_PROTENSET0_PROTREG8_Msk BPROT_CONFIG0_REGION8_Msk
AnnaBridge 126:abea610beb85 470 #define MPU_PROTENSET0_PROTREG8_Disabled BPROT_CONFIG0_REGION8_Disabled
AnnaBridge 126:abea610beb85 471 #define MPU_PROTENSET0_PROTREG8_Enabled BPROT_CONFIG0_REGION8_Enabled
AnnaBridge 126:abea610beb85 472 #define MPU_PROTENSET0_PROTREG8_Set BPROT_CONFIG0_REGION8_Enabled
AnnaBridge 126:abea610beb85 473
AnnaBridge 126:abea610beb85 474 #define MPU_PROTENSET0_PROTREG7_Pos BPROT_CONFIG0_REGION7_Pos
AnnaBridge 126:abea610beb85 475 #define MPU_PROTENSET0_PROTREG7_Msk BPROT_CONFIG0_REGION7_Msk
AnnaBridge 126:abea610beb85 476 #define MPU_PROTENSET0_PROTREG7_Disabled BPROT_CONFIG0_REGION7_Disabled
AnnaBridge 126:abea610beb85 477 #define MPU_PROTENSET0_PROTREG7_Enabled BPROT_CONFIG0_REGION7_Enabled
AnnaBridge 126:abea610beb85 478 #define MPU_PROTENSET0_PROTREG7_Set BPROT_CONFIG0_REGION7_Enabled
AnnaBridge 126:abea610beb85 479
AnnaBridge 126:abea610beb85 480 #define MPU_PROTENSET0_PROTREG6_Pos BPROT_CONFIG0_REGION6_Pos
AnnaBridge 126:abea610beb85 481 #define MPU_PROTENSET0_PROTREG6_Msk BPROT_CONFIG0_REGION6_Msk
AnnaBridge 126:abea610beb85 482 #define MPU_PROTENSET0_PROTREG6_Disabled BPROT_CONFIG0_REGION6_Disabled
AnnaBridge 126:abea610beb85 483 #define MPU_PROTENSET0_PROTREG6_Enabled BPROT_CONFIG0_REGION6_Enabled
AnnaBridge 126:abea610beb85 484 #define MPU_PROTENSET0_PROTREG6_Set BPROT_CONFIG0_REGION6_Enabled
AnnaBridge 126:abea610beb85 485
AnnaBridge 126:abea610beb85 486 #define MPU_PROTENSET0_PROTREG5_Pos BPROT_CONFIG0_REGION5_Pos
AnnaBridge 126:abea610beb85 487 #define MPU_PROTENSET0_PROTREG5_Msk BPROT_CONFIG0_REGION5_Msk
AnnaBridge 126:abea610beb85 488 #define MPU_PROTENSET0_PROTREG5_Disabled BPROT_CONFIG0_REGION5_Disabled
AnnaBridge 126:abea610beb85 489 #define MPU_PROTENSET0_PROTREG5_Enabled BPROT_CONFIG0_REGION5_Enabled
AnnaBridge 126:abea610beb85 490 #define MPU_PROTENSET0_PROTREG5_Set BPROT_CONFIG0_REGION5_Enabled
AnnaBridge 126:abea610beb85 491
AnnaBridge 126:abea610beb85 492 #define MPU_PROTENSET0_PROTREG4_Pos BPROT_CONFIG0_REGION4_Pos
AnnaBridge 126:abea610beb85 493 #define MPU_PROTENSET0_PROTREG4_Msk BPROT_CONFIG0_REGION4_Msk
AnnaBridge 126:abea610beb85 494 #define MPU_PROTENSET0_PROTREG4_Disabled BPROT_CONFIG0_REGION4_Disabled
AnnaBridge 126:abea610beb85 495 #define MPU_PROTENSET0_PROTREG4_Enabled BPROT_CONFIG0_REGION4_Enabled
AnnaBridge 126:abea610beb85 496 #define MPU_PROTENSET0_PROTREG4_Set BPROT_CONFIG0_REGION4_Enabled
AnnaBridge 126:abea610beb85 497
AnnaBridge 126:abea610beb85 498 #define MPU_PROTENSET0_PROTREG3_Pos BPROT_CONFIG0_REGION3_Pos
AnnaBridge 126:abea610beb85 499 #define MPU_PROTENSET0_PROTREG3_Msk BPROT_CONFIG0_REGION3_Msk
AnnaBridge 126:abea610beb85 500 #define MPU_PROTENSET0_PROTREG3_Disabled BPROT_CONFIG0_REGION3_Disabled
AnnaBridge 126:abea610beb85 501 #define MPU_PROTENSET0_PROTREG3_Enabled BPROT_CONFIG0_REGION3_Enabled
AnnaBridge 126:abea610beb85 502 #define MPU_PROTENSET0_PROTREG3_Set BPROT_CONFIG0_REGION3_Enabled
AnnaBridge 126:abea610beb85 503
AnnaBridge 126:abea610beb85 504 #define MPU_PROTENSET0_PROTREG2_Pos BPROT_CONFIG0_REGION2_Pos
AnnaBridge 126:abea610beb85 505 #define MPU_PROTENSET0_PROTREG2_Msk BPROT_CONFIG0_REGION2_Msk
AnnaBridge 126:abea610beb85 506 #define MPU_PROTENSET0_PROTREG2_Disabled BPROT_CONFIG0_REGION2_Disabled
AnnaBridge 126:abea610beb85 507 #define MPU_PROTENSET0_PROTREG2_Enabled BPROT_CONFIG0_REGION2_Enabled
AnnaBridge 126:abea610beb85 508 #define MPU_PROTENSET0_PROTREG2_Set BPROT_CONFIG0_REGION2_Enabled
AnnaBridge 126:abea610beb85 509
AnnaBridge 126:abea610beb85 510 #define MPU_PROTENSET0_PROTREG1_Pos BPROT_CONFIG0_REGION1_Pos
AnnaBridge 126:abea610beb85 511 #define MPU_PROTENSET0_PROTREG1_Msk BPROT_CONFIG0_REGION1_Msk
AnnaBridge 126:abea610beb85 512 #define MPU_PROTENSET0_PROTREG1_Disabled BPROT_CONFIG0_REGION1_Disabled
AnnaBridge 126:abea610beb85 513 #define MPU_PROTENSET0_PROTREG1_Enabled BPROT_CONFIG0_REGION1_Enabled
AnnaBridge 126:abea610beb85 514 #define MPU_PROTENSET0_PROTREG1_Set BPROT_CONFIG0_REGION1_Enabled
AnnaBridge 126:abea610beb85 515
AnnaBridge 126:abea610beb85 516 #define MPU_PROTENSET0_PROTREG0_Pos BPROT_CONFIG0_REGION0_Pos
AnnaBridge 126:abea610beb85 517 #define MPU_PROTENSET0_PROTREG0_Msk BPROT_CONFIG0_REGION0_Msk
AnnaBridge 126:abea610beb85 518 #define MPU_PROTENSET0_PROTREG0_Disabled BPROT_CONFIG0_REGION0_Disabled
AnnaBridge 126:abea610beb85 519 #define MPU_PROTENSET0_PROTREG0_Enabled BPROT_CONFIG0_REGION0_Enabled
AnnaBridge 126:abea610beb85 520 #define MPU_PROTENSET0_PROTREG0_Set BPROT_CONFIG0_REGION0_Enabled
AnnaBridge 126:abea610beb85 521
AnnaBridge 126:abea610beb85 522
AnnaBridge 126:abea610beb85 523 /* From nrf51_deprecated.h */
AnnaBridge 126:abea610beb85 524
AnnaBridge 126:abea610beb85 525 /* NVMC */
AnnaBridge 126:abea610beb85 526 /* The register ERASEPROTECTEDPAGE changed name to ERASEPCR0 in the documentation. */
AnnaBridge 126:abea610beb85 527 #define ERASEPROTECTEDPAGE ERASEPCR0
AnnaBridge 126:abea610beb85 528
AnnaBridge 126:abea610beb85 529
AnnaBridge 126:abea610beb85 530 /* IRQ */
AnnaBridge 126:abea610beb85 531 /* COMP module was eliminated. Adapted to nrf52 headers. */
AnnaBridge 126:abea610beb85 532 #define LPCOMP_COMP_IRQHandler COMP_LPCOMP_IRQHandler
AnnaBridge 126:abea610beb85 533 #define LPCOMP_COMP_IRQn COMP_LPCOMP_IRQn
AnnaBridge 126:abea610beb85 534
AnnaBridge 126:abea610beb85 535
AnnaBridge 126:abea610beb85 536 /* RADIO */
AnnaBridge 126:abea610beb85 537 /* The name of the field SKIPADDR was corrected. Old macros added for compatibility. */
AnnaBridge 126:abea610beb85 538 #define RADIO_CRCCNF_SKIP_ADDR_Pos RADIO_CRCCNF_SKIPADDR_Pos
AnnaBridge 126:abea610beb85 539 #define RADIO_CRCCNF_SKIP_ADDR_Msk RADIO_CRCCNF_SKIPADDR_Msk
AnnaBridge 126:abea610beb85 540 #define RADIO_CRCCNF_SKIP_ADDR_Include RADIO_CRCCNF_SKIPADDR_Include
AnnaBridge 126:abea610beb85 541 #define RADIO_CRCCNF_SKIP_ADDR_Skip RADIO_CRCCNF_SKIPADDR_Skip
AnnaBridge 126:abea610beb85 542
AnnaBridge 126:abea610beb85 543
AnnaBridge 126:abea610beb85 544 /* FICR */
AnnaBridge 126:abea610beb85 545 /* The registers FICR.DEVICEID0 and FICR.DEVICEID1 were renamed into an array. */
AnnaBridge 126:abea610beb85 546 #define DEVICEID0 DEVICEID[0]
AnnaBridge 126:abea610beb85 547 #define DEVICEID1 DEVICEID[1]
AnnaBridge 126:abea610beb85 548
AnnaBridge 126:abea610beb85 549 /* The registers FICR.ER0, FICR.ER1, FICR.ER2 and FICR.ER3 were renamed into an array. */
AnnaBridge 126:abea610beb85 550 #define ER0 ER[0]
AnnaBridge 126:abea610beb85 551 #define ER1 ER[1]
AnnaBridge 126:abea610beb85 552 #define ER2 ER[2]
AnnaBridge 126:abea610beb85 553 #define ER3 ER[3]
AnnaBridge 126:abea610beb85 554
AnnaBridge 126:abea610beb85 555 /* The registers FICR.IR0, FICR.IR1, FICR.IR2 and FICR.IR3 were renamed into an array. */
AnnaBridge 126:abea610beb85 556 #define IR0 IR[0]
AnnaBridge 126:abea610beb85 557 #define IR1 IR[1]
AnnaBridge 126:abea610beb85 558 #define IR2 IR[2]
AnnaBridge 126:abea610beb85 559 #define IR3 IR[3]
AnnaBridge 126:abea610beb85 560
AnnaBridge 126:abea610beb85 561 /* The registers FICR.DEVICEADDR0 and FICR.DEVICEADDR1 were renamed into an array. */
AnnaBridge 126:abea610beb85 562 #define DEVICEADDR0 DEVICEADDR[0]
AnnaBridge 126:abea610beb85 563 #define DEVICEADDR1 DEVICEADDR[1]
AnnaBridge 126:abea610beb85 564
AnnaBridge 126:abea610beb85 565
AnnaBridge 126:abea610beb85 566 /* PPI */
AnnaBridge 126:abea610beb85 567 /* The tasks PPI.TASKS_CHGxEN and PPI.TASKS_CHGxDIS were renamed into an array of structs. */
AnnaBridge 126:abea610beb85 568 #define TASKS_CHG0EN TASKS_CHG[0].EN
AnnaBridge 126:abea610beb85 569 #define TASKS_CHG0DIS TASKS_CHG[0].DIS
AnnaBridge 126:abea610beb85 570 #define TASKS_CHG1EN TASKS_CHG[1].EN
AnnaBridge 126:abea610beb85 571 #define TASKS_CHG1DIS TASKS_CHG[1].DIS
AnnaBridge 126:abea610beb85 572 #define TASKS_CHG2EN TASKS_CHG[2].EN
AnnaBridge 126:abea610beb85 573 #define TASKS_CHG2DIS TASKS_CHG[2].DIS
AnnaBridge 126:abea610beb85 574 #define TASKS_CHG3EN TASKS_CHG[3].EN
AnnaBridge 126:abea610beb85 575 #define TASKS_CHG3DIS TASKS_CHG[3].DIS
AnnaBridge 126:abea610beb85 576
AnnaBridge 126:abea610beb85 577 /* The registers PPI.CHx_EEP and PPI.CHx_TEP were renamed into an array of structs. */
AnnaBridge 126:abea610beb85 578 #define CH0_EEP CH[0].EEP
AnnaBridge 126:abea610beb85 579 #define CH0_TEP CH[0].TEP
AnnaBridge 126:abea610beb85 580 #define CH1_EEP CH[1].EEP
AnnaBridge 126:abea610beb85 581 #define CH1_TEP CH[1].TEP
AnnaBridge 126:abea610beb85 582 #define CH2_EEP CH[2].EEP
AnnaBridge 126:abea610beb85 583 #define CH2_TEP CH[2].TEP
AnnaBridge 126:abea610beb85 584 #define CH3_EEP CH[3].EEP
AnnaBridge 126:abea610beb85 585 #define CH3_TEP CH[3].TEP
AnnaBridge 126:abea610beb85 586 #define CH4_EEP CH[4].EEP
AnnaBridge 126:abea610beb85 587 #define CH4_TEP CH[4].TEP
AnnaBridge 126:abea610beb85 588 #define CH5_EEP CH[5].EEP
AnnaBridge 126:abea610beb85 589 #define CH5_TEP CH[5].TEP
AnnaBridge 126:abea610beb85 590 #define CH6_EEP CH[6].EEP
AnnaBridge 126:abea610beb85 591 #define CH6_TEP CH[6].TEP
AnnaBridge 126:abea610beb85 592 #define CH7_EEP CH[7].EEP
AnnaBridge 126:abea610beb85 593 #define CH7_TEP CH[7].TEP
AnnaBridge 126:abea610beb85 594 #define CH8_EEP CH[8].EEP
AnnaBridge 126:abea610beb85 595 #define CH8_TEP CH[8].TEP
AnnaBridge 126:abea610beb85 596 #define CH9_EEP CH[9].EEP
AnnaBridge 126:abea610beb85 597 #define CH9_TEP CH[9].TEP
AnnaBridge 126:abea610beb85 598 #define CH10_EEP CH[10].EEP
AnnaBridge 126:abea610beb85 599 #define CH10_TEP CH[10].TEP
AnnaBridge 126:abea610beb85 600 #define CH11_EEP CH[11].EEP
AnnaBridge 126:abea610beb85 601 #define CH11_TEP CH[11].TEP
AnnaBridge 126:abea610beb85 602 #define CH12_EEP CH[12].EEP
AnnaBridge 126:abea610beb85 603 #define CH12_TEP CH[12].TEP
AnnaBridge 126:abea610beb85 604 #define CH13_EEP CH[13].EEP
AnnaBridge 126:abea610beb85 605 #define CH13_TEP CH[13].TEP
AnnaBridge 126:abea610beb85 606 #define CH14_EEP CH[14].EEP
AnnaBridge 126:abea610beb85 607 #define CH14_TEP CH[14].TEP
AnnaBridge 126:abea610beb85 608 #define CH15_EEP CH[15].EEP
AnnaBridge 126:abea610beb85 609 #define CH15_TEP CH[15].TEP
AnnaBridge 126:abea610beb85 610
AnnaBridge 126:abea610beb85 611 /* The registers PPI.CHG0, PPI.CHG1, PPI.CHG2 and PPI.CHG3 were renamed into an array. */
AnnaBridge 126:abea610beb85 612 #define CHG0 CHG[0]
AnnaBridge 126:abea610beb85 613 #define CHG1 CHG[1]
AnnaBridge 126:abea610beb85 614 #define CHG2 CHG[2]
AnnaBridge 126:abea610beb85 615 #define CHG3 CHG[3]
AnnaBridge 126:abea610beb85 616
AnnaBridge 126:abea610beb85 617 /* All bitfield macros for the CHGx registers therefore changed name. */
AnnaBridge 126:abea610beb85 618 #define PPI_CHG0_CH15_Pos PPI_CHG_CH15_Pos
AnnaBridge 126:abea610beb85 619 #define PPI_CHG0_CH15_Msk PPI_CHG_CH15_Msk
AnnaBridge 126:abea610beb85 620 #define PPI_CHG0_CH15_Excluded PPI_CHG_CH15_Excluded
AnnaBridge 126:abea610beb85 621 #define PPI_CHG0_CH15_Included PPI_CHG_CH15_Included
AnnaBridge 126:abea610beb85 622
AnnaBridge 126:abea610beb85 623 #define PPI_CHG0_CH14_Pos PPI_CHG_CH14_Pos
AnnaBridge 126:abea610beb85 624 #define PPI_CHG0_CH14_Msk PPI_CHG_CH14_Msk
AnnaBridge 126:abea610beb85 625 #define PPI_CHG0_CH14_Excluded PPI_CHG_CH14_Excluded
AnnaBridge 126:abea610beb85 626 #define PPI_CHG0_CH14_Included PPI_CHG_CH14_Included
AnnaBridge 126:abea610beb85 627
AnnaBridge 126:abea610beb85 628 #define PPI_CHG0_CH13_Pos PPI_CHG_CH13_Pos
AnnaBridge 126:abea610beb85 629 #define PPI_CHG0_CH13_Msk PPI_CHG_CH13_Msk
AnnaBridge 126:abea610beb85 630 #define PPI_CHG0_CH13_Excluded PPI_CHG_CH13_Excluded
AnnaBridge 126:abea610beb85 631 #define PPI_CHG0_CH13_Included PPI_CHG_CH13_Included
AnnaBridge 126:abea610beb85 632
AnnaBridge 126:abea610beb85 633 #define PPI_CHG0_CH12_Pos PPI_CHG_CH12_Pos
AnnaBridge 126:abea610beb85 634 #define PPI_CHG0_CH12_Msk PPI_CHG_CH12_Msk
AnnaBridge 126:abea610beb85 635 #define PPI_CHG0_CH12_Excluded PPI_CHG_CH12_Excluded
AnnaBridge 126:abea610beb85 636 #define PPI_CHG0_CH12_Included PPI_CHG_CH12_Included
AnnaBridge 126:abea610beb85 637
AnnaBridge 126:abea610beb85 638 #define PPI_CHG0_CH11_Pos PPI_CHG_CH11_Pos
AnnaBridge 126:abea610beb85 639 #define PPI_CHG0_CH11_Msk PPI_CHG_CH11_Msk
AnnaBridge 126:abea610beb85 640 #define PPI_CHG0_CH11_Excluded PPI_CHG_CH11_Excluded
AnnaBridge 126:abea610beb85 641 #define PPI_CHG0_CH11_Included PPI_CHG_CH11_Included
AnnaBridge 126:abea610beb85 642
AnnaBridge 126:abea610beb85 643 #define PPI_CHG0_CH10_Pos PPI_CHG_CH10_Pos
AnnaBridge 126:abea610beb85 644 #define PPI_CHG0_CH10_Msk PPI_CHG_CH10_Msk
AnnaBridge 126:abea610beb85 645 #define PPI_CHG0_CH10_Excluded PPI_CHG_CH10_Excluded
AnnaBridge 126:abea610beb85 646 #define PPI_CHG0_CH10_Included PPI_CHG_CH10_Included
AnnaBridge 126:abea610beb85 647
AnnaBridge 126:abea610beb85 648 #define PPI_CHG0_CH9_Pos PPI_CHG_CH9_Pos
AnnaBridge 126:abea610beb85 649 #define PPI_CHG0_CH9_Msk PPI_CHG_CH9_Msk
AnnaBridge 126:abea610beb85 650 #define PPI_CHG0_CH9_Excluded PPI_CHG_CH9_Excluded
AnnaBridge 126:abea610beb85 651 #define PPI_CHG0_CH9_Included PPI_CHG_CH9_Included
AnnaBridge 126:abea610beb85 652
AnnaBridge 126:abea610beb85 653 #define PPI_CHG0_CH8_Pos PPI_CHG_CH8_Pos
AnnaBridge 126:abea610beb85 654 #define PPI_CHG0_CH8_Msk PPI_CHG_CH8_Msk
AnnaBridge 126:abea610beb85 655 #define PPI_CHG0_CH8_Excluded PPI_CHG_CH8_Excluded
AnnaBridge 126:abea610beb85 656 #define PPI_CHG0_CH8_Included PPI_CHG_CH8_Included
AnnaBridge 126:abea610beb85 657
AnnaBridge 126:abea610beb85 658 #define PPI_CHG0_CH7_Pos PPI_CHG_CH7_Pos
AnnaBridge 126:abea610beb85 659 #define PPI_CHG0_CH7_Msk PPI_CHG_CH7_Msk
AnnaBridge 126:abea610beb85 660 #define PPI_CHG0_CH7_Excluded PPI_CHG_CH7_Excluded
AnnaBridge 126:abea610beb85 661 #define PPI_CHG0_CH7_Included PPI_CHG_CH7_Included
AnnaBridge 126:abea610beb85 662
AnnaBridge 126:abea610beb85 663 #define PPI_CHG0_CH6_Pos PPI_CHG_CH6_Pos
AnnaBridge 126:abea610beb85 664 #define PPI_CHG0_CH6_Msk PPI_CHG_CH6_Msk
AnnaBridge 126:abea610beb85 665 #define PPI_CHG0_CH6_Excluded PPI_CHG_CH6_Excluded
AnnaBridge 126:abea610beb85 666 #define PPI_CHG0_CH6_Included PPI_CHG_CH6_Included
AnnaBridge 126:abea610beb85 667
AnnaBridge 126:abea610beb85 668 #define PPI_CHG0_CH5_Pos PPI_CHG_CH5_Pos
AnnaBridge 126:abea610beb85 669 #define PPI_CHG0_CH5_Msk PPI_CHG_CH5_Msk
AnnaBridge 126:abea610beb85 670 #define PPI_CHG0_CH5_Excluded PPI_CHG_CH5_Excluded
AnnaBridge 126:abea610beb85 671 #define PPI_CHG0_CH5_Included PPI_CHG_CH5_Included
AnnaBridge 126:abea610beb85 672
AnnaBridge 126:abea610beb85 673 #define PPI_CHG0_CH4_Pos PPI_CHG_CH4_Pos
AnnaBridge 126:abea610beb85 674 #define PPI_CHG0_CH4_Msk PPI_CHG_CH4_Msk
AnnaBridge 126:abea610beb85 675 #define PPI_CHG0_CH4_Excluded PPI_CHG_CH4_Excluded
AnnaBridge 126:abea610beb85 676 #define PPI_CHG0_CH4_Included PPI_CHG_CH4_Included
AnnaBridge 126:abea610beb85 677
AnnaBridge 126:abea610beb85 678 #define PPI_CHG0_CH3_Pos PPI_CHG_CH3_Pos
AnnaBridge 126:abea610beb85 679 #define PPI_CHG0_CH3_Msk PPI_CHG_CH3_Msk
AnnaBridge 126:abea610beb85 680 #define PPI_CHG0_CH3_Excluded PPI_CHG_CH3_Excluded
AnnaBridge 126:abea610beb85 681 #define PPI_CHG0_CH3_Included PPI_CHG_CH3_Included
AnnaBridge 126:abea610beb85 682
AnnaBridge 126:abea610beb85 683 #define PPI_CHG0_CH2_Pos PPI_CHG_CH2_Pos
AnnaBridge 126:abea610beb85 684 #define PPI_CHG0_CH2_Msk PPI_CHG_CH2_Msk
AnnaBridge 126:abea610beb85 685 #define PPI_CHG0_CH2_Excluded PPI_CHG_CH2_Excluded
AnnaBridge 126:abea610beb85 686 #define PPI_CHG0_CH2_Included PPI_CHG_CH2_Included
AnnaBridge 126:abea610beb85 687
AnnaBridge 126:abea610beb85 688 #define PPI_CHG0_CH1_Pos PPI_CHG_CH1_Pos
AnnaBridge 126:abea610beb85 689 #define PPI_CHG0_CH1_Msk PPI_CHG_CH1_Msk
AnnaBridge 126:abea610beb85 690 #define PPI_CHG0_CH1_Excluded PPI_CHG_CH1_Excluded
AnnaBridge 126:abea610beb85 691 #define PPI_CHG0_CH1_Included PPI_CHG_CH1_Included
AnnaBridge 126:abea610beb85 692
AnnaBridge 126:abea610beb85 693 #define PPI_CHG0_CH0_Pos PPI_CHG_CH0_Pos
AnnaBridge 126:abea610beb85 694 #define PPI_CHG0_CH0_Msk PPI_CHG_CH0_Msk
AnnaBridge 126:abea610beb85 695 #define PPI_CHG0_CH0_Excluded PPI_CHG_CH0_Excluded
AnnaBridge 126:abea610beb85 696 #define PPI_CHG0_CH0_Included PPI_CHG_CH0_Included
AnnaBridge 126:abea610beb85 697
AnnaBridge 126:abea610beb85 698 #define PPI_CHG1_CH15_Pos PPI_CHG_CH15_Pos
AnnaBridge 126:abea610beb85 699 #define PPI_CHG1_CH15_Msk PPI_CHG_CH15_Msk
AnnaBridge 126:abea610beb85 700 #define PPI_CHG1_CH15_Excluded PPI_CHG_CH15_Excluded
AnnaBridge 126:abea610beb85 701 #define PPI_CHG1_CH15_Included PPI_CHG_CH15_Included
AnnaBridge 126:abea610beb85 702
AnnaBridge 126:abea610beb85 703 #define PPI_CHG1_CH14_Pos PPI_CHG_CH14_Pos
AnnaBridge 126:abea610beb85 704 #define PPI_CHG1_CH14_Msk PPI_CHG_CH14_Msk
AnnaBridge 126:abea610beb85 705 #define PPI_CHG1_CH14_Excluded PPI_CHG_CH14_Excluded
AnnaBridge 126:abea610beb85 706 #define PPI_CHG1_CH14_Included PPI_CHG_CH14_Included
AnnaBridge 126:abea610beb85 707
AnnaBridge 126:abea610beb85 708 #define PPI_CHG1_CH13_Pos PPI_CHG_CH13_Pos
AnnaBridge 126:abea610beb85 709 #define PPI_CHG1_CH13_Msk PPI_CHG_CH13_Msk
AnnaBridge 126:abea610beb85 710 #define PPI_CHG1_CH13_Excluded PPI_CHG_CH13_Excluded
AnnaBridge 126:abea610beb85 711 #define PPI_CHG1_CH13_Included PPI_CHG_CH13_Included
AnnaBridge 126:abea610beb85 712
AnnaBridge 126:abea610beb85 713 #define PPI_CHG1_CH12_Pos PPI_CHG_CH12_Pos
AnnaBridge 126:abea610beb85 714 #define PPI_CHG1_CH12_Msk PPI_CHG_CH12_Msk
AnnaBridge 126:abea610beb85 715 #define PPI_CHG1_CH12_Excluded PPI_CHG_CH12_Excluded
AnnaBridge 126:abea610beb85 716 #define PPI_CHG1_CH12_Included PPI_CHG_CH12_Included
AnnaBridge 126:abea610beb85 717
AnnaBridge 126:abea610beb85 718 #define PPI_CHG1_CH11_Pos PPI_CHG_CH11_Pos
AnnaBridge 126:abea610beb85 719 #define PPI_CHG1_CH11_Msk PPI_CHG_CH11_Msk
AnnaBridge 126:abea610beb85 720 #define PPI_CHG1_CH11_Excluded PPI_CHG_CH11_Excluded
AnnaBridge 126:abea610beb85 721 #define PPI_CHG1_CH11_Included PPI_CHG_CH11_Included
AnnaBridge 126:abea610beb85 722
AnnaBridge 126:abea610beb85 723 #define PPI_CHG1_CH10_Pos PPI_CHG_CH10_Pos
AnnaBridge 126:abea610beb85 724 #define PPI_CHG1_CH10_Msk PPI_CHG_CH10_Msk
AnnaBridge 126:abea610beb85 725 #define PPI_CHG1_CH10_Excluded PPI_CHG_CH10_Excluded
AnnaBridge 126:abea610beb85 726 #define PPI_CHG1_CH10_Included PPI_CHG_CH10_Included
AnnaBridge 126:abea610beb85 727
AnnaBridge 126:abea610beb85 728 #define PPI_CHG1_CH9_Pos PPI_CHG_CH9_Pos
AnnaBridge 126:abea610beb85 729 #define PPI_CHG1_CH9_Msk PPI_CHG_CH9_Msk
AnnaBridge 126:abea610beb85 730 #define PPI_CHG1_CH9_Excluded PPI_CHG_CH9_Excluded
AnnaBridge 126:abea610beb85 731 #define PPI_CHG1_CH9_Included PPI_CHG_CH9_Included
AnnaBridge 126:abea610beb85 732
AnnaBridge 126:abea610beb85 733 #define PPI_CHG1_CH8_Pos PPI_CHG_CH8_Pos
AnnaBridge 126:abea610beb85 734 #define PPI_CHG1_CH8_Msk PPI_CHG_CH8_Msk
AnnaBridge 126:abea610beb85 735 #define PPI_CHG1_CH8_Excluded PPI_CHG_CH8_Excluded
AnnaBridge 126:abea610beb85 736 #define PPI_CHG1_CH8_Included PPI_CHG_CH8_Included
AnnaBridge 126:abea610beb85 737
AnnaBridge 126:abea610beb85 738 #define PPI_CHG1_CH7_Pos PPI_CHG_CH7_Pos
AnnaBridge 126:abea610beb85 739 #define PPI_CHG1_CH7_Msk PPI_CHG_CH7_Msk
AnnaBridge 126:abea610beb85 740 #define PPI_CHG1_CH7_Excluded PPI_CHG_CH7_Excluded
AnnaBridge 126:abea610beb85 741 #define PPI_CHG1_CH7_Included PPI_CHG_CH7_Included
AnnaBridge 126:abea610beb85 742
AnnaBridge 126:abea610beb85 743 #define PPI_CHG1_CH6_Pos PPI_CHG_CH6_Pos
AnnaBridge 126:abea610beb85 744 #define PPI_CHG1_CH6_Msk PPI_CHG_CH6_Msk
AnnaBridge 126:abea610beb85 745 #define PPI_CHG1_CH6_Excluded PPI_CHG_CH6_Excluded
AnnaBridge 126:abea610beb85 746 #define PPI_CHG1_CH6_Included PPI_CHG_CH6_Included
AnnaBridge 126:abea610beb85 747
AnnaBridge 126:abea610beb85 748 #define PPI_CHG1_CH5_Pos PPI_CHG_CH5_Pos
AnnaBridge 126:abea610beb85 749 #define PPI_CHG1_CH5_Msk PPI_CHG_CH5_Msk
AnnaBridge 126:abea610beb85 750 #define PPI_CHG1_CH5_Excluded PPI_CHG_CH5_Excluded
AnnaBridge 126:abea610beb85 751 #define PPI_CHG1_CH5_Included PPI_CHG_CH5_Included
AnnaBridge 126:abea610beb85 752
AnnaBridge 126:abea610beb85 753 #define PPI_CHG1_CH4_Pos PPI_CHG_CH4_Pos
AnnaBridge 126:abea610beb85 754 #define PPI_CHG1_CH4_Msk PPI_CHG_CH4_Msk
AnnaBridge 126:abea610beb85 755 #define PPI_CHG1_CH4_Excluded PPI_CHG_CH4_Excluded
AnnaBridge 126:abea610beb85 756 #define PPI_CHG1_CH4_Included PPI_CHG_CH4_Included
AnnaBridge 126:abea610beb85 757
AnnaBridge 126:abea610beb85 758 #define PPI_CHG1_CH3_Pos PPI_CHG_CH3_Pos
AnnaBridge 126:abea610beb85 759 #define PPI_CHG1_CH3_Msk PPI_CHG_CH3_Msk
AnnaBridge 126:abea610beb85 760 #define PPI_CHG1_CH3_Excluded PPI_CHG_CH3_Excluded
AnnaBridge 126:abea610beb85 761 #define PPI_CHG1_CH3_Included PPI_CHG_CH3_Included
AnnaBridge 126:abea610beb85 762
AnnaBridge 126:abea610beb85 763 #define PPI_CHG1_CH2_Pos PPI_CHG_CH2_Pos
AnnaBridge 126:abea610beb85 764 #define PPI_CHG1_CH2_Msk PPI_CHG_CH2_Msk
AnnaBridge 126:abea610beb85 765 #define PPI_CHG1_CH2_Excluded PPI_CHG_CH2_Excluded
AnnaBridge 126:abea610beb85 766 #define PPI_CHG1_CH2_Included PPI_CHG_CH2_Included
AnnaBridge 126:abea610beb85 767
AnnaBridge 126:abea610beb85 768 #define PPI_CHG1_CH1_Pos PPI_CHG_CH1_Pos
AnnaBridge 126:abea610beb85 769 #define PPI_CHG1_CH1_Msk PPI_CHG_CH1_Msk
AnnaBridge 126:abea610beb85 770 #define PPI_CHG1_CH1_Excluded PPI_CHG_CH1_Excluded
AnnaBridge 126:abea610beb85 771 #define PPI_CHG1_CH1_Included PPI_CHG_CH1_Included
AnnaBridge 126:abea610beb85 772
AnnaBridge 126:abea610beb85 773 #define PPI_CHG1_CH0_Pos PPI_CHG_CH0_Pos
AnnaBridge 126:abea610beb85 774 #define PPI_CHG1_CH0_Msk PPI_CHG_CH0_Msk
AnnaBridge 126:abea610beb85 775 #define PPI_CHG1_CH0_Excluded PPI_CHG_CH0_Excluded
AnnaBridge 126:abea610beb85 776 #define PPI_CHG1_CH0_Included PPI_CHG_CH0_Included
AnnaBridge 126:abea610beb85 777
AnnaBridge 126:abea610beb85 778 #define PPI_CHG2_CH15_Pos PPI_CHG_CH15_Pos
AnnaBridge 126:abea610beb85 779 #define PPI_CHG2_CH15_Msk PPI_CHG_CH15_Msk
AnnaBridge 126:abea610beb85 780 #define PPI_CHG2_CH15_Excluded PPI_CHG_CH15_Excluded
AnnaBridge 126:abea610beb85 781 #define PPI_CHG2_CH15_Included PPI_CHG_CH15_Included
AnnaBridge 126:abea610beb85 782
AnnaBridge 126:abea610beb85 783 #define PPI_CHG2_CH14_Pos PPI_CHG_CH14_Pos
AnnaBridge 126:abea610beb85 784 #define PPI_CHG2_CH14_Msk PPI_CHG_CH14_Msk
AnnaBridge 126:abea610beb85 785 #define PPI_CHG2_CH14_Excluded PPI_CHG_CH14_Excluded
AnnaBridge 126:abea610beb85 786 #define PPI_CHG2_CH14_Included PPI_CHG_CH14_Included
AnnaBridge 126:abea610beb85 787
AnnaBridge 126:abea610beb85 788 #define PPI_CHG2_CH13_Pos PPI_CHG_CH13_Pos
AnnaBridge 126:abea610beb85 789 #define PPI_CHG2_CH13_Msk PPI_CHG_CH13_Msk
AnnaBridge 126:abea610beb85 790 #define PPI_CHG2_CH13_Excluded PPI_CHG_CH13_Excluded
AnnaBridge 126:abea610beb85 791 #define PPI_CHG2_CH13_Included PPI_CHG_CH13_Included
AnnaBridge 126:abea610beb85 792
AnnaBridge 126:abea610beb85 793 #define PPI_CHG2_CH12_Pos PPI_CHG_CH12_Pos
AnnaBridge 126:abea610beb85 794 #define PPI_CHG2_CH12_Msk PPI_CHG_CH12_Msk
AnnaBridge 126:abea610beb85 795 #define PPI_CHG2_CH12_Excluded PPI_CHG_CH12_Excluded
AnnaBridge 126:abea610beb85 796 #define PPI_CHG2_CH12_Included PPI_CHG_CH12_Included
AnnaBridge 126:abea610beb85 797
AnnaBridge 126:abea610beb85 798 #define PPI_CHG2_CH11_Pos PPI_CHG_CH11_Pos
AnnaBridge 126:abea610beb85 799 #define PPI_CHG2_CH11_Msk PPI_CHG_CH11_Msk
AnnaBridge 126:abea610beb85 800 #define PPI_CHG2_CH11_Excluded PPI_CHG_CH11_Excluded
AnnaBridge 126:abea610beb85 801 #define PPI_CHG2_CH11_Included PPI_CHG_CH11_Included
AnnaBridge 126:abea610beb85 802
AnnaBridge 126:abea610beb85 803 #define PPI_CHG2_CH10_Pos PPI_CHG_CH10_Pos
AnnaBridge 126:abea610beb85 804 #define PPI_CHG2_CH10_Msk PPI_CHG_CH10_Msk
AnnaBridge 126:abea610beb85 805 #define PPI_CHG2_CH10_Excluded PPI_CHG_CH10_Excluded
AnnaBridge 126:abea610beb85 806 #define PPI_CHG2_CH10_Included PPI_CHG_CH10_Included
AnnaBridge 126:abea610beb85 807
AnnaBridge 126:abea610beb85 808 #define PPI_CHG2_CH9_Pos PPI_CHG_CH9_Pos
AnnaBridge 126:abea610beb85 809 #define PPI_CHG2_CH9_Msk PPI_CHG_CH9_Msk
AnnaBridge 126:abea610beb85 810 #define PPI_CHG2_CH9_Excluded PPI_CHG_CH9_Excluded
AnnaBridge 126:abea610beb85 811 #define PPI_CHG2_CH9_Included PPI_CHG_CH9_Included
AnnaBridge 126:abea610beb85 812
AnnaBridge 126:abea610beb85 813 #define PPI_CHG2_CH8_Pos PPI_CHG_CH8_Pos
AnnaBridge 126:abea610beb85 814 #define PPI_CHG2_CH8_Msk PPI_CHG_CH8_Msk
AnnaBridge 126:abea610beb85 815 #define PPI_CHG2_CH8_Excluded PPI_CHG_CH8_Excluded
AnnaBridge 126:abea610beb85 816 #define PPI_CHG2_CH8_Included PPI_CHG_CH8_Included
AnnaBridge 126:abea610beb85 817
AnnaBridge 126:abea610beb85 818 #define PPI_CHG2_CH7_Pos PPI_CHG_CH7_Pos
AnnaBridge 126:abea610beb85 819 #define PPI_CHG2_CH7_Msk PPI_CHG_CH7_Msk
AnnaBridge 126:abea610beb85 820 #define PPI_CHG2_CH7_Excluded PPI_CHG_CH7_Excluded
AnnaBridge 126:abea610beb85 821 #define PPI_CHG2_CH7_Included PPI_CHG_CH7_Included
AnnaBridge 126:abea610beb85 822
AnnaBridge 126:abea610beb85 823 #define PPI_CHG2_CH6_Pos PPI_CHG_CH6_Pos
AnnaBridge 126:abea610beb85 824 #define PPI_CHG2_CH6_Msk PPI_CHG_CH6_Msk
AnnaBridge 126:abea610beb85 825 #define PPI_CHG2_CH6_Excluded PPI_CHG_CH6_Excluded
AnnaBridge 126:abea610beb85 826 #define PPI_CHG2_CH6_Included PPI_CHG_CH6_Included
AnnaBridge 126:abea610beb85 827
AnnaBridge 126:abea610beb85 828 #define PPI_CHG2_CH5_Pos PPI_CHG_CH5_Pos
AnnaBridge 126:abea610beb85 829 #define PPI_CHG2_CH5_Msk PPI_CHG_CH5_Msk
AnnaBridge 126:abea610beb85 830 #define PPI_CHG2_CH5_Excluded PPI_CHG_CH5_Excluded
AnnaBridge 126:abea610beb85 831 #define PPI_CHG2_CH5_Included PPI_CHG_CH5_Included
AnnaBridge 126:abea610beb85 832
AnnaBridge 126:abea610beb85 833 #define PPI_CHG2_CH4_Pos PPI_CHG_CH4_Pos
AnnaBridge 126:abea610beb85 834 #define PPI_CHG2_CH4_Msk PPI_CHG_CH4_Msk
AnnaBridge 126:abea610beb85 835 #define PPI_CHG2_CH4_Excluded PPI_CHG_CH4_Excluded
AnnaBridge 126:abea610beb85 836 #define PPI_CHG2_CH4_Included PPI_CHG_CH4_Included
AnnaBridge 126:abea610beb85 837
AnnaBridge 126:abea610beb85 838 #define PPI_CHG2_CH3_Pos PPI_CHG_CH3_Pos
AnnaBridge 126:abea610beb85 839 #define PPI_CHG2_CH3_Msk PPI_CHG_CH3_Msk
AnnaBridge 126:abea610beb85 840 #define PPI_CHG2_CH3_Excluded PPI_CHG_CH3_Excluded
AnnaBridge 126:abea610beb85 841 #define PPI_CHG2_CH3_Included PPI_CHG_CH3_Included
AnnaBridge 126:abea610beb85 842
AnnaBridge 126:abea610beb85 843 #define PPI_CHG2_CH2_Pos PPI_CHG_CH2_Pos
AnnaBridge 126:abea610beb85 844 #define PPI_CHG2_CH2_Msk PPI_CHG_CH2_Msk
AnnaBridge 126:abea610beb85 845 #define PPI_CHG2_CH2_Excluded PPI_CHG_CH2_Excluded
AnnaBridge 126:abea610beb85 846 #define PPI_CHG2_CH2_Included PPI_CHG_CH2_Included
AnnaBridge 126:abea610beb85 847
AnnaBridge 126:abea610beb85 848 #define PPI_CHG2_CH1_Pos PPI_CHG_CH1_Pos
AnnaBridge 126:abea610beb85 849 #define PPI_CHG2_CH1_Msk PPI_CHG_CH1_Msk
AnnaBridge 126:abea610beb85 850 #define PPI_CHG2_CH1_Excluded PPI_CHG_CH1_Excluded
AnnaBridge 126:abea610beb85 851 #define PPI_CHG2_CH1_Included PPI_CHG_CH1_Included
AnnaBridge 126:abea610beb85 852
AnnaBridge 126:abea610beb85 853 #define PPI_CHG2_CH0_Pos PPI_CHG_CH0_Pos
AnnaBridge 126:abea610beb85 854 #define PPI_CHG2_CH0_Msk PPI_CHG_CH0_Msk
AnnaBridge 126:abea610beb85 855 #define PPI_CHG2_CH0_Excluded PPI_CHG_CH0_Excluded
AnnaBridge 126:abea610beb85 856 #define PPI_CHG2_CH0_Included PPI_CHG_CH0_Included
AnnaBridge 126:abea610beb85 857
AnnaBridge 126:abea610beb85 858 #define PPI_CHG3_CH15_Pos PPI_CHG_CH15_Pos
AnnaBridge 126:abea610beb85 859 #define PPI_CHG3_CH15_Msk PPI_CHG_CH15_Msk
AnnaBridge 126:abea610beb85 860 #define PPI_CHG3_CH15_Excluded PPI_CHG_CH15_Excluded
AnnaBridge 126:abea610beb85 861 #define PPI_CHG3_CH15_Included PPI_CHG_CH15_Included
AnnaBridge 126:abea610beb85 862
AnnaBridge 126:abea610beb85 863 #define PPI_CHG3_CH14_Pos PPI_CHG_CH14_Pos
AnnaBridge 126:abea610beb85 864 #define PPI_CHG3_CH14_Msk PPI_CHG_CH14_Msk
AnnaBridge 126:abea610beb85 865 #define PPI_CHG3_CH14_Excluded PPI_CHG_CH14_Excluded
AnnaBridge 126:abea610beb85 866 #define PPI_CHG3_CH14_Included PPI_CHG_CH14_Included
AnnaBridge 126:abea610beb85 867
AnnaBridge 126:abea610beb85 868 #define PPI_CHG3_CH13_Pos PPI_CHG_CH13_Pos
AnnaBridge 126:abea610beb85 869 #define PPI_CHG3_CH13_Msk PPI_CHG_CH13_Msk
AnnaBridge 126:abea610beb85 870 #define PPI_CHG3_CH13_Excluded PPI_CHG_CH13_Excluded
AnnaBridge 126:abea610beb85 871 #define PPI_CHG3_CH13_Included PPI_CHG_CH13_Included
AnnaBridge 126:abea610beb85 872
AnnaBridge 126:abea610beb85 873 #define PPI_CHG3_CH12_Pos PPI_CHG_CH12_Pos
AnnaBridge 126:abea610beb85 874 #define PPI_CHG3_CH12_Msk PPI_CHG_CH12_Msk
AnnaBridge 126:abea610beb85 875 #define PPI_CHG3_CH12_Excluded PPI_CHG_CH12_Excluded
AnnaBridge 126:abea610beb85 876 #define PPI_CHG3_CH12_Included PPI_CHG_CH12_Included
AnnaBridge 126:abea610beb85 877
AnnaBridge 126:abea610beb85 878 #define PPI_CHG3_CH11_Pos PPI_CHG_CH11_Pos
AnnaBridge 126:abea610beb85 879 #define PPI_CHG3_CH11_Msk PPI_CHG_CH11_Msk
AnnaBridge 126:abea610beb85 880 #define PPI_CHG3_CH11_Excluded PPI_CHG_CH11_Excluded
AnnaBridge 126:abea610beb85 881 #define PPI_CHG3_CH11_Included PPI_CHG_CH11_Included
AnnaBridge 126:abea610beb85 882
AnnaBridge 126:abea610beb85 883 #define PPI_CHG3_CH10_Pos PPI_CHG_CH10_Pos
AnnaBridge 126:abea610beb85 884 #define PPI_CHG3_CH10_Msk PPI_CHG_CH10_Msk
AnnaBridge 126:abea610beb85 885 #define PPI_CHG3_CH10_Excluded PPI_CHG_CH10_Excluded
AnnaBridge 126:abea610beb85 886 #define PPI_CHG3_CH10_Included PPI_CHG_CH10_Included
AnnaBridge 126:abea610beb85 887
AnnaBridge 126:abea610beb85 888 #define PPI_CHG3_CH9_Pos PPI_CHG_CH9_Pos
AnnaBridge 126:abea610beb85 889 #define PPI_CHG3_CH9_Msk PPI_CHG_CH9_Msk
AnnaBridge 126:abea610beb85 890 #define PPI_CHG3_CH9_Excluded PPI_CHG_CH9_Excluded
AnnaBridge 126:abea610beb85 891 #define PPI_CHG3_CH9_Included PPI_CHG_CH9_Included
AnnaBridge 126:abea610beb85 892
AnnaBridge 126:abea610beb85 893 #define PPI_CHG3_CH8_Pos PPI_CHG_CH8_Pos
AnnaBridge 126:abea610beb85 894 #define PPI_CHG3_CH8_Msk PPI_CHG_CH8_Msk
AnnaBridge 126:abea610beb85 895 #define PPI_CHG3_CH8_Excluded PPI_CHG_CH8_Excluded
AnnaBridge 126:abea610beb85 896 #define PPI_CHG3_CH8_Included PPI_CHG_CH8_Included
AnnaBridge 126:abea610beb85 897
AnnaBridge 126:abea610beb85 898 #define PPI_CHG3_CH7_Pos PPI_CHG_CH7_Pos
AnnaBridge 126:abea610beb85 899 #define PPI_CHG3_CH7_Msk PPI_CHG_CH7_Msk
AnnaBridge 126:abea610beb85 900 #define PPI_CHG3_CH7_Excluded PPI_CHG_CH7_Excluded
AnnaBridge 126:abea610beb85 901 #define PPI_CHG3_CH7_Included PPI_CHG_CH7_Included
AnnaBridge 126:abea610beb85 902
AnnaBridge 126:abea610beb85 903 #define PPI_CHG3_CH6_Pos PPI_CHG_CH6_Pos
AnnaBridge 126:abea610beb85 904 #define PPI_CHG3_CH6_Msk PPI_CHG_CH6_Msk
AnnaBridge 126:abea610beb85 905 #define PPI_CHG3_CH6_Excluded PPI_CHG_CH6_Excluded
AnnaBridge 126:abea610beb85 906 #define PPI_CHG3_CH6_Included PPI_CHG_CH6_Included
AnnaBridge 126:abea610beb85 907
AnnaBridge 126:abea610beb85 908 #define PPI_CHG3_CH5_Pos PPI_CHG_CH5_Pos
AnnaBridge 126:abea610beb85 909 #define PPI_CHG3_CH5_Msk PPI_CHG_CH5_Msk
AnnaBridge 126:abea610beb85 910 #define PPI_CHG3_CH5_Excluded PPI_CHG_CH5_Excluded
AnnaBridge 126:abea610beb85 911 #define PPI_CHG3_CH5_Included PPI_CHG_CH5_Included
AnnaBridge 126:abea610beb85 912
AnnaBridge 126:abea610beb85 913 #define PPI_CHG3_CH4_Pos PPI_CHG_CH4_Pos
AnnaBridge 126:abea610beb85 914 #define PPI_CHG3_CH4_Msk PPI_CHG_CH4_Msk
AnnaBridge 126:abea610beb85 915 #define PPI_CHG3_CH4_Excluded PPI_CHG_CH4_Excluded
AnnaBridge 126:abea610beb85 916 #define PPI_CHG3_CH4_Included PPI_CHG_CH4_Included
AnnaBridge 126:abea610beb85 917
AnnaBridge 126:abea610beb85 918 #define PPI_CHG3_CH3_Pos PPI_CHG_CH3_Pos
AnnaBridge 126:abea610beb85 919 #define PPI_CHG3_CH3_Msk PPI_CHG_CH3_Msk
AnnaBridge 126:abea610beb85 920 #define PPI_CHG3_CH3_Excluded PPI_CHG_CH3_Excluded
AnnaBridge 126:abea610beb85 921 #define PPI_CHG3_CH3_Included PPI_CHG_CH3_Included
AnnaBridge 126:abea610beb85 922
AnnaBridge 126:abea610beb85 923 #define PPI_CHG3_CH2_Pos PPI_CHG_CH2_Pos
AnnaBridge 126:abea610beb85 924 #define PPI_CHG3_CH2_Msk PPI_CHG_CH2_Msk
AnnaBridge 126:abea610beb85 925 #define PPI_CHG3_CH2_Excluded PPI_CHG_CH2_Excluded
AnnaBridge 126:abea610beb85 926 #define PPI_CHG3_CH2_Included PPI_CHG_CH2_Included
AnnaBridge 126:abea610beb85 927
AnnaBridge 126:abea610beb85 928 #define PPI_CHG3_CH1_Pos PPI_CHG_CH1_Pos
AnnaBridge 126:abea610beb85 929 #define PPI_CHG3_CH1_Msk PPI_CHG_CH1_Msk
AnnaBridge 126:abea610beb85 930 #define PPI_CHG3_CH1_Excluded PPI_CHG_CH1_Excluded
AnnaBridge 126:abea610beb85 931 #define PPI_CHG3_CH1_Included PPI_CHG_CH1_Included
AnnaBridge 126:abea610beb85 932
AnnaBridge 126:abea610beb85 933 #define PPI_CHG3_CH0_Pos PPI_CHG_CH0_Pos
AnnaBridge 126:abea610beb85 934 #define PPI_CHG3_CH0_Msk PPI_CHG_CH0_Msk
AnnaBridge 126:abea610beb85 935 #define PPI_CHG3_CH0_Excluded PPI_CHG_CH0_Excluded
AnnaBridge 126:abea610beb85 936 #define PPI_CHG3_CH0_Included PPI_CHG_CH0_Included
AnnaBridge 126:abea610beb85 937
AnnaBridge 126:abea610beb85 938
AnnaBridge 126:abea610beb85 939
AnnaBridge 126:abea610beb85 940
AnnaBridge 126:abea610beb85 941 /*lint --flb "Leave library region" */
AnnaBridge 126:abea610beb85 942
AnnaBridge 126:abea610beb85 943 #endif /* NRF51_TO_NRF52_H */
AnnaBridge 126:abea610beb85 944