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TARGET_NUCLEO_L053R8/TARGET_STM/TARGET_STM32L0/device/stm32l0xx_ll_tim.h@138:093f2bd7b9eb, 2017-03-14 (annotated)

Committer:: <>
Date:: Tue Mar 14 16:20:51 2017 +0000
Revision:: 138:093f2bd7b9eb
Parent:: 136:ef9c61f8c49f
Child:: 167:84c0a372a020

Release 138 of the mbed library

Ports for Upcoming Targets

Fixes and Changes

3716: fix for issue #3715: correction in startup files for ARM and IAR, alignment of system_stm32f429xx.c files https://github.com/ARMmbed/mbed-os/pull/3716

3741: STM32 remove warning in hal_tick_32b.c file https://github.com/ARMmbed/mbed-os/pull/3741

3780: STM32L4 : Fix GPIO G port compatibility https://github.com/ARMmbed/mbed-os/pull/3780

3831: NCS36510: SPISLAVE enabled (Conflict resolved) https://github.com/ARMmbed/mbed-os/pull/3831

3836: Allow to redefine nRF's PSTORAGE_NUM_OF_PAGES outside of the mbed-os https://github.com/ARMmbed/mbed-os/pull/3836

3840: STM32: gpio SPEED - always set High Speed by default https://github.com/ARMmbed/mbed-os/pull/3840

3844: STM32 GPIO: Typo correction. Update comment (GPIO_IP_WITHOUT_BRR) https://github.com/ARMmbed/mbed-os/pull/3844

3850: STM32: change spi error to debug warning https://github.com/ARMmbed/mbed-os/pull/3850

3860: Define GPIO_IP_WITHOUT_BRR for xDot platform https://github.com/ARMmbed/mbed-os/pull/3860

3880: DISCO_F469NI: allow the use of CAN2 instance when CAN1 is not activated https://github.com/ARMmbed/mbed-os/pull/3880

3795: Fix pwm period calc https://github.com/ARMmbed/mbed-os/pull/3795

3828: STM32 CAN API: correct format and type https://github.com/ARMmbed/mbed-os/pull/3828

3842: TARGET_NRF: corrected spi_init() to properly handle re-initialization https://github.com/ARMmbed/mbed-os/pull/3842

3843: STM32L476xG: set APB2 clock to 80MHz (instead of 40MHz) https://github.com/ARMmbed/mbed-os/pull/3843

3879: NUCLEO_F446ZE: Add missing AnalogIn pins on PF_3, PF_5 and PF_10. https://github.com/ARMmbed/mbed-os/pull/3879

3902: Fix heap and stack size for NUCLEO_F746ZG https://github.com/ARMmbed/mbed-os/pull/3902

3829: can_write(): return error code when no tx mailboxes are available https://github.com/ARMmbed/mbed-os/pull/3829

Who changed what in which revision?

User	Revision	Line number	New contents of line
Kojto	136:ef9c61f8c49f	1	/**
Kojto	136:ef9c61f8c49f	2	******************************************************************************
Kojto	136:ef9c61f8c49f	3	* @file stm32l0xx_ll_tim.h
Kojto	136:ef9c61f8c49f	4	* @author MCD Application Team
Kojto	136:ef9c61f8c49f	5	* @version V1.7.0
Kojto	136:ef9c61f8c49f	6	* @date 31-May-2016
Kojto	136:ef9c61f8c49f	7	* @brief Header file of TIM LL module.
Kojto	136:ef9c61f8c49f	8	******************************************************************************
Kojto	136:ef9c61f8c49f	9	* @attention
Kojto	136:ef9c61f8c49f	10	*
Kojto	136:ef9c61f8c49f	11	* <h2><center>© COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
Kojto	136:ef9c61f8c49f	12	*
Kojto	136:ef9c61f8c49f	13	* Redistribution and use in source and binary forms, with or without modification,
Kojto	136:ef9c61f8c49f	14	* are permitted provided that the following conditions are met:
Kojto	136:ef9c61f8c49f	15	* 1. Redistributions of source code must retain the above copyright notice,
Kojto	136:ef9c61f8c49f	16	* this list of conditions and the following disclaimer.
Kojto	136:ef9c61f8c49f	17	* 2. Redistributions in binary form must reproduce the above copyright notice,
Kojto	136:ef9c61f8c49f	18	* this list of conditions and the following disclaimer in the documentation
Kojto	136:ef9c61f8c49f	19	* and/or other materials provided with the distribution.
Kojto	136:ef9c61f8c49f	20	* 3. Neither the name of STMicroelectronics nor the names of its contributors
Kojto	136:ef9c61f8c49f	21	* may be used to endorse or promote products derived from this software
Kojto	136:ef9c61f8c49f	22	* without specific prior written permission.
Kojto	136:ef9c61f8c49f	23	*
Kojto	136:ef9c61f8c49f	24	* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
Kojto	136:ef9c61f8c49f	25	* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
Kojto	136:ef9c61f8c49f	26	* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
Kojto	136:ef9c61f8c49f	27	* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
Kojto	136:ef9c61f8c49f	28	* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
Kojto	136:ef9c61f8c49f	29	* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
Kojto	136:ef9c61f8c49f	30	* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
Kojto	136:ef9c61f8c49f	31	* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
Kojto	136:ef9c61f8c49f	32	* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
Kojto	136:ef9c61f8c49f	33	* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
Kojto	136:ef9c61f8c49f	34	*
Kojto	136:ef9c61f8c49f	35	******************************************************************************
Kojto	136:ef9c61f8c49f	36	*/
Kojto	136:ef9c61f8c49f	37
Kojto	136:ef9c61f8c49f	38	/* Define to prevent recursive inclusion -------------------------------------*/
Kojto	136:ef9c61f8c49f	39	#ifndef __STM32L0xx_LL_TIM_H
Kojto	136:ef9c61f8c49f	40	#define __STM32L0xx_LL_TIM_H
Kojto	136:ef9c61f8c49f	41
Kojto	136:ef9c61f8c49f	42	#ifdef __cplusplus
Kojto	136:ef9c61f8c49f	43	extern "C" {
Kojto	136:ef9c61f8c49f	44	#endif
Kojto	136:ef9c61f8c49f	45
Kojto	136:ef9c61f8c49f	46	/* Includes ------------------------------------------------------------------*/
Kojto	136:ef9c61f8c49f	47	#include "stm32l0xx.h"
Kojto	136:ef9c61f8c49f	48
Kojto	136:ef9c61f8c49f	49	/** @addtogroup STM32L0xx_LL_Driver
Kojto	136:ef9c61f8c49f	50	* @{
Kojto	136:ef9c61f8c49f	51	*/
Kojto	136:ef9c61f8c49f	52
Kojto	136:ef9c61f8c49f	53	#if defined (TIM2) \|\| defined (TIM3) \|\| defined (TIM21) \|\| defined (TIM22) \|\| defined (TIM6) \|\| defined (TIM7)
Kojto	136:ef9c61f8c49f	54
Kojto	136:ef9c61f8c49f	55	/** @defgroup TIM_LL TIM
Kojto	136:ef9c61f8c49f	56	* @{
Kojto	136:ef9c61f8c49f	57	*/
Kojto	136:ef9c61f8c49f	58
Kojto	136:ef9c61f8c49f	59	/* Private types -------------------------------------------------------------*/
Kojto	136:ef9c61f8c49f	60	/* Private variables ---------------------------------------------------------*/
Kojto	136:ef9c61f8c49f	61	/** @defgroup TIM_LL_Private_Variables TIM Private Variables
Kojto	136:ef9c61f8c49f	62	* @{
Kojto	136:ef9c61f8c49f	63	*/
Kojto	136:ef9c61f8c49f	64	static const uint8_t OFFSET_TAB_CCMRx[] =
Kojto	136:ef9c61f8c49f	65	{
Kojto	136:ef9c61f8c49f	66	0x00U, /* 0: TIMx_CH1 */
Kojto	136:ef9c61f8c49f	67	0x00U, /* 1: NA */
Kojto	136:ef9c61f8c49f	68	0x00U, /* 2: TIMx_CH2 */
Kojto	136:ef9c61f8c49f	69	0x00U, /* 3: NA */
Kojto	136:ef9c61f8c49f	70	0x04U, /* 4: TIMx_CH3 */
Kojto	136:ef9c61f8c49f	71	0x00U, /* 5: NA */
Kojto	136:ef9c61f8c49f	72	0x04U /* 6: TIMx_CH4 */
Kojto	136:ef9c61f8c49f	73	};
Kojto	136:ef9c61f8c49f	74
Kojto	136:ef9c61f8c49f	75	static const uint8_t SHIFT_TAB_OCxx[] =
Kojto	136:ef9c61f8c49f	76	{
Kojto	136:ef9c61f8c49f	77	0U, /* 0: OC1M, OC1FE, OC1PE */
Kojto	136:ef9c61f8c49f	78	0U, /* 1: - NA */
Kojto	136:ef9c61f8c49f	79	8U, /* 2: OC2M, OC2FE, OC2PE */
Kojto	136:ef9c61f8c49f	80	0U, /* 3: - NA */
Kojto	136:ef9c61f8c49f	81	0U, /* 4: OC3M, OC3FE, OC3PE */
Kojto	136:ef9c61f8c49f	82	0U, /* 5: - NA */
Kojto	136:ef9c61f8c49f	83	8U /* 6: OC4M, OC4FE, OC4PE */
Kojto	136:ef9c61f8c49f	84	};
Kojto	136:ef9c61f8c49f	85
Kojto	136:ef9c61f8c49f	86	static const uint8_t SHIFT_TAB_ICxx[] =
Kojto	136:ef9c61f8c49f	87	{
Kojto	136:ef9c61f8c49f	88	0U, /* 0: CC1S, IC1PSC, IC1F */
Kojto	136:ef9c61f8c49f	89	0U, /* 1: - NA */
Kojto	136:ef9c61f8c49f	90	8U, /* 2: CC2S, IC2PSC, IC2F */
Kojto	136:ef9c61f8c49f	91	0U, /* 3: - NA */
Kojto	136:ef9c61f8c49f	92	0U, /* 4: CC3S, IC3PSC, IC3F */
Kojto	136:ef9c61f8c49f	93	0U, /* 5: - NA */
Kojto	136:ef9c61f8c49f	94	8U /* 6: CC4S, IC4PSC, IC4F */
Kojto	136:ef9c61f8c49f	95	};
Kojto	136:ef9c61f8c49f	96
Kojto	136:ef9c61f8c49f	97	static const uint8_t SHIFT_TAB_CCxP[] =
Kojto	136:ef9c61f8c49f	98	{
Kojto	136:ef9c61f8c49f	99	0U, /* 0: CC1P */
Kojto	136:ef9c61f8c49f	100	0U, /* 1: NA */
Kojto	136:ef9c61f8c49f	101	4U, /* 2: CC2P */
Kojto	136:ef9c61f8c49f	102	0U, /* 3: NA */
Kojto	136:ef9c61f8c49f	103	8U, /* 4: CC3P */
Kojto	136:ef9c61f8c49f	104	0U, /* 5: NA */
Kojto	136:ef9c61f8c49f	105	12U /* 6: CC4P */
Kojto	136:ef9c61f8c49f	106	};
Kojto	136:ef9c61f8c49f	107
Kojto	136:ef9c61f8c49f	108	/**
Kojto	136:ef9c61f8c49f	109	* @}
Kojto	136:ef9c61f8c49f	110	*/
Kojto	136:ef9c61f8c49f	111
Kojto	136:ef9c61f8c49f	112
Kojto	136:ef9c61f8c49f	113	/* Private constants ---------------------------------------------------------*/
Kojto	136:ef9c61f8c49f	114	/** @defgroup TIM_LL_Private_Constants TIM Private Constants
Kojto	136:ef9c61f8c49f	115	* @{
Kojto	136:ef9c61f8c49f	116	*/
Kojto	136:ef9c61f8c49f	117	/** @defgroup TIM_LL_POSITION_VAL Bit Position Value
Kojto	136:ef9c61f8c49f	118	* @brief Position of the bit in the register.
Kojto	136:ef9c61f8c49f	119	* @{
Kojto	136:ef9c61f8c49f	120	*/
Kojto	136:ef9c61f8c49f	121	/* Defines used for the bit position in the register and perform offsets*/
Kojto	136:ef9c61f8c49f	122	#define TIM_POSITION_ICPSC (uint32_t)2U /!< field position in half register TIMx_CCMRx (8 bits)/
Kojto	136:ef9c61f8c49f	123	/**
Kojto	136:ef9c61f8c49f	124	* @}
Kojto	136:ef9c61f8c49f	125	*/
Kojto	136:ef9c61f8c49f	126
Kojto	136:ef9c61f8c49f	127
Kojto	136:ef9c61f8c49f	128	/* Remap mask definitions */
Kojto	136:ef9c61f8c49f	129	#define TIMx_OR_RMP_SHIFT ((uint32_t)16U)
Kojto	136:ef9c61f8c49f	130	#define TIMx_OR_RMP_MASK ((uint32_t)0x0000FFFFU)
Kojto	136:ef9c61f8c49f	131	#define TIM2_OR_RMP_MASK ((uint32_t)((TIM2_OR_ETR_RMP \| TIM2_OR_TI4_RMP ) << TIMx_OR_RMP_SHIFT))
Kojto	136:ef9c61f8c49f	132	#define TIM21_OR_RMP_MASK ((uint32_t)((TIM21_OR_ETR_RMP \| TIM21_OR_TI1_RMP \| TIM21_OR_TI2_RMP) << TIMx_OR_RMP_SHIFT))
Kojto	136:ef9c61f8c49f	133	#define TIM22_OR_RMP_MASK ((uint32_t)((TIM22_OR_ETR_RMP \| TIM22_OR_TI1_RMP) << TIMx_OR_RMP_SHIFT))
Kojto	136:ef9c61f8c49f	134	#if defined(TIM3)
Kojto	136:ef9c61f8c49f	135	#define TIM3_OR_RMP_MASK ((uint32_t)((TIM3_OR_ETR_RMP \| TIM3_OR_TI1_RMP \| TIM3_OR_TI2_RMP \| TIM3_OR_TI4_RMP) << TIMx_OR_RMP_SHIFT))
Kojto	136:ef9c61f8c49f	136	#endif /* TIM3 */
Kojto	136:ef9c61f8c49f	137
Kojto	136:ef9c61f8c49f	138
Kojto	136:ef9c61f8c49f	139
Kojto	136:ef9c61f8c49f	140	/**
Kojto	136:ef9c61f8c49f	141	* @}
Kojto	136:ef9c61f8c49f	142	*/
Kojto	136:ef9c61f8c49f	143
Kojto	136:ef9c61f8c49f	144
Kojto	136:ef9c61f8c49f	145	/* Private macros ------------------------------------------------------------*/
Kojto	136:ef9c61f8c49f	146	/** @defgroup TIM_LL_Private_Macros TIM Private Macros
Kojto	136:ef9c61f8c49f	147	* @{
Kojto	136:ef9c61f8c49f	148	*/
Kojto	136:ef9c61f8c49f	149	/** @brief Convert channel id into channel index.
Kojto	136:ef9c61f8c49f	150	* @param __CHANNEL__ This parameter can be one of the following values:
Kojto	136:ef9c61f8c49f	151	* @arg @ref LL_TIM_CHANNEL_CH1
Kojto	136:ef9c61f8c49f	152	* @arg @ref LL_TIM_CHANNEL_CH2
Kojto	136:ef9c61f8c49f	153	* @arg @ref LL_TIM_CHANNEL_CH3
Kojto	136:ef9c61f8c49f	154	* @arg @ref LL_TIM_CHANNEL_CH4
Kojto	136:ef9c61f8c49f	155	* @retval none
Kojto	136:ef9c61f8c49f	156	*/
Kojto	136:ef9c61f8c49f	157	#define TIM_GET_CHANNEL_INDEX( __CHANNEL__) \
Kojto	136:ef9c61f8c49f	158	(((__CHANNEL__) == LL_TIM_CHANNEL_CH1) ? 0U :\
Kojto	136:ef9c61f8c49f	159	((__CHANNEL__) == LL_TIM_CHANNEL_CH2) ? 2U :\
Kojto	136:ef9c61f8c49f	160	((__CHANNEL__) == LL_TIM_CHANNEL_CH3) ? 4U : 6U)
Kojto	136:ef9c61f8c49f	161
Kojto	136:ef9c61f8c49f	162	/**
Kojto	136:ef9c61f8c49f	163	* @}
Kojto	136:ef9c61f8c49f	164	*/
Kojto	136:ef9c61f8c49f	165
Kojto	136:ef9c61f8c49f	166
Kojto	136:ef9c61f8c49f	167	/* Exported types ------------------------------------------------------------*/
Kojto	136:ef9c61f8c49f	168	#if defined(USE_FULL_LL_DRIVER)
Kojto	136:ef9c61f8c49f	169	/** @defgroup TIM_LL_ES_INIT TIM Exported Init structure
Kojto	136:ef9c61f8c49f	170	* @{
Kojto	136:ef9c61f8c49f	171	*/
Kojto	136:ef9c61f8c49f	172
Kojto	136:ef9c61f8c49f	173	/**
Kojto	136:ef9c61f8c49f	174	* @brief TIM Time Base configuration structure definition.
Kojto	136:ef9c61f8c49f	175	*/
Kojto	136:ef9c61f8c49f	176	typedef struct
Kojto	136:ef9c61f8c49f	177	{
Kojto	136:ef9c61f8c49f	178	uint16_t Prescaler; /*!< Specifies the prescaler value used to divide the TIM clock.
Kojto	136:ef9c61f8c49f	179	This parameter can be a number between 0x0000 and 0xFFFF.
Kojto	136:ef9c61f8c49f	180
Kojto	136:ef9c61f8c49f	181	This feature can be modified afterwards using unitary function @ref LL_TIM_SetPrescaler().*/
Kojto	136:ef9c61f8c49f	182
Kojto	136:ef9c61f8c49f	183	uint32_t CounterMode; /*!< Specifies the counter mode.
Kojto	136:ef9c61f8c49f	184	This parameter can be a value of @ref TIM_LL_EC_COUNTERMODE.
Kojto	136:ef9c61f8c49f	185
Kojto	136:ef9c61f8c49f	186	This feature can be modified afterwards using unitary function @ref LL_TIM_SetCounterMode().*/
Kojto	136:ef9c61f8c49f	187
Kojto	136:ef9c61f8c49f	188	uint32_t Autoreload; /*!< Specifies the auto reload value to be loaded into the active
Kojto	136:ef9c61f8c49f	189	Auto-Reload Register at the next update event.
Kojto	136:ef9c61f8c49f	190	This parameter must be a number between 0x0000 and 0xFFFF.
Kojto	136:ef9c61f8c49f	191	Some timer instances may support 32 bits counters. In that case this parameter must be a number between 0x0000 and 0xFFFFFFFF.
Kojto	136:ef9c61f8c49f	192
Kojto	136:ef9c61f8c49f	193	This feature can be modified afterwards using unitary function @ref LL_TIM_SetAutoReload().*/
Kojto	136:ef9c61f8c49f	194
Kojto	136:ef9c61f8c49f	195	uint32_t ClockDivision; /*!< Specifies the clock division.
Kojto	136:ef9c61f8c49f	196	This parameter can be a value of @ref TIM_LL_EC_CLOCKDIVISION.
Kojto	136:ef9c61f8c49f	197
Kojto	136:ef9c61f8c49f	198	This feature can be modified afterwards using unitary function @ref LL_TIM_SetClockDivision().*/
Kojto	136:ef9c61f8c49f	199	} LL_TIM_InitTypeDef;
Kojto	136:ef9c61f8c49f	200
Kojto	136:ef9c61f8c49f	201	/**
Kojto	136:ef9c61f8c49f	202	* @brief TIM Output Compare configuration structure definition.
Kojto	136:ef9c61f8c49f	203	*/
Kojto	136:ef9c61f8c49f	204	typedef struct
Kojto	136:ef9c61f8c49f	205	{
Kojto	136:ef9c61f8c49f	206	uint32_t OCMode; /*!< Specifies the output mode.
Kojto	136:ef9c61f8c49f	207	This parameter can be a value of @ref TIM_LL_EC_OCMODE.
Kojto	136:ef9c61f8c49f	208
Kojto	136:ef9c61f8c49f	209	This feature can be modified afterwards using unitary function @ref LL_TIM_OC_SetMode().*/
Kojto	136:ef9c61f8c49f	210
Kojto	136:ef9c61f8c49f	211	uint32_t OCState; /*!< Specifies the TIM Output Compare state.
Kojto	136:ef9c61f8c49f	212	This parameter can be a value of @ref TIM_LL_EC_OCSTATE.
Kojto	136:ef9c61f8c49f	213
Kojto	136:ef9c61f8c49f	214	This feature can be modified afterwards using unitary functions @ref LL_TIM_CC_EnableChannel() or @ref LL_TIM_CC_DisableChannel().*/
Kojto	136:ef9c61f8c49f	215
Kojto	136:ef9c61f8c49f	216	uint32_t CompareValue; /*!< Specifies the Compare value to be loaded into the Capture Compare Register.
Kojto	136:ef9c61f8c49f	217	This parameter can be a number between 0x0000 and 0xFFFF.
Kojto	136:ef9c61f8c49f	218
Kojto	136:ef9c61f8c49f	219	This feature can be modified afterwards using unitary function LL_TIM_OC_SetCompareCHx (x=1..6).*/
Kojto	136:ef9c61f8c49f	220
Kojto	136:ef9c61f8c49f	221	uint32_t OCPolarity; /*!< Specifies the output polarity.
Kojto	136:ef9c61f8c49f	222	This parameter can be a value of @ref TIM_LL_EC_OCPOLARITY.
Kojto	136:ef9c61f8c49f	223
Kojto	136:ef9c61f8c49f	224	This feature can be modified afterwards using unitary function @ref LL_TIM_OC_SetPolarity().*/
Kojto	136:ef9c61f8c49f	225
Kojto	136:ef9c61f8c49f	226	} LL_TIM_OC_InitTypeDef;
Kojto	136:ef9c61f8c49f	227
Kojto	136:ef9c61f8c49f	228	/**
Kojto	136:ef9c61f8c49f	229	* @brief TIM Input Capture configuration structure definition.
Kojto	136:ef9c61f8c49f	230	*/
Kojto	136:ef9c61f8c49f	231
Kojto	136:ef9c61f8c49f	232	typedef struct
Kojto	136:ef9c61f8c49f	233	{
Kojto	136:ef9c61f8c49f	234
Kojto	136:ef9c61f8c49f	235	uint32_t ICPolarity; /*!< Specifies the active edge of the input signal.
Kojto	136:ef9c61f8c49f	236	This parameter can be a value of @ref TIM_LL_EC_IC_POLARITY.
Kojto	136:ef9c61f8c49f	237
Kojto	136:ef9c61f8c49f	238	This feature can be modified afterwards using unitary function @ref LL_TIM_IC_SetPolarity().*/
Kojto	136:ef9c61f8c49f	239
Kojto	136:ef9c61f8c49f	240	uint32_t ICActiveInput; /*!< Specifies the input.
Kojto	136:ef9c61f8c49f	241	This parameter can be a value of @ref TIM_LL_EC_ACTIVEINPUT.
Kojto	136:ef9c61f8c49f	242
Kojto	136:ef9c61f8c49f	243	This feature can be modified afterwards using unitary function @ref LL_TIM_IC_SetActiveInput().*/
Kojto	136:ef9c61f8c49f	244
Kojto	136:ef9c61f8c49f	245	uint32_t ICPrescaler; /*!< Specifies the Input Capture Prescaler.
Kojto	136:ef9c61f8c49f	246	This parameter can be a value of @ref TIM_LL_EC_ICPSC.
Kojto	136:ef9c61f8c49f	247
Kojto	136:ef9c61f8c49f	248	This feature can be modified afterwards using unitary function @ref LL_TIM_IC_SetPrescaler().*/
Kojto	136:ef9c61f8c49f	249
Kojto	136:ef9c61f8c49f	250	uint32_t ICFilter; /*!< Specifies the input capture filter.
Kojto	136:ef9c61f8c49f	251	This parameter can be a value of @ref TIM_LL_EC_IC_FILTER.
Kojto	136:ef9c61f8c49f	252
Kojto	136:ef9c61f8c49f	253	This feature can be modified afterwards using unitary function @ref LL_TIM_IC_SetFilter().*/
Kojto	136:ef9c61f8c49f	254	} LL_TIM_IC_InitTypeDef;
Kojto	136:ef9c61f8c49f	255
Kojto	136:ef9c61f8c49f	256
Kojto	136:ef9c61f8c49f	257	/**
Kojto	136:ef9c61f8c49f	258	* @brief TIM Encoder interface configuration structure definition.
Kojto	136:ef9c61f8c49f	259	*/
Kojto	136:ef9c61f8c49f	260	typedef struct
Kojto	136:ef9c61f8c49f	261	{
Kojto	136:ef9c61f8c49f	262	uint32_t EncoderMode; /*!< Specifies the encoder resolution (x2 or x4).
Kojto	136:ef9c61f8c49f	263	This parameter can be a value of @ref TIM_LL_EC_ENCODERMODE.
Kojto	136:ef9c61f8c49f	264
Kojto	136:ef9c61f8c49f	265	This feature can be modified afterwards using unitary function @ref LL_TIM_SetEncoderMode().*/
Kojto	136:ef9c61f8c49f	266
Kojto	136:ef9c61f8c49f	267	uint32_t IC1Polarity; /*!< Specifies the active edge of TI1 input.
Kojto	136:ef9c61f8c49f	268	This parameter can be a value of @ref TIM_LL_EC_IC_POLARITY.
Kojto	136:ef9c61f8c49f	269
Kojto	136:ef9c61f8c49f	270	This feature can be modified afterwards using unitary function @ref LL_TIM_IC_SetPolarity().*/
Kojto	136:ef9c61f8c49f	271
Kojto	136:ef9c61f8c49f	272	uint32_t IC1ActiveInput; /*!< Specifies the TI1 input source
Kojto	136:ef9c61f8c49f	273	This parameter can be a value of @ref TIM_LL_EC_ACTIVEINPUT.
Kojto	136:ef9c61f8c49f	274
Kojto	136:ef9c61f8c49f	275	This feature can be modified afterwards using unitary function @ref LL_TIM_IC_SetActiveInput().*/
Kojto	136:ef9c61f8c49f	276
Kojto	136:ef9c61f8c49f	277	uint32_t IC1Prescaler; /*!< Specifies the TI1 input prescaler value.
Kojto	136:ef9c61f8c49f	278	This parameter can be a value of @ref TIM_LL_EC_ICPSC.
Kojto	136:ef9c61f8c49f	279
Kojto	136:ef9c61f8c49f	280	This feature can be modified afterwards using unitary function @ref LL_TIM_IC_SetPrescaler().*/
Kojto	136:ef9c61f8c49f	281
Kojto	136:ef9c61f8c49f	282	uint32_t IC1Filter; /*!< Specifies the TI1 input filter.
Kojto	136:ef9c61f8c49f	283	This parameter can be a value of @ref TIM_LL_EC_IC_FILTER.
Kojto	136:ef9c61f8c49f	284
Kojto	136:ef9c61f8c49f	285	This feature can be modified afterwards using unitary function @ref LL_TIM_IC_SetFilter().*/
Kojto	136:ef9c61f8c49f	286
Kojto	136:ef9c61f8c49f	287	uint32_t IC2Polarity; /*!< Specifies the active edge of TI2 input.
Kojto	136:ef9c61f8c49f	288	This parameter can be a value of @ref TIM_LL_EC_IC_POLARITY.
Kojto	136:ef9c61f8c49f	289
Kojto	136:ef9c61f8c49f	290	This feature can be modified afterwards using unitary function @ref LL_TIM_IC_SetPolarity().*/
Kojto	136:ef9c61f8c49f	291
Kojto	136:ef9c61f8c49f	292	uint32_t IC2ActiveInput; /*!< Specifies the TI2 input source
Kojto	136:ef9c61f8c49f	293	This parameter can be a value of @ref TIM_LL_EC_ACTIVEINPUT.
Kojto	136:ef9c61f8c49f	294
Kojto	136:ef9c61f8c49f	295	This feature can be modified afterwards using unitary function @ref LL_TIM_IC_SetActiveInput().*/
Kojto	136:ef9c61f8c49f	296
Kojto	136:ef9c61f8c49f	297	uint32_t IC2Prescaler; /*!< Specifies the TI2 input prescaler value.
Kojto	136:ef9c61f8c49f	298	This parameter can be a value of @ref TIM_LL_EC_ICPSC.
Kojto	136:ef9c61f8c49f	299
Kojto	136:ef9c61f8c49f	300	This feature can be modified afterwards using unitary function @ref LL_TIM_IC_SetPrescaler().*/
Kojto	136:ef9c61f8c49f	301
Kojto	136:ef9c61f8c49f	302	uint32_t IC2Filter; /*!< Specifies the TI2 input filter.
Kojto	136:ef9c61f8c49f	303	This parameter can be a value of @ref TIM_LL_EC_IC_FILTER.
Kojto	136:ef9c61f8c49f	304
Kojto	136:ef9c61f8c49f	305	This feature can be modified afterwards using unitary function @ref LL_TIM_IC_SetFilter().*/
Kojto	136:ef9c61f8c49f	306
Kojto	136:ef9c61f8c49f	307	} LL_TIM_ENCODER_InitTypeDef;
Kojto	136:ef9c61f8c49f	308
Kojto	136:ef9c61f8c49f	309
Kojto	136:ef9c61f8c49f	310	/**
Kojto	136:ef9c61f8c49f	311	* @}
Kojto	136:ef9c61f8c49f	312	*/
Kojto	136:ef9c61f8c49f	313	#endif /* USE_FULL_LL_DRIVER */
Kojto	136:ef9c61f8c49f	314
Kojto	136:ef9c61f8c49f	315	/* Exported constants --------------------------------------------------------*/
Kojto	136:ef9c61f8c49f	316	/** @defgroup TIM_LL_Exported_Constants TIM Exported Constants
Kojto	136:ef9c61f8c49f	317	* @{
Kojto	136:ef9c61f8c49f	318	*/
Kojto	136:ef9c61f8c49f	319
Kojto	136:ef9c61f8c49f	320	/** @defgroup TIM_LL_EC_GET_FLAG Get Flags Defines
Kojto	136:ef9c61f8c49f	321	* @brief Flags defines which can be used with LL_TIM_ReadReg function.
Kojto	136:ef9c61f8c49f	322	* @{
Kojto	136:ef9c61f8c49f	323	*/
Kojto	136:ef9c61f8c49f	324	#define LL_TIM_SR_UIF TIM_SR_UIF /!< Update interrupt flag /
Kojto	136:ef9c61f8c49f	325	#define LL_TIM_SR_CC1IF TIM_SR_CC1IF /!< Capture/compare 1 interrupt flag /
Kojto	136:ef9c61f8c49f	326	#define LL_TIM_SR_CC2IF TIM_SR_CC2IF /!< Capture/compare 2 interrupt flag /
Kojto	136:ef9c61f8c49f	327	#define LL_TIM_SR_CC3IF TIM_SR_CC3IF /!< Capture/compare 3 interrupt flag /
Kojto	136:ef9c61f8c49f	328	#define LL_TIM_SR_CC4IF TIM_SR_CC4IF /!< Capture/compare 4 interrupt flag /
Kojto	136:ef9c61f8c49f	329	#define LL_TIM_SR_TIF TIM_SR_TIF /!< Trigger interrupt flag /
Kojto	136:ef9c61f8c49f	330	#define LL_TIM_SR_CC1OF TIM_SR_CC1OF /!< Capture/Compare 1 overcapture flag /
Kojto	136:ef9c61f8c49f	331	#define LL_TIM_SR_CC2OF TIM_SR_CC2OF /!< Capture/Compare 2 overcapture flag /
Kojto	136:ef9c61f8c49f	332	#define LL_TIM_SR_CC3OF TIM_SR_CC3OF /!< Capture/Compare 3 overcapture flag /
Kojto	136:ef9c61f8c49f	333	#define LL_TIM_SR_CC4OF TIM_SR_CC4OF /!< Capture/Compare 4 overcapture flag /
Kojto	136:ef9c61f8c49f	334	/**
Kojto	136:ef9c61f8c49f	335	* @}
Kojto	136:ef9c61f8c49f	336	*/
Kojto	136:ef9c61f8c49f	337
Kojto	136:ef9c61f8c49f	338	/** @defgroup TIM_LL_EC_IT IT Defines
Kojto	136:ef9c61f8c49f	339	* @brief IT defines which can be used with LL_TIM_ReadReg and LL_TIM_WriteReg functions.
Kojto	136:ef9c61f8c49f	340	* @{
Kojto	136:ef9c61f8c49f	341	*/
Kojto	136:ef9c61f8c49f	342	#define LL_TIM_DIER_UIE TIM_DIER_UIE /!< Update interrupt enable /
Kojto	136:ef9c61f8c49f	343	#define LL_TIM_DIER_CC1IE TIM_DIER_CC1IE /!< Capture/compare 1 interrupt enable /
Kojto	136:ef9c61f8c49f	344	#define LL_TIM_DIER_CC2IE TIM_DIER_CC2IE /!< Capture/compare 2 interrupt enable /
Kojto	136:ef9c61f8c49f	345	#define LL_TIM_DIER_CC3IE TIM_DIER_CC3IE /!< Capture/compare 3 interrupt enable /
Kojto	136:ef9c61f8c49f	346	#define LL_TIM_DIER_CC4IE TIM_DIER_CC4IE /!< Capture/compare 4 interrupt enable /
Kojto	136:ef9c61f8c49f	347	#define LL_TIM_DIER_TIE TIM_DIER_TIE /!< Trigger interrupt enable /
Kojto	136:ef9c61f8c49f	348	/**
Kojto	136:ef9c61f8c49f	349	* @}
Kojto	136:ef9c61f8c49f	350	*/
Kojto	136:ef9c61f8c49f	351
Kojto	136:ef9c61f8c49f	352	/** @defgroup TIM_LL_EC_UPDATESOURCE Update Source
Kojto	136:ef9c61f8c49f	353	* @{
Kojto	136:ef9c61f8c49f	354	*/
Kojto	136:ef9c61f8c49f	355	#define LL_TIM_UPDATESOURCE_REGULAR ((uint32_t)0x00000000U) /!< Counter overflow/underflow, Setting the UG bit or Update generation through the slave mode controller generates an update request /
Kojto	136:ef9c61f8c49f	356	#define LL_TIM_UPDATESOURCE_COUNTER TIM_CR1_URS /!< Only counter overflow/underflow generates an update request /
Kojto	136:ef9c61f8c49f	357	/**
Kojto	136:ef9c61f8c49f	358	* @}
Kojto	136:ef9c61f8c49f	359	*/
Kojto	136:ef9c61f8c49f	360
Kojto	136:ef9c61f8c49f	361	/** @defgroup TIM_LL_EC_ONEPULSEMODE One Pulse Mode
Kojto	136:ef9c61f8c49f	362	* @{
Kojto	136:ef9c61f8c49f	363	*/
Kojto	136:ef9c61f8c49f	364	#define LL_TIM_ONEPULSEMODE_SINGLE TIM_CR1_OPM /!< Counter is not stopped at update event /
Kojto	136:ef9c61f8c49f	365	#define LL_TIM_ONEPULSEMODE_REPETITIVE ((uint32_t)0x00000000U) /!< Counter stops counting at the next update event /
Kojto	136:ef9c61f8c49f	366	/**
Kojto	136:ef9c61f8c49f	367	* @}
Kojto	136:ef9c61f8c49f	368	*/
Kojto	136:ef9c61f8c49f	369
Kojto	136:ef9c61f8c49f	370	/** @defgroup TIM_LL_EC_COUNTERMODE Counter Mode
Kojto	136:ef9c61f8c49f	371	* @{
Kojto	136:ef9c61f8c49f	372	*/
Kojto	136:ef9c61f8c49f	373	#define LL_TIM_COUNTERMODE_UP ((uint32_t)0x00000000U) /!<Counter used as upcounter /
Kojto	136:ef9c61f8c49f	374	#define LL_TIM_COUNTERMODE_DOWN TIM_CR1_DIR /!< Counter used as downcounter /
Kojto	136:ef9c61f8c49f	375	#define LL_TIM_COUNTERMODE_CENTER_UP TIM_CR1_CMS_0 /!< The counter counts up and down alternatively. Output compare interrupt flags of output channels are set only when the counter is counting down. /
Kojto	136:ef9c61f8c49f	376	#define LL_TIM_COUNTERMODE_CENTER_DOWN TIM_CR1_CMS_1 /!<The counter counts up and down alternatively. Output compare interrupt flags of output channels are set only when the counter is counting up /
Kojto	136:ef9c61f8c49f	377	#define LL_TIM_COUNTERMODE_CENTER_UP_DOWN TIM_CR1_CMS /!< The counter counts up and down alternatively. Output compare interrupt flags of output channels are set only when the counter is counting up or down. /
Kojto	136:ef9c61f8c49f	378	/**
Kojto	136:ef9c61f8c49f	379	* @}
Kojto	136:ef9c61f8c49f	380	*/
Kojto	136:ef9c61f8c49f	381
Kojto	136:ef9c61f8c49f	382	/** @defgroup TIM_LL_EC_CLOCKDIVISION Clock Division
Kojto	136:ef9c61f8c49f	383	* @{
Kojto	136:ef9c61f8c49f	384	*/
Kojto	136:ef9c61f8c49f	385	#define LL_TIM_CLOCKDIVISION_DIV1 ((uint32_t)0x00000000U) /!< tDTS=tCK_INT /
Kojto	136:ef9c61f8c49f	386	#define LL_TIM_CLOCKDIVISION_DIV2 TIM_CR1_CKD_0 /!< tDTS=2tCK_INT */
Kojto	136:ef9c61f8c49f	387	#define LL_TIM_CLOCKDIVISION_DIV4 TIM_CR1_CKD_1 /!< tDTS=4tCK_INT */
Kojto	136:ef9c61f8c49f	388	/**
Kojto	136:ef9c61f8c49f	389	* @}
Kojto	136:ef9c61f8c49f	390	*/
Kojto	136:ef9c61f8c49f	391
Kojto	136:ef9c61f8c49f	392	/** @defgroup TIM_LL_EC_COUNTERDIRECTION Counter Direction
Kojto	136:ef9c61f8c49f	393	* @{
Kojto	136:ef9c61f8c49f	394	*/
Kojto	136:ef9c61f8c49f	395	#define LL_TIM_COUNTERDIRECTION_UP ((uint32_t)0x00000000U) /!< Timer counter counts up /
Kojto	136:ef9c61f8c49f	396	#define LL_TIM_COUNTERDIRECTION_DOWN TIM_CR1_DIR /!< Timer counter counts down /
Kojto	136:ef9c61f8c49f	397	/**
Kojto	136:ef9c61f8c49f	398	* @}
Kojto	136:ef9c61f8c49f	399	*/
Kojto	136:ef9c61f8c49f	400
Kojto	136:ef9c61f8c49f	401
Kojto	136:ef9c61f8c49f	402	/** @defgroup TIM_LL_EC_CCDMAREQUEST Capture Compare DMA Request
Kojto	136:ef9c61f8c49f	403	* @{
Kojto	136:ef9c61f8c49f	404	*/
Kojto	136:ef9c61f8c49f	405	#define LL_TIM_CCDMAREQUEST_CC ((uint32_t)0x00000000U) /!< CCx DMA request sent when CCx event occurs /
Kojto	136:ef9c61f8c49f	406	#define LL_TIM_CCDMAREQUEST_UPDATE TIM_CR2_CCDS /!< CCx DMA requests sent when update event occurs /
Kojto	136:ef9c61f8c49f	407	/**
Kojto	136:ef9c61f8c49f	408	* @}
Kojto	136:ef9c61f8c49f	409	*/
Kojto	136:ef9c61f8c49f	410
Kojto	136:ef9c61f8c49f	411
Kojto	136:ef9c61f8c49f	412	/** @defgroup TIM_LL_EC_CHANNEL Channel
Kojto	136:ef9c61f8c49f	413	* @{
Kojto	136:ef9c61f8c49f	414	*/
Kojto	136:ef9c61f8c49f	415	#define LL_TIM_CHANNEL_CH1 TIM_CCER_CC1E /!< Timer input/output channel 1 /
Kojto	136:ef9c61f8c49f	416	#define LL_TIM_CHANNEL_CH2 TIM_CCER_CC2E /!< Timer input/output channel 2 /
Kojto	136:ef9c61f8c49f	417	#define LL_TIM_CHANNEL_CH3 TIM_CCER_CC3E /!< Timer input/output channel 3 /
Kojto	136:ef9c61f8c49f	418	#define LL_TIM_CHANNEL_CH4 TIM_CCER_CC4E /!< Timer input/output channel 4 /
Kojto	136:ef9c61f8c49f	419	/**
Kojto	136:ef9c61f8c49f	420	* @}
Kojto	136:ef9c61f8c49f	421	*/
Kojto	136:ef9c61f8c49f	422
Kojto	136:ef9c61f8c49f	423	#if defined(USE_FULL_LL_DRIVER)
Kojto	136:ef9c61f8c49f	424	/** @defgroup TIM_LL_EC_OCSTATE Output Configuration State
Kojto	136:ef9c61f8c49f	425	* @{
Kojto	136:ef9c61f8c49f	426	*/
Kojto	136:ef9c61f8c49f	427	#define LL_TIM_OCSTATE_DISABLE ((uint32_t)0x00000000U) /!< OCx is not active /
Kojto	136:ef9c61f8c49f	428	#define LL_TIM_OCSTATE_ENABLE TIM_CCER_CC1E /!< OCx signal is output on the corresponding output pin /
Kojto	136:ef9c61f8c49f	429	/**
Kojto	136:ef9c61f8c49f	430	* @}
Kojto	136:ef9c61f8c49f	431	*/
Kojto	136:ef9c61f8c49f	432	#endif /* USE_FULL_LL_DRIVER */
Kojto	136:ef9c61f8c49f	433
Kojto	136:ef9c61f8c49f	434	/** @defgroup TIM_LL_EC_OCMODE Output Configuration Mode
Kojto	136:ef9c61f8c49f	435	* @{
Kojto	136:ef9c61f8c49f	436	*/
Kojto	136:ef9c61f8c49f	437	#define LL_TIM_OCMODE_FROZEN ((uint32_t)0x00000000U) /!<The comparison between the output compare register TIMx_CCRy and the counter TIMx_CNT has no effect on the output channel level /
Kojto	136:ef9c61f8c49f	438	#define LL_TIM_OCMODE_ACTIVE TIM_CCMR1_OC1M_0 /!<OCyREF is forced high on compare match/
Kojto	136:ef9c61f8c49f	439	#define LL_TIM_OCMODE_INACTIVE TIM_CCMR1_OC1M_1 /!<OCyREF is forced low on compare match/
Kojto	136:ef9c61f8c49f	440	#define LL_TIM_OCMODE_TOGGLE (TIM_CCMR1_OC1M_1 \| TIM_CCMR1_OC1M_0) /!<OCyREF toggles on compare match/
Kojto	136:ef9c61f8c49f	441	#define LL_TIM_OCMODE_FORCED_INACTIVE (TIM_CCMR1_OC1M_2) /!<OCyREF is forced low/
Kojto	136:ef9c61f8c49f	442	#define LL_TIM_OCMODE_FORCED_ACTIVE (TIM_CCMR1_OC1M_2 \| TIM_CCMR1_OC1M_0) /!<OCyREF is forced high/
Kojto	136:ef9c61f8c49f	443	#define LL_TIM_OCMODE_PWM1 (TIM_CCMR1_OC1M_2 \| TIM_CCMR1_OC1M_1) /!<In upcounting, channel y is active as long as TIMx_CNT<TIMx_CCRy else inactive. In downcounting, channel y is inactive as long as TIMx_CNT>TIMx_CCRy else active./
Kojto	136:ef9c61f8c49f	444	#define LL_TIM_OCMODE_PWM2 (TIM_CCMR1_OC1M_2 \| TIM_CCMR1_OC1M_1 \| TIM_CCMR1_OC1M_0) /!<In upcounting, channel y is inactive as long as TIMx_CNT<TIMx_CCRy else active. In downcounting, channel y is active as long as TIMx_CNT>TIMx_CCRy else inactive/
Kojto	136:ef9c61f8c49f	445	/**
Kojto	136:ef9c61f8c49f	446	* @}
Kojto	136:ef9c61f8c49f	447	*/
Kojto	136:ef9c61f8c49f	448
Kojto	136:ef9c61f8c49f	449	/** @defgroup TIM_LL_EC_OCPOLARITY Output Configuration Polarity
Kojto	136:ef9c61f8c49f	450	* @{
Kojto	136:ef9c61f8c49f	451	*/
Kojto	136:ef9c61f8c49f	452	#define LL_TIM_OCPOLARITY_HIGH ((uint32_t)0x00000000U) /!< OCxactive high/
Kojto	136:ef9c61f8c49f	453	#define LL_TIM_OCPOLARITY_LOW TIM_CCER_CC1P /!< OCxactive low/
Kojto	136:ef9c61f8c49f	454	/**
Kojto	136:ef9c61f8c49f	455	* @}
Kojto	136:ef9c61f8c49f	456	*/
Kojto	136:ef9c61f8c49f	457
Kojto	136:ef9c61f8c49f	458
Kojto	136:ef9c61f8c49f	459
Kojto	136:ef9c61f8c49f	460	/** @defgroup TIM_LL_EC_ACTIVEINPUT Active Input Selection
Kojto	136:ef9c61f8c49f	461	* @{
Kojto	136:ef9c61f8c49f	462	*/
Kojto	136:ef9c61f8c49f	463	#define LL_TIM_ACTIVEINPUT_DIRECTTI (uint32_t)(TIM_CCMR1_CC1S_0 << 16U) /!< ICx is mapped on TIx /
Kojto	136:ef9c61f8c49f	464	#define LL_TIM_ACTIVEINPUT_INDIRECTTI (uint32_t)(TIM_CCMR1_CC1S_1 << 16U) /!< ICx is mapped on TIy /
Kojto	136:ef9c61f8c49f	465	#define LL_TIM_ACTIVEINPUT_TRC (uint32_t)(TIM_CCMR1_CC1S << 16U) /!< ICx is mapped on TRC /
Kojto	136:ef9c61f8c49f	466	/**
Kojto	136:ef9c61f8c49f	467	* @}
Kojto	136:ef9c61f8c49f	468	*/
Kojto	136:ef9c61f8c49f	469
Kojto	136:ef9c61f8c49f	470	/** @defgroup TIM_LL_EC_ICPSC Input Configuration Prescaler
Kojto	136:ef9c61f8c49f	471	* @{
Kojto	136:ef9c61f8c49f	472	*/
Kojto	136:ef9c61f8c49f	473	#define LL_TIM_ICPSC_DIV1 ((uint32_t)0x00000000U) /!< No prescaler, capture is done each time an edge is detected on the capture input /
Kojto	136:ef9c61f8c49f	474	#define LL_TIM_ICPSC_DIV2 (uint32_t)(TIM_CCMR1_IC1PSC_0 << 16U) /!< Capture is done once every 2 events /
Kojto	136:ef9c61f8c49f	475	#define LL_TIM_ICPSC_DIV4 (uint32_t)(TIM_CCMR1_IC1PSC_1 << 16U) /!< Capture is done once every 4 events /
Kojto	136:ef9c61f8c49f	476	#define LL_TIM_ICPSC_DIV8 (uint32_t)(TIM_CCMR1_IC1PSC << 16U) /!< Capture is done once every 8 events /
Kojto	136:ef9c61f8c49f	477	/**
Kojto	136:ef9c61f8c49f	478	* @}
Kojto	136:ef9c61f8c49f	479	*/
Kojto	136:ef9c61f8c49f	480
Kojto	136:ef9c61f8c49f	481	/** @defgroup TIM_LL_EC_IC_FILTER Input Configuration Filter
Kojto	136:ef9c61f8c49f	482	* @{
Kojto	136:ef9c61f8c49f	483	*/
Kojto	136:ef9c61f8c49f	484	#define LL_TIM_IC_FILTER_FDIV1 ((uint32_t)0x00000000U) /!< No filter, sampling is done at fDTS /
Kojto	136:ef9c61f8c49f	485	#define LL_TIM_IC_FILTER_FDIV1_N2 (uint32_t)(TIM_CCMR1_IC1F_0 << 16U) /!< fSAMPLING=fCK_INT, N=2 /
Kojto	136:ef9c61f8c49f	486	#define LL_TIM_IC_FILTER_FDIV1_N4 (uint32_t)(TIM_CCMR1_IC1F_1 << 16U) /!< fSAMPLING=fCK_INT, N=4 /
Kojto	136:ef9c61f8c49f	487	#define LL_TIM_IC_FILTER_FDIV1_N8 (uint32_t)((TIM_CCMR1_IC1F_1 \| TIM_CCMR1_IC1F_0) << 16U) /!< fSAMPLING=fCK_INT, N=8 /
Kojto	136:ef9c61f8c49f	488	#define LL_TIM_IC_FILTER_FDIV2_N6 (uint32_t)(TIM_CCMR1_IC1F_2 << 16U) /!< fSAMPLING=fDTS/2, N=6 /
Kojto	136:ef9c61f8c49f	489	#define LL_TIM_IC_FILTER_FDIV2_N8 (uint32_t)((TIM_CCMR1_IC1F_2 \| TIM_CCMR1_IC1F_0) << 16U) /!< fSAMPLING=fDTS/2, N=8 /
Kojto	136:ef9c61f8c49f	490	#define LL_TIM_IC_FILTER_FDIV4_N6 (uint32_t)((TIM_CCMR1_IC1F_2 \| TIM_CCMR1_IC1F_1) << 16U) /!< fSAMPLING=fDTS/4, N=6 /
Kojto	136:ef9c61f8c49f	491	#define LL_TIM_IC_FILTER_FDIV4_N8 (uint32_t)((TIM_CCMR1_IC1F_2 \| TIM_CCMR1_IC1F_1 \| TIM_CCMR1_IC1F_0) << 16U) /!< fSAMPLING=fDTS/4, N=8 /
Kojto	136:ef9c61f8c49f	492	#define LL_TIM_IC_FILTER_FDIV8_N6 (uint32_t)(TIM_CCMR1_IC1F_3 << 16U) /!< fSAMPLING=fDTS/8, N=6 /
Kojto	136:ef9c61f8c49f	493	#define LL_TIM_IC_FILTER_FDIV8_N8 (uint32_t)((TIM_CCMR1_IC1F_3 \| TIM_CCMR1_IC1F_0) << 16U) /!< fSAMPLING=fDTS/8, N=8 /
Kojto	136:ef9c61f8c49f	494	#define LL_TIM_IC_FILTER_FDIV16_N5 (uint32_t)((TIM_CCMR1_IC1F_3 \| TIM_CCMR1_IC1F_1) << 16U) /!< fSAMPLING=fDTS/16, N=5 /
Kojto	136:ef9c61f8c49f	495	#define LL_TIM_IC_FILTER_FDIV16_N6 (uint32_t)((TIM_CCMR1_IC1F_3 \| TIM_CCMR1_IC1F_1 \| TIM_CCMR1_IC1F_0) << 16U) /!< fSAMPLING=fDTS/16, N=6 /
Kojto	136:ef9c61f8c49f	496	#define LL_TIM_IC_FILTER_FDIV16_N8 (uint32_t)((TIM_CCMR1_IC1F_3 \| TIM_CCMR1_IC1F_2) << 16U) /!< fSAMPLING=fDTS/16, N=8 /
Kojto	136:ef9c61f8c49f	497	#define LL_TIM_IC_FILTER_FDIV32_N5 (uint32_t)((TIM_CCMR1_IC1F_3 \| TIM_CCMR1_IC1F_2 \| TIM_CCMR1_IC1F_0) << 16U) /!< fSAMPLING=fDTS/32, N=5 /
Kojto	136:ef9c61f8c49f	498	#define LL_TIM_IC_FILTER_FDIV32_N6 (uint32_t)((TIM_CCMR1_IC1F_3 \| TIM_CCMR1_IC1F_2 \| TIM_CCMR1_IC1F_1) << 16U) /!< fSAMPLING=fDTS/32, N=6 /
Kojto	136:ef9c61f8c49f	499	#define LL_TIM_IC_FILTER_FDIV32_N8 (uint32_t)(TIM_CCMR1_IC1F << 16U) /!< fSAMPLING=fDTS/32, N=8 /
Kojto	136:ef9c61f8c49f	500	/**
Kojto	136:ef9c61f8c49f	501	* @}
Kojto	136:ef9c61f8c49f	502	*/
Kojto	136:ef9c61f8c49f	503
Kojto	136:ef9c61f8c49f	504	/** @defgroup TIM_LL_EC_IC_POLARITY Input Configuration Polarity
Kojto	136:ef9c61f8c49f	505	* @{
Kojto	136:ef9c61f8c49f	506	*/
Kojto	136:ef9c61f8c49f	507	#define LL_TIM_IC_POLARITY_RISING ((uint32_t)0x00000000U) /!< The circuit is sensitive to TIxFP1 rising edge, TIxFP1 is not inverted /
Kojto	136:ef9c61f8c49f	508	#define LL_TIM_IC_POLARITY_FALLING TIM_CCER_CC1P /!< The circuit is sensitive to TIxFP1 falling edge, TIxFP1 is inverted /
Kojto	136:ef9c61f8c49f	509	#define LL_TIM_IC_POLARITY_BOTHEDGE (TIM_CCER_CC1P \| TIM_CCER_CC1NP) /!< The circuit is sensitive to both TIxFP1 rising and falling edges, TIxFP1 is not inverted /
Kojto	136:ef9c61f8c49f	510	/**
Kojto	136:ef9c61f8c49f	511	* @}
Kojto	136:ef9c61f8c49f	512	*/
Kojto	136:ef9c61f8c49f	513
Kojto	136:ef9c61f8c49f	514	/** @defgroup TIM_LL_EC_CLOCKSOURCE Clock Source
Kojto	136:ef9c61f8c49f	515	* @{
Kojto	136:ef9c61f8c49f	516	*/
Kojto	136:ef9c61f8c49f	517	#define LL_TIM_CLOCKSOURCE_INTERNAL ((uint32_t)0x00000000U) /!< The timer is clocked by the internal clock provided from the RCC /
Kojto	136:ef9c61f8c49f	518	#define LL_TIM_CLOCKSOURCE_EXT_MODE1 (TIM_SMCR_SMS_2 \| TIM_SMCR_SMS_1 \| TIM_SMCR_SMS_0 ) /!< Counter counts at each rising or falling edge on a selected inpu t/
Kojto	136:ef9c61f8c49f	519	#define LL_TIM_CLOCKSOURCE_EXT_MODE2 TIM_SMCR_ECE /!< Counter counts at each rising or falling edge on the external trigger input ETR /
Kojto	136:ef9c61f8c49f	520	/**
Kojto	136:ef9c61f8c49f	521	* @}
Kojto	136:ef9c61f8c49f	522	*/
Kojto	136:ef9c61f8c49f	523
Kojto	136:ef9c61f8c49f	524	/** @defgroup TIM_LL_EC_ENCODERMODE Encoder Mode
Kojto	136:ef9c61f8c49f	525	* @{
Kojto	136:ef9c61f8c49f	526	*/
Kojto	136:ef9c61f8c49f	527	#define LL_TIM_ENCODERMODE_X2_TI1 TIM_SMCR_SMS_0 /!< Encoder mode 1 - Counter counts up/down on TI2FP2 edge depending on TI1FP1 level /
Kojto	136:ef9c61f8c49f	528	#define LL_TIM_ENCODERMODE_X2_TI2 TIM_SMCR_SMS_1 /!< Encoder mode 2 - Counter counts up/down on TI1FP1 edge depending on TI2FP2 level /
Kojto	136:ef9c61f8c49f	529	#define LL_TIM_ENCODERMODE_X4_TI12 (TIM_SMCR_SMS_1 \| TIM_SMCR_SMS_0) /!< Encoder mode 3 - Counter counts up/down on both TI1FP1 and TI2FP2 edges depending on the level of the other input l /
Kojto	136:ef9c61f8c49f	530	/**
Kojto	136:ef9c61f8c49f	531	* @}
Kojto	136:ef9c61f8c49f	532	*/
Kojto	136:ef9c61f8c49f	533
Kojto	136:ef9c61f8c49f	534	/** @defgroup TIM_LL_EC_TRGO Trigger Output
Kojto	136:ef9c61f8c49f	535	* @{
Kojto	136:ef9c61f8c49f	536	*/
Kojto	136:ef9c61f8c49f	537	#define LL_TIM_TRGO_RESET ((uint32_t)0x00000000U) /!< UG bit from the TIMx_EGR register is used as trigger output /
Kojto	136:ef9c61f8c49f	538	#define LL_TIM_TRGO_ENABLE TIM_CR2_MMS_0 /!< Counter Enable signal (CNT_EN) is used as trigger output /
Kojto	136:ef9c61f8c49f	539	#define LL_TIM_TRGO_UPDATE TIM_CR2_MMS_1 /!< Update event is used as trigger output /
Kojto	136:ef9c61f8c49f	540	#define LL_TIM_TRGO_CC1IF (TIM_CR2_MMS_1 \| TIM_CR2_MMS_0) /!< CC1 capture or a compare match is used as trigger output /
Kojto	136:ef9c61f8c49f	541	#define LL_TIM_TRGO_OC1REF TIM_CR2_MMS_2 /!< OC1REF signal is used as trigger output /
Kojto	136:ef9c61f8c49f	542	#define LL_TIM_TRGO_OC2REF (TIM_CR2_MMS_2 \| TIM_CR2_MMS_0) /!< OC2REF signal is used as trigger output /
Kojto	136:ef9c61f8c49f	543	#define LL_TIM_TRGO_OC3REF (TIM_CR2_MMS_2 \| TIM_CR2_MMS_1) /!< OC3REF signal is used as trigger output /
Kojto	136:ef9c61f8c49f	544	#define LL_TIM_TRGO_OC4REF (TIM_CR2_MMS_2 \| TIM_CR2_MMS_1 \| TIM_CR2_MMS_0) /!< OC4REF signal is used as trigger output /
Kojto	136:ef9c61f8c49f	545	/**
Kojto	136:ef9c61f8c49f	546	* @}
Kojto	136:ef9c61f8c49f	547	*/
Kojto	136:ef9c61f8c49f	548
Kojto	136:ef9c61f8c49f	549
Kojto	136:ef9c61f8c49f	550	/** @defgroup TIM_LL_EC_SLAVEMODE Slave Mode
Kojto	136:ef9c61f8c49f	551	* @{
Kojto	136:ef9c61f8c49f	552	*/
Kojto	136:ef9c61f8c49f	553	#define LL_TIM_SLAVEMODE_DISABLED ((uint32_t)0x00000000U) /!< Slave mode disabled /
Kojto	136:ef9c61f8c49f	554	#define LL_TIM_SLAVEMODE_RESET TIM_SMCR_SMS_2 /!< Reset Mode - Rising edge of the selected trigger input (TRGI) reinitializes the counter /
Kojto	136:ef9c61f8c49f	555	#define LL_TIM_SLAVEMODE_GATED (TIM_SMCR_SMS_2 \| TIM_SMCR_SMS_0) /!< Gated Mode - The counter clock is enabled when the trigger input (TRGI) is high /
Kojto	136:ef9c61f8c49f	556	#define LL_TIM_SLAVEMODE_TRIGGER (TIM_SMCR_SMS_2 \| TIM_SMCR_SMS_1) /!< Trigger Mode - The counter starts at a rising edge of the trigger TRGI /
Kojto	136:ef9c61f8c49f	557	/**
Kojto	136:ef9c61f8c49f	558	* @}
Kojto	136:ef9c61f8c49f	559	*/
Kojto	136:ef9c61f8c49f	560
Kojto	136:ef9c61f8c49f	561	/** @defgroup TIM_LL_EC_TS Trigger Selection
Kojto	136:ef9c61f8c49f	562	* @{
Kojto	136:ef9c61f8c49f	563	*/
Kojto	136:ef9c61f8c49f	564	#define LL_TIM_TS_ITR0 ((uint32_t)0x00000000U) /!< Internal Trigger 0 (ITR0) is used as trigger input /
Kojto	136:ef9c61f8c49f	565	#define LL_TIM_TS_ITR1 TIM_SMCR_TS_0 /!< Internal Trigger 1 (ITR1) is used as trigger input /
Kojto	136:ef9c61f8c49f	566	#define LL_TIM_TS_ITR2 TIM_SMCR_TS_1 /!< Internal Trigger 2 (ITR2) is used as trigger input /
Kojto	136:ef9c61f8c49f	567	#define LL_TIM_TS_ITR3 (TIM_SMCR_TS_0 \| TIM_SMCR_TS_1) /!< Internal Trigger 3 (ITR3) is used as trigger input /
Kojto	136:ef9c61f8c49f	568	#define LL_TIM_TS_TI1F_ED TIM_SMCR_TS_2 /!< TI1 Edge Detector (TI1F_ED) is used as trigger input /
Kojto	136:ef9c61f8c49f	569	#define LL_TIM_TS_TI1FP1 (TIM_SMCR_TS_2 \| TIM_SMCR_TS_0) /!< Filtered Timer Input 1 (TI1FP1) is used as trigger input /
Kojto	136:ef9c61f8c49f	570	#define LL_TIM_TS_TI2FP2 (TIM_SMCR_TS_2 \| TIM_SMCR_TS_1) /!< Filtered Timer Input 2 (TI12P2) is used as trigger input /
Kojto	136:ef9c61f8c49f	571	#define LL_TIM_TS_ETRF TIM_SMCR_TS /!< Filtered external Trigger (ETRF) is used as trigger input /
Kojto	136:ef9c61f8c49f	572	/**
Kojto	136:ef9c61f8c49f	573	* @}
Kojto	136:ef9c61f8c49f	574	*/
Kojto	136:ef9c61f8c49f	575
Kojto	136:ef9c61f8c49f	576	/** @defgroup TIM_LL_EC_ETR_POLARITY External Trigger Polarity
Kojto	136:ef9c61f8c49f	577	* @{
Kojto	136:ef9c61f8c49f	578	*/
Kojto	136:ef9c61f8c49f	579	#define LL_TIM_ETR_POLARITY_NONINVERTED ((uint32_t)0x00000000U) /!< ETR is non-inverted, active at high level or rising edge /
Kojto	136:ef9c61f8c49f	580	#define LL_TIM_ETR_POLARITY_INVERTED TIM_SMCR_ETP /!< ETR is inverted, active at low level or falling edge /
Kojto	136:ef9c61f8c49f	581	/**
Kojto	136:ef9c61f8c49f	582	* @}
Kojto	136:ef9c61f8c49f	583	*/
Kojto	136:ef9c61f8c49f	584
Kojto	136:ef9c61f8c49f	585	/** @defgroup TIM_LL_EC_ETR_PRESCALER External Trigger Prescaler
Kojto	136:ef9c61f8c49f	586	* @{
Kojto	136:ef9c61f8c49f	587	*/
Kojto	136:ef9c61f8c49f	588	#define LL_TIM_ETR_PRESCALER_DIV1 ((uint32_t)0x00000000U) /!< ETR prescaler OFF /
Kojto	136:ef9c61f8c49f	589	#define LL_TIM_ETR_PRESCALER_DIV2 TIM_SMCR_ETPS_0 /!< ETR frequency is divided by 2 /
Kojto	136:ef9c61f8c49f	590	#define LL_TIM_ETR_PRESCALER_DIV4 TIM_SMCR_ETPS_1 /!< ETR frequency is divided by 4 /
Kojto	136:ef9c61f8c49f	591	#define LL_TIM_ETR_PRESCALER_DIV8 TIM_SMCR_ETPS /!< ETR frequency is divided by 8 /
Kojto	136:ef9c61f8c49f	592	/**
Kojto	136:ef9c61f8c49f	593	* @}
Kojto	136:ef9c61f8c49f	594	*/
Kojto	136:ef9c61f8c49f	595
Kojto	136:ef9c61f8c49f	596	/** @defgroup TIM_LL_EC_ETR_FILTER External Trigger Filter
Kojto	136:ef9c61f8c49f	597	* @{
Kojto	136:ef9c61f8c49f	598	*/
Kojto	136:ef9c61f8c49f	599	#define LL_TIM_ETR_FILTER_FDIV1 ((uint32_t)0x00000000U) /!< No filter, sampling is done at fDTS /
Kojto	136:ef9c61f8c49f	600	#define LL_TIM_ETR_FILTER_FDIV1_N2 TIM_SMCR_ETF_0 /!< fSAMPLING=fCK_INT, N=2 /
Kojto	136:ef9c61f8c49f	601	#define LL_TIM_ETR_FILTER_FDIV1_N4 TIM_SMCR_ETF_1 /!< fSAMPLING=fCK_INT, N=4 /
Kojto	136:ef9c61f8c49f	602	#define LL_TIM_ETR_FILTER_FDIV1_N8 (TIM_SMCR_ETF_1 \| TIM_SMCR_ETF_0) /!< fSAMPLING=fCK_INT, N=8 /
Kojto	136:ef9c61f8c49f	603	#define LL_TIM_ETR_FILTER_FDIV2_N6 TIM_SMCR_ETF_2 /!< fSAMPLING=fDTS/2, N=6 /
Kojto	136:ef9c61f8c49f	604	#define LL_TIM_ETR_FILTER_FDIV2_N8 (TIM_SMCR_ETF_2 \| TIM_SMCR_ETF_0) /!< fSAMPLING=fDTS/2, N=8 /
Kojto	136:ef9c61f8c49f	605	#define LL_TIM_ETR_FILTER_FDIV4_N6 (TIM_SMCR_ETF_2 \| TIM_SMCR_ETF_1 ) /!< fSAMPLING=fDTS/4, N=6 /
Kojto	136:ef9c61f8c49f	606	#define LL_TIM_ETR_FILTER_FDIV4_N8 (TIM_SMCR_ETF_2 \| TIM_SMCR_ETF_1 \| TIM_SMCR_ETF_0) /!< fSAMPLING=fDTS/4, N=8 /
Kojto	136:ef9c61f8c49f	607	#define LL_TIM_ETR_FILTER_FDIV8_N6 TIM_SMCR_ETF_3 /!< fSAMPLING=fDTS/8, N=8 /
Kojto	136:ef9c61f8c49f	608	#define LL_TIM_ETR_FILTER_FDIV8_N8 (TIM_SMCR_ETF_3 \| TIM_SMCR_ETF_0) /!< fSAMPLING=fDTS/16, N=5 /
Kojto	136:ef9c61f8c49f	609	#define LL_TIM_ETR_FILTER_FDIV16_N5 (TIM_SMCR_ETF_3 \| TIM_SMCR_ETF_1 ) /!< fSAMPLING=fDTS/16, N=6 /
Kojto	136:ef9c61f8c49f	610	#define LL_TIM_ETR_FILTER_FDIV16_N6 (TIM_SMCR_ETF_3 \| TIM_SMCR_ETF_1 \| TIM_SMCR_ETF_0) /!< fSAMPLING=fDTS/16, N=8 /
Kojto	136:ef9c61f8c49f	611	#define LL_TIM_ETR_FILTER_FDIV16_N8 (TIM_SMCR_ETF_3 \| TIM_SMCR_ETF_2 ) /!< fSAMPLING=fDTS/16, N=5 /
Kojto	136:ef9c61f8c49f	612	#define LL_TIM_ETR_FILTER_FDIV32_N5 (TIM_SMCR_ETF_3 \| TIM_SMCR_ETF_2 \| TIM_SMCR_ETF_0) /!< fSAMPLING=fDTS/32, N=5 /
Kojto	136:ef9c61f8c49f	613	#define LL_TIM_ETR_FILTER_FDIV32_N6 (TIM_SMCR_ETF_3 \| TIM_SMCR_ETF_2 \| TIM_SMCR_ETF_1) /!< fSAMPLING=fDTS/32, N=6 /
Kojto	136:ef9c61f8c49f	614	#define LL_TIM_ETR_FILTER_FDIV32_N8 TIM_SMCR_ETF /!< fSAMPLING=fDTS/32, N=8 /
Kojto	136:ef9c61f8c49f	615	/**
Kojto	136:ef9c61f8c49f	616	* @}
Kojto	136:ef9c61f8c49f	617	*/
Kojto	136:ef9c61f8c49f	618
Kojto	136:ef9c61f8c49f	619
Kojto	136:ef9c61f8c49f	620
Kojto	136:ef9c61f8c49f	621
Kojto	136:ef9c61f8c49f	622
Kojto	136:ef9c61f8c49f	623
Kojto	136:ef9c61f8c49f	624
Kojto	136:ef9c61f8c49f	625	/** @defgroup TIM_LL_EC_DMABURST_BASEADDR DMA Burst Base Address
Kojto	136:ef9c61f8c49f	626	* @{
Kojto	136:ef9c61f8c49f	627	*/
Kojto	136:ef9c61f8c49f	628	#define LL_TIM_DMABURST_BASEADDR_CR1 ((uint32_t)0x00000000U) /!< TIMx_CR1 register is the DMA base address for DMA burst / /!< TIMx_CR1 register is the DMA base address for DMA burst /
Kojto	136:ef9c61f8c49f	629	#define LL_TIM_DMABURST_BASEADDR_CR2 TIM_DCR_DBA_0 /!< TIMx_CR2 register is the DMA base address for DMA burst /
Kojto	136:ef9c61f8c49f	630	#define LL_TIM_DMABURST_BASEADDR_SMCR TIM_DCR_DBA_1 /!< TIMx_SMCR register is the DMA base address for DMA burst /
Kojto	136:ef9c61f8c49f	631	#define LL_TIM_DMABURST_BASEADDR_DIER (TIM_DCR_DBA_1 \| TIM_DCR_DBA_0) /!< TIMx_DIER register is the DMA base address for DMA burst /
Kojto	136:ef9c61f8c49f	632	#define LL_TIM_DMABURST_BASEADDR_SR TIM_DCR_DBA_2 /!< TIMx_SR register is the DMA base address for DMA burst /
Kojto	136:ef9c61f8c49f	633	#define LL_TIM_DMABURST_BASEADDR_EGR (TIM_DCR_DBA_2 \| TIM_DCR_DBA_0) /!< TIMx_EGR register is the DMA base address for DMA burst /
Kojto	136:ef9c61f8c49f	634	#define LL_TIM_DMABURST_BASEADDR_CCMR1 (TIM_DCR_DBA_2 \| TIM_DCR_DBA_1) /!< TIMx_CCMR1 register is the DMA base address for DMA burst /
Kojto	136:ef9c61f8c49f	635	#define LL_TIM_DMABURST_BASEADDR_CCMR2 (TIM_DCR_DBA_2 \| TIM_DCR_DBA_1 \| TIM_DCR_DBA_0) /!< TIMx_CCMR2 register is the DMA base address for DMA burst /
Kojto	136:ef9c61f8c49f	636	#define LL_TIM_DMABURST_BASEADDR_CCER TIM_DCR_DBA_3 /!< TIMx_CCER register is the DMA base address for DMA burst /
Kojto	136:ef9c61f8c49f	637	#define LL_TIM_DMABURST_BASEADDR_CNT (TIM_DCR_DBA_3 \| TIM_DCR_DBA_0) /!< TIMx_CNT register is the DMA base address for DMA burst /
Kojto	136:ef9c61f8c49f	638	#define LL_TIM_DMABURST_BASEADDR_PSC (TIM_DCR_DBA_3 \| TIM_DCR_DBA_1) /!< TIMx_PSC register is the DMA base address for DMA burst /
Kojto	136:ef9c61f8c49f	639	#define LL_TIM_DMABURST_BASEADDR_ARR (TIM_DCR_DBA_3 \| TIM_DCR_DBA_1 \| TIM_DCR_DBA_0) /!< TIMx_ARR register is the DMA base address for DMA burst /
Kojto	136:ef9c61f8c49f	640	#define LL_TIM_DMABURST_BASEADDR_RCR (TIM_DCR_DBA_3 \| TIM_DCR_DBA_2) /!< TIMx_RCR register is the DMA base address for DMA burst /
Kojto	136:ef9c61f8c49f	641	#define LL_TIM_DMABURST_BASEADDR_CCR1 (TIM_DCR_DBA_3 \| TIM_DCR_DBA_2 \| TIM_DCR_DBA_0) /!< TIMx_CCR1 register is the DMA base address for DMA burst /
Kojto	136:ef9c61f8c49f	642	#define LL_TIM_DMABURST_BASEADDR_CCR2 (TIM_DCR_DBA_3 \| TIM_DCR_DBA_2 \| TIM_DCR_DBA_1) /!< TIMx_CCR2 register is the DMA base address for DMA burst /
Kojto	136:ef9c61f8c49f	643	#define LL_TIM_DMABURST_BASEADDR_CCR3 (TIM_DCR_DBA_3 \| TIM_DCR_DBA_2 \| TIM_DCR_DBA_1 \| TIM_DCR_DBA_0) /!< TIMx_CCR3 register is the DMA base address for DMA burst /
Kojto	136:ef9c61f8c49f	644	#define LL_TIM_DMABURST_BASEADDR_CCR4 TIM_DCR_DBA_4 /!< TIMx_CCR4 register is the DMA base address for DMA burst /
Kojto	136:ef9c61f8c49f	645	#define LL_TIM_DMABURST_BASEADDR_BDTR (TIM_DCR_DBA_4 \| TIM_DCR_DBA_0) /!< TIMx_BDTR register is the DMA base address for DMA burst /
Kojto	136:ef9c61f8c49f	646	#define LL_TIM_DMABURST_BASEADDR_CCMR3 (TIM_DCR_DBA_4 \| TIM_DCR_DBA_1) /!< TIMx_CCMR3 register is the DMA base address for DMA burst /
Kojto	136:ef9c61f8c49f	647	#define LL_TIM_DMABURST_BASEADDR_CCR5 (TIM_DCR_DBA_4 \| TIM_DCR_DBA_1 \| TIM_DCR_DBA_0) /!< TIMx_CCR5 register is the DMA base address for DMA burst /
Kojto	136:ef9c61f8c49f	648	#define LL_TIM_DMABURST_BASEADDR_CCR6 (TIM_DCR_DBA_4 \| TIM_DCR_DBA_2) /!< TIMx_CCR6 register is the DMA base address for DMA burst /
Kojto	136:ef9c61f8c49f	649	#define LL_TIM_DMABURST_BASEADDR_OR1 (TIM_DCR_DBA_4 \| TIM_DCR_DBA_2 \| TIM_DCR_DBA_0) /!< TIMx_OR1 register is the DMA base address for DMA burst /
Kojto	136:ef9c61f8c49f	650	#define LL_TIM_DMABURST_BASEADDR_OR2 (TIM_DCR_DBA_4 \| TIM_DCR_DBA_2 \| TIM_DCR_DBA_1) /!< TIMx_OR2 register is the DMA base address for DMA burst /
Kojto	136:ef9c61f8c49f	651	#define LL_TIM_DMABURST_BASEADDR_OR3 (TIM_DCR_DBA_4 \| TIM_DCR_DBA_2 \| TIM_DCR_DBA_1 \| TIM_DCR_DBA_0) /!< TIMx_OR3 register is the DMA base address for DMA burst /
Kojto	136:ef9c61f8c49f	652	/**
Kojto	136:ef9c61f8c49f	653	* @}
Kojto	136:ef9c61f8c49f	654	*/
Kojto	136:ef9c61f8c49f	655
Kojto	136:ef9c61f8c49f	656	/** @defgroup TIM_LL_EC_DMABURST_LENGTH DMA Burst Length
Kojto	136:ef9c61f8c49f	657	* @{
Kojto	136:ef9c61f8c49f	658	*/
Kojto	136:ef9c61f8c49f	659	#define LL_TIM_DMABURST_LENGTH_1TRANSFER ((uint32_t)0x00000000U) /!< Transfer is done to 1 register starting from the DMA burst base address /
Kojto	136:ef9c61f8c49f	660	#define LL_TIM_DMABURST_LENGTH_2TRANSFERS TIM_DCR_DBL_0 /!< Transfer is done to 2 registers starting from the DMA burst base address /
Kojto	136:ef9c61f8c49f	661	#define LL_TIM_DMABURST_LENGTH_3TRANSFERS TIM_DCR_DBL_1 /!< Transfer is done to 3 registers starting from the DMA burst base address /
Kojto	136:ef9c61f8c49f	662	#define LL_TIM_DMABURST_LENGTH_4TRANSFERS (TIM_DCR_DBL_1 \| TIM_DCR_DBL_0) /!< Transfer is done to 4 registers starting from the DMA burst base address /
Kojto	136:ef9c61f8c49f	663	#define LL_TIM_DMABURST_LENGTH_5TRANSFERS TIM_DCR_DBL_2 /!< Transfer is done to 5 registers starting from the DMA burst base address /
Kojto	136:ef9c61f8c49f	664	#define LL_TIM_DMABURST_LENGTH_6TRANSFERS (TIM_DCR_DBL_2 \| TIM_DCR_DBL_0) /!< Transfer is done to 6 registers starting from the DMA burst base address /
Kojto	136:ef9c61f8c49f	665	#define LL_TIM_DMABURST_LENGTH_7TRANSFERS (TIM_DCR_DBL_2 \| TIM_DCR_DBL_1) /!< Transfer is done to 7 registers starting from the DMA burst base address /
Kojto	136:ef9c61f8c49f	666	#define LL_TIM_DMABURST_LENGTH_8TRANSFERS (TIM_DCR_DBL_2 \| TIM_DCR_DBL_1 \| TIM_DCR_DBL_0) /!< Transfer is done to 1 registers starting from the DMA burst base address /
Kojto	136:ef9c61f8c49f	667	#define LL_TIM_DMABURST_LENGTH_9TRANSFERS TIM_DCR_DBL_3 /!< Transfer is done to 9 registers starting from the DMA burst base address /
Kojto	136:ef9c61f8c49f	668	#define LL_TIM_DMABURST_LENGTH_10TRANSFERS (TIM_DCR_DBL_3 \| TIM_DCR_DBL_0) /!< Transfer is done to 10 registers starting from the DMA burst base address /
Kojto	136:ef9c61f8c49f	669	#define LL_TIM_DMABURST_LENGTH_11TRANSFERS (TIM_DCR_DBL_3 \| TIM_DCR_DBL_1) /!< Transfer is done to 11 registers starting from the DMA burst base address /
Kojto	136:ef9c61f8c49f	670	#define LL_TIM_DMABURST_LENGTH_12TRANSFERS (TIM_DCR_DBL_3 \| TIM_DCR_DBL_1 \| TIM_DCR_DBL_0) /!< Transfer is done to 12 registers starting from the DMA burst base address /
Kojto	136:ef9c61f8c49f	671	#define LL_TIM_DMABURST_LENGTH_13TRANSFERS (TIM_DCR_DBL_3 \| TIM_DCR_DBL_2) /!< Transfer is done to 13 registers starting from the DMA burst base address /
Kojto	136:ef9c61f8c49f	672	#define LL_TIM_DMABURST_LENGTH_14TRANSFERS (TIM_DCR_DBL_3 \| TIM_DCR_DBL_2 \| TIM_DCR_DBL_0) /!< Transfer is done to 14 registers starting from the DMA burst base address /
Kojto	136:ef9c61f8c49f	673	#define LL_TIM_DMABURST_LENGTH_15TRANSFERS (TIM_DCR_DBL_3 \| TIM_DCR_DBL_2 \| TIM_DCR_DBL_1) /!< Transfer is done to 15 registers starting from the DMA burst base address /
Kojto	136:ef9c61f8c49f	674	#define LL_TIM_DMABURST_LENGTH_16TRANSFERS (TIM_DCR_DBL_3 \| TIM_DCR_DBL_2 \| TIM_DCR_DBL_1 \| TIM_DCR_DBL_0) /!< Transfer is done to 16 registers starting from the DMA burst base address /
Kojto	136:ef9c61f8c49f	675	#define LL_TIM_DMABURST_LENGTH_17TRANSFERS TIM_DCR_DBL_4 /!< Transfer is done to 17 registers starting from the DMA burst base address /
Kojto	136:ef9c61f8c49f	676	#define LL_TIM_DMABURST_LENGTH_18TRANSFERS (TIM_DCR_DBL_4 \| TIM_DCR_DBL_0) /!< Transfer is done to 18 registers starting from the DMA burst base address /
Kojto	136:ef9c61f8c49f	677	/**
Kojto	136:ef9c61f8c49f	678	* @}
Kojto	136:ef9c61f8c49f	679	*/
Kojto	136:ef9c61f8c49f	680
Kojto	136:ef9c61f8c49f	681
Kojto	136:ef9c61f8c49f	682	/** @defgroup TIM_LL_EC_TIM2_ETR_RMP TIM2 External Trigger Remap
Kojto	136:ef9c61f8c49f	683	* @{
Kojto	136:ef9c61f8c49f	684	*/
Kojto	136:ef9c61f8c49f	685	#define LL_TIM_TIM2_ETR_RMP_GPIO ((uint32_t)0x00000000U \| TIM2_OR_RMP_MASK) /!< TIM2_ETR is connected to Ored GPIO /
Kojto	136:ef9c61f8c49f	686	#if defined(TIM_TIM2_REMAP_HSI_SUPPORT)
Kojto	136:ef9c61f8c49f	687	#define LL_TIM_TIM2_ETR_RMP_HSI (TIM2_OR_ETR_RMP_1 \| TIM2_OR_ETR_RMP_0 \| TIM2_OR_RMP_MASK) /!< TIM2_ETR is connected to HSI /
Kojto	136:ef9c61f8c49f	688	#endif /* defined(TIM_TIM2_REMAP_HSI_SUPPORT) */
Kojto	136:ef9c61f8c49f	689	#if defined(TIM_TIM2_REMAP_HSI48_SUPPORT)
Kojto	136:ef9c61f8c49f	690	#define LL_TIM_TIM2_ETR_RMP_HSI48 (TIM2_OR_ETR_RMP_2 \| TIM2_OR_RMP_MASK) /!< TIM2_ETR is connected to HSI48 /
Kojto	136:ef9c61f8c49f	691	#endif /* defined(TIM_TIM2_REMAP_HSI48_SUPPORT) */
Kojto	136:ef9c61f8c49f	692	#define LL_TIM_TIM2_ETR_RMP_LSE (TIM2_OR_ETR_RMP_2 \| TIM2_OR_ETR_RMP_0 \| TIM2_OR_RMP_MASK) /!< TIM2_ETR is connected to LSE /
Kojto	136:ef9c61f8c49f	693	#define LL_TIM_TIM2_ETR_RMP_COMP2 (TIM2_OR_ETR_RMP_2 \| TIM2_OR_ETR_RMP_1 \| TIM2_OR_RMP_MASK) /!< TIM2_ETR is connected to COMP2_OUT /
Kojto	136:ef9c61f8c49f	694	#define LL_TIM_TIM2_ETR_RMP_COMP1 (TIM2_OR_ETR_RMP \| TIM2_OR_RMP_MASK) /!< TIM2_ETR is connected to COMP1_OUT /
Kojto	136:ef9c61f8c49f	695
Kojto	136:ef9c61f8c49f	696	/**
Kojto	136:ef9c61f8c49f	697	* @}
Kojto	136:ef9c61f8c49f	698	*/
Kojto	136:ef9c61f8c49f	699
Kojto	136:ef9c61f8c49f	700	/** @defgroup TIM_LL_EC_TIM2_TI4_RMP TIM2 Timer Input Ch4 Remap
Kojto	136:ef9c61f8c49f	701	* @{
Kojto	136:ef9c61f8c49f	702	*/
Kojto	136:ef9c61f8c49f	703	#define LL_TIM_TIM2_TI4_RMP_GPIO ((uint32_t)0x00000000U \| TIM2_OR_RMP_MASK) /!< TIM2 input capture 4 is connected to GPIO /
Kojto	136:ef9c61f8c49f	704	#define LL_TIM_TIM2_TI4_RMP_COMP2 (TIM2_OR_TI4_RMP_0 \| TIM2_OR_RMP_MASK) /!< TIM2 input capture 4 is connected to COMP2_OUT /
Kojto	136:ef9c61f8c49f	705	#define LL_TIM_TIM2_TI4_RMP_COMP1 (TIM2_OR_TI4_RMP_1 \| TIM2_OR_RMP_MASK) /!< TIM2 input capture 4 is connected to COMP1_OUT /
Kojto	136:ef9c61f8c49f	706	/**
Kojto	136:ef9c61f8c49f	707	* @}
Kojto	136:ef9c61f8c49f	708	*/
Kojto	136:ef9c61f8c49f	709
Kojto	136:ef9c61f8c49f	710	#if defined(TIM3_OR_ETR_RMP)
Kojto	136:ef9c61f8c49f	711	/** @defgroup TIM_LL_EC_TIM3_ETR_RMP TIM3 External Trigger Remap
Kojto	136:ef9c61f8c49f	712	* @{
Kojto	136:ef9c61f8c49f	713	*/
Kojto	136:ef9c61f8c49f	714	#define LL_TIM_TIM3_ETR_RMP_GPIO ((uint32_t)0x00000000U \| TIM3_OR_RMP_MASK) /!< TIM3_ETR is connected to GPIO /
Kojto	136:ef9c61f8c49f	715	#define LL_TIM_TIM3_ETR_RMP_HSI48DIV6 (TIM3_OR_ETR_RMP_1 \| TIM3_OR_RMP_MASK) /!< TIM3_ETR is connected to HSI48 divided by 6 /
Kojto	136:ef9c61f8c49f	716	/**
Kojto	136:ef9c61f8c49f	717	* @}
Kojto	136:ef9c61f8c49f	718	*/
Kojto	136:ef9c61f8c49f	719	#endif /* defined(TIM3_OR_ETR_RMP) */
Kojto	136:ef9c61f8c49f	720
Kojto	136:ef9c61f8c49f	721	#if defined(TIM3_OR_TI1_RMP) \|\| defined(TIM3_OR_TI2_RMP) \|\| defined(TIM3_OR_TI4_RMP)
Kojto	136:ef9c61f8c49f	722	/** @defgroup TIM_LL_EC_TIM3_TI_RMP TIM3 External Inputs Remap
Kojto	136:ef9c61f8c49f	723	* @{
Kojto	136:ef9c61f8c49f	724	*/
Kojto	136:ef9c61f8c49f	725	#define LL_TIM_TIM3_TI_RMP_TI1_USB_SOF ((uint32_t)0x00000000U \| TIM3_OR_RMP_MASK) /!< TIM3_TI1 input is connected to USB_SOF /
Kojto	136:ef9c61f8c49f	726	#define LL_TIM_TIM3_TI_RMP_TI1_GPIO (TIM3_OR_TI1_RMP \| TIM3_OR_RMP_MASK) /!< TIM3_TI1 input is connected to PE3, PA6, PC6 or PB4 /
Kojto	136:ef9c61f8c49f	727
Kojto	136:ef9c61f8c49f	728	#define LL_TIM_TIM3_TI_RMP_TI2_GPIO_DEF ((uint32_t)0x00000000U \| TIM3_OR_RMP_MASK) /!< Mapping PB5 to TIM22_CH2 /
Kojto	136:ef9c61f8c49f	729	#define LL_TIM_TIM3_TI_RMP_TI2_GPIOB5_AF4 (TIM3_OR_TI2_RMP \| TIM3_OR_RMP_MASK) /!< Mapping PB5 to TIM3_CH2 /
Kojto	136:ef9c61f8c49f	730
Kojto	136:ef9c61f8c49f	731	#define LL_TIM_TIM3_TI_RMP_TI4_GPIO_DEF ((uint32_t)0x00000000U \| TIM3_OR_RMP_MASK) /!< Mapping PC9 to USB_OE /
Kojto	136:ef9c61f8c49f	732	#define LL_TIM_TIM3_TI_RMP_TI4_GPIOC9_AF2 (TIM3_OR_TI4_RMP \| TIM3_OR_RMP_MASK) /!< Mapping PC9 to TIM3_CH4 /
Kojto	136:ef9c61f8c49f	733	/**
Kojto	136:ef9c61f8c49f	734	* @}
Kojto	136:ef9c61f8c49f	735	*/
Kojto	136:ef9c61f8c49f	736	#endif /defined(TIM3_OR_TI1_RMP) or defined(TIM3_OR_TI2_RMP) or defined(TIM3_OR_TI4_RMP)/
Kojto	136:ef9c61f8c49f	737
Kojto	136:ef9c61f8c49f	738	/** @defgroup TIM_LL_EC_TIM21_ETR_RMP TIM21 External Trigger Remap
Kojto	136:ef9c61f8c49f	739	* @{
Kojto	136:ef9c61f8c49f	740	*/
Kojto	136:ef9c61f8c49f	741	#define LL_TIM_TIM21_ETR_RMP_GPIO ((uint32_t)0x00000000U \| TIM21_OR_RMP_MASK) /!< TIM21_ETR is connected to Ored GPIO1 /
Kojto	136:ef9c61f8c49f	742	#define LL_TIM_TIM21_ETR_RMP_COMP2 (TIM21_OR_ETR_RMP_0 \| TIM21_OR_RMP_MASK) /!< TIM21_ETR is connected to COMP2_OUT /
Kojto	136:ef9c61f8c49f	743	#define LL_TIM_TIM21_ETR_RMP_COMP1 (TIM21_OR_ETR_RMP_1 \| TIM21_OR_RMP_MASK) /!< TIM21_ETR is connected to COMP1_OUT /
Kojto	136:ef9c61f8c49f	744	#define LL_TIM_TIM21_ETR_RMP_LSE (TIM21_OR_ETR_RMP \| TIM21_OR_RMP_MASK) /!< TIM21_ETR is connected to LSE /
Kojto	136:ef9c61f8c49f	745	/**
Kojto	136:ef9c61f8c49f	746	* @}
Kojto	136:ef9c61f8c49f	747	*/
Kojto	136:ef9c61f8c49f	748
Kojto	136:ef9c61f8c49f	749	/** @defgroup TIM_LL_EC_TIM21_TI1_RMP TIM21 External Input Ch1 Remap
Kojto	136:ef9c61f8c49f	750	* @{
Kojto	136:ef9c61f8c49f	751	*/
Kojto	136:ef9c61f8c49f	752	#define LL_TIM_TIM21_TI1_RMP_GPIO ((uint32_t)0x00000000U \| TIM21_OR_RMP_MASK) /!< TIM21_TI1 is connected to Ored GPIO1 /
Kojto	136:ef9c61f8c49f	753	#define LL_TIM_TIM21_TI1_RMP_RTC_WK (TIM21_OR_TI1_RMP_0 \| TIM21_OR_RMP_MASK) /!< TIM21_TI1 is connected to RTC_WAKEUP /
Kojto	136:ef9c61f8c49f	754	#define LL_TIM_TIM21_TI1_RMP_HSE_RTC (TIM21_OR_TI1_RMP_1 \| TIM21_OR_RMP_MASK) /!< TIM21_TI1 is connected to HSE_RTC /
Kojto	136:ef9c61f8c49f	755	#define LL_TIM_TIM21_TI1_RMP_MSI (TIM21_OR_TI1_RMP_1 \| TIM21_OR_TI1_RMP_0 \| TIM21_OR_RMP_MASK) /!< TIM21_TI1 is connected to MSI /
Kojto	136:ef9c61f8c49f	756	#define LL_TIM_TIM21_TI1_RMP_LSE (TIM21_OR_TI1_RMP_2 \| TIM21_OR_RMP_MASK) /!< TIM21_TI1 is connected to LSE /
Kojto	136:ef9c61f8c49f	757	#define LL_TIM_TIM21_TI1_RMP_LSI (TIM21_OR_TI1_RMP_2 \| TIM21_OR_TI1_RMP_0 \| TIM21_OR_RMP_MASK) /!< TIM21_TI1 is connected to LSI /
Kojto	136:ef9c61f8c49f	758	#define LL_TIM_TIM21_TI1_RMP_COMP1 (TIM21_OR_TI1_RMP_2 \| TIM21_OR_TI1_RMP_1 \| TIM21_OR_RMP_MASK) /!< TIM21_TI1 is connected to COMP1_OUT /
Kojto	136:ef9c61f8c49f	759	#define LL_TIM_TIM21_TI1_RMP_MCO (TIM21_OR_TI1_RMP \| TIM21_OR_RMP_MASK) /!< TIM21_TI1 is connected to MCO /
Kojto	136:ef9c61f8c49f	760	/**
Kojto	136:ef9c61f8c49f	761	* @}
Kojto	136:ef9c61f8c49f	762	*/
Kojto	136:ef9c61f8c49f	763
Kojto	136:ef9c61f8c49f	764	/** @defgroup TIM_LL_EC_TIM21_TI2_RMP TIM21 External Input Ch2 Remap
Kojto	136:ef9c61f8c49f	765	* @{
Kojto	136:ef9c61f8c49f	766	*/
Kojto	136:ef9c61f8c49f	767	#define LL_TIM_TIM21_TI2_RMP_GPIO ((uint32_t)0x00000000U \| TIM21_OR_RMP_MASK) /!< TIM21_TI2 is connected to Ored GPIO1 /
Kojto	136:ef9c61f8c49f	768	#define LL_TIM_TIM21_TI2_RMP_COMP2 (TIM21_OR_TI2_RMP \| TIM21_OR_RMP_MASK) /!< TIM21_TI2 is connected to COMP2_OUT /
Kojto	136:ef9c61f8c49f	769	/**
Kojto	136:ef9c61f8c49f	770	* @}
Kojto	136:ef9c61f8c49f	771	*/
Kojto	136:ef9c61f8c49f	772
Kojto	136:ef9c61f8c49f	773	#if defined(TIM22_OR_ETR_RMP)
Kojto	136:ef9c61f8c49f	774
Kojto	136:ef9c61f8c49f	775	/** @defgroup TIM_LL_EC_TIM22_ETR_RMP TIM22 External Trigger Remap
Kojto	136:ef9c61f8c49f	776	* @{
Kojto	136:ef9c61f8c49f	777	*/
Kojto	136:ef9c61f8c49f	778	#define LL_TIM_TIM22_ETR_RMP_GPIO ((uint32_t)0x00000000U \| TIM22_OR_RMP_MASK) /!< TIM22_ETR is connected to GPIO /
Kojto	136:ef9c61f8c49f	779	#define LL_TIM_TIM22_ETR_RMP_COMP2 (TIM22_OR_ETR_RMP_0 \| TIM22_OR_RMP_MASK) /!< TIM22_ETR is connected to COMP2_OUT /
Kojto	136:ef9c61f8c49f	780	#define LL_TIM_TIM22_ETR_RMP_COMP1 (TIM22_OR_ETR_RMP_1 \| TIM22_OR_RMP_MASK) /!< TIM22_ETR is connected to COMP1_OUT /
Kojto	136:ef9c61f8c49f	781	#define LL_TIM_TIM22_ETR_RMP_LSE (TIM22_OR_ETR_RMP \| TIM22_OR_RMP_MASK) /!< TIM22_ETR is connected to LSE /
Kojto	136:ef9c61f8c49f	782	/**
Kojto	136:ef9c61f8c49f	783	* @}
Kojto	136:ef9c61f8c49f	784	*/
Kojto	136:ef9c61f8c49f	785	#endif /* defined(TIM22_OR_ETR_RMP) */
Kojto	136:ef9c61f8c49f	786
Kojto	136:ef9c61f8c49f	787	#if defined(TIM22_OR_TI1_RMP)
Kojto	136:ef9c61f8c49f	788	/** @defgroup TIM_LL_EC_TIM22_TI1_RMP TIM22 External Input Ch1 Remap
Kojto	136:ef9c61f8c49f	789	* @{
Kojto	136:ef9c61f8c49f	790	*/
Kojto	136:ef9c61f8c49f	791	#define LL_TIM_TIM22_TI1_RMP_GPIO1 ((uint32_t)0x00000000U \| TIM22_OR_RMP_MASK) /!< TIM22_TI1 is connected to GPIO1 /
Kojto	136:ef9c61f8c49f	792	#define LL_TIM_TIM22_TI1_RMP_COMP2 (TIM22_OR_TI1_RMP_0 \| TIM22_OR_RMP_MASK) /!< TIM22_TI1 is connected to COMP2_OUT /
Kojto	136:ef9c61f8c49f	793	#define LL_TIM_TIM22_TI1_RMP_COMP1 (TIM22_OR_TI1_RMP_1 \| TIM22_OR_RMP_MASK) /!< TIM22_TI1 is connected to COMP1_OUT /
Kojto	136:ef9c61f8c49f	794	#define LL_TIM_TIM22_TI1_RMP_GPIO2 (TIM22_OR_TI1_RMP \| TIM22_OR_RMP_MASK) /!< TIM22_TI1 is connected to GPIO2 /
Kojto	136:ef9c61f8c49f	795	/**
Kojto	136:ef9c61f8c49f	796	* @}
Kojto	136:ef9c61f8c49f	797	*/
Kojto	136:ef9c61f8c49f	798	#endif /* defined(TIM22_OR_TI1_RMP) */
Kojto	136:ef9c61f8c49f	799
Kojto	136:ef9c61f8c49f	800
Kojto	136:ef9c61f8c49f	801	/** @defgroup TIM_LL_EC_OCREF_CLR_INT OCREF clear input selection
Kojto	136:ef9c61f8c49f	802	* @{
Kojto	136:ef9c61f8c49f	803	*/
Kojto	136:ef9c61f8c49f	804	#define LL_TIM_OCREF_CLR_INT_NC ((uint32_t)0x00000000U ) /!< OCREF_CLR_INT is not connected /
Kojto	136:ef9c61f8c49f	805	#define LL_TIM_OCREF_CLR_INT_ETR TIM_SMCR_OCCS /!< OCREF_CLR_INT is connected to ETRF /
Kojto	136:ef9c61f8c49f	806	/**
Kojto	136:ef9c61f8c49f	807	* @}
Kojto	136:ef9c61f8c49f	808	*/
Kojto	136:ef9c61f8c49f	809
Kojto	136:ef9c61f8c49f	810
Kojto	136:ef9c61f8c49f	811	/**
Kojto	136:ef9c61f8c49f	812	* @}
Kojto	136:ef9c61f8c49f	813	*/
Kojto	136:ef9c61f8c49f	814
Kojto	136:ef9c61f8c49f	815	/* Exported macro ------------------------------------------------------------*/
Kojto	136:ef9c61f8c49f	816	/** @defgroup TIM_LL_Exported_Macros TIM Exported Macros
Kojto	136:ef9c61f8c49f	817	* @{
Kojto	136:ef9c61f8c49f	818	*/
Kojto	136:ef9c61f8c49f	819
Kojto	136:ef9c61f8c49f	820	/** @defgroup TIM_LL_EM_WRITE_READ Common Write and read registers Macros
Kojto	136:ef9c61f8c49f	821	* @{
Kojto	136:ef9c61f8c49f	822	*/
Kojto	136:ef9c61f8c49f	823	/**
Kojto	136:ef9c61f8c49f	824	* @brief Write a value in TIM register.
Kojto	136:ef9c61f8c49f	825	* @param __INSTANCE__ TIM Instance
Kojto	136:ef9c61f8c49f	826	* @param __REG__ Register to be written
Kojto	136:ef9c61f8c49f	827	* @param __VALUE__ Value to be written in the register
Kojto	136:ef9c61f8c49f	828	* @retval None
Kojto	136:ef9c61f8c49f	829	*/
Kojto	136:ef9c61f8c49f	830	#define LL_TIM_WriteReg(__INSTANCE__, __REG__, __VALUE__) WRITE_REG(__INSTANCE__->__REG__, (__VALUE__))
Kojto	136:ef9c61f8c49f	831
Kojto	136:ef9c61f8c49f	832	/**
Kojto	136:ef9c61f8c49f	833	* @brief Read a value in TIM register.
Kojto	136:ef9c61f8c49f	834	* @param __INSTANCE__ TIM Instance
Kojto	136:ef9c61f8c49f	835	* @param __REG__ Register to be read
Kojto	136:ef9c61f8c49f	836	* @retval Register value
Kojto	136:ef9c61f8c49f	837	*/
Kojto	136:ef9c61f8c49f	838	#define LL_TIM_ReadReg(__INSTANCE__, __REG__) READ_REG(__INSTANCE__->__REG__)
Kojto	136:ef9c61f8c49f	839	/**
Kojto	136:ef9c61f8c49f	840	* @}
Kojto	136:ef9c61f8c49f	841	*/
Kojto	136:ef9c61f8c49f	842
Kojto	136:ef9c61f8c49f	843	/** @defgroup TIM_LL_EM_Exported_Macros Exported_Macros
Kojto	136:ef9c61f8c49f	844	* @{
Kojto	136:ef9c61f8c49f	845	*/
Kojto	136:ef9c61f8c49f	846
Kojto	136:ef9c61f8c49f	847
Kojto	136:ef9c61f8c49f	848	/**
Kojto	136:ef9c61f8c49f	849	* @brief HELPER macro calculating the prescaler value to achieve the required counter clock frequency.
Kojto	136:ef9c61f8c49f	850	* @note ex: @ref __LL_TIM_CALC_PSC (80000000, 1000000);
Kojto	136:ef9c61f8c49f	851	* @param __TIMCLK__ timer input clock frequency (in Hz)
Kojto	136:ef9c61f8c49f	852	* @param __CNTCLK__ counter clock frequency (in Hz)
Kojto	136:ef9c61f8c49f	853	* @retval Prescaler value (between Min_Data=0 and Max_Data=65535)
Kojto	136:ef9c61f8c49f	854	*/
Kojto	136:ef9c61f8c49f	855	#define __LL_TIM_CALC_PSC(__TIMCLK__, __CNTCLK__) \
Kojto	136:ef9c61f8c49f	856	((__TIMCLK__) >= (__CNTCLK__)) ? (uint32_t)((__TIMCLK__)/(__CNTCLK__) - 1U) : 0U
Kojto	136:ef9c61f8c49f	857
Kojto	136:ef9c61f8c49f	858	/**
Kojto	136:ef9c61f8c49f	859	* @brief HELPER macro calculating the auto-reload value to achieve the required output signal frequency.
Kojto	136:ef9c61f8c49f	860	* @note ex: @ref __LL_TIM_CALC_ARR (1000000, @ref LL_TIM_GetPrescaler (), 10000);
Kojto	136:ef9c61f8c49f	861	* @param __TIMCLK__ timer input clock frequency (in Hz)
Kojto	136:ef9c61f8c49f	862	* @param __PSC__ prescaler
Kojto	136:ef9c61f8c49f	863	* @param __FREQ__ output signal frequency (in Hz)
Kojto	136:ef9c61f8c49f	864	* @retval Auto-reload value (between Min_Data=0 and Max_Data=65535)
Kojto	136:ef9c61f8c49f	865	*/
Kojto	136:ef9c61f8c49f	866	#define __LL_TIM_CALC_ARR(__TIMCLK__, __PSC__, __FREQ__) \
Kojto	136:ef9c61f8c49f	867	(((__TIMCLK__)/((__PSC__) + 1U)) >= (__FREQ__)) ? ((__TIMCLK__)/((__FREQ__) * ((__PSC__) + 1U)) - 1U) : 0U
Kojto	136:ef9c61f8c49f	868
Kojto	136:ef9c61f8c49f	869	/**
Kojto	136:ef9c61f8c49f	870	* @brief HELPER macro calculating the compare value required to achieve the required timer output compare active/inactive delay.
Kojto	136:ef9c61f8c49f	871	* @note ex: @ref __LL_TIM_CALC_DELAY (1000000, @ref LL_TIM_GetPrescaler (), 10);
Kojto	136:ef9c61f8c49f	872	* @param __TIMCLK__ timer input clock frequency (in Hz)
Kojto	136:ef9c61f8c49f	873	* @param __PSC__ prescaler
Kojto	136:ef9c61f8c49f	874	* @param __DELAY__ timer output compare active/inactive delay (in us)
Kojto	136:ef9c61f8c49f	875	* @retval Compare value (between Min_Data=0 and Max_Data=65535)
Kojto	136:ef9c61f8c49f	876	*/
Kojto	136:ef9c61f8c49f	877	#define __LL_TIM_CALC_DELAY(__TIMCLK__, __PSC__, __DELAY__) \
Kojto	136:ef9c61f8c49f	878	((uint32_t)(((uint64_t)(__TIMCLK__) * (uint64_t)(__DELAY__)) \
Kojto	136:ef9c61f8c49f	879	/ ((uint64_t)1000000U * (uint64_t)((__PSC__) + 1U))))
Kojto	136:ef9c61f8c49f	880
Kojto	136:ef9c61f8c49f	881	/**
Kojto	136:ef9c61f8c49f	882	* @brief HELPER macro calculating the auto-reload value to achieve the required pulse duration (when the timer operates in one pulse mode).
Kojto	136:ef9c61f8c49f	883	* @note ex: @ref __LL_TIM_CALC_PULSE (1000000, @ref LL_TIM_GetPrescaler (), 10, 20);
Kojto	136:ef9c61f8c49f	884	* @param __TIMCLK__ timer input clock frequency (in Hz)
Kojto	136:ef9c61f8c49f	885	* @param __PSC__ prescaler
Kojto	136:ef9c61f8c49f	886	* @param __DELAY__ timer output compare active/inactive delay (in us)
Kojto	136:ef9c61f8c49f	887	* @param __PULSE__ pulse duration (in us)
Kojto	136:ef9c61f8c49f	888	* @retval Auto-reload value (between Min_Data=0 and Max_Data=65535)
Kojto	136:ef9c61f8c49f	889	*/
Kojto	136:ef9c61f8c49f	890	#define __LL_TIM_CALC_PULSE(__TIMCLK__, __PSC__, __DELAY__, __PULSE__) \
Kojto	136:ef9c61f8c49f	891	((uint32_t)(__LL_TIM_CALC_DELAY((__TIMCLK__), (__PSC__), (__PULSE__)) \
Kojto	136:ef9c61f8c49f	892	+ __LL_TIM_CALC_DELAY((__TIMCLK__), (__PSC__), (__DELAY__))))
Kojto	136:ef9c61f8c49f	893
Kojto	136:ef9c61f8c49f	894	/**
Kojto	136:ef9c61f8c49f	895	* @brief HELPER macro retrieving the ratio of the input capture prescaler
Kojto	136:ef9c61f8c49f	896	* @note ex: @ref __LL_TIM_GET_ICPSC_RATIO (@ref LL_TIM_IC_GetPrescaler ());
Kojto	136:ef9c61f8c49f	897	* @param __ICPSC__ This parameter can be one of the following values:
Kojto	136:ef9c61f8c49f	898	* @arg @ref LL_TIM_ICPSC_DIV1
Kojto	136:ef9c61f8c49f	899	* @arg @ref LL_TIM_ICPSC_DIV2
Kojto	136:ef9c61f8c49f	900	* @arg @ref LL_TIM_ICPSC_DIV4
Kojto	136:ef9c61f8c49f	901	* @arg @ref LL_TIM_ICPSC_DIV8
Kojto	136:ef9c61f8c49f	902	* @retval Input capture prescaler ratio (1, 2, 4 or 8)
Kojto	136:ef9c61f8c49f	903	*/
Kojto	136:ef9c61f8c49f	904	#define __LL_TIM_GET_ICPSC_RATIO(__ICPSC__) \
Kojto	136:ef9c61f8c49f	905	((uint32_t)((uint32_t)0x01U << (((__ICPSC__) >> 16U) >> TIM_POSITION_ICPSC)))
Kojto	136:ef9c61f8c49f	906
Kojto	136:ef9c61f8c49f	907
Kojto	136:ef9c61f8c49f	908	/**
Kojto	136:ef9c61f8c49f	909	* @}
Kojto	136:ef9c61f8c49f	910	*/
Kojto	136:ef9c61f8c49f	911
Kojto	136:ef9c61f8c49f	912
Kojto	136:ef9c61f8c49f	913	/**
Kojto	136:ef9c61f8c49f	914	* @}
Kojto	136:ef9c61f8c49f	915	*/
Kojto	136:ef9c61f8c49f	916
Kojto	136:ef9c61f8c49f	917	/* Exported functions --------------------------------------------------------*/
Kojto	136:ef9c61f8c49f	918	/** @defgroup TIM_LL_Exported_Functions TIM Exported Functions
Kojto	136:ef9c61f8c49f	919	* @{
Kojto	136:ef9c61f8c49f	920	*/
Kojto	136:ef9c61f8c49f	921
Kojto	136:ef9c61f8c49f	922	/** @defgroup TIM_LL_EF_Time_Base Time Base configuration
Kojto	136:ef9c61f8c49f	923	* @{
Kojto	136:ef9c61f8c49f	924	*/
Kojto	136:ef9c61f8c49f	925	/**
Kojto	136:ef9c61f8c49f	926	* @brief Enable timer counter.
Kojto	136:ef9c61f8c49f	927	* @rmtoll CR1 CEN LL_TIM_EnableCounter
Kojto	136:ef9c61f8c49f	928	* @param TIMx Timer instance
Kojto	136:ef9c61f8c49f	929	* @retval None
Kojto	136:ef9c61f8c49f	930	*/
Kojto	136:ef9c61f8c49f	931	__STATIC_INLINE void LL_TIM_EnableCounter(TIM_TypeDef * TIMx)
Kojto	136:ef9c61f8c49f	932	{
Kojto	136:ef9c61f8c49f	933	SET_BIT(TIMx->CR1, TIM_CR1_CEN);
Kojto	136:ef9c61f8c49f	934	}
Kojto	136:ef9c61f8c49f	935
Kojto	136:ef9c61f8c49f	936	/**
Kojto	136:ef9c61f8c49f	937	* @brief Disable timer counter.
Kojto	136:ef9c61f8c49f	938	* @rmtoll CR1 CEN LL_TIM_DisableCounter
Kojto	136:ef9c61f8c49f	939	* @param TIMx Timer instance
Kojto	136:ef9c61f8c49f	940	* @retval None
Kojto	136:ef9c61f8c49f	941	*/
Kojto	136:ef9c61f8c49f	942	__STATIC_INLINE void LL_TIM_DisableCounter(TIM_TypeDef * TIMx)
Kojto	136:ef9c61f8c49f	943	{
Kojto	136:ef9c61f8c49f	944	CLEAR_BIT(TIMx->CR1, TIM_CR1_CEN);
Kojto	136:ef9c61f8c49f	945	}
Kojto	136:ef9c61f8c49f	946
Kojto	136:ef9c61f8c49f	947	/**
Kojto	136:ef9c61f8c49f	948	* @brief Indicates whether the timer counter is enabled.
Kojto	136:ef9c61f8c49f	949	* @rmtoll CR1 CEN LL_TIM_IsEnabledCounter
Kojto	136:ef9c61f8c49f	950	* @param TIMx Timer instance
Kojto	136:ef9c61f8c49f	951	* @retval State of bit (1 or 0).
Kojto	136:ef9c61f8c49f	952	*/
Kojto	136:ef9c61f8c49f	953	__STATIC_INLINE uint32_t LL_TIM_IsEnabledCounter(TIM_TypeDef * TIMx)
Kojto	136:ef9c61f8c49f	954	{
Kojto	136:ef9c61f8c49f	955	return (READ_BIT(TIMx->CR1, TIM_CR1_CEN) == (TIM_CR1_CEN));
Kojto	136:ef9c61f8c49f	956	}
Kojto	136:ef9c61f8c49f	957
Kojto	136:ef9c61f8c49f	958	/**
Kojto	136:ef9c61f8c49f	959	* @brief Enable update event generation.
Kojto	136:ef9c61f8c49f	960	* @rmtoll CR1 UDIS LL_TIM_EnableUpdateEvent
Kojto	136:ef9c61f8c49f	961	* @param TIMx Timer instance
Kojto	136:ef9c61f8c49f	962	* @retval None
Kojto	136:ef9c61f8c49f	963	*/
Kojto	136:ef9c61f8c49f	964	__STATIC_INLINE void LL_TIM_EnableUpdateEvent(TIM_TypeDef * TIMx)
Kojto	136:ef9c61f8c49f	965	{
Kojto	136:ef9c61f8c49f	966	SET_BIT(TIMx->CR1, TIM_CR1_UDIS);
Kojto	136:ef9c61f8c49f	967	}
Kojto	136:ef9c61f8c49f	968
Kojto	136:ef9c61f8c49f	969	/**
Kojto	136:ef9c61f8c49f	970	* @brief Disable update event generation.
Kojto	136:ef9c61f8c49f	971	* @rmtoll CR1 UDIS LL_TIM_DisableUpdateEvent
Kojto	136:ef9c61f8c49f	972	* @param TIMx Timer instance
Kojto	136:ef9c61f8c49f	973	* @retval None
Kojto	136:ef9c61f8c49f	974	*/
Kojto	136:ef9c61f8c49f	975	__STATIC_INLINE void LL_TIM_DisableUpdateEvent(TIM_TypeDef * TIMx)
Kojto	136:ef9c61f8c49f	976	{
Kojto	136:ef9c61f8c49f	977	CLEAR_BIT(TIMx->CR1, TIM_CR1_UDIS);
Kojto	136:ef9c61f8c49f	978	}
Kojto	136:ef9c61f8c49f	979
Kojto	136:ef9c61f8c49f	980	/**
Kojto	136:ef9c61f8c49f	981	* @brief Indicates whether update event generation is enabled.
Kojto	136:ef9c61f8c49f	982	* @rmtoll CR1 UDIS LL_TIM_IsEnabledUpdateEvent
Kojto	136:ef9c61f8c49f	983	* @param TIMx Timer instance
Kojto	136:ef9c61f8c49f	984	* @retval State of bit (1 or 0).
Kojto	136:ef9c61f8c49f	985	*/
Kojto	136:ef9c61f8c49f	986	__STATIC_INLINE uint32_t LL_TIM_IsEnabledUpdateEvent(TIM_TypeDef * TIMx)
Kojto	136:ef9c61f8c49f	987	{
Kojto	136:ef9c61f8c49f	988	return (READ_BIT(TIMx->CR1, TIM_CR1_UDIS) == (TIM_CR1_UDIS));
Kojto	136:ef9c61f8c49f	989	}
Kojto	136:ef9c61f8c49f	990
Kojto	136:ef9c61f8c49f	991	/**
Kojto	136:ef9c61f8c49f	992	* @brief Set update event source
Kojto	136:ef9c61f8c49f	993	* @note Update event source set to LL_TIM_UPDATESOURCE_REGULAR: any of the following events
Kojto	136:ef9c61f8c49f	994	* generate an update interrupt or DMA request if enabled:
Kojto	136:ef9c61f8c49f	995	* - Counter overflow/underflow
Kojto	136:ef9c61f8c49f	996	* - Setting the UG bit
Kojto	136:ef9c61f8c49f	997	* - Update generation through the slave mode controller
Kojto	136:ef9c61f8c49f	998	* @note Update event source set to LL_TIM_UPDATESOURCE_COUNTER: only counter
Kojto	136:ef9c61f8c49f	999	* overflow/underflow generates an update interrupt or DMA request if enabled.
Kojto	136:ef9c61f8c49f	1000	* @rmtoll CR1 URS LL_TIM_SetUpdateSource
Kojto	136:ef9c61f8c49f	1001	* @param TIMx Timer instance
Kojto	136:ef9c61f8c49f	1002	* @param UpdateSource This parameter can be one of the following values:
Kojto	136:ef9c61f8c49f	1003	* @arg @ref LL_TIM_UPDATESOURCE_REGULAR
Kojto	136:ef9c61f8c49f	1004	* @arg @ref LL_TIM_UPDATESOURCE_COUNTER
Kojto	136:ef9c61f8c49f	1005	* @retval None
Kojto	136:ef9c61f8c49f	1006	*/
Kojto	136:ef9c61f8c49f	1007	__STATIC_INLINE void LL_TIM_SetUpdateSource(TIM_TypeDef * TIMx, uint32_t UpdateSource)
Kojto	136:ef9c61f8c49f	1008	{
Kojto	136:ef9c61f8c49f	1009	MODIFY_REG(TIMx->CR1, TIM_CR1_URS, UpdateSource);
Kojto	136:ef9c61f8c49f	1010	}
Kojto	136:ef9c61f8c49f	1011
Kojto	136:ef9c61f8c49f	1012	/**
Kojto	136:ef9c61f8c49f	1013	* @brief Get actual event update source
Kojto	136:ef9c61f8c49f	1014	* @rmtoll CR1 URS LL_TIM_GetUpdateSource
Kojto	136:ef9c61f8c49f	1015	* @param TIMx Timer instance
Kojto	136:ef9c61f8c49f	1016	* @retval Returned value can be one of the following values:
Kojto	136:ef9c61f8c49f	1017	* @arg @ref LL_TIM_UPDATESOURCE_REGULAR
Kojto	136:ef9c61f8c49f	1018	* @arg @ref LL_TIM_UPDATESOURCE_COUNTER
Kojto	136:ef9c61f8c49f	1019	*/
Kojto	136:ef9c61f8c49f	1020	__STATIC_INLINE uint32_t LL_TIM_GetUpdateSource(TIM_TypeDef * TIMx)
Kojto	136:ef9c61f8c49f	1021	{
Kojto	136:ef9c61f8c49f	1022	return (uint32_t)(READ_BIT(TIMx->CR1, TIM_CR1_URS));
Kojto	136:ef9c61f8c49f	1023	}
Kojto	136:ef9c61f8c49f	1024
Kojto	136:ef9c61f8c49f	1025	/**
Kojto	136:ef9c61f8c49f	1026	* @brief Set one pulse mode (one shot v.s. repetitive).
Kojto	136:ef9c61f8c49f	1027	* @rmtoll CR1 OPM LL_TIM_SetOnePulseMode
Kojto	136:ef9c61f8c49f	1028	* @param TIMx Timer instance
Kojto	136:ef9c61f8c49f	1029	* @param OnePulseMode This parameter can be one of the following values:
Kojto	136:ef9c61f8c49f	1030	* @arg @ref LL_TIM_ONEPULSEMODE_SINGLE
Kojto	136:ef9c61f8c49f	1031	* @arg @ref LL_TIM_ONEPULSEMODE_REPETITIVE
Kojto	136:ef9c61f8c49f	1032	* @retval None
Kojto	136:ef9c61f8c49f	1033	*/
Kojto	136:ef9c61f8c49f	1034	__STATIC_INLINE void LL_TIM_SetOnePulseMode(TIM_TypeDef * TIMx, uint32_t OnePulseMode)
Kojto	136:ef9c61f8c49f	1035	{
Kojto	136:ef9c61f8c49f	1036	MODIFY_REG(TIMx->CR1, TIM_CR1_OPM, OnePulseMode);
Kojto	136:ef9c61f8c49f	1037	}
Kojto	136:ef9c61f8c49f	1038
Kojto	136:ef9c61f8c49f	1039	/**
Kojto	136:ef9c61f8c49f	1040	* @brief Get actual one pulse mode.
Kojto	136:ef9c61f8c49f	1041	* @rmtoll CR1 OPM LL_TIM_GetOnePulseMode
Kojto	136:ef9c61f8c49f	1042	* @param TIMx Timer instance
Kojto	136:ef9c61f8c49f	1043	* @retval Returned value can be one of the following values:
Kojto	136:ef9c61f8c49f	1044	* @arg @ref LL_TIM_ONEPULSEMODE_SINGLE
Kojto	136:ef9c61f8c49f	1045	* @arg @ref LL_TIM_ONEPULSEMODE_REPETITIVE
Kojto	136:ef9c61f8c49f	1046	*/
Kojto	136:ef9c61f8c49f	1047	__STATIC_INLINE uint32_t LL_TIM_GetOnePulseMode(TIM_TypeDef * TIMx)
Kojto	136:ef9c61f8c49f	1048	{
Kojto	136:ef9c61f8c49f	1049	return (uint32_t)(READ_BIT(TIMx->CR1, TIM_CR1_OPM));
Kojto	136:ef9c61f8c49f	1050	}
Kojto	136:ef9c61f8c49f	1051
Kojto	136:ef9c61f8c49f	1052	/**
Kojto	136:ef9c61f8c49f	1053	* @brief Set the timer counter counting mode.
Kojto	136:ef9c61f8c49f	1054	* @note Macro @ref IS_TIM_COUNTER_MODE_SELECT_INSTANCE(TIMx) can be used to
Kojto	136:ef9c61f8c49f	1055	* check whether or not the counter mode selection feature is supported
Kojto	136:ef9c61f8c49f	1056	* by a timer instance.
Kojto	136:ef9c61f8c49f	1057	* @rmtoll CR1 DIR LL_TIM_SetCounterMode\n
Kojto	136:ef9c61f8c49f	1058	* CR1 CMS LL_TIM_SetCounterMode
Kojto	136:ef9c61f8c49f	1059	* @param TIMx Timer instance
Kojto	136:ef9c61f8c49f	1060	* @param CounterMode This parameter can be one of the following values:
Kojto	136:ef9c61f8c49f	1061	* @arg @ref LL_TIM_COUNTERMODE_UP
Kojto	136:ef9c61f8c49f	1062	* @arg @ref LL_TIM_COUNTERMODE_DOWN
Kojto	136:ef9c61f8c49f	1063	* @arg @ref LL_TIM_COUNTERMODE_CENTER_UP
Kojto	136:ef9c61f8c49f	1064	* @arg @ref LL_TIM_COUNTERMODE_CENTER_DOWN
Kojto	136:ef9c61f8c49f	1065	* @arg @ref LL_TIM_COUNTERMODE_CENTER_UP_DOWN
Kojto	136:ef9c61f8c49f	1066	* @retval None
Kojto	136:ef9c61f8c49f	1067	*/
Kojto	136:ef9c61f8c49f	1068	__STATIC_INLINE void LL_TIM_SetCounterMode(TIM_TypeDef * TIMx, uint32_t CounterMode)
Kojto	136:ef9c61f8c49f	1069	{
Kojto	136:ef9c61f8c49f	1070	MODIFY_REG(TIMx->CR1, TIM_CR1_DIR \| TIM_CR1_CMS, CounterMode);
Kojto	136:ef9c61f8c49f	1071	}
Kojto	136:ef9c61f8c49f	1072
Kojto	136:ef9c61f8c49f	1073	/**
Kojto	136:ef9c61f8c49f	1074	* @brief Get actual counter mode.
Kojto	136:ef9c61f8c49f	1075	* @note Macro @ref IS_TIM_COUNTER_MODE_SELECT_INSTANCE(TIMx) can be used to
Kojto	136:ef9c61f8c49f	1076	* check whether or not the counter mode selection feature is supported
Kojto	136:ef9c61f8c49f	1077	* by a timer instance.
Kojto	136:ef9c61f8c49f	1078	* @rmtoll CR1 DIR LL_TIM_GetCounterMode\n
Kojto	136:ef9c61f8c49f	1079	* CR1 CMS LL_TIM_GetCounterMode
Kojto	136:ef9c61f8c49f	1080	* @param TIMx Timer instance
Kojto	136:ef9c61f8c49f	1081	* @retval Returned value can be one of the following values:
Kojto	136:ef9c61f8c49f	1082	* @arg @ref LL_TIM_COUNTERMODE_UP
Kojto	136:ef9c61f8c49f	1083	* @arg @ref LL_TIM_COUNTERMODE_DOWN
Kojto	136:ef9c61f8c49f	1084	* @arg @ref LL_TIM_COUNTERMODE_CENTER_UP
Kojto	136:ef9c61f8c49f	1085	* @arg @ref LL_TIM_COUNTERMODE_CENTER_DOWN
Kojto	136:ef9c61f8c49f	1086	* @arg @ref LL_TIM_COUNTERMODE_CENTER_UP_DOWN
Kojto	136:ef9c61f8c49f	1087	*/
Kojto	136:ef9c61f8c49f	1088	__STATIC_INLINE uint32_t LL_TIM_GetCounterMode(TIM_TypeDef * TIMx)
Kojto	136:ef9c61f8c49f	1089	{
Kojto	136:ef9c61f8c49f	1090	return (uint32_t)(READ_BIT(TIMx->CR1, TIM_CR1_DIR \| TIM_CR1_CMS));
Kojto	136:ef9c61f8c49f	1091	}
Kojto	136:ef9c61f8c49f	1092
Kojto	136:ef9c61f8c49f	1093	/**
Kojto	136:ef9c61f8c49f	1094	* @brief Enable auto-reload (ARR) preload.
Kojto	136:ef9c61f8c49f	1095	* @rmtoll CR1 ARPE LL_TIM_EnableARRPreload
Kojto	136:ef9c61f8c49f	1096	* @param TIMx Timer instance
Kojto	136:ef9c61f8c49f	1097	* @retval None
Kojto	136:ef9c61f8c49f	1098	*/
Kojto	136:ef9c61f8c49f	1099	__STATIC_INLINE void LL_TIM_EnableARRPreload(TIM_TypeDef * TIMx)
Kojto	136:ef9c61f8c49f	1100	{
Kojto	136:ef9c61f8c49f	1101	SET_BIT(TIMx->CR1, TIM_CR1_ARPE);
Kojto	136:ef9c61f8c49f	1102	}
Kojto	136:ef9c61f8c49f	1103
Kojto	136:ef9c61f8c49f	1104	/**
Kojto	136:ef9c61f8c49f	1105	* @brief Disable auto-reload (ARR) preload.
Kojto	136:ef9c61f8c49f	1106	* @rmtoll CR1 ARPE LL_TIM_DisableARRPreload
Kojto	136:ef9c61f8c49f	1107	* @param TIMx Timer instance
Kojto	136:ef9c61f8c49f	1108	* @retval None
Kojto	136:ef9c61f8c49f	1109	*/
Kojto	136:ef9c61f8c49f	1110	__STATIC_INLINE void LL_TIM_DisableARRPreload(TIM_TypeDef * TIMx)
Kojto	136:ef9c61f8c49f	1111	{
Kojto	136:ef9c61f8c49f	1112	CLEAR_BIT(TIMx->CR1, TIM_CR1_ARPE);
Kojto	136:ef9c61f8c49f	1113	}
Kojto	136:ef9c61f8c49f	1114
Kojto	136:ef9c61f8c49f	1115	/**
Kojto	136:ef9c61f8c49f	1116	* @brief Indicates whether auto-reload (ARR) preload is enabled.
Kojto	136:ef9c61f8c49f	1117	* @rmtoll CR1 ARPE LL_TIM_IsEnabledARRPreload
Kojto	136:ef9c61f8c49f	1118	* @param TIMx Timer instance
Kojto	136:ef9c61f8c49f	1119	* @retval State of bit (1 or 0).
Kojto	136:ef9c61f8c49f	1120	*/
Kojto	136:ef9c61f8c49f	1121	__STATIC_INLINE uint32_t LL_TIM_IsEnabledARRPreload(TIM_TypeDef * TIMx)
Kojto	136:ef9c61f8c49f	1122	{
Kojto	136:ef9c61f8c49f	1123	return (READ_BIT(TIMx->CR1, TIM_CR1_ARPE) == (TIM_CR1_ARPE));
Kojto	136:ef9c61f8c49f	1124	}
Kojto	136:ef9c61f8c49f	1125
Kojto	136:ef9c61f8c49f	1126	/**
Kojto	136:ef9c61f8c49f	1127	* @brief Set the division ratio between the timer clock and the sampling clock used by the dead-time generators (when supported) and the digital filters.
Kojto	136:ef9c61f8c49f	1128	* @note Macro @ref IS_TIM_CLOCK_DIVISION_INSTANCE(TIMx) can be used to check
Kojto	136:ef9c61f8c49f	1129	* whether or not the clock division feature is supported by the timer
Kojto	136:ef9c61f8c49f	1130	* instance.
Kojto	136:ef9c61f8c49f	1131	* @rmtoll CR1 CKD LL_TIM_SetClockDivision
Kojto	136:ef9c61f8c49f	1132	* @param TIMx Timer instance
Kojto	136:ef9c61f8c49f	1133	* @param ClockDivision This parameter can be one of the following values:
Kojto	136:ef9c61f8c49f	1134	* @arg @ref LL_TIM_CLOCKDIVISION_DIV1
Kojto	136:ef9c61f8c49f	1135	* @arg @ref LL_TIM_CLOCKDIVISION_DIV2
Kojto	136:ef9c61f8c49f	1136	* @arg @ref LL_TIM_CLOCKDIVISION_DIV4
Kojto	136:ef9c61f8c49f	1137	* @retval None
Kojto	136:ef9c61f8c49f	1138	*/
Kojto	136:ef9c61f8c49f	1139	__STATIC_INLINE void LL_TIM_SetClockDivision(TIM_TypeDef * TIMx, uint32_t ClockDivision)
Kojto	136:ef9c61f8c49f	1140	{
Kojto	136:ef9c61f8c49f	1141	MODIFY_REG(TIMx->CR1, TIM_CR1_CKD, ClockDivision);
Kojto	136:ef9c61f8c49f	1142	}
Kojto	136:ef9c61f8c49f	1143
Kojto	136:ef9c61f8c49f	1144	/**
Kojto	136:ef9c61f8c49f	1145	* @brief Get the actual division ratio between the timer clock and the sampling clock used by the dead-time generators (when supported) and the digital filters.
Kojto	136:ef9c61f8c49f	1146	* @note Macro @ref IS_TIM_CLOCK_DIVISION_INSTANCE(TIMx) can be used to check
Kojto	136:ef9c61f8c49f	1147	* whether or not the clock division feature is supported by the timer
Kojto	136:ef9c61f8c49f	1148	* instance.
Kojto	136:ef9c61f8c49f	1149	* @rmtoll CR1 CKD LL_TIM_GetClockDivision
Kojto	136:ef9c61f8c49f	1150	* @param TIMx Timer instance
Kojto	136:ef9c61f8c49f	1151	* @retval Returned value can be one of the following values:
Kojto	136:ef9c61f8c49f	1152	* @arg @ref LL_TIM_CLOCKDIVISION_DIV1
Kojto	136:ef9c61f8c49f	1153	* @arg @ref LL_TIM_CLOCKDIVISION_DIV2
Kojto	136:ef9c61f8c49f	1154	* @arg @ref LL_TIM_CLOCKDIVISION_DIV4
Kojto	136:ef9c61f8c49f	1155	*/
Kojto	136:ef9c61f8c49f	1156	__STATIC_INLINE uint32_t LL_TIM_GetClockDivision(TIM_TypeDef * TIMx)
Kojto	136:ef9c61f8c49f	1157	{
Kojto	136:ef9c61f8c49f	1158	return (uint32_t)(READ_BIT(TIMx->CR1, TIM_CR1_CKD));
Kojto	136:ef9c61f8c49f	1159	}
Kojto	136:ef9c61f8c49f	1160
Kojto	136:ef9c61f8c49f	1161	/**
Kojto	136:ef9c61f8c49f	1162	* @brief Set the counter value.
Kojto	136:ef9c61f8c49f	1163	* @rmtoll CNT CNT LL_TIM_SetCounter
Kojto	136:ef9c61f8c49f	1164	* @param TIMx Timer instance
Kojto	136:ef9c61f8c49f	1165	* @param Counter Counter value (between Min_Data=0 and Max_Data=0xFFFF)
Kojto	136:ef9c61f8c49f	1166	* @retval None
Kojto	136:ef9c61f8c49f	1167	*/
Kojto	136:ef9c61f8c49f	1168	__STATIC_INLINE void LL_TIM_SetCounter(TIM_TypeDef * TIMx, uint32_t Counter)
Kojto	136:ef9c61f8c49f	1169	{
Kojto	136:ef9c61f8c49f	1170	WRITE_REG(TIMx->CNT, Counter);
Kojto	136:ef9c61f8c49f	1171	}
Kojto	136:ef9c61f8c49f	1172
Kojto	136:ef9c61f8c49f	1173	/**
Kojto	136:ef9c61f8c49f	1174	* @brief Get the counter value.
Kojto	136:ef9c61f8c49f	1175	* @rmtoll CNT CNT LL_TIM_GetCounter
Kojto	136:ef9c61f8c49f	1176	* @param TIMx Timer instance
Kojto	136:ef9c61f8c49f	1177	* @retval Counter value (between Min_Data=0 and Max_Data=0xFFFF)
Kojto	136:ef9c61f8c49f	1178	*/
Kojto	136:ef9c61f8c49f	1179	__STATIC_INLINE uint32_t LL_TIM_GetCounter(TIM_TypeDef * TIMx)
Kojto	136:ef9c61f8c49f	1180	{
Kojto	136:ef9c61f8c49f	1181	return (uint32_t)(READ_REG(TIMx->CNT));
Kojto	136:ef9c61f8c49f	1182	}
Kojto	136:ef9c61f8c49f	1183
Kojto	136:ef9c61f8c49f	1184	/**
Kojto	136:ef9c61f8c49f	1185	* @brief Get the current direction of the counter
Kojto	136:ef9c61f8c49f	1186	* @rmtoll CR1 DIR LL_TIM_GetDirection
Kojto	136:ef9c61f8c49f	1187	* @param TIMx Timer instance
Kojto	136:ef9c61f8c49f	1188	* @retval Returned value can be one of the following values:
Kojto	136:ef9c61f8c49f	1189	* @arg @ref LL_TIM_COUNTERDIRECTION_UP
Kojto	136:ef9c61f8c49f	1190	* @arg @ref LL_TIM_COUNTERDIRECTION_DOWN
Kojto	136:ef9c61f8c49f	1191	*/
Kojto	136:ef9c61f8c49f	1192	__STATIC_INLINE uint32_t LL_TIM_GetDirection(TIM_TypeDef * TIMx)
Kojto	136:ef9c61f8c49f	1193	{
Kojto	136:ef9c61f8c49f	1194	return (uint32_t)(READ_BIT(TIMx->CR1, TIM_CR1_DIR));
Kojto	136:ef9c61f8c49f	1195	}
Kojto	136:ef9c61f8c49f	1196
Kojto	136:ef9c61f8c49f	1197	/**
Kojto	136:ef9c61f8c49f	1198	* @brief Set the prescaler value.
Kojto	136:ef9c61f8c49f	1199	* @note The counter clock frequency CK_CNT is equal to fCK_PSC / (PSC[15:0] + 1).
Kojto	136:ef9c61f8c49f	1200	* @note The prescaler can be changed on the fly as this control register is buffered. The new
Kojto	136:ef9c61f8c49f	1201	* prescaler ratio is taken into account at the next update event.
Kojto	136:ef9c61f8c49f	1202	* @note Helper macro @ref __LL_TIM_CALC_PSC can be used to calculate the Prescaler parameter
Kojto	136:ef9c61f8c49f	1203	* @rmtoll PSC PSC LL_TIM_SetPrescaler
Kojto	136:ef9c61f8c49f	1204	* @param TIMx Timer instance
Kojto	136:ef9c61f8c49f	1205	* @param Prescaler between Min_Data=0 and Max_Data=65535
Kojto	136:ef9c61f8c49f	1206	* @retval None
Kojto	136:ef9c61f8c49f	1207	*/
Kojto	136:ef9c61f8c49f	1208	__STATIC_INLINE void LL_TIM_SetPrescaler(TIM_TypeDef * TIMx, uint32_t Prescaler)
Kojto	136:ef9c61f8c49f	1209	{
Kojto	136:ef9c61f8c49f	1210	WRITE_REG(TIMx->PSC, Prescaler);
Kojto	136:ef9c61f8c49f	1211	}
Kojto	136:ef9c61f8c49f	1212
Kojto	136:ef9c61f8c49f	1213	/**
Kojto	136:ef9c61f8c49f	1214	* @brief Get the prescaler value.
Kojto	136:ef9c61f8c49f	1215	* @rmtoll PSC PSC LL_TIM_GetPrescaler
Kojto	136:ef9c61f8c49f	1216	* @param TIMx Timer instance
Kojto	136:ef9c61f8c49f	1217	* @retval Prescaler value between Min_Data=0 and Max_Data=65535
Kojto	136:ef9c61f8c49f	1218	*/
Kojto	136:ef9c61f8c49f	1219	__STATIC_INLINE uint32_t LL_TIM_GetPrescaler(TIM_TypeDef * TIMx)
Kojto	136:ef9c61f8c49f	1220	{
Kojto	136:ef9c61f8c49f	1221	return (uint32_t)(READ_REG(TIMx->PSC));
Kojto	136:ef9c61f8c49f	1222	}
Kojto	136:ef9c61f8c49f	1223
Kojto	136:ef9c61f8c49f	1224	/**
Kojto	136:ef9c61f8c49f	1225	* @brief Set the auto-reload value.
Kojto	136:ef9c61f8c49f	1226	* @note The counter is blocked while the auto-reload value is null.
Kojto	136:ef9c61f8c49f	1227	* @note Helper macro @ref __LL_TIM_CALC_ARR can be used to calculate the AutoReload parameter
Kojto	136:ef9c61f8c49f	1228	* @rmtoll ARR ARR LL_TIM_SetAutoReload
Kojto	136:ef9c61f8c49f	1229	* @param TIMx Timer instance
Kojto	136:ef9c61f8c49f	1230	* @param AutoReload between Min_Data=0 and Max_Data=65535
Kojto	136:ef9c61f8c49f	1231	* @retval None
Kojto	136:ef9c61f8c49f	1232	*/
Kojto	136:ef9c61f8c49f	1233	__STATIC_INLINE void LL_TIM_SetAutoReload(TIM_TypeDef * TIMx, uint32_t AutoReload)
Kojto	136:ef9c61f8c49f	1234	{
Kojto	136:ef9c61f8c49f	1235	WRITE_REG(TIMx->ARR, AutoReload);
Kojto	136:ef9c61f8c49f	1236	}
Kojto	136:ef9c61f8c49f	1237
Kojto	136:ef9c61f8c49f	1238	/**
Kojto	136:ef9c61f8c49f	1239	* @brief Get the auto-reload value.
Kojto	136:ef9c61f8c49f	1240	* @rmtoll ARR ARR LL_TIM_GetAutoReload
Kojto	136:ef9c61f8c49f	1241	* @param TIMx Timer instance
Kojto	136:ef9c61f8c49f	1242	* @retval Auto-reload value
Kojto	136:ef9c61f8c49f	1243	*/
Kojto	136:ef9c61f8c49f	1244	__STATIC_INLINE uint32_t LL_TIM_GetAutoReload(TIM_TypeDef * TIMx)
Kojto	136:ef9c61f8c49f	1245	{
Kojto	136:ef9c61f8c49f	1246	return (uint32_t)(READ_REG(TIMx->ARR));
Kojto	136:ef9c61f8c49f	1247	}
Kojto	136:ef9c61f8c49f	1248
Kojto	136:ef9c61f8c49f	1249
Kojto	136:ef9c61f8c49f	1250
Kojto	136:ef9c61f8c49f	1251	/**
Kojto	136:ef9c61f8c49f	1252	* @}
Kojto	136:ef9c61f8c49f	1253	*/
Kojto	136:ef9c61f8c49f	1254
Kojto	136:ef9c61f8c49f	1255	/** @defgroup TIM_LL_EF_Capture_Compare Capture Compare configuration
Kojto	136:ef9c61f8c49f	1256	* @{
Kojto	136:ef9c61f8c49f	1257	*/
Kojto	136:ef9c61f8c49f	1258
Kojto	136:ef9c61f8c49f	1259	/**
Kojto	136:ef9c61f8c49f	1260	* @brief Set the trigger of the capture/compare DMA request.
Kojto	136:ef9c61f8c49f	1261	* @rmtoll CR2 CCDS LL_TIM_CC_SetDMAReqTrigger
Kojto	136:ef9c61f8c49f	1262	* @param TIMx Timer instance
Kojto	136:ef9c61f8c49f	1263	* @param DMAReqTrigger This parameter can be one of the following values:
Kojto	136:ef9c61f8c49f	1264	* @arg @ref LL_TIM_CCDMAREQUEST_CC
Kojto	136:ef9c61f8c49f	1265	* @arg @ref LL_TIM_CCDMAREQUEST_UPDATE
Kojto	136:ef9c61f8c49f	1266	* @retval None
Kojto	136:ef9c61f8c49f	1267	*/
Kojto	136:ef9c61f8c49f	1268	__STATIC_INLINE void LL_TIM_CC_SetDMAReqTrigger(TIM_TypeDef * TIMx, uint32_t DMAReqTrigger)
Kojto	136:ef9c61f8c49f	1269	{
Kojto	136:ef9c61f8c49f	1270	MODIFY_REG(TIMx->CR2, TIM_CR2_CCDS, DMAReqTrigger);
Kojto	136:ef9c61f8c49f	1271	}
Kojto	136:ef9c61f8c49f	1272
Kojto	136:ef9c61f8c49f	1273	/**
Kojto	136:ef9c61f8c49f	1274	* @brief Get actual trigger of the capture/compare DMA request.
Kojto	136:ef9c61f8c49f	1275	* @rmtoll CR2 CCDS LL_TIM_CC_GetDMAReqTrigger
Kojto	136:ef9c61f8c49f	1276	* @param TIMx Timer instance
Kojto	136:ef9c61f8c49f	1277	* @retval Returned value can be one of the following values:
Kojto	136:ef9c61f8c49f	1278	* @arg @ref LL_TIM_CCDMAREQUEST_CC
Kojto	136:ef9c61f8c49f	1279	* @arg @ref LL_TIM_CCDMAREQUEST_UPDATE
Kojto	136:ef9c61f8c49f	1280	*/
Kojto	136:ef9c61f8c49f	1281	__STATIC_INLINE uint32_t LL_TIM_CC_GetDMAReqTrigger(TIM_TypeDef * TIMx)
Kojto	136:ef9c61f8c49f	1282	{
Kojto	136:ef9c61f8c49f	1283	return (uint32_t)(READ_BIT(TIMx->CR2, TIM_CR2_CCDS));
Kojto	136:ef9c61f8c49f	1284	}
Kojto	136:ef9c61f8c49f	1285
Kojto	136:ef9c61f8c49f	1286
Kojto	136:ef9c61f8c49f	1287	/**
Kojto	136:ef9c61f8c49f	1288	* @brief Enable capture/compare channels.
Kojto	136:ef9c61f8c49f	1289	* @rmtoll CCER CC1E LL_TIM_CC_EnableChannel\n
Kojto	136:ef9c61f8c49f	1290	* CCER CC2E LL_TIM_CC_EnableChannel\n
Kojto	136:ef9c61f8c49f	1291	* CCER CC3E LL_TIM_CC_EnableChannel\n
Kojto	136:ef9c61f8c49f	1292	* CCER CC4E LL_TIM_CC_EnableChannel
Kojto	136:ef9c61f8c49f	1293	* @param TIMx Timer instance
Kojto	136:ef9c61f8c49f	1294	* @param Channels This parameter can be a combination of the following values:
Kojto	136:ef9c61f8c49f	1295	* @arg @ref LL_TIM_CHANNEL_CH1
Kojto	136:ef9c61f8c49f	1296	* @arg @ref LL_TIM_CHANNEL_CH2
Kojto	136:ef9c61f8c49f	1297	* @arg @ref LL_TIM_CHANNEL_CH3
Kojto	136:ef9c61f8c49f	1298	* @arg @ref LL_TIM_CHANNEL_CH4
Kojto	136:ef9c61f8c49f	1299	* @retval None
Kojto	136:ef9c61f8c49f	1300	*/
Kojto	136:ef9c61f8c49f	1301	__STATIC_INLINE void LL_TIM_CC_EnableChannel(TIM_TypeDef * TIMx, uint32_t Channels)
Kojto	136:ef9c61f8c49f	1302	{
Kojto	136:ef9c61f8c49f	1303	SET_BIT(TIMx->CCER, Channels);
Kojto	136:ef9c61f8c49f	1304	}
Kojto	136:ef9c61f8c49f	1305
Kojto	136:ef9c61f8c49f	1306	/**
Kojto	136:ef9c61f8c49f	1307	* @brief Disable capture/compare channels.
Kojto	136:ef9c61f8c49f	1308	* @rmtoll CCER CC1E LL_TIM_CC_DisableChannel\n
Kojto	136:ef9c61f8c49f	1309	* CCER CC2E LL_TIM_CC_DisableChannel\n
Kojto	136:ef9c61f8c49f	1310	* CCER CC3E LL_TIM_CC_DisableChannel\n
Kojto	136:ef9c61f8c49f	1311	* CCER CC4E LL_TIM_CC_DisableChannel
Kojto	136:ef9c61f8c49f	1312	* @param TIMx Timer instance
Kojto	136:ef9c61f8c49f	1313	* @param Channels This parameter can be a combination of the following values:
Kojto	136:ef9c61f8c49f	1314	* @arg @ref LL_TIM_CHANNEL_CH1
Kojto	136:ef9c61f8c49f	1315	* @arg @ref LL_TIM_CHANNEL_CH2
Kojto	136:ef9c61f8c49f	1316	* @arg @ref LL_TIM_CHANNEL_CH3
Kojto	136:ef9c61f8c49f	1317	* @arg @ref LL_TIM_CHANNEL_CH4
Kojto	136:ef9c61f8c49f	1318	* @retval None
Kojto	136:ef9c61f8c49f	1319	*/
Kojto	136:ef9c61f8c49f	1320	__STATIC_INLINE void LL_TIM_CC_DisableChannel(TIM_TypeDef * TIMx, uint32_t Channels)
Kojto	136:ef9c61f8c49f	1321	{
Kojto	136:ef9c61f8c49f	1322	CLEAR_BIT(TIMx->CCER, Channels);
Kojto	136:ef9c61f8c49f	1323	}
Kojto	136:ef9c61f8c49f	1324
Kojto	136:ef9c61f8c49f	1325	/**
Kojto	136:ef9c61f8c49f	1326	* @brief Indicate whether channel(s) is(are) enabled.
Kojto	136:ef9c61f8c49f	1327	* @rmtoll CCER CC1E LL_TIM_CC_IsEnabledChannel\n
Kojto	136:ef9c61f8c49f	1328	* CCER CC2E LL_TIM_CC_IsEnabledChannel\n
Kojto	136:ef9c61f8c49f	1329	* CCER CC3E LL_TIM_CC_IsEnabledChannel\n
Kojto	136:ef9c61f8c49f	1330	* CCER CC4E LL_TIM_CC_IsEnabledChannel
Kojto	136:ef9c61f8c49f	1331	* @param TIMx Timer instance
Kojto	136:ef9c61f8c49f	1332	* @param Channels This parameter can be a combination of the following values:
Kojto	136:ef9c61f8c49f	1333	* @arg @ref LL_TIM_CHANNEL_CH1
Kojto	136:ef9c61f8c49f	1334	* @arg @ref LL_TIM_CHANNEL_CH2
Kojto	136:ef9c61f8c49f	1335	* @arg @ref LL_TIM_CHANNEL_CH3
Kojto	136:ef9c61f8c49f	1336	* @arg @ref LL_TIM_CHANNEL_CH4
Kojto	136:ef9c61f8c49f	1337	* @retval State of bit (1 or 0).
Kojto	136:ef9c61f8c49f	1338	*/
Kojto	136:ef9c61f8c49f	1339	__STATIC_INLINE uint32_t LL_TIM_CC_IsEnabledChannel(TIM_TypeDef * TIMx, uint32_t Channels)
Kojto	136:ef9c61f8c49f	1340	{
Kojto	136:ef9c61f8c49f	1341	return (READ_BIT(TIMx->CCER, Channels) == (Channels));
Kojto	136:ef9c61f8c49f	1342	}
Kojto	136:ef9c61f8c49f	1343
Kojto	136:ef9c61f8c49f	1344	/**
Kojto	136:ef9c61f8c49f	1345	* @}
Kojto	136:ef9c61f8c49f	1346	*/
Kojto	136:ef9c61f8c49f	1347
Kojto	136:ef9c61f8c49f	1348	/** @defgroup TIM_LL_EF_Output_Channel Output channel configuration
Kojto	136:ef9c61f8c49f	1349	* @{
Kojto	136:ef9c61f8c49f	1350	*/
Kojto	136:ef9c61f8c49f	1351	/**
Kojto	136:ef9c61f8c49f	1352	* @brief Configure an output channel.
Kojto	136:ef9c61f8c49f	1353	* @rmtoll CCMR1 CC1S LL_TIM_OC_ConfigOutput\n
Kojto	136:ef9c61f8c49f	1354	* CCMR1 CC2S LL_TIM_OC_ConfigOutput\n
Kojto	136:ef9c61f8c49f	1355	* CCMR2 CC3S LL_TIM_OC_ConfigOutput\n
Kojto	136:ef9c61f8c49f	1356	* CCMR2 CC4S LL_TIM_OC_ConfigOutput\n
Kojto	136:ef9c61f8c49f	1357	* CCER CC1P LL_TIM_OC_ConfigOutput\n
Kojto	136:ef9c61f8c49f	1358	* CCER CC2P LL_TIM_OC_ConfigOutput\n
Kojto	136:ef9c61f8c49f	1359	* CCER CC3P LL_TIM_OC_ConfigOutput\n
Kojto	136:ef9c61f8c49f	1360	* CCER CC4P LL_TIM_OC_ConfigOutput\n
Kojto	136:ef9c61f8c49f	1361	* @param TIMx Timer instance
Kojto	136:ef9c61f8c49f	1362	* @param Channel This parameter can be one of the following values:
Kojto	136:ef9c61f8c49f	1363	* @arg @ref LL_TIM_CHANNEL_CH1
Kojto	136:ef9c61f8c49f	1364	* @arg @ref LL_TIM_CHANNEL_CH2
Kojto	136:ef9c61f8c49f	1365	* @arg @ref LL_TIM_CHANNEL_CH3
Kojto	136:ef9c61f8c49f	1366	* @arg @ref LL_TIM_CHANNEL_CH4
Kojto	136:ef9c61f8c49f	1367	* @param Configuration This parameter must be a combination of all the following values:
Kojto	136:ef9c61f8c49f	1368	* @arg @ref LL_TIM_OCPOLARITY_HIGH or @ref LL_TIM_OCPOLARITY_LOW
Kojto	136:ef9c61f8c49f	1369	* @retval None
Kojto	136:ef9c61f8c49f	1370	*/
Kojto	136:ef9c61f8c49f	1371	__STATIC_INLINE void LL_TIM_OC_ConfigOutput(TIM_TypeDef * TIMx, uint32_t Channel, uint32_t Configuration)
Kojto	136:ef9c61f8c49f	1372	{
Kojto	136:ef9c61f8c49f	1373	register uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel);
Kojto	136:ef9c61f8c49f	1374	register uint32_t * pReg = (uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1)+ OFFSET_TAB_CCMRx[iChannel]));
Kojto	136:ef9c61f8c49f	1375	CLEAR_BIT(*pReg, (TIM_CCMR1_CC1S << SHIFT_TAB_OCxx[iChannel]));
Kojto	136:ef9c61f8c49f	1376	MODIFY_REG(TIMx->CCER, (TIM_CCER_CC1P << SHIFT_TAB_CCxP[iChannel]), (Configuration & TIM_CCER_CC1P) << SHIFT_TAB_CCxP[iChannel]);
Kojto	136:ef9c61f8c49f	1377	}
Kojto	136:ef9c61f8c49f	1378
Kojto	136:ef9c61f8c49f	1379	/**
Kojto	136:ef9c61f8c49f	1380	* @brief Define the behavior of the output reference signal OCxREF from which
Kojto	136:ef9c61f8c49f	1381	* OCx and OCxN (when relevant) are derived.
Kojto	136:ef9c61f8c49f	1382	* @rmtoll CCMR1 OC1M LL_TIM_OC_SetMode\n
Kojto	136:ef9c61f8c49f	1383	* CCMR1 OC2M LL_TIM_OC_SetMode\n
Kojto	136:ef9c61f8c49f	1384	* CCMR2 OC3M LL_TIM_OC_SetMode\n
Kojto	136:ef9c61f8c49f	1385	* CCMR2 OC4M LL_TIM_OC_SetMode
Kojto	136:ef9c61f8c49f	1386	* @param TIMx Timer instance
Kojto	136:ef9c61f8c49f	1387	* @param Channel This parameter can be one of the following values:
Kojto	136:ef9c61f8c49f	1388	* @arg @ref LL_TIM_CHANNEL_CH1
Kojto	136:ef9c61f8c49f	1389	* @arg @ref LL_TIM_CHANNEL_CH2
Kojto	136:ef9c61f8c49f	1390	* @arg @ref LL_TIM_CHANNEL_CH3
Kojto	136:ef9c61f8c49f	1391	* @arg @ref LL_TIM_CHANNEL_CH4
Kojto	136:ef9c61f8c49f	1392	* @param Mode This parameter can be one of the following values:
Kojto	136:ef9c61f8c49f	1393	* @arg @ref LL_TIM_OCMODE_FROZEN
Kojto	136:ef9c61f8c49f	1394	* @arg @ref LL_TIM_OCMODE_ACTIVE
Kojto	136:ef9c61f8c49f	1395	* @arg @ref LL_TIM_OCMODE_INACTIVE
Kojto	136:ef9c61f8c49f	1396	* @arg @ref LL_TIM_OCMODE_TOGGLE
Kojto	136:ef9c61f8c49f	1397	* @arg @ref LL_TIM_OCMODE_FORCED_INACTIVE
Kojto	136:ef9c61f8c49f	1398	* @arg @ref LL_TIM_OCMODE_FORCED_ACTIVE
Kojto	136:ef9c61f8c49f	1399	* @arg @ref LL_TIM_OCMODE_PWM1
Kojto	136:ef9c61f8c49f	1400	* @arg @ref LL_TIM_OCMODE_PWM2
Kojto	136:ef9c61f8c49f	1401	* @retval None
Kojto	136:ef9c61f8c49f	1402	*/
Kojto	136:ef9c61f8c49f	1403	__STATIC_INLINE void LL_TIM_OC_SetMode(TIM_TypeDef * TIMx, uint32_t Channel, uint32_t Mode)
Kojto	136:ef9c61f8c49f	1404	{
Kojto	136:ef9c61f8c49f	1405	register uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel);
Kojto	136:ef9c61f8c49f	1406	register uint32_t * pReg = (uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1)+ OFFSET_TAB_CCMRx[iChannel]));
Kojto	136:ef9c61f8c49f	1407	MODIFY_REG(*pReg, ((TIM_CCMR1_OC1M \| TIM_CCMR1_CC1S) << SHIFT_TAB_OCxx[iChannel]), Mode << SHIFT_TAB_OCxx[iChannel]);
Kojto	136:ef9c61f8c49f	1408	}
Kojto	136:ef9c61f8c49f	1409
Kojto	136:ef9c61f8c49f	1410	/**
Kojto	136:ef9c61f8c49f	1411	* @brief Get the output compare mode of an output channel.
Kojto	136:ef9c61f8c49f	1412	* @rmtoll CCMR1 OC1M LL_TIM_OC_GetMode\n
Kojto	136:ef9c61f8c49f	1413	* CCMR1 OC2M LL_TIM_OC_GetMode\n
Kojto	136:ef9c61f8c49f	1414	* CCMR2 OC3M LL_TIM_OC_GetMode\n
Kojto	136:ef9c61f8c49f	1415	* CCMR2 OC4M LL_TIM_OC_GetMode
Kojto	136:ef9c61f8c49f	1416	* @param TIMx Timer instance
Kojto	136:ef9c61f8c49f	1417	* @param Channel This parameter can be one of the following values:
Kojto	136:ef9c61f8c49f	1418	* @arg @ref LL_TIM_CHANNEL_CH1
Kojto	136:ef9c61f8c49f	1419	* @arg @ref LL_TIM_CHANNEL_CH2
Kojto	136:ef9c61f8c49f	1420	* @arg @ref LL_TIM_CHANNEL_CH3
Kojto	136:ef9c61f8c49f	1421	* @arg @ref LL_TIM_CHANNEL_CH4
Kojto	136:ef9c61f8c49f	1422	* @retval Returned value can be one of the following values:
Kojto	136:ef9c61f8c49f	1423	* @arg @ref LL_TIM_OCMODE_FROZEN
Kojto	136:ef9c61f8c49f	1424	* @arg @ref LL_TIM_OCMODE_ACTIVE
Kojto	136:ef9c61f8c49f	1425	* @arg @ref LL_TIM_OCMODE_INACTIVE
Kojto	136:ef9c61f8c49f	1426	* @arg @ref LL_TIM_OCMODE_TOGGLE
Kojto	136:ef9c61f8c49f	1427	* @arg @ref LL_TIM_OCMODE_FORCED_INACTIVE
Kojto	136:ef9c61f8c49f	1428	* @arg @ref LL_TIM_OCMODE_FORCED_ACTIVE
Kojto	136:ef9c61f8c49f	1429	* @arg @ref LL_TIM_OCMODE_PWM1
Kojto	136:ef9c61f8c49f	1430	* @arg @ref LL_TIM_OCMODE_PWM2
Kojto	136:ef9c61f8c49f	1431	*/
Kojto	136:ef9c61f8c49f	1432	__STATIC_INLINE uint32_t LL_TIM_OC_GetMode(TIM_TypeDef * TIMx, uint32_t Channel)
Kojto	136:ef9c61f8c49f	1433	{
Kojto	136:ef9c61f8c49f	1434	register uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel);
Kojto	136:ef9c61f8c49f	1435	register uint32_t * pReg = (uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1)+ OFFSET_TAB_CCMRx[iChannel]));
Kojto	136:ef9c61f8c49f	1436	return (READ_BIT(*pReg, ((TIM_CCMR1_OC1M \| TIM_CCMR1_CC1S) << SHIFT_TAB_OCxx[iChannel])) >> SHIFT_TAB_OCxx[iChannel]);
Kojto	136:ef9c61f8c49f	1437	}
Kojto	136:ef9c61f8c49f	1438
Kojto	136:ef9c61f8c49f	1439	/**
Kojto	136:ef9c61f8c49f	1440	* @brief Set the polarity of an output channel.
Kojto	136:ef9c61f8c49f	1441	* @rmtoll CCER CC1P LL_TIM_OC_SetPolarity\n
Kojto	136:ef9c61f8c49f	1442	* CCER CC2P LL_TIM_OC_SetPolarity\n
Kojto	136:ef9c61f8c49f	1443	* CCER CC3P LL_TIM_OC_SetPolarity\n
Kojto	136:ef9c61f8c49f	1444	* CCER CC4P LL_TIM_OC_SetPolarity
Kojto	136:ef9c61f8c49f	1445	* @param TIMx Timer instance
Kojto	136:ef9c61f8c49f	1446	* @param Channel This parameter can be one of the following values:
Kojto	136:ef9c61f8c49f	1447	* @arg @ref LL_TIM_CHANNEL_CH1
Kojto	136:ef9c61f8c49f	1448	* @arg @ref LL_TIM_CHANNEL_CH2
Kojto	136:ef9c61f8c49f	1449	* @arg @ref LL_TIM_CHANNEL_CH3
Kojto	136:ef9c61f8c49f	1450	* @arg @ref LL_TIM_CHANNEL_CH4
Kojto	136:ef9c61f8c49f	1451	* @param Polarity This parameter can be one of the following values:
Kojto	136:ef9c61f8c49f	1452	* @arg @ref LL_TIM_OCPOLARITY_HIGH
Kojto	136:ef9c61f8c49f	1453	* @arg @ref LL_TIM_OCPOLARITY_LOW
Kojto	136:ef9c61f8c49f	1454	* @retval None
Kojto	136:ef9c61f8c49f	1455	*/
Kojto	136:ef9c61f8c49f	1456	__STATIC_INLINE void LL_TIM_OC_SetPolarity(TIM_TypeDef * TIMx, uint32_t Channel, uint32_t Polarity)
Kojto	136:ef9c61f8c49f	1457	{
Kojto	136:ef9c61f8c49f	1458	register uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel);
Kojto	136:ef9c61f8c49f	1459	MODIFY_REG(TIMx->CCER, (TIM_CCER_CC1P << SHIFT_TAB_CCxP[iChannel]), Polarity << SHIFT_TAB_CCxP[iChannel]);
Kojto	136:ef9c61f8c49f	1460	}
Kojto	136:ef9c61f8c49f	1461
Kojto	136:ef9c61f8c49f	1462	/**
Kojto	136:ef9c61f8c49f	1463	* @brief Get the polarity of an output channel.
Kojto	136:ef9c61f8c49f	1464	* @rmtoll CCER CC1P LL_TIM_OC_GetPolarity\n
Kojto	136:ef9c61f8c49f	1465	* CCER CC2P LL_TIM_OC_GetPolarity\n
Kojto	136:ef9c61f8c49f	1466	* CCER CC3P LL_TIM_OC_GetPolarity\n
Kojto	136:ef9c61f8c49f	1467	* CCER CC4P LL_TIM_OC_GetPolarity
Kojto	136:ef9c61f8c49f	1468	* @param TIMx Timer instance
Kojto	136:ef9c61f8c49f	1469	* @param Channel This parameter can be one of the following values:
Kojto	136:ef9c61f8c49f	1470	* @arg @ref LL_TIM_CHANNEL_CH1
Kojto	136:ef9c61f8c49f	1471	* @arg @ref LL_TIM_CHANNEL_CH2
Kojto	136:ef9c61f8c49f	1472	* @arg @ref LL_TIM_CHANNEL_CH3
Kojto	136:ef9c61f8c49f	1473	* @arg @ref LL_TIM_CHANNEL_CH4
Kojto	136:ef9c61f8c49f	1474	* @retval Returned value can be one of the following values:
Kojto	136:ef9c61f8c49f	1475	* @arg @ref LL_TIM_OCPOLARITY_HIGH
Kojto	136:ef9c61f8c49f	1476	* @arg @ref LL_TIM_OCPOLARITY_LOW
Kojto	136:ef9c61f8c49f	1477	*/
Kojto	136:ef9c61f8c49f	1478	__STATIC_INLINE uint32_t LL_TIM_OC_GetPolarity(TIM_TypeDef * TIMx, uint32_t Channel)
Kojto	136:ef9c61f8c49f	1479	{
Kojto	136:ef9c61f8c49f	1480	register uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel);
Kojto	136:ef9c61f8c49f	1481	return (READ_BIT(TIMx->CCER, (TIM_CCER_CC1P << SHIFT_TAB_CCxP[iChannel])) >> SHIFT_TAB_CCxP[iChannel]);
Kojto	136:ef9c61f8c49f	1482	}
Kojto	136:ef9c61f8c49f	1483
Kojto	136:ef9c61f8c49f	1484
Kojto	136:ef9c61f8c49f	1485	/**
Kojto	136:ef9c61f8c49f	1486	* @brief Enable fast mode for the output channel.
Kojto	136:ef9c61f8c49f	1487	* @note Acts only if the channel is configured in PWM1 or PWM2 mode.
Kojto	136:ef9c61f8c49f	1488	* @rmtoll CCMR1 OC1FE LL_TIM_OC_EnableFast\n
Kojto	136:ef9c61f8c49f	1489	* CCMR1 OC2FE LL_TIM_OC_EnableFast\n
Kojto	136:ef9c61f8c49f	1490	* CCMR2 OC3FE LL_TIM_OC_EnableFast\n
Kojto	136:ef9c61f8c49f	1491	* CCMR2 OC4FE LL_TIM_OC_EnableFast
Kojto	136:ef9c61f8c49f	1492	* @param TIMx Timer instance
Kojto	136:ef9c61f8c49f	1493	* @param Channel This parameter can be one of the following values:
Kojto	136:ef9c61f8c49f	1494	* @arg @ref LL_TIM_CHANNEL_CH1
Kojto	136:ef9c61f8c49f	1495	* @arg @ref LL_TIM_CHANNEL_CH2
Kojto	136:ef9c61f8c49f	1496	* @arg @ref LL_TIM_CHANNEL_CH3
Kojto	136:ef9c61f8c49f	1497	* @arg @ref LL_TIM_CHANNEL_CH4
Kojto	136:ef9c61f8c49f	1498	* @retval None
Kojto	136:ef9c61f8c49f	1499	*/
Kojto	136:ef9c61f8c49f	1500	__STATIC_INLINE void LL_TIM_OC_EnableFast(TIM_TypeDef * TIMx, uint32_t Channel)
Kojto	136:ef9c61f8c49f	1501	{
Kojto	136:ef9c61f8c49f	1502	register uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel);
Kojto	136:ef9c61f8c49f	1503	register uint32_t * pReg = (uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1)+ OFFSET_TAB_CCMRx[iChannel]));
Kojto	136:ef9c61f8c49f	1504	SET_BIT(*pReg, (TIM_CCMR1_OC1FE << SHIFT_TAB_OCxx[iChannel]));
Kojto	136:ef9c61f8c49f	1505
Kojto	136:ef9c61f8c49f	1506	}
Kojto	136:ef9c61f8c49f	1507
Kojto	136:ef9c61f8c49f	1508	/**
Kojto	136:ef9c61f8c49f	1509	* @brief Disable fast mode for the output channel.
Kojto	136:ef9c61f8c49f	1510	* @rmtoll CCMR1 OC1FE LL_TIM_OC_DisableFast\n
Kojto	136:ef9c61f8c49f	1511	* CCMR1 OC2FE LL_TIM_OC_DisableFast\n
Kojto	136:ef9c61f8c49f	1512	* CCMR2 OC3FE LL_TIM_OC_DisableFast\n
Kojto	136:ef9c61f8c49f	1513	* CCMR2 OC4FE LL_TIM_OC_DisableFast
Kojto	136:ef9c61f8c49f	1514	* @param TIMx Timer instance
Kojto	136:ef9c61f8c49f	1515	* @param Channel This parameter can be one of the following values:
Kojto	136:ef9c61f8c49f	1516	* @arg @ref LL_TIM_CHANNEL_CH1
Kojto	136:ef9c61f8c49f	1517	* @arg @ref LL_TIM_CHANNEL_CH2
Kojto	136:ef9c61f8c49f	1518	* @arg @ref LL_TIM_CHANNEL_CH3
Kojto	136:ef9c61f8c49f	1519	* @arg @ref LL_TIM_CHANNEL_CH4
Kojto	136:ef9c61f8c49f	1520	* @retval None
Kojto	136:ef9c61f8c49f	1521	*/
Kojto	136:ef9c61f8c49f	1522	__STATIC_INLINE void LL_TIM_OC_DisableFast(TIM_TypeDef * TIMx, uint32_t Channel)
Kojto	136:ef9c61f8c49f	1523	{
Kojto	136:ef9c61f8c49f	1524	register uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel);
Kojto	136:ef9c61f8c49f	1525	register uint32_t * pReg = (uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1)+ OFFSET_TAB_CCMRx[iChannel]));
Kojto	136:ef9c61f8c49f	1526	CLEAR_BIT(*pReg, (TIM_CCMR1_OC1FE << SHIFT_TAB_OCxx[iChannel]));
Kojto	136:ef9c61f8c49f	1527
Kojto	136:ef9c61f8c49f	1528	}
Kojto	136:ef9c61f8c49f	1529
Kojto	136:ef9c61f8c49f	1530	/**
Kojto	136:ef9c61f8c49f	1531	* @brief Indicates whether fast mode is enabled for the output channel.
Kojto	136:ef9c61f8c49f	1532	* @rmtoll CCMR1 OC1FE LL_TIM_OC_IsEnabledFast\n
Kojto	136:ef9c61f8c49f	1533	* CCMR1 OC2FE LL_TIM_OC_IsEnabledFast\n
Kojto	136:ef9c61f8c49f	1534	* CCMR2 OC3FE LL_TIM_OC_IsEnabledFast\n
Kojto	136:ef9c61f8c49f	1535	* CCMR2 OC4FE LL_TIM_OC_IsEnabledFast\n
Kojto	136:ef9c61f8c49f	1536	* @param TIMx Timer instance
Kojto	136:ef9c61f8c49f	1537	* @param Channel This parameter can be one of the following values:
Kojto	136:ef9c61f8c49f	1538	* @arg @ref LL_TIM_CHANNEL_CH1
Kojto	136:ef9c61f8c49f	1539	* @arg @ref LL_TIM_CHANNEL_CH2
Kojto	136:ef9c61f8c49f	1540	* @arg @ref LL_TIM_CHANNEL_CH3
Kojto	136:ef9c61f8c49f	1541	* @arg @ref LL_TIM_CHANNEL_CH4
Kojto	136:ef9c61f8c49f	1542	* @retval State of bit (1 or 0).
Kojto	136:ef9c61f8c49f	1543	*/
Kojto	136:ef9c61f8c49f	1544	__STATIC_INLINE uint32_t LL_TIM_OC_IsEnabledFast(TIM_TypeDef * TIMx, uint32_t Channel)
Kojto	136:ef9c61f8c49f	1545	{
Kojto	136:ef9c61f8c49f	1546	register uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel);
Kojto	136:ef9c61f8c49f	1547	register uint32_t * pReg = (uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1)+ OFFSET_TAB_CCMRx[iChannel]));
Kojto	136:ef9c61f8c49f	1548	register uint32_t bitfield = TIM_CCMR1_OC1FE << SHIFT_TAB_OCxx[iChannel];
Kojto	136:ef9c61f8c49f	1549	return (READ_BIT(*pReg, bitfield) == bitfield);
Kojto	136:ef9c61f8c49f	1550	}
Kojto	136:ef9c61f8c49f	1551
Kojto	136:ef9c61f8c49f	1552	/**
Kojto	136:ef9c61f8c49f	1553	* @brief Enable compare register (TIMx_CCRx) preload for the output channel.
Kojto	136:ef9c61f8c49f	1554	* @rmtoll CCMR1 OC1PE LL_TIM_OC_EnablePreload\n
Kojto	136:ef9c61f8c49f	1555	* CCMR1 OC2PE LL_TIM_OC_EnablePreload\n
Kojto	136:ef9c61f8c49f	1556	* CCMR2 OC3PE LL_TIM_OC_EnablePreload\n
Kojto	136:ef9c61f8c49f	1557	* CCMR2 OC4PE LL_TIM_OC_EnablePreload
Kojto	136:ef9c61f8c49f	1558	* @param TIMx Timer instance
Kojto	136:ef9c61f8c49f	1559	* @param Channel This parameter can be one of the following values:
Kojto	136:ef9c61f8c49f	1560	* @arg @ref LL_TIM_CHANNEL_CH1
Kojto	136:ef9c61f8c49f	1561	* @arg @ref LL_TIM_CHANNEL_CH2
Kojto	136:ef9c61f8c49f	1562	* @arg @ref LL_TIM_CHANNEL_CH3
Kojto	136:ef9c61f8c49f	1563	* @arg @ref LL_TIM_CHANNEL_CH4
Kojto	136:ef9c61f8c49f	1564	* @retval None
Kojto	136:ef9c61f8c49f	1565	*/
Kojto	136:ef9c61f8c49f	1566	__STATIC_INLINE void LL_TIM_OC_EnablePreload(TIM_TypeDef * TIMx, uint32_t Channel)
Kojto	136:ef9c61f8c49f	1567	{
Kojto	136:ef9c61f8c49f	1568	register uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel);
Kojto	136:ef9c61f8c49f	1569	register uint32_t * pReg = (uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1)+ OFFSET_TAB_CCMRx[iChannel]));
Kojto	136:ef9c61f8c49f	1570	SET_BIT(*pReg, (TIM_CCMR1_OC1PE << SHIFT_TAB_OCxx[iChannel]));
Kojto	136:ef9c61f8c49f	1571	}
Kojto	136:ef9c61f8c49f	1572
Kojto	136:ef9c61f8c49f	1573	/**
Kojto	136:ef9c61f8c49f	1574	* @brief Disable compare register (TIMx_CCRx) preload for the output channel.
Kojto	136:ef9c61f8c49f	1575	* @rmtoll CCMR1 OC1PE LL_TIM_OC_DisablePreload\n
Kojto	136:ef9c61f8c49f	1576	* CCMR1 OC2PE LL_TIM_OC_DisablePreload\n
Kojto	136:ef9c61f8c49f	1577	* CCMR2 OC3PE LL_TIM_OC_DisablePreload\n
Kojto	136:ef9c61f8c49f	1578	* CCMR2 OC4PE LL_TIM_OC_DisablePreload
Kojto	136:ef9c61f8c49f	1579	* @param TIMx Timer instance
Kojto	136:ef9c61f8c49f	1580	* @param Channel This parameter can be one of the following values:
Kojto	136:ef9c61f8c49f	1581	* @arg @ref LL_TIM_CHANNEL_CH1
Kojto	136:ef9c61f8c49f	1582	* @arg @ref LL_TIM_CHANNEL_CH2
Kojto	136:ef9c61f8c49f	1583	* @arg @ref LL_TIM_CHANNEL_CH3
Kojto	136:ef9c61f8c49f	1584	* @arg @ref LL_TIM_CHANNEL_CH4
Kojto	136:ef9c61f8c49f	1585	* @retval None
Kojto	136:ef9c61f8c49f	1586	*/
Kojto	136:ef9c61f8c49f	1587	__STATIC_INLINE void LL_TIM_OC_DisablePreload(TIM_TypeDef * TIMx, uint32_t Channel)
Kojto	136:ef9c61f8c49f	1588	{
Kojto	136:ef9c61f8c49f	1589	register uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel);
Kojto	136:ef9c61f8c49f	1590	register uint32_t * pReg = (uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1)+ OFFSET_TAB_CCMRx[iChannel]));
Kojto	136:ef9c61f8c49f	1591	CLEAR_BIT(*pReg, (TIM_CCMR1_OC1PE << SHIFT_TAB_OCxx[iChannel]));
Kojto	136:ef9c61f8c49f	1592	}
Kojto	136:ef9c61f8c49f	1593
Kojto	136:ef9c61f8c49f	1594	/**
Kojto	136:ef9c61f8c49f	1595	* @brief Indicates whether compare register (TIMx_CCRx) preload is enabled for the output channel.
Kojto	136:ef9c61f8c49f	1596	* @rmtoll CCMR1 OC1PE LL_TIM_OC_IsEnabledPreload\n
Kojto	136:ef9c61f8c49f	1597	* CCMR1 OC2PE LL_TIM_OC_IsEnabledPreload\n
Kojto	136:ef9c61f8c49f	1598	* CCMR2 OC3PE LL_TIM_OC_IsEnabledPreload\n
Kojto	136:ef9c61f8c49f	1599	* CCMR2 OC4PE LL_TIM_OC_IsEnabledPreload\n
Kojto	136:ef9c61f8c49f	1600	* @param TIMx Timer instance
Kojto	136:ef9c61f8c49f	1601	* @param Channel This parameter can be one of the following values:
Kojto	136:ef9c61f8c49f	1602	* @arg @ref LL_TIM_CHANNEL_CH1
Kojto	136:ef9c61f8c49f	1603	* @arg @ref LL_TIM_CHANNEL_CH2
Kojto	136:ef9c61f8c49f	1604	* @arg @ref LL_TIM_CHANNEL_CH3
Kojto	136:ef9c61f8c49f	1605	* @arg @ref LL_TIM_CHANNEL_CH4
Kojto	136:ef9c61f8c49f	1606	* @retval State of bit (1 or 0).
Kojto	136:ef9c61f8c49f	1607	*/
Kojto	136:ef9c61f8c49f	1608	__STATIC_INLINE uint32_t LL_TIM_OC_IsEnabledPreload(TIM_TypeDef * TIMx, uint32_t Channel)
Kojto	136:ef9c61f8c49f	1609	{
Kojto	136:ef9c61f8c49f	1610	register uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel);
Kojto	136:ef9c61f8c49f	1611	register uint32_t * pReg = (uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1)+ OFFSET_TAB_CCMRx[iChannel]));
Kojto	136:ef9c61f8c49f	1612	register uint32_t bitfield = TIM_CCMR1_OC1PE << SHIFT_TAB_OCxx[iChannel];
Kojto	136:ef9c61f8c49f	1613	return (READ_BIT(*pReg, bitfield) == bitfield);
Kojto	136:ef9c61f8c49f	1614	}
Kojto	136:ef9c61f8c49f	1615
Kojto	136:ef9c61f8c49f	1616	/**
Kojto	136:ef9c61f8c49f	1617	* @brief Enable clearing the output channel on an external event.
Kojto	136:ef9c61f8c49f	1618	* @note This function can only be used in Output compare and PWM modes. It does not work in Forced mode.
Kojto	136:ef9c61f8c49f	1619	* @note Macro @ref IS_TIM_OCXREF_CLEAR_INSTANCE(TIMx) can be used to check whether
Kojto	136:ef9c61f8c49f	1620	* or not a timer instance can clear the OCxREF signal on an external event.
Kojto	136:ef9c61f8c49f	1621	* @rmtoll CCMR1 OC1CE LL_TIM_OC_EnableClear\n
Kojto	136:ef9c61f8c49f	1622	* CCMR1 OC2CE LL_TIM_OC_EnableClear\n
Kojto	136:ef9c61f8c49f	1623	* CCMR2 OC3CE LL_TIM_OC_EnableClear\n
Kojto	136:ef9c61f8c49f	1624	* CCMR2 OC4CE LL_TIM_OC_EnableClear
Kojto	136:ef9c61f8c49f	1625	* @param TIMx Timer instance
Kojto	136:ef9c61f8c49f	1626	* @param Channel This parameter can be one of the following values:
Kojto	136:ef9c61f8c49f	1627	* @arg @ref LL_TIM_CHANNEL_CH1
Kojto	136:ef9c61f8c49f	1628	* @arg @ref LL_TIM_CHANNEL_CH2
Kojto	136:ef9c61f8c49f	1629	* @arg @ref LL_TIM_CHANNEL_CH3
Kojto	136:ef9c61f8c49f	1630	* @arg @ref LL_TIM_CHANNEL_CH4
Kojto	136:ef9c61f8c49f	1631	* @retval None
Kojto	136:ef9c61f8c49f	1632	*/
Kojto	136:ef9c61f8c49f	1633	__STATIC_INLINE void LL_TIM_OC_EnableClear(TIM_TypeDef * TIMx, uint32_t Channel)
Kojto	136:ef9c61f8c49f	1634	{
Kojto	136:ef9c61f8c49f	1635	register uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel);
Kojto	136:ef9c61f8c49f	1636	register uint32_t * pReg = (uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1)+ OFFSET_TAB_CCMRx[iChannel]));
Kojto	136:ef9c61f8c49f	1637	SET_BIT(*pReg, (TIM_CCMR1_OC1CE << SHIFT_TAB_OCxx[iChannel]));
Kojto	136:ef9c61f8c49f	1638	}
Kojto	136:ef9c61f8c49f	1639
Kojto	136:ef9c61f8c49f	1640	/**
Kojto	136:ef9c61f8c49f	1641	* @brief Disable clearing the output channel on an external event.
Kojto	136:ef9c61f8c49f	1642	* @note Macro @ref IS_TIM_OCXREF_CLEAR_INSTANCE(TIMx) can be used to check whether
Kojto	136:ef9c61f8c49f	1643	* or not a timer instance can clear the OCxREF signal on an external event.
Kojto	136:ef9c61f8c49f	1644	* @rmtoll CCMR1 OC1CE LL_TIM_OC_DisableClear\n
Kojto	136:ef9c61f8c49f	1645	* CCMR1 OC2CE LL_TIM_OC_DisableClear\n
Kojto	136:ef9c61f8c49f	1646	* CCMR2 OC3CE LL_TIM_OC_DisableClear\n
Kojto	136:ef9c61f8c49f	1647	* CCMR2 OC4CE LL_TIM_OC_DisableClear
Kojto	136:ef9c61f8c49f	1648	* @param TIMx Timer instance
Kojto	136:ef9c61f8c49f	1649	* @param Channel This parameter can be one of the following values:
Kojto	136:ef9c61f8c49f	1650	* @arg @ref LL_TIM_CHANNEL_CH1
Kojto	136:ef9c61f8c49f	1651	* @arg @ref LL_TIM_CHANNEL_CH2
Kojto	136:ef9c61f8c49f	1652	* @arg @ref LL_TIM_CHANNEL_CH3
Kojto	136:ef9c61f8c49f	1653	* @arg @ref LL_TIM_CHANNEL_CH4
Kojto	136:ef9c61f8c49f	1654	* @retval None
Kojto	136:ef9c61f8c49f	1655	*/
Kojto	136:ef9c61f8c49f	1656	__STATIC_INLINE void LL_TIM_OC_DisableClear(TIM_TypeDef * TIMx, uint32_t Channel)
Kojto	136:ef9c61f8c49f	1657	{
Kojto	136:ef9c61f8c49f	1658	register uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel);
Kojto	136:ef9c61f8c49f	1659	register uint32_t * pReg = (uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1)+ OFFSET_TAB_CCMRx[iChannel]));
Kojto	136:ef9c61f8c49f	1660	CLEAR_BIT(*pReg, (TIM_CCMR1_OC1CE << SHIFT_TAB_OCxx[iChannel]));
Kojto	136:ef9c61f8c49f	1661	}
Kojto	136:ef9c61f8c49f	1662
Kojto	136:ef9c61f8c49f	1663	/**
Kojto	136:ef9c61f8c49f	1664	* @brief Indicates clearing the output channel on an external event is enabled for the output channel.
Kojto	136:ef9c61f8c49f	1665	* @note This function enables clearing the output channel on an external event.
Kojto	136:ef9c61f8c49f	1666	* @note This function can only be used in Output compare and PWM modes. It does not work in Forced mode.
Kojto	136:ef9c61f8c49f	1667	* @note Macro @ref IS_TIM_OCXREF_CLEAR_INSTANCE(TIMx) can be used to check whether
Kojto	136:ef9c61f8c49f	1668	* or not a timer instance can clear the OCxREF signal on an external event.
Kojto	136:ef9c61f8c49f	1669	* @rmtoll CCMR1 OC1CE LL_TIM_OC_IsEnabledClear\n
Kojto	136:ef9c61f8c49f	1670	* CCMR1 OC2CE LL_TIM_OC_IsEnabledClear\n
Kojto	136:ef9c61f8c49f	1671	* CCMR2 OC3CE LL_TIM_OC_IsEnabledClear\n
Kojto	136:ef9c61f8c49f	1672	* CCMR2 OC4CE LL_TIM_OC_IsEnabledClear\n
Kojto	136:ef9c61f8c49f	1673	* @param TIMx Timer instance
Kojto	136:ef9c61f8c49f	1674	* @param Channel This parameter can be one of the following values:
Kojto	136:ef9c61f8c49f	1675	* @arg @ref LL_TIM_CHANNEL_CH1
Kojto	136:ef9c61f8c49f	1676	* @arg @ref LL_TIM_CHANNEL_CH2
Kojto	136:ef9c61f8c49f	1677	* @arg @ref LL_TIM_CHANNEL_CH3
Kojto	136:ef9c61f8c49f	1678	* @arg @ref LL_TIM_CHANNEL_CH4
Kojto	136:ef9c61f8c49f	1679	* @retval State of bit (1 or 0).
Kojto	136:ef9c61f8c49f	1680	*/
Kojto	136:ef9c61f8c49f	1681	__STATIC_INLINE uint32_t LL_TIM_OC_IsEnabledClear(TIM_TypeDef * TIMx, uint32_t Channel)
Kojto	136:ef9c61f8c49f	1682	{
Kojto	136:ef9c61f8c49f	1683	register uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel);
Kojto	136:ef9c61f8c49f	1684	register uint32_t * pReg = (uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1)+ OFFSET_TAB_CCMRx[iChannel]));
Kojto	136:ef9c61f8c49f	1685	register uint32_t bitfield = TIM_CCMR1_OC1CE << SHIFT_TAB_OCxx[iChannel];
Kojto	136:ef9c61f8c49f	1686	return (READ_BIT(*pReg, bitfield) == bitfield);
Kojto	136:ef9c61f8c49f	1687	}
Kojto	136:ef9c61f8c49f	1688
Kojto	136:ef9c61f8c49f	1689
Kojto	136:ef9c61f8c49f	1690	/**
Kojto	136:ef9c61f8c49f	1691	* @brief Set compare value for output channel 1 (TIMx_CCR1).
Kojto	136:ef9c61f8c49f	1692	* @note Macro @ref IS_TIM_CC1_INSTANCE(TIMx) can be used to check whether or not
Kojto	136:ef9c61f8c49f	1693	* output channel 1 is supported by a timer instance.
Kojto	136:ef9c61f8c49f	1694	* @rmtoll CCR1 CCR1 LL_TIM_OC_SetCompareCH1
Kojto	136:ef9c61f8c49f	1695	* @param TIMx Timer instance
Kojto	136:ef9c61f8c49f	1696	* @param CompareValue between Min_Data=0 and Max_Data=65535
Kojto	136:ef9c61f8c49f	1697	* @retval None
Kojto	136:ef9c61f8c49f	1698	*/
Kojto	136:ef9c61f8c49f	1699	__STATIC_INLINE void LL_TIM_OC_SetCompareCH1(TIM_TypeDef * TIMx, uint32_t CompareValue)
Kojto	136:ef9c61f8c49f	1700	{
Kojto	136:ef9c61f8c49f	1701	WRITE_REG(TIMx->CCR1, CompareValue);
Kojto	136:ef9c61f8c49f	1702	}
Kojto	136:ef9c61f8c49f	1703
Kojto	136:ef9c61f8c49f	1704	/**
Kojto	136:ef9c61f8c49f	1705	* @brief Set compare value for output channel 2 (TIMx_CCR2).
Kojto	136:ef9c61f8c49f	1706	* @note Macro @ref IS_TIM_CC2_INSTANCE(TIMx) can be used to check whether or not
Kojto	136:ef9c61f8c49f	1707	* output channel 2 is supported by a timer instance.
Kojto	136:ef9c61f8c49f	1708	* @rmtoll CCR2 CCR2 LL_TIM_OC_SetCompareCH2
Kojto	136:ef9c61f8c49f	1709	* @param TIMx Timer instance
Kojto	136:ef9c61f8c49f	1710	* @param CompareValue between Min_Data=0 and Max_Data=65535
Kojto	136:ef9c61f8c49f	1711	* @retval None
Kojto	136:ef9c61f8c49f	1712	*/
Kojto	136:ef9c61f8c49f	1713	__STATIC_INLINE void LL_TIM_OC_SetCompareCH2(TIM_TypeDef * TIMx, uint32_t CompareValue)
Kojto	136:ef9c61f8c49f	1714	{
Kojto	136:ef9c61f8c49f	1715	WRITE_REG(TIMx->CCR2, CompareValue);
Kojto	136:ef9c61f8c49f	1716	}
Kojto	136:ef9c61f8c49f	1717
Kojto	136:ef9c61f8c49f	1718	/**
Kojto	136:ef9c61f8c49f	1719	* @brief Set compare value for output channel 3 (TIMx_CCR3).
Kojto	136:ef9c61f8c49f	1720	* @note Macro @ref IS_TIM_CC3_INSTANCE(TIMx) can be used to check whether or not
Kojto	136:ef9c61f8c49f	1721	* output channel is supported by a timer instance.
Kojto	136:ef9c61f8c49f	1722	* @rmtoll CCR3 CCR3 LL_TIM_OC_SetCompareCH3
Kojto	136:ef9c61f8c49f	1723	* @param TIMx Timer instance
Kojto	136:ef9c61f8c49f	1724	* @param CompareValue between Min_Data=0 and Max_Data=65535
Kojto	136:ef9c61f8c49f	1725	* @retval None
Kojto	136:ef9c61f8c49f	1726	*/
Kojto	136:ef9c61f8c49f	1727	__STATIC_INLINE void LL_TIM_OC_SetCompareCH3(TIM_TypeDef * TIMx, uint32_t CompareValue)
Kojto	136:ef9c61f8c49f	1728	{
Kojto	136:ef9c61f8c49f	1729	WRITE_REG(TIMx->CCR3, CompareValue);
Kojto	136:ef9c61f8c49f	1730	}
Kojto	136:ef9c61f8c49f	1731
Kojto	136:ef9c61f8c49f	1732	/**
Kojto	136:ef9c61f8c49f	1733	* @brief Set compare value for output channel 4 (TIMx_CCR4).
Kojto	136:ef9c61f8c49f	1734	* @note Macro @ref IS_TIM_CC4_INSTANCE(TIMx) can be used to check whether or not
Kojto	136:ef9c61f8c49f	1735	* output channel 4 is supported by a timer instance.
Kojto	136:ef9c61f8c49f	1736	* @rmtoll CCR4 CCR4 LL_TIM_OC_SetCompareCH4
Kojto	136:ef9c61f8c49f	1737	* @param TIMx Timer instance
Kojto	136:ef9c61f8c49f	1738	* @param CompareValue between Min_Data=0 and Max_Data=65535
Kojto	136:ef9c61f8c49f	1739	* @retval None
Kojto	136:ef9c61f8c49f	1740	*/
Kojto	136:ef9c61f8c49f	1741	__STATIC_INLINE void LL_TIM_OC_SetCompareCH4(TIM_TypeDef * TIMx, uint32_t CompareValue)
Kojto	136:ef9c61f8c49f	1742	{
Kojto	136:ef9c61f8c49f	1743	WRITE_REG(TIMx->CCR4, CompareValue);
Kojto	136:ef9c61f8c49f	1744	}
Kojto	136:ef9c61f8c49f	1745
Kojto	136:ef9c61f8c49f	1746
Kojto	136:ef9c61f8c49f	1747	/**
Kojto	136:ef9c61f8c49f	1748	* @brief Get compare value (TIMx_CCR1) set for output channel 1.
Kojto	136:ef9c61f8c49f	1749	* @note Macro @ref IS_TIM_CC1_INSTANCE(TIMx) can be used to check whether or not
Kojto	136:ef9c61f8c49f	1750	* output channel 1 is supported by a timer instance.
Kojto	136:ef9c61f8c49f	1751	* @rmtoll CCR1 CCR1 LL_TIM_OC_GetCompareCH1
Kojto	136:ef9c61f8c49f	1752	* @param TIMx Timer instance
Kojto	136:ef9c61f8c49f	1753	* @retval CompareValue (between Min_Data=0 and Max_Data=65535)
Kojto	136:ef9c61f8c49f	1754	*/
Kojto	136:ef9c61f8c49f	1755	__STATIC_INLINE uint32_t LL_TIM_OC_GetCompareCH1(TIM_TypeDef * TIMx)
Kojto	136:ef9c61f8c49f	1756	{
Kojto	136:ef9c61f8c49f	1757	return (uint32_t)(READ_REG(TIMx->CCR1));
Kojto	136:ef9c61f8c49f	1758	}
Kojto	136:ef9c61f8c49f	1759
Kojto	136:ef9c61f8c49f	1760	/**
Kojto	136:ef9c61f8c49f	1761	* @brief Get compare value (TIMx_CCR2) set for output channel 2.
Kojto	136:ef9c61f8c49f	1762	* @note Macro @ref IS_TIM_CC2_INSTANCE(TIMx) can be used to check whether or not
Kojto	136:ef9c61f8c49f	1763	* output channel 2 is supported by a timer instance.
Kojto	136:ef9c61f8c49f	1764	* @rmtoll CCR2 CCR2 LL_TIM_OC_GetCompareCH2
Kojto	136:ef9c61f8c49f	1765	* @param TIMx Timer instance
Kojto	136:ef9c61f8c49f	1766	* @retval CompareValue (between Min_Data=0 and Max_Data=65535)
Kojto	136:ef9c61f8c49f	1767	*/
Kojto	136:ef9c61f8c49f	1768	__STATIC_INLINE uint32_t LL_TIM_OC_GetCompareCH2(TIM_TypeDef * TIMx)
Kojto	136:ef9c61f8c49f	1769	{
Kojto	136:ef9c61f8c49f	1770	return (uint32_t)(READ_REG(TIMx->CCR2));
Kojto	136:ef9c61f8c49f	1771	}
Kojto	136:ef9c61f8c49f	1772
Kojto	136:ef9c61f8c49f	1773	/**
Kojto	136:ef9c61f8c49f	1774	* @brief Get compare value (TIMx_CCR3) set for output channel 3.
Kojto	136:ef9c61f8c49f	1775	* @note Macro @ref IS_TIM_CC3_INSTANCE(TIMx) can be used to check whether or not
Kojto	136:ef9c61f8c49f	1776	* output channel 3 is supported by a timer instance.
Kojto	136:ef9c61f8c49f	1777	* @rmtoll CCR3 CCR3 LL_TIM_OC_GetCompareCH3
Kojto	136:ef9c61f8c49f	1778	* @param TIMx Timer instance
Kojto	136:ef9c61f8c49f	1779	* @retval CompareValue (between Min_Data=0 and Max_Data=65535)
Kojto	136:ef9c61f8c49f	1780	*/
Kojto	136:ef9c61f8c49f	1781	__STATIC_INLINE uint32_t LL_TIM_OC_GetCompareCH3(TIM_TypeDef * TIMx)
Kojto	136:ef9c61f8c49f	1782	{
Kojto	136:ef9c61f8c49f	1783	return (uint32_t)(READ_REG(TIMx->CCR3));
Kojto	136:ef9c61f8c49f	1784	}
Kojto	136:ef9c61f8c49f	1785
Kojto	136:ef9c61f8c49f	1786	/**
Kojto	136:ef9c61f8c49f	1787	* @brief Get compare value (TIMx_CCR4) set for output channel 4.
Kojto	136:ef9c61f8c49f	1788	* @note Macro @ref IS_TIM_CC4_INSTANCE(TIMx) can be used to check whether or not
Kojto	136:ef9c61f8c49f	1789	* output channel 4 is supported by a timer instance.
Kojto	136:ef9c61f8c49f	1790	* @rmtoll CCR4 CCR4 LL_TIM_OC_GetCompareCH4
Kojto	136:ef9c61f8c49f	1791	* @param TIMx Timer instance
Kojto	136:ef9c61f8c49f	1792	* @retval CompareValue (between Min_Data=0 and Max_Data=65535)
Kojto	136:ef9c61f8c49f	1793	*/
Kojto	136:ef9c61f8c49f	1794	__STATIC_INLINE uint32_t LL_TIM_OC_GetCompareCH4(TIM_TypeDef * TIMx)
Kojto	136:ef9c61f8c49f	1795	{
Kojto	136:ef9c61f8c49f	1796	return (uint32_t)(READ_REG(TIMx->CCR4));
Kojto	136:ef9c61f8c49f	1797	}
Kojto	136:ef9c61f8c49f	1798
Kojto	136:ef9c61f8c49f	1799
Kojto	136:ef9c61f8c49f	1800
Kojto	136:ef9c61f8c49f	1801	/**
Kojto	136:ef9c61f8c49f	1802	* @}
Kojto	136:ef9c61f8c49f	1803	*/
Kojto	136:ef9c61f8c49f	1804
Kojto	136:ef9c61f8c49f	1805	/** @defgroup TIM_LL_EF_Input_Channel Input channel configuration
Kojto	136:ef9c61f8c49f	1806	* @{
Kojto	136:ef9c61f8c49f	1807	*/
Kojto	136:ef9c61f8c49f	1808	/**
Kojto	136:ef9c61f8c49f	1809	* @brief Configure input channel.
Kojto	136:ef9c61f8c49f	1810	* @rmtoll CCMR1 CC1S LL_TIM_IC_Config\n
Kojto	136:ef9c61f8c49f	1811	* CCMR1 IC1PSC LL_TIM_IC_Config\n
Kojto	136:ef9c61f8c49f	1812	* CCMR1 IC1F LL_TIM_IC_Config\n
Kojto	136:ef9c61f8c49f	1813	* CCMR1 CC2S LL_TIM_IC_Config\n
Kojto	136:ef9c61f8c49f	1814	* CCMR1 IC2PSC LL_TIM_IC_Config\n
Kojto	136:ef9c61f8c49f	1815	* CCMR1 IC2F LL_TIM_IC_Config\n
Kojto	136:ef9c61f8c49f	1816	* CCMR2 CC3S LL_TIM_IC_Config\n
Kojto	136:ef9c61f8c49f	1817	* CCMR2 IC3PSC LL_TIM_IC_Config\n
Kojto	136:ef9c61f8c49f	1818	* CCMR2 IC3F LL_TIM_IC_Config\n
Kojto	136:ef9c61f8c49f	1819	* CCMR2 CC4S LL_TIM_IC_Config\n
Kojto	136:ef9c61f8c49f	1820	* CCMR2 IC4PSC LL_TIM_IC_Config\n
Kojto	136:ef9c61f8c49f	1821	* CCMR2 IC4F LL_TIM_IC_Config\n
Kojto	136:ef9c61f8c49f	1822	* CCER CC1P LL_TIM_IC_Config\n
Kojto	136:ef9c61f8c49f	1823	* CCER CC1NP LL_TIM_IC_Config\n
Kojto	136:ef9c61f8c49f	1824	* CCER CC2P LL_TIM_IC_Config\n
Kojto	136:ef9c61f8c49f	1825	* CCER CC2NP LL_TIM_IC_Config\n
Kojto	136:ef9c61f8c49f	1826	* CCER CC3P LL_TIM_IC_Config\n
Kojto	136:ef9c61f8c49f	1827	* CCER CC3NP LL_TIM_IC_Config\n
Kojto	136:ef9c61f8c49f	1828	* CCER CC4P LL_TIM_IC_Config\n
Kojto	136:ef9c61f8c49f	1829	* CCER CC4NP LL_TIM_IC_Config
Kojto	136:ef9c61f8c49f	1830	* @param TIMx Timer instance
Kojto	136:ef9c61f8c49f	1831	* @param Channel This parameter can be one of the following values:
Kojto	136:ef9c61f8c49f	1832	* @arg @ref LL_TIM_CHANNEL_CH1
Kojto	136:ef9c61f8c49f	1833	* @arg @ref LL_TIM_CHANNEL_CH2
Kojto	136:ef9c61f8c49f	1834	* @arg @ref LL_TIM_CHANNEL_CH3
Kojto	136:ef9c61f8c49f	1835	* @arg @ref LL_TIM_CHANNEL_CH4
Kojto	136:ef9c61f8c49f	1836	* @param Configuration This parameter must be a combination of all the following values:
Kojto	136:ef9c61f8c49f	1837	* @arg @ref LL_TIM_ACTIVEINPUT_DIRECTTI or @ref LL_TIM_ACTIVEINPUT_INDIRECTTI or @ref LL_TIM_ACTIVEINPUT_TRC
Kojto	136:ef9c61f8c49f	1838	* @arg @ref LL_TIM_ICPSC_DIV1 or ... or @ref LL_TIM_ICPSC_DIV8
Kojto	136:ef9c61f8c49f	1839	* @arg @ref LL_TIM_IC_FILTER_FDIV1 or ... or @ref LL_TIM_IC_FILTER_FDIV32_N8
Kojto	136:ef9c61f8c49f	1840	* @arg @ref LL_TIM_IC_POLARITY_RISING or @ref LL_TIM_IC_POLARITY_FALLING or @ref LL_TIM_IC_POLARITY_BOTHEDGE
Kojto	136:ef9c61f8c49f	1841	* @retval None
Kojto	136:ef9c61f8c49f	1842	*/
Kojto	136:ef9c61f8c49f	1843	__STATIC_INLINE void LL_TIM_IC_Config(TIM_TypeDef * TIMx, uint32_t Channel, uint32_t Configuration)
Kojto	136:ef9c61f8c49f	1844	{
Kojto	136:ef9c61f8c49f	1845	register uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel);
Kojto	136:ef9c61f8c49f	1846	register uint32_t * pReg = (uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1)+ OFFSET_TAB_CCMRx[iChannel]));
Kojto	136:ef9c61f8c49f	1847	MODIFY_REG(*pReg, ((TIM_CCMR1_IC1F \| TIM_CCMR1_IC1PSC \| TIM_CCMR1_CC1S) << SHIFT_TAB_ICxx[iChannel]), ((Configuration >> 16U) & (TIM_CCMR1_IC1F \| TIM_CCMR1_IC1PSC \| TIM_CCMR1_CC1S)) << SHIFT_TAB_ICxx[iChannel]);
Kojto	136:ef9c61f8c49f	1848	MODIFY_REG(TIMx->CCER, ((TIM_CCER_CC1NP \| TIM_CCER_CC1P) << SHIFT_TAB_CCxP[iChannel]), (Configuration & (TIM_CCER_CC1NP \| TIM_CCER_CC1P)) << SHIFT_TAB_CCxP[iChannel]);
Kojto	136:ef9c61f8c49f	1849	}
Kojto	136:ef9c61f8c49f	1850
Kojto	136:ef9c61f8c49f	1851	/**
Kojto	136:ef9c61f8c49f	1852	* @brief Set the active input.
Kojto	136:ef9c61f8c49f	1853	* @rmtoll CCMR1 CC1S LL_TIM_IC_SetActiveInput\n
Kojto	136:ef9c61f8c49f	1854	* CCMR1 CC2S LL_TIM_IC_SetActiveInput\n
Kojto	136:ef9c61f8c49f	1855	* CCMR2 CC3S LL_TIM_IC_SetActiveInput\n
Kojto	136:ef9c61f8c49f	1856	* CCMR2 CC4S LL_TIM_IC_SetActiveInput
Kojto	136:ef9c61f8c49f	1857	* @param TIMx Timer instance
Kojto	136:ef9c61f8c49f	1858	* @param Channel This parameter can be one of the following values:
Kojto	136:ef9c61f8c49f	1859	* @arg @ref LL_TIM_CHANNEL_CH1
Kojto	136:ef9c61f8c49f	1860	* @arg @ref LL_TIM_CHANNEL_CH2
Kojto	136:ef9c61f8c49f	1861	* @arg @ref LL_TIM_CHANNEL_CH3
Kojto	136:ef9c61f8c49f	1862	* @arg @ref LL_TIM_CHANNEL_CH4
Kojto	136:ef9c61f8c49f	1863	* @param ICActiveInput This parameter can be one of the following values:
Kojto	136:ef9c61f8c49f	1864	* @arg @ref LL_TIM_ACTIVEINPUT_DIRECTTI
Kojto	136:ef9c61f8c49f	1865	* @arg @ref LL_TIM_ACTIVEINPUT_INDIRECTTI
Kojto	136:ef9c61f8c49f	1866	* @arg @ref LL_TIM_ACTIVEINPUT_TRC
Kojto	136:ef9c61f8c49f	1867	* @retval None
Kojto	136:ef9c61f8c49f	1868	*/
Kojto	136:ef9c61f8c49f	1869	__STATIC_INLINE void LL_TIM_IC_SetActiveInput(TIM_TypeDef * TIMx, uint32_t Channel, uint32_t ICActiveInput)
Kojto	136:ef9c61f8c49f	1870	{
Kojto	136:ef9c61f8c49f	1871	register uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel);
Kojto	136:ef9c61f8c49f	1872	register uint32_t * pReg = (uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1)+ OFFSET_TAB_CCMRx[iChannel]));
Kojto	136:ef9c61f8c49f	1873	MODIFY_REG(*pReg, ((TIM_CCMR1_CC1S) << SHIFT_TAB_ICxx[iChannel]), (ICActiveInput >> 16U) << SHIFT_TAB_ICxx[iChannel]);
Kojto	136:ef9c61f8c49f	1874	}
Kojto	136:ef9c61f8c49f	1875
Kojto	136:ef9c61f8c49f	1876	/**
Kojto	136:ef9c61f8c49f	1877	* @brief Get the current active input.
Kojto	136:ef9c61f8c49f	1878	* @rmtoll CCMR1 CC1S LL_TIM_IC_GetActiveInput\n
Kojto	136:ef9c61f8c49f	1879	* CCMR1 CC2S LL_TIM_IC_GetActiveInput\n
Kojto	136:ef9c61f8c49f	1880	* CCMR2 CC3S LL_TIM_IC_GetActiveInput\n
Kojto	136:ef9c61f8c49f	1881	* CCMR2 CC4S LL_TIM_IC_GetActiveInput
Kojto	136:ef9c61f8c49f	1882	* @param TIMx Timer instance
Kojto	136:ef9c61f8c49f	1883	* @param Channel This parameter can be one of the following values:
Kojto	136:ef9c61f8c49f	1884	* @arg @ref LL_TIM_CHANNEL_CH1
Kojto	136:ef9c61f8c49f	1885	* @arg @ref LL_TIM_CHANNEL_CH2
Kojto	136:ef9c61f8c49f	1886	* @arg @ref LL_TIM_CHANNEL_CH3
Kojto	136:ef9c61f8c49f	1887	* @arg @ref LL_TIM_CHANNEL_CH4
Kojto	136:ef9c61f8c49f	1888	* @retval Returned value can be one of the following values:
Kojto	136:ef9c61f8c49f	1889	* @arg @ref LL_TIM_ACTIVEINPUT_DIRECTTI
Kojto	136:ef9c61f8c49f	1890	* @arg @ref LL_TIM_ACTIVEINPUT_INDIRECTTI
Kojto	136:ef9c61f8c49f	1891	* @arg @ref LL_TIM_ACTIVEINPUT_TRC
Kojto	136:ef9c61f8c49f	1892	*/
Kojto	136:ef9c61f8c49f	1893	__STATIC_INLINE uint32_t LL_TIM_IC_GetActiveInput(TIM_TypeDef * TIMx, uint32_t Channel)
Kojto	136:ef9c61f8c49f	1894	{
Kojto	136:ef9c61f8c49f	1895	register uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel);
Kojto	136:ef9c61f8c49f	1896	register uint32_t * pReg = (uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1)+ OFFSET_TAB_CCMRx[iChannel]));
Kojto	136:ef9c61f8c49f	1897	return ((READ_BIT(*pReg, ((TIM_CCMR1_CC1S) << SHIFT_TAB_ICxx[iChannel])) >> SHIFT_TAB_ICxx[iChannel]) << 16U);
Kojto	136:ef9c61f8c49f	1898	}
Kojto	136:ef9c61f8c49f	1899
Kojto	136:ef9c61f8c49f	1900	/**
Kojto	136:ef9c61f8c49f	1901	* @brief Set the prescaler of input channel.
Kojto	136:ef9c61f8c49f	1902	* @rmtoll CCMR1 IC1PSC LL_TIM_IC_SetPrescaler\n
Kojto	136:ef9c61f8c49f	1903	* CCMR1 IC2PSC LL_TIM_IC_SetPrescaler\n
Kojto	136:ef9c61f8c49f	1904	* CCMR2 IC3PSC LL_TIM_IC_SetPrescaler\n
Kojto	136:ef9c61f8c49f	1905	* CCMR2 IC4PSC LL_TIM_IC_SetPrescaler
Kojto	136:ef9c61f8c49f	1906	* @param TIMx Timer instance
Kojto	136:ef9c61f8c49f	1907	* @param Channel This parameter can be one of the following values:
Kojto	136:ef9c61f8c49f	1908	* @arg @ref LL_TIM_CHANNEL_CH1
Kojto	136:ef9c61f8c49f	1909	* @arg @ref LL_TIM_CHANNEL_CH2
Kojto	136:ef9c61f8c49f	1910	* @arg @ref LL_TIM_CHANNEL_CH3
Kojto	136:ef9c61f8c49f	1911	* @arg @ref LL_TIM_CHANNEL_CH4
Kojto	136:ef9c61f8c49f	1912	* @param ICPrescaler This parameter can be one of the following values:
Kojto	136:ef9c61f8c49f	1913	* @arg @ref LL_TIM_ICPSC_DIV1
Kojto	136:ef9c61f8c49f	1914	* @arg @ref LL_TIM_ICPSC_DIV2
Kojto	136:ef9c61f8c49f	1915	* @arg @ref LL_TIM_ICPSC_DIV4
Kojto	136:ef9c61f8c49f	1916	* @arg @ref LL_TIM_ICPSC_DIV8
Kojto	136:ef9c61f8c49f	1917	* @retval None
Kojto	136:ef9c61f8c49f	1918	*/
Kojto	136:ef9c61f8c49f	1919	__STATIC_INLINE void LL_TIM_IC_SetPrescaler(TIM_TypeDef * TIMx, uint32_t Channel, uint32_t ICPrescaler)
Kojto	136:ef9c61f8c49f	1920	{
Kojto	136:ef9c61f8c49f	1921	register uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel);
Kojto	136:ef9c61f8c49f	1922	register uint32_t * pReg = (uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1)+ OFFSET_TAB_CCMRx[iChannel]));
Kojto	136:ef9c61f8c49f	1923	MODIFY_REG(*pReg, ((TIM_CCMR1_IC1PSC) << SHIFT_TAB_ICxx[iChannel]), (ICPrescaler >> 16U) << SHIFT_TAB_ICxx[iChannel]);
Kojto	136:ef9c61f8c49f	1924	}
Kojto	136:ef9c61f8c49f	1925
Kojto	136:ef9c61f8c49f	1926	/**
Kojto	136:ef9c61f8c49f	1927	* @brief Get the current prescaler value acting on an input channel.
Kojto	136:ef9c61f8c49f	1928	* @rmtoll CCMR1 IC1PSC LL_TIM_IC_GetPrescaler\n
Kojto	136:ef9c61f8c49f	1929	* CCMR1 IC2PSC LL_TIM_IC_GetPrescaler\n
Kojto	136:ef9c61f8c49f	1930	* CCMR2 IC3PSC LL_TIM_IC_GetPrescaler\n
Kojto	136:ef9c61f8c49f	1931	* CCMR2 IC4PSC LL_TIM_IC_GetPrescaler
Kojto	136:ef9c61f8c49f	1932	* @param TIMx Timer instance
Kojto	136:ef9c61f8c49f	1933	* @param Channel This parameter can be one of the following values:
Kojto	136:ef9c61f8c49f	1934	* @arg @ref LL_TIM_CHANNEL_CH1
Kojto	136:ef9c61f8c49f	1935	* @arg @ref LL_TIM_CHANNEL_CH2
Kojto	136:ef9c61f8c49f	1936	* @arg @ref LL_TIM_CHANNEL_CH3
Kojto	136:ef9c61f8c49f	1937	* @arg @ref LL_TIM_CHANNEL_CH4
Kojto	136:ef9c61f8c49f	1938	* @retval Returned value can be one of the following values:
Kojto	136:ef9c61f8c49f	1939	* @arg @ref LL_TIM_ICPSC_DIV1
Kojto	136:ef9c61f8c49f	1940	* @arg @ref LL_TIM_ICPSC_DIV2
Kojto	136:ef9c61f8c49f	1941	* @arg @ref LL_TIM_ICPSC_DIV4
Kojto	136:ef9c61f8c49f	1942	* @arg @ref LL_TIM_ICPSC_DIV8
Kojto	136:ef9c61f8c49f	1943	*/
Kojto	136:ef9c61f8c49f	1944	__STATIC_INLINE uint32_t LL_TIM_IC_GetPrescaler(TIM_TypeDef * TIMx, uint32_t Channel)
Kojto	136:ef9c61f8c49f	1945	{
Kojto	136:ef9c61f8c49f	1946	register uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel);
Kojto	136:ef9c61f8c49f	1947	register uint32_t * pReg = (uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1)+ OFFSET_TAB_CCMRx[iChannel]));
Kojto	136:ef9c61f8c49f	1948	return ((READ_BIT(*pReg, ((TIM_CCMR1_IC1PSC) << SHIFT_TAB_ICxx[iChannel])) >> SHIFT_TAB_ICxx[iChannel]) << 16U);
Kojto	136:ef9c61f8c49f	1949	}
Kojto	136:ef9c61f8c49f	1950
Kojto	136:ef9c61f8c49f	1951	/**
Kojto	136:ef9c61f8c49f	1952	* @brief Set the input filter duration.
Kojto	136:ef9c61f8c49f	1953	* @rmtoll CCMR1 IC1F LL_TIM_IC_SetFilter\n
Kojto	136:ef9c61f8c49f	1954	* CCMR1 IC2F LL_TIM_IC_SetFilter\n
Kojto	136:ef9c61f8c49f	1955	* CCMR2 IC3F LL_TIM_IC_SetFilter\n
Kojto	136:ef9c61f8c49f	1956	* CCMR2 IC4F LL_TIM_IC_SetFilter
Kojto	136:ef9c61f8c49f	1957	* @param TIMx Timer instance
Kojto	136:ef9c61f8c49f	1958	* @param Channel This parameter can be one of the following values:
Kojto	136:ef9c61f8c49f	1959	* @arg @ref LL_TIM_CHANNEL_CH1
Kojto	136:ef9c61f8c49f	1960	* @arg @ref LL_TIM_CHANNEL_CH2
Kojto	136:ef9c61f8c49f	1961	* @arg @ref LL_TIM_CHANNEL_CH3
Kojto	136:ef9c61f8c49f	1962	* @arg @ref LL_TIM_CHANNEL_CH4
Kojto	136:ef9c61f8c49f	1963	* @param ICFilter This parameter can be one of the following values:
Kojto	136:ef9c61f8c49f	1964	* @arg @ref LL_TIM_IC_FILTER_FDIV1
Kojto	136:ef9c61f8c49f	1965	* @arg @ref LL_TIM_IC_FILTER_FDIV1_N2
Kojto	136:ef9c61f8c49f	1966	* @arg @ref LL_TIM_IC_FILTER_FDIV1_N4
Kojto	136:ef9c61f8c49f	1967	* @arg @ref LL_TIM_IC_FILTER_FDIV1_N8
Kojto	136:ef9c61f8c49f	1968	* @arg @ref LL_TIM_IC_FILTER_FDIV2_N6
Kojto	136:ef9c61f8c49f	1969	* @arg @ref LL_TIM_IC_FILTER_FDIV2_N8
Kojto	136:ef9c61f8c49f	1970	* @arg @ref LL_TIM_IC_FILTER_FDIV4_N6
Kojto	136:ef9c61f8c49f	1971	* @arg @ref LL_TIM_IC_FILTER_FDIV4_N8
Kojto	136:ef9c61f8c49f	1972	* @arg @ref LL_TIM_IC_FILTER_FDIV8_N6
Kojto	136:ef9c61f8c49f	1973	* @arg @ref LL_TIM_IC_FILTER_FDIV8_N8
Kojto	136:ef9c61f8c49f	1974	* @arg @ref LL_TIM_IC_FILTER_FDIV16_N5
Kojto	136:ef9c61f8c49f	1975	* @arg @ref LL_TIM_IC_FILTER_FDIV16_N6
Kojto	136:ef9c61f8c49f	1976	* @arg @ref LL_TIM_IC_FILTER_FDIV16_N8
Kojto	136:ef9c61f8c49f	1977	* @arg @ref LL_TIM_IC_FILTER_FDIV32_N5
Kojto	136:ef9c61f8c49f	1978	* @arg @ref LL_TIM_IC_FILTER_FDIV32_N6
Kojto	136:ef9c61f8c49f	1979	* @arg @ref LL_TIM_IC_FILTER_FDIV32_N8
Kojto	136:ef9c61f8c49f	1980	* @retval None
Kojto	136:ef9c61f8c49f	1981	*/
Kojto	136:ef9c61f8c49f	1982	__STATIC_INLINE void LL_TIM_IC_SetFilter(TIM_TypeDef * TIMx, uint32_t Channel, uint32_t ICFilter)
Kojto	136:ef9c61f8c49f	1983	{
Kojto	136:ef9c61f8c49f	1984	register uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel);
Kojto	136:ef9c61f8c49f	1985	register uint32_t * pReg = (uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1)+ OFFSET_TAB_CCMRx[iChannel]));
Kojto	136:ef9c61f8c49f	1986	MODIFY_REG(*pReg, ((TIM_CCMR1_IC1F) << SHIFT_TAB_ICxx[iChannel]), (ICFilter >> 16U) << SHIFT_TAB_ICxx[iChannel]);
Kojto	136:ef9c61f8c49f	1987	}
Kojto	136:ef9c61f8c49f	1988
Kojto	136:ef9c61f8c49f	1989	/**
Kojto	136:ef9c61f8c49f	1990	* @brief Get the input filter duration.
Kojto	136:ef9c61f8c49f	1991	* @rmtoll CCMR1 IC1F LL_TIM_IC_GetFilter\n
Kojto	136:ef9c61f8c49f	1992	* CCMR1 IC2F LL_TIM_IC_GetFilter\n
Kojto	136:ef9c61f8c49f	1993	* CCMR2 IC3F LL_TIM_IC_GetFilter\n
Kojto	136:ef9c61f8c49f	1994	* CCMR2 IC4F LL_TIM_IC_GetFilter
Kojto	136:ef9c61f8c49f	1995	* @param TIMx Timer instance
Kojto	136:ef9c61f8c49f	1996	* @param Channel This parameter can be one of the following values:
Kojto	136:ef9c61f8c49f	1997	* @arg @ref LL_TIM_CHANNEL_CH1
Kojto	136:ef9c61f8c49f	1998	* @arg @ref LL_TIM_CHANNEL_CH2
Kojto	136:ef9c61f8c49f	1999	* @arg @ref LL_TIM_CHANNEL_CH3
Kojto	136:ef9c61f8c49f	2000	* @arg @ref LL_TIM_CHANNEL_CH4
Kojto	136:ef9c61f8c49f	2001	* @retval Returned value can be one of the following values:
Kojto	136:ef9c61f8c49f	2002	* @arg @ref LL_TIM_IC_FILTER_FDIV1
Kojto	136:ef9c61f8c49f	2003	* @arg @ref LL_TIM_IC_FILTER_FDIV1_N2
Kojto	136:ef9c61f8c49f	2004	* @arg @ref LL_TIM_IC_FILTER_FDIV1_N4
Kojto	136:ef9c61f8c49f	2005	* @arg @ref LL_TIM_IC_FILTER_FDIV1_N8
Kojto	136:ef9c61f8c49f	2006	* @arg @ref LL_TIM_IC_FILTER_FDIV2_N6
Kojto	136:ef9c61f8c49f	2007	* @arg @ref LL_TIM_IC_FILTER_FDIV2_N8
Kojto	136:ef9c61f8c49f	2008	* @arg @ref LL_TIM_IC_FILTER_FDIV4_N6
Kojto	136:ef9c61f8c49f	2009	* @arg @ref LL_TIM_IC_FILTER_FDIV4_N8
Kojto	136:ef9c61f8c49f	2010	* @arg @ref LL_TIM_IC_FILTER_FDIV8_N6
Kojto	136:ef9c61f8c49f	2011	* @arg @ref LL_TIM_IC_FILTER_FDIV8_N8
Kojto	136:ef9c61f8c49f	2012	* @arg @ref LL_TIM_IC_FILTER_FDIV16_N5
Kojto	136:ef9c61f8c49f	2013	* @arg @ref LL_TIM_IC_FILTER_FDIV16_N6
Kojto	136:ef9c61f8c49f	2014	* @arg @ref LL_TIM_IC_FILTER_FDIV16_N8
Kojto	136:ef9c61f8c49f	2015	* @arg @ref LL_TIM_IC_FILTER_FDIV32_N5
Kojto	136:ef9c61f8c49f	2016	* @arg @ref LL_TIM_IC_FILTER_FDIV32_N6
Kojto	136:ef9c61f8c49f	2017	* @arg @ref LL_TIM_IC_FILTER_FDIV32_N8
Kojto	136:ef9c61f8c49f	2018	*/
Kojto	136:ef9c61f8c49f	2019	__STATIC_INLINE uint32_t LL_TIM_IC_GetFilter(TIM_TypeDef * TIMx, uint32_t Channel)
Kojto	136:ef9c61f8c49f	2020	{
Kojto	136:ef9c61f8c49f	2021	register uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel);
Kojto	136:ef9c61f8c49f	2022	register uint32_t * pReg = (uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1)+ OFFSET_TAB_CCMRx[iChannel]));
Kojto	136:ef9c61f8c49f	2023	return ((READ_BIT(*pReg, ((TIM_CCMR1_IC1F) << SHIFT_TAB_ICxx[iChannel])) >> SHIFT_TAB_ICxx[iChannel]) << 16U );
Kojto	136:ef9c61f8c49f	2024	}
Kojto	136:ef9c61f8c49f	2025
Kojto	136:ef9c61f8c49f	2026	/**
Kojto	136:ef9c61f8c49f	2027	* @brief Set the input channel polarity.
Kojto	136:ef9c61f8c49f	2028	* @rmtoll CCER CC1P LL_TIM_IC_SetPolarity\n
Kojto	136:ef9c61f8c49f	2029	* CCER CC1NP LL_TIM_IC_SetPolarity\n
Kojto	136:ef9c61f8c49f	2030	* CCER CC2P LL_TIM_IC_SetPolarity\n
Kojto	136:ef9c61f8c49f	2031	* CCER CC2NP LL_TIM_IC_SetPolarity\n
Kojto	136:ef9c61f8c49f	2032	* CCER CC3P LL_TIM_IC_SetPolarity\n
Kojto	136:ef9c61f8c49f	2033	* CCER CC3NP LL_TIM_IC_SetPolarity\n
Kojto	136:ef9c61f8c49f	2034	* CCER CC4P LL_TIM_IC_SetPolarity\n
Kojto	136:ef9c61f8c49f	2035	* CCER CC4NP LL_TIM_IC_SetPolarity
Kojto	136:ef9c61f8c49f	2036	* @param TIMx Timer instance
Kojto	136:ef9c61f8c49f	2037	* @param Channel This parameter can be one of the following values:
Kojto	136:ef9c61f8c49f	2038	* @arg @ref LL_TIM_CHANNEL_CH1
Kojto	136:ef9c61f8c49f	2039	* @arg @ref LL_TIM_CHANNEL_CH2
Kojto	136:ef9c61f8c49f	2040	* @arg @ref LL_TIM_CHANNEL_CH3
Kojto	136:ef9c61f8c49f	2041	* @arg @ref LL_TIM_CHANNEL_CH4
Kojto	136:ef9c61f8c49f	2042	* @param ICPolarity This parameter can be one of the following values:
Kojto	136:ef9c61f8c49f	2043	* @arg @ref LL_TIM_IC_POLARITY_RISING
Kojto	136:ef9c61f8c49f	2044	* @arg @ref LL_TIM_IC_POLARITY_FALLING
Kojto	136:ef9c61f8c49f	2045	* @arg @ref LL_TIM_IC_POLARITY_BOTHEDGE
Kojto	136:ef9c61f8c49f	2046	* @retval None
Kojto	136:ef9c61f8c49f	2047	*/
Kojto	136:ef9c61f8c49f	2048	__STATIC_INLINE void LL_TIM_IC_SetPolarity(TIM_TypeDef * TIMx, uint32_t Channel, uint32_t ICPolarity)
Kojto	136:ef9c61f8c49f	2049	{
Kojto	136:ef9c61f8c49f	2050	register uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel);
Kojto	136:ef9c61f8c49f	2051	MODIFY_REG(TIMx->CCER, ((TIM_CCER_CC1NP \| TIM_CCER_CC1P) << SHIFT_TAB_CCxP[iChannel]), ICPolarity << SHIFT_TAB_CCxP[iChannel]);
Kojto	136:ef9c61f8c49f	2052	}
Kojto	136:ef9c61f8c49f	2053
Kojto	136:ef9c61f8c49f	2054	/**
Kojto	136:ef9c61f8c49f	2055	* @brief Get the current input channel polarity.
Kojto	136:ef9c61f8c49f	2056	* @rmtoll CCER CC1P LL_TIM_IC_GetPolarity\n
Kojto	136:ef9c61f8c49f	2057	* CCER CC1NP LL_TIM_IC_GetPolarity\n
Kojto	136:ef9c61f8c49f	2058	* CCER CC2P LL_TIM_IC_GetPolarity\n
Kojto	136:ef9c61f8c49f	2059	* CCER CC2NP LL_TIM_IC_GetPolarity\n
Kojto	136:ef9c61f8c49f	2060	* CCER CC3P LL_TIM_IC_GetPolarity\n
Kojto	136:ef9c61f8c49f	2061	* CCER CC3NP LL_TIM_IC_GetPolarity\n
Kojto	136:ef9c61f8c49f	2062	* CCER CC4P LL_TIM_IC_GetPolarity\n
Kojto	136:ef9c61f8c49f	2063	* CCER CC4NP LL_TIM_IC_GetPolarity
Kojto	136:ef9c61f8c49f	2064	* @param TIMx Timer instance
Kojto	136:ef9c61f8c49f	2065	* @param Channel This parameter can be one of the following values:
Kojto	136:ef9c61f8c49f	2066	* @arg @ref LL_TIM_CHANNEL_CH1
Kojto	136:ef9c61f8c49f	2067	* @arg @ref LL_TIM_CHANNEL_CH2
Kojto	136:ef9c61f8c49f	2068	* @arg @ref LL_TIM_CHANNEL_CH3
Kojto	136:ef9c61f8c49f	2069	* @arg @ref LL_TIM_CHANNEL_CH4
Kojto	136:ef9c61f8c49f	2070	* @retval Returned value can be one of the following values:
Kojto	136:ef9c61f8c49f	2071	* @arg @ref LL_TIM_IC_POLARITY_RISING
Kojto	136:ef9c61f8c49f	2072	* @arg @ref LL_TIM_IC_POLARITY_FALLING
Kojto	136:ef9c61f8c49f	2073	* @arg @ref LL_TIM_IC_POLARITY_BOTHEDGE
Kojto	136:ef9c61f8c49f	2074	*/
Kojto	136:ef9c61f8c49f	2075	__STATIC_INLINE uint32_t LL_TIM_IC_GetPolarity(TIM_TypeDef * TIMx, uint32_t Channel)
Kojto	136:ef9c61f8c49f	2076	{
Kojto	136:ef9c61f8c49f	2077	register uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel);
Kojto	136:ef9c61f8c49f	2078	return (READ_BIT(TIMx->CCER, ((TIM_CCER_CC1NP \| TIM_CCER_CC1P) << SHIFT_TAB_CCxP[iChannel])) >> SHIFT_TAB_CCxP[iChannel]);
Kojto	136:ef9c61f8c49f	2079	}
Kojto	136:ef9c61f8c49f	2080
Kojto	136:ef9c61f8c49f	2081	/**
Kojto	136:ef9c61f8c49f	2082	* @brief Connect the TIMx_CH1, CH2 and CH3 pins to the TI1 input (XOR combination).
Kojto	136:ef9c61f8c49f	2083	* @note Macro @ref IS_TIM_XOR_INSTANCE(TIMx) can be used to check whether or not
Kojto	136:ef9c61f8c49f	2084	* a timer instance provides an XOR input.
Kojto	136:ef9c61f8c49f	2085	* @rmtoll CR2 TI1S LL_TIM_IC_EnableXORCombination
Kojto	136:ef9c61f8c49f	2086	* @param TIMx Timer instance
Kojto	136:ef9c61f8c49f	2087	* @retval None
Kojto	136:ef9c61f8c49f	2088	*/
Kojto	136:ef9c61f8c49f	2089	__STATIC_INLINE void LL_TIM_IC_EnableXORCombination(TIM_TypeDef * TIMx)
Kojto	136:ef9c61f8c49f	2090	{
Kojto	136:ef9c61f8c49f	2091	SET_BIT(TIMx->CR2, TIM_CR2_TI1S);
Kojto	136:ef9c61f8c49f	2092	}
Kojto	136:ef9c61f8c49f	2093
Kojto	136:ef9c61f8c49f	2094	/**
Kojto	136:ef9c61f8c49f	2095	* @brief Disconnect the TIMx_CH1, CH2 and CH3 pins from the TI1 input.
Kojto	136:ef9c61f8c49f	2096	* @note Macro @ref IS_TIM_XOR_INSTANCE(TIMx) can be used to check whether or not
Kojto	136:ef9c61f8c49f	2097	* a timer instance provides an XOR input.
Kojto	136:ef9c61f8c49f	2098	* @rmtoll CR2 TI1S LL_TIM_IC_DisableXORCombination
Kojto	136:ef9c61f8c49f	2099	* @param TIMx Timer instance
Kojto	136:ef9c61f8c49f	2100	* @retval None
Kojto	136:ef9c61f8c49f	2101	*/
Kojto	136:ef9c61f8c49f	2102	__STATIC_INLINE void LL_TIM_IC_DisableXORCombination(TIM_TypeDef * TIMx)
Kojto	136:ef9c61f8c49f	2103	{
Kojto	136:ef9c61f8c49f	2104	CLEAR_BIT(TIMx->CR2, TIM_CR2_TI1S);
Kojto	136:ef9c61f8c49f	2105	}
Kojto	136:ef9c61f8c49f	2106
Kojto	136:ef9c61f8c49f	2107	/**
Kojto	136:ef9c61f8c49f	2108	* @brief Indicates whether the TIMx_CH1, CH2 and CH3 pins are connectected to the TI1 input.
Kojto	136:ef9c61f8c49f	2109	* @note Macro @ref IS_TIM_XOR_INSTANCE(TIMx) can be used to check whether or not
Kojto	136:ef9c61f8c49f	2110	* a timer instance provides an XOR input.
Kojto	136:ef9c61f8c49f	2111	* @rmtoll CR2 TI1S LL_TIM_IC_IsEnabledXORCombination
Kojto	136:ef9c61f8c49f	2112	* @param TIMx Timer instance
Kojto	136:ef9c61f8c49f	2113	* @retval State of bit (1 or 0).
Kojto	136:ef9c61f8c49f	2114	*/
Kojto	136:ef9c61f8c49f	2115	__STATIC_INLINE uint32_t LL_TIM_IC_IsEnabledXORCombination(TIM_TypeDef * TIMx)
Kojto	136:ef9c61f8c49f	2116	{
Kojto	136:ef9c61f8c49f	2117	return (READ_BIT(TIMx->CR2, TIM_CR2_TI1S) == (TIM_CR2_TI1S));
Kojto	136:ef9c61f8c49f	2118	}
Kojto	136:ef9c61f8c49f	2119
Kojto	136:ef9c61f8c49f	2120	/**
Kojto	136:ef9c61f8c49f	2121	* @brief Get captured value for input channel 1.
Kojto	136:ef9c61f8c49f	2122	* @note Macro @ref IS_TIM_CC1_INSTANCE(TIMx) can be used to check whether or not
Kojto	136:ef9c61f8c49f	2123	* input channel 1 is supported by a timer instance.
Kojto	136:ef9c61f8c49f	2124	* @rmtoll CCR1 CCR1 LL_TIM_IC_GetCaptureCH1
Kojto	136:ef9c61f8c49f	2125	* @param TIMx Timer instance
Kojto	136:ef9c61f8c49f	2126	* @retval CapturedValue (between Min_Data=0 and Max_Data=65535)
Kojto	136:ef9c61f8c49f	2127	*/
Kojto	136:ef9c61f8c49f	2128	__STATIC_INLINE uint32_t LL_TIM_IC_GetCaptureCH1(TIM_TypeDef * TIMx)
Kojto	136:ef9c61f8c49f	2129	{
Kojto	136:ef9c61f8c49f	2130	return (uint32_t)(READ_REG(TIMx->CCR1));
Kojto	136:ef9c61f8c49f	2131	}
Kojto	136:ef9c61f8c49f	2132
Kojto	136:ef9c61f8c49f	2133	/**
Kojto	136:ef9c61f8c49f	2134	* @brief Get captured value for input channel 2.
Kojto	136:ef9c61f8c49f	2135	* @note Macro @ref IS_TIM_CC2_INSTANCE(TIMx) can be used to check whether or not
Kojto	136:ef9c61f8c49f	2136	* input channel 2 is supported by a timer instance.
Kojto	136:ef9c61f8c49f	2137	* @rmtoll CCR2 CCR2 LL_TIM_IC_GetCaptureCH2
Kojto	136:ef9c61f8c49f	2138	* @param TIMx Timer instance
Kojto	136:ef9c61f8c49f	2139	* @retval CapturedValue (between Min_Data=0 and Max_Data=65535)
Kojto	136:ef9c61f8c49f	2140	*/
Kojto	136:ef9c61f8c49f	2141	__STATIC_INLINE uint32_t LL_TIM_IC_GetCaptureCH2(TIM_TypeDef * TIMx)
Kojto	136:ef9c61f8c49f	2142	{
Kojto	136:ef9c61f8c49f	2143	return (uint32_t)(READ_REG(TIMx->CCR2));
Kojto	136:ef9c61f8c49f	2144	}
Kojto	136:ef9c61f8c49f	2145
Kojto	136:ef9c61f8c49f	2146	/**
Kojto	136:ef9c61f8c49f	2147	* @brief Get captured value for input channel 3.
Kojto	136:ef9c61f8c49f	2148	* @note Macro @ref IS_TIM_CC3_INSTANCE(TIMx) can be used to check whether or not
Kojto	136:ef9c61f8c49f	2149	* input channel 3 is supported by a timer instance.
Kojto	136:ef9c61f8c49f	2150	* @rmtoll CCR3 CCR3 LL_TIM_IC_GetCaptureCH3
Kojto	136:ef9c61f8c49f	2151	* @param TIMx Timer instance
Kojto	136:ef9c61f8c49f	2152	* @retval CapturedValue (between Min_Data=0 and Max_Data=65535)
Kojto	136:ef9c61f8c49f	2153	*/
Kojto	136:ef9c61f8c49f	2154	__STATIC_INLINE uint32_t LL_TIM_IC_GetCaptureCH3(TIM_TypeDef * TIMx)
Kojto	136:ef9c61f8c49f	2155	{
Kojto	136:ef9c61f8c49f	2156	return (uint32_t)(READ_REG(TIMx->CCR3));
Kojto	136:ef9c61f8c49f	2157	}
Kojto	136:ef9c61f8c49f	2158
Kojto	136:ef9c61f8c49f	2159	/**
Kojto	136:ef9c61f8c49f	2160	* @brief Get captured value for input channel 4.
Kojto	136:ef9c61f8c49f	2161	* @note Macro @ref IS_TIM_CC4_INSTANCE(TIMx) can be used to check whether or not
Kojto	136:ef9c61f8c49f	2162	* input channel 4 is supported by a timer instance.
Kojto	136:ef9c61f8c49f	2163	* @rmtoll CCR4 CCR4 LL_TIM_IC_GetCaptureCH4
Kojto	136:ef9c61f8c49f	2164	* @param TIMx Timer instance
Kojto	136:ef9c61f8c49f	2165	* @retval CapturedValue (between Min_Data=0 and Max_Data=65535)
Kojto	136:ef9c61f8c49f	2166	*/
Kojto	136:ef9c61f8c49f	2167	__STATIC_INLINE uint32_t LL_TIM_IC_GetCaptureCH4(TIM_TypeDef * TIMx)
Kojto	136:ef9c61f8c49f	2168	{
Kojto	136:ef9c61f8c49f	2169	return (uint32_t)(READ_REG(TIMx->CCR4));
Kojto	136:ef9c61f8c49f	2170	}
Kojto	136:ef9c61f8c49f	2171
Kojto	136:ef9c61f8c49f	2172	/**
Kojto	136:ef9c61f8c49f	2173	* @}
Kojto	136:ef9c61f8c49f	2174	*/
Kojto	136:ef9c61f8c49f	2175
Kojto	136:ef9c61f8c49f	2176	/** @defgroup TIM_LL_EF_Clock_Selection Counter clock selection
Kojto	136:ef9c61f8c49f	2177	* @{
Kojto	136:ef9c61f8c49f	2178	*/
Kojto	136:ef9c61f8c49f	2179	/**
Kojto	136:ef9c61f8c49f	2180	* @brief Enable external clock mode 2.
Kojto	136:ef9c61f8c49f	2181	* @note When external clock mode 2 is enabled the counter is clocked by any active edge on the ETRF signal.
Kojto	136:ef9c61f8c49f	2182	* @note Macro @ref IS_TIM_CLOCKSOURCE_ETRMODE2_INSTANCE(TIMx) can be used to check
Kojto	136:ef9c61f8c49f	2183	* whether or not a timer instance supports external clock mode2.
Kojto	136:ef9c61f8c49f	2184	* @rmtoll SMCR ECE LL_TIM_EnableExternalClock
Kojto	136:ef9c61f8c49f	2185	* @param TIMx Timer instance
Kojto	136:ef9c61f8c49f	2186	* @retval None
Kojto	136:ef9c61f8c49f	2187	*/
Kojto	136:ef9c61f8c49f	2188	__STATIC_INLINE void LL_TIM_EnableExternalClock(TIM_TypeDef * TIMx)
Kojto	136:ef9c61f8c49f	2189	{
Kojto	136:ef9c61f8c49f	2190	SET_BIT(TIMx->SMCR, TIM_SMCR_ECE);
Kojto	136:ef9c61f8c49f	2191	}
Kojto	136:ef9c61f8c49f	2192
Kojto	136:ef9c61f8c49f	2193	/**
Kojto	136:ef9c61f8c49f	2194	* @brief Disable external clock mode 2.
Kojto	136:ef9c61f8c49f	2195	* @note Macro @ref IS_TIM_CLOCKSOURCE_ETRMODE2_INSTANCE(TIMx) can be used to check
Kojto	136:ef9c61f8c49f	2196	* whether or not a timer instance supports external clock mode2.
Kojto	136:ef9c61f8c49f	2197	* @rmtoll SMCR ECE LL_TIM_DisableExternalClock
Kojto	136:ef9c61f8c49f	2198	* @param TIMx Timer instance
Kojto	136:ef9c61f8c49f	2199	* @retval None
Kojto	136:ef9c61f8c49f	2200	*/
Kojto	136:ef9c61f8c49f	2201	__STATIC_INLINE void LL_TIM_DisableExternalClock(TIM_TypeDef * TIMx)
Kojto	136:ef9c61f8c49f	2202	{
Kojto	136:ef9c61f8c49f	2203	CLEAR_BIT(TIMx->SMCR, TIM_SMCR_ECE);
Kojto	136:ef9c61f8c49f	2204	}
Kojto	136:ef9c61f8c49f	2205
Kojto	136:ef9c61f8c49f	2206	/**
Kojto	136:ef9c61f8c49f	2207	* @brief Indicate whether external clock mode 2 is enabled.
Kojto	136:ef9c61f8c49f	2208	* @note Macro @ref IS_TIM_CLOCKSOURCE_ETRMODE2_INSTANCE(TIMx) can be used to check
Kojto	136:ef9c61f8c49f	2209	* whether or not a timer instance supports external clock mode2.
Kojto	136:ef9c61f8c49f	2210	* @rmtoll SMCR ECE LL_TIM_IsEnabledExternalClock
Kojto	136:ef9c61f8c49f	2211	* @param TIMx Timer instance
Kojto	136:ef9c61f8c49f	2212	* @retval State of bit (1 or 0).
Kojto	136:ef9c61f8c49f	2213	*/
Kojto	136:ef9c61f8c49f	2214	__STATIC_INLINE uint32_t LL_TIM_IsEnabledExternalClock(TIM_TypeDef * TIMx)
Kojto	136:ef9c61f8c49f	2215	{
Kojto	136:ef9c61f8c49f	2216	return (READ_BIT(TIMx->SMCR, TIM_SMCR_ECE) == (TIM_SMCR_ECE));
Kojto	136:ef9c61f8c49f	2217	}
Kojto	136:ef9c61f8c49f	2218
Kojto	136:ef9c61f8c49f	2219	/**
Kojto	136:ef9c61f8c49f	2220	* @brief Set the clock source of the counter clock.
Kojto	136:ef9c61f8c49f	2221	* @note when selected clock source is external clock mode 1, the timer input
Kojto	136:ef9c61f8c49f	2222	* the external clock is applied is selected by calling the @ref LL_TIM_SetTriggerInput()
Kojto	136:ef9c61f8c49f	2223	* function. This timer input must be configured by calling
Kojto	136:ef9c61f8c49f	2224	* the @ref LL_TIM_IC_Config() function.
Kojto	136:ef9c61f8c49f	2225	* @note Macro @ref IS_TIM_CLOCKSOURCE_ETRMODE1_INSTANCE(TIMx) can be used to check
Kojto	136:ef9c61f8c49f	2226	* whether or not a timer instance supports external clock mode1.
Kojto	136:ef9c61f8c49f	2227	* @note Macro @ref IS_TIM_CLOCKSOURCE_ETRMODE2_INSTANCE(TIMx) can be used to check
Kojto	136:ef9c61f8c49f	2228	* whether or not a timer instance supports external clock mode2.
Kojto	136:ef9c61f8c49f	2229	* @rmtoll SMCR SMS LL_TIM_SetClockSource\n
Kojto	136:ef9c61f8c49f	2230	* SMCR ECE LL_TIM_SetClockSource
Kojto	136:ef9c61f8c49f	2231	* @param TIMx Timer instance
Kojto	136:ef9c61f8c49f	2232	* @param ClockSource This parameter can be one of the following values:
Kojto	136:ef9c61f8c49f	2233	* @arg @ref LL_TIM_CLOCKSOURCE_INTERNAL
Kojto	136:ef9c61f8c49f	2234	* @arg @ref LL_TIM_CLOCKSOURCE_EXT_MODE1
Kojto	136:ef9c61f8c49f	2235	* @arg @ref LL_TIM_CLOCKSOURCE_EXT_MODE2
Kojto	136:ef9c61f8c49f	2236	* @retval None
Kojto	136:ef9c61f8c49f	2237	*/
Kojto	136:ef9c61f8c49f	2238	__STATIC_INLINE void LL_TIM_SetClockSource(TIM_TypeDef * TIMx, uint32_t ClockSource)
Kojto	136:ef9c61f8c49f	2239	{
Kojto	136:ef9c61f8c49f	2240	MODIFY_REG(TIMx->SMCR, TIM_SMCR_SMS \| TIM_SMCR_ECE, ClockSource);
Kojto	136:ef9c61f8c49f	2241	}
Kojto	136:ef9c61f8c49f	2242
Kojto	136:ef9c61f8c49f	2243	/**
Kojto	136:ef9c61f8c49f	2244	* @brief Set the encoder interface mode.
Kojto	136:ef9c61f8c49f	2245	* @note Macro @ref IS_TIM_ENCODER_INTERFACE_INSTANCE(TIMx) can be used to check
Kojto	136:ef9c61f8c49f	2246	* whether or not a timer instance supports the encoder mode.
Kojto	136:ef9c61f8c49f	2247	* @rmtoll SMCR SMS LL_TIM_SetEncoderMode
Kojto	136:ef9c61f8c49f	2248	* @param TIMx Timer instance
Kojto	136:ef9c61f8c49f	2249	* @param EncoderMode This parameter can be one of the following values:
Kojto	136:ef9c61f8c49f	2250	* @arg @ref LL_TIM_ENCODERMODE_X2_TI1
Kojto	136:ef9c61f8c49f	2251	* @arg @ref LL_TIM_ENCODERMODE_X2_TI2
Kojto	136:ef9c61f8c49f	2252	* @arg @ref LL_TIM_ENCODERMODE_X4_TI12
Kojto	136:ef9c61f8c49f	2253	* @retval None
Kojto	136:ef9c61f8c49f	2254	*/
Kojto	136:ef9c61f8c49f	2255	__STATIC_INLINE void LL_TIM_SetEncoderMode(TIM_TypeDef * TIMx, uint32_t EncoderMode)
Kojto	136:ef9c61f8c49f	2256	{
Kojto	136:ef9c61f8c49f	2257	MODIFY_REG(TIMx->SMCR, TIM_SMCR_SMS, EncoderMode);
Kojto	136:ef9c61f8c49f	2258	}
Kojto	136:ef9c61f8c49f	2259
Kojto	136:ef9c61f8c49f	2260	/**
Kojto	136:ef9c61f8c49f	2261	* @}
Kojto	136:ef9c61f8c49f	2262	*/
Kojto	136:ef9c61f8c49f	2263
Kojto	136:ef9c61f8c49f	2264	/** @defgroup TIM_LL_EF_Timer_Synchronization Timer synchronisation configuration
Kojto	136:ef9c61f8c49f	2265	* @{
Kojto	136:ef9c61f8c49f	2266	*/
Kojto	136:ef9c61f8c49f	2267	/**
Kojto	136:ef9c61f8c49f	2268	* @brief Set the trigger output (TRGO) used for timer synchronization .
Kojto	136:ef9c61f8c49f	2269	* @note Macro @ref IS_TIM_MASTER_INSTANCE(TIMx) can be used to check
Kojto	136:ef9c61f8c49f	2270	* whether or not a timer instance can operate as a master timer.
Kojto	136:ef9c61f8c49f	2271	* @rmtoll CR2 MMS LL_TIM_SetTriggerOutput
Kojto	136:ef9c61f8c49f	2272	* @param TIMx Timer instance
Kojto	136:ef9c61f8c49f	2273	* @param TimerSynchronization This parameter can be one of the following values:
Kojto	136:ef9c61f8c49f	2274	* @arg @ref LL_TIM_TRGO_RESET
Kojto	136:ef9c61f8c49f	2275	* @arg @ref LL_TIM_TRGO_ENABLE
Kojto	136:ef9c61f8c49f	2276	* @arg @ref LL_TIM_TRGO_UPDATE
Kojto	136:ef9c61f8c49f	2277	* @arg @ref LL_TIM_TRGO_CC1IF
Kojto	136:ef9c61f8c49f	2278	* @arg @ref LL_TIM_TRGO_OC1REF
Kojto	136:ef9c61f8c49f	2279	* @arg @ref LL_TIM_TRGO_OC2REF
Kojto	136:ef9c61f8c49f	2280	* @arg @ref LL_TIM_TRGO_OC3REF
Kojto	136:ef9c61f8c49f	2281	* @arg @ref LL_TIM_TRGO_OC4REF
Kojto	136:ef9c61f8c49f	2282	* @retval None
Kojto	136:ef9c61f8c49f	2283	*/
Kojto	136:ef9c61f8c49f	2284	__STATIC_INLINE void LL_TIM_SetTriggerOutput(TIM_TypeDef * TIMx, uint32_t TimerSynchronization)
Kojto	136:ef9c61f8c49f	2285	{
Kojto	136:ef9c61f8c49f	2286	MODIFY_REG(TIMx->CR2, TIM_CR2_MMS, TimerSynchronization);
Kojto	136:ef9c61f8c49f	2287	}
Kojto	136:ef9c61f8c49f	2288
Kojto	136:ef9c61f8c49f	2289
Kojto	136:ef9c61f8c49f	2290	/**
Kojto	136:ef9c61f8c49f	2291	* @brief Set the synchronization mode of a slave timer.
Kojto	136:ef9c61f8c49f	2292	* @note Macro @ref IS_TIM_SLAVE_INSTANCE(TIMx) can be used to check whether or not
Kojto	136:ef9c61f8c49f	2293	* a timer instance can operate as a slave timer.
Kojto	136:ef9c61f8c49f	2294	* @rmtoll SMCR SMS LL_TIM_SetSlaveMode
Kojto	136:ef9c61f8c49f	2295	* @param TIMx Timer instance
Kojto	136:ef9c61f8c49f	2296	* @param SlaveMode This parameter can be one of the following values:
Kojto	136:ef9c61f8c49f	2297	* @arg @ref LL_TIM_SLAVEMODE_DISABLED
Kojto	136:ef9c61f8c49f	2298	* @arg @ref LL_TIM_SLAVEMODE_RESET
Kojto	136:ef9c61f8c49f	2299	* @arg @ref LL_TIM_SLAVEMODE_GATED
Kojto	136:ef9c61f8c49f	2300	* @arg @ref LL_TIM_SLAVEMODE_TRIGGER
Kojto	136:ef9c61f8c49f	2301	* @retval None
Kojto	136:ef9c61f8c49f	2302	*/
Kojto	136:ef9c61f8c49f	2303	__STATIC_INLINE void LL_TIM_SetSlaveMode(TIM_TypeDef * TIMx, uint32_t SlaveMode)
Kojto	136:ef9c61f8c49f	2304	{
Kojto	136:ef9c61f8c49f	2305	MODIFY_REG(TIMx->SMCR, TIM_SMCR_SMS, SlaveMode);
Kojto	136:ef9c61f8c49f	2306	}
Kojto	136:ef9c61f8c49f	2307
Kojto	136:ef9c61f8c49f	2308	/**
Kojto	136:ef9c61f8c49f	2309	* @brief Set the selects the trigger input to be used to synchronize the counter.
Kojto	136:ef9c61f8c49f	2310	* @note Macro @ref IS_TIM_SLAVE_INSTANCE(TIMx) can be used to check whether or not
Kojto	136:ef9c61f8c49f	2311	* a timer instance can operate as a slave timer.
Kojto	136:ef9c61f8c49f	2312	* @rmtoll SMCR TS LL_TIM_SetTriggerInput
Kojto	136:ef9c61f8c49f	2313	* @param TIMx Timer instance
Kojto	136:ef9c61f8c49f	2314	* @param TriggerInput This parameter can be one of the following values:
Kojto	136:ef9c61f8c49f	2315	* @arg @ref LL_TIM_TS_ITR0
Kojto	136:ef9c61f8c49f	2316	* @arg @ref LL_TIM_TS_ITR1
Kojto	136:ef9c61f8c49f	2317	* @arg @ref LL_TIM_TS_ITR2
Kojto	136:ef9c61f8c49f	2318	* @arg @ref LL_TIM_TS_ITR3
Kojto	136:ef9c61f8c49f	2319	* @arg @ref LL_TIM_TS_TI1F_ED
Kojto	136:ef9c61f8c49f	2320	* @arg @ref LL_TIM_TS_TI1FP1
Kojto	136:ef9c61f8c49f	2321	* @arg @ref LL_TIM_TS_TI2FP2
Kojto	136:ef9c61f8c49f	2322	* @arg @ref LL_TIM_TS_ETRF
Kojto	136:ef9c61f8c49f	2323	* @retval None
Kojto	136:ef9c61f8c49f	2324	*/
Kojto	136:ef9c61f8c49f	2325	__STATIC_INLINE void LL_TIM_SetTriggerInput(TIM_TypeDef * TIMx, uint32_t TriggerInput)
Kojto	136:ef9c61f8c49f	2326	{
Kojto	136:ef9c61f8c49f	2327	MODIFY_REG(TIMx->SMCR, TIM_SMCR_TS, TriggerInput);
Kojto	136:ef9c61f8c49f	2328	}
Kojto	136:ef9c61f8c49f	2329
Kojto	136:ef9c61f8c49f	2330	/**
Kojto	136:ef9c61f8c49f	2331	* @brief Enable the Master/Slave mode.
Kojto	136:ef9c61f8c49f	2332	* @note Macro @ref IS_TIM_SLAVE_INSTANCE(TIMx) can be used to check whether or not
Kojto	136:ef9c61f8c49f	2333	* a timer instance can operate as a slave timer.
Kojto	136:ef9c61f8c49f	2334	* @rmtoll SMCR MSM LL_TIM_EnableMasterSlaveMode
Kojto	136:ef9c61f8c49f	2335	* @param TIMx Timer instance
Kojto	136:ef9c61f8c49f	2336	* @retval None
Kojto	136:ef9c61f8c49f	2337	*/
Kojto	136:ef9c61f8c49f	2338	__STATIC_INLINE void LL_TIM_EnableMasterSlaveMode(TIM_TypeDef * TIMx)
Kojto	136:ef9c61f8c49f	2339	{
Kojto	136:ef9c61f8c49f	2340	SET_BIT(TIMx->SMCR, TIM_SMCR_MSM);
Kojto	136:ef9c61f8c49f	2341	}
Kojto	136:ef9c61f8c49f	2342
Kojto	136:ef9c61f8c49f	2343	/**
Kojto	136:ef9c61f8c49f	2344	* @brief Disable the Master/Slave mode.
Kojto	136:ef9c61f8c49f	2345	* @note Macro @ref IS_TIM_SLAVE_INSTANCE(TIMx) can be used to check whether or not
Kojto	136:ef9c61f8c49f	2346	* a timer instance can operate as a slave timer.
Kojto	136:ef9c61f8c49f	2347	* @rmtoll SMCR MSM LL_TIM_DisableMasterSlaveMode
Kojto	136:ef9c61f8c49f	2348	* @param TIMx Timer instance
Kojto	136:ef9c61f8c49f	2349	* @retval None
Kojto	136:ef9c61f8c49f	2350	*/
Kojto	136:ef9c61f8c49f	2351	__STATIC_INLINE void LL_TIM_DisableMasterSlaveMode(TIM_TypeDef * TIMx)
Kojto	136:ef9c61f8c49f	2352	{
Kojto	136:ef9c61f8c49f	2353	CLEAR_BIT(TIMx->SMCR, TIM_SMCR_MSM);
Kojto	136:ef9c61f8c49f	2354	}
Kojto	136:ef9c61f8c49f	2355
Kojto	136:ef9c61f8c49f	2356	/**
Kojto	136:ef9c61f8c49f	2357	* @brief Indicates whether the Master/Slave mode is enabled.
Kojto	136:ef9c61f8c49f	2358	* @note Macro @ref IS_TIM_SLAVE_INSTANCE(TIMx) can be used to check whether or not
Kojto	136:ef9c61f8c49f	2359	* a timer instance can operate as a slave timer.
Kojto	136:ef9c61f8c49f	2360	* @rmtoll SMCR MSM LL_TIM_IsEnabledMasterSlaveMode
Kojto	136:ef9c61f8c49f	2361	* @param TIMx Timer instance
Kojto	136:ef9c61f8c49f	2362	* @retval State of bit (1 or 0).
Kojto	136:ef9c61f8c49f	2363	*/
Kojto	136:ef9c61f8c49f	2364	__STATIC_INLINE uint32_t LL_TIM_IsEnabledMasterSlaveMode(TIM_TypeDef * TIMx)
Kojto	136:ef9c61f8c49f	2365	{
Kojto	136:ef9c61f8c49f	2366	return (READ_BIT(TIMx->SMCR, TIM_SMCR_MSM) == (TIM_SMCR_MSM));
Kojto	136:ef9c61f8c49f	2367	}
Kojto	136:ef9c61f8c49f	2368
Kojto	136:ef9c61f8c49f	2369	/**
Kojto	136:ef9c61f8c49f	2370	* @brief Configure the external trigger (ETR) input.
Kojto	136:ef9c61f8c49f	2371	* @note Macro @ref IS_TIM_ETR_INSTANCE(TIMx) can be used to check whether or not
Kojto	136:ef9c61f8c49f	2372	* a timer instance provides an external trigger input.
Kojto	136:ef9c61f8c49f	2373	* @rmtoll SMCR ETP LL_TIM_ConfigETR\n
Kojto	136:ef9c61f8c49f	2374	* SMCR ETPS LL_TIM_ConfigETR\n
Kojto	136:ef9c61f8c49f	2375	* SMCR ETF LL_TIM_ConfigETR
Kojto	136:ef9c61f8c49f	2376	* @param TIMx Timer instance
Kojto	136:ef9c61f8c49f	2377	* @param ETRPolarity This parameter can be one of the following values:
Kojto	136:ef9c61f8c49f	2378	* @arg @ref LL_TIM_ETR_POLARITY_NONINVERTED
Kojto	136:ef9c61f8c49f	2379	* @arg @ref LL_TIM_ETR_POLARITY_INVERTED
Kojto	136:ef9c61f8c49f	2380	* @param ETRPrescaler This parameter can be one of the following values:
Kojto	136:ef9c61f8c49f	2381	* @arg @ref LL_TIM_ETR_PRESCALER_DIV1
Kojto	136:ef9c61f8c49f	2382	* @arg @ref LL_TIM_ETR_PRESCALER_DIV2
Kojto	136:ef9c61f8c49f	2383	* @arg @ref LL_TIM_ETR_PRESCALER_DIV4
Kojto	136:ef9c61f8c49f	2384	* @arg @ref LL_TIM_ETR_PRESCALER_DIV8
Kojto	136:ef9c61f8c49f	2385	* @param ETRFilter This parameter can be one of the following values:
Kojto	136:ef9c61f8c49f	2386	* @arg @ref LL_TIM_ETR_FILTER_FDIV1
Kojto	136:ef9c61f8c49f	2387	* @arg @ref LL_TIM_ETR_FILTER_FDIV1_N2
Kojto	136:ef9c61f8c49f	2388	* @arg @ref LL_TIM_ETR_FILTER_FDIV1_N4
Kojto	136:ef9c61f8c49f	2389	* @arg @ref LL_TIM_ETR_FILTER_FDIV1_N8
Kojto	136:ef9c61f8c49f	2390	* @arg @ref LL_TIM_ETR_FILTER_FDIV2_N6
Kojto	136:ef9c61f8c49f	2391	* @arg @ref LL_TIM_ETR_FILTER_FDIV2_N8
Kojto	136:ef9c61f8c49f	2392	* @arg @ref LL_TIM_ETR_FILTER_FDIV4_N6
Kojto	136:ef9c61f8c49f	2393	* @arg @ref LL_TIM_ETR_FILTER_FDIV4_N8
Kojto	136:ef9c61f8c49f	2394	* @arg @ref LL_TIM_ETR_FILTER_FDIV8_N6
Kojto	136:ef9c61f8c49f	2395	* @arg @ref LL_TIM_ETR_FILTER_FDIV8_N8
Kojto	136:ef9c61f8c49f	2396	* @arg @ref LL_TIM_ETR_FILTER_FDIV16_N5
Kojto	136:ef9c61f8c49f	2397	* @arg @ref LL_TIM_ETR_FILTER_FDIV16_N6
Kojto	136:ef9c61f8c49f	2398	* @arg @ref LL_TIM_ETR_FILTER_FDIV16_N8
Kojto	136:ef9c61f8c49f	2399	* @arg @ref LL_TIM_ETR_FILTER_FDIV32_N5
Kojto	136:ef9c61f8c49f	2400	* @arg @ref LL_TIM_ETR_FILTER_FDIV32_N6
Kojto	136:ef9c61f8c49f	2401	* @arg @ref LL_TIM_ETR_FILTER_FDIV32_N8
Kojto	136:ef9c61f8c49f	2402	* @retval None
Kojto	136:ef9c61f8c49f	2403	*/
Kojto	136:ef9c61f8c49f	2404	__STATIC_INLINE void LL_TIM_ConfigETR(TIM_TypeDef * TIMx, uint32_t ETRPolarity, uint32_t ETRPrescaler, uint32_t ETRFilter)
Kojto	136:ef9c61f8c49f	2405	{
Kojto	136:ef9c61f8c49f	2406	MODIFY_REG(TIMx->SMCR, TIM_SMCR_ETP \| TIM_SMCR_ETPS \| TIM_SMCR_ETF, ETRPolarity \| ETRPrescaler \| ETRFilter);
Kojto	136:ef9c61f8c49f	2407	}
Kojto	136:ef9c61f8c49f	2408
Kojto	136:ef9c61f8c49f	2409
Kojto	136:ef9c61f8c49f	2410	/**
Kojto	136:ef9c61f8c49f	2411	* @}
Kojto	136:ef9c61f8c49f	2412	*/
Kojto	136:ef9c61f8c49f	2413
Kojto	136:ef9c61f8c49f	2414
Kojto	136:ef9c61f8c49f	2415	/** @defgroup TIM_LL_EF_DMA_Burst_Mode DMA burst mode configuration
Kojto	136:ef9c61f8c49f	2416	* @{
Kojto	136:ef9c61f8c49f	2417	*/
Kojto	136:ef9c61f8c49f	2418	/**
Kojto	136:ef9c61f8c49f	2419	* @brief Configures the timer DMA burst feature.
Kojto	136:ef9c61f8c49f	2420	* @note Macro @ref IS_TIM_DMABURST_INSTANCE(TIMx) can be used to check whether or
Kojto	136:ef9c61f8c49f	2421	* not a timer instance supports the DMA burst mode.
Kojto	136:ef9c61f8c49f	2422	* @rmtoll DCR DBL LL_TIM_ConfigDMABurst\n
Kojto	136:ef9c61f8c49f	2423	* DCR DBA LL_TIM_ConfigDMABurst
Kojto	136:ef9c61f8c49f	2424	* @param TIMx Timer instance
Kojto	136:ef9c61f8c49f	2425	* @param DMABurstBaseAddress This parameter can be one of the following values:
Kojto	136:ef9c61f8c49f	2426	* @arg @ref LL_TIM_DMABURST_BASEADDR_CR1
Kojto	136:ef9c61f8c49f	2427	* @arg @ref LL_TIM_DMABURST_BASEADDR_CR2
Kojto	136:ef9c61f8c49f	2428	* @arg @ref LL_TIM_DMABURST_BASEADDR_SMCR
Kojto	136:ef9c61f8c49f	2429	* @arg @ref LL_TIM_DMABURST_BASEADDR_DIER
Kojto	136:ef9c61f8c49f	2430	* @arg @ref LL_TIM_DMABURST_BASEADDR_SR
Kojto	136:ef9c61f8c49f	2431	* @arg @ref LL_TIM_DMABURST_BASEADDR_EGR
Kojto	136:ef9c61f8c49f	2432	* @arg @ref LL_TIM_DMABURST_BASEADDR_CCMR1
Kojto	136:ef9c61f8c49f	2433	* @arg @ref LL_TIM_DMABURST_BASEADDR_CCMR2
Kojto	136:ef9c61f8c49f	2434	* @arg @ref LL_TIM_DMABURST_BASEADDR_CCER
Kojto	136:ef9c61f8c49f	2435	* @arg @ref LL_TIM_DMABURST_BASEADDR_CNT
Kojto	136:ef9c61f8c49f	2436	* @arg @ref LL_TIM_DMABURST_BASEADDR_PSC
Kojto	136:ef9c61f8c49f	2437	* @arg @ref LL_TIM_DMABURST_BASEADDR_ARR
Kojto	136:ef9c61f8c49f	2438	* @arg @ref LL_TIM_DMABURST_BASEADDR_RCR
Kojto	136:ef9c61f8c49f	2439	* @arg @ref LL_TIM_DMABURST_BASEADDR_CCR1
Kojto	136:ef9c61f8c49f	2440	* @arg @ref LL_TIM_DMABURST_BASEADDR_CCR2
Kojto	136:ef9c61f8c49f	2441	* @arg @ref LL_TIM_DMABURST_BASEADDR_CCR3
Kojto	136:ef9c61f8c49f	2442	* @arg @ref LL_TIM_DMABURST_BASEADDR_CCR4
Kojto	136:ef9c61f8c49f	2443	* @arg @ref LL_TIM_DMABURST_BASEADDR_BDTR
Kojto	136:ef9c61f8c49f	2444	* @arg @ref LL_TIM_DMABURST_BASEADDR_CCMR3
Kojto	136:ef9c61f8c49f	2445	* @arg @ref LL_TIM_DMABURST_BASEADDR_CCR5
Kojto	136:ef9c61f8c49f	2446	* @arg @ref LL_TIM_DMABURST_BASEADDR_CCR6
Kojto	136:ef9c61f8c49f	2447	* @arg @ref LL_TIM_DMABURST_BASEADDR_OR1
Kojto	136:ef9c61f8c49f	2448	* @arg @ref LL_TIM_DMABURST_BASEADDR_OR2
Kojto	136:ef9c61f8c49f	2449	* @arg @ref LL_TIM_DMABURST_BASEADDR_OR3
Kojto	136:ef9c61f8c49f	2450	* @param DMABurstLength This parameter can be one of the following values:
Kojto	136:ef9c61f8c49f	2451	* @arg @ref LL_TIM_DMABURST_LENGTH_1TRANSFER
Kojto	136:ef9c61f8c49f	2452	* @arg @ref LL_TIM_DMABURST_LENGTH_2TRANSFERS
Kojto	136:ef9c61f8c49f	2453	* @arg @ref LL_TIM_DMABURST_LENGTH_3TRANSFERS
Kojto	136:ef9c61f8c49f	2454	* @arg @ref LL_TIM_DMABURST_LENGTH_4TRANSFERS
Kojto	136:ef9c61f8c49f	2455	* @arg @ref LL_TIM_DMABURST_LENGTH_5TRANSFERS
Kojto	136:ef9c61f8c49f	2456	* @arg @ref LL_TIM_DMABURST_LENGTH_6TRANSFERS
Kojto	136:ef9c61f8c49f	2457	* @arg @ref LL_TIM_DMABURST_LENGTH_7TRANSFERS
Kojto	136:ef9c61f8c49f	2458	* @arg @ref LL_TIM_DMABURST_LENGTH_8TRANSFERS
Kojto	136:ef9c61f8c49f	2459	* @arg @ref LL_TIM_DMABURST_LENGTH_9TRANSFERS
Kojto	136:ef9c61f8c49f	2460	* @arg @ref LL_TIM_DMABURST_LENGTH_10TRANSFERS
Kojto	136:ef9c61f8c49f	2461	* @arg @ref LL_TIM_DMABURST_LENGTH_11TRANSFERS
Kojto	136:ef9c61f8c49f	2462	* @arg @ref LL_TIM_DMABURST_LENGTH_12TRANSFERS
Kojto	136:ef9c61f8c49f	2463	* @arg @ref LL_TIM_DMABURST_LENGTH_13TRANSFERS
Kojto	136:ef9c61f8c49f	2464	* @arg @ref LL_TIM_DMABURST_LENGTH_14TRANSFERS
Kojto	136:ef9c61f8c49f	2465	* @arg @ref LL_TIM_DMABURST_LENGTH_15TRANSFERS
Kojto	136:ef9c61f8c49f	2466	* @arg @ref LL_TIM_DMABURST_LENGTH_16TRANSFERS
Kojto	136:ef9c61f8c49f	2467	* @arg @ref LL_TIM_DMABURST_LENGTH_17TRANSFERS
Kojto	136:ef9c61f8c49f	2468	* @arg @ref LL_TIM_DMABURST_LENGTH_18TRANSFERS
Kojto	136:ef9c61f8c49f	2469	* @retval None
Kojto	136:ef9c61f8c49f	2470	*/
Kojto	136:ef9c61f8c49f	2471	__STATIC_INLINE void LL_TIM_ConfigDMABurst(TIM_TypeDef * TIMx, uint32_t DMABurstBaseAddress, uint32_t DMABurstLength)
Kojto	136:ef9c61f8c49f	2472	{
Kojto	136:ef9c61f8c49f	2473	MODIFY_REG(TIMx->DCR, TIM_DCR_DBL \| TIM_DCR_DBA, DMABurstBaseAddress \| DMABurstLength);
Kojto	136:ef9c61f8c49f	2474	}
Kojto	136:ef9c61f8c49f	2475
Kojto	136:ef9c61f8c49f	2476	/**
Kojto	136:ef9c61f8c49f	2477	* @}
Kojto	136:ef9c61f8c49f	2478	*/
Kojto	136:ef9c61f8c49f	2479
Kojto	136:ef9c61f8c49f	2480	/** @defgroup TIM_LL_EF_Timer_Inputs_Remapping Timer input remapping
Kojto	136:ef9c61f8c49f	2481	* @{
Kojto	136:ef9c61f8c49f	2482	*/
Kojto	136:ef9c61f8c49f	2483	/**
Kojto	136:ef9c61f8c49f	2484	* @brief Remap TIM inputs (input channel, internal/external triggers).
Kojto	136:ef9c61f8c49f	2485	* @note Macro @ref IS_TIM_REMAP_INSTANCE(TIMx) can be used to check whether or not
Kojto	136:ef9c61f8c49f	2486	* a some timer inputs can be remapped.
Kojto	136:ef9c61f8c49f	2487	* @rmtoll TIM2_OR ETR_RMP LL_TIM_SetRemap\n
Kojto	136:ef9c61f8c49f	2488	* TIM2_OR TI4_RMP LL_TIM_SetRemap\n
Kojto	136:ef9c61f8c49f	2489	* TIM21_OR ETR_RMP LL_TIM_SetRemap\n
Kojto	136:ef9c61f8c49f	2490	* TIM21_OR TI1_RMP LL_TIM_SetRemap\n
Kojto	136:ef9c61f8c49f	2491	* TIM21_OR TI2_RMP LL_TIM_SetRemap\n
Kojto	136:ef9c61f8c49f	2492	* TIM22_OR ETR_RMP LL_TIM_SetRemap\n
Kojto	136:ef9c61f8c49f	2493	* TIM22_OR TI1_RMP LL_TIM_SetRemap\n
Kojto	136:ef9c61f8c49f	2494	* TIM3_OR ETR_RMP LL_TIM_SetRemap\n
Kojto	136:ef9c61f8c49f	2495	* TIM3_OR TI1_RMP LL_TIM_SetRemap\n
Kojto	136:ef9c61f8c49f	2496	* TIM3_OR TI2_RMP LL_TIM_SetRemap\n
Kojto	136:ef9c61f8c49f	2497	* TIM3_OR TI4_RMP LL_TIM_SetRemap
Kojto	136:ef9c61f8c49f	2498	* @param TIMx Timer instance
Kojto	136:ef9c61f8c49f	2499	* @param Remap Remap params depends on the TIMx. Description available only
Kojto	136:ef9c61f8c49f	2500	* in CHM version of the User Manual (not in .pdf).
Kojto	136:ef9c61f8c49f	2501	* Otherwise see Reference Manual description of OR registers.
Kojto	136:ef9c61f8c49f	2502	*
Kojto	136:ef9c61f8c49f	2503	* Below description summarizes "Timer Instance" and "Remap" param combinations:
Kojto	136:ef9c61f8c49f	2504	*
Kojto	136:ef9c61f8c49f	2505	* TIM2: any combination of ETR_RMP, TI4_RMP where
Kojto	136:ef9c61f8c49f	2506	*
Kojto	136:ef9c61f8c49f	2507	* . . ETR_RMP can be one of the following values
Kojto	136:ef9c61f8c49f	2508	* @arg @ref LL_TIM_TIM2_ETR_RMP_GPIO
Kojto	136:ef9c61f8c49f	2509	* @arg @ref LL_TIM_TIM2_ETR_RMP_HSI (*)
Kojto	136:ef9c61f8c49f	2510	* @arg @ref LL_TIM_TIM2_ETR_RMP_HSI48 (*)
Kojto	136:ef9c61f8c49f	2511	* @arg @ref LL_TIM_TIM2_ETR_RMP_LSE
Kojto	136:ef9c61f8c49f	2512	* @arg @ref LL_TIM_TIM2_ETR_RMP_COMP2
Kojto	136:ef9c61f8c49f	2513	* @arg @ref LL_TIM_TIM2_ETR_RMP_COMP1
Kojto	136:ef9c61f8c49f	2514	*
Kojto	136:ef9c61f8c49f	2515	* . . TI4_RMP can be one of the following values
Kojto	136:ef9c61f8c49f	2516	* @arg @ref LL_TIM_TIM2_TI4_RMP_GPIO
Kojto	136:ef9c61f8c49f	2517	* @arg @ref LL_TIM_TIM2_TI4_RMP_COMP1
Kojto	136:ef9c61f8c49f	2518	* @arg @ref LL_TIM_TIM2_TI4_RMP_COMP2
Kojto	136:ef9c61f8c49f	2519	*
Kojto	136:ef9c61f8c49f	2520	* TIM3: any combination of the following values (**)
Kojto	136:ef9c61f8c49f	2521	*
Kojto	136:ef9c61f8c49f	2522	* . . ETR_RMP can be one of the following values (**)
Kojto	136:ef9c61f8c49f	2523	* @arg @ref LL_TIM_TIM3_ETR_RMP_GPIO
Kojto	136:ef9c61f8c49f	2524	* @arg @ref LL_TIM_TIM3_ETR_RMP_HSI48DIV6
Kojto	136:ef9c61f8c49f	2525	*
Kojto	136:ef9c61f8c49f	2526	* . . TI_RMP_TI1 can be one of the following values (**)
Kojto	136:ef9c61f8c49f	2527	* @arg @ref LL_TIM_TIM3_TI_RMP_TI1_USB_SOF
Kojto	136:ef9c61f8c49f	2528	* @arg @ref LL_TIM_TIM3_TI_RMP_TI1_GPIO
Kojto	136:ef9c61f8c49f	2529	*
Kojto	136:ef9c61f8c49f	2530	* . . TI_RMP_TI2 can be one of the following values (**)
Kojto	136:ef9c61f8c49f	2531	* @arg @ref LL_TIM_TIM3_TI_RMP_TI2_GPIO_DEF
Kojto	136:ef9c61f8c49f	2532	* @arg @ref LL_TIM_TIM3_TI_RMP_TI2_GPIOB5_AF4
Kojto	136:ef9c61f8c49f	2533	*
Kojto	136:ef9c61f8c49f	2534	* . . TI_RMP_TI4 can be one of the following values (**)
Kojto	136:ef9c61f8c49f	2535	* @arg @ref LL_TIM_TIM3_TI_RMP_TI4_GPIO_DEF
Kojto	136:ef9c61f8c49f	2536	* @arg @ref LL_TIM_TIM3_TI_RMP_TI4_GPIOC9_AF2
Kojto	136:ef9c61f8c49f	2537	*
Kojto	136:ef9c61f8c49f	2538	* TIM21: any combination of ETR_RMP, TI1_RMP, TI2_RMP where
Kojto	136:ef9c61f8c49f	2539	*
Kojto	136:ef9c61f8c49f	2540	* . . ETR_RMP can be one of the following values
Kojto	136:ef9c61f8c49f	2541	* @arg @ref LL_TIM_TIM21_ETR_RMP_GPIO
Kojto	136:ef9c61f8c49f	2542	* @arg @ref LL_TIM_TIM21_ETR_RMP_COMP2
Kojto	136:ef9c61f8c49f	2543	* @arg @ref LL_TIM_TIM21_ETR_RMP_COMP1
Kojto	136:ef9c61f8c49f	2544	* @arg @ref LL_TIM_TIM21_ETR_RMP_LSE
Kojto	136:ef9c61f8c49f	2545	*
Kojto	136:ef9c61f8c49f	2546	* . . TI1_RMP can be one of the following values
Kojto	136:ef9c61f8c49f	2547	* @arg @ref LL_TIM_TIM21_TI1_RMP_GPIO
Kojto	136:ef9c61f8c49f	2548	* @arg @ref LL_TIM_TIM21_TI1_RMP_RTC_WK
Kojto	136:ef9c61f8c49f	2549	* @arg @ref LL_TIM_TIM21_TI1_RMP_HSE_RTC
Kojto	136:ef9c61f8c49f	2550	* @arg @ref LL_TIM_TIM21_TI1_RMP_MSI
Kojto	136:ef9c61f8c49f	2551	* @arg @ref LL_TIM_TIM21_TI1_RMP_LSE
Kojto	136:ef9c61f8c49f	2552	* @arg @ref LL_TIM_TIM21_TI1_RMP_LSI
Kojto	136:ef9c61f8c49f	2553	* @arg @ref LL_TIM_TIM21_TI1_RMP_COMP1
Kojto	136:ef9c61f8c49f	2554	* @arg @ref LL_TIM_TIM21_TI1_RMP_MCO
Kojto	136:ef9c61f8c49f	2555	*
Kojto	136:ef9c61f8c49f	2556	* . . TI2_RMP can be one of the following values
Kojto	136:ef9c61f8c49f	2557	* @arg @ref LL_TIM_TIM21_TI2_RMP_GPIO
Kojto	136:ef9c61f8c49f	2558	* @arg @ref LL_TIM_TIM21_TI2_RMP_COMP2
Kojto	136:ef9c61f8c49f	2559	*
Kojto	136:ef9c61f8c49f	2560	* TIM22: any combination of ETR_RMP, TI1_RMP where (**)
Kojto	136:ef9c61f8c49f	2561	*
Kojto	136:ef9c61f8c49f	2562	* . . ETR_RMP can be one of the following values (**)
Kojto	136:ef9c61f8c49f	2563	* @arg @ref LL_TIM_TIM22_ETR_RMP_GPIO
Kojto	136:ef9c61f8c49f	2564	* @arg @ref LL_TIM_TIM22_ETR_RMP_COMP2
Kojto	136:ef9c61f8c49f	2565	* @arg @ref LL_TIM_TIM22_ETR_RMP_COMP1
Kojto	136:ef9c61f8c49f	2566	* @arg @ref LL_TIM_TIM22_ETR_RMP_LSE
Kojto	136:ef9c61f8c49f	2567	*
Kojto	136:ef9c61f8c49f	2568	* . . TI1_RMP can be one of the following values (**)
Kojto	136:ef9c61f8c49f	2569	* @arg @ref LL_TIM_TIM22_TI1_RMP_GPIO1
Kojto	136:ef9c61f8c49f	2570	* @arg @ref LL_TIM_TIM22_TI1_RMP_COMP2
Kojto	136:ef9c61f8c49f	2571	* @arg @ref LL_TIM_TIM22_TI1_RMP_COMP1
Kojto	136:ef9c61f8c49f	2572	* @arg @ref LL_TIM_TIM22_TI1_RMP_GPIO2
Kojto	136:ef9c61f8c49f	2573	*
Kojto	136:ef9c61f8c49f	2574	* (*) Value not defined in all devices. \n
Kojto	136:ef9c61f8c49f	2575	* (*) Register not available in all devices.
Kojto	136:ef9c61f8c49f	2576	* @retval None
Kojto	136:ef9c61f8c49f	2577	*/
Kojto	136:ef9c61f8c49f	2578	__STATIC_INLINE void LL_TIM_SetRemap(TIM_TypeDef * TIMx, uint32_t Remap)
Kojto	136:ef9c61f8c49f	2579	{
Kojto	136:ef9c61f8c49f	2580	MODIFY_REG(TIMx->OR, (Remap >> TIMx_OR_RMP_SHIFT), (Remap & TIMx_OR_RMP_MASK));
Kojto	136:ef9c61f8c49f	2581	}
Kojto	136:ef9c61f8c49f	2582
Kojto	136:ef9c61f8c49f	2583	/**
Kojto	136:ef9c61f8c49f	2584	* @}
Kojto	136:ef9c61f8c49f	2585	*/
Kojto	136:ef9c61f8c49f	2586
Kojto	136:ef9c61f8c49f	2587	/** @defgroup TIM_LL_EF_OCREF_Clear OCREF_Clear_Management
Kojto	136:ef9c61f8c49f	2588	* @{
Kojto	136:ef9c61f8c49f	2589	*/
Kojto	136:ef9c61f8c49f	2590	/**
Kojto	136:ef9c61f8c49f	2591	* @brief Set the OCREF clear source
Kojto	136:ef9c61f8c49f	2592	* @note The OCxREF signal of a given channel can be cleared when a high level is applied on the OCREF_CLR_INPUT
Kojto	136:ef9c61f8c49f	2593	* @note This function can only be used in Output compare and PWM modes.
Kojto	136:ef9c61f8c49f	2594	* @rmtoll SMCR OCCS LL_TIM_SetOCRefClearInputSource
Kojto	136:ef9c61f8c49f	2595	* @param TIMx Timer instance
Kojto	136:ef9c61f8c49f	2596	* @param OCRefClearInputSource This parameter can be one of the following values:
Kojto	136:ef9c61f8c49f	2597	* @arg @ref LL_TIM_OCREF_CLR_INT_NC
Kojto	136:ef9c61f8c49f	2598	* @arg @ref LL_TIM_OCREF_CLR_INT_ETR
Kojto	136:ef9c61f8c49f	2599	* @retval None
Kojto	136:ef9c61f8c49f	2600	*/
Kojto	136:ef9c61f8c49f	2601
Kojto	136:ef9c61f8c49f	2602	__STATIC_INLINE void LL_TIM_SetOCRefClearInputSource(TIM_TypeDef * TIMx, uint32_t OCRefClearInputSource)
Kojto	136:ef9c61f8c49f	2603	{
Kojto	136:ef9c61f8c49f	2604	MODIFY_REG(TIMx->SMCR, TIM_SMCR_OCCS, OCRefClearInputSource);
Kojto	136:ef9c61f8c49f	2605	}
Kojto	136:ef9c61f8c49f	2606	/**
Kojto	136:ef9c61f8c49f	2607	* @}
Kojto	136:ef9c61f8c49f	2608	*/
Kojto	136:ef9c61f8c49f	2609
Kojto	136:ef9c61f8c49f	2610	/** @defgroup TIM_LL_EF_FLAG_Management FLAG-Management
Kojto	136:ef9c61f8c49f	2611	* @{
Kojto	136:ef9c61f8c49f	2612	*/
Kojto	136:ef9c61f8c49f	2613	/**
Kojto	136:ef9c61f8c49f	2614	* @brief Clear the update interrupt flag (UIF).
Kojto	136:ef9c61f8c49f	2615	* @rmtoll SR UIF LL_TIM_ClearFlag_UPDATE
Kojto	136:ef9c61f8c49f	2616	* @param TIMx Timer instance
Kojto	136:ef9c61f8c49f	2617	* @retval None
Kojto	136:ef9c61f8c49f	2618	*/
Kojto	136:ef9c61f8c49f	2619	__STATIC_INLINE void LL_TIM_ClearFlag_UPDATE(TIM_TypeDef * TIMx)
Kojto	136:ef9c61f8c49f	2620	{
Kojto	136:ef9c61f8c49f	2621	WRITE_REG(TIMx->SR, ~(TIM_SR_UIF));
Kojto	136:ef9c61f8c49f	2622	}
Kojto	136:ef9c61f8c49f	2623
Kojto	136:ef9c61f8c49f	2624	/**
Kojto	136:ef9c61f8c49f	2625	* @brief Indicate whether update interrupt flag (UIF) is set (update interrupt is pending).
Kojto	136:ef9c61f8c49f	2626	* @rmtoll SR UIF LL_TIM_IsActiveFlag_UPDATE
Kojto	136:ef9c61f8c49f	2627	* @param TIMx Timer instance
Kojto	136:ef9c61f8c49f	2628	* @retval State of bit (1 or 0).
Kojto	136:ef9c61f8c49f	2629	*/
Kojto	136:ef9c61f8c49f	2630	__STATIC_INLINE uint32_t LL_TIM_IsActiveFlag_UPDATE(TIM_TypeDef * TIMx)
Kojto	136:ef9c61f8c49f	2631	{
Kojto	136:ef9c61f8c49f	2632	return (READ_BIT(TIMx->SR, TIM_SR_UIF) == (TIM_SR_UIF));
Kojto	136:ef9c61f8c49f	2633	}
Kojto	136:ef9c61f8c49f	2634
Kojto	136:ef9c61f8c49f	2635	/**
Kojto	136:ef9c61f8c49f	2636	* @brief Clear the Capture/Compare 1 interrupt flag (CC1F).
Kojto	136:ef9c61f8c49f	2637	* @rmtoll SR CC1IF LL_TIM_ClearFlag_CC1
Kojto	136:ef9c61f8c49f	2638	* @param TIMx Timer instance
Kojto	136:ef9c61f8c49f	2639	* @retval None
Kojto	136:ef9c61f8c49f	2640	*/
Kojto	136:ef9c61f8c49f	2641	__STATIC_INLINE void LL_TIM_ClearFlag_CC1(TIM_TypeDef * TIMx)
Kojto	136:ef9c61f8c49f	2642	{
Kojto	136:ef9c61f8c49f	2643	WRITE_REG(TIMx->SR, ~(TIM_SR_CC1IF));
Kojto	136:ef9c61f8c49f	2644	}
Kojto	136:ef9c61f8c49f	2645
Kojto	136:ef9c61f8c49f	2646	/**
Kojto	136:ef9c61f8c49f	2647	* @brief Indicate whether Capture/Compare 1 interrupt flag (CC1F) is set (Capture/Compare 1 interrupt is pending).
Kojto	136:ef9c61f8c49f	2648	* @rmtoll SR CC1IF LL_TIM_IsActiveFlag_CC1
Kojto	136:ef9c61f8c49f	2649	* @param TIMx Timer instance
Kojto	136:ef9c61f8c49f	2650	* @retval State of bit (1 or 0).
Kojto	136:ef9c61f8c49f	2651	*/
Kojto	136:ef9c61f8c49f	2652	__STATIC_INLINE uint32_t LL_TIM_IsActiveFlag_CC1(TIM_TypeDef * TIMx)
Kojto	136:ef9c61f8c49f	2653	{
Kojto	136:ef9c61f8c49f	2654	return (READ_BIT(TIMx->SR, TIM_SR_CC1IF) == (TIM_SR_CC1IF));
Kojto	136:ef9c61f8c49f	2655	}
Kojto	136:ef9c61f8c49f	2656
Kojto	136:ef9c61f8c49f	2657	/**
Kojto	136:ef9c61f8c49f	2658	* @brief Clear the Capture/Compare 2 interrupt flag (CC2F).
Kojto	136:ef9c61f8c49f	2659	* @rmtoll SR CC2IF LL_TIM_ClearFlag_CC2
Kojto	136:ef9c61f8c49f	2660	* @param TIMx Timer instance
Kojto	136:ef9c61f8c49f	2661	* @retval None
Kojto	136:ef9c61f8c49f	2662	*/
Kojto	136:ef9c61f8c49f	2663	__STATIC_INLINE void LL_TIM_ClearFlag_CC2(TIM_TypeDef * TIMx)
Kojto	136:ef9c61f8c49f	2664	{
Kojto	136:ef9c61f8c49f	2665	WRITE_REG(TIMx->SR, ~(TIM_SR_CC2IF));
Kojto	136:ef9c61f8c49f	2666	}
Kojto	136:ef9c61f8c49f	2667
Kojto	136:ef9c61f8c49f	2668	/**
Kojto	136:ef9c61f8c49f	2669	* @brief Indicate whether Capture/Compare 2 interrupt flag (CC2F) is set (Capture/Compare 2 interrupt is pending).
Kojto	136:ef9c61f8c49f	2670	* @rmtoll SR CC2IF LL_TIM_IsActiveFlag_CC2
Kojto	136:ef9c61f8c49f	2671	* @param TIMx Timer instance
Kojto	136:ef9c61f8c49f	2672	* @retval State of bit (1 or 0).
Kojto	136:ef9c61f8c49f	2673	*/
Kojto	136:ef9c61f8c49f	2674	__STATIC_INLINE uint32_t LL_TIM_IsActiveFlag_CC2(TIM_TypeDef * TIMx)
Kojto	136:ef9c61f8c49f	2675	{
Kojto	136:ef9c61f8c49f	2676	return (READ_BIT(TIMx->SR, TIM_SR_CC2IF) == (TIM_SR_CC2IF));
Kojto	136:ef9c61f8c49f	2677	}
Kojto	136:ef9c61f8c49f	2678
Kojto	136:ef9c61f8c49f	2679	/**
Kojto	136:ef9c61f8c49f	2680	* @brief Clear the Capture/Compare 3 interrupt flag (CC3F).
Kojto	136:ef9c61f8c49f	2681	* @rmtoll SR CC3IF LL_TIM_ClearFlag_CC3
Kojto	136:ef9c61f8c49f	2682	* @param TIMx Timer instance
Kojto	136:ef9c61f8c49f	2683	* @retval None
Kojto	136:ef9c61f8c49f	2684	*/
Kojto	136:ef9c61f8c49f	2685	__STATIC_INLINE void LL_TIM_ClearFlag_CC3(TIM_TypeDef * TIMx)
Kojto	136:ef9c61f8c49f	2686	{
Kojto	136:ef9c61f8c49f	2687	WRITE_REG(TIMx->SR, ~(TIM_SR_CC3IF));
Kojto	136:ef9c61f8c49f	2688	}
Kojto	136:ef9c61f8c49f	2689
Kojto	136:ef9c61f8c49f	2690	/**
Kojto	136:ef9c61f8c49f	2691	* @brief Indicate whether Capture/Compare 3 interrupt flag (CC3F) is set (Capture/Compare 3 interrupt is pending).
Kojto	136:ef9c61f8c49f	2692	* @rmtoll SR CC3IF LL_TIM_IsActiveFlag_CC3
Kojto	136:ef9c61f8c49f	2693	* @param TIMx Timer instance
Kojto	136:ef9c61f8c49f	2694	* @retval State of bit (1 or 0).
Kojto	136:ef9c61f8c49f	2695	*/
Kojto	136:ef9c61f8c49f	2696	__STATIC_INLINE uint32_t LL_TIM_IsActiveFlag_CC3(TIM_TypeDef * TIMx)
Kojto	136:ef9c61f8c49f	2697	{
Kojto	136:ef9c61f8c49f	2698	return (READ_BIT(TIMx->SR, TIM_SR_CC3IF) == (TIM_SR_CC3IF));
Kojto	136:ef9c61f8c49f	2699	}
Kojto	136:ef9c61f8c49f	2700
Kojto	136:ef9c61f8c49f	2701	/**
Kojto	136:ef9c61f8c49f	2702	* @brief Clear the Capture/Compare 4 interrupt flag (CC4F).
Kojto	136:ef9c61f8c49f	2703	* @rmtoll SR CC4IF LL_TIM_ClearFlag_CC4
Kojto	136:ef9c61f8c49f	2704	* @param TIMx Timer instance
Kojto	136:ef9c61f8c49f	2705	* @retval None
Kojto	136:ef9c61f8c49f	2706	*/
Kojto	136:ef9c61f8c49f	2707	__STATIC_INLINE void LL_TIM_ClearFlag_CC4(TIM_TypeDef * TIMx)
Kojto	136:ef9c61f8c49f	2708	{
Kojto	136:ef9c61f8c49f	2709	WRITE_REG(TIMx->SR, ~(TIM_SR_CC4IF));
Kojto	136:ef9c61f8c49f	2710	}
Kojto	136:ef9c61f8c49f	2711
Kojto	136:ef9c61f8c49f	2712	/**
Kojto	136:ef9c61f8c49f	2713	* @brief Indicate whether Capture/Compare 4 interrupt flag (CC4F) is set (Capture/Compare 4 interrupt is pending).
Kojto	136:ef9c61f8c49f	2714	* @rmtoll SR CC4IF LL_TIM_IsActiveFlag_CC4
Kojto	136:ef9c61f8c49f	2715	* @param TIMx Timer instance
Kojto	136:ef9c61f8c49f	2716	* @retval State of bit (1 or 0).
Kojto	136:ef9c61f8c49f	2717	*/
Kojto	136:ef9c61f8c49f	2718	__STATIC_INLINE uint32_t LL_TIM_IsActiveFlag_CC4(TIM_TypeDef * TIMx)
Kojto	136:ef9c61f8c49f	2719	{
Kojto	136:ef9c61f8c49f	2720	return (READ_BIT(TIMx->SR, TIM_SR_CC4IF) == (TIM_SR_CC4IF));
Kojto	136:ef9c61f8c49f	2721	}
Kojto	136:ef9c61f8c49f	2722
Kojto	136:ef9c61f8c49f	2723
Kojto	136:ef9c61f8c49f	2724
Kojto	136:ef9c61f8c49f	2725
Kojto	136:ef9c61f8c49f	2726	/**
Kojto	136:ef9c61f8c49f	2727	* @brief Clear the trigger interrupt flag (TIF).
Kojto	136:ef9c61f8c49f	2728	* @rmtoll SR TIF LL_TIM_ClearFlag_TRIG
Kojto	136:ef9c61f8c49f	2729	* @param TIMx Timer instance
Kojto	136:ef9c61f8c49f	2730	* @retval None
Kojto	136:ef9c61f8c49f	2731	*/
Kojto	136:ef9c61f8c49f	2732	__STATIC_INLINE void LL_TIM_ClearFlag_TRIG(TIM_TypeDef * TIMx)
Kojto	136:ef9c61f8c49f	2733	{
Kojto	136:ef9c61f8c49f	2734	WRITE_REG(TIMx->SR, ~(TIM_SR_TIF));
Kojto	136:ef9c61f8c49f	2735	}
Kojto	136:ef9c61f8c49f	2736
Kojto	136:ef9c61f8c49f	2737	/**
Kojto	136:ef9c61f8c49f	2738	* @brief Indicate whether trigger interrupt flag (TIF) is set (trigger interrupt is pending).
Kojto	136:ef9c61f8c49f	2739	* @rmtoll SR TIF LL_TIM_IsActiveFlag_TRIG
Kojto	136:ef9c61f8c49f	2740	* @param TIMx Timer instance
Kojto	136:ef9c61f8c49f	2741	* @retval State of bit (1 or 0).
Kojto	136:ef9c61f8c49f	2742	*/
Kojto	136:ef9c61f8c49f	2743	__STATIC_INLINE uint32_t LL_TIM_IsActiveFlag_TRIG(TIM_TypeDef * TIMx)
Kojto	136:ef9c61f8c49f	2744	{
Kojto	136:ef9c61f8c49f	2745	return (READ_BIT(TIMx->SR, TIM_SR_TIF) == (TIM_SR_TIF));
Kojto	136:ef9c61f8c49f	2746	}
Kojto	136:ef9c61f8c49f	2747
Kojto	136:ef9c61f8c49f	2748
Kojto	136:ef9c61f8c49f	2749
Kojto	136:ef9c61f8c49f	2750	/**
Kojto	136:ef9c61f8c49f	2751	* @brief Clear the Capture/Compare 1 over-capture interrupt flag (CC1OF).
Kojto	136:ef9c61f8c49f	2752	* @rmtoll SR CC1OF LL_TIM_ClearFlag_CC1OVR
Kojto	136:ef9c61f8c49f	2753	* @param TIMx Timer instance
Kojto	136:ef9c61f8c49f	2754	* @retval None
Kojto	136:ef9c61f8c49f	2755	*/
Kojto	136:ef9c61f8c49f	2756	__STATIC_INLINE void LL_TIM_ClearFlag_CC1OVR(TIM_TypeDef * TIMx)
Kojto	136:ef9c61f8c49f	2757	{
Kojto	136:ef9c61f8c49f	2758	WRITE_REG(TIMx->SR, ~(TIM_SR_CC1OF));
Kojto	136:ef9c61f8c49f	2759	}
Kojto	136:ef9c61f8c49f	2760
Kojto	136:ef9c61f8c49f	2761	/**
Kojto	136:ef9c61f8c49f	2762	* @brief Indicate whether Capture/Compare 1 over-capture interrupt flag (CC1OF) is set (Capture/Compare 1 interrupt is pending).
Kojto	136:ef9c61f8c49f	2763	* @rmtoll SR CC1OF LL_TIM_IsActiveFlag_CC1OVR
Kojto	136:ef9c61f8c49f	2764	* @param TIMx Timer instance
Kojto	136:ef9c61f8c49f	2765	* @retval State of bit (1 or 0).
Kojto	136:ef9c61f8c49f	2766	*/
Kojto	136:ef9c61f8c49f	2767	__STATIC_INLINE uint32_t LL_TIM_IsActiveFlag_CC1OVR(TIM_TypeDef * TIMx)
Kojto	136:ef9c61f8c49f	2768	{
Kojto	136:ef9c61f8c49f	2769	return (READ_BIT(TIMx->SR, TIM_SR_CC1OF) == (TIM_SR_CC1OF));
Kojto	136:ef9c61f8c49f	2770	}
Kojto	136:ef9c61f8c49f	2771
Kojto	136:ef9c61f8c49f	2772	/**
Kojto	136:ef9c61f8c49f	2773	* @brief Clear the Capture/Compare 2 over-capture interrupt flag (CC2OF).
Kojto	136:ef9c61f8c49f	2774	* @rmtoll SR CC2OF LL_TIM_ClearFlag_CC2OVR
Kojto	136:ef9c61f8c49f	2775	* @param TIMx Timer instance
Kojto	136:ef9c61f8c49f	2776	* @retval None
Kojto	136:ef9c61f8c49f	2777	*/
Kojto	136:ef9c61f8c49f	2778	__STATIC_INLINE void LL_TIM_ClearFlag_CC2OVR(TIM_TypeDef * TIMx)
Kojto	136:ef9c61f8c49f	2779	{
Kojto	136:ef9c61f8c49f	2780	WRITE_REG(TIMx->SR, ~(TIM_SR_CC2OF));
Kojto	136:ef9c61f8c49f	2781	}
Kojto	136:ef9c61f8c49f	2782
Kojto	136:ef9c61f8c49f	2783	/**
Kojto	136:ef9c61f8c49f	2784	* @brief Indicate whether Capture/Compare 2 over-capture interrupt flag (CC2OF) is set (Capture/Compare 2 over-capture interrupt is pending).
Kojto	136:ef9c61f8c49f	2785	* @rmtoll SR CC2OF LL_TIM_IsActiveFlag_CC2OVR
Kojto	136:ef9c61f8c49f	2786	* @param TIMx Timer instance
Kojto	136:ef9c61f8c49f	2787	* @retval State of bit (1 or 0).
Kojto	136:ef9c61f8c49f	2788	*/
Kojto	136:ef9c61f8c49f	2789	__STATIC_INLINE uint32_t LL_TIM_IsActiveFlag_CC2OVR(TIM_TypeDef * TIMx)
Kojto	136:ef9c61f8c49f	2790	{
Kojto	136:ef9c61f8c49f	2791	return (READ_BIT(TIMx->SR, TIM_SR_CC2OF) == (TIM_SR_CC2OF));
Kojto	136:ef9c61f8c49f	2792	}
Kojto	136:ef9c61f8c49f	2793
Kojto	136:ef9c61f8c49f	2794	/**
Kojto	136:ef9c61f8c49f	2795	* @brief Clear the Capture/Compare 3 over-capture interrupt flag (CC3OF).
Kojto	136:ef9c61f8c49f	2796	* @rmtoll SR CC3OF LL_TIM_ClearFlag_CC3OVR
Kojto	136:ef9c61f8c49f	2797	* @param TIMx Timer instance
Kojto	136:ef9c61f8c49f	2798	* @retval None
Kojto	136:ef9c61f8c49f	2799	*/
Kojto	136:ef9c61f8c49f	2800	__STATIC_INLINE void LL_TIM_ClearFlag_CC3OVR(TIM_TypeDef * TIMx)
Kojto	136:ef9c61f8c49f	2801	{
Kojto	136:ef9c61f8c49f	2802	WRITE_REG(TIMx->SR, ~(TIM_SR_CC3OF));
Kojto	136:ef9c61f8c49f	2803	}
Kojto	136:ef9c61f8c49f	2804
Kojto	136:ef9c61f8c49f	2805	/**
Kojto	136:ef9c61f8c49f	2806	* @brief Indicate whether Capture/Compare 3 over-capture interrupt flag (CC3OF) is set (Capture/Compare 3 over-capture interrupt is pending).
Kojto	136:ef9c61f8c49f	2807	* @rmtoll SR CC3OF LL_TIM_IsActiveFlag_CC3OVR
Kojto	136:ef9c61f8c49f	2808	* @param TIMx Timer instance
Kojto	136:ef9c61f8c49f	2809	* @retval State of bit (1 or 0).
Kojto	136:ef9c61f8c49f	2810	*/
Kojto	136:ef9c61f8c49f	2811	__STATIC_INLINE uint32_t LL_TIM_IsActiveFlag_CC3OVR(TIM_TypeDef * TIMx)
Kojto	136:ef9c61f8c49f	2812	{
Kojto	136:ef9c61f8c49f	2813	return (READ_BIT(TIMx->SR, TIM_SR_CC3OF) == (TIM_SR_CC3OF));
Kojto	136:ef9c61f8c49f	2814	}
Kojto	136:ef9c61f8c49f	2815
Kojto	136:ef9c61f8c49f	2816	/**
Kojto	136:ef9c61f8c49f	2817	* @brief Clear the Capture/Compare 4 over-capture interrupt flag (CC4OF).
Kojto	136:ef9c61f8c49f	2818	* @rmtoll SR CC4OF LL_TIM_ClearFlag_CC4OVR
Kojto	136:ef9c61f8c49f	2819	* @param TIMx Timer instance
Kojto	136:ef9c61f8c49f	2820	* @retval None
Kojto	136:ef9c61f8c49f	2821	*/
Kojto	136:ef9c61f8c49f	2822	__STATIC_INLINE void LL_TIM_ClearFlag_CC4OVR(TIM_TypeDef * TIMx)
Kojto	136:ef9c61f8c49f	2823	{
Kojto	136:ef9c61f8c49f	2824	WRITE_REG(TIMx->SR, ~(TIM_SR_CC4OF));
Kojto	136:ef9c61f8c49f	2825	}
Kojto	136:ef9c61f8c49f	2826
Kojto	136:ef9c61f8c49f	2827	/**
Kojto	136:ef9c61f8c49f	2828	* @brief Indicate whether Capture/Compare 4 over-capture interrupt flag (CC4OF) is set (Capture/Compare 4 over-capture interrupt is pending).
Kojto	136:ef9c61f8c49f	2829	* @rmtoll SR CC4OF LL_TIM_IsActiveFlag_CC4OVR
Kojto	136:ef9c61f8c49f	2830	* @param TIMx Timer instance
Kojto	136:ef9c61f8c49f	2831	* @retval State of bit (1 or 0).
Kojto	136:ef9c61f8c49f	2832	*/
Kojto	136:ef9c61f8c49f	2833	__STATIC_INLINE uint32_t LL_TIM_IsActiveFlag_CC4OVR(TIM_TypeDef * TIMx)
Kojto	136:ef9c61f8c49f	2834	{
Kojto	136:ef9c61f8c49f	2835	return (READ_BIT(TIMx->SR, TIM_SR_CC4OF) == (TIM_SR_CC4OF));
Kojto	136:ef9c61f8c49f	2836	}
Kojto	136:ef9c61f8c49f	2837
Kojto	136:ef9c61f8c49f	2838
Kojto	136:ef9c61f8c49f	2839	/**
Kojto	136:ef9c61f8c49f	2840	* @}
Kojto	136:ef9c61f8c49f	2841	*/
Kojto	136:ef9c61f8c49f	2842
Kojto	136:ef9c61f8c49f	2843	/** @defgroup TIM_LL_EF_IT_Management IT-Management
Kojto	136:ef9c61f8c49f	2844	* @{
Kojto	136:ef9c61f8c49f	2845	*/
Kojto	136:ef9c61f8c49f	2846	/**
Kojto	136:ef9c61f8c49f	2847	* @brief Enable update interrupt (UIE).
Kojto	136:ef9c61f8c49f	2848	* @rmtoll DIER UIE LL_TIM_EnableIT_UPDATE
Kojto	136:ef9c61f8c49f	2849	* @param TIMx Timer instance
Kojto	136:ef9c61f8c49f	2850	* @retval None
Kojto	136:ef9c61f8c49f	2851	*/
Kojto	136:ef9c61f8c49f	2852	__STATIC_INLINE void LL_TIM_EnableIT_UPDATE(TIM_TypeDef * TIMx)
Kojto	136:ef9c61f8c49f	2853	{
Kojto	136:ef9c61f8c49f	2854	SET_BIT(TIMx->DIER, TIM_DIER_UIE);
Kojto	136:ef9c61f8c49f	2855	}
Kojto	136:ef9c61f8c49f	2856
Kojto	136:ef9c61f8c49f	2857	/**
Kojto	136:ef9c61f8c49f	2858	* @brief Disable update interrupt (UIE).
Kojto	136:ef9c61f8c49f	2859	* @rmtoll DIER UIE LL_TIM_DisableIT_UPDATE
Kojto	136:ef9c61f8c49f	2860	* @param TIMx Timer instance
Kojto	136:ef9c61f8c49f	2861	* @retval None
Kojto	136:ef9c61f8c49f	2862	*/
Kojto	136:ef9c61f8c49f	2863	__STATIC_INLINE void LL_TIM_DisableIT_UPDATE(TIM_TypeDef * TIMx)
Kojto	136:ef9c61f8c49f	2864	{
Kojto	136:ef9c61f8c49f	2865	CLEAR_BIT(TIMx->DIER, TIM_DIER_UIE);
Kojto	136:ef9c61f8c49f	2866	}
Kojto	136:ef9c61f8c49f	2867
Kojto	136:ef9c61f8c49f	2868	/**
Kojto	136:ef9c61f8c49f	2869	* @brief Indicates whether the update interrupt (UIE) is enabled.
Kojto	136:ef9c61f8c49f	2870	* @rmtoll DIER UIE LL_TIM_IsEnabledIT_UPDATE
Kojto	136:ef9c61f8c49f	2871	* @param TIMx Timer instance
Kojto	136:ef9c61f8c49f	2872	* @retval State of bit (1 or 0).
Kojto	136:ef9c61f8c49f	2873	*/
Kojto	136:ef9c61f8c49f	2874	__STATIC_INLINE uint32_t LL_TIM_IsEnabledIT_UPDATE(TIM_TypeDef * TIMx)
Kojto	136:ef9c61f8c49f	2875	{
Kojto	136:ef9c61f8c49f	2876	return (READ_BIT(TIMx->DIER, TIM_DIER_UIE) == (TIM_DIER_UIE));
Kojto	136:ef9c61f8c49f	2877	}
Kojto	136:ef9c61f8c49f	2878
Kojto	136:ef9c61f8c49f	2879	/**
Kojto	136:ef9c61f8c49f	2880	* @brief Enable capture/compare 1 interrupt (CC1IE).
Kojto	136:ef9c61f8c49f	2881	* @rmtoll DIER CC1IE LL_TIM_EnableIT_CC1
Kojto	136:ef9c61f8c49f	2882	* @param TIMx Timer instance
Kojto	136:ef9c61f8c49f	2883	* @retval None
Kojto	136:ef9c61f8c49f	2884	*/
Kojto	136:ef9c61f8c49f	2885	__STATIC_INLINE void LL_TIM_EnableIT_CC1(TIM_TypeDef * TIMx)
Kojto	136:ef9c61f8c49f	2886	{
Kojto	136:ef9c61f8c49f	2887	SET_BIT(TIMx->DIER, TIM_DIER_CC1IE);
Kojto	136:ef9c61f8c49f	2888	}
Kojto	136:ef9c61f8c49f	2889
Kojto	136:ef9c61f8c49f	2890	/**
Kojto	136:ef9c61f8c49f	2891	* @brief Disable capture/compare 1 interrupt (CC1IE).
Kojto	136:ef9c61f8c49f	2892	* @rmtoll DIER CC1IE LL_TIM_DisableIT_CC1
Kojto	136:ef9c61f8c49f	2893	* @param TIMx Timer instance
Kojto	136:ef9c61f8c49f	2894	* @retval None
Kojto	136:ef9c61f8c49f	2895	*/
Kojto	136:ef9c61f8c49f	2896	__STATIC_INLINE void LL_TIM_DisableIT_CC1(TIM_TypeDef * TIMx)
Kojto	136:ef9c61f8c49f	2897	{
Kojto	136:ef9c61f8c49f	2898	CLEAR_BIT(TIMx->DIER, TIM_DIER_CC1IE);
Kojto	136:ef9c61f8c49f	2899	}
Kojto	136:ef9c61f8c49f	2900
Kojto	136:ef9c61f8c49f	2901	/**
Kojto	136:ef9c61f8c49f	2902	* @brief Indicates whether the capture/compare 1 interrupt (CC1IE) is enabled.
Kojto	136:ef9c61f8c49f	2903	* @rmtoll DIER CC1IE LL_TIM_IsEnabledIT_CC1
Kojto	136:ef9c61f8c49f	2904	* @param TIMx Timer instance
Kojto	136:ef9c61f8c49f	2905	* @retval State of bit (1 or 0).
Kojto	136:ef9c61f8c49f	2906	*/
Kojto	136:ef9c61f8c49f	2907	__STATIC_INLINE uint32_t LL_TIM_IsEnabledIT_CC1(TIM_TypeDef * TIMx)
Kojto	136:ef9c61f8c49f	2908	{
Kojto	136:ef9c61f8c49f	2909	return (READ_BIT(TIMx->DIER, TIM_DIER_CC1IE) == (TIM_DIER_CC1IE));
Kojto	136:ef9c61f8c49f	2910	}
Kojto	136:ef9c61f8c49f	2911
Kojto	136:ef9c61f8c49f	2912	/**
Kojto	136:ef9c61f8c49f	2913	* @brief Enable capture/compare 2 interrupt (CC2IE).
Kojto	136:ef9c61f8c49f	2914	* @rmtoll DIER CC2IE LL_TIM_EnableIT_CC2
Kojto	136:ef9c61f8c49f	2915	* @param TIMx Timer instance
Kojto	136:ef9c61f8c49f	2916	* @retval None
Kojto	136:ef9c61f8c49f	2917	*/
Kojto	136:ef9c61f8c49f	2918	__STATIC_INLINE void LL_TIM_EnableIT_CC2(TIM_TypeDef * TIMx)
Kojto	136:ef9c61f8c49f	2919	{
Kojto	136:ef9c61f8c49f	2920	SET_BIT(TIMx->DIER, TIM_DIER_CC2IE);
Kojto	136:ef9c61f8c49f	2921	}
Kojto	136:ef9c61f8c49f	2922
Kojto	136:ef9c61f8c49f	2923	/**
Kojto	136:ef9c61f8c49f	2924	* @brief Disable capture/compare 2 interrupt (CC2IE).
Kojto	136:ef9c61f8c49f	2925	* @rmtoll DIER CC2IE LL_TIM_DisableIT_CC2
Kojto	136:ef9c61f8c49f	2926	* @param TIMx Timer instance
Kojto	136:ef9c61f8c49f	2927	* @retval None
Kojto	136:ef9c61f8c49f	2928	*/
Kojto	136:ef9c61f8c49f	2929	__STATIC_INLINE void LL_TIM_DisableIT_CC2(TIM_TypeDef * TIMx)
Kojto	136:ef9c61f8c49f	2930	{
Kojto	136:ef9c61f8c49f	2931	CLEAR_BIT(TIMx->DIER, TIM_DIER_CC2IE);
Kojto	136:ef9c61f8c49f	2932	}
Kojto	136:ef9c61f8c49f	2933
Kojto	136:ef9c61f8c49f	2934	/**
Kojto	136:ef9c61f8c49f	2935	* @brief Indicates whether the capture/compare 2 interrupt (CC2IE) is enabled.
Kojto	136:ef9c61f8c49f	2936	* @rmtoll DIER CC2IE LL_TIM_IsEnabledIT_CC2
Kojto	136:ef9c61f8c49f	2937	* @param TIMx Timer instance
Kojto	136:ef9c61f8c49f	2938	* @retval State of bit (1 or 0).
Kojto	136:ef9c61f8c49f	2939	*/
Kojto	136:ef9c61f8c49f	2940	__STATIC_INLINE uint32_t LL_TIM_IsEnabledIT_CC2(TIM_TypeDef * TIMx)
Kojto	136:ef9c61f8c49f	2941	{
Kojto	136:ef9c61f8c49f	2942	return (READ_BIT(TIMx->DIER, TIM_DIER_CC2IE) == (TIM_DIER_CC2IE));
Kojto	136:ef9c61f8c49f	2943	}
Kojto	136:ef9c61f8c49f	2944
Kojto	136:ef9c61f8c49f	2945	/**
Kojto	136:ef9c61f8c49f	2946	* @brief Enable capture/compare 3 interrupt (CC3IE).
Kojto	136:ef9c61f8c49f	2947	* @rmtoll DIER CC3IE LL_TIM_EnableIT_CC3
Kojto	136:ef9c61f8c49f	2948	* @param TIMx Timer instance
Kojto	136:ef9c61f8c49f	2949	* @retval None
Kojto	136:ef9c61f8c49f	2950	*/
Kojto	136:ef9c61f8c49f	2951	__STATIC_INLINE void LL_TIM_EnableIT_CC3(TIM_TypeDef * TIMx)
Kojto	136:ef9c61f8c49f	2952	{
Kojto	136:ef9c61f8c49f	2953	SET_BIT(TIMx->DIER, TIM_DIER_CC3IE);
Kojto	136:ef9c61f8c49f	2954	}
Kojto	136:ef9c61f8c49f	2955
Kojto	136:ef9c61f8c49f	2956	/**
Kojto	136:ef9c61f8c49f	2957	* @brief Disable capture/compare 3 interrupt (CC3IE).
Kojto	136:ef9c61f8c49f	2958	* @rmtoll DIER CC3IE LL_TIM_DisableIT_CC3
Kojto	136:ef9c61f8c49f	2959	* @param TIMx Timer instance
Kojto	136:ef9c61f8c49f	2960	* @retval None
Kojto	136:ef9c61f8c49f	2961	*/
Kojto	136:ef9c61f8c49f	2962	__STATIC_INLINE void LL_TIM_DisableIT_CC3(TIM_TypeDef * TIMx)
Kojto	136:ef9c61f8c49f	2963	{
Kojto	136:ef9c61f8c49f	2964	CLEAR_BIT(TIMx->DIER, TIM_DIER_CC3IE);
Kojto	136:ef9c61f8c49f	2965	}
Kojto	136:ef9c61f8c49f	2966
Kojto	136:ef9c61f8c49f	2967	/**
Kojto	136:ef9c61f8c49f	2968	* @brief Indicates whether the capture/compare 3 interrupt (CC3IE) is enabled.
Kojto	136:ef9c61f8c49f	2969	* @rmtoll DIER CC3IE LL_TIM_IsEnabledIT_CC3
Kojto	136:ef9c61f8c49f	2970	* @param TIMx Timer instance
Kojto	136:ef9c61f8c49f	2971	* @retval State of bit (1 or 0).
Kojto	136:ef9c61f8c49f	2972	*/
Kojto	136:ef9c61f8c49f	2973	__STATIC_INLINE uint32_t LL_TIM_IsEnabledIT_CC3(TIM_TypeDef * TIMx)
Kojto	136:ef9c61f8c49f	2974	{
Kojto	136:ef9c61f8c49f	2975	return (READ_BIT(TIMx->DIER, TIM_DIER_CC3IE) == (TIM_DIER_CC3IE));
Kojto	136:ef9c61f8c49f	2976	}
Kojto	136:ef9c61f8c49f	2977
Kojto	136:ef9c61f8c49f	2978	/**
Kojto	136:ef9c61f8c49f	2979	* @brief Enable capture/compare 4 interrupt (CC4IE).
Kojto	136:ef9c61f8c49f	2980	* @rmtoll DIER CC4IE LL_TIM_EnableIT_CC4
Kojto	136:ef9c61f8c49f	2981	* @param TIMx Timer instance
Kojto	136:ef9c61f8c49f	2982	* @retval None
Kojto	136:ef9c61f8c49f	2983	*/
Kojto	136:ef9c61f8c49f	2984	__STATIC_INLINE void LL_TIM_EnableIT_CC4(TIM_TypeDef * TIMx)
Kojto	136:ef9c61f8c49f	2985	{
Kojto	136:ef9c61f8c49f	2986	SET_BIT(TIMx->DIER, TIM_DIER_CC4IE);
Kojto	136:ef9c61f8c49f	2987	}
Kojto	136:ef9c61f8c49f	2988
Kojto	136:ef9c61f8c49f	2989	/**
Kojto	136:ef9c61f8c49f	2990	* @brief Disable capture/compare 4 interrupt (CC4IE).
Kojto	136:ef9c61f8c49f	2991	* @rmtoll DIER CC4IE LL_TIM_DisableIT_CC4
Kojto	136:ef9c61f8c49f	2992	* @param TIMx Timer instance
Kojto	136:ef9c61f8c49f	2993	* @retval None
Kojto	136:ef9c61f8c49f	2994	*/
Kojto	136:ef9c61f8c49f	2995	__STATIC_INLINE void LL_TIM_DisableIT_CC4(TIM_TypeDef * TIMx)
Kojto	136:ef9c61f8c49f	2996	{
Kojto	136:ef9c61f8c49f	2997	CLEAR_BIT(TIMx->DIER, TIM_DIER_CC4IE);
Kojto	136:ef9c61f8c49f	2998	}
Kojto	136:ef9c61f8c49f	2999
Kojto	136:ef9c61f8c49f	3000	/**
Kojto	136:ef9c61f8c49f	3001	* @brief Indicates whether the capture/compare 4 interrupt (CC4IE) is enabled.
Kojto	136:ef9c61f8c49f	3002	* @rmtoll DIER CC4IE LL_TIM_IsEnabledIT_CC4
Kojto	136:ef9c61f8c49f	3003	* @param TIMx Timer instance
Kojto	136:ef9c61f8c49f	3004	* @retval State of bit (1 or 0).
Kojto	136:ef9c61f8c49f	3005	*/
Kojto	136:ef9c61f8c49f	3006	__STATIC_INLINE uint32_t LL_TIM_IsEnabledIT_CC4(TIM_TypeDef * TIMx)
Kojto	136:ef9c61f8c49f	3007	{
Kojto	136:ef9c61f8c49f	3008	return (READ_BIT(TIMx->DIER, TIM_DIER_CC4IE) == (TIM_DIER_CC4IE));
Kojto	136:ef9c61f8c49f	3009	}
Kojto	136:ef9c61f8c49f	3010
Kojto	136:ef9c61f8c49f	3011
Kojto	136:ef9c61f8c49f	3012	/**
Kojto	136:ef9c61f8c49f	3013	* @brief Enable trigger interrupt (TIE).
Kojto	136:ef9c61f8c49f	3014	* @rmtoll DIER TIE LL_TIM_EnableIT_TRIG
Kojto	136:ef9c61f8c49f	3015	* @param TIMx Timer instance
Kojto	136:ef9c61f8c49f	3016	* @retval None
Kojto	136:ef9c61f8c49f	3017	*/
Kojto	136:ef9c61f8c49f	3018	__STATIC_INLINE void LL_TIM_EnableIT_TRIG(TIM_TypeDef * TIMx)
Kojto	136:ef9c61f8c49f	3019	{
Kojto	136:ef9c61f8c49f	3020	SET_BIT(TIMx->DIER, TIM_DIER_TIE);
Kojto	136:ef9c61f8c49f	3021	}
Kojto	136:ef9c61f8c49f	3022
Kojto	136:ef9c61f8c49f	3023	/**
Kojto	136:ef9c61f8c49f	3024	* @brief Disable trigger interrupt (TIE).
Kojto	136:ef9c61f8c49f	3025	* @rmtoll DIER TIE LL_TIM_DisableIT_TRIG
Kojto	136:ef9c61f8c49f	3026	* @param TIMx Timer instance
Kojto	136:ef9c61f8c49f	3027	* @retval None
Kojto	136:ef9c61f8c49f	3028	*/
Kojto	136:ef9c61f8c49f	3029	__STATIC_INLINE void LL_TIM_DisableIT_TRIG(TIM_TypeDef * TIMx)
Kojto	136:ef9c61f8c49f	3030	{
Kojto	136:ef9c61f8c49f	3031	CLEAR_BIT(TIMx->DIER, TIM_DIER_TIE);
Kojto	136:ef9c61f8c49f	3032	}
Kojto	136:ef9c61f8c49f	3033
Kojto	136:ef9c61f8c49f	3034	/**
Kojto	136:ef9c61f8c49f	3035	* @brief Indicates whether the trigger interrupt (TIE) is enabled.
Kojto	136:ef9c61f8c49f	3036	* @rmtoll DIER TIE LL_TIM_IsEnabledIT_TRIG
Kojto	136:ef9c61f8c49f	3037	* @param TIMx Timer instance
Kojto	136:ef9c61f8c49f	3038	* @retval State of bit (1 or 0).
Kojto	136:ef9c61f8c49f	3039	*/
Kojto	136:ef9c61f8c49f	3040	__STATIC_INLINE uint32_t LL_TIM_IsEnabledIT_TRIG(TIM_TypeDef * TIMx)
Kojto	136:ef9c61f8c49f	3041	{
Kojto	136:ef9c61f8c49f	3042	return (READ_BIT(TIMx->DIER, TIM_DIER_TIE) == (TIM_DIER_TIE));
Kojto	136:ef9c61f8c49f	3043	}
Kojto	136:ef9c61f8c49f	3044
Kojto	136:ef9c61f8c49f	3045
Kojto	136:ef9c61f8c49f	3046	/**
Kojto	136:ef9c61f8c49f	3047	* @}
Kojto	136:ef9c61f8c49f	3048	*/
Kojto	136:ef9c61f8c49f	3049
Kojto	136:ef9c61f8c49f	3050	/** @defgroup TIM_LL_EF_DMA_Management DMA-Management
Kojto	136:ef9c61f8c49f	3051	* @{
Kojto	136:ef9c61f8c49f	3052	*/
Kojto	136:ef9c61f8c49f	3053	/**
Kojto	136:ef9c61f8c49f	3054	* @brief Enable update DMA request (UDE).
Kojto	136:ef9c61f8c49f	3055	* @rmtoll DIER UDE LL_TIM_EnableDMAReq_UPDATE
Kojto	136:ef9c61f8c49f	3056	* @param TIMx Timer instance
Kojto	136:ef9c61f8c49f	3057	* @retval None
Kojto	136:ef9c61f8c49f	3058	*/
Kojto	136:ef9c61f8c49f	3059	__STATIC_INLINE void LL_TIM_EnableDMAReq_UPDATE(TIM_TypeDef * TIMx)
Kojto	136:ef9c61f8c49f	3060	{
Kojto	136:ef9c61f8c49f	3061	SET_BIT(TIMx->DIER, TIM_DIER_UDE);
Kojto	136:ef9c61f8c49f	3062	}
Kojto	136:ef9c61f8c49f	3063
Kojto	136:ef9c61f8c49f	3064	/**
Kojto	136:ef9c61f8c49f	3065	* @brief Disable update DMA request (UDE).
Kojto	136:ef9c61f8c49f	3066	* @rmtoll DIER UDE LL_TIM_DisableDMAReq_UPDATE
Kojto	136:ef9c61f8c49f	3067	* @param TIMx Timer instance
Kojto	136:ef9c61f8c49f	3068	* @retval None
Kojto	136:ef9c61f8c49f	3069	*/
Kojto	136:ef9c61f8c49f	3070	__STATIC_INLINE void LL_TIM_DisableDMAReq_UPDATE(TIM_TypeDef * TIMx)
Kojto	136:ef9c61f8c49f	3071	{
Kojto	136:ef9c61f8c49f	3072	CLEAR_BIT(TIMx->DIER, TIM_DIER_UDE);
Kojto	136:ef9c61f8c49f	3073	}
Kojto	136:ef9c61f8c49f	3074
Kojto	136:ef9c61f8c49f	3075	/**
Kojto	136:ef9c61f8c49f	3076	* @brief Indicates whether the update DMA request (UDE) is enabled.
Kojto	136:ef9c61f8c49f	3077	* @rmtoll DIER UDE LL_TIM_IsEnabledDMAReq_UPDATE
Kojto	136:ef9c61f8c49f	3078	* @param TIMx Timer instance
Kojto	136:ef9c61f8c49f	3079	* @retval State of bit (1 or 0).
Kojto	136:ef9c61f8c49f	3080	*/
Kojto	136:ef9c61f8c49f	3081	__STATIC_INLINE uint32_t LL_TIM_IsEnabledDMAReq_UPDATE(TIM_TypeDef * TIMx)
Kojto	136:ef9c61f8c49f	3082	{
Kojto	136:ef9c61f8c49f	3083	return (READ_BIT(TIMx->DIER, TIM_DIER_UDE) == (TIM_DIER_UDE));
Kojto	136:ef9c61f8c49f	3084	}
Kojto	136:ef9c61f8c49f	3085
Kojto	136:ef9c61f8c49f	3086	/**
Kojto	136:ef9c61f8c49f	3087	* @brief Enable capture/compare 1 DMA request (CC1DE).
Kojto	136:ef9c61f8c49f	3088	* @rmtoll DIER CC1DE LL_TIM_EnableDMAReq_CC1
Kojto	136:ef9c61f8c49f	3089	* @param TIMx Timer instance
Kojto	136:ef9c61f8c49f	3090	* @retval None
Kojto	136:ef9c61f8c49f	3091	*/
Kojto	136:ef9c61f8c49f	3092	__STATIC_INLINE void LL_TIM_EnableDMAReq_CC1(TIM_TypeDef * TIMx)
Kojto	136:ef9c61f8c49f	3093	{
Kojto	136:ef9c61f8c49f	3094	SET_BIT(TIMx->DIER, TIM_DIER_CC1DE);
Kojto	136:ef9c61f8c49f	3095	}
Kojto	136:ef9c61f8c49f	3096
Kojto	136:ef9c61f8c49f	3097	/**
Kojto	136:ef9c61f8c49f	3098	* @brief Disable capture/compare 1 DMA request (CC1DE).
Kojto	136:ef9c61f8c49f	3099	* @rmtoll DIER CC1DE LL_TIM_DisableDMAReq_CC1
Kojto	136:ef9c61f8c49f	3100	* @param TIMx Timer instance
Kojto	136:ef9c61f8c49f	3101	* @retval None
Kojto	136:ef9c61f8c49f	3102	*/
Kojto	136:ef9c61f8c49f	3103	__STATIC_INLINE void LL_TIM_DisableDMAReq_CC1(TIM_TypeDef * TIMx)
Kojto	136:ef9c61f8c49f	3104	{
Kojto	136:ef9c61f8c49f	3105	CLEAR_BIT(TIMx->DIER, TIM_DIER_CC1DE);
Kojto	136:ef9c61f8c49f	3106	}
Kojto	136:ef9c61f8c49f	3107
Kojto	136:ef9c61f8c49f	3108	/**
Kojto	136:ef9c61f8c49f	3109	* @brief Indicates whether the capture/compare 1 DMA request (CC1DE) is enabled.
Kojto	136:ef9c61f8c49f	3110	* @rmtoll DIER CC1DE LL_TIM_IsEnabledDMAReq_CC1
Kojto	136:ef9c61f8c49f	3111	* @param TIMx Timer instance
Kojto	136:ef9c61f8c49f	3112	* @retval State of bit (1 or 0).
Kojto	136:ef9c61f8c49f	3113	*/
Kojto	136:ef9c61f8c49f	3114	__STATIC_INLINE uint32_t LL_TIM_IsEnabledDMAReq_CC1(TIM_TypeDef * TIMx)
Kojto	136:ef9c61f8c49f	3115	{
Kojto	136:ef9c61f8c49f	3116	return (READ_BIT(TIMx->DIER, TIM_DIER_CC1DE) == (TIM_DIER_CC1DE));
Kojto	136:ef9c61f8c49f	3117	}
Kojto	136:ef9c61f8c49f	3118
Kojto	136:ef9c61f8c49f	3119	/**
Kojto	136:ef9c61f8c49f	3120	* @brief Enable capture/compare 2 DMA request (CC2DE).
Kojto	136:ef9c61f8c49f	3121	* @rmtoll DIER CC2DE LL_TIM_EnableDMAReq_CC2
Kojto	136:ef9c61f8c49f	3122	* @param TIMx Timer instance
Kojto	136:ef9c61f8c49f	3123	* @retval None
Kojto	136:ef9c61f8c49f	3124	*/
Kojto	136:ef9c61f8c49f	3125	__STATIC_INLINE void LL_TIM_EnableDMAReq_CC2(TIM_TypeDef * TIMx)
Kojto	136:ef9c61f8c49f	3126	{
Kojto	136:ef9c61f8c49f	3127	SET_BIT(TIMx->DIER, TIM_DIER_CC2DE);
Kojto	136:ef9c61f8c49f	3128	}
Kojto	136:ef9c61f8c49f	3129
Kojto	136:ef9c61f8c49f	3130	/**
Kojto	136:ef9c61f8c49f	3131	* @brief Disable capture/compare 2 DMA request (CC2DE).
Kojto	136:ef9c61f8c49f	3132	* @rmtoll DIER CC2DE LL_TIM_DisableDMAReq_CC2
Kojto	136:ef9c61f8c49f	3133	* @param TIMx Timer instance
Kojto	136:ef9c61f8c49f	3134	* @retval None
Kojto	136:ef9c61f8c49f	3135	*/
Kojto	136:ef9c61f8c49f	3136	__STATIC_INLINE void LL_TIM_DisableDMAReq_CC2(TIM_TypeDef * TIMx)
Kojto	136:ef9c61f8c49f	3137	{
Kojto	136:ef9c61f8c49f	3138	CLEAR_BIT(TIMx->DIER, TIM_DIER_CC2DE);
Kojto	136:ef9c61f8c49f	3139	}
Kojto	136:ef9c61f8c49f	3140
Kojto	136:ef9c61f8c49f	3141	/**
Kojto	136:ef9c61f8c49f	3142	* @brief Indicates whether the capture/compare 2 DMA request (CC2DE) is enabled.
Kojto	136:ef9c61f8c49f	3143	* @rmtoll DIER CC2DE LL_TIM_IsEnabledDMAReq_CC2
Kojto	136:ef9c61f8c49f	3144	* @param TIMx Timer instance
Kojto	136:ef9c61f8c49f	3145	* @retval State of bit (1 or 0).
Kojto	136:ef9c61f8c49f	3146	*/
Kojto	136:ef9c61f8c49f	3147	__STATIC_INLINE uint32_t LL_TIM_IsEnabledDMAReq_CC2(TIM_TypeDef * TIMx)
Kojto	136:ef9c61f8c49f	3148	{
Kojto	136:ef9c61f8c49f	3149	return (READ_BIT(TIMx->DIER, TIM_DIER_CC2DE) == (TIM_DIER_CC2DE));
Kojto	136:ef9c61f8c49f	3150	}
Kojto	136:ef9c61f8c49f	3151
Kojto	136:ef9c61f8c49f	3152	/**
Kojto	136:ef9c61f8c49f	3153	* @brief Enable capture/compare 3 DMA request (CC3DE).
Kojto	136:ef9c61f8c49f	3154	* @rmtoll DIER CC3DE LL_TIM_EnableDMAReq_CC3
Kojto	136:ef9c61f8c49f	3155	* @param TIMx Timer instance
Kojto	136:ef9c61f8c49f	3156	* @retval None
Kojto	136:ef9c61f8c49f	3157	*/
Kojto	136:ef9c61f8c49f	3158	__STATIC_INLINE void LL_TIM_EnableDMAReq_CC3(TIM_TypeDef * TIMx)
Kojto	136:ef9c61f8c49f	3159	{
Kojto	136:ef9c61f8c49f	3160	SET_BIT(TIMx->DIER, TIM_DIER_CC3DE);
Kojto	136:ef9c61f8c49f	3161	}
Kojto	136:ef9c61f8c49f	3162
Kojto	136:ef9c61f8c49f	3163	/**
Kojto	136:ef9c61f8c49f	3164	* @brief Disable capture/compare 3 DMA request (CC3DE).
Kojto	136:ef9c61f8c49f	3165	* @rmtoll DIER CC3DE LL_TIM_DisableDMAReq_CC3
Kojto	136:ef9c61f8c49f	3166	* @param TIMx Timer instance
Kojto	136:ef9c61f8c49f	3167	* @retval None
Kojto	136:ef9c61f8c49f	3168	*/
Kojto	136:ef9c61f8c49f	3169	__STATIC_INLINE void LL_TIM_DisableDMAReq_CC3(TIM_TypeDef * TIMx)
Kojto	136:ef9c61f8c49f	3170	{
Kojto	136:ef9c61f8c49f	3171	CLEAR_BIT(TIMx->DIER, TIM_DIER_CC3DE);
Kojto	136:ef9c61f8c49f	3172	}
Kojto	136:ef9c61f8c49f	3173
Kojto	136:ef9c61f8c49f	3174	/**
Kojto	136:ef9c61f8c49f	3175	* @brief Indicates whether the capture/compare 3 DMA request (CC3DE) is enabled.
Kojto	136:ef9c61f8c49f	3176	* @rmtoll DIER CC3DE LL_TIM_IsEnabledDMAReq_CC3
Kojto	136:ef9c61f8c49f	3177	* @param TIMx Timer instance
Kojto	136:ef9c61f8c49f	3178	* @retval State of bit (1 or 0).
Kojto	136:ef9c61f8c49f	3179	*/
Kojto	136:ef9c61f8c49f	3180	__STATIC_INLINE uint32_t LL_TIM_IsEnabledDMAReq_CC3(TIM_TypeDef * TIMx)
Kojto	136:ef9c61f8c49f	3181	{
Kojto	136:ef9c61f8c49f	3182	return (READ_BIT(TIMx->DIER, TIM_DIER_CC3DE) == (TIM_DIER_CC3DE));
Kojto	136:ef9c61f8c49f	3183	}
Kojto	136:ef9c61f8c49f	3184
Kojto	136:ef9c61f8c49f	3185	/**
Kojto	136:ef9c61f8c49f	3186	* @brief Enable capture/compare 4 DMA request (CC4DE).
Kojto	136:ef9c61f8c49f	3187	* @rmtoll DIER CC4DE LL_TIM_EnableDMAReq_CC4
Kojto	136:ef9c61f8c49f	3188	* @param TIMx Timer instance
Kojto	136:ef9c61f8c49f	3189	* @retval None
Kojto	136:ef9c61f8c49f	3190	*/
Kojto	136:ef9c61f8c49f	3191	__STATIC_INLINE void LL_TIM_EnableDMAReq_CC4(TIM_TypeDef * TIMx)
Kojto	136:ef9c61f8c49f	3192	{
Kojto	136:ef9c61f8c49f	3193	SET_BIT(TIMx->DIER, TIM_DIER_CC4DE);
Kojto	136:ef9c61f8c49f	3194	}
Kojto	136:ef9c61f8c49f	3195
Kojto	136:ef9c61f8c49f	3196	/**
Kojto	136:ef9c61f8c49f	3197	* @brief Disable capture/compare 4 DMA request (CC4DE).
Kojto	136:ef9c61f8c49f	3198	* @rmtoll DIER CC4DE LL_TIM_DisableDMAReq_CC4
Kojto	136:ef9c61f8c49f	3199	* @param TIMx Timer instance
Kojto	136:ef9c61f8c49f	3200	* @retval None
Kojto	136:ef9c61f8c49f	3201	*/
Kojto	136:ef9c61f8c49f	3202	__STATIC_INLINE void LL_TIM_DisableDMAReq_CC4(TIM_TypeDef * TIMx)
Kojto	136:ef9c61f8c49f	3203	{
Kojto	136:ef9c61f8c49f	3204	CLEAR_BIT(TIMx->DIER, TIM_DIER_CC4DE);
Kojto	136:ef9c61f8c49f	3205	}
Kojto	136:ef9c61f8c49f	3206
Kojto	136:ef9c61f8c49f	3207	/**
Kojto	136:ef9c61f8c49f	3208	* @brief Indicates whether the capture/compare 4 DMA request (CC4DE) is enabled.
Kojto	136:ef9c61f8c49f	3209	* @rmtoll DIER CC4DE LL_TIM_IsEnabledDMAReq_CC4
Kojto	136:ef9c61f8c49f	3210	* @param TIMx Timer instance
Kojto	136:ef9c61f8c49f	3211	* @retval State of bit (1 or 0).
Kojto	136:ef9c61f8c49f	3212	*/
Kojto	136:ef9c61f8c49f	3213	__STATIC_INLINE uint32_t LL_TIM_IsEnabledDMAReq_CC4(TIM_TypeDef * TIMx)
Kojto	136:ef9c61f8c49f	3214	{
Kojto	136:ef9c61f8c49f	3215	return (READ_BIT(TIMx->DIER, TIM_DIER_CC4DE) == (TIM_DIER_CC4DE));
Kojto	136:ef9c61f8c49f	3216	}
Kojto	136:ef9c61f8c49f	3217
Kojto	136:ef9c61f8c49f	3218
Kojto	136:ef9c61f8c49f	3219	/**
Kojto	136:ef9c61f8c49f	3220	* @brief Enable trigger interrupt (TDE).
Kojto	136:ef9c61f8c49f	3221	* @rmtoll DIER TDE LL_TIM_EnableDMAReq_TRIG
Kojto	136:ef9c61f8c49f	3222	* @param TIMx Timer instance
Kojto	136:ef9c61f8c49f	3223	* @retval None
Kojto	136:ef9c61f8c49f	3224	*/
Kojto	136:ef9c61f8c49f	3225	__STATIC_INLINE void LL_TIM_EnableDMAReq_TRIG(TIM_TypeDef * TIMx)
Kojto	136:ef9c61f8c49f	3226	{
Kojto	136:ef9c61f8c49f	3227	SET_BIT(TIMx->DIER, TIM_DIER_TDE);
Kojto	136:ef9c61f8c49f	3228	}
Kojto	136:ef9c61f8c49f	3229
Kojto	136:ef9c61f8c49f	3230	/**
Kojto	136:ef9c61f8c49f	3231	* @brief Disable trigger interrupt (TDE).
Kojto	136:ef9c61f8c49f	3232	* @rmtoll DIER TDE LL_TIM_DisableDMAReq_TRIG
Kojto	136:ef9c61f8c49f	3233	* @param TIMx Timer instance
Kojto	136:ef9c61f8c49f	3234	* @retval None
Kojto	136:ef9c61f8c49f	3235	*/
Kojto	136:ef9c61f8c49f	3236	__STATIC_INLINE void LL_TIM_DisableDMAReq_TRIG(TIM_TypeDef * TIMx)
Kojto	136:ef9c61f8c49f	3237	{
Kojto	136:ef9c61f8c49f	3238	CLEAR_BIT(TIMx->DIER, TIM_DIER_TDE);
Kojto	136:ef9c61f8c49f	3239	}
Kojto	136:ef9c61f8c49f	3240
Kojto	136:ef9c61f8c49f	3241	/**
Kojto	136:ef9c61f8c49f	3242	* @brief Indicates whether the trigger interrupt (TDE) is enabled.
Kojto	136:ef9c61f8c49f	3243	* @rmtoll DIER TDE LL_TIM_IsEnabledDMAReq_TRIG
Kojto	136:ef9c61f8c49f	3244	* @param TIMx Timer instance
Kojto	136:ef9c61f8c49f	3245	* @retval State of bit (1 or 0).
Kojto	136:ef9c61f8c49f	3246	*/
Kojto	136:ef9c61f8c49f	3247	__STATIC_INLINE uint32_t LL_TIM_IsEnabledDMAReq_TRIG(TIM_TypeDef * TIMx)
Kojto	136:ef9c61f8c49f	3248	{
Kojto	136:ef9c61f8c49f	3249	return (READ_BIT(TIMx->DIER, TIM_DIER_TDE) == (TIM_DIER_TDE));
Kojto	136:ef9c61f8c49f	3250	}
Kojto	136:ef9c61f8c49f	3251
Kojto	136:ef9c61f8c49f	3252	/**
Kojto	136:ef9c61f8c49f	3253	* @}
Kojto	136:ef9c61f8c49f	3254	*/
Kojto	136:ef9c61f8c49f	3255
Kojto	136:ef9c61f8c49f	3256	/** @defgroup TIM_LL_EF_EVENT_Management EVENT-Management
Kojto	136:ef9c61f8c49f	3257	* @{
Kojto	136:ef9c61f8c49f	3258	*/
Kojto	136:ef9c61f8c49f	3259	/**
Kojto	136:ef9c61f8c49f	3260	* @brief Generate an update event.
Kojto	136:ef9c61f8c49f	3261	* @rmtoll EGR UG LL_TIM_GenerateEvent_UPDATE
Kojto	136:ef9c61f8c49f	3262	* @param TIMx Timer instance
Kojto	136:ef9c61f8c49f	3263	* @retval None
Kojto	136:ef9c61f8c49f	3264	*/
Kojto	136:ef9c61f8c49f	3265	__STATIC_INLINE void LL_TIM_GenerateEvent_UPDATE(TIM_TypeDef * TIMx)
Kojto	136:ef9c61f8c49f	3266	{
Kojto	136:ef9c61f8c49f	3267	SET_BIT(TIMx->EGR, TIM_EGR_UG);
Kojto	136:ef9c61f8c49f	3268	}
Kojto	136:ef9c61f8c49f	3269
Kojto	136:ef9c61f8c49f	3270	/**
Kojto	136:ef9c61f8c49f	3271	* @brief Generate Capture/Compare 1 event.
Kojto	136:ef9c61f8c49f	3272	* @rmtoll EGR CC1G LL_TIM_GenerateEvent_CC1
Kojto	136:ef9c61f8c49f	3273	* @param TIMx Timer instance
Kojto	136:ef9c61f8c49f	3274	* @retval None
Kojto	136:ef9c61f8c49f	3275	*/
Kojto	136:ef9c61f8c49f	3276	__STATIC_INLINE void LL_TIM_GenerateEvent_CC1(TIM_TypeDef * TIMx)
Kojto	136:ef9c61f8c49f	3277	{
Kojto	136:ef9c61f8c49f	3278	SET_BIT(TIMx->EGR, TIM_EGR_CC1G);
Kojto	136:ef9c61f8c49f	3279	}
Kojto	136:ef9c61f8c49f	3280
Kojto	136:ef9c61f8c49f	3281	/**
Kojto	136:ef9c61f8c49f	3282	* @brief Generate Capture/Compare 2 event.
Kojto	136:ef9c61f8c49f	3283	* @rmtoll EGR CC2G LL_TIM_GenerateEvent_CC2
Kojto	136:ef9c61f8c49f	3284	* @param TIMx Timer instance
Kojto	136:ef9c61f8c49f	3285	* @retval None
Kojto	136:ef9c61f8c49f	3286	*/
Kojto	136:ef9c61f8c49f	3287	__STATIC_INLINE void LL_TIM_GenerateEvent_CC2(TIM_TypeDef * TIMx)
Kojto	136:ef9c61f8c49f	3288	{
Kojto	136:ef9c61f8c49f	3289	SET_BIT(TIMx->EGR, TIM_EGR_CC2G);
Kojto	136:ef9c61f8c49f	3290	}
Kojto	136:ef9c61f8c49f	3291
Kojto	136:ef9c61f8c49f	3292	/**
Kojto	136:ef9c61f8c49f	3293	* @brief Generate Capture/Compare 3 event.
Kojto	136:ef9c61f8c49f	3294	* @rmtoll EGR CC3G LL_TIM_GenerateEvent_CC3
Kojto	136:ef9c61f8c49f	3295	* @param TIMx Timer instance
Kojto	136:ef9c61f8c49f	3296	* @retval None
Kojto	136:ef9c61f8c49f	3297	*/
Kojto	136:ef9c61f8c49f	3298	__STATIC_INLINE void LL_TIM_GenerateEvent_CC3(TIM_TypeDef * TIMx)
Kojto	136:ef9c61f8c49f	3299	{
Kojto	136:ef9c61f8c49f	3300	SET_BIT(TIMx->EGR, TIM_EGR_CC3G);
Kojto	136:ef9c61f8c49f	3301	}
Kojto	136:ef9c61f8c49f	3302
Kojto	136:ef9c61f8c49f	3303	/**
Kojto	136:ef9c61f8c49f	3304	* @brief Generate Capture/Compare 4 event.
Kojto	136:ef9c61f8c49f	3305	* @rmtoll EGR CC4G LL_TIM_GenerateEvent_CC4
Kojto	136:ef9c61f8c49f	3306	* @param TIMx Timer instance
Kojto	136:ef9c61f8c49f	3307	* @retval None
Kojto	136:ef9c61f8c49f	3308	*/
Kojto	136:ef9c61f8c49f	3309	__STATIC_INLINE void LL_TIM_GenerateEvent_CC4(TIM_TypeDef * TIMx)
Kojto	136:ef9c61f8c49f	3310	{
Kojto	136:ef9c61f8c49f	3311	SET_BIT(TIMx->EGR, TIM_EGR_CC4G);
Kojto	136:ef9c61f8c49f	3312	}
Kojto	136:ef9c61f8c49f	3313
Kojto	136:ef9c61f8c49f	3314
Kojto	136:ef9c61f8c49f	3315	/**
Kojto	136:ef9c61f8c49f	3316	* @brief Generate trigger event.
Kojto	136:ef9c61f8c49f	3317	* @rmtoll EGR TG LL_TIM_GenerateEvent_TRIG
Kojto	136:ef9c61f8c49f	3318	* @param TIMx Timer instance
Kojto	136:ef9c61f8c49f	3319	* @retval None
Kojto	136:ef9c61f8c49f	3320	*/
Kojto	136:ef9c61f8c49f	3321	__STATIC_INLINE void LL_TIM_GenerateEvent_TRIG(TIM_TypeDef * TIMx)
Kojto	136:ef9c61f8c49f	3322	{
Kojto	136:ef9c61f8c49f	3323	SET_BIT(TIMx->EGR, TIM_EGR_TG);
Kojto	136:ef9c61f8c49f	3324	}
Kojto	136:ef9c61f8c49f	3325
Kojto	136:ef9c61f8c49f	3326
Kojto	136:ef9c61f8c49f	3327
Kojto	136:ef9c61f8c49f	3328	/**
Kojto	136:ef9c61f8c49f	3329	* @}
Kojto	136:ef9c61f8c49f	3330	*/
Kojto	136:ef9c61f8c49f	3331
Kojto	136:ef9c61f8c49f	3332	#if defined(USE_FULL_LL_DRIVER)
Kojto	136:ef9c61f8c49f	3333	/** @defgroup TIM_LL_EF_Init Initialisation and deinitialisation functions
Kojto	136:ef9c61f8c49f	3334	* @{
Kojto	136:ef9c61f8c49f	3335	*/
Kojto	136:ef9c61f8c49f	3336
Kojto	136:ef9c61f8c49f	3337	ErrorStatus LL_TIM_DeInit(TIM_TypeDef* TIMx);
Kojto	136:ef9c61f8c49f	3338	void LL_TIM_StructInit(LL_TIM_InitTypeDef* TIM_InitStruct);
Kojto	136:ef9c61f8c49f	3339	ErrorStatus LL_TIM_Init(TIM_TypeDef* TIMx, LL_TIM_InitTypeDef* TIM_InitStruct);
Kojto	136:ef9c61f8c49f	3340	void LL_TIM_OC_StructInit(LL_TIM_OC_InitTypeDef* TIM_OC_InitStruct);
Kojto	136:ef9c61f8c49f	3341	ErrorStatus LL_TIM_OC_Init(TIM_TypeDef* TIMx, uint32_t Channel, LL_TIM_OC_InitTypeDef* TIM_OC_InitStruct);
Kojto	136:ef9c61f8c49f	3342	void LL_TIM_IC_StructInit(LL_TIM_IC_InitTypeDef* TIM_ICInitStruct);
Kojto	136:ef9c61f8c49f	3343	ErrorStatus LL_TIM_IC_Init(TIM_TypeDef* TIMx, uint32_t Channel, LL_TIM_IC_InitTypeDef* TIM_IC_InitStruct);
Kojto	136:ef9c61f8c49f	3344	void LL_TIM_ENCODER_StructInit(LL_TIM_ENCODER_InitTypeDef* TIM_EncoderInitStruct);
Kojto	136:ef9c61f8c49f	3345	ErrorStatus LL_TIM_ENCODER_Init(TIM_TypeDef* TIMx, LL_TIM_ENCODER_InitTypeDef* TIM_EncoderInitStruct);
Kojto	136:ef9c61f8c49f	3346	/**
Kojto	136:ef9c61f8c49f	3347	* @}
Kojto	136:ef9c61f8c49f	3348	*/
Kojto	136:ef9c61f8c49f	3349	#endif /* USE_FULL_LL_DRIVER */
Kojto	136:ef9c61f8c49f	3350
Kojto	136:ef9c61f8c49f	3351	/**
Kojto	136:ef9c61f8c49f	3352	* @}
Kojto	136:ef9c61f8c49f	3353	*/
Kojto	136:ef9c61f8c49f	3354
Kojto	136:ef9c61f8c49f	3355	/**
Kojto	136:ef9c61f8c49f	3356	* @}
Kojto	136:ef9c61f8c49f	3357	*/
Kojto	136:ef9c61f8c49f	3358
Kojto	136:ef9c61f8c49f	3359	#endif /* TIM1 \|\| TIM3 \|\| TIM21 \|\| TIM22 \|\| TIM6 \|\| TIM7 */
Kojto	136:ef9c61f8c49f	3360
Kojto	136:ef9c61f8c49f	3361	/**
Kojto	136:ef9c61f8c49f	3362	* @}
Kojto	136:ef9c61f8c49f	3363	*/
Kojto	136:ef9c61f8c49f	3364
Kojto	136:ef9c61f8c49f	3365	#ifdef __cplusplus
Kojto	136:ef9c61f8c49f	3366	}
Kojto	136:ef9c61f8c49f	3367	#endif
Kojto	136:ef9c61f8c49f	3368
Kojto	136:ef9c61f8c49f	3369	#endif /* __STM32L0xx_LL_TIM_H */
Kojto	136:ef9c61f8c49f	3370
Kojto	136:ef9c61f8c49f	3371	/********************** (C) COPYRIGHT STMicroelectronics *END OF FILE**/