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Dependents:   hello SerialTestv11 SerialTestv12 Sierpinski ... more

TARGET_DISCO_L053C8/TARGET_STM/TARGET_STM32L0/device/stm32l0xx_ll_rcc.h@138:093f2bd7b9eb, 2017-03-14 (annotated)

Committer:
<>
Date:
Tue Mar 14 16:20:51 2017 +0000
Revision:
138:093f2bd7b9eb
Parent:
136:ef9c61f8c49f
Child:
167:84c0a372a020
Release 138 of the mbed library



Ports for Upcoming Targets





Fixes and Changes



3716: fix for issue #3715: correction in startup files for ARM and IAR, alignment of system_stm32f429xx.c files https://github.com/ARMmbed/mbed-os/pull/3716

3741: STM32 remove warning in hal_tick_32b.c file https://github.com/ARMmbed/mbed-os/pull/3741

3780: STM32L4 : Fix GPIO G port compatibility https://github.com/ARMmbed/mbed-os/pull/3780

3831: NCS36510: SPISLAVE enabled (Conflict resolved) https://github.com/ARMmbed/mbed-os/pull/3831

3836: Allow to redefine nRF's PSTORAGE_NUM_OF_PAGES outside of the mbed-os https://github.com/ARMmbed/mbed-os/pull/3836

3840: STM32: gpio SPEED - always set High Speed by default https://github.com/ARMmbed/mbed-os/pull/3840

3844: STM32 GPIO: Typo correction. Update comment (GPIO_IP_WITHOUT_BRR) https://github.com/ARMmbed/mbed-os/pull/3844

3850: STM32: change spi error to debug warning https://github.com/ARMmbed/mbed-os/pull/3850

3860: Define GPIO_IP_WITHOUT_BRR for xDot platform https://github.com/ARMmbed/mbed-os/pull/3860

3880: DISCO_F469NI: allow the use of CAN2 instance when CAN1 is not activated https://github.com/ARMmbed/mbed-os/pull/3880

3795: Fix pwm period calc https://github.com/ARMmbed/mbed-os/pull/3795

3828: STM32 CAN API: correct format and type https://github.com/ARMmbed/mbed-os/pull/3828

3842: TARGET_NRF: corrected spi_init() to properly handle re-initialization https://github.com/ARMmbed/mbed-os/pull/3842

3843: STM32L476xG: set APB2 clock to 80MHz (instead of 40MHz) https://github.com/ARMmbed/mbed-os/pull/3843

3879: NUCLEO_F446ZE: Add missing AnalogIn pins on PF_3, PF_5 and PF_10. https://github.com/ARMmbed/mbed-os/pull/3879

3902: Fix heap and stack size for NUCLEO_F746ZG https://github.com/ARMmbed/mbed-os/pull/3902

3829: can_write(): return error code when no tx mailboxes are available https://github.com/ARMmbed/mbed-os/pull/3829

Who changed what in which revision?

UserRevisionLine numberNew contents of line
Kojto 136:ef9c61f8c49f 1 /**
Kojto 136:ef9c61f8c49f 2 ******************************************************************************
Kojto 136:ef9c61f8c49f 3 * @file stm32l0xx_ll_rcc.h
Kojto 136:ef9c61f8c49f 4 * @author MCD Application Team
Kojto 136:ef9c61f8c49f 5 * @version V1.7.0
Kojto 136:ef9c61f8c49f 6 * @date 31-May-2016
Kojto 136:ef9c61f8c49f 7 * @brief Header file of RCC LL module.
Kojto 136:ef9c61f8c49f 8 ******************************************************************************
Kojto 136:ef9c61f8c49f 9 * @attention
Kojto 136:ef9c61f8c49f 10 *
Kojto 136:ef9c61f8c49f 11 * <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
Kojto 136:ef9c61f8c49f 12 *
Kojto 136:ef9c61f8c49f 13 * Redistribution and use in source and binary forms, with or without modification,
Kojto 136:ef9c61f8c49f 14 * are permitted provided that the following conditions are met:
Kojto 136:ef9c61f8c49f 15 * 1. Redistributions of source code must retain the above copyright notice,
Kojto 136:ef9c61f8c49f 16 * this list of conditions and the following disclaimer.
Kojto 136:ef9c61f8c49f 17 * 2. Redistributions in binary form must reproduce the above copyright notice,
Kojto 136:ef9c61f8c49f 18 * this list of conditions and the following disclaimer in the documentation
Kojto 136:ef9c61f8c49f 19 * and/or other materials provided with the distribution.
Kojto 136:ef9c61f8c49f 20 * 3. Neither the name of STMicroelectronics nor the names of its contributors
Kojto 136:ef9c61f8c49f 21 * may be used to endorse or promote products derived from this software
Kojto 136:ef9c61f8c49f 22 * without specific prior written permission.
Kojto 136:ef9c61f8c49f 23 *
Kojto 136:ef9c61f8c49f 24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
Kojto 136:ef9c61f8c49f 25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
Kojto 136:ef9c61f8c49f 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
Kojto 136:ef9c61f8c49f 27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
Kojto 136:ef9c61f8c49f 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
Kojto 136:ef9c61f8c49f 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
Kojto 136:ef9c61f8c49f 30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
Kojto 136:ef9c61f8c49f 31 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
Kojto 136:ef9c61f8c49f 32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
Kojto 136:ef9c61f8c49f 33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
Kojto 136:ef9c61f8c49f 34 *
Kojto 136:ef9c61f8c49f 35 ******************************************************************************
Kojto 136:ef9c61f8c49f 36 */
Kojto 136:ef9c61f8c49f 37
Kojto 136:ef9c61f8c49f 38 /* Define to prevent recursive inclusion -------------------------------------*/
Kojto 136:ef9c61f8c49f 39 #ifndef __STM32L0xx_LL_RCC_H
Kojto 136:ef9c61f8c49f 40 #define __STM32L0xx_LL_RCC_H
Kojto 136:ef9c61f8c49f 41
Kojto 136:ef9c61f8c49f 42 #ifdef __cplusplus
Kojto 136:ef9c61f8c49f 43 extern "C" {
Kojto 136:ef9c61f8c49f 44 #endif
Kojto 136:ef9c61f8c49f 45
Kojto 136:ef9c61f8c49f 46 /* Includes ------------------------------------------------------------------*/
Kojto 136:ef9c61f8c49f 47 #include "stm32l0xx.h"
Kojto 136:ef9c61f8c49f 48
Kojto 136:ef9c61f8c49f 49 /** @addtogroup STM32L0xx_LL_Driver
Kojto 136:ef9c61f8c49f 50 * @{
Kojto 136:ef9c61f8c49f 51 */
Kojto 136:ef9c61f8c49f 52
Kojto 136:ef9c61f8c49f 53 #if defined(RCC)
Kojto 136:ef9c61f8c49f 54
Kojto 136:ef9c61f8c49f 55 /** @defgroup RCC_LL RCC
Kojto 136:ef9c61f8c49f 56 * @{
Kojto 136:ef9c61f8c49f 57 */
Kojto 136:ef9c61f8c49f 58
Kojto 136:ef9c61f8c49f 59 /* Private types -------------------------------------------------------------*/
Kojto 136:ef9c61f8c49f 60 /* Private variables ---------------------------------------------------------*/
Kojto 136:ef9c61f8c49f 61 /** @defgroup RCC_LL_Private_Variables RCC Private Variables
Kojto 136:ef9c61f8c49f 62 * @{
Kojto 136:ef9c61f8c49f 63 */
Kojto 136:ef9c61f8c49f 64
Kojto 136:ef9c61f8c49f 65 /**
Kojto 136:ef9c61f8c49f 66 * @}
Kojto 136:ef9c61f8c49f 67 */
Kojto 136:ef9c61f8c49f 68
Kojto 136:ef9c61f8c49f 69 /* Private constants ---------------------------------------------------------*/
Kojto 136:ef9c61f8c49f 70 /** @defgroup RCC_LL_Private_Constants RCC Private Constants
Kojto 136:ef9c61f8c49f 71 * @{
Kojto 136:ef9c61f8c49f 72 */
Kojto 136:ef9c61f8c49f 73 /* Defines used for the bit position in the register and perform offsets*/
Kojto 136:ef9c61f8c49f 74 #define RCC_POSITION_HPRE (uint32_t)4U /*!< field position in register RCC_CFGR */
Kojto 136:ef9c61f8c49f 75 #define RCC_POSITION_PPRE1 (uint32_t)8U /*!< field position in register RCC_CFGR */
Kojto 136:ef9c61f8c49f 76 #define RCC_POSITION_PPRE2 (uint32_t)11U /*!< field position in register RCC_CFGR */
Kojto 136:ef9c61f8c49f 77 #define RCC_POSITION_PLLDIV (uint32_t)22U /*!< field position in register RCC_CFGR */
Kojto 136:ef9c61f8c49f 78 #define RCC_POSITION_PLLMUL (uint32_t)18U /*!< field position in register RCC_CFGR */
Kojto 136:ef9c61f8c49f 79 #define RCC_POSITION_HSICAL (uint32_t)0U /*!< field position in register RCC_ICSCR */
Kojto 136:ef9c61f8c49f 80 #define RCC_POSITION_HSITRIM (uint32_t)8U /*!< field position in register RCC_ICSCR */
Kojto 136:ef9c61f8c49f 81 #define RCC_POSITION_MSIRANGE (uint32_t)13U /*!< field position in register RCC_ICSCR */
Kojto 136:ef9c61f8c49f 82 #define RCC_POSITION_MSICAL (uint32_t)16U /*!< field position in register RCC_ICSCR */
Kojto 136:ef9c61f8c49f 83 #define RCC_POSITION_MSITRIM (uint32_t)24U /*!< field position in register RCC_ICSCR */
Kojto 136:ef9c61f8c49f 84 #if defined(RCC_HSI48_SUPPORT)
Kojto 136:ef9c61f8c49f 85 #define RCC_POSITION_HSI48CAL (uint32_t)8U /*!< field position in register RCC_CRRCR */
Kojto 136:ef9c61f8c49f 86 #endif /* RCC_HSI48_SUPPORT */
Kojto 136:ef9c61f8c49f 87
Kojto 136:ef9c61f8c49f 88 /**
Kojto 136:ef9c61f8c49f 89 * @}
Kojto 136:ef9c61f8c49f 90 */
Kojto 136:ef9c61f8c49f 91
Kojto 136:ef9c61f8c49f 92 /* Private macros ------------------------------------------------------------*/
Kojto 136:ef9c61f8c49f 93 #if defined(USE_FULL_LL_DRIVER)
Kojto 136:ef9c61f8c49f 94 /** @defgroup RCC_LL_Private_Macros RCC Private Macros
Kojto 136:ef9c61f8c49f 95 * @{
Kojto 136:ef9c61f8c49f 96 */
Kojto 136:ef9c61f8c49f 97 /**
Kojto 136:ef9c61f8c49f 98 * @}
Kojto 136:ef9c61f8c49f 99 */
Kojto 136:ef9c61f8c49f 100 #endif /*USE_FULL_LL_DRIVER*/
Kojto 136:ef9c61f8c49f 101 /* Exported types ------------------------------------------------------------*/
Kojto 136:ef9c61f8c49f 102 #if defined(USE_FULL_LL_DRIVER)
Kojto 136:ef9c61f8c49f 103 /** @defgroup RCC_LL_Exported_Types RCC Exported Types
Kojto 136:ef9c61f8c49f 104 * @{
Kojto 136:ef9c61f8c49f 105 */
Kojto 136:ef9c61f8c49f 106
Kojto 136:ef9c61f8c49f 107 /** @defgroup LL_ES_CLOCK_FREQ Clocks Frequency Structure
Kojto 136:ef9c61f8c49f 108 * @{
Kojto 136:ef9c61f8c49f 109 */
Kojto 136:ef9c61f8c49f 110
Kojto 136:ef9c61f8c49f 111 /**
Kojto 136:ef9c61f8c49f 112 * @brief RCC Clocks Frequency Structure
Kojto 136:ef9c61f8c49f 113 */
Kojto 136:ef9c61f8c49f 114 typedef struct
Kojto 136:ef9c61f8c49f 115 {
Kojto 136:ef9c61f8c49f 116 uint32_t SYSCLK_Frequency; /*!< SYSCLK clock frequency */
Kojto 136:ef9c61f8c49f 117 uint32_t HCLK_Frequency; /*!< HCLK clock frequency */
Kojto 136:ef9c61f8c49f 118 uint32_t PCLK1_Frequency; /*!< PCLK1 clock frequency */
Kojto 136:ef9c61f8c49f 119 uint32_t PCLK2_Frequency; /*!< PCLK2 clock frequency */
Kojto 136:ef9c61f8c49f 120 } LL_RCC_ClocksTypeDef;
Kojto 136:ef9c61f8c49f 121
Kojto 136:ef9c61f8c49f 122 /**
Kojto 136:ef9c61f8c49f 123 * @}
Kojto 136:ef9c61f8c49f 124 */
Kojto 136:ef9c61f8c49f 125
Kojto 136:ef9c61f8c49f 126 /**
Kojto 136:ef9c61f8c49f 127 * @}
Kojto 136:ef9c61f8c49f 128 */
Kojto 136:ef9c61f8c49f 129 #endif /* USE_FULL_LL_DRIVER */
Kojto 136:ef9c61f8c49f 130
Kojto 136:ef9c61f8c49f 131 /* Exported constants --------------------------------------------------------*/
Kojto 136:ef9c61f8c49f 132 /** @defgroup RCC_LL_Exported_Constants RCC Exported Constants
Kojto 136:ef9c61f8c49f 133 * @{
Kojto 136:ef9c61f8c49f 134 */
Kojto 136:ef9c61f8c49f 135
Kojto 136:ef9c61f8c49f 136 /** @defgroup RCC_LL_EC_OSC_VALUES Oscillator Values adaptation
Kojto 136:ef9c61f8c49f 137 * @brief Defines used to adapt values of different oscillators
Kojto 136:ef9c61f8c49f 138 * @note These values could be modified in the user environment according to
Kojto 136:ef9c61f8c49f 139 * HW set-up.
Kojto 136:ef9c61f8c49f 140 * @{
Kojto 136:ef9c61f8c49f 141 */
Kojto 136:ef9c61f8c49f 142 #if !defined (HSE_VALUE)
Kojto 136:ef9c61f8c49f 143 #define HSE_VALUE ((uint32_t)8000000U) /*!< Value of the HSE oscillator in Hz */
Kojto 136:ef9c61f8c49f 144 #endif /* HSE_VALUE */
Kojto 136:ef9c61f8c49f 145
Kojto 136:ef9c61f8c49f 146 #if !defined (HSI_VALUE)
Kojto 136:ef9c61f8c49f 147 #define HSI_VALUE ((uint32_t)16000000U) /*!< Value of the HSI oscillator in Hz */
Kojto 136:ef9c61f8c49f 148 #endif /* HSI_VALUE */
Kojto 136:ef9c61f8c49f 149
Kojto 136:ef9c61f8c49f 150 #if !defined (LSE_VALUE)
Kojto 136:ef9c61f8c49f 151 #define LSE_VALUE ((uint32_t)32768U) /*!< Value of the LSE oscillator in Hz */
Kojto 136:ef9c61f8c49f 152 #endif /* LSE_VALUE */
Kojto 136:ef9c61f8c49f 153
Kojto 136:ef9c61f8c49f 154 #if !defined (LSI_VALUE)
Kojto 136:ef9c61f8c49f 155 #define LSI_VALUE ((uint32_t)37000U) /*!< Value of the LSI oscillator in Hz */
Kojto 136:ef9c61f8c49f 156 #endif /* LSI_VALUE */
Kojto 136:ef9c61f8c49f 157 #if defined(RCC_HSI48_SUPPORT)
Kojto 136:ef9c61f8c49f 158
Kojto 136:ef9c61f8c49f 159 #if !defined (HSI48_VALUE)
Kojto 136:ef9c61f8c49f 160 #define HSI48_VALUE ((uint32_t)48000000U) /*!< Value of the HSI48 oscillator in Hz */
Kojto 136:ef9c61f8c49f 161 #endif /* HSI48_VALUE */
Kojto 136:ef9c61f8c49f 162 #endif /* RCC_HSI48_SUPPORT */
Kojto 136:ef9c61f8c49f 163 /**
Kojto 136:ef9c61f8c49f 164 * @}
Kojto 136:ef9c61f8c49f 165 */
Kojto 136:ef9c61f8c49f 166
Kojto 136:ef9c61f8c49f 167 /** @defgroup RCC_LL_EC_CLEAR_FLAG Clear Flags Defines
Kojto 136:ef9c61f8c49f 168 * @brief Flags defines which can be used with LL_RCC_WriteReg function
Kojto 136:ef9c61f8c49f 169 * @{
Kojto 136:ef9c61f8c49f 170 */
Kojto 136:ef9c61f8c49f 171 #define LL_RCC_CICR_LSIRDYC RCC_CICR_LSIRDYC /*!< LSI Ready Interrupt Clear */
Kojto 136:ef9c61f8c49f 172 #define LL_RCC_CICR_LSERDYC RCC_CICR_LSERDYC /*!< LSE Ready Interrupt Clear */
Kojto 136:ef9c61f8c49f 173 #define LL_RCC_CICR_HSIRDYC RCC_CICR_HSIRDYC /*!< HSI Ready Interrupt Clear */
Kojto 136:ef9c61f8c49f 174 #define LL_RCC_CICR_HSERDYC RCC_CICR_HSERDYC /*!< HSE Ready Interrupt Clear */
Kojto 136:ef9c61f8c49f 175 #define LL_RCC_CICR_PLLRDYC RCC_CICR_PLLRDYC /*!< PLL Ready Interrupt Clear */
Kojto 136:ef9c61f8c49f 176 #define LL_RCC_CICR_MSIRDYC RCC_CICR_MSIRDYC /*!< MSI Ready Interrupt Clear */
Kojto 136:ef9c61f8c49f 177 #if defined(RCC_HSI48_SUPPORT)
Kojto 136:ef9c61f8c49f 178 #define LL_RCC_CICR_HSI48RDYC RCC_CICR_HSI48RDYC /*!< HSI48 Ready Interrupt Clear */
Kojto 136:ef9c61f8c49f 179 #endif /* RCC_HSI48_SUPPORT */
Kojto 136:ef9c61f8c49f 180 #define LL_RCC_CICR_LSECSSC RCC_CICR_LSECSSC /*!< LSE Clock Security System Interrupt Clear */
Kojto 136:ef9c61f8c49f 181 #define LL_RCC_CICR_CSSC RCC_CICR_CSSC /*!< Clock Security System Interrupt Clear */
Kojto 136:ef9c61f8c49f 182 /**
Kojto 136:ef9c61f8c49f 183 * @}
Kojto 136:ef9c61f8c49f 184 */
Kojto 136:ef9c61f8c49f 185
Kojto 136:ef9c61f8c49f 186 /** @defgroup RCC_LL_EC_GET_FLAG Get Flags Defines
Kojto 136:ef9c61f8c49f 187 * @brief Flags defines which can be used with LL_RCC_ReadReg function
Kojto 136:ef9c61f8c49f 188 * @{
Kojto 136:ef9c61f8c49f 189 */
Kojto 136:ef9c61f8c49f 190 #define LL_RCC_CIFR_LSIRDYF RCC_CIFR_LSIRDYF /*!< LSI Ready Interrupt flag */
Kojto 136:ef9c61f8c49f 191 #define LL_RCC_CIFR_LSERDYF RCC_CIFR_LSERDYF /*!< LSE Ready Interrupt flag */
Kojto 136:ef9c61f8c49f 192 #define LL_RCC_CIFR_HSIRDYF RCC_CIFR_HSIRDYF /*!< HSI Ready Interrupt flag */
Kojto 136:ef9c61f8c49f 193 #define LL_RCC_CIFR_HSERDYF RCC_CIFR_HSERDYF /*!< HSE Ready Interrupt flag */
Kojto 136:ef9c61f8c49f 194 #define LL_RCC_CIFR_PLLRDYF RCC_CIFR_PLLRDYF /*!< PLL Ready Interrupt flag */
Kojto 136:ef9c61f8c49f 195 #define LL_RCC_CIFR_MSIRDYF RCC_CIFR_MSIRDYF /*!< MSI Ready Interrupt flag */
Kojto 136:ef9c61f8c49f 196 #if defined(RCC_HSI48_SUPPORT)
Kojto 136:ef9c61f8c49f 197 #define LL_RCC_CIFR_HSI48RDYF RCC_CIFR_HSI48RDYF /*!< HSI48 Ready Interrupt flag */
Kojto 136:ef9c61f8c49f 198 #endif /* RCC_HSI48_SUPPORT */
Kojto 136:ef9c61f8c49f 199 #define LL_RCC_CIFR_LSECSSF RCC_CIFR_LSECSSF /*!< LSE Clock Security System Interrupt flag */
Kojto 136:ef9c61f8c49f 200 #define LL_RCC_CIFR_CSSF RCC_CIFR_CSSF /*!< Clock Security System Interrupt flag */
Kojto 136:ef9c61f8c49f 201 #define LL_RCC_CSR_FWRSTF RCC_CSR_FWRSTF /*!< Firewall reset flag */
Kojto 136:ef9c61f8c49f 202 #define LL_RCC_CSR_OBLRSTF RCC_CSR_OBLRSTF /*!< OBL reset flag */
Kojto 136:ef9c61f8c49f 203 #define LL_RCC_CSR_PINRSTF RCC_CSR_PINRSTF /*!< PIN reset flag */
Kojto 136:ef9c61f8c49f 204 #define LL_RCC_CSR_PORRSTF RCC_CSR_PORRSTF /*!< POR/PDR reset flag */
Kojto 136:ef9c61f8c49f 205 #define LL_RCC_CSR_SFTRSTF RCC_CSR_SFTRSTF /*!< Software Reset flag */
Kojto 136:ef9c61f8c49f 206 #define LL_RCC_CSR_IWDGRSTF RCC_CSR_IWDGRSTF /*!< Independent Watchdog reset flag */
Kojto 136:ef9c61f8c49f 207 #define LL_RCC_CSR_WWDGRSTF RCC_CSR_WWDGRSTF /*!< Window watchdog reset flag */
Kojto 136:ef9c61f8c49f 208 #define LL_RCC_CSR_LPWRRSTF RCC_CSR_LPWRRSTF /*!< Low-Power reset flag */
Kojto 136:ef9c61f8c49f 209 /**
Kojto 136:ef9c61f8c49f 210 * @}
Kojto 136:ef9c61f8c49f 211 */
Kojto 136:ef9c61f8c49f 212
Kojto 136:ef9c61f8c49f 213 /** @defgroup RCC_LL_EC_IT IT Defines
Kojto 136:ef9c61f8c49f 214 * @brief IT defines which can be used with LL_RCC_ReadReg and LL_RCC_WriteReg functions
Kojto 136:ef9c61f8c49f 215 * @{
Kojto 136:ef9c61f8c49f 216 */
Kojto 136:ef9c61f8c49f 217 #define LL_RCC_CIER_LSIRDYIE RCC_CIER_LSIRDYIE /*!< LSI Ready Interrupt Enable */
Kojto 136:ef9c61f8c49f 218 #define LL_RCC_CIER_LSERDYIE RCC_CIER_LSERDYIE /*!< LSE Ready Interrupt Enable */
Kojto 136:ef9c61f8c49f 219 #define LL_RCC_CIER_HSIRDYIE RCC_CIER_HSIRDYIE /*!< HSI Ready Interrupt Enable */
Kojto 136:ef9c61f8c49f 220 #define LL_RCC_CIER_HSERDYIE RCC_CIER_HSERDYIE /*!< HSE Ready Interrupt Enable */
Kojto 136:ef9c61f8c49f 221 #define LL_RCC_CIER_PLLRDYIE RCC_CIER_PLLRDYIE /*!< PLL Ready Interrupt Enable */
Kojto 136:ef9c61f8c49f 222 #define LL_RCC_CIER_MSIRDYIE RCC_CIER_MSIRDYIE /*!< MSI Ready Interrupt Enable */
Kojto 136:ef9c61f8c49f 223 #if defined(RCC_HSI48_SUPPORT)
Kojto 136:ef9c61f8c49f 224 #define LL_RCC_CIER_HSI48RDYIE RCC_CIER_HSI48RDYIE /*!< HSI48 Ready Interrupt Enable */
Kojto 136:ef9c61f8c49f 225 #endif /* RCC_HSI48_SUPPORT */
Kojto 136:ef9c61f8c49f 226 #define LL_RCC_CIER_LSECSSIE RCC_CIER_LSECSSIE /*!< LSE CSS Interrupt Enable */
Kojto 136:ef9c61f8c49f 227 /**
Kojto 136:ef9c61f8c49f 228 * @}
Kojto 136:ef9c61f8c49f 229 */
Kojto 136:ef9c61f8c49f 230
Kojto 136:ef9c61f8c49f 231 /** @defgroup RCC_LL_EC_LSEDRIVE LSE oscillator drive capability
Kojto 136:ef9c61f8c49f 232 * @{
Kojto 136:ef9c61f8c49f 233 */
Kojto 136:ef9c61f8c49f 234 #define LL_RCC_LSEDRIVE_LOW ((uint32_t)0x00000000U) /*!< Xtal mode lower driving capability */
Kojto 136:ef9c61f8c49f 235 #define LL_RCC_LSEDRIVE_MEDIUMLOW RCC_CSR_LSEDRV_0 /*!< Xtal mode medium low driving capability */
Kojto 136:ef9c61f8c49f 236 #define LL_RCC_LSEDRIVE_MEDIUMHIGH RCC_CSR_LSEDRV_1 /*!< Xtal mode medium high driving capability */
Kojto 136:ef9c61f8c49f 237 #define LL_RCC_LSEDRIVE_HIGH RCC_CSR_LSEDRV /*!< Xtal mode higher driving capability */
Kojto 136:ef9c61f8c49f 238 /**
Kojto 136:ef9c61f8c49f 239 * @}
Kojto 136:ef9c61f8c49f 240 */
Kojto 136:ef9c61f8c49f 241
Kojto 136:ef9c61f8c49f 242 /** @defgroup RCC_LL_EC_RTC_HSE_DIV RTC HSE Prescaler
Kojto 136:ef9c61f8c49f 243 * @{
Kojto 136:ef9c61f8c49f 244 */
Kojto 136:ef9c61f8c49f 245 #define LL_RCC_RTC_HSE_DIV_2 (uint32_t)0x00000000U/*!< HSE is divided by 2 for RTC clock */
Kojto 136:ef9c61f8c49f 246 #define LL_RCC_RTC_HSE_DIV_4 RCC_CR_RTCPRE_0 /*!< HSE is divided by 4 for RTC clock */
Kojto 136:ef9c61f8c49f 247 #define LL_RCC_RTC_HSE_DIV_8 RCC_CR_RTCPRE_1 /*!< HSE is divided by 8 for RTC clock */
Kojto 136:ef9c61f8c49f 248 #define LL_RCC_RTC_HSE_DIV_16 RCC_CR_RTCPRE /*!< HSE is divided by 16 for RTC clock */
Kojto 136:ef9c61f8c49f 249 /**
Kojto 136:ef9c61f8c49f 250 * @}
Kojto 136:ef9c61f8c49f 251 */
Kojto 136:ef9c61f8c49f 252
Kojto 136:ef9c61f8c49f 253 /** @defgroup RCC_LL_EC_MSIRANGE MSI clock ranges
Kojto 136:ef9c61f8c49f 254 * @{
Kojto 136:ef9c61f8c49f 255 */
Kojto 136:ef9c61f8c49f 256 #define LL_RCC_MSIRANGE_0 RCC_ICSCR_MSIRANGE_0 /*!< MSI = 65.536 KHz */
Kojto 136:ef9c61f8c49f 257 #define LL_RCC_MSIRANGE_1 RCC_ICSCR_MSIRANGE_1 /*!< MSI = 131.072 KHz*/
Kojto 136:ef9c61f8c49f 258 #define LL_RCC_MSIRANGE_2 RCC_ICSCR_MSIRANGE_2 /*!< MSI = 262.144 KHz */
Kojto 136:ef9c61f8c49f 259 #define LL_RCC_MSIRANGE_3 RCC_ICSCR_MSIRANGE_3 /*!< MSI = 524.288 KHz */
Kojto 136:ef9c61f8c49f 260 #define LL_RCC_MSIRANGE_4 RCC_ICSCR_MSIRANGE_4 /*!< MSI = 1.048 MHz */
Kojto 136:ef9c61f8c49f 261 #define LL_RCC_MSIRANGE_5 RCC_ICSCR_MSIRANGE_5 /*!< MSI = 2.097 MHz */
Kojto 136:ef9c61f8c49f 262 #define LL_RCC_MSIRANGE_6 RCC_ICSCR_MSIRANGE_6 /*!< MSI = 4.194 MHz */
Kojto 136:ef9c61f8c49f 263 /**
Kojto 136:ef9c61f8c49f 264 * @}
Kojto 136:ef9c61f8c49f 265 */
Kojto 136:ef9c61f8c49f 266
Kojto 136:ef9c61f8c49f 267 /** @defgroup RCC_LL_EC_SYS_CLKSOURCE System clock switch
Kojto 136:ef9c61f8c49f 268 * @{
Kojto 136:ef9c61f8c49f 269 */
Kojto 136:ef9c61f8c49f 270 #define LL_RCC_SYS_CLKSOURCE_MSI RCC_CFGR_SW_MSI /*!< MSI selection as system clock */
Kojto 136:ef9c61f8c49f 271 #define LL_RCC_SYS_CLKSOURCE_HSI RCC_CFGR_SW_HSI /*!< HSI selection as system clock */
Kojto 136:ef9c61f8c49f 272 #define LL_RCC_SYS_CLKSOURCE_HSE RCC_CFGR_SW_HSE /*!< HSE selection as system clock */
Kojto 136:ef9c61f8c49f 273 #define LL_RCC_SYS_CLKSOURCE_PLL RCC_CFGR_SW_PLL /*!< PLL selection as system clock */
Kojto 136:ef9c61f8c49f 274 /**
Kojto 136:ef9c61f8c49f 275 * @}
Kojto 136:ef9c61f8c49f 276 */
Kojto 136:ef9c61f8c49f 277
Kojto 136:ef9c61f8c49f 278 /** @defgroup RCC_LL_EC_SYS_CLKSOURCE_STATUS System clock switch status
Kojto 136:ef9c61f8c49f 279 * @{
Kojto 136:ef9c61f8c49f 280 */
Kojto 136:ef9c61f8c49f 281 #define LL_RCC_SYS_CLKSOURCE_STATUS_MSI RCC_CFGR_SWS_MSI /*!< MSI used as system clock */
Kojto 136:ef9c61f8c49f 282 #define LL_RCC_SYS_CLKSOURCE_STATUS_HSI RCC_CFGR_SWS_HSI /*!< HSI used as system clock */
Kojto 136:ef9c61f8c49f 283 #define LL_RCC_SYS_CLKSOURCE_STATUS_HSE RCC_CFGR_SWS_HSE /*!< HSE used as system clock */
Kojto 136:ef9c61f8c49f 284 #define LL_RCC_SYS_CLKSOURCE_STATUS_PLL RCC_CFGR_SWS_PLL /*!< PLL used as system clock */
Kojto 136:ef9c61f8c49f 285 /**
Kojto 136:ef9c61f8c49f 286 * @}
Kojto 136:ef9c61f8c49f 287 */
Kojto 136:ef9c61f8c49f 288
Kojto 136:ef9c61f8c49f 289 /** @defgroup RCC_LL_EC_SYSCLK_DIV AHB prescaler
Kojto 136:ef9c61f8c49f 290 * @{
Kojto 136:ef9c61f8c49f 291 */
Kojto 136:ef9c61f8c49f 292 #define LL_RCC_SYSCLK_DIV_1 RCC_CFGR_HPRE_DIV1 /*!< SYSCLK not divided */
Kojto 136:ef9c61f8c49f 293 #define LL_RCC_SYSCLK_DIV_2 RCC_CFGR_HPRE_DIV2 /*!< SYSCLK divided by 2 */
Kojto 136:ef9c61f8c49f 294 #define LL_RCC_SYSCLK_DIV_4 RCC_CFGR_HPRE_DIV4 /*!< SYSCLK divided by 4 */
Kojto 136:ef9c61f8c49f 295 #define LL_RCC_SYSCLK_DIV_8 RCC_CFGR_HPRE_DIV8 /*!< SYSCLK divided by 8 */
Kojto 136:ef9c61f8c49f 296 #define LL_RCC_SYSCLK_DIV_16 RCC_CFGR_HPRE_DIV16 /*!< SYSCLK divided by 16 */
Kojto 136:ef9c61f8c49f 297 #define LL_RCC_SYSCLK_DIV_64 RCC_CFGR_HPRE_DIV64 /*!< SYSCLK divided by 64 */
Kojto 136:ef9c61f8c49f 298 #define LL_RCC_SYSCLK_DIV_128 RCC_CFGR_HPRE_DIV128 /*!< SYSCLK divided by 128 */
Kojto 136:ef9c61f8c49f 299 #define LL_RCC_SYSCLK_DIV_256 RCC_CFGR_HPRE_DIV256 /*!< SYSCLK divided by 256 */
Kojto 136:ef9c61f8c49f 300 #define LL_RCC_SYSCLK_DIV_512 RCC_CFGR_HPRE_DIV512 /*!< SYSCLK divided by 512 */
Kojto 136:ef9c61f8c49f 301 /**
Kojto 136:ef9c61f8c49f 302 * @}
Kojto 136:ef9c61f8c49f 303 */
Kojto 136:ef9c61f8c49f 304
Kojto 136:ef9c61f8c49f 305 /** @defgroup RCC_LL_EC_APB1_DIV APB low-speed prescaler (APB1)
Kojto 136:ef9c61f8c49f 306 * @{
Kojto 136:ef9c61f8c49f 307 */
Kojto 136:ef9c61f8c49f 308 #define LL_RCC_APB1_DIV_1 RCC_CFGR_PPRE1_DIV1 /*!< HCLK not divided */
Kojto 136:ef9c61f8c49f 309 #define LL_RCC_APB1_DIV_2 RCC_CFGR_PPRE1_DIV2 /*!< HCLK divided by 2 */
Kojto 136:ef9c61f8c49f 310 #define LL_RCC_APB1_DIV_4 RCC_CFGR_PPRE1_DIV4 /*!< HCLK divided by 4 */
Kojto 136:ef9c61f8c49f 311 #define LL_RCC_APB1_DIV_8 RCC_CFGR_PPRE1_DIV8 /*!< HCLK divided by 8 */
Kojto 136:ef9c61f8c49f 312 #define LL_RCC_APB1_DIV_16 RCC_CFGR_PPRE1_DIV16 /*!< HCLK divided by 16 */
Kojto 136:ef9c61f8c49f 313 /**
Kojto 136:ef9c61f8c49f 314 * @}
Kojto 136:ef9c61f8c49f 315 */
Kojto 136:ef9c61f8c49f 316
Kojto 136:ef9c61f8c49f 317 /** @defgroup RCC_LL_EC_APB2_DIV APB high-speed prescaler (APB2)
Kojto 136:ef9c61f8c49f 318 * @{
Kojto 136:ef9c61f8c49f 319 */
Kojto 136:ef9c61f8c49f 320 #define LL_RCC_APB2_DIV_1 RCC_CFGR_PPRE2_DIV1 /*!< HCLK not divided */
Kojto 136:ef9c61f8c49f 321 #define LL_RCC_APB2_DIV_2 RCC_CFGR_PPRE2_DIV2 /*!< HCLK divided by 2 */
Kojto 136:ef9c61f8c49f 322 #define LL_RCC_APB2_DIV_4 RCC_CFGR_PPRE2_DIV4 /*!< HCLK divided by 4 */
Kojto 136:ef9c61f8c49f 323 #define LL_RCC_APB2_DIV_8 RCC_CFGR_PPRE2_DIV8 /*!< HCLK divided by 8 */
Kojto 136:ef9c61f8c49f 324 #define LL_RCC_APB2_DIV_16 RCC_CFGR_PPRE2_DIV16 /*!< HCLK divided by 16 */
Kojto 136:ef9c61f8c49f 325 /**
Kojto 136:ef9c61f8c49f 326 * @}
Kojto 136:ef9c61f8c49f 327 */
Kojto 136:ef9c61f8c49f 328
Kojto 136:ef9c61f8c49f 329 /** @defgroup RCC_LL_EC_STOP_WAKEUPCLOCK Wakeup from Stop and CSS backup clock selection
Kojto 136:ef9c61f8c49f 330 * @{
Kojto 136:ef9c61f8c49f 331 */
Kojto 136:ef9c61f8c49f 332 #define LL_RCC_STOP_WAKEUPCLOCK_MSI ((uint32_t)0x00000000U) /*!< MSI selection after wake-up from STOP */
Kojto 136:ef9c61f8c49f 333 #define LL_RCC_STOP_WAKEUPCLOCK_HSI RCC_CFGR_STOPWUCK /*!< HSI selection after wake-up from STOP */
Kojto 136:ef9c61f8c49f 334 /**
Kojto 136:ef9c61f8c49f 335 * @}
Kojto 136:ef9c61f8c49f 336 */
Kojto 136:ef9c61f8c49f 337
Kojto 136:ef9c61f8c49f 338 /** @defgroup RCC_LL_EC_MCO1SOURCE MCO1 SOURCE selection
Kojto 136:ef9c61f8c49f 339 * @{
Kojto 136:ef9c61f8c49f 340 */
Kojto 136:ef9c61f8c49f 341 #define LL_RCC_MCO1SOURCE_NOCLOCK RCC_CFGR_MCOSEL_NOCLOCK /*!< MCO output disabled, no clock on MCO */
Kojto 136:ef9c61f8c49f 342 #define LL_RCC_MCO1SOURCE_SYSCLK RCC_CFGR_MCOSEL_SYSCLK /*!< SYSCLK selection as MCO source */
Kojto 136:ef9c61f8c49f 343 #define LL_RCC_MCO1SOURCE_HSI RCC_CFGR_MCOSEL_HSI /*!< HSI selection as MCO source */
Kojto 136:ef9c61f8c49f 344 #define LL_RCC_MCO1SOURCE_MSI RCC_CFGR_MCOSEL_MSI /*!< MSI selection as MCO source */
Kojto 136:ef9c61f8c49f 345 #define LL_RCC_MCO1SOURCE_HSE RCC_CFGR_MCOSEL_HSE /*!< HSE selection as MCO source */
Kojto 136:ef9c61f8c49f 346 #define LL_RCC_MCO1SOURCE_LSI RCC_CFGR_MCOSEL_LSI /*!< LSI selection as MCO source */
Kojto 136:ef9c61f8c49f 347 #define LL_RCC_MCO1SOURCE_LSE RCC_CFGR_MCOSEL_LSE /*!< LSE selection as MCO source */
Kojto 136:ef9c61f8c49f 348 #if defined(RCC_CFGR_MCOSEL_HSI48)
Kojto 136:ef9c61f8c49f 349 #define LL_RCC_MCO1SOURCE_HSI48 RCC_CFGR_MCOSEL_HSI48 /*!< HSI48 selection as MCO source */
Kojto 136:ef9c61f8c49f 350 #endif /* RCC_CFGR_MCOSEL_HSI48 */
Kojto 136:ef9c61f8c49f 351 #define LL_RCC_MCO1SOURCE_PLLCLK RCC_CFGR_MCOSEL_PLL /*!< PLLCLK selection as MCO source */
Kojto 136:ef9c61f8c49f 352 /**
Kojto 136:ef9c61f8c49f 353 * @}
Kojto 136:ef9c61f8c49f 354 */
Kojto 136:ef9c61f8c49f 355
Kojto 136:ef9c61f8c49f 356 /** @defgroup RCC_LL_EC_MCO1_DIV MCO1 prescaler
Kojto 136:ef9c61f8c49f 357 * @{
Kojto 136:ef9c61f8c49f 358 */
Kojto 136:ef9c61f8c49f 359 #define LL_RCC_MCO1_DIV_1 RCC_CFGR_MCOPRE_DIV1 /*!< MCO Clock divided by 1 */
Kojto 136:ef9c61f8c49f 360 #define LL_RCC_MCO1_DIV_2 RCC_CFGR_MCOPRE_DIV2 /*!< MCO Clock divided by 2 */
Kojto 136:ef9c61f8c49f 361 #define LL_RCC_MCO1_DIV_4 RCC_CFGR_MCOPRE_DIV4 /*!< MCO Clock divided by 4 */
Kojto 136:ef9c61f8c49f 362 #define LL_RCC_MCO1_DIV_8 RCC_CFGR_MCOPRE_DIV8 /*!< MCO Clock divided by 8 */
Kojto 136:ef9c61f8c49f 363 #define LL_RCC_MCO1_DIV_16 RCC_CFGR_MCOPRE_DIV16 /*!< MCO Clock divided by 16 */
Kojto 136:ef9c61f8c49f 364 /**
Kojto 136:ef9c61f8c49f 365 * @}
Kojto 136:ef9c61f8c49f 366 */
Kojto 136:ef9c61f8c49f 367 #if defined(USE_FULL_LL_DRIVER)
Kojto 136:ef9c61f8c49f 368 /** @defgroup RCC_LL_EC_PERIPH_FREQUENCY Peripheral clock frequency
Kojto 136:ef9c61f8c49f 369 * @{
Kojto 136:ef9c61f8c49f 370 */
Kojto 136:ef9c61f8c49f 371 #define LL_RCC_PERIPH_FREQUENCY_NO (uint32_t)0x00000000U /*!< No clock enabled for the peripheral */
Kojto 136:ef9c61f8c49f 372 #define LL_RCC_PERIPH_FREQUENCY_NA (uint32_t)0xFFFFFFFFU /*!< Frequency cannot be provided as external clock */
Kojto 136:ef9c61f8c49f 373 /**
Kojto 136:ef9c61f8c49f 374 * @}
Kojto 136:ef9c61f8c49f 375 */
Kojto 136:ef9c61f8c49f 376 #endif /* USE_FULL_LL_DRIVER */
Kojto 136:ef9c61f8c49f 377
Kojto 136:ef9c61f8c49f 378 /** @defgroup RCC_LL_EC_USART1_CLKSOURCE Peripheral USART clock source selection
Kojto 136:ef9c61f8c49f 379 * @{
Kojto 136:ef9c61f8c49f 380 */
Kojto 136:ef9c61f8c49f 381 #if defined(RCC_CCIPR_USART1SEL)
Kojto 136:ef9c61f8c49f 382 #define LL_RCC_USART1_CLKSOURCE_PCLK2 (uint32_t)((RCC_CCIPR_USART1SEL << 16U) | 0x00000000U) /*!< PCLK2 selected as USART1 clock */
Kojto 136:ef9c61f8c49f 383 #define LL_RCC_USART1_CLKSOURCE_SYSCLK (uint32_t)((RCC_CCIPR_USART1SEL << 16U) | RCC_CCIPR_USART1SEL_0) /*!< SYSCLK selected as USART1 clock */
Kojto 136:ef9c61f8c49f 384 #define LL_RCC_USART1_CLKSOURCE_HSI (uint32_t)((RCC_CCIPR_USART1SEL << 16U) | RCC_CCIPR_USART1SEL_1) /*!< HSI selected as USART1 clock */
Kojto 136:ef9c61f8c49f 385 #define LL_RCC_USART1_CLKSOURCE_LSE (uint32_t)((RCC_CCIPR_USART1SEL << 16U) | RCC_CCIPR_USART1SEL) /*!< LSE selected as USART1 clock*/
Kojto 136:ef9c61f8c49f 386 #endif /* RCC_CCIPR_USART1SEL */
Kojto 136:ef9c61f8c49f 387 #define LL_RCC_USART2_CLKSOURCE_PCLK1 (uint32_t)((RCC_CCIPR_USART2SEL << 16U) | 0x00000000U) /*!< PCLK1 selected as USART2 clock */
Kojto 136:ef9c61f8c49f 388 #define LL_RCC_USART2_CLKSOURCE_SYSCLK (uint32_t)((RCC_CCIPR_USART2SEL << 16U) | RCC_CCIPR_USART2SEL_0) /*!< SYSCLK selected as USART2 clock */
Kojto 136:ef9c61f8c49f 389 #define LL_RCC_USART2_CLKSOURCE_HSI (uint32_t)((RCC_CCIPR_USART2SEL << 16U) | RCC_CCIPR_USART2SEL_1) /*!< HSI selected as USART2 clock */
Kojto 136:ef9c61f8c49f 390 #define LL_RCC_USART2_CLKSOURCE_LSE (uint32_t)((RCC_CCIPR_USART2SEL << 16U) | RCC_CCIPR_USART2SEL) /*!< LSE selected as USART2 clock*/
Kojto 136:ef9c61f8c49f 391 /**
Kojto 136:ef9c61f8c49f 392 * @}
Kojto 136:ef9c61f8c49f 393 */
Kojto 136:ef9c61f8c49f 394
Kojto 136:ef9c61f8c49f 395
Kojto 136:ef9c61f8c49f 396
Kojto 136:ef9c61f8c49f 397 /** @defgroup RCC_LL_EC_LPUART1_CLKSOURCE Peripheral LPUART clock source selection
Kojto 136:ef9c61f8c49f 398 * @{
Kojto 136:ef9c61f8c49f 399 */
Kojto 136:ef9c61f8c49f 400 #define LL_RCC_LPUART1_CLKSOURCE_PCLK1 (uint32_t)0x00000000U /*!< PCLK1 selected as LPUART1 clock */
Kojto 136:ef9c61f8c49f 401 #define LL_RCC_LPUART1_CLKSOURCE_SYSCLK RCC_CCIPR_LPUART1SEL_0 /*!< SYSCLK selected as LPUART1 clock */
Kojto 136:ef9c61f8c49f 402 #define LL_RCC_LPUART1_CLKSOURCE_HSI RCC_CCIPR_LPUART1SEL_1 /*!< HSI selected as LPUART1 clock */
Kojto 136:ef9c61f8c49f 403 #define LL_RCC_LPUART1_CLKSOURCE_LSE RCC_CCIPR_LPUART1SEL /*!< LSE selected as LPUART1 clock*/
Kojto 136:ef9c61f8c49f 404 /**
Kojto 136:ef9c61f8c49f 405 * @}
Kojto 136:ef9c61f8c49f 406 */
Kojto 136:ef9c61f8c49f 407
Kojto 136:ef9c61f8c49f 408 /** @defgroup RCC_LL_EC_I2C1_CLKSOURCE Peripheral I2C clock source selection
Kojto 136:ef9c61f8c49f 409 * @{
Kojto 136:ef9c61f8c49f 410 */
Kojto 136:ef9c61f8c49f 411 #define LL_RCC_I2C1_CLKSOURCE_PCLK1 (uint32_t)((RCC_CCIPR_I2C1SEL << 4U) | (0x00000000U >> 4U)) /*!< PCLK1 selected as I2C1 clock */
Kojto 136:ef9c61f8c49f 412 #define LL_RCC_I2C1_CLKSOURCE_SYSCLK (uint32_t)((RCC_CCIPR_I2C1SEL << 4U) | (RCC_CCIPR_I2C1SEL_0 >> 4U)) /*!< SYSCLK selected as I2C1 clock */
Kojto 136:ef9c61f8c49f 413 #define LL_RCC_I2C1_CLKSOURCE_HSI (uint32_t)((RCC_CCIPR_I2C1SEL << 4U) | (RCC_CCIPR_I2C1SEL_1 >> 4U)) /*!< HSI selected as I2C1 clock */
Kojto 136:ef9c61f8c49f 414 #if defined(RCC_CCIPR_I2C3SEL)
Kojto 136:ef9c61f8c49f 415 #define LL_RCC_I2C3_CLKSOURCE_PCLK1 (uint32_t)((RCC_CCIPR_I2C3SEL << 4U) | (0x00000000U >> 4U)) /*!< PCLK1 selected as I2C3 clock */
Kojto 136:ef9c61f8c49f 416 #define LL_RCC_I2C3_CLKSOURCE_SYSCLK (uint32_t)((RCC_CCIPR_I2C3SEL << 4U) | (RCC_CCIPR_I2C3SEL_0 >> 4U)) /*!< SYSCLK selected as I2C3 clock */
Kojto 136:ef9c61f8c49f 417 #define LL_RCC_I2C3_CLKSOURCE_HSI (uint32_t)((RCC_CCIPR_I2C3SEL << 4U) | (RCC_CCIPR_I2C3SEL_1 >> 4U)) /*!< HSI selected as I2C3 clock */
Kojto 136:ef9c61f8c49f 418 #endif /*RCC_CCIPR_I2C3SEL*/
Kojto 136:ef9c61f8c49f 419 /**
Kojto 136:ef9c61f8c49f 420 * @}
Kojto 136:ef9c61f8c49f 421 */
Kojto 136:ef9c61f8c49f 422
Kojto 136:ef9c61f8c49f 423 /** @defgroup RCC_LL_EC_LPTIM1_CLKSOURCE Peripheral LPTIM clock source selection
Kojto 136:ef9c61f8c49f 424 * @{
Kojto 136:ef9c61f8c49f 425 */
Kojto 136:ef9c61f8c49f 426 #define LL_RCC_LPTIM1_CLKSOURCE_PCLK1 (uint32_t)(0x00000000U) /*!< PCLK1 selected as LPTIM1 clock */
Kojto 136:ef9c61f8c49f 427 #define LL_RCC_LPTIM1_CLKSOURCE_LSI (uint32_t)RCC_CCIPR_LPTIM1SEL_0 /*!< LSI selected as LPTIM1 clock */
Kojto 136:ef9c61f8c49f 428 #define LL_RCC_LPTIM1_CLKSOURCE_HSI (uint32_t)RCC_CCIPR_LPTIM1SEL_1 /*!< HSI selected as LPTIM1 clock */
Kojto 136:ef9c61f8c49f 429 #define LL_RCC_LPTIM1_CLKSOURCE_LSE (uint32_t)RCC_CCIPR_LPTIM1SEL /*!< LSE selected as LPTIM1 clock*/
Kojto 136:ef9c61f8c49f 430 /**
Kojto 136:ef9c61f8c49f 431 * @}
Kojto 136:ef9c61f8c49f 432 */
Kojto 136:ef9c61f8c49f 433
Kojto 136:ef9c61f8c49f 434 #if defined(RCC_CCIPR_HSI48SEL)
Kojto 136:ef9c61f8c49f 435
Kojto 136:ef9c61f8c49f 436 #if defined(RNG)
Kojto 136:ef9c61f8c49f 437 /** @defgroup RCC_LL_EC_RNG_CLKSOURCE Peripheral RNG clock source selection
Kojto 136:ef9c61f8c49f 438 * @{
Kojto 136:ef9c61f8c49f 439 */
Kojto 136:ef9c61f8c49f 440 #define LL_RCC_RNG_CLKSOURCE_PLL (uint32_t)(0x00000000U) /*!< PLL selected as RNG clock */
Kojto 136:ef9c61f8c49f 441 #define LL_RCC_RNG_CLKSOURCE_HSI48 (uint32_t)(RCC_CCIPR_HSI48SEL) /*!< HSI48 selected as RNG clock*/
Kojto 136:ef9c61f8c49f 442 /**
Kojto 136:ef9c61f8c49f 443 * @}
Kojto 136:ef9c61f8c49f 444 */
Kojto 136:ef9c61f8c49f 445 #endif /* RNG */
Kojto 136:ef9c61f8c49f 446 #if defined(USB)
Kojto 136:ef9c61f8c49f 447 /** @defgroup RCC_LL_EC_USB_CLKSOURCE Peripheral USB clock source selection
Kojto 136:ef9c61f8c49f 448 * @{
Kojto 136:ef9c61f8c49f 449 */
Kojto 136:ef9c61f8c49f 450 #define LL_RCC_USB_CLKSOURCE_PLL (uint32_t)(0x00000000U) /*!< PLL selected as USB clock */
Kojto 136:ef9c61f8c49f 451 #define LL_RCC_USB_CLKSOURCE_HSI48 (uint32_t)(RCC_CCIPR_HSI48SEL) /*!< HSI48 selected as USB clock*/
Kojto 136:ef9c61f8c49f 452 /**
Kojto 136:ef9c61f8c49f 453 * @}
Kojto 136:ef9c61f8c49f 454 */
Kojto 136:ef9c61f8c49f 455
Kojto 136:ef9c61f8c49f 456 #endif /* USB */
Kojto 136:ef9c61f8c49f 457 #endif /* RCC_CCIPR_HSI48SEL */
Kojto 136:ef9c61f8c49f 458
Kojto 136:ef9c61f8c49f 459
Kojto 136:ef9c61f8c49f 460 /** @defgroup RCC_LL_EC_USART1 Peripheral USART get clock source
Kojto 136:ef9c61f8c49f 461 * @{
Kojto 136:ef9c61f8c49f 462 */
Kojto 136:ef9c61f8c49f 463 #if defined(RCC_CCIPR_USART1SEL)
Kojto 136:ef9c61f8c49f 464 #define LL_RCC_USART1_CLKSOURCE RCC_CCIPR_USART1SEL /*!< USART1 clock source selection bits */
Kojto 136:ef9c61f8c49f 465 #endif /* RCC_CCIPR_USART1SEL */
Kojto 136:ef9c61f8c49f 466 #define LL_RCC_USART2_CLKSOURCE RCC_CCIPR_USART2SEL /*!< USART2 clock source selection bits */
Kojto 136:ef9c61f8c49f 467 /**
Kojto 136:ef9c61f8c49f 468 * @}
Kojto 136:ef9c61f8c49f 469 */
Kojto 136:ef9c61f8c49f 470
Kojto 136:ef9c61f8c49f 471
Kojto 136:ef9c61f8c49f 472 /** @defgroup RCC_LL_EC_LPUART1 Peripheral LPUART get clock source
Kojto 136:ef9c61f8c49f 473 * @{
Kojto 136:ef9c61f8c49f 474 */
Kojto 136:ef9c61f8c49f 475 #define LL_RCC_LPUART1_CLKSOURCE RCC_CCIPR_LPUART1SEL /*!< LPUART1 clock source selection bits */
Kojto 136:ef9c61f8c49f 476 /**
Kojto 136:ef9c61f8c49f 477 * @}
Kojto 136:ef9c61f8c49f 478 */
Kojto 136:ef9c61f8c49f 479
Kojto 136:ef9c61f8c49f 480 /** @defgroup RCC_LL_EC_I2C1 Peripheral I2C get clock source
Kojto 136:ef9c61f8c49f 481 * @{
Kojto 136:ef9c61f8c49f 482 */
Kojto 136:ef9c61f8c49f 483 #define LL_RCC_I2C1_CLKSOURCE RCC_CCIPR_I2C1SEL /*!< I2C1 clock source selection bits */
Kojto 136:ef9c61f8c49f 484 #if defined(RCC_CCIPR_I2C3SEL)
Kojto 136:ef9c61f8c49f 485 #define LL_RCC_I2C3_CLKSOURCE RCC_CCIPR_I2C3SEL /*!< I2C3 clock source selection bits */
Kojto 136:ef9c61f8c49f 486 #endif /*RCC_CCIPR_I2C3SEL*/
Kojto 136:ef9c61f8c49f 487 /**
Kojto 136:ef9c61f8c49f 488 * @}
Kojto 136:ef9c61f8c49f 489 */
Kojto 136:ef9c61f8c49f 490
Kojto 136:ef9c61f8c49f 491 /** @defgroup RCC_LL_EC_LPTIM1 Peripheral LPTIM get clock source
Kojto 136:ef9c61f8c49f 492 * @{
Kojto 136:ef9c61f8c49f 493 */
Kojto 136:ef9c61f8c49f 494 #define LL_RCC_LPTIM1_CLKSOURCE RCC_CCIPR_LPTIM1SEL /*!< LPTIM1 clock source selection bits */
Kojto 136:ef9c61f8c49f 495 /**
Kojto 136:ef9c61f8c49f 496 * @}
Kojto 136:ef9c61f8c49f 497 */
Kojto 136:ef9c61f8c49f 498
Kojto 136:ef9c61f8c49f 499 #if defined(RCC_CCIPR_HSI48SEL)
Kojto 136:ef9c61f8c49f 500 #if defined(RNG)
Kojto 136:ef9c61f8c49f 501 /** @defgroup RCC_LL_EC_RNG Peripheral RNG get clock source
Kojto 136:ef9c61f8c49f 502 * @{
Kojto 136:ef9c61f8c49f 503 */
Kojto 136:ef9c61f8c49f 504 #define LL_RCC_RNG_CLKSOURCE RCC_CCIPR_HSI48SEL /*!< HSI48 RC clock source selection bit for RNG*/
Kojto 136:ef9c61f8c49f 505 /**
Kojto 136:ef9c61f8c49f 506 * @}
Kojto 136:ef9c61f8c49f 507 */
Kojto 136:ef9c61f8c49f 508 #endif /* RNG */
Kojto 136:ef9c61f8c49f 509
Kojto 136:ef9c61f8c49f 510 #if defined(USB)
Kojto 136:ef9c61f8c49f 511 /** @defgroup RCC_LL_EC_USB Peripheral USB get clock source
Kojto 136:ef9c61f8c49f 512 * @{
Kojto 136:ef9c61f8c49f 513 */
Kojto 136:ef9c61f8c49f 514 #define LL_RCC_USB_CLKSOURCE RCC_CCIPR_HSI48SEL /*!< HSI48 RC clock source selection bit for USB*/
Kojto 136:ef9c61f8c49f 515 /**
Kojto 136:ef9c61f8c49f 516 * @}
Kojto 136:ef9c61f8c49f 517 */
Kojto 136:ef9c61f8c49f 518
Kojto 136:ef9c61f8c49f 519 #endif /* USB */
Kojto 136:ef9c61f8c49f 520 #endif /* RCC_CCIPR_HSI48SEL */
Kojto 136:ef9c61f8c49f 521
Kojto 136:ef9c61f8c49f 522 /** @defgroup RCC_LL_EC_RTC_CLKSOURCE RTC clock source selection
Kojto 136:ef9c61f8c49f 523 * @{
Kojto 136:ef9c61f8c49f 524 */
Kojto 136:ef9c61f8c49f 525 #define LL_RCC_RTC_CLKSOURCE_NONE (uint32_t)0x00000000U /*!< No clock used as RTC clock */
Kojto 136:ef9c61f8c49f 526 #define LL_RCC_RTC_CLKSOURCE_LSE RCC_CSR_RTCSEL_LSE /*!< LSE oscillator clock used as RTC clock */
Kojto 136:ef9c61f8c49f 527 #define LL_RCC_RTC_CLKSOURCE_LSI RCC_CSR_RTCSEL_LSI /*!< LSI oscillator clock used as RTC clock */
Kojto 136:ef9c61f8c49f 528 #define LL_RCC_RTC_CLKSOURCE_HSE RCC_CSR_RTCSEL_HSE /*!< HSE oscillator clock divided by a programmable prescaler
Kojto 136:ef9c61f8c49f 529 (selection through @ref LL_RCC_SetRTC_HSEPrescaler function ) */
Kojto 136:ef9c61f8c49f 530 /**
Kojto 136:ef9c61f8c49f 531 * @}
Kojto 136:ef9c61f8c49f 532 */
Kojto 136:ef9c61f8c49f 533
Kojto 136:ef9c61f8c49f 534 /** @defgroup RCC_LL_EC_PLL_MUL PLL Multiplicator factor
Kojto 136:ef9c61f8c49f 535 * @{
Kojto 136:ef9c61f8c49f 536 */
Kojto 136:ef9c61f8c49f 537 #define LL_RCC_PLL_MUL_3 RCC_CFGR_PLLMUL3 /*!< PLL input clock * 3 */
Kojto 136:ef9c61f8c49f 538 #define LL_RCC_PLL_MUL_4 RCC_CFGR_PLLMUL4 /*!< PLL input clock * 4 */
Kojto 136:ef9c61f8c49f 539 #define LL_RCC_PLL_MUL_6 RCC_CFGR_PLLMUL6 /*!< PLL input clock * 6 */
Kojto 136:ef9c61f8c49f 540 #define LL_RCC_PLL_MUL_8 RCC_CFGR_PLLMUL8 /*!< PLL input clock * 8 */
Kojto 136:ef9c61f8c49f 541 #define LL_RCC_PLL_MUL_12 RCC_CFGR_PLLMUL12 /*!< PLL input clock * 12 */
Kojto 136:ef9c61f8c49f 542 #define LL_RCC_PLL_MUL_16 RCC_CFGR_PLLMUL16 /*!< PLL input clock * 16 */
Kojto 136:ef9c61f8c49f 543 #define LL_RCC_PLL_MUL_24 RCC_CFGR_PLLMUL24 /*!< PLL input clock * 24 */
Kojto 136:ef9c61f8c49f 544 #define LL_RCC_PLL_MUL_32 RCC_CFGR_PLLMUL32 /*!< PLL input clock * 32 */
Kojto 136:ef9c61f8c49f 545 #define LL_RCC_PLL_MUL_48 RCC_CFGR_PLLMUL48 /*!< PLL input clock * 48 */
Kojto 136:ef9c61f8c49f 546 /**
Kojto 136:ef9c61f8c49f 547 * @}
Kojto 136:ef9c61f8c49f 548 */
Kojto 136:ef9c61f8c49f 549
Kojto 136:ef9c61f8c49f 550 /** @defgroup RCC_LL_EC_PLL_DIV PLL division factor
Kojto 136:ef9c61f8c49f 551 * @{
Kojto 136:ef9c61f8c49f 552 */
Kojto 136:ef9c61f8c49f 553 #define LL_RCC_PLL_DIV_2 RCC_CFGR_PLLDIV2 /*!< PLL clock output = PLLVCO / 2 */
Kojto 136:ef9c61f8c49f 554 #define LL_RCC_PLL_DIV_3 RCC_CFGR_PLLDIV3 /*!< PLL clock output = PLLVCO / 3 */
Kojto 136:ef9c61f8c49f 555 #define LL_RCC_PLL_DIV_4 RCC_CFGR_PLLDIV4 /*!< PLL clock output = PLLVCO / 4 */
Kojto 136:ef9c61f8c49f 556 /**
Kojto 136:ef9c61f8c49f 557 * @}
Kojto 136:ef9c61f8c49f 558 */
Kojto 136:ef9c61f8c49f 559
Kojto 136:ef9c61f8c49f 560 /** @defgroup RCC_LL_EC_PLLSOURCE PLL SOURCE
Kojto 136:ef9c61f8c49f 561 * @{
Kojto 136:ef9c61f8c49f 562 */
Kojto 136:ef9c61f8c49f 563 #define LL_RCC_PLLSOURCE_HSI RCC_CFGR_PLLSRC_HSI /*!< HSI clock selected as PLL entry clock source */
Kojto 136:ef9c61f8c49f 564 #define LL_RCC_PLLSOURCE_HSE RCC_CFGR_PLLSRC_HSE /*!< HSE clock selected as PLL entry clock source */
Kojto 136:ef9c61f8c49f 565 /**
Kojto 136:ef9c61f8c49f 566 * @}
Kojto 136:ef9c61f8c49f 567 */
Kojto 136:ef9c61f8c49f 568
Kojto 136:ef9c61f8c49f 569 /**
Kojto 136:ef9c61f8c49f 570 * @}
Kojto 136:ef9c61f8c49f 571 */
Kojto 136:ef9c61f8c49f 572
Kojto 136:ef9c61f8c49f 573 /* Exported macro ------------------------------------------------------------*/
Kojto 136:ef9c61f8c49f 574 /** @defgroup RCC_LL_Exported_Macros RCC Exported Macros
Kojto 136:ef9c61f8c49f 575 * @{
Kojto 136:ef9c61f8c49f 576 */
Kojto 136:ef9c61f8c49f 577
Kojto 136:ef9c61f8c49f 578 /** @defgroup RCC_LL_EM_WRITE_READ Common Write and read registers Macros
Kojto 136:ef9c61f8c49f 579 * @{
Kojto 136:ef9c61f8c49f 580 */
Kojto 136:ef9c61f8c49f 581
Kojto 136:ef9c61f8c49f 582 /**
Kojto 136:ef9c61f8c49f 583 * @brief Write a value in RCC register
Kojto 136:ef9c61f8c49f 584 * @param __REG__ Register to be written
Kojto 136:ef9c61f8c49f 585 * @param __VALUE__ Value to be written in the register
Kojto 136:ef9c61f8c49f 586 * @retval None
Kojto 136:ef9c61f8c49f 587 */
Kojto 136:ef9c61f8c49f 588 #define LL_RCC_WriteReg(__REG__, __VALUE__) WRITE_REG(RCC->__REG__, (__VALUE__))
Kojto 136:ef9c61f8c49f 589
Kojto 136:ef9c61f8c49f 590 /**
Kojto 136:ef9c61f8c49f 591 * @brief Read a value in RCC register
Kojto 136:ef9c61f8c49f 592 * @param __REG__ Register to be read
Kojto 136:ef9c61f8c49f 593 * @retval Register value
Kojto 136:ef9c61f8c49f 594 */
Kojto 136:ef9c61f8c49f 595 #define LL_RCC_ReadReg(__REG__) READ_REG(RCC->__REG__)
Kojto 136:ef9c61f8c49f 596 /**
Kojto 136:ef9c61f8c49f 597 * @}
Kojto 136:ef9c61f8c49f 598 */
Kojto 136:ef9c61f8c49f 599
Kojto 136:ef9c61f8c49f 600 /** @defgroup RCC_LL_EM_CALC_FREQ Calculate frequencies
Kojto 136:ef9c61f8c49f 601 * @{
Kojto 136:ef9c61f8c49f 602 */
Kojto 136:ef9c61f8c49f 603
Kojto 136:ef9c61f8c49f 604 /**
Kojto 136:ef9c61f8c49f 605 * @brief Helper macro to calculate the PLLCLK frequency
Kojto 136:ef9c61f8c49f 606 * @note ex: @ref __LL_RCC_CALC_PLLCLK_FREQ (HSE_VALUE,
Kojto 136:ef9c61f8c49f 607 * @ref LL_RCC_PLL_GetMultiplicator (),
Kojto 136:ef9c61f8c49f 608 * @ref LL_RCC_PLL_GetDivider ());
Kojto 136:ef9c61f8c49f 609 * @param __INPUTFREQ__ PLL Input frequency (based on MSI/HSE/HSI)
Kojto 136:ef9c61f8c49f 610 * @param __PLLMUL__ This parameter can be one of the following values:
Kojto 136:ef9c61f8c49f 611 * @arg @ref LL_RCC_PLL_MUL_3
Kojto 136:ef9c61f8c49f 612 * @arg @ref LL_RCC_PLL_MUL_4
Kojto 136:ef9c61f8c49f 613 * @arg @ref LL_RCC_PLL_MUL_6
Kojto 136:ef9c61f8c49f 614 * @arg @ref LL_RCC_PLL_MUL_8
Kojto 136:ef9c61f8c49f 615 * @arg @ref LL_RCC_PLL_MUL_12
Kojto 136:ef9c61f8c49f 616 * @arg @ref LL_RCC_PLL_MUL_16
Kojto 136:ef9c61f8c49f 617 * @arg @ref LL_RCC_PLL_MUL_24
Kojto 136:ef9c61f8c49f 618 * @arg @ref LL_RCC_PLL_MUL_32
Kojto 136:ef9c61f8c49f 619 * @arg @ref LL_RCC_PLL_MUL_48
Kojto 136:ef9c61f8c49f 620 * @param __PLLDIV__ This parameter can be one of the following values:
Kojto 136:ef9c61f8c49f 621 * @arg @ref LL_RCC_PLL_DIV_2
Kojto 136:ef9c61f8c49f 622 * @arg @ref LL_RCC_PLL_DIV_3
Kojto 136:ef9c61f8c49f 623 * @arg @ref LL_RCC_PLL_DIV_4
Kojto 136:ef9c61f8c49f 624 * @retval PLL clock frequency (in Hz)
Kojto 136:ef9c61f8c49f 625 */
Kojto 136:ef9c61f8c49f 626 #define __LL_RCC_CALC_PLLCLK_FREQ(__INPUTFREQ__, __PLLMUL__, __PLLDIV__) ((__INPUTFREQ__) * (PLLMulTable[(__PLLMUL__) >> RCC_POSITION_PLLMUL]) / (((__PLLDIV__) >> RCC_POSITION_PLLDIV)+1U))
Kojto 136:ef9c61f8c49f 627
Kojto 136:ef9c61f8c49f 628 /**
Kojto 136:ef9c61f8c49f 629 * @brief Helper macro to calculate the HCLK frequency
Kojto 136:ef9c61f8c49f 630 * @note: __AHBPRESCALER__ be retrieved by @ref LL_RCC_GetAHBPrescaler
Kojto 136:ef9c61f8c49f 631 * ex: __LL_RCC_CALC_HCLK_FREQ(LL_RCC_GetAHBPrescaler())
Kojto 136:ef9c61f8c49f 632 * @param __SYSCLKFREQ__ SYSCLK frequency (based on MSI/HSE/HSI/PLLCLK)
Kojto 136:ef9c61f8c49f 633 * @param __AHBPRESCALER__: This parameter can be one of the following values:
Kojto 136:ef9c61f8c49f 634 * @arg @ref LL_RCC_SYSCLK_DIV_1
Kojto 136:ef9c61f8c49f 635 * @arg @ref LL_RCC_SYSCLK_DIV_2
Kojto 136:ef9c61f8c49f 636 * @arg @ref LL_RCC_SYSCLK_DIV_4
Kojto 136:ef9c61f8c49f 637 * @arg @ref LL_RCC_SYSCLK_DIV_8
Kojto 136:ef9c61f8c49f 638 * @arg @ref LL_RCC_SYSCLK_DIV_16
Kojto 136:ef9c61f8c49f 639 * @arg @ref LL_RCC_SYSCLK_DIV_64
Kojto 136:ef9c61f8c49f 640 * @arg @ref LL_RCC_SYSCLK_DIV_128
Kojto 136:ef9c61f8c49f 641 * @arg @ref LL_RCC_SYSCLK_DIV_256
Kojto 136:ef9c61f8c49f 642 * @arg @ref LL_RCC_SYSCLK_DIV_512
Kojto 136:ef9c61f8c49f 643 * @retval HCLK clock frequency (in Hz)
Kojto 136:ef9c61f8c49f 644 */
Kojto 136:ef9c61f8c49f 645 #define __LL_RCC_CALC_HCLK_FREQ(__SYSCLKFREQ__, __AHBPRESCALER__) ((__SYSCLKFREQ__) >> AHBPrescTable[((__AHBPRESCALER__) & RCC_CFGR_HPRE) >> RCC_POSITION_HPRE])
Kojto 136:ef9c61f8c49f 646
Kojto 136:ef9c61f8c49f 647 /**
Kojto 136:ef9c61f8c49f 648 * @brief Helper macro to calculate the PCLK1 frequency (ABP1)
Kojto 136:ef9c61f8c49f 649 * @note: __APB1PRESCALER__ be retrieved by @ref LL_RCC_GetAPB1Prescaler
Kojto 136:ef9c61f8c49f 650 * ex: __LL_RCC_CALC_PCLK1_FREQ(LL_RCC_GetAPB1Prescaler())
Kojto 136:ef9c61f8c49f 651 * @param __HCLKFREQ__ HCLK frequency
Kojto 136:ef9c61f8c49f 652 * @param __APB1PRESCALER__: This parameter can be one of the following values:
Kojto 136:ef9c61f8c49f 653 * @arg @ref LL_RCC_APB1_DIV_1
Kojto 136:ef9c61f8c49f 654 * @arg @ref LL_RCC_APB1_DIV_2
Kojto 136:ef9c61f8c49f 655 * @arg @ref LL_RCC_APB1_DIV_4
Kojto 136:ef9c61f8c49f 656 * @arg @ref LL_RCC_APB1_DIV_8
Kojto 136:ef9c61f8c49f 657 * @arg @ref LL_RCC_APB1_DIV_16
Kojto 136:ef9c61f8c49f 658 * @retval PCLK1 clock frequency (in Hz)
Kojto 136:ef9c61f8c49f 659 */
Kojto 136:ef9c61f8c49f 660 #define __LL_RCC_CALC_PCLK1_FREQ(__HCLKFREQ__, __APB1PRESCALER__) ((__HCLKFREQ__) >> APBPrescTable[(__APB1PRESCALER__) >> RCC_POSITION_PPRE1])
Kojto 136:ef9c61f8c49f 661
Kojto 136:ef9c61f8c49f 662 /**
Kojto 136:ef9c61f8c49f 663 * @brief Helper macro to calculate the PCLK2 frequency (ABP2)
Kojto 136:ef9c61f8c49f 664 * @note: __APB2PRESCALER__ be retrieved by @ref LL_RCC_GetAPB2Prescaler
Kojto 136:ef9c61f8c49f 665 * ex: __LL_RCC_CALC_PCLK2_FREQ(LL_RCC_GetAPB2Prescaler())
Kojto 136:ef9c61f8c49f 666 * @param __HCLKFREQ__ HCLK frequency
Kojto 136:ef9c61f8c49f 667 * @param __APB2PRESCALER__: This parameter can be one of the following values:
Kojto 136:ef9c61f8c49f 668 * @arg @ref LL_RCC_APB2_DIV_1
Kojto 136:ef9c61f8c49f 669 * @arg @ref LL_RCC_APB2_DIV_2
Kojto 136:ef9c61f8c49f 670 * @arg @ref LL_RCC_APB2_DIV_4
Kojto 136:ef9c61f8c49f 671 * @arg @ref LL_RCC_APB2_DIV_8
Kojto 136:ef9c61f8c49f 672 * @arg @ref LL_RCC_APB2_DIV_16
Kojto 136:ef9c61f8c49f 673 * @retval PCLK2 clock frequency (in Hz)
Kojto 136:ef9c61f8c49f 674 */
Kojto 136:ef9c61f8c49f 675 #define __LL_RCC_CALC_PCLK2_FREQ(__HCLKFREQ__, __APB2PRESCALER__) ((__HCLKFREQ__) >> APBPrescTable[(__APB2PRESCALER__) >> RCC_POSITION_PPRE2])
Kojto 136:ef9c61f8c49f 676
Kojto 136:ef9c61f8c49f 677 /**
Kojto 136:ef9c61f8c49f 678 * @brief Helper macro to calculate the MSI frequency (in Hz)
Kojto 136:ef9c61f8c49f 679 * @note: __MSIRANGE__can be retrieved by @ref LL_RCC_MSI_GetRange
Kojto 136:ef9c61f8c49f 680 * ex: __LL_RCC_CALC_MSI_FREQ(LL_RCC_MSI_GetRange())
Kojto 136:ef9c61f8c49f 681 * @param __MSIRANGE__: This parameter can be one of the following values:
Kojto 136:ef9c61f8c49f 682 * @arg @ref LL_RCC_MSIRANGE_0
Kojto 136:ef9c61f8c49f 683 * @arg @ref LL_RCC_MSIRANGE_1
Kojto 136:ef9c61f8c49f 684 * @arg @ref LL_RCC_MSIRANGE_2
Kojto 136:ef9c61f8c49f 685 * @arg @ref LL_RCC_MSIRANGE_3
Kojto 136:ef9c61f8c49f 686 * @arg @ref LL_RCC_MSIRANGE_4
Kojto 136:ef9c61f8c49f 687 * @arg @ref LL_RCC_MSIRANGE_5
Kojto 136:ef9c61f8c49f 688 * @arg @ref LL_RCC_MSIRANGE_6
Kojto 136:ef9c61f8c49f 689 * @retval MSI clock frequency (in Hz)
Kojto 136:ef9c61f8c49f 690 */
Kojto 136:ef9c61f8c49f 691 #define __LL_RCC_CALC_MSI_FREQ(__MSIRANGE__) ((32768U * ( 1U << (((__MSIRANGE__) >> RCC_POSITION_MSIRANGE) + 1U))))
Kojto 136:ef9c61f8c49f 692
Kojto 136:ef9c61f8c49f 693 /**
Kojto 136:ef9c61f8c49f 694 * @}
Kojto 136:ef9c61f8c49f 695 */
Kojto 136:ef9c61f8c49f 696
Kojto 136:ef9c61f8c49f 697 /**
Kojto 136:ef9c61f8c49f 698 * @}
Kojto 136:ef9c61f8c49f 699 */
Kojto 136:ef9c61f8c49f 700
Kojto 136:ef9c61f8c49f 701 /* Exported functions --------------------------------------------------------*/
Kojto 136:ef9c61f8c49f 702 /** @defgroup RCC_LL_Exported_Functions RCC Exported Functions
Kojto 136:ef9c61f8c49f 703 * @{
Kojto 136:ef9c61f8c49f 704 */
Kojto 136:ef9c61f8c49f 705
Kojto 136:ef9c61f8c49f 706 /** @defgroup RCC_LL_EF_HSE HSE
Kojto 136:ef9c61f8c49f 707 * @{
Kojto 136:ef9c61f8c49f 708 */
Kojto 136:ef9c61f8c49f 709
Kojto 136:ef9c61f8c49f 710 #if defined(RCC_HSECSS_SUPPORT)
Kojto 136:ef9c61f8c49f 711 /**
Kojto 136:ef9c61f8c49f 712 * @brief Enable the Clock Security System.
Kojto 136:ef9c61f8c49f 713 * @rmtoll CR CSSHSEON LL_RCC_HSE_EnableCSS
Kojto 136:ef9c61f8c49f 714 * @retval None
Kojto 136:ef9c61f8c49f 715 */
Kojto 136:ef9c61f8c49f 716 __STATIC_INLINE void LL_RCC_HSE_EnableCSS(void)
Kojto 136:ef9c61f8c49f 717 {
Kojto 136:ef9c61f8c49f 718 SET_BIT(RCC->CR, RCC_CR_CSSON);
Kojto 136:ef9c61f8c49f 719 }
Kojto 136:ef9c61f8c49f 720 #endif /* RCC_HSECSS_SUPPORT */
Kojto 136:ef9c61f8c49f 721
Kojto 136:ef9c61f8c49f 722 /**
Kojto 136:ef9c61f8c49f 723 * @brief Enable HSE external oscillator (HSE Bypass)
Kojto 136:ef9c61f8c49f 724 * @rmtoll CR HSEBYP LL_RCC_HSE_EnableBypass
Kojto 136:ef9c61f8c49f 725 * @retval None
Kojto 136:ef9c61f8c49f 726 */
Kojto 136:ef9c61f8c49f 727 __STATIC_INLINE void LL_RCC_HSE_EnableBypass(void)
Kojto 136:ef9c61f8c49f 728 {
Kojto 136:ef9c61f8c49f 729 SET_BIT(RCC->CR, RCC_CR_HSEBYP);
Kojto 136:ef9c61f8c49f 730 }
Kojto 136:ef9c61f8c49f 731
Kojto 136:ef9c61f8c49f 732 /**
Kojto 136:ef9c61f8c49f 733 * @brief Disable HSE external oscillator (HSE Bypass)
Kojto 136:ef9c61f8c49f 734 * @rmtoll CR HSEBYP LL_RCC_HSE_DisableBypass
Kojto 136:ef9c61f8c49f 735 * @retval None
Kojto 136:ef9c61f8c49f 736 */
Kojto 136:ef9c61f8c49f 737 __STATIC_INLINE void LL_RCC_HSE_DisableBypass(void)
Kojto 136:ef9c61f8c49f 738 {
Kojto 136:ef9c61f8c49f 739 CLEAR_BIT(RCC->CR, RCC_CR_HSEBYP);
Kojto 136:ef9c61f8c49f 740 }
Kojto 136:ef9c61f8c49f 741
Kojto 136:ef9c61f8c49f 742 /**
Kojto 136:ef9c61f8c49f 743 * @brief Enable HSE crystal oscillator (HSE ON)
Kojto 136:ef9c61f8c49f 744 * @rmtoll CR HSEON LL_RCC_HSE_Enable
Kojto 136:ef9c61f8c49f 745 * @retval None
Kojto 136:ef9c61f8c49f 746 */
Kojto 136:ef9c61f8c49f 747 __STATIC_INLINE void LL_RCC_HSE_Enable(void)
Kojto 136:ef9c61f8c49f 748 {
Kojto 136:ef9c61f8c49f 749 SET_BIT(RCC->CR, RCC_CR_HSEON);
Kojto 136:ef9c61f8c49f 750 }
Kojto 136:ef9c61f8c49f 751
Kojto 136:ef9c61f8c49f 752 /**
Kojto 136:ef9c61f8c49f 753 * @brief Disable HSE crystal oscillator (HSE ON)
Kojto 136:ef9c61f8c49f 754 * @rmtoll CR HSEON LL_RCC_HSE_Disable
Kojto 136:ef9c61f8c49f 755 * @retval None
Kojto 136:ef9c61f8c49f 756 */
Kojto 136:ef9c61f8c49f 757 __STATIC_INLINE void LL_RCC_HSE_Disable(void)
Kojto 136:ef9c61f8c49f 758 {
Kojto 136:ef9c61f8c49f 759 CLEAR_BIT(RCC->CR, RCC_CR_HSEON);
Kojto 136:ef9c61f8c49f 760 }
Kojto 136:ef9c61f8c49f 761
Kojto 136:ef9c61f8c49f 762 /**
Kojto 136:ef9c61f8c49f 763 * @brief Check if HSE oscillator Ready
Kojto 136:ef9c61f8c49f 764 * @rmtoll CR HSERDY LL_RCC_HSE_IsReady
Kojto 136:ef9c61f8c49f 765 * @retval State of bit (1 or 0).
Kojto 136:ef9c61f8c49f 766 */
Kojto 136:ef9c61f8c49f 767 __STATIC_INLINE uint32_t LL_RCC_HSE_IsReady(void)
Kojto 136:ef9c61f8c49f 768 {
Kojto 136:ef9c61f8c49f 769 return (READ_BIT(RCC->CR, RCC_CR_HSERDY) == (RCC_CR_HSERDY));
Kojto 136:ef9c61f8c49f 770 }
Kojto 136:ef9c61f8c49f 771
Kojto 136:ef9c61f8c49f 772 /**
Kojto 136:ef9c61f8c49f 773 * @brief Configure the RTC prescaler (divider)
Kojto 136:ef9c61f8c49f 774 * @rmtoll CR RTCPRE LL_RCC_SetRTC_HSEPrescaler
Kojto 136:ef9c61f8c49f 775 * @param Div This parameter can be one of the following values:
Kojto 136:ef9c61f8c49f 776 * @arg @ref LL_RCC_RTC_HSE_DIV_2
Kojto 136:ef9c61f8c49f 777 * @arg @ref LL_RCC_RTC_HSE_DIV_4
Kojto 136:ef9c61f8c49f 778 * @arg @ref LL_RCC_RTC_HSE_DIV_8
Kojto 136:ef9c61f8c49f 779 * @arg @ref LL_RCC_RTC_HSE_DIV_16
Kojto 136:ef9c61f8c49f 780 * @retval None
Kojto 136:ef9c61f8c49f 781 */
Kojto 136:ef9c61f8c49f 782 __STATIC_INLINE void LL_RCC_SetRTC_HSEPrescaler(uint32_t Div)
Kojto 136:ef9c61f8c49f 783 {
Kojto 136:ef9c61f8c49f 784 MODIFY_REG(RCC->CR, RCC_CR_RTCPRE, Div);
Kojto 136:ef9c61f8c49f 785 }
Kojto 136:ef9c61f8c49f 786
Kojto 136:ef9c61f8c49f 787 /**
Kojto 136:ef9c61f8c49f 788 * @brief Get the RTC divider (prescaler)
Kojto 136:ef9c61f8c49f 789 * @rmtoll CR RTCPRE LL_RCC_GetRTC_HSEPrescaler
Kojto 136:ef9c61f8c49f 790 * @retval Returned value can be one of the following values:
Kojto 136:ef9c61f8c49f 791 * @arg @ref LL_RCC_RTC_HSE_DIV_2
Kojto 136:ef9c61f8c49f 792 * @arg @ref LL_RCC_RTC_HSE_DIV_4
Kojto 136:ef9c61f8c49f 793 * @arg @ref LL_RCC_RTC_HSE_DIV_8
Kojto 136:ef9c61f8c49f 794 * @arg @ref LL_RCC_RTC_HSE_DIV_16
Kojto 136:ef9c61f8c49f 795 */
Kojto 136:ef9c61f8c49f 796 __STATIC_INLINE uint32_t LL_RCC_GetRTC_HSEPrescaler(void)
Kojto 136:ef9c61f8c49f 797 {
Kojto 136:ef9c61f8c49f 798 return (uint32_t)(READ_BIT(RCC->CR, RCC_CR_RTCPRE));
Kojto 136:ef9c61f8c49f 799 }
Kojto 136:ef9c61f8c49f 800
Kojto 136:ef9c61f8c49f 801 /**
Kojto 136:ef9c61f8c49f 802 * @}
Kojto 136:ef9c61f8c49f 803 */
Kojto 136:ef9c61f8c49f 804
Kojto 136:ef9c61f8c49f 805 /** @defgroup RCC_LL_EF_HSI HSI
Kojto 136:ef9c61f8c49f 806 * @{
Kojto 136:ef9c61f8c49f 807 */
Kojto 136:ef9c61f8c49f 808
Kojto 136:ef9c61f8c49f 809 /**
Kojto 136:ef9c61f8c49f 810 * @brief Enable HSI oscillator
Kojto 136:ef9c61f8c49f 811 * @rmtoll CR HSION LL_RCC_HSI_Enable
Kojto 136:ef9c61f8c49f 812 * @retval None
Kojto 136:ef9c61f8c49f 813 */
Kojto 136:ef9c61f8c49f 814 __STATIC_INLINE void LL_RCC_HSI_Enable(void)
Kojto 136:ef9c61f8c49f 815 {
Kojto 136:ef9c61f8c49f 816 SET_BIT(RCC->CR, RCC_CR_HSION);
Kojto 136:ef9c61f8c49f 817 }
Kojto 136:ef9c61f8c49f 818
Kojto 136:ef9c61f8c49f 819 /**
Kojto 136:ef9c61f8c49f 820 * @brief Disable HSI oscillator
Kojto 136:ef9c61f8c49f 821 * @rmtoll CR HSION LL_RCC_HSI_Disable
Kojto 136:ef9c61f8c49f 822 * @retval None
Kojto 136:ef9c61f8c49f 823 */
Kojto 136:ef9c61f8c49f 824 __STATIC_INLINE void LL_RCC_HSI_Disable(void)
Kojto 136:ef9c61f8c49f 825 {
Kojto 136:ef9c61f8c49f 826 CLEAR_BIT(RCC->CR, RCC_CR_HSION);
Kojto 136:ef9c61f8c49f 827 }
Kojto 136:ef9c61f8c49f 828
Kojto 136:ef9c61f8c49f 829 /**
Kojto 136:ef9c61f8c49f 830 * @brief Check if HSI clock is ready
Kojto 136:ef9c61f8c49f 831 * @rmtoll CR HSIRDY LL_RCC_HSI_IsReady
Kojto 136:ef9c61f8c49f 832 * @retval State of bit (1 or 0).
Kojto 136:ef9c61f8c49f 833 */
Kojto 136:ef9c61f8c49f 834 __STATIC_INLINE uint32_t LL_RCC_HSI_IsReady(void)
Kojto 136:ef9c61f8c49f 835 {
Kojto 136:ef9c61f8c49f 836 return (READ_BIT(RCC->CR, RCC_CR_HSIRDY) == (RCC_CR_HSIRDY));
Kojto 136:ef9c61f8c49f 837 }
Kojto 136:ef9c61f8c49f 838
Kojto 136:ef9c61f8c49f 839 /**
Kojto 136:ef9c61f8c49f 840 * @brief Enable HSI even in stop mode
Kojto 136:ef9c61f8c49f 841 * @note HSI oscillator is forced ON even in Stop mode
Kojto 136:ef9c61f8c49f 842 * @rmtoll CR HSIKERON LL_RCC_HSI_EnableInStopMode
Kojto 136:ef9c61f8c49f 843 * @retval None
Kojto 136:ef9c61f8c49f 844 */
Kojto 136:ef9c61f8c49f 845 __STATIC_INLINE void LL_RCC_HSI_EnableInStopMode(void)
Kojto 136:ef9c61f8c49f 846 {
Kojto 136:ef9c61f8c49f 847 SET_BIT(RCC->CR, RCC_CR_HSIKERON);
Kojto 136:ef9c61f8c49f 848 }
Kojto 136:ef9c61f8c49f 849
Kojto 136:ef9c61f8c49f 850 /**
Kojto 136:ef9c61f8c49f 851 * @brief Disable HSI in stop mode
Kojto 136:ef9c61f8c49f 852 * @rmtoll CR HSIKERON LL_RCC_HSI_DisableInStopMode
Kojto 136:ef9c61f8c49f 853 * @retval None
Kojto 136:ef9c61f8c49f 854 */
Kojto 136:ef9c61f8c49f 855 __STATIC_INLINE void LL_RCC_HSI_DisableInStopMode(void)
Kojto 136:ef9c61f8c49f 856 {
Kojto 136:ef9c61f8c49f 857 CLEAR_BIT(RCC->CR, RCC_CR_HSIKERON);
Kojto 136:ef9c61f8c49f 858 }
Kojto 136:ef9c61f8c49f 859
Kojto 136:ef9c61f8c49f 860 /**
Kojto 136:ef9c61f8c49f 861 * @brief Enable HSI Divider (it divides by 4)
Kojto 136:ef9c61f8c49f 862 * @rmtoll CR HSIDIVEN LL_RCC_HSI_EnableDivider
Kojto 136:ef9c61f8c49f 863 * @retval None
Kojto 136:ef9c61f8c49f 864 */
Kojto 136:ef9c61f8c49f 865 __STATIC_INLINE void LL_RCC_HSI_EnableDivider(void)
Kojto 136:ef9c61f8c49f 866 {
Kojto 136:ef9c61f8c49f 867 SET_BIT(RCC->CR, RCC_CR_HSIDIVEN);
Kojto 136:ef9c61f8c49f 868 }
Kojto 136:ef9c61f8c49f 869
Kojto 136:ef9c61f8c49f 870 /**
Kojto 136:ef9c61f8c49f 871 * @brief Disable HSI Divider (it divides by 4)
Kojto 136:ef9c61f8c49f 872 * @rmtoll CR HSIDIVEN LL_RCC_HSI_DisableDivider
Kojto 136:ef9c61f8c49f 873 * @retval None
Kojto 136:ef9c61f8c49f 874 */
Kojto 136:ef9c61f8c49f 875 __STATIC_INLINE void LL_RCC_HSI_DisableDivider(void)
Kojto 136:ef9c61f8c49f 876 {
Kojto 136:ef9c61f8c49f 877 CLEAR_BIT(RCC->CR, RCC_CR_HSIDIVEN);
Kojto 136:ef9c61f8c49f 878 }
Kojto 136:ef9c61f8c49f 879
Kojto 136:ef9c61f8c49f 880
Kojto 136:ef9c61f8c49f 881
Kojto 136:ef9c61f8c49f 882 #if defined(RCC_CR_HSIOUTEN)
Kojto 136:ef9c61f8c49f 883 /**
Kojto 136:ef9c61f8c49f 884 * @brief Enable HSI Output
Kojto 136:ef9c61f8c49f 885 * @rmtoll CR HSIOUTEN LL_RCC_HSI_EnableOutput
Kojto 136:ef9c61f8c49f 886 * @retval None
Kojto 136:ef9c61f8c49f 887 */
Kojto 136:ef9c61f8c49f 888 __STATIC_INLINE void LL_RCC_HSI_EnableOutput(void)
Kojto 136:ef9c61f8c49f 889 {
Kojto 136:ef9c61f8c49f 890 SET_BIT(RCC->CR, RCC_CR_HSIOUTEN);
Kojto 136:ef9c61f8c49f 891 }
Kojto 136:ef9c61f8c49f 892
Kojto 136:ef9c61f8c49f 893 /**
Kojto 136:ef9c61f8c49f 894 * @brief Disable HSI Output
Kojto 136:ef9c61f8c49f 895 * @rmtoll CR HSIOUTEN LL_RCC_HSI_DisableOutput
Kojto 136:ef9c61f8c49f 896 * @retval None
Kojto 136:ef9c61f8c49f 897 */
Kojto 136:ef9c61f8c49f 898 __STATIC_INLINE void LL_RCC_HSI_DisableOutput(void)
Kojto 136:ef9c61f8c49f 899 {
Kojto 136:ef9c61f8c49f 900 CLEAR_BIT(RCC->CR, RCC_CR_HSIOUTEN);
Kojto 136:ef9c61f8c49f 901 }
Kojto 136:ef9c61f8c49f 902 #endif /* RCC_CR_HSIOUTEN */
Kojto 136:ef9c61f8c49f 903
Kojto 136:ef9c61f8c49f 904 /**
Kojto 136:ef9c61f8c49f 905 * @brief Get HSI Calibration value
Kojto 136:ef9c61f8c49f 906 * @note When HSITRIM is written, HSICAL is updated with the sum of
Kojto 136:ef9c61f8c49f 907 * HSITRIM and the factory trim value
Kojto 136:ef9c61f8c49f 908 * @rmtoll ICSCR HSICAL LL_RCC_HSI_GetCalibration
Kojto 136:ef9c61f8c49f 909 * @retval Between Min_Data = 0x00 and Max_Data = 0xFF
Kojto 136:ef9c61f8c49f 910 */
Kojto 136:ef9c61f8c49f 911 __STATIC_INLINE uint32_t LL_RCC_HSI_GetCalibration(void)
Kojto 136:ef9c61f8c49f 912 {
Kojto 136:ef9c61f8c49f 913 return (uint32_t)(READ_BIT(RCC->ICSCR, RCC_ICSCR_HSICAL) >> RCC_POSITION_HSICAL);
Kojto 136:ef9c61f8c49f 914 }
Kojto 136:ef9c61f8c49f 915
Kojto 136:ef9c61f8c49f 916 /**
Kojto 136:ef9c61f8c49f 917 * @brief Set HSI Calibration trimming
Kojto 136:ef9c61f8c49f 918 * @note user-programmable trimming value that is added to the HSICAL
Kojto 136:ef9c61f8c49f 919 * @note Default value is 16, which, when added to the HSICAL value,
Kojto 136:ef9c61f8c49f 920 * should trim the HSI to 16 MHz +/- 1 %
Kojto 136:ef9c61f8c49f 921 * @rmtoll ICSCR HSITRIM LL_RCC_HSI_SetCalibTrimming
Kojto 136:ef9c61f8c49f 922 * @param Value between Min_Data = 0x00 and Max_Data = 0x1F
Kojto 136:ef9c61f8c49f 923 * @retval None
Kojto 136:ef9c61f8c49f 924 */
Kojto 136:ef9c61f8c49f 925 __STATIC_INLINE void LL_RCC_HSI_SetCalibTrimming(uint32_t Value)
Kojto 136:ef9c61f8c49f 926 {
Kojto 136:ef9c61f8c49f 927 MODIFY_REG(RCC->ICSCR, RCC_ICSCR_HSITRIM, Value << RCC_POSITION_HSITRIM);
Kojto 136:ef9c61f8c49f 928 }
Kojto 136:ef9c61f8c49f 929
Kojto 136:ef9c61f8c49f 930 /**
Kojto 136:ef9c61f8c49f 931 * @brief Get HSI Calibration trimming
Kojto 136:ef9c61f8c49f 932 * @rmtoll ICSCR HSITRIM LL_RCC_HSI_GetCalibTrimming
Kojto 136:ef9c61f8c49f 933 * @retval Between Min_Data = 0x00 and Max_Data = 0x1F
Kojto 136:ef9c61f8c49f 934 */
Kojto 136:ef9c61f8c49f 935 __STATIC_INLINE uint32_t LL_RCC_HSI_GetCalibTrimming(void)
Kojto 136:ef9c61f8c49f 936 {
Kojto 136:ef9c61f8c49f 937 return (uint32_t)(READ_BIT(RCC->ICSCR, RCC_ICSCR_HSITRIM) >> RCC_POSITION_HSITRIM);
Kojto 136:ef9c61f8c49f 938 }
Kojto 136:ef9c61f8c49f 939
Kojto 136:ef9c61f8c49f 940 /**
Kojto 136:ef9c61f8c49f 941 * @}
Kojto 136:ef9c61f8c49f 942 */
Kojto 136:ef9c61f8c49f 943
Kojto 136:ef9c61f8c49f 944 #if defined(RCC_HSI48_SUPPORT)
Kojto 136:ef9c61f8c49f 945 /** @defgroup RCC_LL_EF_HSI48 HSI48
Kojto 136:ef9c61f8c49f 946 * @{
Kojto 136:ef9c61f8c49f 947 */
Kojto 136:ef9c61f8c49f 948
Kojto 136:ef9c61f8c49f 949 /**
Kojto 136:ef9c61f8c49f 950 * @brief Enable HSI48
Kojto 136:ef9c61f8c49f 951 * @rmtoll CRRCR HSI48ON LL_RCC_HSI48_Enable
Kojto 136:ef9c61f8c49f 952 * @retval None
Kojto 136:ef9c61f8c49f 953 */
Kojto 136:ef9c61f8c49f 954 __STATIC_INLINE void LL_RCC_HSI48_Enable(void)
Kojto 136:ef9c61f8c49f 955 {
Kojto 136:ef9c61f8c49f 956 SET_BIT(RCC->CRRCR, RCC_CRRCR_HSI48ON);
Kojto 136:ef9c61f8c49f 957 }
Kojto 136:ef9c61f8c49f 958
Kojto 136:ef9c61f8c49f 959 /**
Kojto 136:ef9c61f8c49f 960 * @brief Disable HSI48
Kojto 136:ef9c61f8c49f 961 * @rmtoll CRRCR HSI48ON LL_RCC_HSI48_Disable
Kojto 136:ef9c61f8c49f 962 * @retval None
Kojto 136:ef9c61f8c49f 963 */
Kojto 136:ef9c61f8c49f 964 __STATIC_INLINE void LL_RCC_HSI48_Disable(void)
Kojto 136:ef9c61f8c49f 965 {
Kojto 136:ef9c61f8c49f 966 CLEAR_BIT(RCC->CRRCR, RCC_CRRCR_HSI48ON);
Kojto 136:ef9c61f8c49f 967 }
Kojto 136:ef9c61f8c49f 968
Kojto 136:ef9c61f8c49f 969 /**
Kojto 136:ef9c61f8c49f 970 * @brief Check if HSI48 oscillator Ready
Kojto 136:ef9c61f8c49f 971 * @rmtoll CRRCR HSI48RDY LL_RCC_HSI48_IsReady
Kojto 136:ef9c61f8c49f 972 * @retval State of bit (1 or 0).
Kojto 136:ef9c61f8c49f 973 */
Kojto 136:ef9c61f8c49f 974 __STATIC_INLINE uint32_t LL_RCC_HSI48_IsReady(void)
Kojto 136:ef9c61f8c49f 975 {
Kojto 136:ef9c61f8c49f 976 return (READ_BIT(RCC->CRRCR, RCC_CRRCR_HSI48RDY) == (RCC_CRRCR_HSI48RDY));
Kojto 136:ef9c61f8c49f 977 }
Kojto 136:ef9c61f8c49f 978
Kojto 136:ef9c61f8c49f 979 /**
Kojto 136:ef9c61f8c49f 980 * @brief Get HSI48 Calibration value
Kojto 136:ef9c61f8c49f 981 * @rmtoll CRRCR HSI48CAL LL_RCC_HSI48_GetCalibration
Kojto 136:ef9c61f8c49f 982 * @retval Between Min_Data = 0x00 and Max_Data = 0xFF
Kojto 136:ef9c61f8c49f 983 */
Kojto 136:ef9c61f8c49f 984 __STATIC_INLINE uint32_t LL_RCC_HSI48_GetCalibration(void)
Kojto 136:ef9c61f8c49f 985 {
Kojto 136:ef9c61f8c49f 986 return (uint32_t)(READ_BIT(RCC->CRRCR, RCC_CRRCR_HSI48CAL) >> RCC_POSITION_HSI48CAL);
Kojto 136:ef9c61f8c49f 987 }
Kojto 136:ef9c61f8c49f 988
Kojto 136:ef9c61f8c49f 989 #if defined(RCC_CRRCR_HSI48DIV6OUTEN)
Kojto 136:ef9c61f8c49f 990 /**
Kojto 136:ef9c61f8c49f 991 * @brief Enable HSI48 Divider (it divides by 6)
Kojto 136:ef9c61f8c49f 992 * @rmtoll CRRCR HSI48DIV6OUTEN LL_RCC_HSI48_EnableDivider
Kojto 136:ef9c61f8c49f 993 * @retval None
Kojto 136:ef9c61f8c49f 994 */
Kojto 136:ef9c61f8c49f 995 __STATIC_INLINE void LL_RCC_HSI48_EnableDivider(void)
Kojto 136:ef9c61f8c49f 996 {
Kojto 136:ef9c61f8c49f 997 SET_BIT(RCC->CRRCR, RCC_CRRCR_HSI48DIV6OUTEN);
Kojto 136:ef9c61f8c49f 998 }
Kojto 136:ef9c61f8c49f 999
Kojto 136:ef9c61f8c49f 1000 /**
Kojto 136:ef9c61f8c49f 1001 * @brief Disable HSI48 Divider (it divides by 6)
Kojto 136:ef9c61f8c49f 1002 * @rmtoll CRRCR HSI48DIV6OUTEN LL_RCC_HSI48_DisableDivider
Kojto 136:ef9c61f8c49f 1003 * @retval None
Kojto 136:ef9c61f8c49f 1004 */
Kojto 136:ef9c61f8c49f 1005 __STATIC_INLINE void LL_RCC_HSI48_DisableDivider(void)
Kojto 136:ef9c61f8c49f 1006 {
Kojto 136:ef9c61f8c49f 1007 CLEAR_BIT(RCC->CRRCR, RCC_CRRCR_HSI48DIV6OUTEN);
Kojto 136:ef9c61f8c49f 1008 }
Kojto 136:ef9c61f8c49f 1009
Kojto 136:ef9c61f8c49f 1010 /**
Kojto 136:ef9c61f8c49f 1011 * @brief Check if HSI48 Divider is enabled (it divides by 6)
Kojto 136:ef9c61f8c49f 1012 * @rmtoll CRRCR HSI48DIV6OUTEN LL_RCC_HSI48_IsDivided
Kojto 136:ef9c61f8c49f 1013 * @retval State of bit (1 or 0).
Kojto 136:ef9c61f8c49f 1014 */
Kojto 136:ef9c61f8c49f 1015 __STATIC_INLINE uint32_t LL_RCC_HSI48_IsDivided(void)
Kojto 136:ef9c61f8c49f 1016 {
Kojto 136:ef9c61f8c49f 1017 return (READ_BIT(RCC->CRRCR, RCC_CRRCR_HSI48DIV6OUTEN) == (RCC_CRRCR_HSI48DIV6OUTEN));
Kojto 136:ef9c61f8c49f 1018 }
Kojto 136:ef9c61f8c49f 1019
Kojto 136:ef9c61f8c49f 1020 #endif /*RCC_CRRCR_HSI48DIV6OUTEN*/
Kojto 136:ef9c61f8c49f 1021
Kojto 136:ef9c61f8c49f 1022 /**
Kojto 136:ef9c61f8c49f 1023 * @}
Kojto 136:ef9c61f8c49f 1024 */
Kojto 136:ef9c61f8c49f 1025
Kojto 136:ef9c61f8c49f 1026 #endif /* RCC_HSI48_SUPPORT */
Kojto 136:ef9c61f8c49f 1027
Kojto 136:ef9c61f8c49f 1028 /** @defgroup RCC_LL_EF_LSE LSE
Kojto 136:ef9c61f8c49f 1029 * @{
Kojto 136:ef9c61f8c49f 1030 */
Kojto 136:ef9c61f8c49f 1031
Kojto 136:ef9c61f8c49f 1032 /**
Kojto 136:ef9c61f8c49f 1033 * @brief Enable Low Speed External (LSE) crystal.
Kojto 136:ef9c61f8c49f 1034 * @rmtoll CSR LSEON LL_RCC_LSE_Enable
Kojto 136:ef9c61f8c49f 1035 * @retval None
Kojto 136:ef9c61f8c49f 1036 */
Kojto 136:ef9c61f8c49f 1037 __STATIC_INLINE void LL_RCC_LSE_Enable(void)
Kojto 136:ef9c61f8c49f 1038 {
Kojto 136:ef9c61f8c49f 1039 SET_BIT(RCC->CSR, RCC_CSR_LSEON);
Kojto 136:ef9c61f8c49f 1040 }
Kojto 136:ef9c61f8c49f 1041
Kojto 136:ef9c61f8c49f 1042 /**
Kojto 136:ef9c61f8c49f 1043 * @brief Disable Low Speed External (LSE) crystal.
Kojto 136:ef9c61f8c49f 1044 * @rmtoll CSR LSEON LL_RCC_LSE_Disable
Kojto 136:ef9c61f8c49f 1045 * @retval None
Kojto 136:ef9c61f8c49f 1046 */
Kojto 136:ef9c61f8c49f 1047 __STATIC_INLINE void LL_RCC_LSE_Disable(void)
Kojto 136:ef9c61f8c49f 1048 {
Kojto 136:ef9c61f8c49f 1049 CLEAR_BIT(RCC->CSR, RCC_CSR_LSEON);
Kojto 136:ef9c61f8c49f 1050 }
Kojto 136:ef9c61f8c49f 1051
Kojto 136:ef9c61f8c49f 1052 /**
Kojto 136:ef9c61f8c49f 1053 * @brief Enable external clock source (LSE bypass).
Kojto 136:ef9c61f8c49f 1054 * @rmtoll CSR LSEBYP LL_RCC_LSE_EnableBypass
Kojto 136:ef9c61f8c49f 1055 * @retval None
Kojto 136:ef9c61f8c49f 1056 */
Kojto 136:ef9c61f8c49f 1057 __STATIC_INLINE void LL_RCC_LSE_EnableBypass(void)
Kojto 136:ef9c61f8c49f 1058 {
Kojto 136:ef9c61f8c49f 1059 SET_BIT(RCC->CSR, RCC_CSR_LSEBYP);
Kojto 136:ef9c61f8c49f 1060 }
Kojto 136:ef9c61f8c49f 1061
Kojto 136:ef9c61f8c49f 1062 /**
Kojto 136:ef9c61f8c49f 1063 * @brief Disable external clock source (LSE bypass).
Kojto 136:ef9c61f8c49f 1064 * @rmtoll CSR LSEBYP LL_RCC_LSE_DisableBypass
Kojto 136:ef9c61f8c49f 1065 * @retval None
Kojto 136:ef9c61f8c49f 1066 */
Kojto 136:ef9c61f8c49f 1067 __STATIC_INLINE void LL_RCC_LSE_DisableBypass(void)
Kojto 136:ef9c61f8c49f 1068 {
Kojto 136:ef9c61f8c49f 1069 CLEAR_BIT(RCC->CSR, RCC_CSR_LSEBYP);
Kojto 136:ef9c61f8c49f 1070 }
Kojto 136:ef9c61f8c49f 1071
Kojto 136:ef9c61f8c49f 1072 /**
Kojto 136:ef9c61f8c49f 1073 * @brief Set LSE oscillator drive capability
Kojto 136:ef9c61f8c49f 1074 * @note The oscillator is in Xtal mode when it is not in bypass mode.
Kojto 136:ef9c61f8c49f 1075 * @rmtoll CSR LSEDRV LL_RCC_LSE_SetDriveCapability
Kojto 136:ef9c61f8c49f 1076 * @param LSEDrive This parameter can be one of the following values:
Kojto 136:ef9c61f8c49f 1077 * @arg @ref LL_RCC_LSEDRIVE_LOW
Kojto 136:ef9c61f8c49f 1078 * @arg @ref LL_RCC_LSEDRIVE_MEDIUMLOW
Kojto 136:ef9c61f8c49f 1079 * @arg @ref LL_RCC_LSEDRIVE_MEDIUMHIGH
Kojto 136:ef9c61f8c49f 1080 * @arg @ref LL_RCC_LSEDRIVE_HIGH
Kojto 136:ef9c61f8c49f 1081 * @retval None
Kojto 136:ef9c61f8c49f 1082 */
Kojto 136:ef9c61f8c49f 1083 __STATIC_INLINE void LL_RCC_LSE_SetDriveCapability(uint32_t LSEDrive)
Kojto 136:ef9c61f8c49f 1084 {
Kojto 136:ef9c61f8c49f 1085 MODIFY_REG(RCC->CSR, RCC_CSR_LSEDRV, LSEDrive);
Kojto 136:ef9c61f8c49f 1086 }
Kojto 136:ef9c61f8c49f 1087
Kojto 136:ef9c61f8c49f 1088 /**
Kojto 136:ef9c61f8c49f 1089 * @brief Get LSE oscillator drive capability
Kojto 136:ef9c61f8c49f 1090 * @rmtoll CSR LSEDRV LL_RCC_LSE_GetDriveCapability
Kojto 136:ef9c61f8c49f 1091 * @retval Returned value can be one of the following values:
Kojto 136:ef9c61f8c49f 1092 * @arg @ref LL_RCC_LSEDRIVE_LOW
Kojto 136:ef9c61f8c49f 1093 * @arg @ref LL_RCC_LSEDRIVE_MEDIUMLOW
Kojto 136:ef9c61f8c49f 1094 * @arg @ref LL_RCC_LSEDRIVE_MEDIUMHIGH
Kojto 136:ef9c61f8c49f 1095 * @arg @ref LL_RCC_LSEDRIVE_HIGH
Kojto 136:ef9c61f8c49f 1096 */
Kojto 136:ef9c61f8c49f 1097 __STATIC_INLINE uint32_t LL_RCC_LSE_GetDriveCapability(void)
Kojto 136:ef9c61f8c49f 1098 {
Kojto 136:ef9c61f8c49f 1099 return (uint32_t)(READ_BIT(RCC->CSR, RCC_CSR_LSEDRV));
Kojto 136:ef9c61f8c49f 1100 }
Kojto 136:ef9c61f8c49f 1101
Kojto 136:ef9c61f8c49f 1102 /**
Kojto 136:ef9c61f8c49f 1103 * @brief Enable Clock security system on LSE.
Kojto 136:ef9c61f8c49f 1104 * @rmtoll CSR LSECSSON LL_RCC_LSE_EnableCSS
Kojto 136:ef9c61f8c49f 1105 * @retval None
Kojto 136:ef9c61f8c49f 1106 */
Kojto 136:ef9c61f8c49f 1107 __STATIC_INLINE void LL_RCC_LSE_EnableCSS(void)
Kojto 136:ef9c61f8c49f 1108 {
Kojto 136:ef9c61f8c49f 1109 SET_BIT(RCC->CSR, RCC_CSR_LSECSSON);
Kojto 136:ef9c61f8c49f 1110 }
Kojto 136:ef9c61f8c49f 1111
Kojto 136:ef9c61f8c49f 1112 /**
Kojto 136:ef9c61f8c49f 1113 * @brief Disable Clock security system on LSE.
Kojto 136:ef9c61f8c49f 1114 * @note Clock security system can be disabled only after a LSE
Kojto 136:ef9c61f8c49f 1115 * failure detection. In that case it MUST be disabled by software.
Kojto 136:ef9c61f8c49f 1116 * @rmtoll CSR LSECSSON LL_RCC_LSE_DisableCSS
Kojto 136:ef9c61f8c49f 1117 * @retval None
Kojto 136:ef9c61f8c49f 1118 */
Kojto 136:ef9c61f8c49f 1119 __STATIC_INLINE void LL_RCC_LSE_DisableCSS(void)
Kojto 136:ef9c61f8c49f 1120 {
Kojto 136:ef9c61f8c49f 1121 CLEAR_BIT(RCC->CSR, RCC_CSR_LSECSSON);
Kojto 136:ef9c61f8c49f 1122 }
Kojto 136:ef9c61f8c49f 1123
Kojto 136:ef9c61f8c49f 1124 /**
Kojto 136:ef9c61f8c49f 1125 * @brief Check if LSE oscillator Ready
Kojto 136:ef9c61f8c49f 1126 * @rmtoll CSR LSERDY LL_RCC_LSE_IsReady
Kojto 136:ef9c61f8c49f 1127 * @retval State of bit (1 or 0).
Kojto 136:ef9c61f8c49f 1128 */
Kojto 136:ef9c61f8c49f 1129 __STATIC_INLINE uint32_t LL_RCC_LSE_IsReady(void)
Kojto 136:ef9c61f8c49f 1130 {
Kojto 136:ef9c61f8c49f 1131 return (READ_BIT(RCC->CSR, RCC_CSR_LSERDY) == (RCC_CSR_LSERDY));
Kojto 136:ef9c61f8c49f 1132 }
Kojto 136:ef9c61f8c49f 1133
Kojto 136:ef9c61f8c49f 1134 /**
Kojto 136:ef9c61f8c49f 1135 * @brief Check if CSS on LSE failure Detection
Kojto 136:ef9c61f8c49f 1136 * @rmtoll CSR LSECSSD LL_RCC_LSE_IsCSSDetected
Kojto 136:ef9c61f8c49f 1137 * @retval State of bit (1 or 0).
Kojto 136:ef9c61f8c49f 1138 */
Kojto 136:ef9c61f8c49f 1139 __STATIC_INLINE uint32_t LL_RCC_LSE_IsCSSDetected(void)
Kojto 136:ef9c61f8c49f 1140 {
Kojto 136:ef9c61f8c49f 1141 return (READ_BIT(RCC->CSR, RCC_CSR_LSECSSD) == (RCC_CSR_LSECSSD));
Kojto 136:ef9c61f8c49f 1142 }
Kojto 136:ef9c61f8c49f 1143
Kojto 136:ef9c61f8c49f 1144 /**
Kojto 136:ef9c61f8c49f 1145 * @}
Kojto 136:ef9c61f8c49f 1146 */
Kojto 136:ef9c61f8c49f 1147
Kojto 136:ef9c61f8c49f 1148 /** @defgroup RCC_LL_EF_LSI LSI
Kojto 136:ef9c61f8c49f 1149 * @{
Kojto 136:ef9c61f8c49f 1150 */
Kojto 136:ef9c61f8c49f 1151
Kojto 136:ef9c61f8c49f 1152 /**
Kojto 136:ef9c61f8c49f 1153 * @brief Enable LSI Oscillator
Kojto 136:ef9c61f8c49f 1154 * @rmtoll CSR LSION LL_RCC_LSI_Enable
Kojto 136:ef9c61f8c49f 1155 * @retval None
Kojto 136:ef9c61f8c49f 1156 */
Kojto 136:ef9c61f8c49f 1157 __STATIC_INLINE void LL_RCC_LSI_Enable(void)
Kojto 136:ef9c61f8c49f 1158 {
Kojto 136:ef9c61f8c49f 1159 SET_BIT(RCC->CSR, RCC_CSR_LSION);
Kojto 136:ef9c61f8c49f 1160 }
Kojto 136:ef9c61f8c49f 1161
Kojto 136:ef9c61f8c49f 1162 /**
Kojto 136:ef9c61f8c49f 1163 * @brief Disable LSI Oscillator
Kojto 136:ef9c61f8c49f 1164 * @rmtoll CSR LSION LL_RCC_LSI_Disable
Kojto 136:ef9c61f8c49f 1165 * @retval None
Kojto 136:ef9c61f8c49f 1166 */
Kojto 136:ef9c61f8c49f 1167 __STATIC_INLINE void LL_RCC_LSI_Disable(void)
Kojto 136:ef9c61f8c49f 1168 {
Kojto 136:ef9c61f8c49f 1169 CLEAR_BIT(RCC->CSR, RCC_CSR_LSION);
Kojto 136:ef9c61f8c49f 1170 }
Kojto 136:ef9c61f8c49f 1171
Kojto 136:ef9c61f8c49f 1172 /**
Kojto 136:ef9c61f8c49f 1173 * @brief Check if LSI is Ready
Kojto 136:ef9c61f8c49f 1174 * @rmtoll CSR LSIRDY LL_RCC_LSI_IsReady
Kojto 136:ef9c61f8c49f 1175 * @retval State of bit (1 or 0).
Kojto 136:ef9c61f8c49f 1176 */
Kojto 136:ef9c61f8c49f 1177 __STATIC_INLINE uint32_t LL_RCC_LSI_IsReady(void)
Kojto 136:ef9c61f8c49f 1178 {
Kojto 136:ef9c61f8c49f 1179 return (READ_BIT(RCC->CSR, RCC_CSR_LSIRDY) == (RCC_CSR_LSIRDY));
Kojto 136:ef9c61f8c49f 1180 }
Kojto 136:ef9c61f8c49f 1181
Kojto 136:ef9c61f8c49f 1182 /**
Kojto 136:ef9c61f8c49f 1183 * @}
Kojto 136:ef9c61f8c49f 1184 */
Kojto 136:ef9c61f8c49f 1185
Kojto 136:ef9c61f8c49f 1186 /** @defgroup RCC_LL_EF_MSI MSI
Kojto 136:ef9c61f8c49f 1187 * @{
Kojto 136:ef9c61f8c49f 1188 */
Kojto 136:ef9c61f8c49f 1189
Kojto 136:ef9c61f8c49f 1190 /**
Kojto 136:ef9c61f8c49f 1191 * @brief Enable MSI oscillator
Kojto 136:ef9c61f8c49f 1192 * @rmtoll CR MSION LL_RCC_MSI_Enable
Kojto 136:ef9c61f8c49f 1193 * @retval None
Kojto 136:ef9c61f8c49f 1194 */
Kojto 136:ef9c61f8c49f 1195 __STATIC_INLINE void LL_RCC_MSI_Enable(void)
Kojto 136:ef9c61f8c49f 1196 {
Kojto 136:ef9c61f8c49f 1197 SET_BIT(RCC->CR, RCC_CR_MSION);
Kojto 136:ef9c61f8c49f 1198 }
Kojto 136:ef9c61f8c49f 1199
Kojto 136:ef9c61f8c49f 1200 /**
Kojto 136:ef9c61f8c49f 1201 * @brief Disable MSI oscillator
Kojto 136:ef9c61f8c49f 1202 * @rmtoll CR MSION LL_RCC_MSI_Disable
Kojto 136:ef9c61f8c49f 1203 * @retval None
Kojto 136:ef9c61f8c49f 1204 */
Kojto 136:ef9c61f8c49f 1205 __STATIC_INLINE void LL_RCC_MSI_Disable(void)
Kojto 136:ef9c61f8c49f 1206 {
Kojto 136:ef9c61f8c49f 1207 CLEAR_BIT(RCC->CR, RCC_CR_MSION);
Kojto 136:ef9c61f8c49f 1208 }
Kojto 136:ef9c61f8c49f 1209
Kojto 136:ef9c61f8c49f 1210 /**
Kojto 136:ef9c61f8c49f 1211 * @brief Check if MSI oscillator Ready
Kojto 136:ef9c61f8c49f 1212 * @rmtoll CR MSIRDY LL_RCC_MSI_IsReady
Kojto 136:ef9c61f8c49f 1213 * @retval State of bit (1 or 0).
Kojto 136:ef9c61f8c49f 1214 */
Kojto 136:ef9c61f8c49f 1215 __STATIC_INLINE uint32_t LL_RCC_MSI_IsReady(void)
Kojto 136:ef9c61f8c49f 1216 {
Kojto 136:ef9c61f8c49f 1217 return (READ_BIT(RCC->CR, RCC_CR_MSIRDY) == (RCC_CR_MSIRDY));
Kojto 136:ef9c61f8c49f 1218 }
Kojto 136:ef9c61f8c49f 1219
Kojto 136:ef9c61f8c49f 1220 /**
Kojto 136:ef9c61f8c49f 1221 * @brief Configure the Internal Multi Speed oscillator (MSI) clock range in run mode.
Kojto 136:ef9c61f8c49f 1222 * @rmtoll ICSCR MSIRANGE LL_RCC_MSI_SetRange
Kojto 136:ef9c61f8c49f 1223 * @param Range This parameter can be one of the following values:
Kojto 136:ef9c61f8c49f 1224 * @arg @ref LL_RCC_MSIRANGE_0
Kojto 136:ef9c61f8c49f 1225 * @arg @ref LL_RCC_MSIRANGE_1
Kojto 136:ef9c61f8c49f 1226 * @arg @ref LL_RCC_MSIRANGE_2
Kojto 136:ef9c61f8c49f 1227 * @arg @ref LL_RCC_MSIRANGE_3
Kojto 136:ef9c61f8c49f 1228 * @arg @ref LL_RCC_MSIRANGE_4
Kojto 136:ef9c61f8c49f 1229 * @arg @ref LL_RCC_MSIRANGE_5
Kojto 136:ef9c61f8c49f 1230 * @arg @ref LL_RCC_MSIRANGE_6
Kojto 136:ef9c61f8c49f 1231 * @retval None
Kojto 136:ef9c61f8c49f 1232 */
Kojto 136:ef9c61f8c49f 1233 __STATIC_INLINE void LL_RCC_MSI_SetRange(uint32_t Range)
Kojto 136:ef9c61f8c49f 1234 {
Kojto 136:ef9c61f8c49f 1235 MODIFY_REG(RCC->ICSCR, RCC_ICSCR_MSIRANGE, Range);
Kojto 136:ef9c61f8c49f 1236 }
Kojto 136:ef9c61f8c49f 1237
Kojto 136:ef9c61f8c49f 1238 /**
Kojto 136:ef9c61f8c49f 1239 * @brief Get the Internal Multi Speed oscillator (MSI) clock range in run mode.
Kojto 136:ef9c61f8c49f 1240 * @rmtoll ICSCR MSIRANGE LL_RCC_MSI_GetRange
Kojto 136:ef9c61f8c49f 1241 * @retval Returned value can be one of the following values:
Kojto 136:ef9c61f8c49f 1242 * @arg @ref LL_RCC_MSIRANGE_0
Kojto 136:ef9c61f8c49f 1243 * @arg @ref LL_RCC_MSIRANGE_1
Kojto 136:ef9c61f8c49f 1244 * @arg @ref LL_RCC_MSIRANGE_2
Kojto 136:ef9c61f8c49f 1245 * @arg @ref LL_RCC_MSIRANGE_3
Kojto 136:ef9c61f8c49f 1246 * @arg @ref LL_RCC_MSIRANGE_4
Kojto 136:ef9c61f8c49f 1247 * @arg @ref LL_RCC_MSIRANGE_5
Kojto 136:ef9c61f8c49f 1248 * @arg @ref LL_RCC_MSIRANGE_6
Kojto 136:ef9c61f8c49f 1249 */
Kojto 136:ef9c61f8c49f 1250 __STATIC_INLINE uint32_t LL_RCC_MSI_GetRange(void)
Kojto 136:ef9c61f8c49f 1251 {
Kojto 136:ef9c61f8c49f 1252 return (uint32_t)(READ_BIT(RCC->ICSCR, RCC_ICSCR_MSIRANGE));
Kojto 136:ef9c61f8c49f 1253 }
Kojto 136:ef9c61f8c49f 1254
Kojto 136:ef9c61f8c49f 1255 /**
Kojto 136:ef9c61f8c49f 1256 * @brief Get MSI Calibration value
Kojto 136:ef9c61f8c49f 1257 * @note When MSITRIM is written, MSICAL is updated with the sum of
Kojto 136:ef9c61f8c49f 1258 * MSITRIM and the factory trim value
Kojto 136:ef9c61f8c49f 1259 * @rmtoll ICSCR MSICAL LL_RCC_MSI_GetCalibration
Kojto 136:ef9c61f8c49f 1260 * @retval Between Min_Data = 0x00 and Max_Data = 0xFF
Kojto 136:ef9c61f8c49f 1261 */
Kojto 136:ef9c61f8c49f 1262 __STATIC_INLINE uint32_t LL_RCC_MSI_GetCalibration(void)
Kojto 136:ef9c61f8c49f 1263 {
Kojto 136:ef9c61f8c49f 1264 return (uint32_t)(READ_BIT(RCC->ICSCR, RCC_ICSCR_MSICAL) >> RCC_POSITION_MSICAL);
Kojto 136:ef9c61f8c49f 1265 }
Kojto 136:ef9c61f8c49f 1266
Kojto 136:ef9c61f8c49f 1267 /**
Kojto 136:ef9c61f8c49f 1268 * @brief Set MSI Calibration trimming
Kojto 136:ef9c61f8c49f 1269 * @note user-programmable trimming value that is added to the MSICAL
Kojto 136:ef9c61f8c49f 1270 * @rmtoll ICSCR MSITRIM LL_RCC_MSI_SetCalibTrimming
Kojto 136:ef9c61f8c49f 1271 * @param Value between Min_Data = 0x00 and Max_Data = 0xFF
Kojto 136:ef9c61f8c49f 1272 * @retval None
Kojto 136:ef9c61f8c49f 1273 */
Kojto 136:ef9c61f8c49f 1274 __STATIC_INLINE void LL_RCC_MSI_SetCalibTrimming(uint32_t Value)
Kojto 136:ef9c61f8c49f 1275 {
Kojto 136:ef9c61f8c49f 1276 MODIFY_REG(RCC->ICSCR, RCC_ICSCR_MSITRIM, Value << RCC_POSITION_MSITRIM);
Kojto 136:ef9c61f8c49f 1277 }
Kojto 136:ef9c61f8c49f 1278
Kojto 136:ef9c61f8c49f 1279 /**
Kojto 136:ef9c61f8c49f 1280 * @brief Get MSI Calibration trimming
Kojto 136:ef9c61f8c49f 1281 * @rmtoll ICSCR MSITRIM LL_RCC_MSI_GetCalibTrimming
Kojto 136:ef9c61f8c49f 1282 * @retval Between Min_Data = 0x00 and Max_Data = 0xFF
Kojto 136:ef9c61f8c49f 1283 */
Kojto 136:ef9c61f8c49f 1284 __STATIC_INLINE uint32_t LL_RCC_MSI_GetCalibTrimming(void)
Kojto 136:ef9c61f8c49f 1285 {
Kojto 136:ef9c61f8c49f 1286 return (uint32_t)(READ_BIT(RCC->ICSCR, RCC_ICSCR_MSITRIM) >> RCC_POSITION_MSITRIM);
Kojto 136:ef9c61f8c49f 1287 }
Kojto 136:ef9c61f8c49f 1288
Kojto 136:ef9c61f8c49f 1289 /**
Kojto 136:ef9c61f8c49f 1290 * @}
Kojto 136:ef9c61f8c49f 1291 */
Kojto 136:ef9c61f8c49f 1292
Kojto 136:ef9c61f8c49f 1293 /** @defgroup RCC_LL_EF_System System
Kojto 136:ef9c61f8c49f 1294 * @{
Kojto 136:ef9c61f8c49f 1295 */
Kojto 136:ef9c61f8c49f 1296
Kojto 136:ef9c61f8c49f 1297 /**
Kojto 136:ef9c61f8c49f 1298 * @brief Configure the system clock source
Kojto 136:ef9c61f8c49f 1299 * @rmtoll CFGR SW LL_RCC_SetSysClkSource
Kojto 136:ef9c61f8c49f 1300 * @param Source This parameter can be one of the following values:
Kojto 136:ef9c61f8c49f 1301 * @arg @ref LL_RCC_SYS_CLKSOURCE_MSI
Kojto 136:ef9c61f8c49f 1302 * @arg @ref LL_RCC_SYS_CLKSOURCE_HSI
Kojto 136:ef9c61f8c49f 1303 * @arg @ref LL_RCC_SYS_CLKSOURCE_HSE
Kojto 136:ef9c61f8c49f 1304 * @arg @ref LL_RCC_SYS_CLKSOURCE_PLL
Kojto 136:ef9c61f8c49f 1305 * @retval None
Kojto 136:ef9c61f8c49f 1306 */
Kojto 136:ef9c61f8c49f 1307 __STATIC_INLINE void LL_RCC_SetSysClkSource(uint32_t Source)
Kojto 136:ef9c61f8c49f 1308 {
Kojto 136:ef9c61f8c49f 1309 MODIFY_REG(RCC->CFGR, RCC_CFGR_SW, Source);
Kojto 136:ef9c61f8c49f 1310 }
Kojto 136:ef9c61f8c49f 1311
Kojto 136:ef9c61f8c49f 1312 /**
Kojto 136:ef9c61f8c49f 1313 * @brief Get the system clock source
Kojto 136:ef9c61f8c49f 1314 * @rmtoll CFGR SWS LL_RCC_GetSysClkSource
Kojto 136:ef9c61f8c49f 1315 * @retval Returned value can be one of the following values:
Kojto 136:ef9c61f8c49f 1316 * @arg @ref LL_RCC_SYS_CLKSOURCE_STATUS_MSI
Kojto 136:ef9c61f8c49f 1317 * @arg @ref LL_RCC_SYS_CLKSOURCE_STATUS_HSI
Kojto 136:ef9c61f8c49f 1318 * @arg @ref LL_RCC_SYS_CLKSOURCE_STATUS_HSE
Kojto 136:ef9c61f8c49f 1319 * @arg @ref LL_RCC_SYS_CLKSOURCE_STATUS_PLL
Kojto 136:ef9c61f8c49f 1320 */
Kojto 136:ef9c61f8c49f 1321 __STATIC_INLINE uint32_t LL_RCC_GetSysClkSource(void)
Kojto 136:ef9c61f8c49f 1322 {
Kojto 136:ef9c61f8c49f 1323 return (uint32_t)(READ_BIT(RCC->CFGR, RCC_CFGR_SWS));
Kojto 136:ef9c61f8c49f 1324 }
Kojto 136:ef9c61f8c49f 1325
Kojto 136:ef9c61f8c49f 1326 /**
Kojto 136:ef9c61f8c49f 1327 * @brief Set AHB prescaler
Kojto 136:ef9c61f8c49f 1328 * @rmtoll CFGR HPRE LL_RCC_SetAHBPrescaler
Kojto 136:ef9c61f8c49f 1329 * @param Prescaler This parameter can be one of the following values:
Kojto 136:ef9c61f8c49f 1330 * @arg @ref LL_RCC_SYSCLK_DIV_1
Kojto 136:ef9c61f8c49f 1331 * @arg @ref LL_RCC_SYSCLK_DIV_2
Kojto 136:ef9c61f8c49f 1332 * @arg @ref LL_RCC_SYSCLK_DIV_4
Kojto 136:ef9c61f8c49f 1333 * @arg @ref LL_RCC_SYSCLK_DIV_8
Kojto 136:ef9c61f8c49f 1334 * @arg @ref LL_RCC_SYSCLK_DIV_16
Kojto 136:ef9c61f8c49f 1335 * @arg @ref LL_RCC_SYSCLK_DIV_64
Kojto 136:ef9c61f8c49f 1336 * @arg @ref LL_RCC_SYSCLK_DIV_128
Kojto 136:ef9c61f8c49f 1337 * @arg @ref LL_RCC_SYSCLK_DIV_256
Kojto 136:ef9c61f8c49f 1338 * @arg @ref LL_RCC_SYSCLK_DIV_512
Kojto 136:ef9c61f8c49f 1339 * @retval None
Kojto 136:ef9c61f8c49f 1340 */
Kojto 136:ef9c61f8c49f 1341 __STATIC_INLINE void LL_RCC_SetAHBPrescaler(uint32_t Prescaler)
Kojto 136:ef9c61f8c49f 1342 {
Kojto 136:ef9c61f8c49f 1343 MODIFY_REG(RCC->CFGR, RCC_CFGR_HPRE, Prescaler);
Kojto 136:ef9c61f8c49f 1344 }
Kojto 136:ef9c61f8c49f 1345
Kojto 136:ef9c61f8c49f 1346 /**
Kojto 136:ef9c61f8c49f 1347 * @brief Set APB1 prescaler
Kojto 136:ef9c61f8c49f 1348 * @rmtoll CFGR PPRE1 LL_RCC_SetAPB1Prescaler
Kojto 136:ef9c61f8c49f 1349 * @param Prescaler This parameter can be one of the following values:
Kojto 136:ef9c61f8c49f 1350 * @arg @ref LL_RCC_APB1_DIV_1
Kojto 136:ef9c61f8c49f 1351 * @arg @ref LL_RCC_APB1_DIV_2
Kojto 136:ef9c61f8c49f 1352 * @arg @ref LL_RCC_APB1_DIV_4
Kojto 136:ef9c61f8c49f 1353 * @arg @ref LL_RCC_APB1_DIV_8
Kojto 136:ef9c61f8c49f 1354 * @arg @ref LL_RCC_APB1_DIV_16
Kojto 136:ef9c61f8c49f 1355 * @retval None
Kojto 136:ef9c61f8c49f 1356 */
Kojto 136:ef9c61f8c49f 1357 __STATIC_INLINE void LL_RCC_SetAPB1Prescaler(uint32_t Prescaler)
Kojto 136:ef9c61f8c49f 1358 {
Kojto 136:ef9c61f8c49f 1359 MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE1, Prescaler);
Kojto 136:ef9c61f8c49f 1360 }
Kojto 136:ef9c61f8c49f 1361
Kojto 136:ef9c61f8c49f 1362 /**
Kojto 136:ef9c61f8c49f 1363 * @brief Set APB2 prescaler
Kojto 136:ef9c61f8c49f 1364 * @rmtoll CFGR PPRE2 LL_RCC_SetAPB2Prescaler
Kojto 136:ef9c61f8c49f 1365 * @param Prescaler This parameter can be one of the following values:
Kojto 136:ef9c61f8c49f 1366 * @arg @ref LL_RCC_APB2_DIV_1
Kojto 136:ef9c61f8c49f 1367 * @arg @ref LL_RCC_APB2_DIV_2
Kojto 136:ef9c61f8c49f 1368 * @arg @ref LL_RCC_APB2_DIV_4
Kojto 136:ef9c61f8c49f 1369 * @arg @ref LL_RCC_APB2_DIV_8
Kojto 136:ef9c61f8c49f 1370 * @arg @ref LL_RCC_APB2_DIV_16
Kojto 136:ef9c61f8c49f 1371 * @retval None
Kojto 136:ef9c61f8c49f 1372 */
Kojto 136:ef9c61f8c49f 1373 __STATIC_INLINE void LL_RCC_SetAPB2Prescaler(uint32_t Prescaler)
Kojto 136:ef9c61f8c49f 1374 {
Kojto 136:ef9c61f8c49f 1375 MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE2, Prescaler);
Kojto 136:ef9c61f8c49f 1376 }
Kojto 136:ef9c61f8c49f 1377
Kojto 136:ef9c61f8c49f 1378 /**
Kojto 136:ef9c61f8c49f 1379 * @brief Get AHB prescaler
Kojto 136:ef9c61f8c49f 1380 * @rmtoll CFGR HPRE LL_RCC_GetAHBPrescaler
Kojto 136:ef9c61f8c49f 1381 * @retval Returned value can be one of the following values:
Kojto 136:ef9c61f8c49f 1382 * @arg @ref LL_RCC_SYSCLK_DIV_1
Kojto 136:ef9c61f8c49f 1383 * @arg @ref LL_RCC_SYSCLK_DIV_2
Kojto 136:ef9c61f8c49f 1384 * @arg @ref LL_RCC_SYSCLK_DIV_4
Kojto 136:ef9c61f8c49f 1385 * @arg @ref LL_RCC_SYSCLK_DIV_8
Kojto 136:ef9c61f8c49f 1386 * @arg @ref LL_RCC_SYSCLK_DIV_16
Kojto 136:ef9c61f8c49f 1387 * @arg @ref LL_RCC_SYSCLK_DIV_64
Kojto 136:ef9c61f8c49f 1388 * @arg @ref LL_RCC_SYSCLK_DIV_128
Kojto 136:ef9c61f8c49f 1389 * @arg @ref LL_RCC_SYSCLK_DIV_256
Kojto 136:ef9c61f8c49f 1390 * @arg @ref LL_RCC_SYSCLK_DIV_512
Kojto 136:ef9c61f8c49f 1391 */
Kojto 136:ef9c61f8c49f 1392 __STATIC_INLINE uint32_t LL_RCC_GetAHBPrescaler(void)
Kojto 136:ef9c61f8c49f 1393 {
Kojto 136:ef9c61f8c49f 1394 return (uint32_t)(READ_BIT(RCC->CFGR, RCC_CFGR_HPRE));
Kojto 136:ef9c61f8c49f 1395 }
Kojto 136:ef9c61f8c49f 1396
Kojto 136:ef9c61f8c49f 1397 /**
Kojto 136:ef9c61f8c49f 1398 * @brief Get APB1 prescaler
Kojto 136:ef9c61f8c49f 1399 * @rmtoll CFGR PPRE1 LL_RCC_GetAPB1Prescaler
Kojto 136:ef9c61f8c49f 1400 * @retval Returned value can be one of the following values:
Kojto 136:ef9c61f8c49f 1401 * @arg @ref LL_RCC_APB1_DIV_1
Kojto 136:ef9c61f8c49f 1402 * @arg @ref LL_RCC_APB1_DIV_2
Kojto 136:ef9c61f8c49f 1403 * @arg @ref LL_RCC_APB1_DIV_4
Kojto 136:ef9c61f8c49f 1404 * @arg @ref LL_RCC_APB1_DIV_8
Kojto 136:ef9c61f8c49f 1405 * @arg @ref LL_RCC_APB1_DIV_16
Kojto 136:ef9c61f8c49f 1406 */
Kojto 136:ef9c61f8c49f 1407 __STATIC_INLINE uint32_t LL_RCC_GetAPB1Prescaler(void)
Kojto 136:ef9c61f8c49f 1408 {
Kojto 136:ef9c61f8c49f 1409 return (uint32_t)(READ_BIT(RCC->CFGR, RCC_CFGR_PPRE1));
Kojto 136:ef9c61f8c49f 1410 }
Kojto 136:ef9c61f8c49f 1411
Kojto 136:ef9c61f8c49f 1412 /**
Kojto 136:ef9c61f8c49f 1413 * @brief Get APB2 prescaler
Kojto 136:ef9c61f8c49f 1414 * @rmtoll CFGR PPRE2 LL_RCC_GetAPB2Prescaler
Kojto 136:ef9c61f8c49f 1415 * @retval Returned value can be one of the following values:
Kojto 136:ef9c61f8c49f 1416 * @arg @ref LL_RCC_APB2_DIV_1
Kojto 136:ef9c61f8c49f 1417 * @arg @ref LL_RCC_APB2_DIV_2
Kojto 136:ef9c61f8c49f 1418 * @arg @ref LL_RCC_APB2_DIV_4
Kojto 136:ef9c61f8c49f 1419 * @arg @ref LL_RCC_APB2_DIV_8
Kojto 136:ef9c61f8c49f 1420 * @arg @ref LL_RCC_APB2_DIV_16
Kojto 136:ef9c61f8c49f 1421 */
Kojto 136:ef9c61f8c49f 1422 __STATIC_INLINE uint32_t LL_RCC_GetAPB2Prescaler(void)
Kojto 136:ef9c61f8c49f 1423 {
Kojto 136:ef9c61f8c49f 1424 return (uint32_t)(READ_BIT(RCC->CFGR, RCC_CFGR_PPRE2));
Kojto 136:ef9c61f8c49f 1425 }
Kojto 136:ef9c61f8c49f 1426
Kojto 136:ef9c61f8c49f 1427 /**
Kojto 136:ef9c61f8c49f 1428 * @brief Set Clock After Wake-Up From Stop mode
Kojto 136:ef9c61f8c49f 1429 * @rmtoll CFGR STOPWUCK LL_RCC_SetClkAfterWakeFromStop
Kojto 136:ef9c61f8c49f 1430 * @param Clock This parameter can be one of the following values:
Kojto 136:ef9c61f8c49f 1431 * @arg @ref LL_RCC_STOP_WAKEUPCLOCK_MSI
Kojto 136:ef9c61f8c49f 1432 * @arg @ref LL_RCC_STOP_WAKEUPCLOCK_HSI
Kojto 136:ef9c61f8c49f 1433 * @retval None
Kojto 136:ef9c61f8c49f 1434 */
Kojto 136:ef9c61f8c49f 1435 __STATIC_INLINE void LL_RCC_SetClkAfterWakeFromStop(uint32_t Clock)
Kojto 136:ef9c61f8c49f 1436 {
Kojto 136:ef9c61f8c49f 1437 MODIFY_REG(RCC->CFGR, RCC_CFGR_STOPWUCK, Clock);
Kojto 136:ef9c61f8c49f 1438 }
Kojto 136:ef9c61f8c49f 1439
Kojto 136:ef9c61f8c49f 1440 /**
Kojto 136:ef9c61f8c49f 1441 * @brief Get Clock After Wake-Up From Stop mode
Kojto 136:ef9c61f8c49f 1442 * @rmtoll CFGR STOPWUCK LL_RCC_GetClkAfterWakeFromStop
Kojto 136:ef9c61f8c49f 1443 * @retval Returned value can be one of the following values:
Kojto 136:ef9c61f8c49f 1444 * @arg @ref LL_RCC_STOP_WAKEUPCLOCK_MSI
Kojto 136:ef9c61f8c49f 1445 * @arg @ref LL_RCC_STOP_WAKEUPCLOCK_HSI
Kojto 136:ef9c61f8c49f 1446 */
Kojto 136:ef9c61f8c49f 1447 __STATIC_INLINE uint32_t LL_RCC_GetClkAfterWakeFromStop(void)
Kojto 136:ef9c61f8c49f 1448 {
Kojto 136:ef9c61f8c49f 1449 return (uint32_t)(READ_BIT(RCC->CFGR, RCC_CFGR_STOPWUCK));
Kojto 136:ef9c61f8c49f 1450 }
Kojto 136:ef9c61f8c49f 1451
Kojto 136:ef9c61f8c49f 1452 /**
Kojto 136:ef9c61f8c49f 1453 * @}
Kojto 136:ef9c61f8c49f 1454 */
Kojto 136:ef9c61f8c49f 1455
Kojto 136:ef9c61f8c49f 1456 /** @defgroup RCC_LL_EF_MCO MCO
Kojto 136:ef9c61f8c49f 1457 * @{
Kojto 136:ef9c61f8c49f 1458 */
Kojto 136:ef9c61f8c49f 1459
Kojto 136:ef9c61f8c49f 1460 /**
Kojto 136:ef9c61f8c49f 1461 * @brief Configure MCOx
Kojto 136:ef9c61f8c49f 1462 * @rmtoll CFGR MCOSEL LL_RCC_ConfigMCO\n
Kojto 136:ef9c61f8c49f 1463 * CFGR MCOPRE LL_RCC_ConfigMCO
Kojto 136:ef9c61f8c49f 1464 * @param MCOxSource This parameter can be one of the following values:
Kojto 136:ef9c61f8c49f 1465 * @arg @ref LL_RCC_MCO1SOURCE_NOCLOCK
Kojto 136:ef9c61f8c49f 1466 * @arg @ref LL_RCC_MCO1SOURCE_SYSCLK
Kojto 136:ef9c61f8c49f 1467 * @arg @ref LL_RCC_MCO1SOURCE_HSI
Kojto 136:ef9c61f8c49f 1468 * @arg @ref LL_RCC_MCO1SOURCE_MSI
Kojto 136:ef9c61f8c49f 1469 * @arg @ref LL_RCC_MCO1SOURCE_HSE
Kojto 136:ef9c61f8c49f 1470 * @arg @ref LL_RCC_MCO1SOURCE_PLLCLK
Kojto 136:ef9c61f8c49f 1471 * @arg @ref LL_RCC_MCO1SOURCE_LSI
Kojto 136:ef9c61f8c49f 1472 * @arg @ref LL_RCC_MCO1SOURCE_LSE
Kojto 136:ef9c61f8c49f 1473 * @arg @ref LL_RCC_MCO1SOURCE_HSI48 (*)
Kojto 136:ef9c61f8c49f 1474 *
Kojto 136:ef9c61f8c49f 1475 * (*) value not defined in all devices.
Kojto 136:ef9c61f8c49f 1476 * @param MCOxPrescaler This parameter can be one of the following values:
Kojto 136:ef9c61f8c49f 1477 * @arg @ref LL_RCC_MCO1_DIV_1
Kojto 136:ef9c61f8c49f 1478 * @arg @ref LL_RCC_MCO1_DIV_2
Kojto 136:ef9c61f8c49f 1479 * @arg @ref LL_RCC_MCO1_DIV_4
Kojto 136:ef9c61f8c49f 1480 * @arg @ref LL_RCC_MCO1_DIV_8
Kojto 136:ef9c61f8c49f 1481 * @arg @ref LL_RCC_MCO1_DIV_16
Kojto 136:ef9c61f8c49f 1482 * @retval None
Kojto 136:ef9c61f8c49f 1483 */
Kojto 136:ef9c61f8c49f 1484 __STATIC_INLINE void LL_RCC_ConfigMCO(uint32_t MCOxSource, uint32_t MCOxPrescaler)
Kojto 136:ef9c61f8c49f 1485 {
Kojto 136:ef9c61f8c49f 1486 MODIFY_REG(RCC->CFGR, RCC_CFGR_MCOSEL | RCC_CFGR_MCOPRE, MCOxSource | MCOxPrescaler);
Kojto 136:ef9c61f8c49f 1487 }
Kojto 136:ef9c61f8c49f 1488
Kojto 136:ef9c61f8c49f 1489 /**
Kojto 136:ef9c61f8c49f 1490 * @}
Kojto 136:ef9c61f8c49f 1491 */
Kojto 136:ef9c61f8c49f 1492
Kojto 136:ef9c61f8c49f 1493 /** @defgroup RCC_LL_EF_Peripheral_Clock_Source Peripheral Clock Source
Kojto 136:ef9c61f8c49f 1494 * @{
Kojto 136:ef9c61f8c49f 1495 */
Kojto 136:ef9c61f8c49f 1496
Kojto 136:ef9c61f8c49f 1497 /**
Kojto 136:ef9c61f8c49f 1498 * @brief Configure USARTx clock source
Kojto 136:ef9c61f8c49f 1499 * @rmtoll CCIPR USARTxSEL LL_RCC_SetUSARTClockSource
Kojto 136:ef9c61f8c49f 1500 * @param USARTxSource This parameter can be one of the following values:
Kojto 136:ef9c61f8c49f 1501 * @arg @ref LL_RCC_USART1_CLKSOURCE_PCLK2 (*)
Kojto 136:ef9c61f8c49f 1502 * @arg @ref LL_RCC_USART1_CLKSOURCE_SYSCLK (*)
Kojto 136:ef9c61f8c49f 1503 * @arg @ref LL_RCC_USART1_CLKSOURCE_HSI (*)
Kojto 136:ef9c61f8c49f 1504 * @arg @ref LL_RCC_USART1_CLKSOURCE_LSE (*)
Kojto 136:ef9c61f8c49f 1505 * @arg @ref LL_RCC_USART2_CLKSOURCE_PCLK1
Kojto 136:ef9c61f8c49f 1506 * @arg @ref LL_RCC_USART2_CLKSOURCE_SYSCLK
Kojto 136:ef9c61f8c49f 1507 * @arg @ref LL_RCC_USART2_CLKSOURCE_HSI
Kojto 136:ef9c61f8c49f 1508 * @arg @ref LL_RCC_USART2_CLKSOURCE_LSE
Kojto 136:ef9c61f8c49f 1509 *
Kojto 136:ef9c61f8c49f 1510 * (*) value not defined in all devices.
Kojto 136:ef9c61f8c49f 1511 * @retval None
Kojto 136:ef9c61f8c49f 1512 */
Kojto 136:ef9c61f8c49f 1513 __STATIC_INLINE void LL_RCC_SetUSARTClockSource(uint32_t USARTxSource)
Kojto 136:ef9c61f8c49f 1514 {
Kojto 136:ef9c61f8c49f 1515 MODIFY_REG(RCC->CCIPR, (USARTxSource >> 16U), (USARTxSource & 0x0000FFFFU));
Kojto 136:ef9c61f8c49f 1516 }
Kojto 136:ef9c61f8c49f 1517
Kojto 136:ef9c61f8c49f 1518 /**
Kojto 136:ef9c61f8c49f 1519 * @brief Configure LPUART1x clock source
Kojto 136:ef9c61f8c49f 1520 * @rmtoll CCIPR LPUART1SEL LL_RCC_SetLPUARTClockSource
Kojto 136:ef9c61f8c49f 1521 * @param LPUARTxSource This parameter can be one of the following values:
Kojto 136:ef9c61f8c49f 1522 * @arg @ref LL_RCC_LPUART1_CLKSOURCE_PCLK1
Kojto 136:ef9c61f8c49f 1523 * @arg @ref LL_RCC_LPUART1_CLKSOURCE_SYSCLK
Kojto 136:ef9c61f8c49f 1524 * @arg @ref LL_RCC_LPUART1_CLKSOURCE_HSI
Kojto 136:ef9c61f8c49f 1525 * @arg @ref LL_RCC_LPUART1_CLKSOURCE_LSE
Kojto 136:ef9c61f8c49f 1526 * @retval None
Kojto 136:ef9c61f8c49f 1527 */
Kojto 136:ef9c61f8c49f 1528 __STATIC_INLINE void LL_RCC_SetLPUARTClockSource(uint32_t LPUARTxSource)
Kojto 136:ef9c61f8c49f 1529 {
Kojto 136:ef9c61f8c49f 1530 MODIFY_REG(RCC->CCIPR, RCC_CCIPR_LPUART1SEL, LPUARTxSource);
Kojto 136:ef9c61f8c49f 1531 }
Kojto 136:ef9c61f8c49f 1532
Kojto 136:ef9c61f8c49f 1533 /**
Kojto 136:ef9c61f8c49f 1534 * @brief Configure I2Cx clock source
Kojto 136:ef9c61f8c49f 1535 * @rmtoll CCIPR I2CxSEL LL_RCC_SetI2CClockSource
Kojto 136:ef9c61f8c49f 1536 * @param I2CxSource This parameter can be one of the following values:
Kojto 136:ef9c61f8c49f 1537 * @arg @ref LL_RCC_I2C1_CLKSOURCE_PCLK1
Kojto 136:ef9c61f8c49f 1538 * @arg @ref LL_RCC_I2C1_CLKSOURCE_SYSCLK
Kojto 136:ef9c61f8c49f 1539 * @arg @ref LL_RCC_I2C1_CLKSOURCE_HSI
Kojto 136:ef9c61f8c49f 1540 * @arg @ref LL_RCC_I2C3_CLKSOURCE_PCLK1 (*)
Kojto 136:ef9c61f8c49f 1541 * @arg @ref LL_RCC_I2C3_CLKSOURCE_SYSCLK (*)
Kojto 136:ef9c61f8c49f 1542 * @arg @ref LL_RCC_I2C3_CLKSOURCE_HSI (*)
Kojto 136:ef9c61f8c49f 1543 *
Kojto 136:ef9c61f8c49f 1544 * (*) value not defined in all devices.
Kojto 136:ef9c61f8c49f 1545 * @retval None
Kojto 136:ef9c61f8c49f 1546 */
Kojto 136:ef9c61f8c49f 1547 __STATIC_INLINE void LL_RCC_SetI2CClockSource(uint32_t I2CxSource)
Kojto 136:ef9c61f8c49f 1548 {
Kojto 136:ef9c61f8c49f 1549 MODIFY_REG(RCC->CCIPR, ((I2CxSource >> 4U) & 0x000FF000U), ((I2CxSource << 4U) & 0x000FF000U));
Kojto 136:ef9c61f8c49f 1550 }
Kojto 136:ef9c61f8c49f 1551
Kojto 136:ef9c61f8c49f 1552 /**
Kojto 136:ef9c61f8c49f 1553 * @brief Configure LPTIMx clock source
Kojto 136:ef9c61f8c49f 1554 * @rmtoll CCIPR LPTIMxSEL LL_RCC_SetLPTIMClockSource
Kojto 136:ef9c61f8c49f 1555 * @param LPTIMxSource This parameter can be one of the following values:
Kojto 136:ef9c61f8c49f 1556 * @arg @ref LL_RCC_LPTIM1_CLKSOURCE_PCLK1
Kojto 136:ef9c61f8c49f 1557 * @arg @ref LL_RCC_LPTIM1_CLKSOURCE_LSI
Kojto 136:ef9c61f8c49f 1558 * @arg @ref LL_RCC_LPTIM1_CLKSOURCE_HSI
Kojto 136:ef9c61f8c49f 1559 * @arg @ref LL_RCC_LPTIM1_CLKSOURCE_LSE
Kojto 136:ef9c61f8c49f 1560 * @retval None
Kojto 136:ef9c61f8c49f 1561 */
Kojto 136:ef9c61f8c49f 1562 __STATIC_INLINE void LL_RCC_SetLPTIMClockSource(uint32_t LPTIMxSource)
Kojto 136:ef9c61f8c49f 1563 {
Kojto 136:ef9c61f8c49f 1564 MODIFY_REG(RCC->CCIPR, RCC_CCIPR_LPTIM1SEL, LPTIMxSource);
Kojto 136:ef9c61f8c49f 1565 }
Kojto 136:ef9c61f8c49f 1566
Kojto 136:ef9c61f8c49f 1567 #if defined(RCC_CCIPR_HSI48SEL)
Kojto 136:ef9c61f8c49f 1568 #if defined(RNG)
Kojto 136:ef9c61f8c49f 1569 /**
Kojto 136:ef9c61f8c49f 1570 * @brief Configure RNG clock source
Kojto 136:ef9c61f8c49f 1571 * @rmtoll CCIPR HSI48SEL LL_RCC_SetRNGClockSource
Kojto 136:ef9c61f8c49f 1572 * @param RNGxSource This parameter can be one of the following values:
Kojto 136:ef9c61f8c49f 1573 * @arg @ref LL_RCC_RNG_CLKSOURCE_PLL
Kojto 136:ef9c61f8c49f 1574 * @arg @ref LL_RCC_RNG_CLKSOURCE_HSI48
Kojto 136:ef9c61f8c49f 1575 * @retval None
Kojto 136:ef9c61f8c49f 1576 */
Kojto 136:ef9c61f8c49f 1577 __STATIC_INLINE void LL_RCC_SetRNGClockSource(uint32_t RNGxSource)
Kojto 136:ef9c61f8c49f 1578 {
Kojto 136:ef9c61f8c49f 1579 MODIFY_REG(RCC->CCIPR, RCC_CCIPR_HSI48SEL, RNGxSource);
Kojto 136:ef9c61f8c49f 1580 }
Kojto 136:ef9c61f8c49f 1581 #endif /* RNG */
Kojto 136:ef9c61f8c49f 1582
Kojto 136:ef9c61f8c49f 1583 #if defined(USB)
Kojto 136:ef9c61f8c49f 1584 /**
Kojto 136:ef9c61f8c49f 1585 * @brief Configure USB clock source
Kojto 136:ef9c61f8c49f 1586 * @rmtoll CCIPR HSI48SEL LL_RCC_SetUSBClockSource
Kojto 136:ef9c61f8c49f 1587 * @param USBxSource This parameter can be one of the following values:
Kojto 136:ef9c61f8c49f 1588 * @arg @ref LL_RCC_RNG_CLKSOURCE_PLL
Kojto 136:ef9c61f8c49f 1589 * @arg @ref LL_RCC_RNG_CLKSOURCE_HSI48
Kojto 136:ef9c61f8c49f 1590 * @retval None
Kojto 136:ef9c61f8c49f 1591 */
Kojto 136:ef9c61f8c49f 1592 __STATIC_INLINE void LL_RCC_SetUSBClockSource(uint32_t USBxSource)
Kojto 136:ef9c61f8c49f 1593 {
Kojto 136:ef9c61f8c49f 1594 MODIFY_REG(RCC->CCIPR, RCC_CCIPR_HSI48SEL, USBxSource);
Kojto 136:ef9c61f8c49f 1595 }
Kojto 136:ef9c61f8c49f 1596 #endif /* USB */
Kojto 136:ef9c61f8c49f 1597
Kojto 136:ef9c61f8c49f 1598 #endif /* RCC_CCIPR_HSI48SEL */
Kojto 136:ef9c61f8c49f 1599
Kojto 136:ef9c61f8c49f 1600 /**
Kojto 136:ef9c61f8c49f 1601 * @brief Get USARTx clock source
Kojto 136:ef9c61f8c49f 1602 * @rmtoll CCIPR USARTxSEL LL_RCC_GetUSARTClockSource
Kojto 136:ef9c61f8c49f 1603 * @param USARTx This parameter can be one of the following values:
Kojto 136:ef9c61f8c49f 1604 * @arg @ref LL_RCC_USART1_CLKSOURCE (*)
Kojto 136:ef9c61f8c49f 1605 * @arg @ref LL_RCC_USART2_CLKSOURCE
Kojto 136:ef9c61f8c49f 1606 * @retval Returned value can be one of the following values:
Kojto 136:ef9c61f8c49f 1607 * @arg @ref LL_RCC_USART1_CLKSOURCE_PCLK2 (*)
Kojto 136:ef9c61f8c49f 1608 * @arg @ref LL_RCC_USART1_CLKSOURCE_SYSCLK (*)
Kojto 136:ef9c61f8c49f 1609 * @arg @ref LL_RCC_USART1_CLKSOURCE_HSI (*)
Kojto 136:ef9c61f8c49f 1610 * @arg @ref LL_RCC_USART1_CLKSOURCE_LSE (*)
Kojto 136:ef9c61f8c49f 1611 * @arg @ref LL_RCC_USART2_CLKSOURCE_PCLK1
Kojto 136:ef9c61f8c49f 1612 * @arg @ref LL_RCC_USART2_CLKSOURCE_SYSCLK
Kojto 136:ef9c61f8c49f 1613 * @arg @ref LL_RCC_USART2_CLKSOURCE_HSI
Kojto 136:ef9c61f8c49f 1614 * @arg @ref LL_RCC_USART2_CLKSOURCE_LSE
Kojto 136:ef9c61f8c49f 1615 *
Kojto 136:ef9c61f8c49f 1616 * (*) value not defined in all devices.
Kojto 136:ef9c61f8c49f 1617 */
Kojto 136:ef9c61f8c49f 1618 __STATIC_INLINE uint32_t LL_RCC_GetUSARTClockSource(uint32_t USARTx)
Kojto 136:ef9c61f8c49f 1619 {
Kojto 136:ef9c61f8c49f 1620 return (uint32_t)(READ_BIT(RCC->CCIPR, USARTx) | (USARTx << 16U));
Kojto 136:ef9c61f8c49f 1621 }
Kojto 136:ef9c61f8c49f 1622
Kojto 136:ef9c61f8c49f 1623
Kojto 136:ef9c61f8c49f 1624
Kojto 136:ef9c61f8c49f 1625 /**
Kojto 136:ef9c61f8c49f 1626 * @brief Get LPUARTx clock source
Kojto 136:ef9c61f8c49f 1627 * @rmtoll CCIPR LPUART1SEL LL_RCC_GetLPUARTClockSource
Kojto 136:ef9c61f8c49f 1628 * @param LPUARTx This parameter can be one of the following values:
Kojto 136:ef9c61f8c49f 1629 * @arg @ref LL_RCC_LPUART1_CLKSOURCE
Kojto 136:ef9c61f8c49f 1630 * @retval Returned value can be one of the following values:
Kojto 136:ef9c61f8c49f 1631 * @arg @ref LL_RCC_LPUART1_CLKSOURCE_PCLK1
Kojto 136:ef9c61f8c49f 1632 * @arg @ref LL_RCC_LPUART1_CLKSOURCE_SYSCLK
Kojto 136:ef9c61f8c49f 1633 * @arg @ref LL_RCC_LPUART1_CLKSOURCE_HSI
Kojto 136:ef9c61f8c49f 1634 * @arg @ref LL_RCC_LPUART1_CLKSOURCE_LSE
Kojto 136:ef9c61f8c49f 1635 */
Kojto 136:ef9c61f8c49f 1636 __STATIC_INLINE uint32_t LL_RCC_GetLPUARTClockSource(uint32_t LPUARTx)
Kojto 136:ef9c61f8c49f 1637 {
Kojto 136:ef9c61f8c49f 1638 return (uint32_t)(READ_BIT(RCC->CCIPR, LPUARTx));
Kojto 136:ef9c61f8c49f 1639 }
Kojto 136:ef9c61f8c49f 1640
Kojto 136:ef9c61f8c49f 1641 /**
Kojto 136:ef9c61f8c49f 1642 * @brief Get I2Cx clock source
Kojto 136:ef9c61f8c49f 1643 * @rmtoll CCIPR I2CxSEL LL_RCC_GetI2CClockSource
Kojto 136:ef9c61f8c49f 1644 * @param I2Cx This parameter can be one of the following values:
Kojto 136:ef9c61f8c49f 1645 * @arg @ref LL_RCC_I2C1_CLKSOURCE
Kojto 136:ef9c61f8c49f 1646 * @arg @ref LL_RCC_I2C3_CLKSOURCE
Kojto 136:ef9c61f8c49f 1647 * @retval Returned value can be one of the following values:
Kojto 136:ef9c61f8c49f 1648 * @arg @ref LL_RCC_I2C1_CLKSOURCE_PCLK1
Kojto 136:ef9c61f8c49f 1649 * @arg @ref LL_RCC_I2C1_CLKSOURCE_SYSCLK
Kojto 136:ef9c61f8c49f 1650 * @arg @ref LL_RCC_I2C1_CLKSOURCE_HSI
Kojto 136:ef9c61f8c49f 1651 * @arg @ref LL_RCC_I2C3_CLKSOURCE_PCLK1 (*)
Kojto 136:ef9c61f8c49f 1652 * @arg @ref LL_RCC_I2C3_CLKSOURCE_SYSCLK (*)
Kojto 136:ef9c61f8c49f 1653 * @arg @ref LL_RCC_I2C3_CLKSOURCE_HSI (*)
Kojto 136:ef9c61f8c49f 1654 *
Kojto 136:ef9c61f8c49f 1655 * (*) value not defined in all devices.
Kojto 136:ef9c61f8c49f 1656 */
Kojto 136:ef9c61f8c49f 1657 __STATIC_INLINE uint32_t LL_RCC_GetI2CClockSource(uint32_t I2Cx)
Kojto 136:ef9c61f8c49f 1658 {
Kojto 136:ef9c61f8c49f 1659 return (uint32_t)((READ_BIT(RCC->CCIPR, I2Cx) >> 4U) | (I2Cx << 4U));
Kojto 136:ef9c61f8c49f 1660 }
Kojto 136:ef9c61f8c49f 1661
Kojto 136:ef9c61f8c49f 1662 /**
Kojto 136:ef9c61f8c49f 1663 * @brief Get LPTIMx clock source
Kojto 136:ef9c61f8c49f 1664 * @rmtoll CCIPR LPTIMxSEL LL_RCC_GetLPTIMClockSource
Kojto 136:ef9c61f8c49f 1665 * @param LPTIMx This parameter can be one of the following values:
Kojto 136:ef9c61f8c49f 1666 * @arg @ref LL_RCC_LPTIM1_CLKSOURCE
Kojto 136:ef9c61f8c49f 1667 * @retval Returned value can be one of the following values:
Kojto 136:ef9c61f8c49f 1668 * @arg @ref LL_RCC_LPTIM1_CLKSOURCE_PCLK1
Kojto 136:ef9c61f8c49f 1669 * @arg @ref LL_RCC_LPTIM1_CLKSOURCE_LSI
Kojto 136:ef9c61f8c49f 1670 * @arg @ref LL_RCC_LPTIM1_CLKSOURCE_HSI
Kojto 136:ef9c61f8c49f 1671 * @arg @ref LL_RCC_LPTIM1_CLKSOURCE_LSE
Kojto 136:ef9c61f8c49f 1672 */
Kojto 136:ef9c61f8c49f 1673 __STATIC_INLINE uint32_t LL_RCC_GetLPTIMClockSource(uint32_t LPTIMx)
Kojto 136:ef9c61f8c49f 1674 {
Kojto 136:ef9c61f8c49f 1675 return (uint32_t)(READ_BIT(RCC->CCIPR, LPTIMx));
Kojto 136:ef9c61f8c49f 1676 }
Kojto 136:ef9c61f8c49f 1677
Kojto 136:ef9c61f8c49f 1678 #if defined(RCC_CCIPR_HSI48SEL)
Kojto 136:ef9c61f8c49f 1679 #if defined(RNG)
Kojto 136:ef9c61f8c49f 1680 /**
Kojto 136:ef9c61f8c49f 1681 * @brief Get RNGx clock source
Kojto 136:ef9c61f8c49f 1682 * @rmtoll CCIPR CLK48SEL LL_RCC_GetRNGClockSource
Kojto 136:ef9c61f8c49f 1683 * @param RNGx This parameter can be one of the following values:
Kojto 136:ef9c61f8c49f 1684 * @arg @ref LL_RCC_RNG_CLKSOURCE
Kojto 136:ef9c61f8c49f 1685 * @retval Returned value can be one of the following values:
Kojto 136:ef9c61f8c49f 1686 * @arg @ref LL_RCC_RNG_CLKSOURCE_PLL
Kojto 136:ef9c61f8c49f 1687 * @arg @ref LL_RCC_RNG_CLKSOURCE_HSI48
Kojto 136:ef9c61f8c49f 1688 */
Kojto 136:ef9c61f8c49f 1689 __STATIC_INLINE uint32_t LL_RCC_GetRNGClockSource(uint32_t RNGx)
Kojto 136:ef9c61f8c49f 1690 {
Kojto 136:ef9c61f8c49f 1691 return (uint32_t)(READ_BIT(RCC->CCIPR, RNGx));
Kojto 136:ef9c61f8c49f 1692 }
Kojto 136:ef9c61f8c49f 1693 #endif /* RNG */
Kojto 136:ef9c61f8c49f 1694
Kojto 136:ef9c61f8c49f 1695 #if defined(USB)
Kojto 136:ef9c61f8c49f 1696 /**
Kojto 136:ef9c61f8c49f 1697 * @brief Get USBx clock source
Kojto 136:ef9c61f8c49f 1698 * @rmtoll CCIPR CLK48SEL LL_RCC_GetUSBClockSource
Kojto 136:ef9c61f8c49f 1699 * @param USBx This parameter can be one of the following values:
Kojto 136:ef9c61f8c49f 1700 * @arg @ref LL_RCC_USB_CLKSOURCE
Kojto 136:ef9c61f8c49f 1701 * @retval Returned value can be one of the following values:
Kojto 136:ef9c61f8c49f 1702 * @arg @ref LL_RCC_USB_CLKSOURCE_PLL
Kojto 136:ef9c61f8c49f 1703 * @arg @ref LL_RCC_USB_CLKSOURCE_HSI48
Kojto 136:ef9c61f8c49f 1704 */
Kojto 136:ef9c61f8c49f 1705 __STATIC_INLINE uint32_t LL_RCC_GetUSBClockSource(uint32_t USBx)
Kojto 136:ef9c61f8c49f 1706 {
Kojto 136:ef9c61f8c49f 1707 return (uint32_t)(READ_BIT(RCC->CCIPR, USBx));
Kojto 136:ef9c61f8c49f 1708 }
Kojto 136:ef9c61f8c49f 1709 #endif /* USB */
Kojto 136:ef9c61f8c49f 1710
Kojto 136:ef9c61f8c49f 1711 #endif /* RCC_CCIPR_HSI48SEL */
Kojto 136:ef9c61f8c49f 1712
Kojto 136:ef9c61f8c49f 1713 /**
Kojto 136:ef9c61f8c49f 1714 * @}
Kojto 136:ef9c61f8c49f 1715 */
Kojto 136:ef9c61f8c49f 1716
Kojto 136:ef9c61f8c49f 1717 /** @defgroup RCC_LL_EF_RTC RTC
Kojto 136:ef9c61f8c49f 1718 * @{
Kojto 136:ef9c61f8c49f 1719 */
Kojto 136:ef9c61f8c49f 1720
Kojto 136:ef9c61f8c49f 1721 /**
Kojto 136:ef9c61f8c49f 1722 * @brief Set RTC Clock Source
Kojto 136:ef9c61f8c49f 1723 * @note Once the RTC clock source has been selected, it cannot be changed any more unless
Kojto 136:ef9c61f8c49f 1724 * the Backup domain is reset, or unless a failure is detected on LSE (LSECSSD is
Kojto 136:ef9c61f8c49f 1725 * set). The RTCRST bit can be used to reset them.
Kojto 136:ef9c61f8c49f 1726 * @rmtoll CSR RTCSEL LL_RCC_SetRTCClockSource
Kojto 136:ef9c61f8c49f 1727 * @param Source This parameter can be one of the following values:
Kojto 136:ef9c61f8c49f 1728 * @arg @ref LL_RCC_RTC_CLKSOURCE_NONE
Kojto 136:ef9c61f8c49f 1729 * @arg @ref LL_RCC_RTC_CLKSOURCE_LSE
Kojto 136:ef9c61f8c49f 1730 * @arg @ref LL_RCC_RTC_CLKSOURCE_LSI
Kojto 136:ef9c61f8c49f 1731 * @arg @ref LL_RCC_RTC_CLKSOURCE_HSE
Kojto 136:ef9c61f8c49f 1732 * @retval None
Kojto 136:ef9c61f8c49f 1733 */
Kojto 136:ef9c61f8c49f 1734 __STATIC_INLINE void LL_RCC_SetRTCClockSource(uint32_t Source)
Kojto 136:ef9c61f8c49f 1735 {
Kojto 136:ef9c61f8c49f 1736 MODIFY_REG(RCC->CSR, RCC_CSR_RTCSEL, Source);
Kojto 136:ef9c61f8c49f 1737 }
Kojto 136:ef9c61f8c49f 1738
Kojto 136:ef9c61f8c49f 1739 /**
Kojto 136:ef9c61f8c49f 1740 * @brief Get RTC Clock Source
Kojto 136:ef9c61f8c49f 1741 * @rmtoll CSR RTCSEL LL_RCC_GetRTCClockSource
Kojto 136:ef9c61f8c49f 1742 * @retval Returned value can be one of the following values:
Kojto 136:ef9c61f8c49f 1743 * @arg @ref LL_RCC_RTC_CLKSOURCE_NONE
Kojto 136:ef9c61f8c49f 1744 * @arg @ref LL_RCC_RTC_CLKSOURCE_LSE
Kojto 136:ef9c61f8c49f 1745 * @arg @ref LL_RCC_RTC_CLKSOURCE_LSI
Kojto 136:ef9c61f8c49f 1746 * @arg @ref LL_RCC_RTC_CLKSOURCE_HSE
Kojto 136:ef9c61f8c49f 1747 */
Kojto 136:ef9c61f8c49f 1748 __STATIC_INLINE uint32_t LL_RCC_GetRTCClockSource(void)
Kojto 136:ef9c61f8c49f 1749 {
Kojto 136:ef9c61f8c49f 1750 return (uint32_t)(READ_BIT(RCC->CSR, RCC_CSR_RTCSEL));
Kojto 136:ef9c61f8c49f 1751 }
Kojto 136:ef9c61f8c49f 1752
Kojto 136:ef9c61f8c49f 1753 /**
Kojto 136:ef9c61f8c49f 1754 * @brief Enable RTC
Kojto 136:ef9c61f8c49f 1755 * @rmtoll CSR RTCEN LL_RCC_EnableRTC
Kojto 136:ef9c61f8c49f 1756 * @retval None
Kojto 136:ef9c61f8c49f 1757 */
Kojto 136:ef9c61f8c49f 1758 __STATIC_INLINE void LL_RCC_EnableRTC(void)
Kojto 136:ef9c61f8c49f 1759 {
Kojto 136:ef9c61f8c49f 1760 SET_BIT(RCC->CSR, RCC_CSR_RTCEN);
Kojto 136:ef9c61f8c49f 1761 }
Kojto 136:ef9c61f8c49f 1762
Kojto 136:ef9c61f8c49f 1763 /**
Kojto 136:ef9c61f8c49f 1764 * @brief Disable RTC
Kojto 136:ef9c61f8c49f 1765 * @rmtoll CSR RTCEN LL_RCC_DisableRTC
Kojto 136:ef9c61f8c49f 1766 * @retval None
Kojto 136:ef9c61f8c49f 1767 */
Kojto 136:ef9c61f8c49f 1768 __STATIC_INLINE void LL_RCC_DisableRTC(void)
Kojto 136:ef9c61f8c49f 1769 {
Kojto 136:ef9c61f8c49f 1770 CLEAR_BIT(RCC->CSR, RCC_CSR_RTCEN);
Kojto 136:ef9c61f8c49f 1771 }
Kojto 136:ef9c61f8c49f 1772
Kojto 136:ef9c61f8c49f 1773 /**
Kojto 136:ef9c61f8c49f 1774 * @brief Check if RTC has been enabled or not
Kojto 136:ef9c61f8c49f 1775 * @rmtoll CSR RTCEN LL_RCC_IsEnabledRTC
Kojto 136:ef9c61f8c49f 1776 * @retval State of bit (1 or 0).
Kojto 136:ef9c61f8c49f 1777 */
Kojto 136:ef9c61f8c49f 1778 __STATIC_INLINE uint32_t LL_RCC_IsEnabledRTC(void)
Kojto 136:ef9c61f8c49f 1779 {
Kojto 136:ef9c61f8c49f 1780 return (READ_BIT(RCC->CSR, RCC_CSR_RTCEN) == (RCC_CSR_RTCEN));
Kojto 136:ef9c61f8c49f 1781 }
Kojto 136:ef9c61f8c49f 1782
Kojto 136:ef9c61f8c49f 1783 /**
Kojto 136:ef9c61f8c49f 1784 * @brief Force the Backup domain reset
Kojto 136:ef9c61f8c49f 1785 * @rmtoll CSR RTCRST LL_RCC_ForceBackupDomainReset
Kojto 136:ef9c61f8c49f 1786 * @retval None
Kojto 136:ef9c61f8c49f 1787 */
Kojto 136:ef9c61f8c49f 1788 __STATIC_INLINE void LL_RCC_ForceBackupDomainReset(void)
Kojto 136:ef9c61f8c49f 1789 {
Kojto 136:ef9c61f8c49f 1790 SET_BIT(RCC->CSR, RCC_CSR_RTCRST);
Kojto 136:ef9c61f8c49f 1791 }
Kojto 136:ef9c61f8c49f 1792
Kojto 136:ef9c61f8c49f 1793 /**
Kojto 136:ef9c61f8c49f 1794 * @brief Release the Backup domain reset
Kojto 136:ef9c61f8c49f 1795 * @rmtoll CSR RTCRST LL_RCC_ReleaseBackupDomainReset
Kojto 136:ef9c61f8c49f 1796 * @retval None
Kojto 136:ef9c61f8c49f 1797 */
Kojto 136:ef9c61f8c49f 1798 __STATIC_INLINE void LL_RCC_ReleaseBackupDomainReset(void)
Kojto 136:ef9c61f8c49f 1799 {
Kojto 136:ef9c61f8c49f 1800 CLEAR_BIT(RCC->CSR, RCC_CSR_RTCRST);
Kojto 136:ef9c61f8c49f 1801 }
Kojto 136:ef9c61f8c49f 1802
Kojto 136:ef9c61f8c49f 1803 /**
Kojto 136:ef9c61f8c49f 1804 * @}
Kojto 136:ef9c61f8c49f 1805 */
Kojto 136:ef9c61f8c49f 1806
Kojto 136:ef9c61f8c49f 1807 /** @defgroup RCC_LL_EF_PLL PLL
Kojto 136:ef9c61f8c49f 1808 * @{
Kojto 136:ef9c61f8c49f 1809 */
Kojto 136:ef9c61f8c49f 1810
Kojto 136:ef9c61f8c49f 1811 /**
Kojto 136:ef9c61f8c49f 1812 * @brief Enable PLL
Kojto 136:ef9c61f8c49f 1813 * @rmtoll CR PLLON LL_RCC_PLL_Enable
Kojto 136:ef9c61f8c49f 1814 * @retval None
Kojto 136:ef9c61f8c49f 1815 */
Kojto 136:ef9c61f8c49f 1816 __STATIC_INLINE void LL_RCC_PLL_Enable(void)
Kojto 136:ef9c61f8c49f 1817 {
Kojto 136:ef9c61f8c49f 1818 SET_BIT(RCC->CR, RCC_CR_PLLON);
Kojto 136:ef9c61f8c49f 1819 }
Kojto 136:ef9c61f8c49f 1820
Kojto 136:ef9c61f8c49f 1821 /**
Kojto 136:ef9c61f8c49f 1822 * @brief Disable PLL
Kojto 136:ef9c61f8c49f 1823 * @note Cannot be disabled if the PLL clock is used as the system clock
Kojto 136:ef9c61f8c49f 1824 * @rmtoll CR PLLON LL_RCC_PLL_Disable
Kojto 136:ef9c61f8c49f 1825 * @retval None
Kojto 136:ef9c61f8c49f 1826 */
Kojto 136:ef9c61f8c49f 1827 __STATIC_INLINE void LL_RCC_PLL_Disable(void)
Kojto 136:ef9c61f8c49f 1828 {
Kojto 136:ef9c61f8c49f 1829 CLEAR_BIT(RCC->CR, RCC_CR_PLLON);
Kojto 136:ef9c61f8c49f 1830 }
Kojto 136:ef9c61f8c49f 1831
Kojto 136:ef9c61f8c49f 1832 /**
Kojto 136:ef9c61f8c49f 1833 * @brief Check if PLL Ready
Kojto 136:ef9c61f8c49f 1834 * @rmtoll CR PLLRDY LL_RCC_PLL_IsReady
Kojto 136:ef9c61f8c49f 1835 * @retval State of bit (1 or 0).
Kojto 136:ef9c61f8c49f 1836 */
Kojto 136:ef9c61f8c49f 1837 __STATIC_INLINE uint32_t LL_RCC_PLL_IsReady(void)
Kojto 136:ef9c61f8c49f 1838 {
Kojto 136:ef9c61f8c49f 1839 return (READ_BIT(RCC->CR, RCC_CR_PLLRDY) == (RCC_CR_PLLRDY));
Kojto 136:ef9c61f8c49f 1840 }
Kojto 136:ef9c61f8c49f 1841
Kojto 136:ef9c61f8c49f 1842 /**
Kojto 136:ef9c61f8c49f 1843 * @brief Configure PLL used for SYSCLK Domain
Kojto 136:ef9c61f8c49f 1844 * @rmtoll CFGR PLLSRC LL_RCC_PLL_ConfigDomain_SYS\n
Kojto 136:ef9c61f8c49f 1845 * CFGR PLLMUL LL_RCC_PLL_ConfigDomain_SYS\n
Kojto 136:ef9c61f8c49f 1846 * CFGR PLLDIV LL_RCC_PLL_ConfigDomain_SYS
Kojto 136:ef9c61f8c49f 1847 * @param Source This parameter can be one of the following values:
Kojto 136:ef9c61f8c49f 1848 * @arg @ref LL_RCC_PLLSOURCE_HSI
Kojto 136:ef9c61f8c49f 1849 * @arg @ref LL_RCC_PLLSOURCE_HSE
Kojto 136:ef9c61f8c49f 1850 * @param PLLMul This parameter can be one of the following values:
Kojto 136:ef9c61f8c49f 1851 * @arg @ref LL_RCC_PLL_MUL_3
Kojto 136:ef9c61f8c49f 1852 * @arg @ref LL_RCC_PLL_MUL_4
Kojto 136:ef9c61f8c49f 1853 * @arg @ref LL_RCC_PLL_MUL_6
Kojto 136:ef9c61f8c49f 1854 * @arg @ref LL_RCC_PLL_MUL_8
Kojto 136:ef9c61f8c49f 1855 * @arg @ref LL_RCC_PLL_MUL_12
Kojto 136:ef9c61f8c49f 1856 * @arg @ref LL_RCC_PLL_MUL_16
Kojto 136:ef9c61f8c49f 1857 * @arg @ref LL_RCC_PLL_MUL_24
Kojto 136:ef9c61f8c49f 1858 * @arg @ref LL_RCC_PLL_MUL_32
Kojto 136:ef9c61f8c49f 1859 * @arg @ref LL_RCC_PLL_MUL_48
Kojto 136:ef9c61f8c49f 1860 * @param PLLDiv This parameter can be one of the following values:
Kojto 136:ef9c61f8c49f 1861 * @arg @ref LL_RCC_PLL_DIV_2
Kojto 136:ef9c61f8c49f 1862 * @arg @ref LL_RCC_PLL_DIV_3
Kojto 136:ef9c61f8c49f 1863 * @arg @ref LL_RCC_PLL_DIV_4
Kojto 136:ef9c61f8c49f 1864 * @retval None
Kojto 136:ef9c61f8c49f 1865 */
Kojto 136:ef9c61f8c49f 1866 __STATIC_INLINE void LL_RCC_PLL_ConfigDomain_SYS(uint32_t Source, uint32_t PLLMul, uint32_t PLLDiv)
Kojto 136:ef9c61f8c49f 1867 {
Kojto 136:ef9c61f8c49f 1868 MODIFY_REG(RCC->CFGR, RCC_CFGR_PLLSRC | RCC_CFGR_PLLMUL | RCC_CFGR_PLLDIV, Source | PLLMul | PLLDiv);
Kojto 136:ef9c61f8c49f 1869 }
Kojto 136:ef9c61f8c49f 1870
Kojto 136:ef9c61f8c49f 1871 /**
Kojto 136:ef9c61f8c49f 1872 * @brief Get the oscillator used as PLL clock source.
Kojto 136:ef9c61f8c49f 1873 * @rmtoll CFGR PLLSRC LL_RCC_PLL_GetMainSource
Kojto 136:ef9c61f8c49f 1874 * @retval Returned value can be one of the following values:
Kojto 136:ef9c61f8c49f 1875 * @arg @ref LL_RCC_PLLSOURCE_HSI
Kojto 136:ef9c61f8c49f 1876 * @arg @ref LL_RCC_PLLSOURCE_HSE
Kojto 136:ef9c61f8c49f 1877 */
Kojto 136:ef9c61f8c49f 1878 __STATIC_INLINE uint32_t LL_RCC_PLL_GetMainSource(void)
Kojto 136:ef9c61f8c49f 1879 {
Kojto 136:ef9c61f8c49f 1880 return (uint32_t)(READ_BIT(RCC->CFGR, RCC_CFGR_PLLSRC));
Kojto 136:ef9c61f8c49f 1881 }
Kojto 136:ef9c61f8c49f 1882
Kojto 136:ef9c61f8c49f 1883 /**
Kojto 136:ef9c61f8c49f 1884 * @brief Get PLL multiplication Factor
Kojto 136:ef9c61f8c49f 1885 * @rmtoll CFGR PLLMUL LL_RCC_PLL_GetMultiplicator
Kojto 136:ef9c61f8c49f 1886 * @retval Returned value can be one of the following values:
Kojto 136:ef9c61f8c49f 1887 * @arg @ref LL_RCC_PLL_MUL_3
Kojto 136:ef9c61f8c49f 1888 * @arg @ref LL_RCC_PLL_MUL_4
Kojto 136:ef9c61f8c49f 1889 * @arg @ref LL_RCC_PLL_MUL_6
Kojto 136:ef9c61f8c49f 1890 * @arg @ref LL_RCC_PLL_MUL_8
Kojto 136:ef9c61f8c49f 1891 * @arg @ref LL_RCC_PLL_MUL_12
Kojto 136:ef9c61f8c49f 1892 * @arg @ref LL_RCC_PLL_MUL_16
Kojto 136:ef9c61f8c49f 1893 * @arg @ref LL_RCC_PLL_MUL_24
Kojto 136:ef9c61f8c49f 1894 * @arg @ref LL_RCC_PLL_MUL_32
Kojto 136:ef9c61f8c49f 1895 * @arg @ref LL_RCC_PLL_MUL_48
Kojto 136:ef9c61f8c49f 1896 */
Kojto 136:ef9c61f8c49f 1897 __STATIC_INLINE uint32_t LL_RCC_PLL_GetMultiplicator(void)
Kojto 136:ef9c61f8c49f 1898 {
Kojto 136:ef9c61f8c49f 1899 return (uint32_t)(READ_BIT(RCC->CFGR, RCC_CFGR_PLLMUL));
Kojto 136:ef9c61f8c49f 1900 }
Kojto 136:ef9c61f8c49f 1901
Kojto 136:ef9c61f8c49f 1902 /**
Kojto 136:ef9c61f8c49f 1903 * @brief Get Division factor for the main PLL and other PLL
Kojto 136:ef9c61f8c49f 1904 * @rmtoll CFGR PLLDIV LL_RCC_PLL_GetDivider
Kojto 136:ef9c61f8c49f 1905 * @retval Returned value can be one of the following values:
Kojto 136:ef9c61f8c49f 1906 * @arg @ref LL_RCC_PLL_DIV_2
Kojto 136:ef9c61f8c49f 1907 * @arg @ref LL_RCC_PLL_DIV_3
Kojto 136:ef9c61f8c49f 1908 * @arg @ref LL_RCC_PLL_DIV_4
Kojto 136:ef9c61f8c49f 1909 */
Kojto 136:ef9c61f8c49f 1910 __STATIC_INLINE uint32_t LL_RCC_PLL_GetDivider(void)
Kojto 136:ef9c61f8c49f 1911 {
Kojto 136:ef9c61f8c49f 1912 return (uint32_t)(READ_BIT(RCC->CFGR, RCC_CFGR_PLLDIV));
Kojto 136:ef9c61f8c49f 1913 }
Kojto 136:ef9c61f8c49f 1914
Kojto 136:ef9c61f8c49f 1915 /**
Kojto 136:ef9c61f8c49f 1916 * @}
Kojto 136:ef9c61f8c49f 1917 */
Kojto 136:ef9c61f8c49f 1918
Kojto 136:ef9c61f8c49f 1919 /** @defgroup RCC_LL_EF_FLAG_Management FLAG Management
Kojto 136:ef9c61f8c49f 1920 * @{
Kojto 136:ef9c61f8c49f 1921 */
Kojto 136:ef9c61f8c49f 1922
Kojto 136:ef9c61f8c49f 1923 /**
Kojto 136:ef9c61f8c49f 1924 * @brief Clear LSI ready interrupt flag
Kojto 136:ef9c61f8c49f 1925 * @rmtoll CICR LSIRDYC LL_RCC_ClearFlag_LSIRDY
Kojto 136:ef9c61f8c49f 1926 * @retval None
Kojto 136:ef9c61f8c49f 1927 */
Kojto 136:ef9c61f8c49f 1928 __STATIC_INLINE void LL_RCC_ClearFlag_LSIRDY(void)
Kojto 136:ef9c61f8c49f 1929 {
Kojto 136:ef9c61f8c49f 1930 SET_BIT(RCC->CICR, RCC_CICR_LSIRDYC);
Kojto 136:ef9c61f8c49f 1931 }
Kojto 136:ef9c61f8c49f 1932
Kojto 136:ef9c61f8c49f 1933 /**
Kojto 136:ef9c61f8c49f 1934 * @brief Clear LSE ready interrupt flag
Kojto 136:ef9c61f8c49f 1935 * @rmtoll CICR LSERDYC LL_RCC_ClearFlag_LSERDY
Kojto 136:ef9c61f8c49f 1936 * @retval None
Kojto 136:ef9c61f8c49f 1937 */
Kojto 136:ef9c61f8c49f 1938 __STATIC_INLINE void LL_RCC_ClearFlag_LSERDY(void)
Kojto 136:ef9c61f8c49f 1939 {
Kojto 136:ef9c61f8c49f 1940 SET_BIT(RCC->CICR, RCC_CICR_LSERDYC);
Kojto 136:ef9c61f8c49f 1941 }
Kojto 136:ef9c61f8c49f 1942
Kojto 136:ef9c61f8c49f 1943 /**
Kojto 136:ef9c61f8c49f 1944 * @brief Clear MSI ready interrupt flag
Kojto 136:ef9c61f8c49f 1945 * @rmtoll CICR MSIRDYC LL_RCC_ClearFlag_MSIRDY
Kojto 136:ef9c61f8c49f 1946 * @retval None
Kojto 136:ef9c61f8c49f 1947 */
Kojto 136:ef9c61f8c49f 1948 __STATIC_INLINE void LL_RCC_ClearFlag_MSIRDY(void)
Kojto 136:ef9c61f8c49f 1949 {
Kojto 136:ef9c61f8c49f 1950 SET_BIT(RCC->CICR, RCC_CICR_MSIRDYC);
Kojto 136:ef9c61f8c49f 1951 }
Kojto 136:ef9c61f8c49f 1952
Kojto 136:ef9c61f8c49f 1953 /**
Kojto 136:ef9c61f8c49f 1954 * @brief Clear HSI ready interrupt flag
Kojto 136:ef9c61f8c49f 1955 * @rmtoll CICR HSIRDYC LL_RCC_ClearFlag_HSIRDY
Kojto 136:ef9c61f8c49f 1956 * @retval None
Kojto 136:ef9c61f8c49f 1957 */
Kojto 136:ef9c61f8c49f 1958 __STATIC_INLINE void LL_RCC_ClearFlag_HSIRDY(void)
Kojto 136:ef9c61f8c49f 1959 {
Kojto 136:ef9c61f8c49f 1960 SET_BIT(RCC->CICR, RCC_CICR_HSIRDYC);
Kojto 136:ef9c61f8c49f 1961 }
Kojto 136:ef9c61f8c49f 1962
Kojto 136:ef9c61f8c49f 1963 /**
Kojto 136:ef9c61f8c49f 1964 * @brief Clear HSE ready interrupt flag
Kojto 136:ef9c61f8c49f 1965 * @rmtoll CICR HSERDYC LL_RCC_ClearFlag_HSERDY
Kojto 136:ef9c61f8c49f 1966 * @retval None
Kojto 136:ef9c61f8c49f 1967 */
Kojto 136:ef9c61f8c49f 1968 __STATIC_INLINE void LL_RCC_ClearFlag_HSERDY(void)
Kojto 136:ef9c61f8c49f 1969 {
Kojto 136:ef9c61f8c49f 1970 SET_BIT(RCC->CICR, RCC_CICR_HSERDYC);
Kojto 136:ef9c61f8c49f 1971 }
Kojto 136:ef9c61f8c49f 1972
Kojto 136:ef9c61f8c49f 1973 /**
Kojto 136:ef9c61f8c49f 1974 * @brief Clear PLL ready interrupt flag
Kojto 136:ef9c61f8c49f 1975 * @rmtoll CICR PLLRDYC LL_RCC_ClearFlag_PLLRDY
Kojto 136:ef9c61f8c49f 1976 * @retval None
Kojto 136:ef9c61f8c49f 1977 */
Kojto 136:ef9c61f8c49f 1978 __STATIC_INLINE void LL_RCC_ClearFlag_PLLRDY(void)
Kojto 136:ef9c61f8c49f 1979 {
Kojto 136:ef9c61f8c49f 1980 SET_BIT(RCC->CICR, RCC_CICR_PLLRDYC);
Kojto 136:ef9c61f8c49f 1981 }
Kojto 136:ef9c61f8c49f 1982
Kojto 136:ef9c61f8c49f 1983 #if defined(RCC_HSI48_SUPPORT)
Kojto 136:ef9c61f8c49f 1984 /**
Kojto 136:ef9c61f8c49f 1985 * @brief Clear HSI48 ready interrupt flag
Kojto 136:ef9c61f8c49f 1986 * @rmtoll CICR HSI48RDYC LL_RCC_ClearFlag_HSI48RDY
Kojto 136:ef9c61f8c49f 1987 * @retval None
Kojto 136:ef9c61f8c49f 1988 */
Kojto 136:ef9c61f8c49f 1989 __STATIC_INLINE void LL_RCC_ClearFlag_HSI48RDY(void)
Kojto 136:ef9c61f8c49f 1990 {
Kojto 136:ef9c61f8c49f 1991 SET_BIT(RCC->CICR, RCC_CICR_HSI48RDYC);
Kojto 136:ef9c61f8c49f 1992 }
Kojto 136:ef9c61f8c49f 1993 #endif /* RCC_HSI48_SUPPORT */
Kojto 136:ef9c61f8c49f 1994
Kojto 136:ef9c61f8c49f 1995 #if defined(RCC_HSECSS_SUPPORT)
Kojto 136:ef9c61f8c49f 1996 /**
Kojto 136:ef9c61f8c49f 1997 * @brief Clear Clock security system interrupt flag
Kojto 136:ef9c61f8c49f 1998 * @rmtoll CICR CSSC LL_RCC_ClearFlag_HSECSS
Kojto 136:ef9c61f8c49f 1999 * @retval None
Kojto 136:ef9c61f8c49f 2000 */
Kojto 136:ef9c61f8c49f 2001 __STATIC_INLINE void LL_RCC_ClearFlag_HSECSS(void)
Kojto 136:ef9c61f8c49f 2002 {
Kojto 136:ef9c61f8c49f 2003 SET_BIT(RCC->CICR, RCC_CICR_CSSC);
Kojto 136:ef9c61f8c49f 2004 }
Kojto 136:ef9c61f8c49f 2005 #endif /* RCC_HSECSS_SUPPORT */
Kojto 136:ef9c61f8c49f 2006
Kojto 136:ef9c61f8c49f 2007 /**
Kojto 136:ef9c61f8c49f 2008 * @brief Clear LSE Clock security system interrupt flag
Kojto 136:ef9c61f8c49f 2009 * @rmtoll CICR LSECSSC LL_RCC_ClearFlag_LSECSS
Kojto 136:ef9c61f8c49f 2010 * @retval None
Kojto 136:ef9c61f8c49f 2011 */
Kojto 136:ef9c61f8c49f 2012 __STATIC_INLINE void LL_RCC_ClearFlag_LSECSS(void)
Kojto 136:ef9c61f8c49f 2013 {
Kojto 136:ef9c61f8c49f 2014 SET_BIT(RCC->CICR, RCC_CICR_LSECSSC);
Kojto 136:ef9c61f8c49f 2015 }
Kojto 136:ef9c61f8c49f 2016
Kojto 136:ef9c61f8c49f 2017 /**
Kojto 136:ef9c61f8c49f 2018 * @brief Check if LSI ready interrupt occurred or not
Kojto 136:ef9c61f8c49f 2019 * @rmtoll CIFR LSIRDYF LL_RCC_IsActiveFlag_LSIRDY
Kojto 136:ef9c61f8c49f 2020 * @retval State of bit (1 or 0).
Kojto 136:ef9c61f8c49f 2021 */
Kojto 136:ef9c61f8c49f 2022 __STATIC_INLINE uint32_t LL_RCC_IsActiveFlag_LSIRDY(void)
Kojto 136:ef9c61f8c49f 2023 {
Kojto 136:ef9c61f8c49f 2024 return (READ_BIT(RCC->CIFR, RCC_CIFR_LSIRDYF) == (RCC_CIFR_LSIRDYF));
Kojto 136:ef9c61f8c49f 2025 }
Kojto 136:ef9c61f8c49f 2026
Kojto 136:ef9c61f8c49f 2027 /**
Kojto 136:ef9c61f8c49f 2028 * @brief Check if LSE ready interrupt occurred or not
Kojto 136:ef9c61f8c49f 2029 * @rmtoll CIFR LSERDYF LL_RCC_IsActiveFlag_LSERDY
Kojto 136:ef9c61f8c49f 2030 * @retval State of bit (1 or 0).
Kojto 136:ef9c61f8c49f 2031 */
Kojto 136:ef9c61f8c49f 2032 __STATIC_INLINE uint32_t LL_RCC_IsActiveFlag_LSERDY(void)
Kojto 136:ef9c61f8c49f 2033 {
Kojto 136:ef9c61f8c49f 2034 return (READ_BIT(RCC->CIFR, RCC_CIFR_LSERDYF) == (RCC_CIFR_LSERDYF));
Kojto 136:ef9c61f8c49f 2035 }
Kojto 136:ef9c61f8c49f 2036
Kojto 136:ef9c61f8c49f 2037 /**
Kojto 136:ef9c61f8c49f 2038 * @brief Check if MSI ready interrupt occurred or not
Kojto 136:ef9c61f8c49f 2039 * @rmtoll CIFR MSIRDYF LL_RCC_IsActiveFlag_MSIRDY
Kojto 136:ef9c61f8c49f 2040 * @retval State of bit (1 or 0).
Kojto 136:ef9c61f8c49f 2041 */
Kojto 136:ef9c61f8c49f 2042 __STATIC_INLINE uint32_t LL_RCC_IsActiveFlag_MSIRDY(void)
Kojto 136:ef9c61f8c49f 2043 {
Kojto 136:ef9c61f8c49f 2044 return (READ_BIT(RCC->CIFR, RCC_CIFR_MSIRDYF) == (RCC_CIFR_MSIRDYF));
Kojto 136:ef9c61f8c49f 2045 }
Kojto 136:ef9c61f8c49f 2046
Kojto 136:ef9c61f8c49f 2047 /**
Kojto 136:ef9c61f8c49f 2048 * @brief Check if HSI ready interrupt occurred or not
Kojto 136:ef9c61f8c49f 2049 * @rmtoll CIFR HSIRDYF LL_RCC_IsActiveFlag_HSIRDY
Kojto 136:ef9c61f8c49f 2050 * @retval State of bit (1 or 0).
Kojto 136:ef9c61f8c49f 2051 */
Kojto 136:ef9c61f8c49f 2052 __STATIC_INLINE uint32_t LL_RCC_IsActiveFlag_HSIRDY(void)
Kojto 136:ef9c61f8c49f 2053 {
Kojto 136:ef9c61f8c49f 2054 return (READ_BIT(RCC->CIFR, RCC_CIFR_HSIRDYF) == (RCC_CIFR_HSIRDYF));
Kojto 136:ef9c61f8c49f 2055 }
Kojto 136:ef9c61f8c49f 2056
Kojto 136:ef9c61f8c49f 2057 /**
Kojto 136:ef9c61f8c49f 2058 * @brief Check if HSE ready interrupt occurred or not
Kojto 136:ef9c61f8c49f 2059 * @rmtoll CIFR HSERDYF LL_RCC_IsActiveFlag_HSERDY
Kojto 136:ef9c61f8c49f 2060 * @retval State of bit (1 or 0).
Kojto 136:ef9c61f8c49f 2061 */
Kojto 136:ef9c61f8c49f 2062 __STATIC_INLINE uint32_t LL_RCC_IsActiveFlag_HSERDY(void)
Kojto 136:ef9c61f8c49f 2063 {
Kojto 136:ef9c61f8c49f 2064 return (READ_BIT(RCC->CIFR, RCC_CIFR_HSERDYF) == (RCC_CIFR_HSERDYF));
Kojto 136:ef9c61f8c49f 2065 }
Kojto 136:ef9c61f8c49f 2066
Kojto 136:ef9c61f8c49f 2067 /**
Kojto 136:ef9c61f8c49f 2068 * @brief Check if PLL ready interrupt occurred or not
Kojto 136:ef9c61f8c49f 2069 * @rmtoll CIFR PLLRDYF LL_RCC_IsActiveFlag_PLLRDY
Kojto 136:ef9c61f8c49f 2070 * @retval State of bit (1 or 0).
Kojto 136:ef9c61f8c49f 2071 */
Kojto 136:ef9c61f8c49f 2072 __STATIC_INLINE uint32_t LL_RCC_IsActiveFlag_PLLRDY(void)
Kojto 136:ef9c61f8c49f 2073 {
Kojto 136:ef9c61f8c49f 2074 return (READ_BIT(RCC->CIFR, RCC_CIFR_PLLRDYF) == (RCC_CIFR_PLLRDYF));
Kojto 136:ef9c61f8c49f 2075 }
Kojto 136:ef9c61f8c49f 2076
Kojto 136:ef9c61f8c49f 2077 #if defined(RCC_HSI48_SUPPORT)
Kojto 136:ef9c61f8c49f 2078 /**
Kojto 136:ef9c61f8c49f 2079 * @brief Check if HSI48 ready interrupt occurred or not
Kojto 136:ef9c61f8c49f 2080 * @rmtoll CIFR HSI48RDYF LL_RCC_IsActiveFlag_HSI48RDY
Kojto 136:ef9c61f8c49f 2081 * @retval State of bit (1 or 0).
Kojto 136:ef9c61f8c49f 2082 */
Kojto 136:ef9c61f8c49f 2083 __STATIC_INLINE uint32_t LL_RCC_IsActiveFlag_HSI48RDY(void)
Kojto 136:ef9c61f8c49f 2084 {
Kojto 136:ef9c61f8c49f 2085 return (READ_BIT(RCC->CIFR, RCC_CIFR_HSI48RDYF) == (RCC_CIFR_HSI48RDYF));
Kojto 136:ef9c61f8c49f 2086 }
Kojto 136:ef9c61f8c49f 2087 #endif /* RCC_HSI48_SUPPORT */
Kojto 136:ef9c61f8c49f 2088
Kojto 136:ef9c61f8c49f 2089 #if defined(RCC_HSECSS_SUPPORT)
Kojto 136:ef9c61f8c49f 2090 /**
Kojto 136:ef9c61f8c49f 2091 * @brief Check if Clock security system interrupt occurred or not
Kojto 136:ef9c61f8c49f 2092 * @rmtoll CIFR CSSF LL_RCC_IsActiveFlag_HSECSS
Kojto 136:ef9c61f8c49f 2093 * @retval State of bit (1 or 0).
Kojto 136:ef9c61f8c49f 2094 */
Kojto 136:ef9c61f8c49f 2095 __STATIC_INLINE uint32_t LL_RCC_IsActiveFlag_HSECSS(void)
Kojto 136:ef9c61f8c49f 2096 {
Kojto 136:ef9c61f8c49f 2097 return (READ_BIT(RCC->CIFR, RCC_CIFR_CSSF) == (RCC_CIFR_CSSF));
Kojto 136:ef9c61f8c49f 2098 }
Kojto 136:ef9c61f8c49f 2099 #endif /* RCC_HSECSS_SUPPORT */
Kojto 136:ef9c61f8c49f 2100
Kojto 136:ef9c61f8c49f 2101 /**
Kojto 136:ef9c61f8c49f 2102 * @brief Check if LSE Clock security system interrupt occurred or not
Kojto 136:ef9c61f8c49f 2103 * @rmtoll CIFR LSECSSF LL_RCC_IsActiveFlag_LSECSS
Kojto 136:ef9c61f8c49f 2104 * @retval State of bit (1 or 0).
Kojto 136:ef9c61f8c49f 2105 */
Kojto 136:ef9c61f8c49f 2106 __STATIC_INLINE uint32_t LL_RCC_IsActiveFlag_LSECSS(void)
Kojto 136:ef9c61f8c49f 2107 {
Kojto 136:ef9c61f8c49f 2108 return (READ_BIT(RCC->CIFR, RCC_CIFR_LSECSSF) == (RCC_CIFR_LSECSSF));
Kojto 136:ef9c61f8c49f 2109 }
Kojto 136:ef9c61f8c49f 2110
Kojto 136:ef9c61f8c49f 2111 /**
Kojto 136:ef9c61f8c49f 2112 * @brief Check if HSI Divider is enabled (it divides by 4)
Kojto 136:ef9c61f8c49f 2113 * @rmtoll CR HSIDIVF LL_RCC_IsActiveFlag_HSIDIV
Kojto 136:ef9c61f8c49f 2114 * @retval State of bit (1 or 0).
Kojto 136:ef9c61f8c49f 2115 */
Kojto 136:ef9c61f8c49f 2116 __STATIC_INLINE uint32_t LL_RCC_IsActiveFlag_HSIDIV(void)
Kojto 136:ef9c61f8c49f 2117 {
Kojto 136:ef9c61f8c49f 2118 return (READ_BIT(RCC->CR, RCC_CR_HSIDIVF) == (RCC_CR_HSIDIVF));
Kojto 136:ef9c61f8c49f 2119 }
Kojto 136:ef9c61f8c49f 2120
Kojto 136:ef9c61f8c49f 2121 #if defined(RCC_CSR_FWRSTF)
Kojto 136:ef9c61f8c49f 2122 /**
Kojto 136:ef9c61f8c49f 2123 * @brief Check if RCC flag FW reset is set or not.
Kojto 136:ef9c61f8c49f 2124 * @rmtoll CSR FWRSTF LL_RCC_IsActiveFlag_FWRST
Kojto 136:ef9c61f8c49f 2125 * @retval State of bit (1 or 0).
Kojto 136:ef9c61f8c49f 2126 */
Kojto 136:ef9c61f8c49f 2127 __STATIC_INLINE uint32_t LL_RCC_IsActiveFlag_FWRST(void)
Kojto 136:ef9c61f8c49f 2128 {
Kojto 136:ef9c61f8c49f 2129 return (READ_BIT(RCC->CSR, RCC_CSR_FWRSTF) == (RCC_CSR_FWRSTF));
Kojto 136:ef9c61f8c49f 2130 }
Kojto 136:ef9c61f8c49f 2131 #endif /* RCC_CSR_FWRSTF */
Kojto 136:ef9c61f8c49f 2132
Kojto 136:ef9c61f8c49f 2133 /**
Kojto 136:ef9c61f8c49f 2134 * @brief Check if RCC flag Independent Watchdog reset is set or not.
Kojto 136:ef9c61f8c49f 2135 * @rmtoll CSR IWDGRSTF LL_RCC_IsActiveFlag_IWDGRST
Kojto 136:ef9c61f8c49f 2136 * @retval State of bit (1 or 0).
Kojto 136:ef9c61f8c49f 2137 */
Kojto 136:ef9c61f8c49f 2138 __STATIC_INLINE uint32_t LL_RCC_IsActiveFlag_IWDGRST(void)
Kojto 136:ef9c61f8c49f 2139 {
Kojto 136:ef9c61f8c49f 2140 return (READ_BIT(RCC->CSR, RCC_CSR_IWDGRSTF) == (RCC_CSR_IWDGRSTF));
Kojto 136:ef9c61f8c49f 2141 }
Kojto 136:ef9c61f8c49f 2142
Kojto 136:ef9c61f8c49f 2143 /**
Kojto 136:ef9c61f8c49f 2144 * @brief Check if RCC flag Low Power reset is set or not.
Kojto 136:ef9c61f8c49f 2145 * @rmtoll CSR LPWRRSTF LL_RCC_IsActiveFlag_LPWRRST
Kojto 136:ef9c61f8c49f 2146 * @retval State of bit (1 or 0).
Kojto 136:ef9c61f8c49f 2147 */
Kojto 136:ef9c61f8c49f 2148 __STATIC_INLINE uint32_t LL_RCC_IsActiveFlag_LPWRRST(void)
Kojto 136:ef9c61f8c49f 2149 {
Kojto 136:ef9c61f8c49f 2150 return (READ_BIT(RCC->CSR, RCC_CSR_LPWRRSTF) == (RCC_CSR_LPWRRSTF));
Kojto 136:ef9c61f8c49f 2151 }
Kojto 136:ef9c61f8c49f 2152
Kojto 136:ef9c61f8c49f 2153 /**
Kojto 136:ef9c61f8c49f 2154 * @brief Check if RCC flag is set or not.
Kojto 136:ef9c61f8c49f 2155 * @rmtoll CSR OBLRSTF LL_RCC_IsActiveFlag_OBLRST
Kojto 136:ef9c61f8c49f 2156 * @retval State of bit (1 or 0).
Kojto 136:ef9c61f8c49f 2157 */
Kojto 136:ef9c61f8c49f 2158 __STATIC_INLINE uint32_t LL_RCC_IsActiveFlag_OBLRST(void)
Kojto 136:ef9c61f8c49f 2159 {
Kojto 136:ef9c61f8c49f 2160 return (READ_BIT(RCC->CSR, RCC_CSR_OBLRSTF) == (RCC_CSR_OBLRSTF));
Kojto 136:ef9c61f8c49f 2161 }
Kojto 136:ef9c61f8c49f 2162
Kojto 136:ef9c61f8c49f 2163 /**
Kojto 136:ef9c61f8c49f 2164 * @brief Check if RCC flag Pin reset is set or not.
Kojto 136:ef9c61f8c49f 2165 * @rmtoll CSR PINRSTF LL_RCC_IsActiveFlag_PINRST
Kojto 136:ef9c61f8c49f 2166 * @retval State of bit (1 or 0).
Kojto 136:ef9c61f8c49f 2167 */
Kojto 136:ef9c61f8c49f 2168 __STATIC_INLINE uint32_t LL_RCC_IsActiveFlag_PINRST(void)
Kojto 136:ef9c61f8c49f 2169 {
Kojto 136:ef9c61f8c49f 2170 return (READ_BIT(RCC->CSR, RCC_CSR_PINRSTF) == (RCC_CSR_PINRSTF));
Kojto 136:ef9c61f8c49f 2171 }
Kojto 136:ef9c61f8c49f 2172
Kojto 136:ef9c61f8c49f 2173 /**
Kojto 136:ef9c61f8c49f 2174 * @brief Check if RCC flag POR/PDR reset is set or not.
Kojto 136:ef9c61f8c49f 2175 * @rmtoll CSR PORRSTF LL_RCC_IsActiveFlag_PORRST
Kojto 136:ef9c61f8c49f 2176 * @retval State of bit (1 or 0).
Kojto 136:ef9c61f8c49f 2177 */
Kojto 136:ef9c61f8c49f 2178 __STATIC_INLINE uint32_t LL_RCC_IsActiveFlag_PORRST(void)
Kojto 136:ef9c61f8c49f 2179 {
Kojto 136:ef9c61f8c49f 2180 return (READ_BIT(RCC->CSR, RCC_CSR_PORRSTF) == (RCC_CSR_PORRSTF));
Kojto 136:ef9c61f8c49f 2181 }
Kojto 136:ef9c61f8c49f 2182
Kojto 136:ef9c61f8c49f 2183 /**
Kojto 136:ef9c61f8c49f 2184 * @brief Check if RCC flag Software reset is set or not.
Kojto 136:ef9c61f8c49f 2185 * @rmtoll CSR SFTRSTF LL_RCC_IsActiveFlag_SFTRST
Kojto 136:ef9c61f8c49f 2186 * @retval State of bit (1 or 0).
Kojto 136:ef9c61f8c49f 2187 */
Kojto 136:ef9c61f8c49f 2188 __STATIC_INLINE uint32_t LL_RCC_IsActiveFlag_SFTRST(void)
Kojto 136:ef9c61f8c49f 2189 {
Kojto 136:ef9c61f8c49f 2190 return (READ_BIT(RCC->CSR, RCC_CSR_SFTRSTF) == (RCC_CSR_SFTRSTF));
Kojto 136:ef9c61f8c49f 2191 }
Kojto 136:ef9c61f8c49f 2192
Kojto 136:ef9c61f8c49f 2193 /**
Kojto 136:ef9c61f8c49f 2194 * @brief Check if RCC flag Window Watchdog reset is set or not.
Kojto 136:ef9c61f8c49f 2195 * @rmtoll CSR WWDGRSTF LL_RCC_IsActiveFlag_WWDGRST
Kojto 136:ef9c61f8c49f 2196 * @retval State of bit (1 or 0).
Kojto 136:ef9c61f8c49f 2197 */
Kojto 136:ef9c61f8c49f 2198 __STATIC_INLINE uint32_t LL_RCC_IsActiveFlag_WWDGRST(void)
Kojto 136:ef9c61f8c49f 2199 {
Kojto 136:ef9c61f8c49f 2200 return (READ_BIT(RCC->CSR, RCC_CSR_WWDGRSTF) == (RCC_CSR_WWDGRSTF));
Kojto 136:ef9c61f8c49f 2201 }
Kojto 136:ef9c61f8c49f 2202
Kojto 136:ef9c61f8c49f 2203 /**
Kojto 136:ef9c61f8c49f 2204 * @brief Set RMVF bit to clear the reset flags.
Kojto 136:ef9c61f8c49f 2205 * @rmtoll CSR RMVF LL_RCC_ClearResetFlags
Kojto 136:ef9c61f8c49f 2206 * @retval None
Kojto 136:ef9c61f8c49f 2207 */
Kojto 136:ef9c61f8c49f 2208 __STATIC_INLINE void LL_RCC_ClearResetFlags(void)
Kojto 136:ef9c61f8c49f 2209 {
Kojto 136:ef9c61f8c49f 2210 SET_BIT(RCC->CSR, RCC_CSR_RMVF);
Kojto 136:ef9c61f8c49f 2211 }
Kojto 136:ef9c61f8c49f 2212
Kojto 136:ef9c61f8c49f 2213 /**
Kojto 136:ef9c61f8c49f 2214 * @}
Kojto 136:ef9c61f8c49f 2215 */
Kojto 136:ef9c61f8c49f 2216
Kojto 136:ef9c61f8c49f 2217 /** @defgroup RCC_LL_EF_IT_Management IT Management
Kojto 136:ef9c61f8c49f 2218 * @{
Kojto 136:ef9c61f8c49f 2219 */
Kojto 136:ef9c61f8c49f 2220
Kojto 136:ef9c61f8c49f 2221 /**
Kojto 136:ef9c61f8c49f 2222 * @brief Enable LSI ready interrupt
Kojto 136:ef9c61f8c49f 2223 * @rmtoll CIER LSIRDYIE LL_RCC_EnableIT_LSIRDY
Kojto 136:ef9c61f8c49f 2224 * @retval None
Kojto 136:ef9c61f8c49f 2225 */
Kojto 136:ef9c61f8c49f 2226 __STATIC_INLINE void LL_RCC_EnableIT_LSIRDY(void)
Kojto 136:ef9c61f8c49f 2227 {
Kojto 136:ef9c61f8c49f 2228 SET_BIT(RCC->CIER, RCC_CIER_LSIRDYIE);
Kojto 136:ef9c61f8c49f 2229 }
Kojto 136:ef9c61f8c49f 2230
Kojto 136:ef9c61f8c49f 2231 /**
Kojto 136:ef9c61f8c49f 2232 * @brief Enable LSE ready interrupt
Kojto 136:ef9c61f8c49f 2233 * @rmtoll CIER LSERDYIE LL_RCC_EnableIT_LSERDY
Kojto 136:ef9c61f8c49f 2234 * @retval None
Kojto 136:ef9c61f8c49f 2235 */
Kojto 136:ef9c61f8c49f 2236 __STATIC_INLINE void LL_RCC_EnableIT_LSERDY(void)
Kojto 136:ef9c61f8c49f 2237 {
Kojto 136:ef9c61f8c49f 2238 SET_BIT(RCC->CIER, RCC_CIER_LSERDYIE);
Kojto 136:ef9c61f8c49f 2239 }
Kojto 136:ef9c61f8c49f 2240
Kojto 136:ef9c61f8c49f 2241 /**
Kojto 136:ef9c61f8c49f 2242 * @brief Enable MSI ready interrupt
Kojto 136:ef9c61f8c49f 2243 * @rmtoll CIER MSIRDYIE LL_RCC_EnableIT_MSIRDY
Kojto 136:ef9c61f8c49f 2244 * @retval None
Kojto 136:ef9c61f8c49f 2245 */
Kojto 136:ef9c61f8c49f 2246 __STATIC_INLINE void LL_RCC_EnableIT_MSIRDY(void)
Kojto 136:ef9c61f8c49f 2247 {
Kojto 136:ef9c61f8c49f 2248 SET_BIT(RCC->CIER, RCC_CIER_MSIRDYIE);
Kojto 136:ef9c61f8c49f 2249 }
Kojto 136:ef9c61f8c49f 2250
Kojto 136:ef9c61f8c49f 2251 /**
Kojto 136:ef9c61f8c49f 2252 * @brief Enable HSI ready interrupt
Kojto 136:ef9c61f8c49f 2253 * @rmtoll CIER HSIRDYIE LL_RCC_EnableIT_HSIRDY
Kojto 136:ef9c61f8c49f 2254 * @retval None
Kojto 136:ef9c61f8c49f 2255 */
Kojto 136:ef9c61f8c49f 2256 __STATIC_INLINE void LL_RCC_EnableIT_HSIRDY(void)
Kojto 136:ef9c61f8c49f 2257 {
Kojto 136:ef9c61f8c49f 2258 SET_BIT(RCC->CIER, RCC_CIER_HSIRDYIE);
Kojto 136:ef9c61f8c49f 2259 }
Kojto 136:ef9c61f8c49f 2260
Kojto 136:ef9c61f8c49f 2261 /**
Kojto 136:ef9c61f8c49f 2262 * @brief Enable HSE ready interrupt
Kojto 136:ef9c61f8c49f 2263 * @rmtoll CIER HSERDYIE LL_RCC_EnableIT_HSERDY
Kojto 136:ef9c61f8c49f 2264 * @retval None
Kojto 136:ef9c61f8c49f 2265 */
Kojto 136:ef9c61f8c49f 2266 __STATIC_INLINE void LL_RCC_EnableIT_HSERDY(void)
Kojto 136:ef9c61f8c49f 2267 {
Kojto 136:ef9c61f8c49f 2268 SET_BIT(RCC->CIER, RCC_CIER_HSERDYIE);
Kojto 136:ef9c61f8c49f 2269 }
Kojto 136:ef9c61f8c49f 2270
Kojto 136:ef9c61f8c49f 2271 /**
Kojto 136:ef9c61f8c49f 2272 * @brief Enable PLL ready interrupt
Kojto 136:ef9c61f8c49f 2273 * @rmtoll CIER PLLRDYIE LL_RCC_EnableIT_PLLRDY
Kojto 136:ef9c61f8c49f 2274 * @retval None
Kojto 136:ef9c61f8c49f 2275 */
Kojto 136:ef9c61f8c49f 2276 __STATIC_INLINE void LL_RCC_EnableIT_PLLRDY(void)
Kojto 136:ef9c61f8c49f 2277 {
Kojto 136:ef9c61f8c49f 2278 SET_BIT(RCC->CIER, RCC_CIER_PLLRDYIE);
Kojto 136:ef9c61f8c49f 2279 }
Kojto 136:ef9c61f8c49f 2280
Kojto 136:ef9c61f8c49f 2281 #if defined(RCC_HSI48_SUPPORT)
Kojto 136:ef9c61f8c49f 2282 /**
Kojto 136:ef9c61f8c49f 2283 * @brief Enable HSI48 ready interrupt
Kojto 136:ef9c61f8c49f 2284 * @rmtoll CIER HSI48RDYIE LL_RCC_EnableIT_HSI48RDY
Kojto 136:ef9c61f8c49f 2285 * @retval None
Kojto 136:ef9c61f8c49f 2286 */
Kojto 136:ef9c61f8c49f 2287 __STATIC_INLINE void LL_RCC_EnableIT_HSI48RDY(void)
Kojto 136:ef9c61f8c49f 2288 {
Kojto 136:ef9c61f8c49f 2289 SET_BIT(RCC->CIER, RCC_CIER_HSI48RDYIE);
Kojto 136:ef9c61f8c49f 2290 }
Kojto 136:ef9c61f8c49f 2291 #endif /* RCC_HSI48_SUPPORT */
Kojto 136:ef9c61f8c49f 2292
Kojto 136:ef9c61f8c49f 2293 /**
Kojto 136:ef9c61f8c49f 2294 * @brief Enable LSE clock security system interrupt
Kojto 136:ef9c61f8c49f 2295 * @rmtoll CIER LSECSSIE LL_RCC_EnableIT_LSECSS
Kojto 136:ef9c61f8c49f 2296 * @retval None
Kojto 136:ef9c61f8c49f 2297 */
Kojto 136:ef9c61f8c49f 2298 __STATIC_INLINE void LL_RCC_EnableIT_LSECSS(void)
Kojto 136:ef9c61f8c49f 2299 {
Kojto 136:ef9c61f8c49f 2300 SET_BIT(RCC->CIER, RCC_CIER_LSECSSIE);
Kojto 136:ef9c61f8c49f 2301 }
Kojto 136:ef9c61f8c49f 2302
Kojto 136:ef9c61f8c49f 2303 /**
Kojto 136:ef9c61f8c49f 2304 * @brief Disable LSI ready interrupt
Kojto 136:ef9c61f8c49f 2305 * @rmtoll CIER LSIRDYIE LL_RCC_DisableIT_LSIRDY
Kojto 136:ef9c61f8c49f 2306 * @retval None
Kojto 136:ef9c61f8c49f 2307 */
Kojto 136:ef9c61f8c49f 2308 __STATIC_INLINE void LL_RCC_DisableIT_LSIRDY(void)
Kojto 136:ef9c61f8c49f 2309 {
Kojto 136:ef9c61f8c49f 2310 CLEAR_BIT(RCC->CIER, RCC_CIER_LSIRDYIE);
Kojto 136:ef9c61f8c49f 2311 }
Kojto 136:ef9c61f8c49f 2312
Kojto 136:ef9c61f8c49f 2313 /**
Kojto 136:ef9c61f8c49f 2314 * @brief Disable LSE ready interrupt
Kojto 136:ef9c61f8c49f 2315 * @rmtoll CIER LSERDYIE LL_RCC_DisableIT_LSERDY
Kojto 136:ef9c61f8c49f 2316 * @retval None
Kojto 136:ef9c61f8c49f 2317 */
Kojto 136:ef9c61f8c49f 2318 __STATIC_INLINE void LL_RCC_DisableIT_LSERDY(void)
Kojto 136:ef9c61f8c49f 2319 {
Kojto 136:ef9c61f8c49f 2320 CLEAR_BIT(RCC->CIER, RCC_CIER_LSERDYIE);
Kojto 136:ef9c61f8c49f 2321 }
Kojto 136:ef9c61f8c49f 2322
Kojto 136:ef9c61f8c49f 2323 /**
Kojto 136:ef9c61f8c49f 2324 * @brief Disable MSI ready interrupt
Kojto 136:ef9c61f8c49f 2325 * @rmtoll CIER MSIRDYIE LL_RCC_DisableIT_MSIRDY
Kojto 136:ef9c61f8c49f 2326 * @retval None
Kojto 136:ef9c61f8c49f 2327 */
Kojto 136:ef9c61f8c49f 2328 __STATIC_INLINE void LL_RCC_DisableIT_MSIRDY(void)
Kojto 136:ef9c61f8c49f 2329 {
Kojto 136:ef9c61f8c49f 2330 CLEAR_BIT(RCC->CIER, RCC_CIER_MSIRDYIE);
Kojto 136:ef9c61f8c49f 2331 }
Kojto 136:ef9c61f8c49f 2332
Kojto 136:ef9c61f8c49f 2333 /**
Kojto 136:ef9c61f8c49f 2334 * @brief Disable HSI ready interrupt
Kojto 136:ef9c61f8c49f 2335 * @rmtoll CIER HSIRDYIE LL_RCC_DisableIT_HSIRDY
Kojto 136:ef9c61f8c49f 2336 * @retval None
Kojto 136:ef9c61f8c49f 2337 */
Kojto 136:ef9c61f8c49f 2338 __STATIC_INLINE void LL_RCC_DisableIT_HSIRDY(void)
Kojto 136:ef9c61f8c49f 2339 {
Kojto 136:ef9c61f8c49f 2340 CLEAR_BIT(RCC->CIER, RCC_CIER_HSIRDYIE);
Kojto 136:ef9c61f8c49f 2341 }
Kojto 136:ef9c61f8c49f 2342
Kojto 136:ef9c61f8c49f 2343 /**
Kojto 136:ef9c61f8c49f 2344 * @brief Disable HSE ready interrupt
Kojto 136:ef9c61f8c49f 2345 * @rmtoll CIER HSERDYIE LL_RCC_DisableIT_HSERDY
Kojto 136:ef9c61f8c49f 2346 * @retval None
Kojto 136:ef9c61f8c49f 2347 */
Kojto 136:ef9c61f8c49f 2348 __STATIC_INLINE void LL_RCC_DisableIT_HSERDY(void)
Kojto 136:ef9c61f8c49f 2349 {
Kojto 136:ef9c61f8c49f 2350 CLEAR_BIT(RCC->CIER, RCC_CIER_HSERDYIE);
Kojto 136:ef9c61f8c49f 2351 }
Kojto 136:ef9c61f8c49f 2352
Kojto 136:ef9c61f8c49f 2353 /**
Kojto 136:ef9c61f8c49f 2354 * @brief Disable PLL ready interrupt
Kojto 136:ef9c61f8c49f 2355 * @rmtoll CIER PLLRDYIE LL_RCC_DisableIT_PLLRDY
Kojto 136:ef9c61f8c49f 2356 * @retval None
Kojto 136:ef9c61f8c49f 2357 */
Kojto 136:ef9c61f8c49f 2358 __STATIC_INLINE void LL_RCC_DisableIT_PLLRDY(void)
Kojto 136:ef9c61f8c49f 2359 {
Kojto 136:ef9c61f8c49f 2360 CLEAR_BIT(RCC->CIER, RCC_CIER_PLLRDYIE);
Kojto 136:ef9c61f8c49f 2361 }
Kojto 136:ef9c61f8c49f 2362
Kojto 136:ef9c61f8c49f 2363 #if defined(RCC_HSI48_SUPPORT)
Kojto 136:ef9c61f8c49f 2364 /**
Kojto 136:ef9c61f8c49f 2365 * @brief Disable HSI48 ready interrupt
Kojto 136:ef9c61f8c49f 2366 * @rmtoll CIER HSI48RDYIE LL_RCC_DisableIT_HSI48RDY
Kojto 136:ef9c61f8c49f 2367 * @retval None
Kojto 136:ef9c61f8c49f 2368 */
Kojto 136:ef9c61f8c49f 2369 __STATIC_INLINE void LL_RCC_DisableIT_HSI48RDY(void)
Kojto 136:ef9c61f8c49f 2370 {
Kojto 136:ef9c61f8c49f 2371 CLEAR_BIT(RCC->CIER, RCC_CIER_HSI48RDYIE);
Kojto 136:ef9c61f8c49f 2372 }
Kojto 136:ef9c61f8c49f 2373 #endif /* RCC_HSI48_SUPPORT */
Kojto 136:ef9c61f8c49f 2374
Kojto 136:ef9c61f8c49f 2375 /**
Kojto 136:ef9c61f8c49f 2376 * @brief Disable LSE clock security system interrupt
Kojto 136:ef9c61f8c49f 2377 * @rmtoll CIER LSECSSIE LL_RCC_DisableIT_LSECSS
Kojto 136:ef9c61f8c49f 2378 * @retval None
Kojto 136:ef9c61f8c49f 2379 */
Kojto 136:ef9c61f8c49f 2380 __STATIC_INLINE void LL_RCC_DisableIT_LSECSS(void)
Kojto 136:ef9c61f8c49f 2381 {
Kojto 136:ef9c61f8c49f 2382 CLEAR_BIT(RCC->CIER, RCC_CIER_LSECSSIE);
Kojto 136:ef9c61f8c49f 2383 }
Kojto 136:ef9c61f8c49f 2384
Kojto 136:ef9c61f8c49f 2385 /**
Kojto 136:ef9c61f8c49f 2386 * @brief Checks if LSI ready interrupt source is enabled or disabled.
Kojto 136:ef9c61f8c49f 2387 * @rmtoll CIER LSIRDYIE LL_RCC_IsEnabledIT_LSIRDY
Kojto 136:ef9c61f8c49f 2388 * @retval State of bit (1 or 0).
Kojto 136:ef9c61f8c49f 2389 */
Kojto 136:ef9c61f8c49f 2390 __STATIC_INLINE uint32_t LL_RCC_IsEnabledIT_LSIRDY(void)
Kojto 136:ef9c61f8c49f 2391 {
Kojto 136:ef9c61f8c49f 2392 return (READ_BIT(RCC->CIER, RCC_CIER_LSIRDYIE) == (RCC_CIER_LSIRDYIE));
Kojto 136:ef9c61f8c49f 2393 }
Kojto 136:ef9c61f8c49f 2394
Kojto 136:ef9c61f8c49f 2395 /**
Kojto 136:ef9c61f8c49f 2396 * @brief Checks if LSE ready interrupt source is enabled or disabled.
Kojto 136:ef9c61f8c49f 2397 * @rmtoll CIER LSERDYIE LL_RCC_IsEnabledIT_LSERDY
Kojto 136:ef9c61f8c49f 2398 * @retval State of bit (1 or 0).
Kojto 136:ef9c61f8c49f 2399 */
Kojto 136:ef9c61f8c49f 2400 __STATIC_INLINE uint32_t LL_RCC_IsEnabledIT_LSERDY(void)
Kojto 136:ef9c61f8c49f 2401 {
Kojto 136:ef9c61f8c49f 2402 return (READ_BIT(RCC->CIER, RCC_CIER_LSERDYIE) == (RCC_CIER_LSERDYIE));
Kojto 136:ef9c61f8c49f 2403 }
Kojto 136:ef9c61f8c49f 2404
Kojto 136:ef9c61f8c49f 2405 /**
Kojto 136:ef9c61f8c49f 2406 * @brief Checks if MSI ready interrupt source is enabled or disabled.
Kojto 136:ef9c61f8c49f 2407 * @rmtoll CIER MSIRDYIE LL_RCC_IsEnabledIT_MSIRDY
Kojto 136:ef9c61f8c49f 2408 * @retval State of bit (1 or 0).
Kojto 136:ef9c61f8c49f 2409 */
Kojto 136:ef9c61f8c49f 2410 __STATIC_INLINE uint32_t LL_RCC_IsEnabledIT_MSIRDY(void)
Kojto 136:ef9c61f8c49f 2411 {
Kojto 136:ef9c61f8c49f 2412 return (READ_BIT(RCC->CIER, RCC_CIER_MSIRDYIE) == (RCC_CIER_MSIRDYIE));
Kojto 136:ef9c61f8c49f 2413 }
Kojto 136:ef9c61f8c49f 2414
Kojto 136:ef9c61f8c49f 2415 /**
Kojto 136:ef9c61f8c49f 2416 * @brief Checks if HSI ready interrupt source is enabled or disabled.
Kojto 136:ef9c61f8c49f 2417 * @rmtoll CIER HSIRDYIE LL_RCC_IsEnabledIT_HSIRDY
Kojto 136:ef9c61f8c49f 2418 * @retval State of bit (1 or 0).
Kojto 136:ef9c61f8c49f 2419 */
Kojto 136:ef9c61f8c49f 2420 __STATIC_INLINE uint32_t LL_RCC_IsEnabledIT_HSIRDY(void)
Kojto 136:ef9c61f8c49f 2421 {
Kojto 136:ef9c61f8c49f 2422 return (READ_BIT(RCC->CIER, RCC_CIER_HSIRDYIE) == (RCC_CIER_HSIRDYIE));
Kojto 136:ef9c61f8c49f 2423 }
Kojto 136:ef9c61f8c49f 2424
Kojto 136:ef9c61f8c49f 2425 /**
Kojto 136:ef9c61f8c49f 2426 * @brief Checks if HSE ready interrupt source is enabled or disabled.
Kojto 136:ef9c61f8c49f 2427 * @rmtoll CIER HSERDYIE LL_RCC_IsEnabledIT_HSERDY
Kojto 136:ef9c61f8c49f 2428 * @retval State of bit (1 or 0).
Kojto 136:ef9c61f8c49f 2429 */
Kojto 136:ef9c61f8c49f 2430 __STATIC_INLINE uint32_t LL_RCC_IsEnabledIT_HSERDY(void)
Kojto 136:ef9c61f8c49f 2431 {
Kojto 136:ef9c61f8c49f 2432 return (READ_BIT(RCC->CIER, RCC_CIER_HSERDYIE) == (RCC_CIER_HSERDYIE));
Kojto 136:ef9c61f8c49f 2433 }
Kojto 136:ef9c61f8c49f 2434
Kojto 136:ef9c61f8c49f 2435 /**
Kojto 136:ef9c61f8c49f 2436 * @brief Checks if PLL ready interrupt source is enabled or disabled.
Kojto 136:ef9c61f8c49f 2437 * @rmtoll CIER PLLRDYIE LL_RCC_IsEnabledIT_PLLRDY
Kojto 136:ef9c61f8c49f 2438 * @retval State of bit (1 or 0).
Kojto 136:ef9c61f8c49f 2439 */
Kojto 136:ef9c61f8c49f 2440 __STATIC_INLINE uint32_t LL_RCC_IsEnabledIT_PLLRDY(void)
Kojto 136:ef9c61f8c49f 2441 {
Kojto 136:ef9c61f8c49f 2442 return (READ_BIT(RCC->CIER, RCC_CIER_PLLRDYIE) == (RCC_CIER_PLLRDYIE));
Kojto 136:ef9c61f8c49f 2443 }
Kojto 136:ef9c61f8c49f 2444
Kojto 136:ef9c61f8c49f 2445 #if defined(RCC_HSI48_SUPPORT)
Kojto 136:ef9c61f8c49f 2446 /**
Kojto 136:ef9c61f8c49f 2447 * @brief Checks if HSI48 ready interrupt source is enabled or disabled.
Kojto 136:ef9c61f8c49f 2448 * @rmtoll CIER HSI48RDYIE LL_RCC_IsEnabledIT_HSI48RDY
Kojto 136:ef9c61f8c49f 2449 * @retval State of bit (1 or 0).
Kojto 136:ef9c61f8c49f 2450 */
Kojto 136:ef9c61f8c49f 2451 __STATIC_INLINE uint32_t LL_RCC_IsEnabledIT_HSI48RDY(void)
Kojto 136:ef9c61f8c49f 2452 {
Kojto 136:ef9c61f8c49f 2453 return (READ_BIT(RCC->CIER, RCC_CIER_HSI48RDYIE) == (RCC_CIER_HSI48RDYIE));
Kojto 136:ef9c61f8c49f 2454 }
Kojto 136:ef9c61f8c49f 2455 #endif /* RCC_HSI48_SUPPORT */
Kojto 136:ef9c61f8c49f 2456
Kojto 136:ef9c61f8c49f 2457 /**
Kojto 136:ef9c61f8c49f 2458 * @brief Checks if LSECSS interrupt source is enabled or disabled.
Kojto 136:ef9c61f8c49f 2459 * @rmtoll CIER LSECSSIE LL_RCC_IsEnabledIT_LSECSS
Kojto 136:ef9c61f8c49f 2460 * @retval State of bit (1 or 0).
Kojto 136:ef9c61f8c49f 2461 */
Kojto 136:ef9c61f8c49f 2462 __STATIC_INLINE uint32_t LL_RCC_IsEnabledIT_LSECSS(void)
Kojto 136:ef9c61f8c49f 2463 {
Kojto 136:ef9c61f8c49f 2464 return (READ_BIT(RCC->CIER, RCC_CIER_LSECSSIE) == (RCC_CIER_LSECSSIE));
Kojto 136:ef9c61f8c49f 2465 }
Kojto 136:ef9c61f8c49f 2466
Kojto 136:ef9c61f8c49f 2467 /**
Kojto 136:ef9c61f8c49f 2468 * @}
Kojto 136:ef9c61f8c49f 2469 */
Kojto 136:ef9c61f8c49f 2470
Kojto 136:ef9c61f8c49f 2471 #if defined(USE_FULL_LL_DRIVER)
Kojto 136:ef9c61f8c49f 2472 /** @defgroup RCC_LL_EF_Init De-initialization function
Kojto 136:ef9c61f8c49f 2473 * @{
Kojto 136:ef9c61f8c49f 2474 */
Kojto 136:ef9c61f8c49f 2475 ErrorStatus LL_RCC_DeInit(void);
Kojto 136:ef9c61f8c49f 2476 /**
Kojto 136:ef9c61f8c49f 2477 * @}
Kojto 136:ef9c61f8c49f 2478 */
Kojto 136:ef9c61f8c49f 2479
Kojto 136:ef9c61f8c49f 2480 /** @defgroup RCC_LL_EF_Get_Freq Get system and peripherals clocks frequency functions
Kojto 136:ef9c61f8c49f 2481 * @{
Kojto 136:ef9c61f8c49f 2482 */
Kojto 136:ef9c61f8c49f 2483 void LL_RCC_GetSystemClocksFreq(LL_RCC_ClocksTypeDef *RCC_Clocks);
Kojto 136:ef9c61f8c49f 2484 uint32_t LL_RCC_GetUSARTClockFreq(uint32_t USARTxSource);
Kojto 136:ef9c61f8c49f 2485 uint32_t LL_RCC_GetI2CClockFreq(uint32_t I2CxSource);
Kojto 136:ef9c61f8c49f 2486 uint32_t LL_RCC_GetLPUARTClockFreq(uint32_t LPUARTxSource);
Kojto 136:ef9c61f8c49f 2487 uint32_t LL_RCC_GetLPTIMClockFreq(uint32_t LPTIMxSource);
Kojto 136:ef9c61f8c49f 2488 #if defined(USB_OTG_FS) || defined(USB)
Kojto 136:ef9c61f8c49f 2489 uint32_t LL_RCC_GetUSBClockFreq(uint32_t USBxSource);
Kojto 136:ef9c61f8c49f 2490 #endif /* USB_OTG_FS || USB */
Kojto 136:ef9c61f8c49f 2491 /**
Kojto 136:ef9c61f8c49f 2492 * @}
Kojto 136:ef9c61f8c49f 2493 */
Kojto 136:ef9c61f8c49f 2494 #endif /* USE_FULL_LL_DRIVER */
Kojto 136:ef9c61f8c49f 2495
Kojto 136:ef9c61f8c49f 2496 /**
Kojto 136:ef9c61f8c49f 2497 * @}
Kojto 136:ef9c61f8c49f 2498 */
Kojto 136:ef9c61f8c49f 2499
Kojto 136:ef9c61f8c49f 2500 /**
Kojto 136:ef9c61f8c49f 2501 * @}
Kojto 136:ef9c61f8c49f 2502 */
Kojto 136:ef9c61f8c49f 2503
Kojto 136:ef9c61f8c49f 2504 #endif /* RCC */
Kojto 136:ef9c61f8c49f 2505
Kojto 136:ef9c61f8c49f 2506 /**
Kojto 136:ef9c61f8c49f 2507 * @}
Kojto 136:ef9c61f8c49f 2508 */
Kojto 136:ef9c61f8c49f 2509
Kojto 136:ef9c61f8c49f 2510 #ifdef __cplusplus
Kojto 136:ef9c61f8c49f 2511 }
Kojto 136:ef9c61f8c49f 2512 #endif
Kojto 136:ef9c61f8c49f 2513
Kojto 136:ef9c61f8c49f 2514 #endif /* __STM32L0xx_LL_RCC_H */
Kojto 136:ef9c61f8c49f 2515
Kojto 136:ef9c61f8c49f 2516 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/