The official Mbed 2 C/C++ SDK provides the software platform and libraries to build your applications.
Dependents: hello SerialTestv11 SerialTestv12 Sierpinski ... more
mbed 2
This is the mbed 2 library. If you'd like to learn about Mbed OS please see the mbed-os docs.
Diff: TARGET_NUCLEO_F334R8/stm32f3xx_hal_dma.h
- Revision:
- 122:f9eeca106725
- Parent:
- 92:4fc01daae5a5
- Child:
- 123:b0220dba8be7
diff -r 6c34061e7c34 -r f9eeca106725 TARGET_NUCLEO_F334R8/stm32f3xx_hal_dma.h --- a/TARGET_NUCLEO_F334R8/stm32f3xx_hal_dma.h Wed May 25 16:44:06 2016 +0100 +++ b/TARGET_NUCLEO_F334R8/stm32f3xx_hal_dma.h Thu Jul 07 14:34:11 2016 +0100 @@ -2,13 +2,13 @@ ****************************************************************************** * @file stm32f3xx_hal_dma.h * @author MCD Application Team - * @version V1.1.0 - * @date 12-Sept-2014 + * @version V1.2.1 + * @date 29-April-2015 * @brief Header file of DMA HAL module. ****************************************************************************** * @attention * - * <h2><center>© COPYRIGHT(c) 2014 STMicroelectronics</center></h2> + * <h2><center>© COPYRIGHT(c) 2016 STMicroelectronics</center></h2> * * Redistribution and use in source and binary forms, with or without modification, * are permitted provided that the following conditions are met: @@ -50,11 +50,12 @@ * @{ */ -/** @addtogroup DMA DMA HAL module driver +/** @addtogroup DMA * @{ */ /* Exported types ------------------------------------------------------------*/ + /** @defgroup DMA_Exported_Types DMA Exported Types * @{ */ @@ -87,7 +88,6 @@ uint32_t Priority; /*!< Specifies the software priority for the DMAy Channelx. This parameter can be a value of @ref DMA_Priority_level */ - } DMA_InitTypeDef; /** @@ -106,12 +106,11 @@ typedef enum { HAL_DMA_STATE_RESET = 0x00, /*!< DMA not yet initialized or disabled */ - HAL_DMA_STATE_READY = 0x01, /*!< DMA process success and ready for use */ + HAL_DMA_STATE_READY = 0x01, /*!< DMA initialized and ready for use */ HAL_DMA_STATE_READY_HALF = 0x11, /*!< DMA Half process success */ HAL_DMA_STATE_BUSY = 0x02, /*!< DMA process is ongoing */ HAL_DMA_STATE_TIMEOUT = 0x03, /*!< DMA timeout state */ HAL_DMA_STATE_ERROR = 0x04, /*!< DMA error state */ - }HAL_DMA_StateTypeDef; /** @@ -121,16 +120,14 @@ { HAL_DMA_FULL_TRANSFER = 0x00, /*!< Full transfer */ HAL_DMA_HALF_TRANSFER = 0x01, /*!< Half Transfer */ - }HAL_DMA_LevelCompleteTypeDef; - - + /** * @brief DMA handle Structure definition */ typedef struct __DMA_HandleTypeDef { - DMA_Channel_TypeDef *Instance; /*!< Register base address */ + DMA_Channel_TypeDef *Instance; /*!< Register base address */ DMA_InitTypeDef Init; /*!< DMA communication parameters */ @@ -143,62 +140,50 @@ void (* XferCpltCallback)( struct __DMA_HandleTypeDef * hdma); /*!< DMA transfer complete callback */ void (* XferHalfCpltCallback)( struct __DMA_HandleTypeDef * hdma); /*!< DMA Half transfer complete callback */ - + void (* XferErrorCallback)( struct __DMA_HandleTypeDef * hdma); /*!< DMA transfer error callback */ - __IO uint32_t ErrorCode; /*!< DMA Error code */ + void (* XferAbortCallback)( struct __DMA_HandleTypeDef * hdma); /*!< DMA transfer abort callback */ + __IO uint32_t ErrorCode; /*!< DMA Error code */ } DMA_HandleTypeDef; /** * @} */ /* Exported constants --------------------------------------------------------*/ + /** @defgroup DMA_Exported_Constants DMA Exported Constants * @{ */ -/** @defgroup DMA_Error_Code DMA Error Code +/** @defgroup DMA_Error_Code DMA Error Code * @{ */ -#define HAL_DMA_ERROR_NONE ((uint32_t)0x00000000) /*!< No error */ -#define HAL_DMA_ERROR_TE ((uint32_t)0x00000001) /*!< Transfer error */ -#define HAL_DMA_ERROR_TIMEOUT ((uint32_t)0x00000020) /*!< Timeout error */ +#define HAL_DMA_ERROR_NONE ((uint32_t)0x00000000) /*!< No error */ +#define HAL_DMA_ERROR_TE ((uint32_t)0x00000001) /*!< Transfer error */ +#define HAL_DMA_ERROR_NO_XFER ((uint32_t)0x00000004) /*!< no ongoin transfer */ +#define HAL_DMA_ERROR_TIMEOUT ((uint32_t)0x00000020) /*!< Timeout error */ /** * @} */ - -/** @defgroup DMA_Data_transfer_direction DMA Data transfer direction +/** @defgroup DMA_Data_transfer_direction DMA Data transfer direction * @{ */ #define DMA_PERIPH_TO_MEMORY ((uint32_t)0x00000000) /*!< Peripheral to memory direction */ #define DMA_MEMORY_TO_PERIPH ((uint32_t)DMA_CCR_DIR) /*!< Memory to peripheral direction */ -#define DMA_MEMORY_TO_MEMORY ((uint32_t)(DMA_CCR_MEM2MEM)) /*!< Memory to memory direction */ +#define DMA_MEMORY_TO_MEMORY ((uint32_t)DMA_CCR_MEM2MEM) /*!< Memory to memory direction */ -#define IS_DMA_DIRECTION(DIRECTION) (((DIRECTION) == DMA_PERIPH_TO_MEMORY ) || \ - ((DIRECTION) == DMA_MEMORY_TO_PERIPH) || \ - ((DIRECTION) == DMA_MEMORY_TO_MEMORY)) /** * @} */ - -/** @defgroup DMA_Data_buffer_size DMA Data buffer size - * @{ - */ -#define IS_DMA_BUFFER_SIZE(SIZE) (((SIZE) >= 0x1) && ((SIZE) < 0x10000)) -/** - * @} - */ /** @defgroup DMA_Peripheral_incremented_mode DMA Peripheral incremented mode * @{ */ #define DMA_PINC_ENABLE ((uint32_t)DMA_CCR_PINC) /*!< Peripheral increment mode Enable */ #define DMA_PINC_DISABLE ((uint32_t)0x00000000) /*!< Peripheral increment mode Disable */ - -#define IS_DMA_PERIPHERAL_INC_STATE(STATE) (((STATE) == DMA_PINC_ENABLE) || \ - ((STATE) == DMA_PINC_DISABLE)) /** * @} */ @@ -208,9 +193,6 @@ */ #define DMA_MINC_ENABLE ((uint32_t)DMA_CCR_MINC) /*!< Memory increment mode Enable */ #define DMA_MINC_DISABLE ((uint32_t)0x00000000) /*!< Memory increment mode Disable */ - -#define IS_DMA_MEMORY_INC_STATE(STATE) (((STATE) == DMA_MINC_ENABLE) || \ - ((STATE) == DMA_MINC_DISABLE)) /** * @} */ @@ -221,25 +203,16 @@ #define DMA_PDATAALIGN_BYTE ((uint32_t)0x00000000) /*!< Peripheral data alignment : Byte */ #define DMA_PDATAALIGN_HALFWORD ((uint32_t)DMA_CCR_PSIZE_0) /*!< Peripheral data alignment : HalfWord */ #define DMA_PDATAALIGN_WORD ((uint32_t)DMA_CCR_PSIZE_1) /*!< Peripheral data alignment : Word */ - -#define IS_DMA_PERIPHERAL_DATA_SIZE(SIZE) (((SIZE) == DMA_PDATAALIGN_BYTE) || \ - ((SIZE) == DMA_PDATAALIGN_HALFWORD) || \ - ((SIZE) == DMA_PDATAALIGN_WORD)) /** * @} */ - /** @defgroup DMA_Memory_data_size DMA Memory data size * @{ */ #define DMA_MDATAALIGN_BYTE ((uint32_t)0x00000000) /*!< Memory data alignment : Byte */ #define DMA_MDATAALIGN_HALFWORD ((uint32_t)DMA_CCR_MSIZE_0) /*!< Memory data alignment : HalfWord */ #define DMA_MDATAALIGN_WORD ((uint32_t)DMA_CCR_MSIZE_1) /*!< Memory data alignment : Word */ - -#define IS_DMA_MEMORY_DATA_SIZE(SIZE) (((SIZE) == DMA_MDATAALIGN_BYTE) || \ - ((SIZE) == DMA_MDATAALIGN_HALFWORD) || \ - ((SIZE) == DMA_MDATAALIGN_WORD )) /** * @} */ @@ -247,11 +220,8 @@ /** @defgroup DMA_mode DMA mode * @{ */ -#define DMA_NORMAL ((uint32_t)0x00000000) /*!< Normal Mode */ -#define DMA_CIRCULAR ((uint32_t)DMA_CCR_CIRC) /*!< Circular Mode */ - -#define IS_DMA_MODE(MODE) (((MODE) == DMA_NORMAL ) || \ - ((MODE) == DMA_CIRCULAR)) +#define DMA_NORMAL ((uint32_t)0x00000000) /*!< Normal mode */ +#define DMA_CIRCULAR ((uint32_t)DMA_CCR_CIRC) /*!< Circular mode */ /** * @} */ @@ -263,11 +233,6 @@ #define DMA_PRIORITY_MEDIUM ((uint32_t)DMA_CCR_PL_0) /*!< Priority level : Medium */ #define DMA_PRIORITY_HIGH ((uint32_t)DMA_CCR_PL_1) /*!< Priority level : High */ #define DMA_PRIORITY_VERY_HIGH ((uint32_t)DMA_CCR_PL) /*!< Priority level : Very_High */ - -#define IS_DMA_PRIORITY(PRIORITY) (((PRIORITY) == DMA_PRIORITY_LOW ) || \ - ((PRIORITY) == DMA_PRIORITY_MEDIUM) || \ - ((PRIORITY) == DMA_PRIORITY_HIGH) || \ - ((PRIORITY) == DMA_PRIORITY_VERY_HIGH)) /** * @} */ @@ -276,11 +241,9 @@ /** @defgroup DMA_interrupt_enable_definitions DMA interrupt enable definitions * @{ */ - #define DMA_IT_TC ((uint32_t)DMA_CCR_TCIE) #define DMA_IT_HT ((uint32_t)DMA_CCR_HTIE) #define DMA_IT_TE ((uint32_t)DMA_CCR_TEIE) - /** * @} */ @@ -288,7 +251,6 @@ /** @defgroup DMA_flag_definitions DMA flag definitions * @{ */ - #define DMA_FLAG_GL1 ((uint32_t)0x00000001) #define DMA_FLAG_TC1 ((uint32_t)0x00000002) #define DMA_FLAG_HT1 ((uint32_t)0x00000004) @@ -317,8 +279,6 @@ #define DMA_FLAG_TC7 ((uint32_t)0x02000000) #define DMA_FLAG_HT7 ((uint32_t)0x04000000) #define DMA_FLAG_TE7 ((uint32_t)0x08000000) - - /** * @} */ @@ -327,7 +287,8 @@ * @} */ -/* Exported macros -----------------------------------------------------------*/ + +/* Exported macro ------------------------------------------------------------*/ /** @defgroup DMA_Exported_Macros DMA Exported Macros * @{ */ @@ -343,14 +304,14 @@ * @param __HANDLE__: DMA handle * @retval None. */ -#define __HAL_DMA_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CCR |= DMA_CCR_EN) +#define __HAL_DMA_ENABLE(__HANDLE__) (SET_BIT((__HANDLE__)->Instance->CCR, DMA_CCR_EN)) /** * @brief Disable the specified DMA Channel. * @param __HANDLE__: DMA handle * @retval None. */ -#define __HAL_DMA_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CCR &= ~DMA_CCR_EN) +#define __HAL_DMA_DISABLE(__HANDLE__) (CLEAR_BIT((__HANDLE__)->Instance->CCR, DMA_CCR_EN)) /* Interrupt & Flag management */ @@ -365,7 +326,7 @@ * @arg DMA_IT_TE: Transfer error interrupt mask * @retval None */ -#define __HAL_DMA_ENABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CCR |= (__INTERRUPT__)) +#define __HAL_DMA_ENABLE_IT(__HANDLE__, __INTERRUPT__) (SET_BIT((__HANDLE__)->Instance->CCR, (__INTERRUPT__))) /** * @brief Disables the specified DMA Channel interrupts. @@ -377,10 +338,10 @@ * @arg DMA_IT_TE: Transfer error interrupt mask * @retval None */ -#define __HAL_DMA_DISABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CCR &= ~(__INTERRUPT__)) +#define __HAL_DMA_DISABLE_IT(__HANDLE__, __INTERRUPT__) (CLEAR_BIT((__HANDLE__)->Instance->CCR , (__INTERRUPT__))) /** - * @brief Checks whether the specified DMA Channel interrupt has occurred or not. + * @brief Checks whether the specified DMA Channel interrupt is enabled or disabled. * @param __HANDLE__: DMA handle * @param __INTERRUPT__: specifies the DMA interrupt source to check. * This parameter can be one of the following values: @@ -392,6 +353,14 @@ #define __HAL_DMA_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->CCR & (__INTERRUPT__)) == (__INTERRUPT__)) ? SET : RESET) /** + * @brief Returns the number of remaining data units in the current DMAy Channelx transfer. + * @param __HANDLE__: DMA handle + * + * @retval The number of remaining data units in the current DMA Channel transfer. + */ +#define __HAL_DMA_GET_COUNTER(__HANDLE__) ((__HANDLE__)->Instance->CNDTR) + +/** * @} */ @@ -407,9 +376,8 @@ * @{ */ /* Initialization and de-initialization functions *****************************/ -HAL_StatusTypeDef HAL_DMA_Init(DMA_HandleTypeDef *hdma); +HAL_StatusTypeDef HAL_DMA_Init(DMA_HandleTypeDef *hdma); HAL_StatusTypeDef HAL_DMA_DeInit (DMA_HandleTypeDef *hdma); - /** * @} */ @@ -421,9 +389,9 @@ HAL_StatusTypeDef HAL_DMA_Start (DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32_t DataLength); HAL_StatusTypeDef HAL_DMA_Start_IT(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32_t DataLength); HAL_StatusTypeDef HAL_DMA_Abort(DMA_HandleTypeDef *hdma); +HAL_StatusTypeDef HAL_DMA_Abort_IT(DMA_HandleTypeDef *hdma); HAL_StatusTypeDef HAL_DMA_PollForTransfer(DMA_HandleTypeDef *hdma, uint32_t CompleteLevel, uint32_t Timeout); void HAL_DMA_IRQHandler(DMA_HandleTypeDef *hdma); - /** * @} */ @@ -434,7 +402,6 @@ /* Peripheral State and Error functions ***************************************/ HAL_DMA_StateTypeDef HAL_DMA_GetState(DMA_HandleTypeDef *hdma); uint32_t HAL_DMA_GetError(DMA_HandleTypeDef *hdma); - /** * @} */ @@ -442,6 +409,44 @@ /** * @} */ +/* Private macros ------------------------------------------------------------*/ +/** @defgroup DMA_Private_Macros DMA Private Macros + * @brief DMA private macros + * @{ + */ + +#define IS_DMA_BUFFER_SIZE(SIZE) (((SIZE) >= 0x1) && ((SIZE) < 0x10000)) + +#define IS_DMA_DIRECTION(DIRECTION) (((DIRECTION) == DMA_PERIPH_TO_MEMORY ) || \ + ((DIRECTION) == DMA_MEMORY_TO_PERIPH) || \ + ((DIRECTION) == DMA_MEMORY_TO_MEMORY)) + +#define IS_DMA_PERIPHERAL_INC_STATE(STATE) (((STATE) == DMA_PINC_ENABLE) || \ + ((STATE) == DMA_PINC_DISABLE)) + +#define IS_DMA_MEMORY_INC_STATE(STATE) (((STATE) == DMA_MINC_ENABLE) || \ + ((STATE) == DMA_MINC_DISABLE)) + +#define IS_DMA_PERIPHERAL_DATA_SIZE(SIZE) (((SIZE) == DMA_PDATAALIGN_BYTE) || \ + ((SIZE) == DMA_PDATAALIGN_HALFWORD) || \ + ((SIZE) == DMA_PDATAALIGN_WORD)) + +#define IS_DMA_MEMORY_DATA_SIZE(SIZE) (((SIZE) == DMA_MDATAALIGN_BYTE) || \ + ((SIZE) == DMA_MDATAALIGN_HALFWORD) || \ + ((SIZE) == DMA_MDATAALIGN_WORD )) + +#define IS_DMA_MODE(MODE) (((MODE) == DMA_NORMAL ) || \ + ((MODE) == DMA_CIRCULAR)) + +#define IS_DMA_PRIORITY(PRIORITY) (((PRIORITY) == DMA_PRIORITY_LOW ) || \ + ((PRIORITY) == DMA_PRIORITY_MEDIUM) || \ + ((PRIORITY) == DMA_PRIORITY_HIGH) || \ + ((PRIORITY) == DMA_PRIORITY_VERY_HIGH)) + +/** + * @} + */ + /** * @}