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TARGET_NUCLEO_L432KC/TARGET_STM/TARGET_STM32L4/device/stm32l4xx_ll_pwr.h@156:ff21514d8981, 2017-11-08 (annotated)
- Committer:
- AnnaBridge
- Date:
- Wed Nov 08 17:18:06 2017 +0000
- Revision:
- 156:ff21514d8981
- Child:
- 161:aa5281ff4a02
Reverting back to release 154 of the mbed library
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
AnnaBridge | 156:ff21514d8981 | 1 | /** |
AnnaBridge | 156:ff21514d8981 | 2 | ****************************************************************************** |
AnnaBridge | 156:ff21514d8981 | 3 | * @file stm32l4xx_ll_pwr.h |
AnnaBridge | 156:ff21514d8981 | 4 | * @author MCD Application Team |
AnnaBridge | 156:ff21514d8981 | 5 | * @version V1.7.1 |
AnnaBridge | 156:ff21514d8981 | 6 | * @date 21-April-2017 |
AnnaBridge | 156:ff21514d8981 | 7 | * @brief Header file of PWR LL module. |
AnnaBridge | 156:ff21514d8981 | 8 | ****************************************************************************** |
AnnaBridge | 156:ff21514d8981 | 9 | * @attention |
AnnaBridge | 156:ff21514d8981 | 10 | * |
AnnaBridge | 156:ff21514d8981 | 11 | * <h2><center>© COPYRIGHT(c) 2017 STMicroelectronics</center></h2> |
AnnaBridge | 156:ff21514d8981 | 12 | * |
AnnaBridge | 156:ff21514d8981 | 13 | * Redistribution and use in source and binary forms, with or without modification, |
AnnaBridge | 156:ff21514d8981 | 14 | * are permitted provided that the following conditions are met: |
AnnaBridge | 156:ff21514d8981 | 15 | * 1. Redistributions of source code must retain the above copyright notice, |
AnnaBridge | 156:ff21514d8981 | 16 | * this list of conditions and the following disclaimer. |
AnnaBridge | 156:ff21514d8981 | 17 | * 2. Redistributions in binary form must reproduce the above copyright notice, |
AnnaBridge | 156:ff21514d8981 | 18 | * this list of conditions and the following disclaimer in the documentation |
AnnaBridge | 156:ff21514d8981 | 19 | * and/or other materials provided with the distribution. |
AnnaBridge | 156:ff21514d8981 | 20 | * 3. Neither the name of STMicroelectronics nor the names of its contributors |
AnnaBridge | 156:ff21514d8981 | 21 | * may be used to endorse or promote products derived from this software |
AnnaBridge | 156:ff21514d8981 | 22 | * without specific prior written permission. |
AnnaBridge | 156:ff21514d8981 | 23 | * |
AnnaBridge | 156:ff21514d8981 | 24 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
AnnaBridge | 156:ff21514d8981 | 25 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
AnnaBridge | 156:ff21514d8981 | 26 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
AnnaBridge | 156:ff21514d8981 | 27 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
AnnaBridge | 156:ff21514d8981 | 28 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
AnnaBridge | 156:ff21514d8981 | 29 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
AnnaBridge | 156:ff21514d8981 | 30 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
AnnaBridge | 156:ff21514d8981 | 31 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
AnnaBridge | 156:ff21514d8981 | 32 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
AnnaBridge | 156:ff21514d8981 | 33 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
AnnaBridge | 156:ff21514d8981 | 34 | * |
AnnaBridge | 156:ff21514d8981 | 35 | ****************************************************************************** |
AnnaBridge | 156:ff21514d8981 | 36 | */ |
AnnaBridge | 156:ff21514d8981 | 37 | |
AnnaBridge | 156:ff21514d8981 | 38 | /* Define to prevent recursive inclusion -------------------------------------*/ |
AnnaBridge | 156:ff21514d8981 | 39 | #ifndef __STM32L4xx_LL_PWR_H |
AnnaBridge | 156:ff21514d8981 | 40 | #define __STM32L4xx_LL_PWR_H |
AnnaBridge | 156:ff21514d8981 | 41 | |
AnnaBridge | 156:ff21514d8981 | 42 | #ifdef __cplusplus |
AnnaBridge | 156:ff21514d8981 | 43 | extern "C" { |
AnnaBridge | 156:ff21514d8981 | 44 | #endif |
AnnaBridge | 156:ff21514d8981 | 45 | |
AnnaBridge | 156:ff21514d8981 | 46 | /* Includes ------------------------------------------------------------------*/ |
AnnaBridge | 156:ff21514d8981 | 47 | #include "stm32l4xx.h" |
AnnaBridge | 156:ff21514d8981 | 48 | |
AnnaBridge | 156:ff21514d8981 | 49 | /** @addtogroup STM32L4xx_LL_Driver |
AnnaBridge | 156:ff21514d8981 | 50 | * @{ |
AnnaBridge | 156:ff21514d8981 | 51 | */ |
AnnaBridge | 156:ff21514d8981 | 52 | |
AnnaBridge | 156:ff21514d8981 | 53 | #if defined(PWR) |
AnnaBridge | 156:ff21514d8981 | 54 | |
AnnaBridge | 156:ff21514d8981 | 55 | /** @defgroup PWR_LL PWR |
AnnaBridge | 156:ff21514d8981 | 56 | * @{ |
AnnaBridge | 156:ff21514d8981 | 57 | */ |
AnnaBridge | 156:ff21514d8981 | 58 | |
AnnaBridge | 156:ff21514d8981 | 59 | /* Private types -------------------------------------------------------------*/ |
AnnaBridge | 156:ff21514d8981 | 60 | /* Private variables ---------------------------------------------------------*/ |
AnnaBridge | 156:ff21514d8981 | 61 | |
AnnaBridge | 156:ff21514d8981 | 62 | /* Private constants ---------------------------------------------------------*/ |
AnnaBridge | 156:ff21514d8981 | 63 | |
AnnaBridge | 156:ff21514d8981 | 64 | /* Private macros ------------------------------------------------------------*/ |
AnnaBridge | 156:ff21514d8981 | 65 | |
AnnaBridge | 156:ff21514d8981 | 66 | /* Exported types ------------------------------------------------------------*/ |
AnnaBridge | 156:ff21514d8981 | 67 | /* Exported constants --------------------------------------------------------*/ |
AnnaBridge | 156:ff21514d8981 | 68 | /** @defgroup PWR_LL_Exported_Constants PWR Exported Constants |
AnnaBridge | 156:ff21514d8981 | 69 | * @{ |
AnnaBridge | 156:ff21514d8981 | 70 | */ |
AnnaBridge | 156:ff21514d8981 | 71 | |
AnnaBridge | 156:ff21514d8981 | 72 | /** @defgroup PWR_LL_EC_CLEAR_FLAG Clear Flags Defines |
AnnaBridge | 156:ff21514d8981 | 73 | * @brief Flags defines which can be used with LL_PWR_WriteReg function |
AnnaBridge | 156:ff21514d8981 | 74 | * @{ |
AnnaBridge | 156:ff21514d8981 | 75 | */ |
AnnaBridge | 156:ff21514d8981 | 76 | #define LL_PWR_SCR_CSBF PWR_SCR_CSBF |
AnnaBridge | 156:ff21514d8981 | 77 | #define LL_PWR_SCR_CWUF PWR_SCR_CWUF |
AnnaBridge | 156:ff21514d8981 | 78 | #define LL_PWR_SCR_CWUF5 PWR_SCR_CWUF5 |
AnnaBridge | 156:ff21514d8981 | 79 | #define LL_PWR_SCR_CWUF4 PWR_SCR_CWUF4 |
AnnaBridge | 156:ff21514d8981 | 80 | #define LL_PWR_SCR_CWUF3 PWR_SCR_CWUF3 |
AnnaBridge | 156:ff21514d8981 | 81 | #define LL_PWR_SCR_CWUF2 PWR_SCR_CWUF2 |
AnnaBridge | 156:ff21514d8981 | 82 | #define LL_PWR_SCR_CWUF1 PWR_SCR_CWUF1 |
AnnaBridge | 156:ff21514d8981 | 83 | /** |
AnnaBridge | 156:ff21514d8981 | 84 | * @} |
AnnaBridge | 156:ff21514d8981 | 85 | */ |
AnnaBridge | 156:ff21514d8981 | 86 | |
AnnaBridge | 156:ff21514d8981 | 87 | /** @defgroup PWR_LL_EC_GET_FLAG Get Flags Defines |
AnnaBridge | 156:ff21514d8981 | 88 | * @brief Flags defines which can be used with LL_PWR_ReadReg function |
AnnaBridge | 156:ff21514d8981 | 89 | * @{ |
AnnaBridge | 156:ff21514d8981 | 90 | */ |
AnnaBridge | 156:ff21514d8981 | 91 | #define LL_PWR_SR1_WUFI PWR_SR1_WUFI |
AnnaBridge | 156:ff21514d8981 | 92 | #define LL_PWR_SR1_SBF PWR_SR1_SBF |
AnnaBridge | 156:ff21514d8981 | 93 | #define LL_PWR_SR1_WUF5 PWR_SR1_WUF5 |
AnnaBridge | 156:ff21514d8981 | 94 | #define LL_PWR_SR1_WUF4 PWR_SR1_WUF4 |
AnnaBridge | 156:ff21514d8981 | 95 | #define LL_PWR_SR1_WUF3 PWR_SR1_WUF3 |
AnnaBridge | 156:ff21514d8981 | 96 | #define LL_PWR_SR1_WUF2 PWR_SR1_WUF2 |
AnnaBridge | 156:ff21514d8981 | 97 | #define LL_PWR_SR1_WUF1 PWR_SR1_WUF1 |
AnnaBridge | 156:ff21514d8981 | 98 | #if defined(PWR_SR2_PVMO4) |
AnnaBridge | 156:ff21514d8981 | 99 | #define LL_PWR_SR2_PVMO4 PWR_SR2_PVMO4 |
AnnaBridge | 156:ff21514d8981 | 100 | #endif /* PWR_SR2_PVMO4 */ |
AnnaBridge | 156:ff21514d8981 | 101 | #if defined(PWR_SR2_PVMO3) |
AnnaBridge | 156:ff21514d8981 | 102 | #define LL_PWR_SR2_PVMO3 PWR_SR2_PVMO3 |
AnnaBridge | 156:ff21514d8981 | 103 | #endif /* PWR_SR2_PVMO3 */ |
AnnaBridge | 156:ff21514d8981 | 104 | #if defined(PWR_SR2_PVMO2) |
AnnaBridge | 156:ff21514d8981 | 105 | #define LL_PWR_SR2_PVMO2 PWR_SR2_PVMO2 |
AnnaBridge | 156:ff21514d8981 | 106 | #endif /* PWR_SR2_PVMO2 */ |
AnnaBridge | 156:ff21514d8981 | 107 | #if defined(PWR_SR2_PVMO1) |
AnnaBridge | 156:ff21514d8981 | 108 | #define LL_PWR_SR2_PVMO1 PWR_SR2_PVMO1 |
AnnaBridge | 156:ff21514d8981 | 109 | #endif /* PWR_SR2_PVMO1 */ |
AnnaBridge | 156:ff21514d8981 | 110 | #define LL_PWR_SR2_PVDO PWR_SR2_PVDO |
AnnaBridge | 156:ff21514d8981 | 111 | #define LL_PWR_SR2_VOSF PWR_SR2_VOSF |
AnnaBridge | 156:ff21514d8981 | 112 | #define LL_PWR_SR2_REGLPF PWR_SR2_REGLPF |
AnnaBridge | 156:ff21514d8981 | 113 | #define LL_PWR_SR2_REGLPS PWR_SR2_REGLPS |
AnnaBridge | 156:ff21514d8981 | 114 | /** |
AnnaBridge | 156:ff21514d8981 | 115 | * @} |
AnnaBridge | 156:ff21514d8981 | 116 | */ |
AnnaBridge | 156:ff21514d8981 | 117 | |
AnnaBridge | 156:ff21514d8981 | 118 | /** @defgroup PWR_LL_EC_REGU_VOLTAGE REGU VOLTAGE |
AnnaBridge | 156:ff21514d8981 | 119 | * @{ |
AnnaBridge | 156:ff21514d8981 | 120 | */ |
AnnaBridge | 156:ff21514d8981 | 121 | #define LL_PWR_REGU_VOLTAGE_SCALE1 (PWR_CR1_VOS_0) |
AnnaBridge | 156:ff21514d8981 | 122 | #define LL_PWR_REGU_VOLTAGE_SCALE2 (PWR_CR1_VOS_1) |
AnnaBridge | 156:ff21514d8981 | 123 | /** |
AnnaBridge | 156:ff21514d8981 | 124 | * @} |
AnnaBridge | 156:ff21514d8981 | 125 | */ |
AnnaBridge | 156:ff21514d8981 | 126 | |
AnnaBridge | 156:ff21514d8981 | 127 | /** @defgroup PWR_LL_EC_MODE_PWR MODE PWR |
AnnaBridge | 156:ff21514d8981 | 128 | * @{ |
AnnaBridge | 156:ff21514d8981 | 129 | */ |
AnnaBridge | 156:ff21514d8981 | 130 | #define LL_PWR_MODE_STOP0 (PWR_CR1_LPMS_STOP0) |
AnnaBridge | 156:ff21514d8981 | 131 | #define LL_PWR_MODE_STOP1 (PWR_CR1_LPMS_STOP1) |
AnnaBridge | 156:ff21514d8981 | 132 | #define LL_PWR_MODE_STOP2 (PWR_CR1_LPMS_STOP2) |
AnnaBridge | 156:ff21514d8981 | 133 | #define LL_PWR_MODE_STANDBY (PWR_CR1_LPMS_STANDBY) |
AnnaBridge | 156:ff21514d8981 | 134 | #define LL_PWR_MODE_SHUTDOWN (PWR_CR1_LPMS_SHUTDOWN) |
AnnaBridge | 156:ff21514d8981 | 135 | /** |
AnnaBridge | 156:ff21514d8981 | 136 | * @} |
AnnaBridge | 156:ff21514d8981 | 137 | */ |
AnnaBridge | 156:ff21514d8981 | 138 | |
AnnaBridge | 156:ff21514d8981 | 139 | /** @defgroup PWR_LL_EC_PVM_VDDUSB_1 Peripheral voltage monitoring |
AnnaBridge | 156:ff21514d8981 | 140 | * @{ |
AnnaBridge | 156:ff21514d8981 | 141 | */ |
AnnaBridge | 156:ff21514d8981 | 142 | #if defined(PWR_CR2_PVME1) |
AnnaBridge | 156:ff21514d8981 | 143 | #define LL_PWR_PVM_VDDUSB_1_2V (PWR_CR2_PVME1) /* Monitoring VDDUSB vs. 1.2V */ |
AnnaBridge | 156:ff21514d8981 | 144 | #endif |
AnnaBridge | 156:ff21514d8981 | 145 | #if defined(PWR_CR2_PVME2) |
AnnaBridge | 156:ff21514d8981 | 146 | #define LL_PWR_PVM_VDDIO2_0_9V (PWR_CR2_PVME2) /* Monitoring VDDIO2 vs. 0.9V */ |
AnnaBridge | 156:ff21514d8981 | 147 | #endif |
AnnaBridge | 156:ff21514d8981 | 148 | #if defined(PWR_CR2_PVME3) |
AnnaBridge | 156:ff21514d8981 | 149 | #define LL_PWR_PVM_VDDA_1_62V (PWR_CR2_PVME3) /* Monitoring VDDA vs. 1.62V */ |
AnnaBridge | 156:ff21514d8981 | 150 | #endif |
AnnaBridge | 156:ff21514d8981 | 151 | #if defined(PWR_CR2_PVME4) |
AnnaBridge | 156:ff21514d8981 | 152 | #define LL_PWR_PVM_VDDA_2_2V (PWR_CR2_PVME4) /* Monitoring VDDA vs. 2.2V */ |
AnnaBridge | 156:ff21514d8981 | 153 | #endif |
AnnaBridge | 156:ff21514d8981 | 154 | /** |
AnnaBridge | 156:ff21514d8981 | 155 | * @} |
AnnaBridge | 156:ff21514d8981 | 156 | */ |
AnnaBridge | 156:ff21514d8981 | 157 | |
AnnaBridge | 156:ff21514d8981 | 158 | /** @defgroup PWR_LL_EC_PVDLEVEL PVDLEVEL |
AnnaBridge | 156:ff21514d8981 | 159 | * @{ |
AnnaBridge | 156:ff21514d8981 | 160 | */ |
AnnaBridge | 156:ff21514d8981 | 161 | #define LL_PWR_PVDLEVEL_0 (PWR_CR2_PLS_LEV0) /* VPVD0 around 2.0 V */ |
AnnaBridge | 156:ff21514d8981 | 162 | #define LL_PWR_PVDLEVEL_1 (PWR_CR2_PLS_LEV1) /* VPVD1 around 2.2 V */ |
AnnaBridge | 156:ff21514d8981 | 163 | #define LL_PWR_PVDLEVEL_2 (PWR_CR2_PLS_LEV2) /* VPVD2 around 2.4 V */ |
AnnaBridge | 156:ff21514d8981 | 164 | #define LL_PWR_PVDLEVEL_3 (PWR_CR2_PLS_LEV3) /* VPVD3 around 2.5 V */ |
AnnaBridge | 156:ff21514d8981 | 165 | #define LL_PWR_PVDLEVEL_4 (PWR_CR2_PLS_LEV4) /* VPVD4 around 2.6 V */ |
AnnaBridge | 156:ff21514d8981 | 166 | #define LL_PWR_PVDLEVEL_5 (PWR_CR2_PLS_LEV5) /* VPVD5 around 2.8 V */ |
AnnaBridge | 156:ff21514d8981 | 167 | #define LL_PWR_PVDLEVEL_6 (PWR_CR2_PLS_LEV6) /* VPVD6 around 2.9 V */ |
AnnaBridge | 156:ff21514d8981 | 168 | #define LL_PWR_PVDLEVEL_7 (PWR_CR2_PLS_LEV7) /* External input analog voltage (Compare internally to VREFINT) */ |
AnnaBridge | 156:ff21514d8981 | 169 | /** |
AnnaBridge | 156:ff21514d8981 | 170 | * @} |
AnnaBridge | 156:ff21514d8981 | 171 | */ |
AnnaBridge | 156:ff21514d8981 | 172 | |
AnnaBridge | 156:ff21514d8981 | 173 | /** @defgroup PWR_LL_EC_WAKEUP WAKEUP |
AnnaBridge | 156:ff21514d8981 | 174 | * @{ |
AnnaBridge | 156:ff21514d8981 | 175 | */ |
AnnaBridge | 156:ff21514d8981 | 176 | #define LL_PWR_WAKEUP_PIN1 (PWR_CR3_EWUP1) |
AnnaBridge | 156:ff21514d8981 | 177 | #define LL_PWR_WAKEUP_PIN2 (PWR_CR3_EWUP2) |
AnnaBridge | 156:ff21514d8981 | 178 | #define LL_PWR_WAKEUP_PIN3 (PWR_CR3_EWUP3) |
AnnaBridge | 156:ff21514d8981 | 179 | #define LL_PWR_WAKEUP_PIN4 (PWR_CR3_EWUP4) |
AnnaBridge | 156:ff21514d8981 | 180 | #define LL_PWR_WAKEUP_PIN5 (PWR_CR3_EWUP5) |
AnnaBridge | 156:ff21514d8981 | 181 | /** |
AnnaBridge | 156:ff21514d8981 | 182 | * @} |
AnnaBridge | 156:ff21514d8981 | 183 | */ |
AnnaBridge | 156:ff21514d8981 | 184 | |
AnnaBridge | 156:ff21514d8981 | 185 | /** @defgroup PWR_LL_EC_BATT_CHARG_RESISTOR BATT CHARG RESISTOR |
AnnaBridge | 156:ff21514d8981 | 186 | * @{ |
AnnaBridge | 156:ff21514d8981 | 187 | */ |
AnnaBridge | 156:ff21514d8981 | 188 | #define LL_PWR_BATT_CHARG_RESISTOR_5K ((uint32_t)0x00000000) |
AnnaBridge | 156:ff21514d8981 | 189 | #define LL_PWR_BATT_CHARGRESISTOR_1_5K (PWR_CR4_VBRS) |
AnnaBridge | 156:ff21514d8981 | 190 | /** |
AnnaBridge | 156:ff21514d8981 | 191 | * @} |
AnnaBridge | 156:ff21514d8981 | 192 | */ |
AnnaBridge | 156:ff21514d8981 | 193 | |
AnnaBridge | 156:ff21514d8981 | 194 | /** @defgroup PWR_LL_EC_GPIO GPIO |
AnnaBridge | 156:ff21514d8981 | 195 | * @{ |
AnnaBridge | 156:ff21514d8981 | 196 | */ |
AnnaBridge | 156:ff21514d8981 | 197 | #define LL_PWR_GPIO_A ((uint32_t)(&(PWR->PUCRA))) |
AnnaBridge | 156:ff21514d8981 | 198 | #define LL_PWR_GPIO_B ((uint32_t)(&(PWR->PUCRB))) |
AnnaBridge | 156:ff21514d8981 | 199 | #define LL_PWR_GPIO_C ((uint32_t)(&(PWR->PUCRC))) |
AnnaBridge | 156:ff21514d8981 | 200 | #define LL_PWR_GPIO_D ((uint32_t)(&(PWR->PUCRD))) |
AnnaBridge | 156:ff21514d8981 | 201 | #define LL_PWR_GPIO_E ((uint32_t)(&(PWR->PUCRE))) |
AnnaBridge | 156:ff21514d8981 | 202 | #if defined(GPIOF) |
AnnaBridge | 156:ff21514d8981 | 203 | #define LL_PWR_GPIO_F ((uint32_t)(&(PWR->PUCRF))) |
AnnaBridge | 156:ff21514d8981 | 204 | #endif |
AnnaBridge | 156:ff21514d8981 | 205 | #if defined(GPIOG) |
AnnaBridge | 156:ff21514d8981 | 206 | #define LL_PWR_GPIO_G ((uint32_t)(&(PWR->PUCRG))) |
AnnaBridge | 156:ff21514d8981 | 207 | #endif |
AnnaBridge | 156:ff21514d8981 | 208 | #if defined(GPIOH) |
AnnaBridge | 156:ff21514d8981 | 209 | #define LL_PWR_GPIO_H ((uint32_t)(&(PWR->PUCRH))) |
AnnaBridge | 156:ff21514d8981 | 210 | #endif |
AnnaBridge | 156:ff21514d8981 | 211 | #if defined(GPIOI) |
AnnaBridge | 156:ff21514d8981 | 212 | #define LL_PWR_GPIO_I ((uint32_t)(&(PWR->PUCRI))) |
AnnaBridge | 156:ff21514d8981 | 213 | #endif |
AnnaBridge | 156:ff21514d8981 | 214 | /** |
AnnaBridge | 156:ff21514d8981 | 215 | * @} |
AnnaBridge | 156:ff21514d8981 | 216 | */ |
AnnaBridge | 156:ff21514d8981 | 217 | |
AnnaBridge | 156:ff21514d8981 | 218 | /** @defgroup PWR_LL_EC_GPIO_BIT GPIO BIT |
AnnaBridge | 156:ff21514d8981 | 219 | * @{ |
AnnaBridge | 156:ff21514d8981 | 220 | */ |
AnnaBridge | 156:ff21514d8981 | 221 | #define LL_PWR_GPIO_BIT_0 ((uint32_t)0x00000001) |
AnnaBridge | 156:ff21514d8981 | 222 | #define LL_PWR_GPIO_BIT_1 ((uint32_t)0x00000002) |
AnnaBridge | 156:ff21514d8981 | 223 | #define LL_PWR_GPIO_BIT_2 ((uint32_t)0x00000004) |
AnnaBridge | 156:ff21514d8981 | 224 | #define LL_PWR_GPIO_BIT_3 ((uint32_t)0x00000008) |
AnnaBridge | 156:ff21514d8981 | 225 | #define LL_PWR_GPIO_BIT_4 ((uint32_t)0x00000010) |
AnnaBridge | 156:ff21514d8981 | 226 | #define LL_PWR_GPIO_BIT_5 ((uint32_t)0x00000020) |
AnnaBridge | 156:ff21514d8981 | 227 | #define LL_PWR_GPIO_BIT_6 ((uint32_t)0x00000040) |
AnnaBridge | 156:ff21514d8981 | 228 | #define LL_PWR_GPIO_BIT_7 ((uint32_t)0x00000080) |
AnnaBridge | 156:ff21514d8981 | 229 | #define LL_PWR_GPIO_BIT_8 ((uint32_t)0x00000100) |
AnnaBridge | 156:ff21514d8981 | 230 | #define LL_PWR_GPIO_BIT_9 ((uint32_t)0x00000200) |
AnnaBridge | 156:ff21514d8981 | 231 | #define LL_PWR_GPIO_BIT_10 ((uint32_t)0x00000400) |
AnnaBridge | 156:ff21514d8981 | 232 | #define LL_PWR_GPIO_BIT_11 ((uint32_t)0x00000800) |
AnnaBridge | 156:ff21514d8981 | 233 | #define LL_PWR_GPIO_BIT_12 ((uint32_t)0x00001000) |
AnnaBridge | 156:ff21514d8981 | 234 | #define LL_PWR_GPIO_BIT_13 ((uint32_t)0x00002000) |
AnnaBridge | 156:ff21514d8981 | 235 | #define LL_PWR_GPIO_BIT_14 ((uint32_t)0x00004000) |
AnnaBridge | 156:ff21514d8981 | 236 | #define LL_PWR_GPIO_BIT_15 ((uint32_t)0x00008000) |
AnnaBridge | 156:ff21514d8981 | 237 | /** |
AnnaBridge | 156:ff21514d8981 | 238 | * @} |
AnnaBridge | 156:ff21514d8981 | 239 | */ |
AnnaBridge | 156:ff21514d8981 | 240 | |
AnnaBridge | 156:ff21514d8981 | 241 | /** |
AnnaBridge | 156:ff21514d8981 | 242 | * @} |
AnnaBridge | 156:ff21514d8981 | 243 | */ |
AnnaBridge | 156:ff21514d8981 | 244 | |
AnnaBridge | 156:ff21514d8981 | 245 | /* Exported macro ------------------------------------------------------------*/ |
AnnaBridge | 156:ff21514d8981 | 246 | /** @defgroup PWR_LL_Exported_Macros PWR Exported Macros |
AnnaBridge | 156:ff21514d8981 | 247 | * @{ |
AnnaBridge | 156:ff21514d8981 | 248 | */ |
AnnaBridge | 156:ff21514d8981 | 249 | |
AnnaBridge | 156:ff21514d8981 | 250 | /** @defgroup PWR_LL_EM_WRITE_READ Common Write and read registers Macros |
AnnaBridge | 156:ff21514d8981 | 251 | * @{ |
AnnaBridge | 156:ff21514d8981 | 252 | */ |
AnnaBridge | 156:ff21514d8981 | 253 | |
AnnaBridge | 156:ff21514d8981 | 254 | /** |
AnnaBridge | 156:ff21514d8981 | 255 | * @brief Write a value in PWR register |
AnnaBridge | 156:ff21514d8981 | 256 | * @param __REG__ Register to be written |
AnnaBridge | 156:ff21514d8981 | 257 | * @param __VALUE__ Value to be written in the register |
AnnaBridge | 156:ff21514d8981 | 258 | * @retval None |
AnnaBridge | 156:ff21514d8981 | 259 | */ |
AnnaBridge | 156:ff21514d8981 | 260 | #define LL_PWR_WriteReg(__REG__, __VALUE__) WRITE_REG(PWR->__REG__, (__VALUE__)) |
AnnaBridge | 156:ff21514d8981 | 261 | |
AnnaBridge | 156:ff21514d8981 | 262 | /** |
AnnaBridge | 156:ff21514d8981 | 263 | * @brief Read a value in PWR register |
AnnaBridge | 156:ff21514d8981 | 264 | * @param __REG__ Register to be read |
AnnaBridge | 156:ff21514d8981 | 265 | * @retval Register value |
AnnaBridge | 156:ff21514d8981 | 266 | */ |
AnnaBridge | 156:ff21514d8981 | 267 | #define LL_PWR_ReadReg(__REG__) READ_REG(PWR->__REG__) |
AnnaBridge | 156:ff21514d8981 | 268 | /** |
AnnaBridge | 156:ff21514d8981 | 269 | * @} |
AnnaBridge | 156:ff21514d8981 | 270 | */ |
AnnaBridge | 156:ff21514d8981 | 271 | |
AnnaBridge | 156:ff21514d8981 | 272 | /** |
AnnaBridge | 156:ff21514d8981 | 273 | * @} |
AnnaBridge | 156:ff21514d8981 | 274 | */ |
AnnaBridge | 156:ff21514d8981 | 275 | |
AnnaBridge | 156:ff21514d8981 | 276 | |
AnnaBridge | 156:ff21514d8981 | 277 | /* Exported functions --------------------------------------------------------*/ |
AnnaBridge | 156:ff21514d8981 | 278 | /** @defgroup PWR_LL_Exported_Functions PWR Exported Functions |
AnnaBridge | 156:ff21514d8981 | 279 | * @{ |
AnnaBridge | 156:ff21514d8981 | 280 | */ |
AnnaBridge | 156:ff21514d8981 | 281 | |
AnnaBridge | 156:ff21514d8981 | 282 | /** @defgroup PWR_LL_EF_Configuration Configuration |
AnnaBridge | 156:ff21514d8981 | 283 | * @{ |
AnnaBridge | 156:ff21514d8981 | 284 | */ |
AnnaBridge | 156:ff21514d8981 | 285 | |
AnnaBridge | 156:ff21514d8981 | 286 | /** |
AnnaBridge | 156:ff21514d8981 | 287 | * @brief Switch the regulator from main mode to low-power mode |
AnnaBridge | 156:ff21514d8981 | 288 | * @rmtoll CR1 LPR LL_PWR_EnableLowPowerRunMode |
AnnaBridge | 156:ff21514d8981 | 289 | * @retval None |
AnnaBridge | 156:ff21514d8981 | 290 | */ |
AnnaBridge | 156:ff21514d8981 | 291 | __STATIC_INLINE void LL_PWR_EnableLowPowerRunMode(void) |
AnnaBridge | 156:ff21514d8981 | 292 | { |
AnnaBridge | 156:ff21514d8981 | 293 | SET_BIT(PWR->CR1, PWR_CR1_LPR); |
AnnaBridge | 156:ff21514d8981 | 294 | } |
AnnaBridge | 156:ff21514d8981 | 295 | |
AnnaBridge | 156:ff21514d8981 | 296 | /** |
AnnaBridge | 156:ff21514d8981 | 297 | * @brief Switch the regulator from low-power mode to main mode |
AnnaBridge | 156:ff21514d8981 | 298 | * @rmtoll CR1 LPR LL_PWR_DisableLowPowerRunMode |
AnnaBridge | 156:ff21514d8981 | 299 | * @retval None |
AnnaBridge | 156:ff21514d8981 | 300 | */ |
AnnaBridge | 156:ff21514d8981 | 301 | __STATIC_INLINE void LL_PWR_DisableLowPowerRunMode(void) |
AnnaBridge | 156:ff21514d8981 | 302 | { |
AnnaBridge | 156:ff21514d8981 | 303 | CLEAR_BIT(PWR->CR1, PWR_CR1_LPR); |
AnnaBridge | 156:ff21514d8981 | 304 | } |
AnnaBridge | 156:ff21514d8981 | 305 | |
AnnaBridge | 156:ff21514d8981 | 306 | /** |
AnnaBridge | 156:ff21514d8981 | 307 | * @brief Check if the regulator is in low-power mode |
AnnaBridge | 156:ff21514d8981 | 308 | * @rmtoll CR1 LPR LL_PWR_IsEnabledLowPowerRunMode |
AnnaBridge | 156:ff21514d8981 | 309 | * @retval State of bit (1 or 0). |
AnnaBridge | 156:ff21514d8981 | 310 | */ |
AnnaBridge | 156:ff21514d8981 | 311 | __STATIC_INLINE uint32_t LL_PWR_IsEnabledLowPowerRunMode(void) |
AnnaBridge | 156:ff21514d8981 | 312 | { |
AnnaBridge | 156:ff21514d8981 | 313 | return (READ_BIT(PWR->CR1, PWR_CR1_LPR) == (PWR_CR1_LPR)); |
AnnaBridge | 156:ff21514d8981 | 314 | } |
AnnaBridge | 156:ff21514d8981 | 315 | |
AnnaBridge | 156:ff21514d8981 | 316 | /** |
AnnaBridge | 156:ff21514d8981 | 317 | * @brief Switch from run main mode to run low-power mode. |
AnnaBridge | 156:ff21514d8981 | 318 | * @rmtoll CR1 LPR LL_PWR_EnterLowPowerRunMode |
AnnaBridge | 156:ff21514d8981 | 319 | * @retval None |
AnnaBridge | 156:ff21514d8981 | 320 | */ |
AnnaBridge | 156:ff21514d8981 | 321 | __STATIC_INLINE void LL_PWR_EnterLowPowerRunMode(void) |
AnnaBridge | 156:ff21514d8981 | 322 | { |
AnnaBridge | 156:ff21514d8981 | 323 | LL_PWR_EnableLowPowerRunMode(); |
AnnaBridge | 156:ff21514d8981 | 324 | } |
AnnaBridge | 156:ff21514d8981 | 325 | |
AnnaBridge | 156:ff21514d8981 | 326 | /** |
AnnaBridge | 156:ff21514d8981 | 327 | * @brief Switch from run main mode to low-power mode. |
AnnaBridge | 156:ff21514d8981 | 328 | * @rmtoll CR1 LPR LL_PWR_ExitLowPowerRunMode |
AnnaBridge | 156:ff21514d8981 | 329 | * @retval None |
AnnaBridge | 156:ff21514d8981 | 330 | */ |
AnnaBridge | 156:ff21514d8981 | 331 | __STATIC_INLINE void LL_PWR_ExitLowPowerRunMode(void) |
AnnaBridge | 156:ff21514d8981 | 332 | { |
AnnaBridge | 156:ff21514d8981 | 333 | LL_PWR_DisableLowPowerRunMode(); |
AnnaBridge | 156:ff21514d8981 | 334 | } |
AnnaBridge | 156:ff21514d8981 | 335 | |
AnnaBridge | 156:ff21514d8981 | 336 | /** |
AnnaBridge | 156:ff21514d8981 | 337 | * @brief Set the main internal regulator output voltage |
AnnaBridge | 156:ff21514d8981 | 338 | * @rmtoll CR1 VOS LL_PWR_SetRegulVoltageScaling |
AnnaBridge | 156:ff21514d8981 | 339 | * @param VoltageScaling This parameter can be one of the following values: |
AnnaBridge | 156:ff21514d8981 | 340 | * @arg @ref LL_PWR_REGU_VOLTAGE_SCALE1 |
AnnaBridge | 156:ff21514d8981 | 341 | * @arg @ref LL_PWR_REGU_VOLTAGE_SCALE2 |
AnnaBridge | 156:ff21514d8981 | 342 | * @retval None |
AnnaBridge | 156:ff21514d8981 | 343 | */ |
AnnaBridge | 156:ff21514d8981 | 344 | __STATIC_INLINE void LL_PWR_SetRegulVoltageScaling(uint32_t VoltageScaling) |
AnnaBridge | 156:ff21514d8981 | 345 | { |
AnnaBridge | 156:ff21514d8981 | 346 | MODIFY_REG(PWR->CR1, PWR_CR1_VOS, VoltageScaling); |
AnnaBridge | 156:ff21514d8981 | 347 | } |
AnnaBridge | 156:ff21514d8981 | 348 | |
AnnaBridge | 156:ff21514d8981 | 349 | /** |
AnnaBridge | 156:ff21514d8981 | 350 | * @brief Get the main internal regulator output voltage |
AnnaBridge | 156:ff21514d8981 | 351 | * @rmtoll CR1 VOS LL_PWR_GetRegulVoltageScaling |
AnnaBridge | 156:ff21514d8981 | 352 | * @retval Returned value can be one of the following values: |
AnnaBridge | 156:ff21514d8981 | 353 | * @arg @ref LL_PWR_REGU_VOLTAGE_SCALE1 |
AnnaBridge | 156:ff21514d8981 | 354 | * @arg @ref LL_PWR_REGU_VOLTAGE_SCALE2 |
AnnaBridge | 156:ff21514d8981 | 355 | */ |
AnnaBridge | 156:ff21514d8981 | 356 | __STATIC_INLINE uint32_t LL_PWR_GetRegulVoltageScaling(void) |
AnnaBridge | 156:ff21514d8981 | 357 | { |
AnnaBridge | 156:ff21514d8981 | 358 | return (uint32_t)(READ_BIT(PWR->CR1, PWR_CR1_VOS)); |
AnnaBridge | 156:ff21514d8981 | 359 | } |
AnnaBridge | 156:ff21514d8981 | 360 | |
AnnaBridge | 156:ff21514d8981 | 361 | /** |
AnnaBridge | 156:ff21514d8981 | 362 | * @brief Enable access to the backup domain |
AnnaBridge | 156:ff21514d8981 | 363 | * @rmtoll CR1 DBP LL_PWR_EnableBkUpAccess |
AnnaBridge | 156:ff21514d8981 | 364 | * @retval None |
AnnaBridge | 156:ff21514d8981 | 365 | */ |
AnnaBridge | 156:ff21514d8981 | 366 | __STATIC_INLINE void LL_PWR_EnableBkUpAccess(void) |
AnnaBridge | 156:ff21514d8981 | 367 | { |
AnnaBridge | 156:ff21514d8981 | 368 | SET_BIT(PWR->CR1, PWR_CR1_DBP); |
AnnaBridge | 156:ff21514d8981 | 369 | } |
AnnaBridge | 156:ff21514d8981 | 370 | |
AnnaBridge | 156:ff21514d8981 | 371 | /** |
AnnaBridge | 156:ff21514d8981 | 372 | * @brief Disable access to the backup domain |
AnnaBridge | 156:ff21514d8981 | 373 | * @rmtoll CR1 DBP LL_PWR_DisableBkUpAccess |
AnnaBridge | 156:ff21514d8981 | 374 | * @retval None |
AnnaBridge | 156:ff21514d8981 | 375 | */ |
AnnaBridge | 156:ff21514d8981 | 376 | __STATIC_INLINE void LL_PWR_DisableBkUpAccess(void) |
AnnaBridge | 156:ff21514d8981 | 377 | { |
AnnaBridge | 156:ff21514d8981 | 378 | CLEAR_BIT(PWR->CR1, PWR_CR1_DBP); |
AnnaBridge | 156:ff21514d8981 | 379 | } |
AnnaBridge | 156:ff21514d8981 | 380 | |
AnnaBridge | 156:ff21514d8981 | 381 | /** |
AnnaBridge | 156:ff21514d8981 | 382 | * @brief Check if the backup domain is enabled |
AnnaBridge | 156:ff21514d8981 | 383 | * @rmtoll CR1 DBP LL_PWR_IsEnabledBkUpAccess |
AnnaBridge | 156:ff21514d8981 | 384 | * @retval State of bit (1 or 0). |
AnnaBridge | 156:ff21514d8981 | 385 | */ |
AnnaBridge | 156:ff21514d8981 | 386 | __STATIC_INLINE uint32_t LL_PWR_IsEnabledBkUpAccess(void) |
AnnaBridge | 156:ff21514d8981 | 387 | { |
AnnaBridge | 156:ff21514d8981 | 388 | return (READ_BIT(PWR->CR1, PWR_CR1_DBP) == (PWR_CR1_DBP)); |
AnnaBridge | 156:ff21514d8981 | 389 | } |
AnnaBridge | 156:ff21514d8981 | 390 | |
AnnaBridge | 156:ff21514d8981 | 391 | /** |
AnnaBridge | 156:ff21514d8981 | 392 | * @brief Set Low-Power mode |
AnnaBridge | 156:ff21514d8981 | 393 | * @rmtoll CR1 LPMS LL_PWR_SetPowerMode |
AnnaBridge | 156:ff21514d8981 | 394 | * @param LowPowerMode This parameter can be one of the following values: |
AnnaBridge | 156:ff21514d8981 | 395 | * @arg @ref LL_PWR_MODE_STOP0 |
AnnaBridge | 156:ff21514d8981 | 396 | * @arg @ref LL_PWR_MODE_STOP1 |
AnnaBridge | 156:ff21514d8981 | 397 | * @arg @ref LL_PWR_MODE_STOP2 |
AnnaBridge | 156:ff21514d8981 | 398 | * @arg @ref LL_PWR_MODE_STANDBY |
AnnaBridge | 156:ff21514d8981 | 399 | * @arg @ref LL_PWR_MODE_SHUTDOWN |
AnnaBridge | 156:ff21514d8981 | 400 | * @retval None |
AnnaBridge | 156:ff21514d8981 | 401 | */ |
AnnaBridge | 156:ff21514d8981 | 402 | __STATIC_INLINE void LL_PWR_SetPowerMode(uint32_t LowPowerMode) |
AnnaBridge | 156:ff21514d8981 | 403 | { |
AnnaBridge | 156:ff21514d8981 | 404 | MODIFY_REG(PWR->CR1, PWR_CR1_LPMS, LowPowerMode); |
AnnaBridge | 156:ff21514d8981 | 405 | } |
AnnaBridge | 156:ff21514d8981 | 406 | |
AnnaBridge | 156:ff21514d8981 | 407 | /** |
AnnaBridge | 156:ff21514d8981 | 408 | * @brief Get Low-Power mode |
AnnaBridge | 156:ff21514d8981 | 409 | * @rmtoll CR1 LPMS LL_PWR_GetPowerMode |
AnnaBridge | 156:ff21514d8981 | 410 | * @retval Returned value can be one of the following values: |
AnnaBridge | 156:ff21514d8981 | 411 | * @arg @ref LL_PWR_MODE_STOP0 |
AnnaBridge | 156:ff21514d8981 | 412 | * @arg @ref LL_PWR_MODE_STOP1 |
AnnaBridge | 156:ff21514d8981 | 413 | * @arg @ref LL_PWR_MODE_STOP2 |
AnnaBridge | 156:ff21514d8981 | 414 | * @arg @ref LL_PWR_MODE_STANDBY |
AnnaBridge | 156:ff21514d8981 | 415 | * @arg @ref LL_PWR_MODE_SHUTDOWN |
AnnaBridge | 156:ff21514d8981 | 416 | */ |
AnnaBridge | 156:ff21514d8981 | 417 | __STATIC_INLINE uint32_t LL_PWR_GetPowerMode(void) |
AnnaBridge | 156:ff21514d8981 | 418 | { |
AnnaBridge | 156:ff21514d8981 | 419 | return (uint32_t)(READ_BIT(PWR->CR1, PWR_CR1_LPMS)); |
AnnaBridge | 156:ff21514d8981 | 420 | } |
AnnaBridge | 156:ff21514d8981 | 421 | |
AnnaBridge | 156:ff21514d8981 | 422 | #if defined(PWR_CR2_PVME1) |
AnnaBridge | 156:ff21514d8981 | 423 | /** |
AnnaBridge | 156:ff21514d8981 | 424 | * @brief Enable VDDUSB supply |
AnnaBridge | 156:ff21514d8981 | 425 | * @rmtoll CR2 USV LL_PWR_EnableVddUSB |
AnnaBridge | 156:ff21514d8981 | 426 | * @retval None |
AnnaBridge | 156:ff21514d8981 | 427 | */ |
AnnaBridge | 156:ff21514d8981 | 428 | __STATIC_INLINE void LL_PWR_EnableVddUSB(void) |
AnnaBridge | 156:ff21514d8981 | 429 | { |
AnnaBridge | 156:ff21514d8981 | 430 | SET_BIT(PWR->CR2, PWR_CR2_USV); |
AnnaBridge | 156:ff21514d8981 | 431 | } |
AnnaBridge | 156:ff21514d8981 | 432 | |
AnnaBridge | 156:ff21514d8981 | 433 | /** |
AnnaBridge | 156:ff21514d8981 | 434 | * @brief Disable VDDUSB supply |
AnnaBridge | 156:ff21514d8981 | 435 | * @rmtoll CR2 USV LL_PWR_DisableVddUSB |
AnnaBridge | 156:ff21514d8981 | 436 | * @retval None |
AnnaBridge | 156:ff21514d8981 | 437 | */ |
AnnaBridge | 156:ff21514d8981 | 438 | __STATIC_INLINE void LL_PWR_DisableVddUSB(void) |
AnnaBridge | 156:ff21514d8981 | 439 | { |
AnnaBridge | 156:ff21514d8981 | 440 | CLEAR_BIT(PWR->CR2, PWR_CR2_USV); |
AnnaBridge | 156:ff21514d8981 | 441 | } |
AnnaBridge | 156:ff21514d8981 | 442 | |
AnnaBridge | 156:ff21514d8981 | 443 | /** |
AnnaBridge | 156:ff21514d8981 | 444 | * @brief Check if VDDUSB supply is enabled |
AnnaBridge | 156:ff21514d8981 | 445 | * @rmtoll CR2 USV LL_PWR_IsEnabledVddUSB |
AnnaBridge | 156:ff21514d8981 | 446 | * @retval State of bit (1 or 0). |
AnnaBridge | 156:ff21514d8981 | 447 | */ |
AnnaBridge | 156:ff21514d8981 | 448 | __STATIC_INLINE uint32_t LL_PWR_IsEnabledVddUSB(void) |
AnnaBridge | 156:ff21514d8981 | 449 | { |
AnnaBridge | 156:ff21514d8981 | 450 | return (READ_BIT(PWR->CR2, PWR_CR2_USV) == (PWR_CR2_USV)); |
AnnaBridge | 156:ff21514d8981 | 451 | } |
AnnaBridge | 156:ff21514d8981 | 452 | #endif |
AnnaBridge | 156:ff21514d8981 | 453 | |
AnnaBridge | 156:ff21514d8981 | 454 | #if defined(PWR_CR2_IOSV) |
AnnaBridge | 156:ff21514d8981 | 455 | /** |
AnnaBridge | 156:ff21514d8981 | 456 | * @brief Enable VDDIO2 supply |
AnnaBridge | 156:ff21514d8981 | 457 | * @rmtoll CR2 IOSV LL_PWR_EnableVddIO2 |
AnnaBridge | 156:ff21514d8981 | 458 | * @retval None |
AnnaBridge | 156:ff21514d8981 | 459 | */ |
AnnaBridge | 156:ff21514d8981 | 460 | __STATIC_INLINE void LL_PWR_EnableVddIO2(void) |
AnnaBridge | 156:ff21514d8981 | 461 | { |
AnnaBridge | 156:ff21514d8981 | 462 | SET_BIT(PWR->CR2, PWR_CR2_IOSV); |
AnnaBridge | 156:ff21514d8981 | 463 | } |
AnnaBridge | 156:ff21514d8981 | 464 | |
AnnaBridge | 156:ff21514d8981 | 465 | /** |
AnnaBridge | 156:ff21514d8981 | 466 | * @brief Disable VDDIO2 supply |
AnnaBridge | 156:ff21514d8981 | 467 | * @rmtoll CR2 IOSV LL_PWR_DisableVddIO2 |
AnnaBridge | 156:ff21514d8981 | 468 | * @retval None |
AnnaBridge | 156:ff21514d8981 | 469 | */ |
AnnaBridge | 156:ff21514d8981 | 470 | __STATIC_INLINE void LL_PWR_DisableVddIO2(void) |
AnnaBridge | 156:ff21514d8981 | 471 | { |
AnnaBridge | 156:ff21514d8981 | 472 | CLEAR_BIT(PWR->CR2, PWR_CR2_IOSV); |
AnnaBridge | 156:ff21514d8981 | 473 | } |
AnnaBridge | 156:ff21514d8981 | 474 | |
AnnaBridge | 156:ff21514d8981 | 475 | /** |
AnnaBridge | 156:ff21514d8981 | 476 | * @brief Check if VDDIO2 supply is enabled |
AnnaBridge | 156:ff21514d8981 | 477 | * @rmtoll CR2 IOSV LL_PWR_IsEnabledVddIO2 |
AnnaBridge | 156:ff21514d8981 | 478 | * @retval State of bit (1 or 0). |
AnnaBridge | 156:ff21514d8981 | 479 | */ |
AnnaBridge | 156:ff21514d8981 | 480 | __STATIC_INLINE uint32_t LL_PWR_IsEnabledVddIO2(void) |
AnnaBridge | 156:ff21514d8981 | 481 | { |
AnnaBridge | 156:ff21514d8981 | 482 | return (READ_BIT(PWR->CR2, PWR_CR2_IOSV) == (PWR_CR2_IOSV)); |
AnnaBridge | 156:ff21514d8981 | 483 | } |
AnnaBridge | 156:ff21514d8981 | 484 | #endif |
AnnaBridge | 156:ff21514d8981 | 485 | |
AnnaBridge | 156:ff21514d8981 | 486 | /** |
AnnaBridge | 156:ff21514d8981 | 487 | * @brief Enable the Power Voltage Monitoring on a peripheral |
AnnaBridge | 156:ff21514d8981 | 488 | * @rmtoll CR2 PVME1 LL_PWR_EnablePVM\n |
AnnaBridge | 156:ff21514d8981 | 489 | * CR2 PVME2 LL_PWR_EnablePVM\n |
AnnaBridge | 156:ff21514d8981 | 490 | * CR2 PVME3 LL_PWR_EnablePVM\n |
AnnaBridge | 156:ff21514d8981 | 491 | * CR2 PVME4 LL_PWR_EnablePVM |
AnnaBridge | 156:ff21514d8981 | 492 | * @param PeriphVoltage This parameter can be one of the following values: |
AnnaBridge | 156:ff21514d8981 | 493 | * @arg @ref LL_PWR_PVM_VDDUSB_1_2V (*) |
AnnaBridge | 156:ff21514d8981 | 494 | * @arg @ref LL_PWR_PVM_VDDIO2_0_9V (*) |
AnnaBridge | 156:ff21514d8981 | 495 | * @arg @ref LL_PWR_PVM_VDDA_1_62V |
AnnaBridge | 156:ff21514d8981 | 496 | * @arg @ref LL_PWR_PVM_VDDA_2_2V |
AnnaBridge | 156:ff21514d8981 | 497 | * |
AnnaBridge | 156:ff21514d8981 | 498 | * (*) value not defined in all devices |
AnnaBridge | 156:ff21514d8981 | 499 | * @retval None |
AnnaBridge | 156:ff21514d8981 | 500 | */ |
AnnaBridge | 156:ff21514d8981 | 501 | __STATIC_INLINE void LL_PWR_EnablePVM(uint32_t PeriphVoltage) |
AnnaBridge | 156:ff21514d8981 | 502 | { |
AnnaBridge | 156:ff21514d8981 | 503 | SET_BIT(PWR->CR2, PeriphVoltage); |
AnnaBridge | 156:ff21514d8981 | 504 | } |
AnnaBridge | 156:ff21514d8981 | 505 | |
AnnaBridge | 156:ff21514d8981 | 506 | /** |
AnnaBridge | 156:ff21514d8981 | 507 | * @brief Disable the Power Voltage Monitoring on a peripheral |
AnnaBridge | 156:ff21514d8981 | 508 | * @rmtoll CR2 PVME1 LL_PWR_DisablePVM\n |
AnnaBridge | 156:ff21514d8981 | 509 | * CR2 PVME2 LL_PWR_DisablePVM\n |
AnnaBridge | 156:ff21514d8981 | 510 | * CR2 PVME3 LL_PWR_DisablePVM\n |
AnnaBridge | 156:ff21514d8981 | 511 | * CR2 PVME4 LL_PWR_DisablePVM |
AnnaBridge | 156:ff21514d8981 | 512 | * @param PeriphVoltage This parameter can be one of the following values: |
AnnaBridge | 156:ff21514d8981 | 513 | * @arg @ref LL_PWR_PVM_VDDUSB_1_2V (*) |
AnnaBridge | 156:ff21514d8981 | 514 | * @arg @ref LL_PWR_PVM_VDDIO2_0_9V (*) |
AnnaBridge | 156:ff21514d8981 | 515 | * @arg @ref LL_PWR_PVM_VDDA_1_62V |
AnnaBridge | 156:ff21514d8981 | 516 | * @arg @ref LL_PWR_PVM_VDDA_2_2V |
AnnaBridge | 156:ff21514d8981 | 517 | * |
AnnaBridge | 156:ff21514d8981 | 518 | * (*) value not defined in all devices |
AnnaBridge | 156:ff21514d8981 | 519 | * @retval None |
AnnaBridge | 156:ff21514d8981 | 520 | */ |
AnnaBridge | 156:ff21514d8981 | 521 | __STATIC_INLINE void LL_PWR_DisablePVM(uint32_t PeriphVoltage) |
AnnaBridge | 156:ff21514d8981 | 522 | { |
AnnaBridge | 156:ff21514d8981 | 523 | CLEAR_BIT(PWR->CR2, PeriphVoltage); |
AnnaBridge | 156:ff21514d8981 | 524 | } |
AnnaBridge | 156:ff21514d8981 | 525 | |
AnnaBridge | 156:ff21514d8981 | 526 | /** |
AnnaBridge | 156:ff21514d8981 | 527 | * @brief Check if Power Voltage Monitoring is enabled on a peripheral |
AnnaBridge | 156:ff21514d8981 | 528 | * @rmtoll CR2 PVME1 LL_PWR_IsEnabledPVM\n |
AnnaBridge | 156:ff21514d8981 | 529 | * CR2 PVME2 LL_PWR_IsEnabledPVM\n |
AnnaBridge | 156:ff21514d8981 | 530 | * CR2 PVME3 LL_PWR_IsEnabledPVM\n |
AnnaBridge | 156:ff21514d8981 | 531 | * CR2 PVME4 LL_PWR_IsEnabledPVM |
AnnaBridge | 156:ff21514d8981 | 532 | * @param PeriphVoltage This parameter can be one of the following values: |
AnnaBridge | 156:ff21514d8981 | 533 | * @arg @ref LL_PWR_PVM_VDDUSB_1_2V (*) |
AnnaBridge | 156:ff21514d8981 | 534 | * @arg @ref LL_PWR_PVM_VDDIO2_0_9V (*) |
AnnaBridge | 156:ff21514d8981 | 535 | * @arg @ref LL_PWR_PVM_VDDA_1_62V |
AnnaBridge | 156:ff21514d8981 | 536 | * @arg @ref LL_PWR_PVM_VDDA_2_2V |
AnnaBridge | 156:ff21514d8981 | 537 | * |
AnnaBridge | 156:ff21514d8981 | 538 | * (*) value not defined in all devices |
AnnaBridge | 156:ff21514d8981 | 539 | * @retval State of bit (1 or 0). |
AnnaBridge | 156:ff21514d8981 | 540 | */ |
AnnaBridge | 156:ff21514d8981 | 541 | __STATIC_INLINE uint32_t LL_PWR_IsEnabledPVM(uint32_t PeriphVoltage) |
AnnaBridge | 156:ff21514d8981 | 542 | { |
AnnaBridge | 156:ff21514d8981 | 543 | return (READ_BIT(PWR->CR2, PeriphVoltage) == (PeriphVoltage)); |
AnnaBridge | 156:ff21514d8981 | 544 | } |
AnnaBridge | 156:ff21514d8981 | 545 | |
AnnaBridge | 156:ff21514d8981 | 546 | /** |
AnnaBridge | 156:ff21514d8981 | 547 | * @brief Configure the voltage threshold detected by the Power Voltage Detector |
AnnaBridge | 156:ff21514d8981 | 548 | * @rmtoll CR2 PLS LL_PWR_SetPVDLevel |
AnnaBridge | 156:ff21514d8981 | 549 | * @param PVDLevel This parameter can be one of the following values: |
AnnaBridge | 156:ff21514d8981 | 550 | * @arg @ref LL_PWR_PVDLEVEL_0 |
AnnaBridge | 156:ff21514d8981 | 551 | * @arg @ref LL_PWR_PVDLEVEL_1 |
AnnaBridge | 156:ff21514d8981 | 552 | * @arg @ref LL_PWR_PVDLEVEL_2 |
AnnaBridge | 156:ff21514d8981 | 553 | * @arg @ref LL_PWR_PVDLEVEL_3 |
AnnaBridge | 156:ff21514d8981 | 554 | * @arg @ref LL_PWR_PVDLEVEL_4 |
AnnaBridge | 156:ff21514d8981 | 555 | * @arg @ref LL_PWR_PVDLEVEL_5 |
AnnaBridge | 156:ff21514d8981 | 556 | * @arg @ref LL_PWR_PVDLEVEL_6 |
AnnaBridge | 156:ff21514d8981 | 557 | * @arg @ref LL_PWR_PVDLEVEL_7 |
AnnaBridge | 156:ff21514d8981 | 558 | * @retval None |
AnnaBridge | 156:ff21514d8981 | 559 | */ |
AnnaBridge | 156:ff21514d8981 | 560 | __STATIC_INLINE void LL_PWR_SetPVDLevel(uint32_t PVDLevel) |
AnnaBridge | 156:ff21514d8981 | 561 | { |
AnnaBridge | 156:ff21514d8981 | 562 | MODIFY_REG(PWR->CR2, PWR_CR2_PLS, PVDLevel); |
AnnaBridge | 156:ff21514d8981 | 563 | } |
AnnaBridge | 156:ff21514d8981 | 564 | |
AnnaBridge | 156:ff21514d8981 | 565 | /** |
AnnaBridge | 156:ff21514d8981 | 566 | * @brief Get the voltage threshold detection |
AnnaBridge | 156:ff21514d8981 | 567 | * @rmtoll CR2 PLS LL_PWR_GetPVDLevel |
AnnaBridge | 156:ff21514d8981 | 568 | * @retval Returned value can be one of the following values: |
AnnaBridge | 156:ff21514d8981 | 569 | * @arg @ref LL_PWR_PVDLEVEL_0 |
AnnaBridge | 156:ff21514d8981 | 570 | * @arg @ref LL_PWR_PVDLEVEL_1 |
AnnaBridge | 156:ff21514d8981 | 571 | * @arg @ref LL_PWR_PVDLEVEL_2 |
AnnaBridge | 156:ff21514d8981 | 572 | * @arg @ref LL_PWR_PVDLEVEL_3 |
AnnaBridge | 156:ff21514d8981 | 573 | * @arg @ref LL_PWR_PVDLEVEL_4 |
AnnaBridge | 156:ff21514d8981 | 574 | * @arg @ref LL_PWR_PVDLEVEL_5 |
AnnaBridge | 156:ff21514d8981 | 575 | * @arg @ref LL_PWR_PVDLEVEL_6 |
AnnaBridge | 156:ff21514d8981 | 576 | * @arg @ref LL_PWR_PVDLEVEL_7 |
AnnaBridge | 156:ff21514d8981 | 577 | */ |
AnnaBridge | 156:ff21514d8981 | 578 | __STATIC_INLINE uint32_t LL_PWR_GetPVDLevel(void) |
AnnaBridge | 156:ff21514d8981 | 579 | { |
AnnaBridge | 156:ff21514d8981 | 580 | return (uint32_t)(READ_BIT(PWR->CR2, PWR_CR2_PLS)); |
AnnaBridge | 156:ff21514d8981 | 581 | } |
AnnaBridge | 156:ff21514d8981 | 582 | |
AnnaBridge | 156:ff21514d8981 | 583 | /** |
AnnaBridge | 156:ff21514d8981 | 584 | * @brief Enable Power Voltage Detector |
AnnaBridge | 156:ff21514d8981 | 585 | * @rmtoll CR2 PVDE LL_PWR_EnablePVD |
AnnaBridge | 156:ff21514d8981 | 586 | * @retval None |
AnnaBridge | 156:ff21514d8981 | 587 | */ |
AnnaBridge | 156:ff21514d8981 | 588 | __STATIC_INLINE void LL_PWR_EnablePVD(void) |
AnnaBridge | 156:ff21514d8981 | 589 | { |
AnnaBridge | 156:ff21514d8981 | 590 | SET_BIT(PWR->CR2, PWR_CR2_PVDE); |
AnnaBridge | 156:ff21514d8981 | 591 | } |
AnnaBridge | 156:ff21514d8981 | 592 | |
AnnaBridge | 156:ff21514d8981 | 593 | /** |
AnnaBridge | 156:ff21514d8981 | 594 | * @brief Disable Power Voltage Detector |
AnnaBridge | 156:ff21514d8981 | 595 | * @rmtoll CR2 PVDE LL_PWR_DisablePVD |
AnnaBridge | 156:ff21514d8981 | 596 | * @retval None |
AnnaBridge | 156:ff21514d8981 | 597 | */ |
AnnaBridge | 156:ff21514d8981 | 598 | __STATIC_INLINE void LL_PWR_DisablePVD(void) |
AnnaBridge | 156:ff21514d8981 | 599 | { |
AnnaBridge | 156:ff21514d8981 | 600 | CLEAR_BIT(PWR->CR2, PWR_CR2_PVDE); |
AnnaBridge | 156:ff21514d8981 | 601 | } |
AnnaBridge | 156:ff21514d8981 | 602 | |
AnnaBridge | 156:ff21514d8981 | 603 | /** |
AnnaBridge | 156:ff21514d8981 | 604 | * @brief Check if Power Voltage Detector is enabled |
AnnaBridge | 156:ff21514d8981 | 605 | * @rmtoll CR2 PVDE LL_PWR_IsEnabledPVD |
AnnaBridge | 156:ff21514d8981 | 606 | * @retval State of bit (1 or 0). |
AnnaBridge | 156:ff21514d8981 | 607 | */ |
AnnaBridge | 156:ff21514d8981 | 608 | __STATIC_INLINE uint32_t LL_PWR_IsEnabledPVD(void) |
AnnaBridge | 156:ff21514d8981 | 609 | { |
AnnaBridge | 156:ff21514d8981 | 610 | return (READ_BIT(PWR->CR2, PWR_CR2_PVDE) == (PWR_CR2_PVDE)); |
AnnaBridge | 156:ff21514d8981 | 611 | } |
AnnaBridge | 156:ff21514d8981 | 612 | |
AnnaBridge | 156:ff21514d8981 | 613 | /** |
AnnaBridge | 156:ff21514d8981 | 614 | * @brief Enable Internal Wake-up line |
AnnaBridge | 156:ff21514d8981 | 615 | * @rmtoll CR3 EIWF LL_PWR_EnableInternWU |
AnnaBridge | 156:ff21514d8981 | 616 | * @retval None |
AnnaBridge | 156:ff21514d8981 | 617 | */ |
AnnaBridge | 156:ff21514d8981 | 618 | __STATIC_INLINE void LL_PWR_EnableInternWU(void) |
AnnaBridge | 156:ff21514d8981 | 619 | { |
AnnaBridge | 156:ff21514d8981 | 620 | SET_BIT(PWR->CR3, PWR_CR3_EIWF); |
AnnaBridge | 156:ff21514d8981 | 621 | } |
AnnaBridge | 156:ff21514d8981 | 622 | |
AnnaBridge | 156:ff21514d8981 | 623 | /** |
AnnaBridge | 156:ff21514d8981 | 624 | * @brief Disable Internal Wake-up line |
AnnaBridge | 156:ff21514d8981 | 625 | * @rmtoll CR3 EIWF LL_PWR_DisableInternWU |
AnnaBridge | 156:ff21514d8981 | 626 | * @retval None |
AnnaBridge | 156:ff21514d8981 | 627 | */ |
AnnaBridge | 156:ff21514d8981 | 628 | __STATIC_INLINE void LL_PWR_DisableInternWU(void) |
AnnaBridge | 156:ff21514d8981 | 629 | { |
AnnaBridge | 156:ff21514d8981 | 630 | CLEAR_BIT(PWR->CR3, PWR_CR3_EIWF); |
AnnaBridge | 156:ff21514d8981 | 631 | } |
AnnaBridge | 156:ff21514d8981 | 632 | |
AnnaBridge | 156:ff21514d8981 | 633 | /** |
AnnaBridge | 156:ff21514d8981 | 634 | * @brief Check if Internal Wake-up line is enabled |
AnnaBridge | 156:ff21514d8981 | 635 | * @rmtoll CR3 EIWF LL_PWR_IsEnabledInternWU |
AnnaBridge | 156:ff21514d8981 | 636 | * @retval State of bit (1 or 0). |
AnnaBridge | 156:ff21514d8981 | 637 | */ |
AnnaBridge | 156:ff21514d8981 | 638 | __STATIC_INLINE uint32_t LL_PWR_IsEnabledInternWU(void) |
AnnaBridge | 156:ff21514d8981 | 639 | { |
AnnaBridge | 156:ff21514d8981 | 640 | return (READ_BIT(PWR->CR3, PWR_CR3_EIWF) == (PWR_CR3_EIWF)); |
AnnaBridge | 156:ff21514d8981 | 641 | } |
AnnaBridge | 156:ff21514d8981 | 642 | |
AnnaBridge | 156:ff21514d8981 | 643 | /** |
AnnaBridge | 156:ff21514d8981 | 644 | * @brief Enable pull-up and pull-down configuration |
AnnaBridge | 156:ff21514d8981 | 645 | * @rmtoll CR3 APC LL_PWR_EnablePUPDCfg |
AnnaBridge | 156:ff21514d8981 | 646 | * @retval None |
AnnaBridge | 156:ff21514d8981 | 647 | */ |
AnnaBridge | 156:ff21514d8981 | 648 | __STATIC_INLINE void LL_PWR_EnablePUPDCfg(void) |
AnnaBridge | 156:ff21514d8981 | 649 | { |
AnnaBridge | 156:ff21514d8981 | 650 | SET_BIT(PWR->CR3, PWR_CR3_APC); |
AnnaBridge | 156:ff21514d8981 | 651 | } |
AnnaBridge | 156:ff21514d8981 | 652 | |
AnnaBridge | 156:ff21514d8981 | 653 | /** |
AnnaBridge | 156:ff21514d8981 | 654 | * @brief Disable pull-up and pull-down configuration |
AnnaBridge | 156:ff21514d8981 | 655 | * @rmtoll CR3 APC LL_PWR_DisablePUPDCfg |
AnnaBridge | 156:ff21514d8981 | 656 | * @retval None |
AnnaBridge | 156:ff21514d8981 | 657 | */ |
AnnaBridge | 156:ff21514d8981 | 658 | __STATIC_INLINE void LL_PWR_DisablePUPDCfg(void) |
AnnaBridge | 156:ff21514d8981 | 659 | { |
AnnaBridge | 156:ff21514d8981 | 660 | CLEAR_BIT(PWR->CR3, PWR_CR3_APC); |
AnnaBridge | 156:ff21514d8981 | 661 | } |
AnnaBridge | 156:ff21514d8981 | 662 | |
AnnaBridge | 156:ff21514d8981 | 663 | /** |
AnnaBridge | 156:ff21514d8981 | 664 | * @brief Check if pull-up and pull-down configuration is enabled |
AnnaBridge | 156:ff21514d8981 | 665 | * @rmtoll CR3 APC LL_PWR_IsEnabledPUPDCfg |
AnnaBridge | 156:ff21514d8981 | 666 | * @retval State of bit (1 or 0). |
AnnaBridge | 156:ff21514d8981 | 667 | */ |
AnnaBridge | 156:ff21514d8981 | 668 | __STATIC_INLINE uint32_t LL_PWR_IsEnabledPUPDCfg(void) |
AnnaBridge | 156:ff21514d8981 | 669 | { |
AnnaBridge | 156:ff21514d8981 | 670 | return (READ_BIT(PWR->CR3, PWR_CR3_APC) == (PWR_CR3_APC)); |
AnnaBridge | 156:ff21514d8981 | 671 | } |
AnnaBridge | 156:ff21514d8981 | 672 | |
AnnaBridge | 156:ff21514d8981 | 673 | /** |
AnnaBridge | 156:ff21514d8981 | 674 | * @brief Enable SRAM2 content retention in Standby mode |
AnnaBridge | 156:ff21514d8981 | 675 | * @rmtoll CR3 RRS LL_PWR_EnableSRAM2Retention |
AnnaBridge | 156:ff21514d8981 | 676 | * @retval None |
AnnaBridge | 156:ff21514d8981 | 677 | */ |
AnnaBridge | 156:ff21514d8981 | 678 | __STATIC_INLINE void LL_PWR_EnableSRAM2Retention(void) |
AnnaBridge | 156:ff21514d8981 | 679 | { |
AnnaBridge | 156:ff21514d8981 | 680 | SET_BIT(PWR->CR3, PWR_CR3_RRS); |
AnnaBridge | 156:ff21514d8981 | 681 | } |
AnnaBridge | 156:ff21514d8981 | 682 | |
AnnaBridge | 156:ff21514d8981 | 683 | /** |
AnnaBridge | 156:ff21514d8981 | 684 | * @brief Disable SRAM2 content retention in Standby mode |
AnnaBridge | 156:ff21514d8981 | 685 | * @rmtoll CR3 RRS LL_PWR_DisableSRAM2Retention |
AnnaBridge | 156:ff21514d8981 | 686 | * @retval None |
AnnaBridge | 156:ff21514d8981 | 687 | */ |
AnnaBridge | 156:ff21514d8981 | 688 | __STATIC_INLINE void LL_PWR_DisableSRAM2Retention(void) |
AnnaBridge | 156:ff21514d8981 | 689 | { |
AnnaBridge | 156:ff21514d8981 | 690 | CLEAR_BIT(PWR->CR3, PWR_CR3_RRS); |
AnnaBridge | 156:ff21514d8981 | 691 | } |
AnnaBridge | 156:ff21514d8981 | 692 | |
AnnaBridge | 156:ff21514d8981 | 693 | /** |
AnnaBridge | 156:ff21514d8981 | 694 | * @brief Check if SRAM2 content retention in Standby mode is enabled |
AnnaBridge | 156:ff21514d8981 | 695 | * @rmtoll CR3 RRS LL_PWR_IsEnabledSRAM2Retention |
AnnaBridge | 156:ff21514d8981 | 696 | * @retval State of bit (1 or 0). |
AnnaBridge | 156:ff21514d8981 | 697 | */ |
AnnaBridge | 156:ff21514d8981 | 698 | __STATIC_INLINE uint32_t LL_PWR_IsEnabledSRAM2Retention(void) |
AnnaBridge | 156:ff21514d8981 | 699 | { |
AnnaBridge | 156:ff21514d8981 | 700 | return (READ_BIT(PWR->CR3, PWR_CR3_RRS) == (PWR_CR3_RRS)); |
AnnaBridge | 156:ff21514d8981 | 701 | } |
AnnaBridge | 156:ff21514d8981 | 702 | |
AnnaBridge | 156:ff21514d8981 | 703 | /** |
AnnaBridge | 156:ff21514d8981 | 704 | * @brief Enable the WakeUp PINx functionality |
AnnaBridge | 156:ff21514d8981 | 705 | * @rmtoll CR3 EWUP1 LL_PWR_EnableWakeUpPin\n |
AnnaBridge | 156:ff21514d8981 | 706 | * CR3 EWUP2 LL_PWR_EnableWakeUpPin\n |
AnnaBridge | 156:ff21514d8981 | 707 | * CR3 EWUP3 LL_PWR_EnableWakeUpPin\n |
AnnaBridge | 156:ff21514d8981 | 708 | * CR3 EWUP4 LL_PWR_EnableWakeUpPin\n |
AnnaBridge | 156:ff21514d8981 | 709 | * CR3 EWUP5 LL_PWR_EnableWakeUpPin\n |
AnnaBridge | 156:ff21514d8981 | 710 | * @param WakeUpPin This parameter can be one of the following values: |
AnnaBridge | 156:ff21514d8981 | 711 | * @arg @ref LL_PWR_WAKEUP_PIN1 |
AnnaBridge | 156:ff21514d8981 | 712 | * @arg @ref LL_PWR_WAKEUP_PIN2 |
AnnaBridge | 156:ff21514d8981 | 713 | * @arg @ref LL_PWR_WAKEUP_PIN3 |
AnnaBridge | 156:ff21514d8981 | 714 | * @arg @ref LL_PWR_WAKEUP_PIN4 |
AnnaBridge | 156:ff21514d8981 | 715 | * @arg @ref LL_PWR_WAKEUP_PIN5 |
AnnaBridge | 156:ff21514d8981 | 716 | * @retval None |
AnnaBridge | 156:ff21514d8981 | 717 | */ |
AnnaBridge | 156:ff21514d8981 | 718 | __STATIC_INLINE void LL_PWR_EnableWakeUpPin(uint32_t WakeUpPin) |
AnnaBridge | 156:ff21514d8981 | 719 | { |
AnnaBridge | 156:ff21514d8981 | 720 | SET_BIT(PWR->CR3, WakeUpPin); |
AnnaBridge | 156:ff21514d8981 | 721 | } |
AnnaBridge | 156:ff21514d8981 | 722 | |
AnnaBridge | 156:ff21514d8981 | 723 | /** |
AnnaBridge | 156:ff21514d8981 | 724 | * @brief Disable the WakeUp PINx functionality |
AnnaBridge | 156:ff21514d8981 | 725 | * @rmtoll CR3 EWUP1 LL_PWR_DisableWakeUpPin\n |
AnnaBridge | 156:ff21514d8981 | 726 | * CR3 EWUP2 LL_PWR_DisableWakeUpPin\n |
AnnaBridge | 156:ff21514d8981 | 727 | * CR3 EWUP3 LL_PWR_DisableWakeUpPin\n |
AnnaBridge | 156:ff21514d8981 | 728 | * CR3 EWUP4 LL_PWR_DisableWakeUpPin\n |
AnnaBridge | 156:ff21514d8981 | 729 | * CR3 EWUP5 LL_PWR_DisableWakeUpPin\n |
AnnaBridge | 156:ff21514d8981 | 730 | * @param WakeUpPin This parameter can be one of the following values: |
AnnaBridge | 156:ff21514d8981 | 731 | * @arg @ref LL_PWR_WAKEUP_PIN1 |
AnnaBridge | 156:ff21514d8981 | 732 | * @arg @ref LL_PWR_WAKEUP_PIN2 |
AnnaBridge | 156:ff21514d8981 | 733 | * @arg @ref LL_PWR_WAKEUP_PIN3 |
AnnaBridge | 156:ff21514d8981 | 734 | * @arg @ref LL_PWR_WAKEUP_PIN4 |
AnnaBridge | 156:ff21514d8981 | 735 | * @arg @ref LL_PWR_WAKEUP_PIN5 |
AnnaBridge | 156:ff21514d8981 | 736 | * @retval None |
AnnaBridge | 156:ff21514d8981 | 737 | */ |
AnnaBridge | 156:ff21514d8981 | 738 | __STATIC_INLINE void LL_PWR_DisableWakeUpPin(uint32_t WakeUpPin) |
AnnaBridge | 156:ff21514d8981 | 739 | { |
AnnaBridge | 156:ff21514d8981 | 740 | CLEAR_BIT(PWR->CR3, WakeUpPin); |
AnnaBridge | 156:ff21514d8981 | 741 | } |
AnnaBridge | 156:ff21514d8981 | 742 | |
AnnaBridge | 156:ff21514d8981 | 743 | /** |
AnnaBridge | 156:ff21514d8981 | 744 | * @brief Check if the WakeUp PINx functionality is enabled |
AnnaBridge | 156:ff21514d8981 | 745 | * @rmtoll CR3 EWUP1 LL_PWR_IsEnabledWakeUpPin\n |
AnnaBridge | 156:ff21514d8981 | 746 | * CR3 EWUP2 LL_PWR_IsEnabledWakeUpPin\n |
AnnaBridge | 156:ff21514d8981 | 747 | * CR3 EWUP3 LL_PWR_IsEnabledWakeUpPin\n |
AnnaBridge | 156:ff21514d8981 | 748 | * CR3 EWUP4 LL_PWR_IsEnabledWakeUpPin\n |
AnnaBridge | 156:ff21514d8981 | 749 | * CR3 EWUP5 LL_PWR_IsEnabledWakeUpPin\n |
AnnaBridge | 156:ff21514d8981 | 750 | * @param WakeUpPin This parameter can be one of the following values: |
AnnaBridge | 156:ff21514d8981 | 751 | * @arg @ref LL_PWR_WAKEUP_PIN1 |
AnnaBridge | 156:ff21514d8981 | 752 | * @arg @ref LL_PWR_WAKEUP_PIN2 |
AnnaBridge | 156:ff21514d8981 | 753 | * @arg @ref LL_PWR_WAKEUP_PIN3 |
AnnaBridge | 156:ff21514d8981 | 754 | * @arg @ref LL_PWR_WAKEUP_PIN4 |
AnnaBridge | 156:ff21514d8981 | 755 | * @arg @ref LL_PWR_WAKEUP_PIN5 |
AnnaBridge | 156:ff21514d8981 | 756 | * @retval State of bit (1 or 0). |
AnnaBridge | 156:ff21514d8981 | 757 | */ |
AnnaBridge | 156:ff21514d8981 | 758 | __STATIC_INLINE uint32_t LL_PWR_IsEnabledWakeUpPin(uint32_t WakeUpPin) |
AnnaBridge | 156:ff21514d8981 | 759 | { |
AnnaBridge | 156:ff21514d8981 | 760 | return (READ_BIT(PWR->CR3, WakeUpPin) == (WakeUpPin)); |
AnnaBridge | 156:ff21514d8981 | 761 | } |
AnnaBridge | 156:ff21514d8981 | 762 | |
AnnaBridge | 156:ff21514d8981 | 763 | /** |
AnnaBridge | 156:ff21514d8981 | 764 | * @brief Set the resistor impedance |
AnnaBridge | 156:ff21514d8981 | 765 | * @rmtoll CR4 VBRS LL_PWR_SetBattChargResistor |
AnnaBridge | 156:ff21514d8981 | 766 | * @param Resistor This parameter can be one of the following values: |
AnnaBridge | 156:ff21514d8981 | 767 | * @arg @ref LL_PWR_BATT_CHARG_RESISTOR_5K |
AnnaBridge | 156:ff21514d8981 | 768 | * @arg @ref LL_PWR_BATT_CHARGRESISTOR_1_5K |
AnnaBridge | 156:ff21514d8981 | 769 | * @retval None |
AnnaBridge | 156:ff21514d8981 | 770 | */ |
AnnaBridge | 156:ff21514d8981 | 771 | __STATIC_INLINE void LL_PWR_SetBattChargResistor(uint32_t Resistor) |
AnnaBridge | 156:ff21514d8981 | 772 | { |
AnnaBridge | 156:ff21514d8981 | 773 | MODIFY_REG(PWR->CR4, PWR_CR4_VBRS, Resistor); |
AnnaBridge | 156:ff21514d8981 | 774 | } |
AnnaBridge | 156:ff21514d8981 | 775 | |
AnnaBridge | 156:ff21514d8981 | 776 | /** |
AnnaBridge | 156:ff21514d8981 | 777 | * @brief Get the resistor impedance |
AnnaBridge | 156:ff21514d8981 | 778 | * @rmtoll CR4 VBRS LL_PWR_GetBattChargResistor |
AnnaBridge | 156:ff21514d8981 | 779 | * @retval Returned value can be one of the following values: |
AnnaBridge | 156:ff21514d8981 | 780 | * @arg @ref LL_PWR_BATT_CHARG_RESISTOR_5K |
AnnaBridge | 156:ff21514d8981 | 781 | * @arg @ref LL_PWR_BATT_CHARGRESISTOR_1_5K |
AnnaBridge | 156:ff21514d8981 | 782 | */ |
AnnaBridge | 156:ff21514d8981 | 783 | __STATIC_INLINE uint32_t LL_PWR_GetBattChargResistor(void) |
AnnaBridge | 156:ff21514d8981 | 784 | { |
AnnaBridge | 156:ff21514d8981 | 785 | return (uint32_t)(READ_BIT(PWR->CR4, PWR_CR4_VBRS)); |
AnnaBridge | 156:ff21514d8981 | 786 | } |
AnnaBridge | 156:ff21514d8981 | 787 | |
AnnaBridge | 156:ff21514d8981 | 788 | /** |
AnnaBridge | 156:ff21514d8981 | 789 | * @brief Enable battery charging |
AnnaBridge | 156:ff21514d8981 | 790 | * @rmtoll CR4 VBE LL_PWR_EnableBatteryCharging |
AnnaBridge | 156:ff21514d8981 | 791 | * @retval None |
AnnaBridge | 156:ff21514d8981 | 792 | */ |
AnnaBridge | 156:ff21514d8981 | 793 | __STATIC_INLINE void LL_PWR_EnableBatteryCharging(void) |
AnnaBridge | 156:ff21514d8981 | 794 | { |
AnnaBridge | 156:ff21514d8981 | 795 | SET_BIT(PWR->CR4, PWR_CR4_VBE); |
AnnaBridge | 156:ff21514d8981 | 796 | } |
AnnaBridge | 156:ff21514d8981 | 797 | |
AnnaBridge | 156:ff21514d8981 | 798 | /** |
AnnaBridge | 156:ff21514d8981 | 799 | * @brief Disable battery charging |
AnnaBridge | 156:ff21514d8981 | 800 | * @rmtoll CR4 VBE LL_PWR_DisableBatteryCharging |
AnnaBridge | 156:ff21514d8981 | 801 | * @retval None |
AnnaBridge | 156:ff21514d8981 | 802 | */ |
AnnaBridge | 156:ff21514d8981 | 803 | __STATIC_INLINE void LL_PWR_DisableBatteryCharging(void) |
AnnaBridge | 156:ff21514d8981 | 804 | { |
AnnaBridge | 156:ff21514d8981 | 805 | CLEAR_BIT(PWR->CR4, PWR_CR4_VBE); |
AnnaBridge | 156:ff21514d8981 | 806 | } |
AnnaBridge | 156:ff21514d8981 | 807 | |
AnnaBridge | 156:ff21514d8981 | 808 | /** |
AnnaBridge | 156:ff21514d8981 | 809 | * @brief Check if battery charging is enabled |
AnnaBridge | 156:ff21514d8981 | 810 | * @rmtoll CR4 VBE LL_PWR_IsEnabledBatteryCharging |
AnnaBridge | 156:ff21514d8981 | 811 | * @retval State of bit (1 or 0). |
AnnaBridge | 156:ff21514d8981 | 812 | */ |
AnnaBridge | 156:ff21514d8981 | 813 | __STATIC_INLINE uint32_t LL_PWR_IsEnabledBatteryCharging(void) |
AnnaBridge | 156:ff21514d8981 | 814 | { |
AnnaBridge | 156:ff21514d8981 | 815 | return (READ_BIT(PWR->CR4, PWR_CR4_VBE) == (PWR_CR4_VBE)); |
AnnaBridge | 156:ff21514d8981 | 816 | } |
AnnaBridge | 156:ff21514d8981 | 817 | |
AnnaBridge | 156:ff21514d8981 | 818 | /** |
AnnaBridge | 156:ff21514d8981 | 819 | * @brief Set the Wake-Up pin polarity low for the event detection |
AnnaBridge | 156:ff21514d8981 | 820 | * @rmtoll CR4 WP1 LL_PWR_SetWakeUpPinPolarityLow\n |
AnnaBridge | 156:ff21514d8981 | 821 | * CR4 WP2 LL_PWR_SetWakeUpPinPolarityLow\n |
AnnaBridge | 156:ff21514d8981 | 822 | * CR4 WP3 LL_PWR_SetWakeUpPinPolarityLow\n |
AnnaBridge | 156:ff21514d8981 | 823 | * CR4 WP4 LL_PWR_SetWakeUpPinPolarityLow\n |
AnnaBridge | 156:ff21514d8981 | 824 | * CR4 WP5 LL_PWR_SetWakeUpPinPolarityLow |
AnnaBridge | 156:ff21514d8981 | 825 | * @param WakeUpPin This parameter can be one of the following values: |
AnnaBridge | 156:ff21514d8981 | 826 | * @arg @ref LL_PWR_WAKEUP_PIN1 |
AnnaBridge | 156:ff21514d8981 | 827 | * @arg @ref LL_PWR_WAKEUP_PIN2 |
AnnaBridge | 156:ff21514d8981 | 828 | * @arg @ref LL_PWR_WAKEUP_PIN3 |
AnnaBridge | 156:ff21514d8981 | 829 | * @arg @ref LL_PWR_WAKEUP_PIN4 |
AnnaBridge | 156:ff21514d8981 | 830 | * @arg @ref LL_PWR_WAKEUP_PIN5 |
AnnaBridge | 156:ff21514d8981 | 831 | * @retval None |
AnnaBridge | 156:ff21514d8981 | 832 | */ |
AnnaBridge | 156:ff21514d8981 | 833 | __STATIC_INLINE void LL_PWR_SetWakeUpPinPolarityLow(uint32_t WakeUpPin) |
AnnaBridge | 156:ff21514d8981 | 834 | { |
AnnaBridge | 156:ff21514d8981 | 835 | SET_BIT(PWR->CR4, WakeUpPin); |
AnnaBridge | 156:ff21514d8981 | 836 | } |
AnnaBridge | 156:ff21514d8981 | 837 | |
AnnaBridge | 156:ff21514d8981 | 838 | /** |
AnnaBridge | 156:ff21514d8981 | 839 | * @brief Set the Wake-Up pin polarity high for the event detection |
AnnaBridge | 156:ff21514d8981 | 840 | * @rmtoll CR4 WP1 LL_PWR_SetWakeUpPinPolarityHigh\n |
AnnaBridge | 156:ff21514d8981 | 841 | * CR4 WP2 LL_PWR_SetWakeUpPinPolarityHigh\n |
AnnaBridge | 156:ff21514d8981 | 842 | * CR4 WP3 LL_PWR_SetWakeUpPinPolarityHigh\n |
AnnaBridge | 156:ff21514d8981 | 843 | * CR4 WP4 LL_PWR_SetWakeUpPinPolarityHigh\n |
AnnaBridge | 156:ff21514d8981 | 844 | * CR4 WP5 LL_PWR_SetWakeUpPinPolarityHigh |
AnnaBridge | 156:ff21514d8981 | 845 | * @param WakeUpPin This parameter can be one of the following values: |
AnnaBridge | 156:ff21514d8981 | 846 | * @arg @ref LL_PWR_WAKEUP_PIN1 |
AnnaBridge | 156:ff21514d8981 | 847 | * @arg @ref LL_PWR_WAKEUP_PIN2 |
AnnaBridge | 156:ff21514d8981 | 848 | * @arg @ref LL_PWR_WAKEUP_PIN3 |
AnnaBridge | 156:ff21514d8981 | 849 | * @arg @ref LL_PWR_WAKEUP_PIN4 |
AnnaBridge | 156:ff21514d8981 | 850 | * @arg @ref LL_PWR_WAKEUP_PIN5 |
AnnaBridge | 156:ff21514d8981 | 851 | * @retval None |
AnnaBridge | 156:ff21514d8981 | 852 | */ |
AnnaBridge | 156:ff21514d8981 | 853 | __STATIC_INLINE void LL_PWR_SetWakeUpPinPolarityHigh(uint32_t WakeUpPin) |
AnnaBridge | 156:ff21514d8981 | 854 | { |
AnnaBridge | 156:ff21514d8981 | 855 | CLEAR_BIT(PWR->CR4, WakeUpPin); |
AnnaBridge | 156:ff21514d8981 | 856 | } |
AnnaBridge | 156:ff21514d8981 | 857 | |
AnnaBridge | 156:ff21514d8981 | 858 | /** |
AnnaBridge | 156:ff21514d8981 | 859 | * @brief Get the Wake-Up pin polarity for the event detection |
AnnaBridge | 156:ff21514d8981 | 860 | * @rmtoll CR4 WP1 LL_PWR_IsWakeUpPinPolarityLow\n |
AnnaBridge | 156:ff21514d8981 | 861 | * CR4 WP2 LL_PWR_IsWakeUpPinPolarityLow\n |
AnnaBridge | 156:ff21514d8981 | 862 | * CR4 WP3 LL_PWR_IsWakeUpPinPolarityLow\n |
AnnaBridge | 156:ff21514d8981 | 863 | * CR4 WP4 LL_PWR_IsWakeUpPinPolarityLow\n |
AnnaBridge | 156:ff21514d8981 | 864 | * CR4 WP5 LL_PWR_IsWakeUpPinPolarityLow |
AnnaBridge | 156:ff21514d8981 | 865 | * @param WakeUpPin This parameter can be one of the following values: |
AnnaBridge | 156:ff21514d8981 | 866 | * @arg @ref LL_PWR_WAKEUP_PIN1 |
AnnaBridge | 156:ff21514d8981 | 867 | * @arg @ref LL_PWR_WAKEUP_PIN2 |
AnnaBridge | 156:ff21514d8981 | 868 | * @arg @ref LL_PWR_WAKEUP_PIN3 |
AnnaBridge | 156:ff21514d8981 | 869 | * @arg @ref LL_PWR_WAKEUP_PIN4 |
AnnaBridge | 156:ff21514d8981 | 870 | * @arg @ref LL_PWR_WAKEUP_PIN5 |
AnnaBridge | 156:ff21514d8981 | 871 | * @retval State of bit (1 or 0). |
AnnaBridge | 156:ff21514d8981 | 872 | */ |
AnnaBridge | 156:ff21514d8981 | 873 | __STATIC_INLINE uint32_t LL_PWR_IsWakeUpPinPolarityLow(uint32_t WakeUpPin) |
AnnaBridge | 156:ff21514d8981 | 874 | { |
AnnaBridge | 156:ff21514d8981 | 875 | return (READ_BIT(PWR->CR4, WakeUpPin) == (WakeUpPin)); |
AnnaBridge | 156:ff21514d8981 | 876 | } |
AnnaBridge | 156:ff21514d8981 | 877 | |
AnnaBridge | 156:ff21514d8981 | 878 | /** |
AnnaBridge | 156:ff21514d8981 | 879 | * @brief Enable GPIO pull-up state in Standby and Shutdown modes |
AnnaBridge | 156:ff21514d8981 | 880 | * @rmtoll PUCRA PU0-15 LL_PWR_EnableGPIOPullUp\n |
AnnaBridge | 156:ff21514d8981 | 881 | * PUCRB PU0-15 LL_PWR_EnableGPIOPullUp\n |
AnnaBridge | 156:ff21514d8981 | 882 | * PUCRC PU0-15 LL_PWR_EnableGPIOPullUp\n |
AnnaBridge | 156:ff21514d8981 | 883 | * PUCRD PU0-15 LL_PWR_EnableGPIOPullUp\n |
AnnaBridge | 156:ff21514d8981 | 884 | * PUCRE PU0-15 LL_PWR_EnableGPIOPullUp\n |
AnnaBridge | 156:ff21514d8981 | 885 | * PUCRF PU0-15 LL_PWR_EnableGPIOPullUp\n |
AnnaBridge | 156:ff21514d8981 | 886 | * PUCRG PU0-15 LL_PWR_EnableGPIOPullUp\n |
AnnaBridge | 156:ff21514d8981 | 887 | * PUCRH PU0-15 LL_PWR_EnableGPIOPullUp\n |
AnnaBridge | 156:ff21514d8981 | 888 | * PUCRI PU0-11 LL_PWR_EnableGPIOPullUp |
AnnaBridge | 156:ff21514d8981 | 889 | * @param GPIO This parameter can be one of the following values: |
AnnaBridge | 156:ff21514d8981 | 890 | * @arg @ref LL_PWR_GPIO_A |
AnnaBridge | 156:ff21514d8981 | 891 | * @arg @ref LL_PWR_GPIO_B |
AnnaBridge | 156:ff21514d8981 | 892 | * @arg @ref LL_PWR_GPIO_C |
AnnaBridge | 156:ff21514d8981 | 893 | * @arg @ref LL_PWR_GPIO_D |
AnnaBridge | 156:ff21514d8981 | 894 | * @arg @ref LL_PWR_GPIO_E |
AnnaBridge | 156:ff21514d8981 | 895 | * @arg @ref LL_PWR_GPIO_F (*) |
AnnaBridge | 156:ff21514d8981 | 896 | * @arg @ref LL_PWR_GPIO_G (*) |
AnnaBridge | 156:ff21514d8981 | 897 | * @arg @ref LL_PWR_GPIO_H |
AnnaBridge | 156:ff21514d8981 | 898 | * @arg @ref LL_PWR_GPIO_I (*) |
AnnaBridge | 156:ff21514d8981 | 899 | * |
AnnaBridge | 156:ff21514d8981 | 900 | * (*) value not defined in all devices |
AnnaBridge | 156:ff21514d8981 | 901 | * @param GPIONumber This parameter can be one of the following values: |
AnnaBridge | 156:ff21514d8981 | 902 | * @arg @ref LL_PWR_GPIO_BIT_0 |
AnnaBridge | 156:ff21514d8981 | 903 | * @arg @ref LL_PWR_GPIO_BIT_1 |
AnnaBridge | 156:ff21514d8981 | 904 | * @arg @ref LL_PWR_GPIO_BIT_2 |
AnnaBridge | 156:ff21514d8981 | 905 | * @arg @ref LL_PWR_GPIO_BIT_3 |
AnnaBridge | 156:ff21514d8981 | 906 | * @arg @ref LL_PWR_GPIO_BIT_4 |
AnnaBridge | 156:ff21514d8981 | 907 | * @arg @ref LL_PWR_GPIO_BIT_5 |
AnnaBridge | 156:ff21514d8981 | 908 | * @arg @ref LL_PWR_GPIO_BIT_6 |
AnnaBridge | 156:ff21514d8981 | 909 | * @arg @ref LL_PWR_GPIO_BIT_7 |
AnnaBridge | 156:ff21514d8981 | 910 | * @arg @ref LL_PWR_GPIO_BIT_8 |
AnnaBridge | 156:ff21514d8981 | 911 | * @arg @ref LL_PWR_GPIO_BIT_9 |
AnnaBridge | 156:ff21514d8981 | 912 | * @arg @ref LL_PWR_GPIO_BIT_10 |
AnnaBridge | 156:ff21514d8981 | 913 | * @arg @ref LL_PWR_GPIO_BIT_11 |
AnnaBridge | 156:ff21514d8981 | 914 | * @arg @ref LL_PWR_GPIO_BIT_12 |
AnnaBridge | 156:ff21514d8981 | 915 | * @arg @ref LL_PWR_GPIO_BIT_13 |
AnnaBridge | 156:ff21514d8981 | 916 | * @arg @ref LL_PWR_GPIO_BIT_14 |
AnnaBridge | 156:ff21514d8981 | 917 | * @arg @ref LL_PWR_GPIO_BIT_15 |
AnnaBridge | 156:ff21514d8981 | 918 | * @retval None |
AnnaBridge | 156:ff21514d8981 | 919 | */ |
AnnaBridge | 156:ff21514d8981 | 920 | __STATIC_INLINE void LL_PWR_EnableGPIOPullUp(uint32_t GPIO, uint32_t GPIONumber) |
AnnaBridge | 156:ff21514d8981 | 921 | { |
AnnaBridge | 156:ff21514d8981 | 922 | SET_BIT(*((uint32_t *)GPIO), GPIONumber); |
AnnaBridge | 156:ff21514d8981 | 923 | } |
AnnaBridge | 156:ff21514d8981 | 924 | |
AnnaBridge | 156:ff21514d8981 | 925 | /** |
AnnaBridge | 156:ff21514d8981 | 926 | * @brief Disable GPIO pull-up state in Standby and Shutdown modes |
AnnaBridge | 156:ff21514d8981 | 927 | * @rmtoll PUCRA PU0-15 LL_PWR_DisableGPIOPullUp\n |
AnnaBridge | 156:ff21514d8981 | 928 | * PUCRB PU0-15 LL_PWR_DisableGPIOPullUp\n |
AnnaBridge | 156:ff21514d8981 | 929 | * PUCRC PU0-15 LL_PWR_DisableGPIOPullUp\n |
AnnaBridge | 156:ff21514d8981 | 930 | * PUCRD PU0-15 LL_PWR_DisableGPIOPullUp\n |
AnnaBridge | 156:ff21514d8981 | 931 | * PUCRE PU0-15 LL_PWR_DisableGPIOPullUp\n |
AnnaBridge | 156:ff21514d8981 | 932 | * PUCRF PU0-15 LL_PWR_DisableGPIOPullUp\n |
AnnaBridge | 156:ff21514d8981 | 933 | * PUCRG PU0-15 LL_PWR_DisableGPIOPullUp\n |
AnnaBridge | 156:ff21514d8981 | 934 | * PUCRH PU0-15 LL_PWR_DisableGPIOPullUp\n |
AnnaBridge | 156:ff21514d8981 | 935 | * PUCRI PU0-11 LL_PWR_DisableGPIOPullUp |
AnnaBridge | 156:ff21514d8981 | 936 | * @param GPIO This parameter can be one of the following values: |
AnnaBridge | 156:ff21514d8981 | 937 | * @arg @ref LL_PWR_GPIO_A |
AnnaBridge | 156:ff21514d8981 | 938 | * @arg @ref LL_PWR_GPIO_B |
AnnaBridge | 156:ff21514d8981 | 939 | * @arg @ref LL_PWR_GPIO_C |
AnnaBridge | 156:ff21514d8981 | 940 | * @arg @ref LL_PWR_GPIO_D |
AnnaBridge | 156:ff21514d8981 | 941 | * @arg @ref LL_PWR_GPIO_E |
AnnaBridge | 156:ff21514d8981 | 942 | * @arg @ref LL_PWR_GPIO_F (*) |
AnnaBridge | 156:ff21514d8981 | 943 | * @arg @ref LL_PWR_GPIO_G (*) |
AnnaBridge | 156:ff21514d8981 | 944 | * @arg @ref LL_PWR_GPIO_H |
AnnaBridge | 156:ff21514d8981 | 945 | * @arg @ref LL_PWR_GPIO_I (*) |
AnnaBridge | 156:ff21514d8981 | 946 | * |
AnnaBridge | 156:ff21514d8981 | 947 | * (*) value not defined in all devices |
AnnaBridge | 156:ff21514d8981 | 948 | * @param GPIONumber This parameter can be one of the following values: |
AnnaBridge | 156:ff21514d8981 | 949 | * @arg @ref LL_PWR_GPIO_BIT_0 |
AnnaBridge | 156:ff21514d8981 | 950 | * @arg @ref LL_PWR_GPIO_BIT_1 |
AnnaBridge | 156:ff21514d8981 | 951 | * @arg @ref LL_PWR_GPIO_BIT_2 |
AnnaBridge | 156:ff21514d8981 | 952 | * @arg @ref LL_PWR_GPIO_BIT_3 |
AnnaBridge | 156:ff21514d8981 | 953 | * @arg @ref LL_PWR_GPIO_BIT_4 |
AnnaBridge | 156:ff21514d8981 | 954 | * @arg @ref LL_PWR_GPIO_BIT_5 |
AnnaBridge | 156:ff21514d8981 | 955 | * @arg @ref LL_PWR_GPIO_BIT_6 |
AnnaBridge | 156:ff21514d8981 | 956 | * @arg @ref LL_PWR_GPIO_BIT_7 |
AnnaBridge | 156:ff21514d8981 | 957 | * @arg @ref LL_PWR_GPIO_BIT_8 |
AnnaBridge | 156:ff21514d8981 | 958 | * @arg @ref LL_PWR_GPIO_BIT_9 |
AnnaBridge | 156:ff21514d8981 | 959 | * @arg @ref LL_PWR_GPIO_BIT_10 |
AnnaBridge | 156:ff21514d8981 | 960 | * @arg @ref LL_PWR_GPIO_BIT_11 |
AnnaBridge | 156:ff21514d8981 | 961 | * @arg @ref LL_PWR_GPIO_BIT_12 |
AnnaBridge | 156:ff21514d8981 | 962 | * @arg @ref LL_PWR_GPIO_BIT_13 |
AnnaBridge | 156:ff21514d8981 | 963 | * @arg @ref LL_PWR_GPIO_BIT_14 |
AnnaBridge | 156:ff21514d8981 | 964 | * @arg @ref LL_PWR_GPIO_BIT_15 |
AnnaBridge | 156:ff21514d8981 | 965 | * @retval None |
AnnaBridge | 156:ff21514d8981 | 966 | */ |
AnnaBridge | 156:ff21514d8981 | 967 | __STATIC_INLINE void LL_PWR_DisableGPIOPullUp(uint32_t GPIO, uint32_t GPIONumber) |
AnnaBridge | 156:ff21514d8981 | 968 | { |
AnnaBridge | 156:ff21514d8981 | 969 | CLEAR_BIT(*((uint32_t *)GPIO), GPIONumber); |
AnnaBridge | 156:ff21514d8981 | 970 | } |
AnnaBridge | 156:ff21514d8981 | 971 | |
AnnaBridge | 156:ff21514d8981 | 972 | /** |
AnnaBridge | 156:ff21514d8981 | 973 | * @brief Check if GPIO pull-up state is enabled |
AnnaBridge | 156:ff21514d8981 | 974 | * @rmtoll PUCRA PU0-15 LL_PWR_IsEnabledGPIOPullUp\n |
AnnaBridge | 156:ff21514d8981 | 975 | * PUCRB PU0-15 LL_PWR_IsEnabledGPIOPullUp\n |
AnnaBridge | 156:ff21514d8981 | 976 | * PUCRC PU0-15 LL_PWR_IsEnabledGPIOPullUp\n |
AnnaBridge | 156:ff21514d8981 | 977 | * PUCRD PU0-15 LL_PWR_IsEnabledGPIOPullUp\n |
AnnaBridge | 156:ff21514d8981 | 978 | * PUCRE PU0-15 LL_PWR_IsEnabledGPIOPullUp\n |
AnnaBridge | 156:ff21514d8981 | 979 | * PUCRF PU0-15 LL_PWR_IsEnabledGPIOPullUp\n |
AnnaBridge | 156:ff21514d8981 | 980 | * PUCRG PU0-15 LL_PWR_IsEnabledGPIOPullUp\n |
AnnaBridge | 156:ff21514d8981 | 981 | * PUCRH PU0-15 LL_PWR_IsEnabledGPIOPullUp\n |
AnnaBridge | 156:ff21514d8981 | 982 | * PUCRI PU0-11 LL_PWR_IsEnabledGPIOPullUp |
AnnaBridge | 156:ff21514d8981 | 983 | * @param GPIO This parameter can be one of the following values: |
AnnaBridge | 156:ff21514d8981 | 984 | * @arg @ref LL_PWR_GPIO_A |
AnnaBridge | 156:ff21514d8981 | 985 | * @arg @ref LL_PWR_GPIO_B |
AnnaBridge | 156:ff21514d8981 | 986 | * @arg @ref LL_PWR_GPIO_C |
AnnaBridge | 156:ff21514d8981 | 987 | * @arg @ref LL_PWR_GPIO_D |
AnnaBridge | 156:ff21514d8981 | 988 | * @arg @ref LL_PWR_GPIO_E |
AnnaBridge | 156:ff21514d8981 | 989 | * @arg @ref LL_PWR_GPIO_F (*) |
AnnaBridge | 156:ff21514d8981 | 990 | * @arg @ref LL_PWR_GPIO_G (*) |
AnnaBridge | 156:ff21514d8981 | 991 | * @arg @ref LL_PWR_GPIO_H |
AnnaBridge | 156:ff21514d8981 | 992 | * @arg @ref LL_PWR_GPIO_I (*) |
AnnaBridge | 156:ff21514d8981 | 993 | * |
AnnaBridge | 156:ff21514d8981 | 994 | * (*) value not defined in all devices |
AnnaBridge | 156:ff21514d8981 | 995 | * @param GPIONumber This parameter can be one of the following values: |
AnnaBridge | 156:ff21514d8981 | 996 | * @arg @ref LL_PWR_GPIO_BIT_0 |
AnnaBridge | 156:ff21514d8981 | 997 | * @arg @ref LL_PWR_GPIO_BIT_1 |
AnnaBridge | 156:ff21514d8981 | 998 | * @arg @ref LL_PWR_GPIO_BIT_2 |
AnnaBridge | 156:ff21514d8981 | 999 | * @arg @ref LL_PWR_GPIO_BIT_3 |
AnnaBridge | 156:ff21514d8981 | 1000 | * @arg @ref LL_PWR_GPIO_BIT_4 |
AnnaBridge | 156:ff21514d8981 | 1001 | * @arg @ref LL_PWR_GPIO_BIT_5 |
AnnaBridge | 156:ff21514d8981 | 1002 | * @arg @ref LL_PWR_GPIO_BIT_6 |
AnnaBridge | 156:ff21514d8981 | 1003 | * @arg @ref LL_PWR_GPIO_BIT_7 |
AnnaBridge | 156:ff21514d8981 | 1004 | * @arg @ref LL_PWR_GPIO_BIT_8 |
AnnaBridge | 156:ff21514d8981 | 1005 | * @arg @ref LL_PWR_GPIO_BIT_9 |
AnnaBridge | 156:ff21514d8981 | 1006 | * @arg @ref LL_PWR_GPIO_BIT_10 |
AnnaBridge | 156:ff21514d8981 | 1007 | * @arg @ref LL_PWR_GPIO_BIT_11 |
AnnaBridge | 156:ff21514d8981 | 1008 | * @arg @ref LL_PWR_GPIO_BIT_12 |
AnnaBridge | 156:ff21514d8981 | 1009 | * @arg @ref LL_PWR_GPIO_BIT_13 |
AnnaBridge | 156:ff21514d8981 | 1010 | * @arg @ref LL_PWR_GPIO_BIT_14 |
AnnaBridge | 156:ff21514d8981 | 1011 | * @arg @ref LL_PWR_GPIO_BIT_15 |
AnnaBridge | 156:ff21514d8981 | 1012 | * @retval State of bit (1 or 0). |
AnnaBridge | 156:ff21514d8981 | 1013 | */ |
AnnaBridge | 156:ff21514d8981 | 1014 | __STATIC_INLINE uint32_t LL_PWR_IsEnabledGPIOPullUp(uint32_t GPIO, uint32_t GPIONumber) |
AnnaBridge | 156:ff21514d8981 | 1015 | { |
AnnaBridge | 156:ff21514d8981 | 1016 | return (READ_BIT(*((uint32_t *)(GPIO)), GPIONumber) == (GPIONumber)); |
AnnaBridge | 156:ff21514d8981 | 1017 | } |
AnnaBridge | 156:ff21514d8981 | 1018 | |
AnnaBridge | 156:ff21514d8981 | 1019 | /** |
AnnaBridge | 156:ff21514d8981 | 1020 | * @brief Enable GPIO pull-down state in Standby and Shutdown modes |
AnnaBridge | 156:ff21514d8981 | 1021 | * @rmtoll PDCRA PD0-15 LL_PWR_EnableGPIOPullDown\n |
AnnaBridge | 156:ff21514d8981 | 1022 | * PDCRB PD0-15 LL_PWR_EnableGPIOPullDown\n |
AnnaBridge | 156:ff21514d8981 | 1023 | * PDCRC PD0-15 LL_PWR_EnableGPIOPullDown\n |
AnnaBridge | 156:ff21514d8981 | 1024 | * PDCRD PD0-15 LL_PWR_EnableGPIOPullDown\n |
AnnaBridge | 156:ff21514d8981 | 1025 | * PDCRE PD0-15 LL_PWR_EnableGPIOPullDown\n |
AnnaBridge | 156:ff21514d8981 | 1026 | * PDCRF PD0-15 LL_PWR_EnableGPIOPullDown\n |
AnnaBridge | 156:ff21514d8981 | 1027 | * PDCRG PD0-15 LL_PWR_EnableGPIOPullDown\n |
AnnaBridge | 156:ff21514d8981 | 1028 | * PDCRH PD0-15 LL_PWR_EnableGPIOPullDown\n |
AnnaBridge | 156:ff21514d8981 | 1029 | * PDCRI PD0-11 LL_PWR_EnableGPIOPullDown |
AnnaBridge | 156:ff21514d8981 | 1030 | * @param GPIO This parameter can be one of the following values: |
AnnaBridge | 156:ff21514d8981 | 1031 | * @arg @ref LL_PWR_GPIO_A |
AnnaBridge | 156:ff21514d8981 | 1032 | * @arg @ref LL_PWR_GPIO_B |
AnnaBridge | 156:ff21514d8981 | 1033 | * @arg @ref LL_PWR_GPIO_C |
AnnaBridge | 156:ff21514d8981 | 1034 | * @arg @ref LL_PWR_GPIO_D |
AnnaBridge | 156:ff21514d8981 | 1035 | * @arg @ref LL_PWR_GPIO_E |
AnnaBridge | 156:ff21514d8981 | 1036 | * @arg @ref LL_PWR_GPIO_F (*) |
AnnaBridge | 156:ff21514d8981 | 1037 | * @arg @ref LL_PWR_GPIO_G (*) |
AnnaBridge | 156:ff21514d8981 | 1038 | * @arg @ref LL_PWR_GPIO_H |
AnnaBridge | 156:ff21514d8981 | 1039 | * @arg @ref LL_PWR_GPIO_I (*) |
AnnaBridge | 156:ff21514d8981 | 1040 | * |
AnnaBridge | 156:ff21514d8981 | 1041 | * (*) value not defined in all devices |
AnnaBridge | 156:ff21514d8981 | 1042 | * @param GPIONumber This parameter can be one of the following values: |
AnnaBridge | 156:ff21514d8981 | 1043 | * @arg @ref LL_PWR_GPIO_BIT_0 |
AnnaBridge | 156:ff21514d8981 | 1044 | * @arg @ref LL_PWR_GPIO_BIT_1 |
AnnaBridge | 156:ff21514d8981 | 1045 | * @arg @ref LL_PWR_GPIO_BIT_2 |
AnnaBridge | 156:ff21514d8981 | 1046 | * @arg @ref LL_PWR_GPIO_BIT_3 |
AnnaBridge | 156:ff21514d8981 | 1047 | * @arg @ref LL_PWR_GPIO_BIT_4 |
AnnaBridge | 156:ff21514d8981 | 1048 | * @arg @ref LL_PWR_GPIO_BIT_5 |
AnnaBridge | 156:ff21514d8981 | 1049 | * @arg @ref LL_PWR_GPIO_BIT_6 |
AnnaBridge | 156:ff21514d8981 | 1050 | * @arg @ref LL_PWR_GPIO_BIT_7 |
AnnaBridge | 156:ff21514d8981 | 1051 | * @arg @ref LL_PWR_GPIO_BIT_8 |
AnnaBridge | 156:ff21514d8981 | 1052 | * @arg @ref LL_PWR_GPIO_BIT_9 |
AnnaBridge | 156:ff21514d8981 | 1053 | * @arg @ref LL_PWR_GPIO_BIT_10 |
AnnaBridge | 156:ff21514d8981 | 1054 | * @arg @ref LL_PWR_GPIO_BIT_11 |
AnnaBridge | 156:ff21514d8981 | 1055 | * @arg @ref LL_PWR_GPIO_BIT_12 |
AnnaBridge | 156:ff21514d8981 | 1056 | * @arg @ref LL_PWR_GPIO_BIT_13 |
AnnaBridge | 156:ff21514d8981 | 1057 | * @arg @ref LL_PWR_GPIO_BIT_14 |
AnnaBridge | 156:ff21514d8981 | 1058 | * @arg @ref LL_PWR_GPIO_BIT_15 |
AnnaBridge | 156:ff21514d8981 | 1059 | * @retval None |
AnnaBridge | 156:ff21514d8981 | 1060 | */ |
AnnaBridge | 156:ff21514d8981 | 1061 | __STATIC_INLINE void LL_PWR_EnableGPIOPullDown(uint32_t GPIO, uint32_t GPIONumber) |
AnnaBridge | 156:ff21514d8981 | 1062 | { |
AnnaBridge | 156:ff21514d8981 | 1063 | register uint32_t temp = (uint32_t)(GPIO) + 4; |
AnnaBridge | 156:ff21514d8981 | 1064 | SET_BIT(*((uint32_t *)(temp)), GPIONumber); |
AnnaBridge | 156:ff21514d8981 | 1065 | } |
AnnaBridge | 156:ff21514d8981 | 1066 | |
AnnaBridge | 156:ff21514d8981 | 1067 | /** |
AnnaBridge | 156:ff21514d8981 | 1068 | * @brief Disable GPIO pull-down state in Standby and Shutdown modes |
AnnaBridge | 156:ff21514d8981 | 1069 | * @rmtoll PDCRA PD0-15 LL_PWR_DisableGPIOPullDown\n |
AnnaBridge | 156:ff21514d8981 | 1070 | * PDCRB PD0-15 LL_PWR_DisableGPIOPullDown\n |
AnnaBridge | 156:ff21514d8981 | 1071 | * PDCRC PD0-15 LL_PWR_DisableGPIOPullDown\n |
AnnaBridge | 156:ff21514d8981 | 1072 | * PDCRD PD0-15 LL_PWR_DisableGPIOPullDown\n |
AnnaBridge | 156:ff21514d8981 | 1073 | * PDCRE PD0-15 LL_PWR_DisableGPIOPullDown\n |
AnnaBridge | 156:ff21514d8981 | 1074 | * PDCRF PD0-15 LL_PWR_DisableGPIOPullDown\n |
AnnaBridge | 156:ff21514d8981 | 1075 | * PDCRG PD0-15 LL_PWR_DisableGPIOPullDown\n |
AnnaBridge | 156:ff21514d8981 | 1076 | * PDCRH PD0-15 LL_PWR_DisableGPIOPullDown\n |
AnnaBridge | 156:ff21514d8981 | 1077 | * PDCRI PD0-11 LL_PWR_DisableGPIOPullDown |
AnnaBridge | 156:ff21514d8981 | 1078 | * @param GPIO This parameter can be one of the following values: |
AnnaBridge | 156:ff21514d8981 | 1079 | * @arg @ref LL_PWR_GPIO_A |
AnnaBridge | 156:ff21514d8981 | 1080 | * @arg @ref LL_PWR_GPIO_B |
AnnaBridge | 156:ff21514d8981 | 1081 | * @arg @ref LL_PWR_GPIO_C |
AnnaBridge | 156:ff21514d8981 | 1082 | * @arg @ref LL_PWR_GPIO_D |
AnnaBridge | 156:ff21514d8981 | 1083 | * @arg @ref LL_PWR_GPIO_E |
AnnaBridge | 156:ff21514d8981 | 1084 | * @arg @ref LL_PWR_GPIO_F (*) |
AnnaBridge | 156:ff21514d8981 | 1085 | * @arg @ref LL_PWR_GPIO_G (*) |
AnnaBridge | 156:ff21514d8981 | 1086 | * @arg @ref LL_PWR_GPIO_H |
AnnaBridge | 156:ff21514d8981 | 1087 | * @arg @ref LL_PWR_GPIO_I (*) |
AnnaBridge | 156:ff21514d8981 | 1088 | * |
AnnaBridge | 156:ff21514d8981 | 1089 | * (*) value not defined in all devices |
AnnaBridge | 156:ff21514d8981 | 1090 | * @param GPIONumber This parameter can be one of the following values: |
AnnaBridge | 156:ff21514d8981 | 1091 | * @arg @ref LL_PWR_GPIO_BIT_0 |
AnnaBridge | 156:ff21514d8981 | 1092 | * @arg @ref LL_PWR_GPIO_BIT_1 |
AnnaBridge | 156:ff21514d8981 | 1093 | * @arg @ref LL_PWR_GPIO_BIT_2 |
AnnaBridge | 156:ff21514d8981 | 1094 | * @arg @ref LL_PWR_GPIO_BIT_3 |
AnnaBridge | 156:ff21514d8981 | 1095 | * @arg @ref LL_PWR_GPIO_BIT_4 |
AnnaBridge | 156:ff21514d8981 | 1096 | * @arg @ref LL_PWR_GPIO_BIT_5 |
AnnaBridge | 156:ff21514d8981 | 1097 | * @arg @ref LL_PWR_GPIO_BIT_6 |
AnnaBridge | 156:ff21514d8981 | 1098 | * @arg @ref LL_PWR_GPIO_BIT_7 |
AnnaBridge | 156:ff21514d8981 | 1099 | * @arg @ref LL_PWR_GPIO_BIT_8 |
AnnaBridge | 156:ff21514d8981 | 1100 | * @arg @ref LL_PWR_GPIO_BIT_9 |
AnnaBridge | 156:ff21514d8981 | 1101 | * @arg @ref LL_PWR_GPIO_BIT_10 |
AnnaBridge | 156:ff21514d8981 | 1102 | * @arg @ref LL_PWR_GPIO_BIT_11 |
AnnaBridge | 156:ff21514d8981 | 1103 | * @arg @ref LL_PWR_GPIO_BIT_12 |
AnnaBridge | 156:ff21514d8981 | 1104 | * @arg @ref LL_PWR_GPIO_BIT_13 |
AnnaBridge | 156:ff21514d8981 | 1105 | * @arg @ref LL_PWR_GPIO_BIT_14 |
AnnaBridge | 156:ff21514d8981 | 1106 | * @arg @ref LL_PWR_GPIO_BIT_15 |
AnnaBridge | 156:ff21514d8981 | 1107 | * @retval None |
AnnaBridge | 156:ff21514d8981 | 1108 | */ |
AnnaBridge | 156:ff21514d8981 | 1109 | __STATIC_INLINE void LL_PWR_DisableGPIOPullDown(uint32_t GPIO, uint32_t GPIONumber) |
AnnaBridge | 156:ff21514d8981 | 1110 | { |
AnnaBridge | 156:ff21514d8981 | 1111 | register uint32_t temp = (uint32_t)(GPIO) + 4; |
AnnaBridge | 156:ff21514d8981 | 1112 | CLEAR_BIT(*((uint32_t *)(temp)), GPIONumber); |
AnnaBridge | 156:ff21514d8981 | 1113 | } |
AnnaBridge | 156:ff21514d8981 | 1114 | |
AnnaBridge | 156:ff21514d8981 | 1115 | /** |
AnnaBridge | 156:ff21514d8981 | 1116 | * @brief Check if GPIO pull-down state is enabled |
AnnaBridge | 156:ff21514d8981 | 1117 | * @rmtoll PDCRA PD0-15 LL_PWR_IsEnabledGPIOPullDown\n |
AnnaBridge | 156:ff21514d8981 | 1118 | * PDCRB PD0-15 LL_PWR_IsEnabledGPIOPullDown\n |
AnnaBridge | 156:ff21514d8981 | 1119 | * PDCRC PD0-15 LL_PWR_IsEnabledGPIOPullDown\n |
AnnaBridge | 156:ff21514d8981 | 1120 | * PDCRD PD0-15 LL_PWR_IsEnabledGPIOPullDown\n |
AnnaBridge | 156:ff21514d8981 | 1121 | * PDCRE PD0-15 LL_PWR_IsEnabledGPIOPullDown\n |
AnnaBridge | 156:ff21514d8981 | 1122 | * PDCRF PD0-15 LL_PWR_IsEnabledGPIOPullDown\n |
AnnaBridge | 156:ff21514d8981 | 1123 | * PDCRG PD0-15 LL_PWR_IsEnabledGPIOPullDown\n |
AnnaBridge | 156:ff21514d8981 | 1124 | * PDCRH PD0-15 LL_PWR_IsEnabledGPIOPullDown\n |
AnnaBridge | 156:ff21514d8981 | 1125 | * PDCRI PD0-11 LL_PWR_IsEnabledGPIOPullDown |
AnnaBridge | 156:ff21514d8981 | 1126 | * @param GPIO This parameter can be one of the following values: |
AnnaBridge | 156:ff21514d8981 | 1127 | * @arg @ref LL_PWR_GPIO_A |
AnnaBridge | 156:ff21514d8981 | 1128 | * @arg @ref LL_PWR_GPIO_B |
AnnaBridge | 156:ff21514d8981 | 1129 | * @arg @ref LL_PWR_GPIO_C |
AnnaBridge | 156:ff21514d8981 | 1130 | * @arg @ref LL_PWR_GPIO_D |
AnnaBridge | 156:ff21514d8981 | 1131 | * @arg @ref LL_PWR_GPIO_E |
AnnaBridge | 156:ff21514d8981 | 1132 | * @arg @ref LL_PWR_GPIO_F (*) |
AnnaBridge | 156:ff21514d8981 | 1133 | * @arg @ref LL_PWR_GPIO_G (*) |
AnnaBridge | 156:ff21514d8981 | 1134 | * @arg @ref LL_PWR_GPIO_H |
AnnaBridge | 156:ff21514d8981 | 1135 | * @arg @ref LL_PWR_GPIO_I (*) |
AnnaBridge | 156:ff21514d8981 | 1136 | * |
AnnaBridge | 156:ff21514d8981 | 1137 | * (*) value not defined in all devices |
AnnaBridge | 156:ff21514d8981 | 1138 | * @param GPIONumber This parameter can be one of the following values: |
AnnaBridge | 156:ff21514d8981 | 1139 | * @arg @ref LL_PWR_GPIO_BIT_0 |
AnnaBridge | 156:ff21514d8981 | 1140 | * @arg @ref LL_PWR_GPIO_BIT_1 |
AnnaBridge | 156:ff21514d8981 | 1141 | * @arg @ref LL_PWR_GPIO_BIT_2 |
AnnaBridge | 156:ff21514d8981 | 1142 | * @arg @ref LL_PWR_GPIO_BIT_3 |
AnnaBridge | 156:ff21514d8981 | 1143 | * @arg @ref LL_PWR_GPIO_BIT_4 |
AnnaBridge | 156:ff21514d8981 | 1144 | * @arg @ref LL_PWR_GPIO_BIT_5 |
AnnaBridge | 156:ff21514d8981 | 1145 | * @arg @ref LL_PWR_GPIO_BIT_6 |
AnnaBridge | 156:ff21514d8981 | 1146 | * @arg @ref LL_PWR_GPIO_BIT_7 |
AnnaBridge | 156:ff21514d8981 | 1147 | * @arg @ref LL_PWR_GPIO_BIT_8 |
AnnaBridge | 156:ff21514d8981 | 1148 | * @arg @ref LL_PWR_GPIO_BIT_9 |
AnnaBridge | 156:ff21514d8981 | 1149 | * @arg @ref LL_PWR_GPIO_BIT_10 |
AnnaBridge | 156:ff21514d8981 | 1150 | * @arg @ref LL_PWR_GPIO_BIT_11 |
AnnaBridge | 156:ff21514d8981 | 1151 | * @arg @ref LL_PWR_GPIO_BIT_12 |
AnnaBridge | 156:ff21514d8981 | 1152 | * @arg @ref LL_PWR_GPIO_BIT_13 |
AnnaBridge | 156:ff21514d8981 | 1153 | * @arg @ref LL_PWR_GPIO_BIT_14 |
AnnaBridge | 156:ff21514d8981 | 1154 | * @arg @ref LL_PWR_GPIO_BIT_15 |
AnnaBridge | 156:ff21514d8981 | 1155 | * @retval State of bit (1 or 0). |
AnnaBridge | 156:ff21514d8981 | 1156 | */ |
AnnaBridge | 156:ff21514d8981 | 1157 | __STATIC_INLINE uint32_t LL_PWR_IsEnabledGPIOPullDown(uint32_t GPIO, uint32_t GPIONumber) |
AnnaBridge | 156:ff21514d8981 | 1158 | { |
AnnaBridge | 156:ff21514d8981 | 1159 | register uint32_t temp = (uint32_t)(GPIO) + 4; |
AnnaBridge | 156:ff21514d8981 | 1160 | return (READ_BIT(*((uint32_t *)(temp)), GPIONumber) == (GPIONumber)); |
AnnaBridge | 156:ff21514d8981 | 1161 | } |
AnnaBridge | 156:ff21514d8981 | 1162 | |
AnnaBridge | 156:ff21514d8981 | 1163 | /** |
AnnaBridge | 156:ff21514d8981 | 1164 | * @} |
AnnaBridge | 156:ff21514d8981 | 1165 | */ |
AnnaBridge | 156:ff21514d8981 | 1166 | |
AnnaBridge | 156:ff21514d8981 | 1167 | /** @defgroup PWR_LL_EF_FLAG_Management FLAG_Management |
AnnaBridge | 156:ff21514d8981 | 1168 | * @{ |
AnnaBridge | 156:ff21514d8981 | 1169 | */ |
AnnaBridge | 156:ff21514d8981 | 1170 | |
AnnaBridge | 156:ff21514d8981 | 1171 | /** |
AnnaBridge | 156:ff21514d8981 | 1172 | * @brief Get Internal Wake-up line Flag |
AnnaBridge | 156:ff21514d8981 | 1173 | * @rmtoll SR1 WUFI LL_PWR_IsActiveFlag_InternWU |
AnnaBridge | 156:ff21514d8981 | 1174 | * @retval State of bit (1 or 0). |
AnnaBridge | 156:ff21514d8981 | 1175 | */ |
AnnaBridge | 156:ff21514d8981 | 1176 | __STATIC_INLINE uint32_t LL_PWR_IsActiveFlag_InternWU(void) |
AnnaBridge | 156:ff21514d8981 | 1177 | { |
AnnaBridge | 156:ff21514d8981 | 1178 | return (READ_BIT(PWR->SR1, PWR_SR1_WUFI) == (PWR_SR1_WUFI)); |
AnnaBridge | 156:ff21514d8981 | 1179 | } |
AnnaBridge | 156:ff21514d8981 | 1180 | |
AnnaBridge | 156:ff21514d8981 | 1181 | /** |
AnnaBridge | 156:ff21514d8981 | 1182 | * @brief Get Stand-By Flag |
AnnaBridge | 156:ff21514d8981 | 1183 | * @rmtoll SR1 SBF LL_PWR_IsActiveFlag_SB |
AnnaBridge | 156:ff21514d8981 | 1184 | * @retval State of bit (1 or 0). |
AnnaBridge | 156:ff21514d8981 | 1185 | */ |
AnnaBridge | 156:ff21514d8981 | 1186 | __STATIC_INLINE uint32_t LL_PWR_IsActiveFlag_SB(void) |
AnnaBridge | 156:ff21514d8981 | 1187 | { |
AnnaBridge | 156:ff21514d8981 | 1188 | return (READ_BIT(PWR->SR1, PWR_SR1_SBF) == (PWR_SR1_SBF)); |
AnnaBridge | 156:ff21514d8981 | 1189 | } |
AnnaBridge | 156:ff21514d8981 | 1190 | |
AnnaBridge | 156:ff21514d8981 | 1191 | /** |
AnnaBridge | 156:ff21514d8981 | 1192 | * @brief Get Wake-up Flag 5 |
AnnaBridge | 156:ff21514d8981 | 1193 | * @rmtoll SR1 WUF5 LL_PWR_IsActiveFlag_WU5 |
AnnaBridge | 156:ff21514d8981 | 1194 | * @retval State of bit (1 or 0). |
AnnaBridge | 156:ff21514d8981 | 1195 | */ |
AnnaBridge | 156:ff21514d8981 | 1196 | __STATIC_INLINE uint32_t LL_PWR_IsActiveFlag_WU5(void) |
AnnaBridge | 156:ff21514d8981 | 1197 | { |
AnnaBridge | 156:ff21514d8981 | 1198 | return (READ_BIT(PWR->SR1, PWR_SR1_WUF5) == (PWR_SR1_WUF5)); |
AnnaBridge | 156:ff21514d8981 | 1199 | } |
AnnaBridge | 156:ff21514d8981 | 1200 | |
AnnaBridge | 156:ff21514d8981 | 1201 | /** |
AnnaBridge | 156:ff21514d8981 | 1202 | * @brief Get Wake-up Flag 4 |
AnnaBridge | 156:ff21514d8981 | 1203 | * @rmtoll SR1 WUF4 LL_PWR_IsActiveFlag_WU4 |
AnnaBridge | 156:ff21514d8981 | 1204 | * @retval State of bit (1 or 0). |
AnnaBridge | 156:ff21514d8981 | 1205 | */ |
AnnaBridge | 156:ff21514d8981 | 1206 | __STATIC_INLINE uint32_t LL_PWR_IsActiveFlag_WU4(void) |
AnnaBridge | 156:ff21514d8981 | 1207 | { |
AnnaBridge | 156:ff21514d8981 | 1208 | return (READ_BIT(PWR->SR1, PWR_SR1_WUF4) == (PWR_SR1_WUF4)); |
AnnaBridge | 156:ff21514d8981 | 1209 | } |
AnnaBridge | 156:ff21514d8981 | 1210 | |
AnnaBridge | 156:ff21514d8981 | 1211 | /** |
AnnaBridge | 156:ff21514d8981 | 1212 | * @brief Get Wake-up Flag 3 |
AnnaBridge | 156:ff21514d8981 | 1213 | * @rmtoll SR1 WUF3 LL_PWR_IsActiveFlag_WU3 |
AnnaBridge | 156:ff21514d8981 | 1214 | * @retval State of bit (1 or 0). |
AnnaBridge | 156:ff21514d8981 | 1215 | */ |
AnnaBridge | 156:ff21514d8981 | 1216 | __STATIC_INLINE uint32_t LL_PWR_IsActiveFlag_WU3(void) |
AnnaBridge | 156:ff21514d8981 | 1217 | { |
AnnaBridge | 156:ff21514d8981 | 1218 | return (READ_BIT(PWR->SR1, PWR_SR1_WUF3) == (PWR_SR1_WUF3)); |
AnnaBridge | 156:ff21514d8981 | 1219 | } |
AnnaBridge | 156:ff21514d8981 | 1220 | |
AnnaBridge | 156:ff21514d8981 | 1221 | /** |
AnnaBridge | 156:ff21514d8981 | 1222 | * @brief Get Wake-up Flag 2 |
AnnaBridge | 156:ff21514d8981 | 1223 | * @rmtoll SR1 WUF2 LL_PWR_IsActiveFlag_WU2 |
AnnaBridge | 156:ff21514d8981 | 1224 | * @retval State of bit (1 or 0). |
AnnaBridge | 156:ff21514d8981 | 1225 | */ |
AnnaBridge | 156:ff21514d8981 | 1226 | __STATIC_INLINE uint32_t LL_PWR_IsActiveFlag_WU2(void) |
AnnaBridge | 156:ff21514d8981 | 1227 | { |
AnnaBridge | 156:ff21514d8981 | 1228 | return (READ_BIT(PWR->SR1, PWR_SR1_WUF2) == (PWR_SR1_WUF2)); |
AnnaBridge | 156:ff21514d8981 | 1229 | } |
AnnaBridge | 156:ff21514d8981 | 1230 | |
AnnaBridge | 156:ff21514d8981 | 1231 | /** |
AnnaBridge | 156:ff21514d8981 | 1232 | * @brief Get Wake-up Flag 1 |
AnnaBridge | 156:ff21514d8981 | 1233 | * @rmtoll SR1 WUF1 LL_PWR_IsActiveFlag_WU1 |
AnnaBridge | 156:ff21514d8981 | 1234 | * @retval State of bit (1 or 0). |
AnnaBridge | 156:ff21514d8981 | 1235 | */ |
AnnaBridge | 156:ff21514d8981 | 1236 | __STATIC_INLINE uint32_t LL_PWR_IsActiveFlag_WU1(void) |
AnnaBridge | 156:ff21514d8981 | 1237 | { |
AnnaBridge | 156:ff21514d8981 | 1238 | return (READ_BIT(PWR->SR1, PWR_SR1_WUF1) == (PWR_SR1_WUF1)); |
AnnaBridge | 156:ff21514d8981 | 1239 | } |
AnnaBridge | 156:ff21514d8981 | 1240 | |
AnnaBridge | 156:ff21514d8981 | 1241 | /** |
AnnaBridge | 156:ff21514d8981 | 1242 | * @brief Clear Stand-By Flag |
AnnaBridge | 156:ff21514d8981 | 1243 | * @rmtoll SCR CSBF LL_PWR_ClearFlag_SB |
AnnaBridge | 156:ff21514d8981 | 1244 | * @retval None |
AnnaBridge | 156:ff21514d8981 | 1245 | */ |
AnnaBridge | 156:ff21514d8981 | 1246 | __STATIC_INLINE void LL_PWR_ClearFlag_SB(void) |
AnnaBridge | 156:ff21514d8981 | 1247 | { |
AnnaBridge | 156:ff21514d8981 | 1248 | WRITE_REG(PWR->SCR, PWR_SCR_CSBF); |
AnnaBridge | 156:ff21514d8981 | 1249 | } |
AnnaBridge | 156:ff21514d8981 | 1250 | |
AnnaBridge | 156:ff21514d8981 | 1251 | /** |
AnnaBridge | 156:ff21514d8981 | 1252 | * @brief Clear Wake-up Flags |
AnnaBridge | 156:ff21514d8981 | 1253 | * @rmtoll SCR CWUF LL_PWR_ClearFlag_WU |
AnnaBridge | 156:ff21514d8981 | 1254 | * @retval None |
AnnaBridge | 156:ff21514d8981 | 1255 | */ |
AnnaBridge | 156:ff21514d8981 | 1256 | __STATIC_INLINE void LL_PWR_ClearFlag_WU(void) |
AnnaBridge | 156:ff21514d8981 | 1257 | { |
AnnaBridge | 156:ff21514d8981 | 1258 | WRITE_REG(PWR->SCR, PWR_SCR_CWUF); |
AnnaBridge | 156:ff21514d8981 | 1259 | } |
AnnaBridge | 156:ff21514d8981 | 1260 | |
AnnaBridge | 156:ff21514d8981 | 1261 | /** |
AnnaBridge | 156:ff21514d8981 | 1262 | * @brief Clear Wake-up Flag 5 |
AnnaBridge | 156:ff21514d8981 | 1263 | * @rmtoll SCR CWUF5 LL_PWR_ClearFlag_WU5 |
AnnaBridge | 156:ff21514d8981 | 1264 | * @retval None |
AnnaBridge | 156:ff21514d8981 | 1265 | */ |
AnnaBridge | 156:ff21514d8981 | 1266 | __STATIC_INLINE void LL_PWR_ClearFlag_WU5(void) |
AnnaBridge | 156:ff21514d8981 | 1267 | { |
AnnaBridge | 156:ff21514d8981 | 1268 | WRITE_REG(PWR->SCR, PWR_SCR_CWUF5); |
AnnaBridge | 156:ff21514d8981 | 1269 | } |
AnnaBridge | 156:ff21514d8981 | 1270 | |
AnnaBridge | 156:ff21514d8981 | 1271 | /** |
AnnaBridge | 156:ff21514d8981 | 1272 | * @brief Clear Wake-up Flag 4 |
AnnaBridge | 156:ff21514d8981 | 1273 | * @rmtoll SCR CWUF4 LL_PWR_ClearFlag_WU4 |
AnnaBridge | 156:ff21514d8981 | 1274 | * @retval None |
AnnaBridge | 156:ff21514d8981 | 1275 | */ |
AnnaBridge | 156:ff21514d8981 | 1276 | __STATIC_INLINE void LL_PWR_ClearFlag_WU4(void) |
AnnaBridge | 156:ff21514d8981 | 1277 | { |
AnnaBridge | 156:ff21514d8981 | 1278 | WRITE_REG(PWR->SCR, PWR_SCR_CWUF4); |
AnnaBridge | 156:ff21514d8981 | 1279 | } |
AnnaBridge | 156:ff21514d8981 | 1280 | |
AnnaBridge | 156:ff21514d8981 | 1281 | /** |
AnnaBridge | 156:ff21514d8981 | 1282 | * @brief Clear Wake-up Flag 3 |
AnnaBridge | 156:ff21514d8981 | 1283 | * @rmtoll SCR CWUF3 LL_PWR_ClearFlag_WU3 |
AnnaBridge | 156:ff21514d8981 | 1284 | * @retval None |
AnnaBridge | 156:ff21514d8981 | 1285 | */ |
AnnaBridge | 156:ff21514d8981 | 1286 | __STATIC_INLINE void LL_PWR_ClearFlag_WU3(void) |
AnnaBridge | 156:ff21514d8981 | 1287 | { |
AnnaBridge | 156:ff21514d8981 | 1288 | WRITE_REG(PWR->SCR, PWR_SCR_CWUF3); |
AnnaBridge | 156:ff21514d8981 | 1289 | } |
AnnaBridge | 156:ff21514d8981 | 1290 | |
AnnaBridge | 156:ff21514d8981 | 1291 | /** |
AnnaBridge | 156:ff21514d8981 | 1292 | * @brief Clear Wake-up Flag 2 |
AnnaBridge | 156:ff21514d8981 | 1293 | * @rmtoll SCR CWUF2 LL_PWR_ClearFlag_WU2 |
AnnaBridge | 156:ff21514d8981 | 1294 | * @retval None |
AnnaBridge | 156:ff21514d8981 | 1295 | */ |
AnnaBridge | 156:ff21514d8981 | 1296 | __STATIC_INLINE void LL_PWR_ClearFlag_WU2(void) |
AnnaBridge | 156:ff21514d8981 | 1297 | { |
AnnaBridge | 156:ff21514d8981 | 1298 | WRITE_REG(PWR->SCR, PWR_SCR_CWUF2); |
AnnaBridge | 156:ff21514d8981 | 1299 | } |
AnnaBridge | 156:ff21514d8981 | 1300 | |
AnnaBridge | 156:ff21514d8981 | 1301 | /** |
AnnaBridge | 156:ff21514d8981 | 1302 | * @brief Clear Wake-up Flag 1 |
AnnaBridge | 156:ff21514d8981 | 1303 | * @rmtoll SCR CWUF1 LL_PWR_ClearFlag_WU1 |
AnnaBridge | 156:ff21514d8981 | 1304 | * @retval None |
AnnaBridge | 156:ff21514d8981 | 1305 | */ |
AnnaBridge | 156:ff21514d8981 | 1306 | __STATIC_INLINE void LL_PWR_ClearFlag_WU1(void) |
AnnaBridge | 156:ff21514d8981 | 1307 | { |
AnnaBridge | 156:ff21514d8981 | 1308 | WRITE_REG(PWR->SCR, PWR_SCR_CWUF1); |
AnnaBridge | 156:ff21514d8981 | 1309 | } |
AnnaBridge | 156:ff21514d8981 | 1310 | |
AnnaBridge | 156:ff21514d8981 | 1311 | /** |
AnnaBridge | 156:ff21514d8981 | 1312 | * @brief Indicate whether VDDA voltage is below or above PVM4 threshold |
AnnaBridge | 156:ff21514d8981 | 1313 | * @rmtoll SR2 PVMO4 LL_PWR_IsActiveFlag_PVMO4 |
AnnaBridge | 156:ff21514d8981 | 1314 | * @retval State of bit (1 or 0). |
AnnaBridge | 156:ff21514d8981 | 1315 | */ |
AnnaBridge | 156:ff21514d8981 | 1316 | __STATIC_INLINE uint32_t LL_PWR_IsActiveFlag_PVMO4(void) |
AnnaBridge | 156:ff21514d8981 | 1317 | { |
AnnaBridge | 156:ff21514d8981 | 1318 | return (READ_BIT(PWR->SR2, PWR_SR2_PVMO4) == (PWR_SR2_PVMO4)); |
AnnaBridge | 156:ff21514d8981 | 1319 | } |
AnnaBridge | 156:ff21514d8981 | 1320 | |
AnnaBridge | 156:ff21514d8981 | 1321 | /** |
AnnaBridge | 156:ff21514d8981 | 1322 | * @brief Indicate whether VDDA voltage is below or above PVM3 threshold |
AnnaBridge | 156:ff21514d8981 | 1323 | * @rmtoll SR2 PVMO3 LL_PWR_IsActiveFlag_PVMO3 |
AnnaBridge | 156:ff21514d8981 | 1324 | * @retval State of bit (1 or 0). |
AnnaBridge | 156:ff21514d8981 | 1325 | */ |
AnnaBridge | 156:ff21514d8981 | 1326 | __STATIC_INLINE uint32_t LL_PWR_IsActiveFlag_PVMO3(void) |
AnnaBridge | 156:ff21514d8981 | 1327 | { |
AnnaBridge | 156:ff21514d8981 | 1328 | return (READ_BIT(PWR->SR2, PWR_SR2_PVMO3) == (PWR_SR2_PVMO3)); |
AnnaBridge | 156:ff21514d8981 | 1329 | } |
AnnaBridge | 156:ff21514d8981 | 1330 | |
AnnaBridge | 156:ff21514d8981 | 1331 | #if defined(PWR_SR2_PVMO2) |
AnnaBridge | 156:ff21514d8981 | 1332 | /** |
AnnaBridge | 156:ff21514d8981 | 1333 | * @brief Indicate whether VDDIO2 voltage is below or above PVM2 threshold |
AnnaBridge | 156:ff21514d8981 | 1334 | * @rmtoll SR2 PVMO2 LL_PWR_IsActiveFlag_PVMO2 |
AnnaBridge | 156:ff21514d8981 | 1335 | * @retval State of bit (1 or 0). |
AnnaBridge | 156:ff21514d8981 | 1336 | */ |
AnnaBridge | 156:ff21514d8981 | 1337 | __STATIC_INLINE uint32_t LL_PWR_IsActiveFlag_PVMO2(void) |
AnnaBridge | 156:ff21514d8981 | 1338 | { |
AnnaBridge | 156:ff21514d8981 | 1339 | return (READ_BIT(PWR->SR2, PWR_SR2_PVMO2) == (PWR_SR2_PVMO2)); |
AnnaBridge | 156:ff21514d8981 | 1340 | } |
AnnaBridge | 156:ff21514d8981 | 1341 | #endif /* PWR_SR2_PVMO2 */ |
AnnaBridge | 156:ff21514d8981 | 1342 | |
AnnaBridge | 156:ff21514d8981 | 1343 | #if defined(PWR_SR2_PVMO1) |
AnnaBridge | 156:ff21514d8981 | 1344 | /** |
AnnaBridge | 156:ff21514d8981 | 1345 | * @brief Indicate whether VDDUSB voltage is below or above PVM1 threshold |
AnnaBridge | 156:ff21514d8981 | 1346 | * @rmtoll SR2 PVMO1 LL_PWR_IsActiveFlag_PVMO1 |
AnnaBridge | 156:ff21514d8981 | 1347 | * @retval State of bit (1 or 0). |
AnnaBridge | 156:ff21514d8981 | 1348 | */ |
AnnaBridge | 156:ff21514d8981 | 1349 | __STATIC_INLINE uint32_t LL_PWR_IsActiveFlag_PVMO1(void) |
AnnaBridge | 156:ff21514d8981 | 1350 | { |
AnnaBridge | 156:ff21514d8981 | 1351 | return (READ_BIT(PWR->SR2, PWR_SR2_PVMO1) == (PWR_SR2_PVMO1)); |
AnnaBridge | 156:ff21514d8981 | 1352 | } |
AnnaBridge | 156:ff21514d8981 | 1353 | #endif /* PWR_SR2_PVMO1 */ |
AnnaBridge | 156:ff21514d8981 | 1354 | |
AnnaBridge | 156:ff21514d8981 | 1355 | /** |
AnnaBridge | 156:ff21514d8981 | 1356 | * @brief Indicate whether VDD voltage is below or above the selected PVD threshold |
AnnaBridge | 156:ff21514d8981 | 1357 | * @rmtoll SR2 PVDO LL_PWR_IsActiveFlag_PVDO |
AnnaBridge | 156:ff21514d8981 | 1358 | * @retval State of bit (1 or 0). |
AnnaBridge | 156:ff21514d8981 | 1359 | */ |
AnnaBridge | 156:ff21514d8981 | 1360 | __STATIC_INLINE uint32_t LL_PWR_IsActiveFlag_PVDO(void) |
AnnaBridge | 156:ff21514d8981 | 1361 | { |
AnnaBridge | 156:ff21514d8981 | 1362 | return (READ_BIT(PWR->SR2, PWR_SR2_PVDO) == (PWR_SR2_PVDO)); |
AnnaBridge | 156:ff21514d8981 | 1363 | } |
AnnaBridge | 156:ff21514d8981 | 1364 | |
AnnaBridge | 156:ff21514d8981 | 1365 | /** |
AnnaBridge | 156:ff21514d8981 | 1366 | * @brief Indicate whether the regulator is ready in the selected voltage range or if its output voltage is still changing to the required voltage level |
AnnaBridge | 156:ff21514d8981 | 1367 | * @rmtoll SR2 VOSF LL_PWR_IsActiveFlag_VOS |
AnnaBridge | 156:ff21514d8981 | 1368 | * @retval State of bit (1 or 0). |
AnnaBridge | 156:ff21514d8981 | 1369 | */ |
AnnaBridge | 156:ff21514d8981 | 1370 | __STATIC_INLINE uint32_t LL_PWR_IsActiveFlag_VOS(void) |
AnnaBridge | 156:ff21514d8981 | 1371 | { |
AnnaBridge | 156:ff21514d8981 | 1372 | return (READ_BIT(PWR->SR2, PWR_SR2_VOSF) == (PWR_SR2_VOSF)); |
AnnaBridge | 156:ff21514d8981 | 1373 | } |
AnnaBridge | 156:ff21514d8981 | 1374 | |
AnnaBridge | 156:ff21514d8981 | 1375 | /** |
AnnaBridge | 156:ff21514d8981 | 1376 | * @brief Indicate whether the regulator is ready in main mode or is in low-power mode |
AnnaBridge | 156:ff21514d8981 | 1377 | * @note: Take care, return value "0" means the regulator is ready. Return value "1" means the output voltage range is still changing. |
AnnaBridge | 156:ff21514d8981 | 1378 | * @rmtoll SR2 REGLPF LL_PWR_IsActiveFlag_REGLPF |
AnnaBridge | 156:ff21514d8981 | 1379 | * @retval State of bit (1 or 0). |
AnnaBridge | 156:ff21514d8981 | 1380 | */ |
AnnaBridge | 156:ff21514d8981 | 1381 | __STATIC_INLINE uint32_t LL_PWR_IsActiveFlag_REGLPF(void) |
AnnaBridge | 156:ff21514d8981 | 1382 | { |
AnnaBridge | 156:ff21514d8981 | 1383 | return (READ_BIT(PWR->SR2, PWR_SR2_REGLPF) == (PWR_SR2_REGLPF)); |
AnnaBridge | 156:ff21514d8981 | 1384 | } |
AnnaBridge | 156:ff21514d8981 | 1385 | |
AnnaBridge | 156:ff21514d8981 | 1386 | /** |
AnnaBridge | 156:ff21514d8981 | 1387 | * @brief Indicate whether or not the low-power regulator is ready |
AnnaBridge | 156:ff21514d8981 | 1388 | * @rmtoll SR2 REGLPS LL_PWR_IsActiveFlag_REGLPS |
AnnaBridge | 156:ff21514d8981 | 1389 | * @retval State of bit (1 or 0). |
AnnaBridge | 156:ff21514d8981 | 1390 | */ |
AnnaBridge | 156:ff21514d8981 | 1391 | __STATIC_INLINE uint32_t LL_PWR_IsActiveFlag_REGLPS(void) |
AnnaBridge | 156:ff21514d8981 | 1392 | { |
AnnaBridge | 156:ff21514d8981 | 1393 | return (READ_BIT(PWR->SR2, PWR_SR2_REGLPS) == (PWR_SR2_REGLPS)); |
AnnaBridge | 156:ff21514d8981 | 1394 | } |
AnnaBridge | 156:ff21514d8981 | 1395 | |
AnnaBridge | 156:ff21514d8981 | 1396 | /** |
AnnaBridge | 156:ff21514d8981 | 1397 | * @} |
AnnaBridge | 156:ff21514d8981 | 1398 | */ |
AnnaBridge | 156:ff21514d8981 | 1399 | |
AnnaBridge | 156:ff21514d8981 | 1400 | #if defined(USE_FULL_LL_DRIVER) |
AnnaBridge | 156:ff21514d8981 | 1401 | /** @defgroup PWR_LL_EF_Init De-initialization function |
AnnaBridge | 156:ff21514d8981 | 1402 | * @{ |
AnnaBridge | 156:ff21514d8981 | 1403 | */ |
AnnaBridge | 156:ff21514d8981 | 1404 | ErrorStatus LL_PWR_DeInit(void); |
AnnaBridge | 156:ff21514d8981 | 1405 | /** |
AnnaBridge | 156:ff21514d8981 | 1406 | * @} |
AnnaBridge | 156:ff21514d8981 | 1407 | */ |
AnnaBridge | 156:ff21514d8981 | 1408 | #endif /* USE_FULL_LL_DRIVER */ |
AnnaBridge | 156:ff21514d8981 | 1409 | |
AnnaBridge | 156:ff21514d8981 | 1410 | /** Legacy definitions for compatibility purpose |
AnnaBridge | 156:ff21514d8981 | 1411 | @cond 0 |
AnnaBridge | 156:ff21514d8981 | 1412 | */ |
AnnaBridge | 156:ff21514d8981 | 1413 | /* Old functions name kept for legacy purpose, to be replaced by the */ |
AnnaBridge | 156:ff21514d8981 | 1414 | /* current functions name. */ |
AnnaBridge | 156:ff21514d8981 | 1415 | #define LL_PWR_IsActiveFlag_VOSF LL_PWR_IsActiveFlag_VOS |
AnnaBridge | 156:ff21514d8981 | 1416 | /** |
AnnaBridge | 156:ff21514d8981 | 1417 | @endcond |
AnnaBridge | 156:ff21514d8981 | 1418 | */ |
AnnaBridge | 156:ff21514d8981 | 1419 | |
AnnaBridge | 156:ff21514d8981 | 1420 | /** |
AnnaBridge | 156:ff21514d8981 | 1421 | * @} |
AnnaBridge | 156:ff21514d8981 | 1422 | */ |
AnnaBridge | 156:ff21514d8981 | 1423 | |
AnnaBridge | 156:ff21514d8981 | 1424 | /** |
AnnaBridge | 156:ff21514d8981 | 1425 | * @} |
AnnaBridge | 156:ff21514d8981 | 1426 | */ |
AnnaBridge | 156:ff21514d8981 | 1427 | |
AnnaBridge | 156:ff21514d8981 | 1428 | #endif /* defined(PWR) */ |
AnnaBridge | 156:ff21514d8981 | 1429 | |
AnnaBridge | 156:ff21514d8981 | 1430 | /** |
AnnaBridge | 156:ff21514d8981 | 1431 | * @} |
AnnaBridge | 156:ff21514d8981 | 1432 | */ |
AnnaBridge | 156:ff21514d8981 | 1433 | |
AnnaBridge | 156:ff21514d8981 | 1434 | #ifdef __cplusplus |
AnnaBridge | 156:ff21514d8981 | 1435 | } |
AnnaBridge | 156:ff21514d8981 | 1436 | #endif |
AnnaBridge | 156:ff21514d8981 | 1437 | |
AnnaBridge | 156:ff21514d8981 | 1438 | #endif /* __STM32L4xx_LL_PWR_H */ |
AnnaBridge | 156:ff21514d8981 | 1439 | |
AnnaBridge | 156:ff21514d8981 | 1440 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |