The official Mbed 2 C/C++ SDK provides the software platform and libraries to build your applications.
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mbed 2
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TARGET_LPC1549/TARGET_NXP/TARGET_LPC15XX/device/cmsis_nvic.h@128:9bcdf88f62b0, 2016-10-27 (annotated)
- Committer:
- <>
- Date:
- Thu Oct 27 16:45:56 2016 +0100
- Revision:
- 128:9bcdf88f62b0
- Child:
- 145:64910690c574
Release 128 of the mbed library
Ports for Upcoming Targets
Fixes and Changes
2966: Add kw24 support https://github.com/ARMmbed/mbed-os/pull/2966
3068: MultiTech mDot - clean up PeripheralPins.c and add new pin names https://github.com/ARMmbed/mbed-os/pull/3068
3089: Kinetis HAL: Remove clock initialization code from serial and ticker https://github.com/ARMmbed/mbed-os/pull/3089
2943: [NRF5] NVIC_SetVector functionality https://github.com/ARMmbed/mbed-os/pull/2943
2938: InterruptIn changes in NCS36510 HAL. https://github.com/ARMmbed/mbed-os/pull/2938
3108: Fix sleep function for NRF52. https://github.com/ARMmbed/mbed-os/pull/3108
3076: STM32F1: Correct timer master value reading https://github.com/ARMmbed/mbed-os/pull/3076
3085: Add LOWPOWERTIMER capability for NUCLEO_F303ZE https://github.com/ARMmbed/mbed-os/pull/3085
3046: [BEETLE] Update BLE stack on Beetle board https://github.com/ARMmbed/mbed-os/pull/3046
3122: [Silicon Labs] Update of Silicon Labs HAL https://github.com/ARMmbed/mbed-os/pull/3122
3022: OnSemi RAM usage fix https://github.com/ARMmbed/mbed-os/pull/3022
3121: STM32F3: Correct UART4 and UART5 defines when using DEVICE_SERIAL_ASYNCH https://github.com/ARMmbed/mbed-os/pull/3121
3142: Targets- NUMAKER_PFM_NUC47216 remove mbed 2 https://github.com/ARMmbed/mbed-os/pull/3142
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
<> | 128:9bcdf88f62b0 | 1 | /* mbed Microcontroller Library |
<> | 128:9bcdf88f62b0 | 2 | * CMSIS-style functionality to support dynamic vectors |
<> | 128:9bcdf88f62b0 | 3 | ******************************************************************************* |
<> | 128:9bcdf88f62b0 | 4 | * Copyright (c) 2011 ARM Limited. All rights reserved. |
<> | 128:9bcdf88f62b0 | 5 | * All rights reserved. |
<> | 128:9bcdf88f62b0 | 6 | * |
<> | 128:9bcdf88f62b0 | 7 | * Redistribution and use in source and binary forms, with or without |
<> | 128:9bcdf88f62b0 | 8 | * modification, are permitted provided that the following conditions are met: |
<> | 128:9bcdf88f62b0 | 9 | * |
<> | 128:9bcdf88f62b0 | 10 | * 1. Redistributions of source code must retain the above copyright notice, |
<> | 128:9bcdf88f62b0 | 11 | * this list of conditions and the following disclaimer. |
<> | 128:9bcdf88f62b0 | 12 | * 2. Redistributions in binary form must reproduce the above copyright notice, |
<> | 128:9bcdf88f62b0 | 13 | * this list of conditions and the following disclaimer in the documentation |
<> | 128:9bcdf88f62b0 | 14 | * and/or other materials provided with the distribution. |
<> | 128:9bcdf88f62b0 | 15 | * 3. Neither the name of ARM Limited nor the names of its contributors |
<> | 128:9bcdf88f62b0 | 16 | * may be used to endorse or promote products derived from this software |
<> | 128:9bcdf88f62b0 | 17 | * without specific prior written permission. |
<> | 128:9bcdf88f62b0 | 18 | * |
<> | 128:9bcdf88f62b0 | 19 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
<> | 128:9bcdf88f62b0 | 20 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
<> | 128:9bcdf88f62b0 | 21 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
<> | 128:9bcdf88f62b0 | 22 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
<> | 128:9bcdf88f62b0 | 23 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
<> | 128:9bcdf88f62b0 | 24 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
<> | 128:9bcdf88f62b0 | 25 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
<> | 128:9bcdf88f62b0 | 26 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
<> | 128:9bcdf88f62b0 | 27 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
<> | 128:9bcdf88f62b0 | 28 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
<> | 128:9bcdf88f62b0 | 29 | ******************************************************************************* |
<> | 128:9bcdf88f62b0 | 30 | */ |
<> | 128:9bcdf88f62b0 | 31 | |
<> | 128:9bcdf88f62b0 | 32 | #ifndef MBED_CMSIS_NVIC_H |
<> | 128:9bcdf88f62b0 | 33 | #define MBED_CMSIS_NVIC_H |
<> | 128:9bcdf88f62b0 | 34 | |
<> | 128:9bcdf88f62b0 | 35 | #define NVIC_NUM_VECTORS (16 + 47) // CORE + MCU Peripherals |
<> | 128:9bcdf88f62b0 | 36 | #define NVIC_USER_IRQ_OFFSET 16 |
<> | 128:9bcdf88f62b0 | 37 | |
<> | 128:9bcdf88f62b0 | 38 | #include "cmsis.h" |
<> | 128:9bcdf88f62b0 | 39 | |
<> | 128:9bcdf88f62b0 | 40 | #ifdef __cplusplus |
<> | 128:9bcdf88f62b0 | 41 | extern "C" { |
<> | 128:9bcdf88f62b0 | 42 | #endif |
<> | 128:9bcdf88f62b0 | 43 | |
<> | 128:9bcdf88f62b0 | 44 | void NVIC_SetVector(IRQn_Type IRQn, uint32_t vector); |
<> | 128:9bcdf88f62b0 | 45 | uint32_t NVIC_GetVector(IRQn_Type IRQn); |
<> | 128:9bcdf88f62b0 | 46 | |
<> | 128:9bcdf88f62b0 | 47 | #ifdef __cplusplus |
<> | 128:9bcdf88f62b0 | 48 | } |
<> | 128:9bcdf88f62b0 | 49 | #endif |
<> | 128:9bcdf88f62b0 | 50 | |
<> | 128:9bcdf88f62b0 | 51 | #endif |