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TARGET_ARM_CM3DS_MPS2/TOOLCHAIN_IAR/MPS2.icf

Committer:
AnnaBridge
Date:
2017-11-09
Revision:
157:e7ca05fa8600
Parent:
145:64910690c574
Child:
165:d1b4690b3f8b

File content as of revision 157:e7ca05fa8600:

/*
 * MPS2 CMSIS Library
 */
/*
 * Copyright (c) 2009-2017 ARM Limited. All rights reserved.
 *
 * SPDX-License-Identifier: Apache-2.0
 *
 * Licensed under the Apache License, Version 2.0 (the License) you may
 * not use this file except in compliance with the License.
 * You may obtain a copy of the License at
 *
 * http://www.apache.org/licenses/LICENSE-2.0
 *
 * Unless required by applicable law or agreed to in writing, software
 * distributed under the License is distributed on an AS IS BASIS, WITHOUT
 * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
 * See the License for the specific language governing permissions and
 * limitations under the License.
 */

/* The RAM region doesn't start at the beginning of the RAM address
 * space to create space for the vector table copied over to the RAM by mbed.
 * The space left is a bit bigger than is necessary based on the number of
 * interrupt handlers.
 */
/*###ICF### Section handled by ICF editor, don't touch! ****/
/*-Editor annotation file-*/
/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
/*-Specials-*/
define symbol __ICFEDIT_intvec_start__ = 0x00000000;
/*-Memory Regions-*/
define symbol __ICFEDIT_region_ROM_start__    = 0x00000000;
define symbol __ICFEDIT_region_ROM_end__      = 0x0003FFFF;
define symbol __ICFEDIT_region_RAM_start__    = 0x20000140;
define symbol __ICFEDIT_region_RAM_end__      = 0x2001FFFF;
/*-Sizes-*/
/* Heap and Stack size */
define symbol __ICFEDIT_size_heap__   = 0x4000;
define symbol __ICFEDIT_size_cstack__ = 0x1000;
/**** End of ICF editor section. ###ICF###*/

define memory mem with size = 4G;
define region ROM_region      = mem:[from __ICFEDIT_region_ROM_start__   to __ICFEDIT_region_ROM_end__];
define region RAM_region      = mem:[from __ICFEDIT_region_RAM_start__   to __ICFEDIT_region_RAM_end__];

initialize by copy { readwrite };
do not initialize  { section .noinit };

define block CSTACK    with alignment = 8, size = __ICFEDIT_size_cstack__   { };
define block HEAP      with alignment = 8, size = __ICFEDIT_size_heap__     { };

place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
place in ROM_region   { readonly };
place in RAM_region   { readwrite,
                        block CSTACK, block HEAP };