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TARGET_VK_RZ_A1H/TOOLCHAIN_ARM_STD/VKRZA1H.sct
- Committer:
- Anna Bridge
- Date:
- 2018-06-22
- Revision:
- 169:a7c7b631e539
- Parent:
- 165:d1b4690b3f8b
- Child:
- 170:e95d10626187
File content as of revision 169:a7c7b631e539:
#! armcc -E -I"../" ;************************************************** ; Copyright (c) 2017 ARM Ltd. All rights reserved. ;************************************************** ; Scatter-file for RTX Example on Versatile Express ; This scatter-file places application code, data, stack and heap at suitable addresses in the memory map. #include "mbed_config.h" #include "mem_VK_RZ_A1H.h" LOAD_TTB __TTB_BASE __TTB_SIZE ; Page 0 of On-Chip Data Retention RAM { TTB +0 EMPTY 0x4000 { } ; Level-1 Translation Table for MMU } SFLASH __ROM_BASE __ROM_SIZE ; load region size_region { VECTORS __VECTOR_BASE FIXED { * (RESET, +FIRST) ; Vector table and other startup code * (InRoot$$Sections) ; All (library) code that must be in a root region * (+RO-CODE) ; Application RO code (.text) } RO_DATA +0 { * (+RO-DATA) } ; Application RO data (.constdata) RW_DATA __DATA_BASE { * (+RW) } ; Application RW data (.data) RW_IRAM1 +0 ALIGN 0x10 { * (+ZI) } ; Application ZI data (.bss) ARM_LIB_HEAP +0 { * (HEAP) } ; Application heap area (HEAP) ARM_LIB_STACK (__RAM_BASE + __NM_RAM_SIZE) EMPTY -__STACK_SIZE ; Stack region growing down { } ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; ; RAM-NC : Internal non-cached RAM region ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; RW_DATA_NC __DATA_NC_BASE __NC_RAM_SIZE { * (NC_DATA) } ; Application RW data Non cached area ZI_DATA_NC +0 { * (NC_BSS) } ; Application ZI data Non cached area } #ifndef RUN_FROM_SDRAM SDRAM 0x08000000 0x02000000 ; 32MB External SDRAM region { } #else SRAM 0x200A0000 0x00960000 ; 9.5MB Internal SRAM region (0.5MB SDCARD Bootloader !!!) { } #endif