Diff: TARGET_LPC1768/TOOLCHAIN_ARM_STD/LPC1768.sct

Revision:

156:ff21514d8981

--- /dev/null	Thu Jan 01 00:00:00 1970 +0000
+++ b/TARGET_LPC1768/TOOLCHAIN_ARM_STD/LPC1768.sct	Wed Nov 08 17:18:06 2017 +0000
@@ -0,0 +1,37 @@
+#! armcc -E
+
+#if !defined(MBED_APP_START)
+  #define MBED_APP_START 0x00000000
+#endif
+
+#if !defined(MBED_APP_SIZE)
+  #define MBED_APP_SIZE 0x80000
+#endif
+
+LR_IROM1 MBED_APP_START MBED_APP_SIZE  {    ; load region size_region
+  ER_IROM0 MBED_APP_START 0x2FC  {  ; load address = execution address
+    *.o (RESET, +First)
+    .ANY (+RO)
+  }
+  ER_CRP (MBED_APP_START + 0x2FC) FIXED 4  {
+    *.o (.CRPSection)
+  }
+  ER_IROM1 (MBED_APP_START + (0x2FC + 4)) FIXED (MBED_APP_SIZE - (0x2FC + 4))  {
+    *(InRoot$$Sections)
+    .ANY (+RO)
+  }
+  ; 8_byte_aligned(49 vect * 4 bytes) =  8_byte_aligned(0xC4) = 0xC8
+  ; 32KB (RAM size) - 0xC8 (NIVT) - 32 (topmost 32 bytes used by IAP functions) = 0x7F18
+  RW_IRAM1 0x100000C8 0x7F18  {
+   .ANY (+RW +ZI)
+  }
+  RW_IRAM2 0x2007C000 0x4000  {  ; RW data, ETH RAM
+   .ANY (AHBSRAM0)
+  }
+  RW_IRAM3 0x20080000 0x4000  {  ; RW data, ETH RAM
+   .ANY (AHBSRAM1)
+  }
+  RW_IRAM4 0x40038000 0x0800  {  ; RW data, CAN RAM
+   .ANY (CANRAM)
+  }
+}