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Diff: TARGET_EFM32HG_STK3400/TARGET_Silicon_Labs/TARGET_EFM32/emlib/inc/em_timer.h
- Revision:
- 113:f141b2784e32
- Parent:
- 98:8ab26030e058
- Child:
- 128:9bcdf88f62b0
--- a/TARGET_EFM32HG_STK3400/TARGET_Silicon_Labs/TARGET_EFM32/emlib/inc/em_timer.h Wed Jan 13 09:48:29 2016 +0000
+++ b/TARGET_EFM32HG_STK3400/TARGET_Silicon_Labs/TARGET_EFM32/emlib/inc/em_timer.h Tue Feb 02 14:43:35 2016 +0000
@@ -1,10 +1,10 @@
/***************************************************************************//**
* @file em_timer.h
* @brief Timer/counter (TIMER) peripheral API
- * @version 3.20.12
+ * @version 4.2.1
*******************************************************************************
* @section License
- * <b>(C) Copyright 2014 Silicon Labs, http://www.silabs.com</b>
+ * <b>(C) Copyright 2015 Silicon Labs, http://www.silabs.com</b>
*******************************************************************************
*
* Permission is granted to anyone to use this software for any purpose,
@@ -30,9 +30,8 @@
*
******************************************************************************/
-
-#ifndef __SILICON_LABS_EM_TIMER_H_
-#define __SILICON_LABS_EM_TIMER_H_
+#ifndef __SILICON_LABS_EM_TIMER_H__
+#define __SILICON_LABS_EM_TIMER_H__
#include "em_device.h"
#if defined(TIMER_COUNT) && (TIMER_COUNT > 0)
@@ -67,20 +66,26 @@
#elif (TIMER_COUNT == 2)
#define TIMER_REF_VALID(ref) (((ref) == TIMER0) || ((ref) == TIMER1))
#elif (TIMER_COUNT == 3)
-#define TIMER_REF_VALID(ref) (((ref) == TIMER0) || \
- ((ref) == TIMER1) || \
- ((ref) == TIMER2))
+#define TIMER_REF_VALID(ref) (((ref) == TIMER0) \
+ || ((ref) == TIMER1) \
+ || ((ref) == TIMER2))
#elif (TIMER_COUNT == 4)
-#define TIMER_REF_VALID(ref) (((ref) == TIMER0) || \
- ((ref) == TIMER1) || \
- ((ref) == TIMER2) || \
- ((ref) == TIMER3))
+#define TIMER_REF_VALID(ref) (((ref) == TIMER0) \
+ || ((ref) == TIMER1) \
+ || ((ref) == TIMER2) \
+ || ((ref) == TIMER3))
#else
-#error Undefined number of timers.
+#error "Undefined number of timers."
#endif
/** Validation of TIMER compare/capture channel number */
+#if defined(_SILICON_LABS_32B_PLATFORM_1)
#define TIMER_CH_VALID(ch) ((ch) < 3)
+#elif defined(_SILICON_LABS_32B_PLATFORM_2)
+#define TIMER_CH_VALID(ch) ((ch) < 4)
+#else
+#error "Unknown platform. Undefined number of channels."
+#endif
/** @endcond */
@@ -220,33 +225,33 @@
timerPRSSELCh1 = _TIMER_CC_CTRL_PRSSEL_PRSCH1, /**< PRS channel 1. */
timerPRSSELCh2 = _TIMER_CC_CTRL_PRSSEL_PRSCH2, /**< PRS channel 2. */
timerPRSSELCh3 = _TIMER_CC_CTRL_PRSSEL_PRSCH3, /**< PRS channel 3. */
-#if defined( _TIMER_CC_CTRL_PRSSEL_PRSCH4 )
+#if defined(_TIMER_CC_CTRL_PRSSEL_PRSCH4)
timerPRSSELCh4 = _TIMER_CC_CTRL_PRSSEL_PRSCH4, /**< PRS channel 4. */
#endif
-#if defined( _TIMER_CC_CTRL_PRSSEL_PRSCH5 )
+#if defined(_TIMER_CC_CTRL_PRSSEL_PRSCH5)
timerPRSSELCh5 = _TIMER_CC_CTRL_PRSSEL_PRSCH5, /**< PRS channel 5. */
#endif
-#if defined( _TIMER_CC_CTRL_PRSSEL_PRSCH6 )
+#if defined(_TIMER_CC_CTRL_PRSSEL_PRSCH6)
timerPRSSELCh6 = _TIMER_CC_CTRL_PRSSEL_PRSCH6, /**< PRS channel 6. */
#endif
-#if defined( _TIMER_CC_CTRL_PRSSEL_PRSCH7 )
+#if defined(_TIMER_CC_CTRL_PRSSEL_PRSCH7)
timerPRSSELCh7 = _TIMER_CC_CTRL_PRSSEL_PRSCH7, /**< PRS channel 7. */
#endif
-#if defined( _TIMER_CC_CTRL_PRSSEL_PRSCH8 )
+#if defined(_TIMER_CC_CTRL_PRSSEL_PRSCH8)
timerPRSSELCh8 = _TIMER_CC_CTRL_PRSSEL_PRSCH8, /**< PRS channel 8. */
#endif
-#if defined( _TIMER_CC_CTRL_PRSSEL_PRSCH9 )
+#if defined(_TIMER_CC_CTRL_PRSSEL_PRSCH9)
timerPRSSELCh9 = _TIMER_CC_CTRL_PRSSEL_PRSCH9, /**< PRS channel 9. */
#endif
-#if defined( _TIMER_CC_CTRL_PRSSEL_PRSCH10 )
+#if defined(_TIMER_CC_CTRL_PRSSEL_PRSCH10)
timerPRSSELCh10 = _TIMER_CC_CTRL_PRSSEL_PRSCH10, /**< PRS channel 10. */
#endif
-#if defined( _TIMER_CC_CTRL_PRSSEL_PRSCH11 )
+#if defined(_TIMER_CC_CTRL_PRSSEL_PRSCH11)
timerPRSSELCh11 = _TIMER_CC_CTRL_PRSSEL_PRSCH11, /**< PRS channel 11. */
#endif
} TIMER_PRSSEL_TypeDef;
-#ifdef _TIMER_DTFC_DTFA_NONE
+#if defined(_TIMER_DTFC_DTFA_NONE)
/** DT (Dead Time) Fault Actions. */
typedef enum
{
@@ -276,7 +281,7 @@
/** Clock selection. */
TIMER_ClkSel_TypeDef clkSel;
-#if defined( TIMER_CTRL_X2CNT ) && defined( TIMER_CTRL_ATI )
+#if defined(TIMER_CTRL_X2CNT) && defined(TIMER_CTRL_ATI)
/** 2x Count mode, counter increments/decrements by 2, meant for PWN mode. */
bool count2x;
@@ -308,36 +313,38 @@
} TIMER_Init_TypeDef;
/** Default config for TIMER init structure. */
-#if defined( TIMER_CTRL_X2CNT ) && defined( TIMER_CTRL_ATI )
-#define TIMER_INIT_DEFAULT \
- { true, /* Enable timer when init complete. */ \
- false, /* Stop counter during debug halt. */ \
- timerPrescale1, /* No prescaling. */ \
- timerClkSelHFPerClk, /* Select HFPER clock. */ \
- false, /* Not 2x count mode. */ \
- false, /* No ATI. */ \
- timerInputActionNone, /* No action on falling input edge. */ \
- timerInputActionNone, /* No action on rising input edge. */ \
- timerModeUp, /* Up-counting. */ \
- false, /* Do not clear DMA requests when DMA channel is active. */ \
- false, /* Select X2 quadrature decode mode (if used). */ \
- false, /* Disable one shot. */ \
- false /* Not started/stopped/reloaded by other timers. */ \
- }
+#if defined(TIMER_CTRL_X2CNT) && defined(TIMER_CTRL_ATI)
+#define TIMER_INIT_DEFAULT \
+{ \
+ true, /* Enable timer when init complete. */ \
+ false, /* Stop counter during debug halt. */ \
+ timerPrescale1, /* No prescaling. */ \
+ timerClkSelHFPerClk, /* Select HFPER clock. */ \
+ false, /* Not 2x count mode. */ \
+ false, /* No ATI. */ \
+ timerInputActionNone, /* No action on falling input edge. */ \
+ timerInputActionNone, /* No action on rising input edge. */ \
+ timerModeUp, /* Up-counting. */ \
+ false, /* Do not clear DMA requests when DMA channel is active. */ \
+ false, /* Select X2 quadrature decode mode (if used). */ \
+ false, /* Disable one shot. */ \
+ false /* Not started/stopped/reloaded by other timers. */ \
+}
#else
-#define TIMER_INIT_DEFAULT \
- { true, /* Enable timer when init complete. */ \
- false, /* Stop counter during debug halt. */ \
- timerPrescale1, /* No prescaling. */ \
- timerClkSelHFPerClk, /* Select HFPER clock. */ \
- timerInputActionNone, /* No action on falling input edge. */ \
- timerInputActionNone, /* No action on rising input edge. */ \
- timerModeUp, /* Up-counting. */ \
- false, /* Do not clear DMA requests when DMA channel is active. */ \
- false, /* Select X2 quadrature decode mode (if used). */ \
- false, /* Disable one shot. */ \
- false /* Not started/stopped/reloaded by other timers. */ \
- }
+#define TIMER_INIT_DEFAULT \
+{ \
+ true, /* Enable timer when init complete. */ \
+ false, /* Stop counter during debug halt. */ \
+ timerPrescale1, /* No prescaling. */ \
+ timerClkSelHFPerClk, /* Select HFPER clock. */ \
+ timerInputActionNone, /* No action on falling input edge. */ \
+ timerInputActionNone, /* No action on rising input edge. */ \
+ timerModeUp, /* Up-counting. */ \
+ false, /* Do not clear DMA requests when DMA channel is active. */ \
+ false, /* Select X2 quadrature decode mode (if used). */ \
+ false, /* Disable one shot. */ \
+ false /* Not started/stopped/reloaded by other timers. */ \
+}
#endif
/** TIMER compare/capture initialization structure. */
@@ -387,21 +394,22 @@
} TIMER_InitCC_TypeDef;
/** Default config for TIMER compare/capture init structure. */
-#define TIMER_INITCC_DEFAULT \
- { timerEventEveryEdge, /* Event on every capture. */ \
- timerEdgeRising, /* Input capture edge on rising edge. */ \
- timerPRSSELCh0, /* Not used by default, select PRS channel 0. */ \
- timerOutputActionNone, /* No action on underflow. */ \
- timerOutputActionNone, /* No action on overflow. */ \
- timerOutputActionNone, /* No action on match. */ \
- timerCCModeOff, /* Disable compare/capture channel. */ \
- false, /* Disable filter. */ \
- false, /* Select TIMERnCCx input. */ \
- false, /* Clear output when countre disabled. */ \
- false /* Do not invert output. */ \
- }
+#define TIMER_INITCC_DEFAULT \
+{ \
+ timerEventEveryEdge, /* Event on every capture. */ \
+ timerEdgeRising, /* Input capture edge on rising edge. */ \
+ timerPRSSELCh0, /* Not used by default, select PRS channel 0. */ \
+ timerOutputActionNone, /* No action on underflow. */ \
+ timerOutputActionNone, /* No action on overflow. */ \
+ timerOutputActionNone, /* No action on match. */ \
+ timerCCModeOff, /* Disable compare/capture channel. */ \
+ false, /* Disable filter. */ \
+ false, /* Select TIMERnCCx input. */ \
+ false, /* Clear output when counter disabled. */ \
+ false /* Do not invert output. */ \
+}
-#ifdef _TIMER_DTCTRL_MASK
+#if defined(_TIMER_DTCTRL_MASK)
/** TIMER Dead Time Insertion (DTI) initialization structure. */
typedef struct
{
@@ -464,25 +472,26 @@
/** Default config for TIMER DTI init structure. */
-#define TIMER_INITDTI_DEFAULT \
- { true, /* Enable the DTI. */ \
- false, /* CC[0|1|2] outputs are active high. */ \
- false, /* CDTI[0|1|2] outputs are not inverted. */ \
- false, /* No auto restart when debugger exits. */ \
- false, /* No PRS source selected. */ \
- timerPRSSELCh0, /* Not used by default, select PRS channel 0. */ \
- timerPrescale1, /* No prescaling. */ \
- 0, /* No rise time. */ \
- 0, /* No fall time. */ \
- TIMER_DTOGEN_DTOGCC0EN|TIMER_DTOGEN_DTOGCDTI0EN, /* Enable CC0 and CDTI0 */\
- true, /* Enable core lockup as fault source */ \
- true, /* Enable debugger as fault source */ \
- false, /* Disable PRS fault source 0 */ \
- timerPRSSELCh0, /* Not used by default, select PRS channel 0. */ \
- false, /* Disable PRS fault source 1 */ \
- timerPRSSELCh0, /* Not used by default, select PRS channel 0. */ \
- timerDtiFaultActionInactive, /* No fault action. */ \
- }
+#define TIMER_INITDTI_DEFAULT \
+{ \
+ true, /* Enable the DTI. */ \
+ false, /* CC[0|1|2] outputs are active high. */ \
+ false, /* CDTI[0|1|2] outputs are not inverted. */ \
+ false, /* No auto restart when debugger exits. */ \
+ false, /* No PRS source selected. */ \
+ timerPRSSELCh0, /* Not used by default, select PRS channel 0. */ \
+ timerPrescale1, /* No prescaling. */ \
+ 0, /* No rise time. */ \
+ 0, /* No fall time. */ \
+ TIMER_DTOGEN_DTOGCC0EN|TIMER_DTOGEN_DTOGCDTI0EN, /* Enable CC0 and CDTI0 */\
+ true, /* Enable core lockup as fault source */ \
+ true, /* Enable debugger as fault source */ \
+ false, /* Disable PRS fault source 0 */ \
+ timerPRSSELCh0, /* Not used by default, select PRS channel 0. */ \
+ false, /* Disable PRS fault source 1 */ \
+ timerPRSSELCh0, /* Not used by default, select PRS channel 0. */ \
+ timerDtiFaultActionInactive, /* No fault action. */ \
+}
#endif /* _TIMER_DTCTRL_MASK */
@@ -506,7 +515,7 @@
******************************************************************************/
__STATIC_INLINE uint32_t TIMER_CaptureGet(TIMER_TypeDef *timer, unsigned int ch)
{
- return(timer->CC[ch].CCV);
+ return timer->CC[ch].CCV;
}
@@ -571,7 +580,7 @@
******************************************************************************/
__STATIC_INLINE uint32_t TIMER_CounterGet(TIMER_TypeDef *timer)
{
- return(timer->CNT);
+ return timer->CNT;
}
@@ -621,7 +630,7 @@
unsigned int ch,
const TIMER_InitCC_TypeDef *init);
-#ifdef _TIMER_DTCTRL_MASK
+#if defined(_TIMER_DTCTRL_MASK)
void TIMER_InitDTI(TIMER_TypeDef *timer, const TIMER_InitDTI_TypeDef *init);
/***************************************************************************//**
@@ -666,7 +675,7 @@
__STATIC_INLINE uint32_t TIMER_GetDTIFault(TIMER_TypeDef *timer)
{
EFM_ASSERT(TIMER0 == timer);
- return(timer->DTFAULT);
+ return timer->DTFAULT;
}
@@ -720,7 +729,7 @@
******************************************************************************/
__STATIC_INLINE void TIMER_IntDisable(TIMER_TypeDef *timer, uint32_t flags)
{
- timer->IEN &= ~(flags);
+ timer->IEN &= ~flags;
}
@@ -762,7 +771,7 @@
******************************************************************************/
__STATIC_INLINE uint32_t TIMER_IntGet(TIMER_TypeDef *timer)
{
- return(timer->IF);
+ return timer->IF;
}
@@ -787,14 +796,14 @@
******************************************************************************/
__STATIC_INLINE uint32_t TIMER_IntGetEnabled(TIMER_TypeDef *timer)
{
- uint32_t tmp;
+ uint32_t ien;
/* Store TIMER->IEN in temporary variable in order to define explicit order
* of volatile accesses. */
- tmp = timer->IEN;
+ ien = timer->IEN;
/* Bitwise AND of pending and enabled interrupts */
- return timer->IF & tmp;
+ return timer->IF & ien;
}
@@ -814,7 +823,7 @@
timer->IFS = flags;
}
-#ifdef TIMER_DTLOCK_LOCKKEY_LOCK
+#if defined(_TIMER_DTLOCK_LOCKKEY_LOCK)
/***************************************************************************//**
* @brief
* Lock some of the TIMER registers in order to protect them from being
@@ -874,7 +883,7 @@
******************************************************************************/
__STATIC_INLINE uint32_t TIMER_TopGet(TIMER_TypeDef *timer)
{
- return(timer->TOP);
+ return timer->TOP;
}
@@ -894,7 +903,7 @@
}
-#ifdef TIMER_DTLOCK_LOCKKEY_UNLOCK
+#if defined(TIMER_DTLOCK_LOCKKEY_UNLOCK)
/***************************************************************************//**
* @brief
* Unlock the TIMER so that writing to locked registers again is possible.
@@ -919,4 +928,4 @@
#endif
#endif /* defined(TIMER_COUNT) && (TIMER_COUNT > 0) */
-#endif /* __SILICON_LABS_EM_TIMER_H_ */
+#endif /* __SILICON_LABS_EM_TIMER_H__ */
