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Diff: TARGET_EFM32HG_STK3400/TARGET_Silicon_Labs/TARGET_EFM32/emlib/inc/em_pcnt.h
- Revision:
- 113:f141b2784e32
- Parent:
- 98:8ab26030e058
- Child:
- 128:9bcdf88f62b0
--- a/TARGET_EFM32HG_STK3400/TARGET_Silicon_Labs/TARGET_EFM32/emlib/inc/em_pcnt.h Wed Jan 13 09:48:29 2016 +0000
+++ b/TARGET_EFM32HG_STK3400/TARGET_Silicon_Labs/TARGET_EFM32/emlib/inc/em_pcnt.h Tue Feb 02 14:43:35 2016 +0000
@@ -1,10 +1,10 @@
/***************************************************************************//**
* @file em_pcnt.h
* @brief Pulse Counter (PCNT) peripheral API
- * @version 3.20.12
+ * @version 4.2.1
*******************************************************************************
* @section License
- * <b>(C) Copyright 2014 Silicon Labs, http://www.silabs.com</b>
+ * <b>(C) Copyright 2015 Silicon Labs, http://www.silabs.com</b>
*******************************************************************************
*
* Permission is granted to anyone to use this software for any purpose,
@@ -30,9 +30,8 @@
*
******************************************************************************/
-
-#ifndef __SILICON_LABS_EM_PCNT_H_
-#define __SILICON_LABS_EM_PCNT_H_
+#ifndef __SILICON_LABS_EM_PCNT_H__
+#define __SILICON_LABS_EM_PCNT_H__
#include "em_device.h"
#if defined(PCNT_COUNT) && (PCNT_COUNT > 0)
@@ -56,17 +55,21 @@
/*******************************************************************************
******************************* DEFINES ***********************************
******************************************************************************/
-/** PCNT Counter register sizes. */
-#if defined _EFM32_GECKO_FAMILY
-#define PCNT0_CNT_SIZE (8) /** PCNT0 counter is 8 bits. */
+/** PCNT0 Counter register size. */
+#if defined(_EFM32_GECKO_FAMILY)
+#define PCNT0_CNT_SIZE (8) /* PCNT0 counter is 8 bits. */
#else
-#define PCNT0_CNT_SIZE (16) /** PCNT0 counter is 16 bits. */
+#define PCNT0_CNT_SIZE (16) /* PCNT0 counter is 16 bits. */
#endif
+
#ifdef PCNT1
-#define PCNT1_CNT_SIZE (8) /** PCNT1 counter is 8 bits. */
+/** PCNT1 Counter register size. */
+#define PCNT1_CNT_SIZE (8) /* PCNT1 counter is 8 bits. */
#endif
+
#ifdef PCNT2
-#define PCNT2_CNT_SIZE (8) /** PCNT2 counter is 8 bits. */
+/** PCNT2 Counter register size. */
+#define PCNT2_CNT_SIZE (8) /* PCNT2 counter is 8 bits. */
#endif
@@ -87,11 +90,22 @@
pcntModeExtSingle = _PCNT_CTRL_MODE_EXTCLKSINGLE,
/** Externally clocked quadrature decoder mode (available in EM0-EM3). */
- pcntModeExtQuad = _PCNT_CTRL_MODE_EXTCLKQUAD
+ pcntModeExtQuad = _PCNT_CTRL_MODE_EXTCLKQUAD,
+
+#if defined(_PCNT_CTRL_MODE_OVSQUAD1X)
+ /** LFACLK oversampling quadrature decoder 1X mode (available in EM0-EM2). */
+ pcntModeOvsQuad1 = _PCNT_CTRL_MODE_OVSQUAD1X,
+
+ /** LFACLK oversampling quadrature decoder 2X mode (available in EM0-EM2). */
+ pcntModeOvsQuad2 = _PCNT_CTRL_MODE_OVSQUAD2X,
+
+ /** LFACLK oversampling quadrature decoder 4X mode (available in EM0-EM2). */
+ pcntModeOvsQuad4 = _PCNT_CTRL_MODE_OVSQUAD4X,
+#endif
} PCNT_Mode_TypeDef;
-#if defined( _PCNT_CTRL_CNTEV_MASK)
+#if defined(_PCNT_CTRL_CNTEV_MASK)
/** Counter event selection.
* Note: unshifted values are being used for enumeration because multiple
* configuration structure members use this type definition. */
@@ -112,7 +126,7 @@
#endif
-#if defined( _PCNT_INPUT_MASK )
+#if defined(_PCNT_INPUT_MASK)
/** PRS sources for @p s0PRS and @p s1PRS. */
typedef enum
{
@@ -120,28 +134,28 @@
pcntPRSCh1 = 1, /**< PRS channel 1. */
pcntPRSCh2 = 2, /**< PRS channel 2. */
pcntPRSCh3 = 3, /**< PRS channel 3. */
-#if defined( PCNT_INPUT_S0PRSSEL_PRSCH4 )
+#if defined(PCNT_INPUT_S0PRSSEL_PRSCH4)
pcntPRSCh4 = 4, /**< PRS channel 4. */
#endif
-#if defined( PCNT_INPUT_S0PRSSEL_PRSCH5 )
+#if defined(PCNT_INPUT_S0PRSSEL_PRSCH5)
pcntPRSCh5 = 5, /**< PRS channel 5. */
#endif
-#if defined( PCNT_INPUT_S0PRSSEL_PRSCH6 )
+#if defined(PCNT_INPUT_S0PRSSEL_PRSCH6)
pcntPRSCh6 = 6, /**< PRS channel 6. */
#endif
-#if defined( PCNT_INPUT_S0PRSSEL_PRSCH7 )
+#if defined(PCNT_INPUT_S0PRSSEL_PRSCH7)
pcntPRSCh7 = 7, /**< PRS channel 7. */
#endif
-#if defined( PCNT_INPUT_S0PRSSEL_PRSCH8 )
+#if defined(PCNT_INPUT_S0PRSSEL_PRSCH8)
pcntPRSCh8 = 8, /**< PRS channel 8. */
#endif
-#if defined( PCNT_INPUT_S0PRSSEL_PRSCH9 )
+#if defined(PCNT_INPUT_S0PRSSEL_PRSCH9)
pcntPRSCh9 = 9, /**< PRS channel 9. */
#endif
-#if defined( PCNT_INPUT_S0PRSSEL_PRSCH10 )
+#if defined(PCNT_INPUT_S0PRSSEL_PRSCH10)
pcntPRSCh10 = 10, /**< PRS channel 10. */
#endif
-#if defined( PCNT_INPUT_S0PRSSEL_PRSCH11 )
+#if defined(PCNT_INPUT_S0PRSSEL_PRSCH11)
pcntPRSCh11 = 11 /**< PRS channel 11. */
#endif
} PCNT_PRSSel_TypeDef;
@@ -187,17 +201,17 @@
/** Counting direction, only applicable for #pcntModeOvsSingle and
* #pcntModeExtSingle modes. */
bool countDown;
-
- /** Enable filter, only available in #pcntModeOvsSingle mode. */
+
+ /** Enable filter, only available in #pcntModeOvs* modes. */
bool filter;
-#if defined( PCNT_CTRL_HYST )
+#if defined(PCNT_CTRL_HYST)
/** Set to true to enable hysteresis. When its enabled, the PCNT will always
* overflow and underflow to TOP/2. */
bool hyst;
/** Set to true to enable S1 to determine the direction of counting in
- * OVSSINGLE or EXTCLKSINGLE modes.
+ * OVSSINGLE or EXTCLKSINGLE modes. @n
* When S1 is high, the count direction is given by CNTDIR, and when S1 is
* low, the count direction is the opposite. */
bool s1CntDir;
@@ -218,34 +232,141 @@
#endif
} PCNT_Init_TypeDef;
-#if !defined ( PCNT_CTRL_HYST )
+#if !defined(PCNT_CTRL_HYST)
/** Default config for PCNT init structure. */
-#define PCNT_INIT_DEFAULT \
- { pcntModeDisable, /* Disabled by default. */ \
- _PCNT_CNT_RESETVALUE, /* Default counter HW reset value. */ \
- _PCNT_TOP_RESETVALUE, /* Default counter HW reset value. */ \
- false, /* Use positive edge. */ \
- false, /* Up-counting. */ \
- false /* Filter disabled. */ \
- }
+#define PCNT_INIT_DEFAULT \
+{ \
+ pcntModeDisable, /* Disabled by default. */ \
+ _PCNT_CNT_RESETVALUE, /* Default counter HW reset value. */ \
+ _PCNT_TOP_RESETVALUE, /* Default counter HW reset value. */ \
+ false, /* Use positive edge. */ \
+ false, /* Up-counting. */ \
+ false /* Filter disabled. */ \
+}
#else
/** Default config for PCNT init structure. */
-#define PCNT_INIT_DEFAULT \
- { pcntModeDisable, /* Disabled by default. */ \
- _PCNT_CNT_RESETVALUE, /* Default counter HW reset value. */ \
- _PCNT_TOP_RESETVALUE, /* Default counter HW reset value. */ \
- false, /* Use positive edge. */ \
- false, /* Up-counting. */ \
- false, /* Filter disabled. */ \
- false, /* Hysteresis disabled. */ \
- true, /* Counter direction is given by CNTDIR. */ \
- pcntCntEventUp, /* Regular counter counts up on upcount events. */ \
- pcntCntEventNone, /* Auxiliary counter doesn't respond to events. */ \
- pcntPRSCh0, /* PRS channel 0 selected as S0IN. */ \
- pcntPRSCh0 /* PRS channel 0 selected as S1IN. */ \
- }
+#define PCNT_INIT_DEFAULT \
+{ \
+ pcntModeDisable, /* Disabled by default. */ \
+ _PCNT_CNT_RESETVALUE, /* Default counter HW reset value. */ \
+ _PCNT_TOP_RESETVALUE, /* Default counter HW reset value. */ \
+ false, /* Use positive edge. */ \
+ false, /* Up-counting. */ \
+ false, /* Filter disabled. */ \
+ false, /* Hysteresis disabled. */ \
+ true, /* Counter direction is given by CNTDIR. */ \
+ pcntCntEventUp, /* Regular counter counts up on upcount events. */ \
+ pcntCntEventNone, /* Auxiliary counter doesn't respond to events. */ \
+ pcntPRSCh0, /* PRS channel 0 selected as S0IN. */ \
+ pcntPRSCh0 /* PRS channel 0 selected as S1IN. */ \
+}
+#endif
+
+#if defined(PCNT_OVSCFG_FILTLEN_DEFAULT)
+/** Filter initialization structure */
+typedef struct
+{
+ /** Used only in OVSINGLE and OVSQUAD1X-4X modes. To use this, enable the filter through
+ * setting filter to true during PCNT_Init(). Filter length = (filtLen + 5) LFACLK cycles. */
+ uint8_t filtLen;
+
+ /** When set, removes flutter from Quaddecoder inputs S0IN and S1IN.
+ * Available only in OVSQUAD1X-4X modes. */
+ bool flutterrm;
+} PCNT_Filter_TypeDef;
+#endif
+
+/** Default config for PCNT init structure. */
+#if defined(PCNT_OVSCFG_FILTLEN_DEFAULT)
+#define PCNT_FILTER_DEFAULT \
+{ \
+ 0, /* Default length is 5 LFACLK cycles */ \
+ false /* No flutter removal */ \
+}
#endif
+#if defined(PCNT_CTRL_TCCMODE_DEFAULT)
+
+/** Modes for Triggered Compare and Clear module */
+typedef enum
+{
+ /** Triggered compare and clear not enabled. */
+ tccModeDisabled = _PCNT_CTRL_TCCMODE_DISABLED,
+
+ /** Compare and clear performed on each (optionally prescaled) LFA clock cycle. */
+ tccModeLFA = _PCNT_CTRL_TCCMODE_LFA,
+
+ /** Compare and clear performed on PRS edges. Polarity defined by prsPolarity. */
+ tccModePRS = _PCNT_CTRL_TCCMODE_PRS
+} PCNT_TCCMode_TypeDef;
+
+/** Prescaler values for LFA compare and clear events. Only has effect when TCC mode is LFA. */
+typedef enum
+{
+ /** Compare and clear event each LFA cycle. */
+ tccPrescDiv1 = _PCNT_CTRL_TCCPRESC_DIV1,
+
+ /** Compare and clear event every other LFA cycle. */
+ tccPrescDiv2 = _PCNT_CTRL_TCCPRESC_DIV2,
+
+ /** Compare and clear event every 4th LFA cycle. */
+ tccPrescDiv4 = _PCNT_CTRL_TCCPRESC_DIV4,
+
+ /** Compare and clear event every 8th LFA cycle. */
+ tccPrescDiv8 = _PCNT_CTRL_TCCPRESC_DIV8
+} PCNT_TCCPresc_Typedef;
+
+/** Compare modes for TCC module */
+typedef enum
+{
+ /** Compare match if PCNT_CNT is less than, or equal to PCNT_TOP. */
+ tccCompLTOE = _PCNT_CTRL_TCCCOMP_LTOE,
+
+ /** Compare match if PCNT_CNT is greater than or equal to PCNT_TOP. */
+ tccCompGTOE = _PCNT_CTRL_TCCCOMP_GTOE,
+
+ /** Compare match if PCNT_CNT is less than, or equal to PCNT_TOP[15:8]], and greater
+ * than, or equal to PCNT_TOP[7:0]. */
+ tccCompRange = _PCNT_CTRL_TCCCOMP_RANGE
+} PCNT_TCCComp_Typedef;
+
+/** TCC initialization structure */
+typedef struct
+{
+ /** Mode to operate in. */
+ PCNT_TCCMode_TypeDef mode;
+
+ /** Prescaler value for LFACLK in LFA mode */
+ PCNT_TCCPresc_Typedef prescaler;
+
+ /** Choose the event that will trigger a clear */
+ PCNT_TCCComp_Typedef compare;
+
+ /** PRS input to TCC module, either for gating the PCNT clock, triggering the TCC comparison, or both. */
+ PCNT_PRSSel_TypeDef tccPRS;
+
+ /** TCC PRS input polarity. @n
+ * False = Rising edge for comparison trigger, and PCNT clock gated when the PRS signal is high. @n
+ * True = Falling edge for comparison trigger, and PCNT clock gated when the PRS signal is low. */
+ bool prsPolarity;
+
+ /** Enable gating PCNT input clock through TCC PRS signal.
+ * Polarity selection is done through prsPolarity. */
+ bool prsGateEnable;
+} PCNT_TCC_TypeDef;
+
+#define PCNT_TCC_DEFAULT \
+{ \
+ tccModeDisabled, /* Disabled by default */ \
+ tccPrescDiv1, /* Do not prescale LFA clock in LFA mode */ \
+ tccCompLTOE, /* Clear when CNT <= TOP */ \
+ pcntPRSCh0, /* Select PRS channel 0 as input to TCC */ \
+ false, /* PRS polarity is rising edge, and gate when 1 */ \
+ false /* Do not gate the PCNT counter input */ \
+}
+
+#endif
+/* defined(PCNT_CTRL_TCCMODE_DEFAULT) */
/*******************************************************************************
***************************** PROTOTYPES **********************************
@@ -266,8 +387,7 @@
return pcnt->CNT;
}
-
-#if defined( _PCNT_AUXCNT_MASK )
+#if defined(_PCNT_AUXCNT_MASK)
/***************************************************************************//**
* @brief
* Get auxiliary counter value.
@@ -284,11 +404,9 @@
}
#endif
-
void PCNT_CounterReset(PCNT_TypeDef *pcnt);
void PCNT_CounterTopSet(PCNT_TypeDef *pcnt, uint32_t count, uint32_t top);
-
/***************************************************************************//**
* @brief
* Set counter value.
@@ -315,18 +433,23 @@
PCNT_CounterTopSet(pcnt, count, pcnt->TOP);
}
-
void PCNT_Enable(PCNT_TypeDef *pcnt, PCNT_Mode_TypeDef mode);
void PCNT_FreezeEnable(PCNT_TypeDef *pcnt, bool enable);
void PCNT_Init(PCNT_TypeDef *pcnt, const PCNT_Init_TypeDef *init);
-#if defined( _PCNT_INPUT_MASK )
+#if defined(PCNT_OVSCFG_FILTLEN_DEFAULT)
+void PCNT_FilterConfiguration(PCNT_TypeDef *pcnt, const PCNT_Filter_TypeDef *config, bool enable);
+#endif
+
+#if defined(_PCNT_INPUT_MASK)
void PCNT_PRSInputEnable(PCNT_TypeDef *pcnt,
PCNT_PRSInput_TypeDef prsInput,
bool enable);
#endif
-
+#if defined(PCNT_CTRL_TCCMODE_DEFAULT)
+void PCNT_TCCConfiguration(PCNT_TypeDef *pcnt, const PCNT_TCC_TypeDef *config);
+#endif
/***************************************************************************//**
* @brief
* Clear one or more pending PCNT interrupts.
@@ -343,7 +466,6 @@
pcnt->IFC = flags;
}
-
/***************************************************************************//**
* @brief
* Disable one or more PCNT interrupts.
@@ -357,10 +479,9 @@
******************************************************************************/
__STATIC_INLINE void PCNT_IntDisable(PCNT_TypeDef *pcnt, uint32_t flags)
{
- pcnt->IEN &= ~(flags);
+ pcnt->IEN &= ~flags;
}
-
/***************************************************************************//**
* @brief
* Enable one or more PCNT interrupts.
@@ -382,7 +503,6 @@
pcnt->IEN |= flags;
}
-
/***************************************************************************//**
* @brief
* Get pending PCNT interrupt flags.
@@ -402,7 +522,6 @@
return pcnt->IF;
}
-
/***************************************************************************//**
* @brief
* Get enabled and pending PCNT interrupt flags.
@@ -426,18 +545,17 @@
******************************************************************************/
__STATIC_INLINE uint32_t PCNT_IntGetEnabled(PCNT_TypeDef *pcnt)
{
- uint32_t tmp = 0U;
+ uint32_t ien;
/* Store pcnt->IEN in temporary variable in order to define explicit order
* of volatile accesses. */
- tmp = pcnt->IEN;
+ ien = pcnt->IEN;
/* Bitwise AND of pending and enabled interrupts */
- return pcnt->IF & tmp;
+ return pcnt->IF & ien;
}
-
/***************************************************************************//**
* @brief
* Set one or more pending PCNT interrupts from SW.
@@ -456,7 +574,6 @@
void PCNT_Reset(PCNT_TypeDef *pcnt);
-
/***************************************************************************//**
* @brief
* Get pulse counter top buffer value.
@@ -491,7 +608,6 @@
void PCNT_TopSet(PCNT_TypeDef *pcnt, uint32_t val);
-
/** @} (end addtogroup PCNT) */
/** @} (end addtogroup EM_Library) */
@@ -500,4 +616,4 @@
#endif
#endif /* defined(PCNT_COUNT) && (PCNT_COUNT > 0) */
-#endif /* __SILICON_LABS_EM_PCNT_H_ */
+#endif /* __SILICON_LABS_EM_PCNT_H__ */
