Diff: TARGET_NUCLEO_L432KC/TOOLCHAIN_IAR/stm32l432xx.icf

Revision:

153:b484a57bc302

Parent:

122:f9eeca106725

--- a/TARGET_NUCLEO_L432KC/TOOLCHAIN_IAR/stm32l432xx.icf	Mon Oct 02 15:20:36 2017 +0100
+++ b/TARGET_NUCLEO_L432KC/TOOLCHAIN_IAR/stm32l432xx.icf	Wed Oct 11 12:36:33 2017 +0100
@@ -5,20 +5,16 @@
 
 /* [RAM = 48kb + 16kb = 0xC000] */
 /* Vector table dynamic copy: Total: 98 vectors = 392 bytes (0x188) to be reserved in RAM */
-define symbol __NVIC_start__          = 0x10000000;
-define symbol __NVIC_end__            = 0x10000187; /* Aligned on 8 bytes (392 = 49 x 8) */
-define symbol __region_SRAM2_start__  = 0x10000188;
-define symbol __region_SRAM2_end__    = 0x10003FFF;
-define symbol __region_SRAM1_start__  = 0x20000000;
-define symbol __region_SRAM1_end__    = 0x2000BFFF;
+define symbol __NVIC_start__          = 0x20000000;
+define symbol __NVIC_end__            = 0x20000187; /* Aligned on 8 bytes (392 = 49 x 8) */
+define symbol __region_SRAM1_start__  = 0x20000188;
+define symbol __region_SRAM1_end__    = 0x2000FFFF;
 
 /* Memory regions */
 define memory mem with size = 4G;
 define region ROM_region = mem:[from __region_ROM_start__ to __region_ROM_end__];
-define region SRAM2_region = mem:[from __region_SRAM2_start__ to __region_SRAM2_end__];
 define region SRAM1_region = mem:[from __region_SRAM1_start__ to __region_SRAM1_end__];
 
-/* Stack 1/8 and Heap 1/4 of RAM */
 define symbol __size_cstack__ = 0x2000;
 define symbol __size_heap__   = 0x4000;
 define block CSTACK    with alignment = 8, size = __size_cstack__   { };
@@ -32,4 +28,3 @@
 
 place in ROM_region   { readonly };
 place in SRAM1_region   { readwrite, block STACKHEAP };
-place in SRAM2_region { };