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Diff: TARGET_NUCLEO_L432KC/TARGET_STM/TARGET_STM32L4/device/stm32l4xx_ll_lpuart.h
- Revision:
- 161:aa5281ff4a02
- Parent:
- 156:ff21514d8981
--- a/TARGET_NUCLEO_L432KC/TARGET_STM/TARGET_STM32L4/device/stm32l4xx_ll_lpuart.h Wed Jan 17 16:13:02 2018 +0000
+++ b/TARGET_NUCLEO_L432KC/TARGET_STM/TARGET_STM32L4/device/stm32l4xx_ll_lpuart.h Fri Feb 16 16:16:41 2018 +0000
@@ -2,8 +2,6 @@
******************************************************************************
* @file stm32l4xx_ll_lpuart.h
* @author MCD Application Team
- * @version V1.7.1
- * @date 21-April-2017
* @brief Header file of LPUART LL module.
******************************************************************************
* @attention
@@ -58,6 +56,30 @@
/* Private types -------------------------------------------------------------*/
/* Private variables ---------------------------------------------------------*/
+#if defined(USART_PRESC_PRESCALER)
+/** @defgroup LPUART_LL_Private_Variables LPUART Private Variables
+ * @{
+ */
+/* Array used to get the LPUART prescaler division decimal values versus @ref LPUART_LL_EC_PRESCALER values */
+static const uint16_t LPUART_PRESCALER_TAB[] =
+{
+ (uint16_t)1,
+ (uint16_t)2,
+ (uint16_t)4,
+ (uint16_t)6,
+ (uint16_t)8,
+ (uint16_t)10,
+ (uint16_t)12,
+ (uint16_t)16,
+ (uint16_t)32,
+ (uint16_t)64,
+ (uint16_t)128,
+ (uint16_t)256
+};
+/**
+ * @}
+ */
+#endif
/* Private constants ---------------------------------------------------------*/
/** @defgroup LPUART_LL_Private_Constants LPUART Private Constants
@@ -93,6 +115,13 @@
*/
typedef struct
{
+#if defined(USART_PRESC_PRESCALER)
+ uint32_t PrescalerValue; /*!< Specifies the Prescaler to compute the communication baud rate.
+ This parameter can be a value of @ref LPUART_LL_EC_PRESCALER.
+
+ This feature can be modified afterwards using unitary function @ref LL_LPUART_SetPrescaler().*/
+
+#endif
uint32_t BaudRate; /*!< This field defines expected LPUART communication baud rate.
This feature can be modified afterwards using unitary function @ref LL_LPUART_SetBaudRate().*/
@@ -143,6 +172,9 @@
#define LL_LPUART_ICR_NCF USART_ICR_NCF /*!< Noise detected flag */
#define LL_LPUART_ICR_ORECF USART_ICR_ORECF /*!< Overrun error flag */
#define LL_LPUART_ICR_IDLECF USART_ICR_IDLECF /*!< Idle line detected flag */
+#if defined(USART_CR1_FIFOEN)
+#define LL_LPUART_ICR_TXFECF USART_ICR_TXFECF /*!< TX FIFO Empty Clear flag */
+#endif
#define LL_LPUART_ICR_TCCF USART_ICR_TCCF /*!< Transmission complete flag */
#define LL_LPUART_ICR_CTSCF USART_ICR_CTSCF /*!< CTS flag */
#define LL_LPUART_ICR_CMCF USART_ICR_CMCF /*!< Character match flag */
@@ -160,9 +192,17 @@
#define LL_LPUART_ISR_NE USART_ISR_NE /*!< Noise detected flag */
#define LL_LPUART_ISR_ORE USART_ISR_ORE /*!< Overrun error flag */
#define LL_LPUART_ISR_IDLE USART_ISR_IDLE /*!< Idle line detected flag */
+#if defined(USART_CR1_FIFOEN)
+#define LL_LPUART_ISR_RXNE_RXFNE USART_ISR_RXNE_RXFNE /*!< Read data register or RX FIFO not empty flag */
+#else
#define LL_LPUART_ISR_RXNE USART_ISR_RXNE /*!< Read data register not empty flag */
+#endif
#define LL_LPUART_ISR_TC USART_ISR_TC /*!< Transmission complete flag */
+#if defined(USART_CR1_FIFOEN)
+#define LL_LPUART_ISR_TXE_TXFNF USART_ISR_TXE_TXFNF /*!< Transmit data register empty or TX FIFO Not Full flag*/
+#else
#define LL_LPUART_ISR_TXE USART_ISR_TXE /*!< Transmit data register empty flag */
+#endif
#define LL_LPUART_ISR_CTSIF USART_ISR_CTSIF /*!< CTS interrupt flag */
#define LL_LPUART_ISR_CTS USART_ISR_CTS /*!< CTS flag */
#define LL_LPUART_ISR_BUSY USART_ISR_BUSY /*!< Busy flag */
@@ -172,6 +212,12 @@
#define LL_LPUART_ISR_WUF USART_ISR_WUF /*!< Wakeup from Stop mode flag */
#define LL_LPUART_ISR_TEACK USART_ISR_TEACK /*!< Transmit enable acknowledge flag */
#define LL_LPUART_ISR_REACK USART_ISR_REACK /*!< Receive enable acknowledge flag */
+#if defined(USART_CR1_FIFOEN)
+#define LL_LPUART_ISR_TXFE USART_ISR_TXFE /*!< TX FIFO empty flag */
+#define LL_LPUART_ISR_RXFF USART_ISR_RXFF /*!< RX FIFO full flag */
+#define LL_LPUART_ISR_RXFT USART_ISR_RXFT /*!< RX FIFO threshold flag */
+#define LL_LPUART_ISR_TXFT USART_ISR_TXFT /*!< TX FIFO threshold flag */
+#endif
/**
* @}
*/
@@ -181,17 +227,48 @@
* @{
*/
#define LL_LPUART_CR1_IDLEIE USART_CR1_IDLEIE /*!< IDLE interrupt enable */
+#if defined(USART_CR1_FIFOEN)
+#define LL_LPUART_CR1_RXNEIE_RXFNEIE USART_CR1_RXNEIE_RXFNEIE /*!< Read data register and RXFIFO not empty interrupt enable */
+#else
#define LL_LPUART_CR1_RXNEIE USART_CR1_RXNEIE /*!< Read data register not empty interrupt enable */
+#endif
#define LL_LPUART_CR1_TCIE USART_CR1_TCIE /*!< Transmission complete interrupt enable */
+#if defined(USART_CR1_FIFOEN)
+#define LL_LPUART_CR1_TXEIE_TXFNFIE USART_CR1_TXEIE_TXFNFIE /*!< Transmit data register empty and TX FIFO not full interrupt enable */
+#else
#define LL_LPUART_CR1_TXEIE USART_CR1_TXEIE /*!< Transmit data register empty interrupt enable */
+#endif
#define LL_LPUART_CR1_PEIE USART_CR1_PEIE /*!< Parity error */
#define LL_LPUART_CR1_CMIE USART_CR1_CMIE /*!< Character match interrupt enable */
+#if defined(USART_CR1_FIFOEN)
+#define LL_LPUART_CR1_TXFEIE USART_CR1_TXFEIE /*!< TX FIFO empty interrupt enable */
+#define LL_LPUART_CR1_RXFFIE USART_CR1_RXFFIE /*!< RX FIFO full interrupt enable */
+#endif
#define LL_LPUART_CR3_EIE USART_CR3_EIE /*!< Error interrupt enable */
#define LL_LPUART_CR3_CTSIE USART_CR3_CTSIE /*!< CTS interrupt enable */
#define LL_LPUART_CR3_WUFIE USART_CR3_WUFIE /*!< Wakeup from Stop mode interrupt enable */
+#if defined(USART_CR1_FIFOEN)
+#define LL_LPUART_CR3_TXFTIE USART_CR3_TXFTIE /*!< TX FIFO threshold interrupt enable */
+#define LL_LPUART_CR3_RXFTIE USART_CR3_RXFTIE /*!< RX FIFO threshold interrupt enable */
+#endif
/**
* @}
*/
+#if defined(USART_CR1_FIFOEN)
+
+/** @defgroup LPUART_LL_EC_FIFOTHRESHOLD FIFO Threshold
+ * @{
+ */
+#define LL_LPUART_FIFOTHRESHOLD_1_8 0x00000000U /*!< FIFO reaches 1/8 of its depth */
+#define LL_LPUART_FIFOTHRESHOLD_1_4 0x00000001U /*!< FIFO reaches 1/4 of its depth */
+#define LL_LPUART_FIFOTHRESHOLD_1_2 0x00000002U /*!< FIFO reaches 1/2 of its depth */
+#define LL_LPUART_FIFOTHRESHOLD_3_4 0x00000003U /*!< FIFO reaches 3/4 of its depth */
+#define LL_LPUART_FIFOTHRESHOLD_7_8 0x00000004U /*!< FIFO reaches 7/8 of its depth */
+#define LL_LPUART_FIFOTHRESHOLD_8_8 0x00000005U /*!< FIFO becomes empty for TX and full for RX */
+/**
+ * @}
+ */
+#endif
/** @defgroup LPUART_LL_EC_DIRECTION Direction
* @{
@@ -232,6 +309,27 @@
/**
* @}
*/
+#if defined(USART_PRESC_PRESCALER)
+
+/** @defgroup LPUART_LL_EC_PRESCALER Clock Source Prescaler
+ * @{
+ */
+#define LL_LPUART_PRESCALER_DIV1 0x00000000U /*!< Input clock not devided */
+#define LL_LPUART_PRESCALER_DIV2 (USART_PRESC_PRESCALER_0) /*!< Input clock devided by 2 */
+#define LL_LPUART_PRESCALER_DIV4 (USART_PRESC_PRESCALER_1) /*!< Input clock devided by 4 */
+#define LL_LPUART_PRESCALER_DIV6 (USART_PRESC_PRESCALER_1 | USART_PRESC_PRESCALER_0) /*!< Input clock devided by 6 */
+#define LL_LPUART_PRESCALER_DIV8 (USART_PRESC_PRESCALER_2) /*!< Input clock devided by 8 */
+#define LL_LPUART_PRESCALER_DIV10 (USART_PRESC_PRESCALER_2 | USART_PRESC_PRESCALER_0) /*!< Input clock devided by 10 */
+#define LL_LPUART_PRESCALER_DIV12 (USART_PRESC_PRESCALER_2 | USART_PRESC_PRESCALER_1) /*!< Input clock devided by 12 */
+#define LL_LPUART_PRESCALER_DIV16 (USART_PRESC_PRESCALER_2 | USART_PRESC_PRESCALER_1 | USART_PRESC_PRESCALER_0) /*!< Input clock devided by 16 */
+#define LL_LPUART_PRESCALER_DIV32 (USART_PRESC_PRESCALER_3) /*!< Input clock devided by 32 */
+#define LL_LPUART_PRESCALER_DIV64 (USART_PRESC_PRESCALER_3 | USART_PRESC_PRESCALER_0) /*!< Input clock devided by 64 */
+#define LL_LPUART_PRESCALER_DIV128 (USART_PRESC_PRESCALER_3 | USART_PRESC_PRESCALER_1) /*!< Input clock devided by 128 */
+#define LL_LPUART_PRESCALER_DIV256 (USART_PRESC_PRESCALER_3 | USART_PRESC_PRESCALER_1 | USART_PRESC_PRESCALER_0) /*!< Input clock devided by 256 */
+/**
+ * @}
+ */
+#endif
/** @defgroup LPUART_LL_EC_STOPBITS Stop Bits
* @{
@@ -376,10 +474,30 @@
* @brief Compute LPUARTDIV value according to Peripheral Clock and
* expected Baud Rate (20-bit value of LPUARTDIV is returned)
* @param __PERIPHCLK__ Peripheral Clock frequency used for LPUART Instance
+ @if USART_PRESC_PRESCALER
+ * @param __PRESCALER__ This parameter can be one of the following values:
+ * @arg @ref LL_LPUART_PRESCALER_DIV1
+ * @arg @ref LL_LPUART_PRESCALER_DIV2
+ * @arg @ref LL_LPUART_PRESCALER_DIV4
+ * @arg @ref LL_LPUART_PRESCALER_DIV6
+ * @arg @ref LL_LPUART_PRESCALER_DIV8
+ * @arg @ref LL_LPUART_PRESCALER_DIV10
+ * @arg @ref LL_LPUART_PRESCALER_DIV12
+ * @arg @ref LL_LPUART_PRESCALER_DIV16
+ * @arg @ref LL_LPUART_PRESCALER_DIV32
+ * @arg @ref LL_LPUART_PRESCALER_DIV64
+ * @arg @ref LL_LPUART_PRESCALER_DIV128
+ * @arg @ref LL_LPUART_PRESCALER_DIV256
+ * @param __PRESCALER__ Prescaler value
+ @endif
* @param __BAUDRATE__ Baud Rate value to achieve
* @retval LPUARTDIV value to be used for BRR register filling
*/
+#if defined(USART_PRESC_PRESCALER)
+#define __LL_LPUART_DIV(__PERIPHCLK__, __PRESCALER__, __BAUDRATE__) ((((((uint64_t)(__PERIPHCLK__)/(uint64_t)(LPUART_PRESCALER_TAB[(__PRESCALER__)]))*LPUART_LPUARTDIV_FREQ_MUL) + ((__BAUDRATE__)/2))/(__BAUDRATE__)) & LPUART_BRR_MASK)
+#else
#define __LL_LPUART_DIV(__PERIPHCLK__, __BAUDRATE__) (((((uint64_t)(__PERIPHCLK__)*LPUART_LPUARTDIV_FREQ_MUL) + ((__BAUDRATE__)/2))/(__BAUDRATE__)) & LPUART_BRR_MASK)
+#endif
/**
* @}
@@ -439,6 +557,137 @@
return (READ_BIT(LPUARTx->CR1, USART_CR1_UE) == (USART_CR1_UE));
}
+#if defined(USART_CR1_FIFOEN)
+/**
+ * @brief FIFO Mode Enable
+ * @rmtoll CR1 FIFOEN LL_LPUART_EnableFIFO
+ * @param LPUARTx LPUART Instance
+ * @retval None
+ */
+__STATIC_INLINE void LL_LPUART_EnableFIFO(USART_TypeDef *LPUARTx)
+{
+ SET_BIT(LPUARTx->CR1, USART_CR1_FIFOEN);
+}
+
+/**
+ * @brief FIFO Mode Disable
+ * @rmtoll CR1 FIFOEN LL_LPUART_DisableFIFO
+ * @param LPUARTx LPUART Instance
+ * @retval None
+ */
+__STATIC_INLINE void LL_LPUART_DisableFIFO(USART_TypeDef *LPUARTx)
+{
+ CLEAR_BIT(LPUARTx->CR1, USART_CR1_FIFOEN);
+}
+
+/**
+ * @brief Indicate if FIFO Mode is enabled
+ * @rmtoll CR1 FIFOEN LL_LPUART_IsEnabledFIFO
+ * @param LPUARTx LPUART Instance
+ * @retval State of bit (1 or 0).
+ */
+__STATIC_INLINE uint32_t LL_LPUART_IsEnabledFIFO(USART_TypeDef *LPUARTx)
+{
+ return (READ_BIT(LPUARTx->CR1, USART_CR1_FIFOEN) == (USART_CR1_FIFOEN));
+}
+
+/**
+ * @brief Configure TX FIFO Threshold
+ * @rmtoll CR3 TXFTCFG LL_LPUART_SetTXFIFOThreshold
+ * @param LPUARTx LPUART Instance
+ * @param Threshold This parameter can be one of the following values:
+ * @arg @ref LL_LPUART_FIFOTHRESHOLD_1_8
+ * @arg @ref LL_LPUART_FIFOTHRESHOLD_1_4
+ * @arg @ref LL_LPUART_FIFOTHRESHOLD_1_2
+ * @arg @ref LL_LPUART_FIFOTHRESHOLD_3_4
+ * @arg @ref LL_LPUART_FIFOTHRESHOLD_7_8
+ * @arg @ref LL_LPUART_FIFOTHRESHOLD_8_8
+ * @retval None
+ */
+__STATIC_INLINE void LL_LPUART_SetTXFIFOThreshold(USART_TypeDef *LPUARTx, uint32_t Threshold)
+{
+ MODIFY_REG(LPUARTx->CR3, USART_CR3_TXFTCFG, Threshold << USART_CR3_TXFTCFG_Pos);
+}
+
+/**
+ * @brief Return TX FIFO Threshold Configuration
+ * @rmtoll CR3 TXFTCFG LL_LPUART_GetTXFIFOThreshold
+ * @param LPUARTx LPUART Instance
+ * @retval Returned value can be one of the following values:
+ * @arg @ref LL_LPUART_FIFOTHRESHOLD_1_8
+ * @arg @ref LL_LPUART_FIFOTHRESHOLD_1_4
+ * @arg @ref LL_LPUART_FIFOTHRESHOLD_1_2
+ * @arg @ref LL_LPUART_FIFOTHRESHOLD_3_4
+ * @arg @ref LL_LPUART_FIFOTHRESHOLD_7_8
+ * @arg @ref LL_LPUART_FIFOTHRESHOLD_8_8
+ */
+__STATIC_INLINE uint32_t LL_LPUART_GetTXFIFOThreshold(USART_TypeDef *LPUARTx)
+{
+ return (uint32_t)(READ_BIT(LPUARTx->CR3, USART_CR3_TXFTCFG) >> USART_CR3_TXFTCFG_Pos);
+}
+
+/**
+ * @brief Configure RX FIFO Threshold
+ * @rmtoll CR3 RXFTCFG LL_LPUART_SetRXFIFOThreshold
+ * @param LPUARTx LPUART Instance
+ * @param Threshold This parameter can be one of the following values:
+ * @arg @ref LL_LPUART_FIFOTHRESHOLD_1_8
+ * @arg @ref LL_LPUART_FIFOTHRESHOLD_1_4
+ * @arg @ref LL_LPUART_FIFOTHRESHOLD_1_2
+ * @arg @ref LL_LPUART_FIFOTHRESHOLD_3_4
+ * @arg @ref LL_LPUART_FIFOTHRESHOLD_7_8
+ * @arg @ref LL_LPUART_FIFOTHRESHOLD_8_8
+ * @retval None
+ */
+__STATIC_INLINE void LL_LPUART_SetRXFIFOThreshold(USART_TypeDef *LPUARTx, uint32_t Threshold)
+{
+ MODIFY_REG(LPUARTx->CR3, USART_CR3_RXFTCFG, Threshold << USART_CR3_RXFTCFG_Pos);
+}
+
+/**
+ * @brief Return RX FIFO Threshold Configuration
+ * @rmtoll CR3 RXFTCFG LL_LPUART_GetRXFIFOThreshold
+ * @param LPUARTx LPUART Instance
+ * @retval Returned value can be one of the following values:
+ * @arg @ref LL_LPUART_FIFOTHRESHOLD_1_8
+ * @arg @ref LL_LPUART_FIFOTHRESHOLD_1_4
+ * @arg @ref LL_LPUART_FIFOTHRESHOLD_1_2
+ * @arg @ref LL_LPUART_FIFOTHRESHOLD_3_4
+ * @arg @ref LL_LPUART_FIFOTHRESHOLD_7_8
+ * @arg @ref LL_LPUART_FIFOTHRESHOLD_8_8
+ */
+__STATIC_INLINE uint32_t LL_LPUART_GetRXFIFOThreshold(USART_TypeDef *LPUARTx)
+{
+ return (uint32_t)(READ_BIT(LPUARTx->CR3, USART_CR3_RXFTCFG) >> USART_CR3_RXFTCFG_Pos);
+}
+
+/**
+ * @brief Configure TX and RX FIFOs Threshold
+ * @rmtoll CR3 TXFTCFG LL_LPUART_ConfigFIFOsThreshold\n
+ * CR3 RXFTCFG LL_LPUART_ConfigFIFOsThreshold
+ * @param LPUARTx LPUART Instance
+ * @param TXThreshold This parameter can be one of the following values:
+ * @arg @ref LL_LPUART_FIFOTHRESHOLD_1_8
+ * @arg @ref LL_LPUART_FIFOTHRESHOLD_1_4
+ * @arg @ref LL_LPUART_FIFOTHRESHOLD_1_2
+ * @arg @ref LL_LPUART_FIFOTHRESHOLD_3_4
+ * @arg @ref LL_LPUART_FIFOTHRESHOLD_7_8
+ * @arg @ref LL_LPUART_FIFOTHRESHOLD_8_8
+ * @param RXThreshold This parameter can be one of the following values:
+ * @arg @ref LL_LPUART_FIFOTHRESHOLD_1_8
+ * @arg @ref LL_LPUART_FIFOTHRESHOLD_1_4
+ * @arg @ref LL_LPUART_FIFOTHRESHOLD_1_2
+ * @arg @ref LL_LPUART_FIFOTHRESHOLD_3_4
+ * @arg @ref LL_LPUART_FIFOTHRESHOLD_7_8
+ * @arg @ref LL_LPUART_FIFOTHRESHOLD_8_8
+ * @retval None
+ */
+__STATIC_INLINE void LL_LPUART_ConfigFIFOsThreshold(USART_TypeDef *LPUARTx, uint32_t TXThreshold, uint32_t RXThreshold)
+{
+ MODIFY_REG(LPUARTx->CR3, USART_CR3_TXFTCFG | USART_CR3_RXFTCFG, TXThreshold << USART_CR3_TXFTCFG_Pos | RXThreshold << USART_CR3_RXFTCFG_Pos);
+}
+#endif
+
/**
* @brief LPUART enabled in STOP Mode
* @note When this function is enabled, LPUART is able to wake up the MCU from Stop mode, provided that
@@ -677,6 +926,55 @@
return (READ_BIT(LPUARTx->CR1, USART_CR1_MME) == (USART_CR1_MME));
}
+#if defined(USART_PRESC_PRESCALER)
+/**
+ * @brief Configure Clock source prescaler for baudrate generator and oversampling
+ * @rmtoll PRESC PRESCALER LL_LPUART_SetPrescaler
+ * @param LPUARTx LPUART Instance
+ * @param PrescalerValue This parameter can be one of the following values:
+ * @arg @ref LL_LPUART_PRESCALER_DIV1
+ * @arg @ref LL_LPUART_PRESCALER_DIV2
+ * @arg @ref LL_LPUART_PRESCALER_DIV4
+ * @arg @ref LL_LPUART_PRESCALER_DIV6
+ * @arg @ref LL_LPUART_PRESCALER_DIV8
+ * @arg @ref LL_LPUART_PRESCALER_DIV10
+ * @arg @ref LL_LPUART_PRESCALER_DIV12
+ * @arg @ref LL_LPUART_PRESCALER_DIV16
+ * @arg @ref LL_LPUART_PRESCALER_DIV32
+ * @arg @ref LL_LPUART_PRESCALER_DIV64
+ * @arg @ref LL_LPUART_PRESCALER_DIV128
+ * @arg @ref LL_LPUART_PRESCALER_DIV256
+ * @retval None
+ */
+__STATIC_INLINE void LL_LPUART_SetPrescaler(USART_TypeDef *LPUARTx, uint32_t PrescalerValue)
+{
+ MODIFY_REG(LPUARTx->PRESC, USART_PRESC_PRESCALER, PrescalerValue);
+}
+
+/**
+ * @brief Retrieve the Clock source prescaler for baudrate generator and oversampling
+ * @rmtoll PRESC PRESCALER LL_LPUART_GetPrescaler
+ * @param LPUARTx LPUART Instance
+ * @retval Returned value can be one of the following values:
+ * @arg @ref LL_LPUART_PRESCALER_DIV1
+ * @arg @ref LL_LPUART_PRESCALER_DIV2
+ * @arg @ref LL_LPUART_PRESCALER_DIV4
+ * @arg @ref LL_LPUART_PRESCALER_DIV6
+ * @arg @ref LL_LPUART_PRESCALER_DIV8
+ * @arg @ref LL_LPUART_PRESCALER_DIV10
+ * @arg @ref LL_LPUART_PRESCALER_DIV12
+ * @arg @ref LL_LPUART_PRESCALER_DIV16
+ * @arg @ref LL_LPUART_PRESCALER_DIV32
+ * @arg @ref LL_LPUART_PRESCALER_DIV64
+ * @arg @ref LL_LPUART_PRESCALER_DIV128
+ * @arg @ref LL_LPUART_PRESCALER_DIV256
+ */
+__STATIC_INLINE uint32_t LL_LPUART_GetPrescaler(USART_TypeDef *LPUARTx)
+{
+ return (uint32_t)(READ_BIT(LPUARTx->PRESC, USART_PRESC_PRESCALER));
+}
+#endif
+
/**
* @brief Set the length of the stop bits
* @rmtoll CR2 STOP LL_LPUART_SetStopBitsLength
@@ -1086,12 +1384,35 @@
* @rmtoll BRR BRR LL_LPUART_SetBaudRate
* @param LPUARTx LPUART Instance
* @param PeriphClk Peripheral Clock
+ @if USART_PRESC_PRESCALER
+ * @param PrescalerValue This parameter can be one of the following values:
+ * @arg @ref LL_LPUART_PRESCALER_DIV1
+ * @arg @ref LL_LPUART_PRESCALER_DIV2
+ * @arg @ref LL_LPUART_PRESCALER_DIV4
+ * @arg @ref LL_LPUART_PRESCALER_DIV6
+ * @arg @ref LL_LPUART_PRESCALER_DIV8
+ * @arg @ref LL_LPUART_PRESCALER_DIV10
+ * @arg @ref LL_LPUART_PRESCALER_DIV12
+ * @arg @ref LL_LPUART_PRESCALER_DIV16
+ * @arg @ref LL_LPUART_PRESCALER_DIV32
+ * @arg @ref LL_LPUART_PRESCALER_DIV64
+ * @arg @ref LL_LPUART_PRESCALER_DIV128
+ * @arg @ref LL_LPUART_PRESCALER_DIV256
+ @endif
* @param BaudRate Baud Rate
* @retval None
*/
+#if defined(USART_PRESC_PRESCALER)
+__STATIC_INLINE void LL_LPUART_SetBaudRate(USART_TypeDef *LPUARTx, uint32_t PeriphClk, uint32_t PrescalerValue, uint32_t BaudRate)
+#else
__STATIC_INLINE void LL_LPUART_SetBaudRate(USART_TypeDef *LPUARTx, uint32_t PeriphClk, uint32_t BaudRate)
+#endif
{
+#if defined(USART_PRESC_PRESCALER)
+ LPUARTx->BRR = __LL_LPUART_DIV(PeriphClk, PrescalerValue, BaudRate);
+#else
LPUARTx->BRR = __LL_LPUART_DIV(PeriphClk, BaudRate);
+#endif
}
/**
@@ -1101,18 +1422,44 @@
* @rmtoll BRR BRR LL_LPUART_GetBaudRate
* @param LPUARTx LPUART Instance
* @param PeriphClk Peripheral Clock
+ @if USART_PRESC_PRESCALER
+ * @param PrescalerValue This parameter can be one of the following values:
+ * @arg @ref LL_LPUART_PRESCALER_DIV1
+ * @arg @ref LL_LPUART_PRESCALER_DIV2
+ * @arg @ref LL_LPUART_PRESCALER_DIV4
+ * @arg @ref LL_LPUART_PRESCALER_DIV6
+ * @arg @ref LL_LPUART_PRESCALER_DIV8
+ * @arg @ref LL_LPUART_PRESCALER_DIV10
+ * @arg @ref LL_LPUART_PRESCALER_DIV12
+ * @arg @ref LL_LPUART_PRESCALER_DIV16
+ * @arg @ref LL_LPUART_PRESCALER_DIV32
+ * @arg @ref LL_LPUART_PRESCALER_DIV64
+ * @arg @ref LL_LPUART_PRESCALER_DIV128
+ * @arg @ref LL_LPUART_PRESCALER_DIV256
+ @endif
* @retval Baud Rate
*/
+#if defined(USART_PRESC_PRESCALER)
+__STATIC_INLINE uint32_t LL_LPUART_GetBaudRate(USART_TypeDef *LPUARTx, uint32_t PeriphClk, uint32_t PrescalerValue)
+#else
__STATIC_INLINE uint32_t LL_LPUART_GetBaudRate(USART_TypeDef *LPUARTx, uint32_t PeriphClk)
+#endif
{
register uint32_t lpuartdiv = 0x0U;
register uint32_t brrresult = 0x0U;
+#if defined(USART_PRESC_PRESCALER)
+ register uint32_t periphclkpresc = (uint32_t)(PeriphClk / (LPUART_PRESCALER_TAB[PrescalerValue]));
+#endif
lpuartdiv = LPUARTx->BRR & LPUART_BRR_MASK;
if (lpuartdiv >= LPUART_BRR_MIN_VALUE)
{
+#if defined(USART_PRESC_PRESCALER)
+ brrresult = (uint32_t)(((uint64_t)(periphclkpresc) * LPUART_LPUARTDIV_FREQ_MUL) / lpuartdiv);
+#else
brrresult = (uint32_t)(((uint64_t)(PeriphClk) * LPUART_LPUARTDIV_FREQ_MUL) / lpuartdiv);
+#endif
}
return (brrresult);
@@ -1336,6 +1683,23 @@
return (READ_BIT(LPUARTx->ISR, USART_ISR_IDLE) == (USART_ISR_IDLE));
}
+#if defined(USART_CR1_FIFOEN)
+
+/* Legacy define */
+#define LL_LPUART_IsActiveFlag_RXNE LL_LPUART_IsActiveFlag_RXNE_RXFNE
+
+/**
+ * @brief Check if the LPUART Read Data Register or LPUART RX FIFO Not Empty Flag is set or not
+ * @rmtoll ISR RXNE_RXFNE LL_LPUART_IsActiveFlag_RXNE_RXFNE
+ * @param LPUARTx LPUART Instance
+ * @retval State of bit (1 or 0).
+ */
+__STATIC_INLINE uint32_t LL_LPUART_IsActiveFlag_RXNE_RXFNE(USART_TypeDef *LPUARTx)
+{
+ return (READ_BIT(LPUARTx->ISR, USART_ISR_RXNE_RXFNE) == (USART_ISR_RXNE_RXFNE));
+}
+#else
+
/**
* @brief Check if the LPUART Read Data Register Not Empty Flag is set or not
* @rmtoll ISR RXNE LL_LPUART_IsActiveFlag_RXNE
@@ -1346,6 +1710,7 @@
{
return (READ_BIT(LPUARTx->ISR, USART_ISR_RXNE) == (USART_ISR_RXNE));
}
+#endif
/**
* @brief Check if the LPUART Transmission Complete Flag is set or not
@@ -1358,6 +1723,23 @@
return (READ_BIT(LPUARTx->ISR, USART_ISR_TC) == (USART_ISR_TC));
}
+#if defined(USART_CR1_FIFOEN)
+
+/* Legacy define */
+#define LL_LPUART_IsActiveFlag_TXE LL_LPUART_IsActiveFlag_TXE_TXFNF
+
+/**
+ * @brief Check if the LPUART Transmit Data Register Empty or LPUART TX FIFO Not Full Flag is set or not
+ * @rmtoll ISR TXE_TXFNF LL_LPUART_IsActiveFlag_TXE_TXFNF
+ * @param LPUARTx LPUART Instance
+ * @retval State of bit (1 or 0).
+ */
+__STATIC_INLINE uint32_t LL_LPUART_IsActiveFlag_TXE_TXFNF(USART_TypeDef *LPUARTx)
+{
+ return (READ_BIT(LPUARTx->ISR, USART_ISR_TXE_TXFNF) == (USART_ISR_TXE_TXFNF));
+}
+#else
+
/**
* @brief Check if the LPUART Transmit Data Register Empty Flag is set or not
* @rmtoll ISR TXE LL_LPUART_IsActiveFlag_TXE
@@ -1368,6 +1750,7 @@
{
return (READ_BIT(LPUARTx->ISR, USART_ISR_TXE) == (USART_ISR_TXE));
}
+#endif
/**
* @brief Check if the LPUART CTS interrupt Flag is set or not
@@ -1468,6 +1851,53 @@
return (READ_BIT(LPUARTx->ISR, USART_ISR_REACK) == (USART_ISR_REACK));
}
+#if defined(USART_CR1_FIFOEN)
+
+/**
+ * @brief Check if the LPUART TX FIFO Empty Flag is set or not
+ * @rmtoll ISR TXFE LL_LPUART_IsActiveFlag_TXFE
+ * @param LPUARTx LPUART Instance
+ * @retval State of bit (1 or 0).
+ */
+__STATIC_INLINE uint32_t LL_LPUART_IsActiveFlag_TXFE(USART_TypeDef *LPUARTx)
+{
+ return (READ_BIT(LPUARTx->ISR, USART_ISR_TXFE) == (USART_ISR_TXFE));
+}
+
+/**
+ * @brief Check if the LPUART RX FIFO Full Flag is set or not
+ * @rmtoll ISR RXFF LL_LPUART_IsActiveFlag_RXFF
+ * @param LPUARTx LPUART Instance
+ * @retval State of bit (1 or 0).
+ */
+__STATIC_INLINE uint32_t LL_LPUART_IsActiveFlag_RXFF(USART_TypeDef *LPUARTx)
+{
+ return (READ_BIT(LPUARTx->ISR, USART_ISR_RXFF) == (USART_ISR_RXFF));
+}
+
+/**
+ * @brief Check if the LPUART TX FIFO Threshold Flag is set or not
+ * @rmtoll ISR TXFT LL_LPUART_IsActiveFlag_TXFT
+ * @param LPUARTx LPUART Instance
+ * @retval State of bit (1 or 0).
+ */
+__STATIC_INLINE uint32_t LL_LPUART_IsActiveFlag_TXFT(USART_TypeDef *LPUARTx)
+{
+ return (READ_BIT(LPUARTx->ISR, USART_ISR_TXFT) == (USART_ISR_TXFT));
+}
+
+/**
+ * @brief Check if the LPUART RX FIFO Threshold Flag is set or not
+ * @rmtoll ISR RXFT LL_LPUART_IsActiveFlag_RXFT
+ * @param LPUARTx LPUART Instance
+ * @retval State of bit (1 or 0).
+ */
+__STATIC_INLINE uint32_t LL_LPUART_IsActiveFlag_RXFT(USART_TypeDef *LPUARTx)
+{
+ return (READ_BIT(LPUARTx->ISR, USART_ISR_RXFT) == (USART_ISR_RXFT));
+}
+#endif
+
/**
* @brief Clear Parity Error Flag
* @rmtoll ICR PECF LL_LPUART_ClearFlag_PE
@@ -1523,6 +1953,20 @@
WRITE_REG(LPUARTx->ICR, USART_ICR_IDLECF);
}
+#if defined(USART_CR1_FIFOEN)
+
+/**
+ * @brief Clear TX FIFO Empty Flag
+ * @rmtoll ICR TXFECF LL_LPUART_ClearFlag_TXFE
+ * @param LPUARTx LPUART Instance
+ * @retval None
+ */
+__STATIC_INLINE void LL_LPUART_ClearFlag_TXFE(USART_TypeDef *LPUARTx)
+{
+ WRITE_REG(LPUARTx->ICR, USART_ICR_TXFECF);
+}
+#endif
+
/**
* @brief Clear Transmission Complete Flag
* @rmtoll ICR TCCF LL_LPUART_ClearFlag_TC
@@ -1586,6 +2030,23 @@
SET_BIT(LPUARTx->CR1, USART_CR1_IDLEIE);
}
+#if defined(USART_CR1_FIFOEN)
+
+/* Legacy define */
+#define LL_LPUART_EnableIT_RXNE LL_LPUART_EnableIT_RXNE_RXFNE
+
+/**
+ * @brief Enable RX Not Empty and RX FIFO Not Empty Interrupt
+ * @rmtoll CR1 RXNEIE_RXFNEIE LL_LPUART_EnableIT_RXNE_RXFNE
+ * @param LPUARTx LPUART Instance
+ * @retval None
+ */
+__STATIC_INLINE void LL_LPUART_EnableIT_RXNE_RXFNE(USART_TypeDef *LPUARTx)
+{
+ SET_BIT(LPUARTx->CR1, USART_CR1_RXNEIE_RXFNEIE);
+}
+#else
+
/**
* @brief Enable RX Not Empty Interrupt
* @rmtoll CR1 RXNEIE LL_LPUART_EnableIT_RXNE
@@ -1596,6 +2057,7 @@
{
SET_BIT(LPUARTx->CR1, USART_CR1_RXNEIE);
}
+#endif
/**
* @brief Enable Transmission Complete Interrupt
@@ -1608,6 +2070,23 @@
SET_BIT(LPUARTx->CR1, USART_CR1_TCIE);
}
+#if defined(USART_CR1_FIFOEN)
+
+/* Legacy define */
+#define LL_LPUART_EnableIT_TXE LL_LPUART_EnableIT_TXE_TXFNF
+
+/**
+ * @brief Enable TX Empty and TX FIFO Not Full Interrupt
+ * @rmtoll CR1 TXEIE_TXFNFIE LL_LPUART_EnableIT_TXE_TXFNF
+ * @param LPUARTx LPUART Instance
+ * @retval None
+ */
+__STATIC_INLINE void LL_LPUART_EnableIT_TXE_TXFNF(USART_TypeDef *LPUARTx)
+{
+ SET_BIT(LPUARTx->CR1, USART_CR1_TXEIE_TXFNFIE);
+}
+#else
+
/**
* @brief Enable TX Empty Interrupt
* @rmtoll CR1 TXEIE LL_LPUART_EnableIT_TXE
@@ -1618,6 +2097,7 @@
{
SET_BIT(LPUARTx->CR1, USART_CR1_TXEIE);
}
+#endif
/**
* @brief Enable Parity Error Interrupt
@@ -1641,6 +2121,31 @@
SET_BIT(LPUARTx->CR1, USART_CR1_CMIE);
}
+#if defined(USART_CR1_FIFOEN)
+
+/**
+ * @brief Enable TX FIFO Empty Interrupt
+ * @rmtoll CR1 TXFEIE LL_LPUART_EnableIT_TXFE
+ * @param LPUARTx LPUART Instance
+ * @retval None
+ */
+__STATIC_INLINE void LL_LPUART_EnableIT_TXFE(USART_TypeDef *LPUARTx)
+{
+ SET_BIT(LPUARTx->CR1, USART_CR1_TXFEIE);
+}
+
+/**
+ * @brief Enable RX FIFO Full Interrupt
+ * @rmtoll CR1 RXFFIE LL_LPUART_EnableIT_RXFF
+ * @param LPUARTx LPUART Instance
+ * @retval None
+ */
+__STATIC_INLINE void LL_LPUART_EnableIT_RXFF(USART_TypeDef *LPUARTx)
+{
+ SET_BIT(LPUARTx->CR1, USART_CR1_RXFFIE);
+}
+#endif
+
/**
* @brief Enable Error Interrupt
* @note When set, Error Interrupt Enable Bit is enabling interrupt generation in case of a framing
@@ -1678,6 +2183,31 @@
SET_BIT(LPUARTx->CR3, USART_CR3_WUFIE);
}
+#if defined(USART_CR1_FIFOEN)
+
+/**
+ * @brief Enable TX FIFO Threshold Interrupt
+ * @rmtoll CR3 TXFTIE LL_LPUART_EnableIT_TXFT
+ * @param LPUARTx LPUART Instance
+ * @retval None
+ */
+__STATIC_INLINE void LL_LPUART_EnableIT_TXFT(USART_TypeDef *LPUARTx)
+{
+ SET_BIT(LPUARTx->CR3, USART_CR3_TXFTIE);
+}
+
+/**
+ * @brief Enable RX FIFO Threshold Interrupt
+ * @rmtoll CR3 RXFTIE LL_LPUART_EnableIT_RXFT
+ * @param LPUARTx LPUART Instance
+ * @retval None
+ */
+__STATIC_INLINE void LL_LPUART_EnableIT_RXFT(USART_TypeDef *LPUARTx)
+{
+ SET_BIT(LPUARTx->CR3, USART_CR3_RXFTIE);
+}
+#endif
+
/**
* @brief Disable IDLE Interrupt
* @rmtoll CR1 IDLEIE LL_LPUART_DisableIT_IDLE
@@ -1689,6 +2219,23 @@
CLEAR_BIT(LPUARTx->CR1, USART_CR1_IDLEIE);
}
+#if defined(USART_CR1_FIFOEN)
+
+/* Legacy define */
+#define LL_LPUART_DisableIT_RXNE LL_LPUART_DisableIT_RXNE_RXFNE
+
+/**
+ * @brief Disable RX Not Empty and RX FIFO Not Empty Interrupt
+ * @rmtoll CR1 RXNEIE_RXFNEIE LL_LPUART_DisableIT_RXNE_RXFNE
+ * @param LPUARTx LPUART Instance
+ * @retval None
+ */
+__STATIC_INLINE void LL_LPUART_DisableIT_RXNE_RXFNE(USART_TypeDef *LPUARTx)
+{
+ CLEAR_BIT(LPUARTx->CR1, USART_CR1_RXNEIE_RXFNEIE);
+}
+#else
+
/**
* @brief Disable RX Not Empty Interrupt
* @rmtoll CR1 RXNEIE LL_LPUART_DisableIT_RXNE
@@ -1699,6 +2246,7 @@
{
CLEAR_BIT(LPUARTx->CR1, USART_CR1_RXNEIE);
}
+#endif
/**
* @brief Disable Transmission Complete Interrupt
@@ -1711,6 +2259,23 @@
CLEAR_BIT(LPUARTx->CR1, USART_CR1_TCIE);
}
+#if defined(USART_CR1_FIFOEN)
+
+/* Legacy define */
+#define LL_LPUART_DisableIT_TXE LL_LPUART_DisableIT_TXE_TXFNF
+
+/**
+ * @brief Disable TX Empty and TX FIFO Not Full Interrupt
+ * @rmtoll CR1 TXEIE_TXFNFIE LL_LPUART_DisableIT_TXE_TXFNF
+ * @param LPUARTx LPUART Instance
+ * @retval None
+ */
+__STATIC_INLINE void LL_LPUART_DisableIT_TXE_TXFNF(USART_TypeDef *LPUARTx)
+{
+ CLEAR_BIT(LPUARTx->CR1, USART_CR1_TXEIE_TXFNFIE);
+}
+#else
+
/**
* @brief Disable TX Empty Interrupt
* @rmtoll CR1 TXEIE LL_LPUART_DisableIT_TXE
@@ -1721,6 +2286,7 @@
{
CLEAR_BIT(LPUARTx->CR1, USART_CR1_TXEIE);
}
+#endif
/**
* @brief Disable Parity Error Interrupt
@@ -1744,6 +2310,31 @@
CLEAR_BIT(LPUARTx->CR1, USART_CR1_CMIE);
}
+#if defined(USART_CR1_FIFOEN)
+
+/**
+ * @brief Disable TX FIFO Empty Interrupt
+ * @rmtoll CR1 TXFEIE LL_LPUART_DisableIT_TXFE
+ * @param LPUARTx LPUART Instance
+ * @retval None
+ */
+__STATIC_INLINE void LL_LPUART_DisableIT_TXFE(USART_TypeDef *LPUARTx)
+{
+ CLEAR_BIT(LPUARTx->CR1, USART_CR1_TXFEIE);
+}
+
+/**
+ * @brief Disable RX FIFO Full Interrupt
+ * @rmtoll CR1 RXFFIE LL_LPUART_DisableIT_RXFF
+ * @param LPUARTx LPUART Instance
+ * @retval None
+ */
+__STATIC_INLINE void LL_LPUART_DisableIT_RXFF(USART_TypeDef *LPUARTx)
+{
+ CLEAR_BIT(LPUARTx->CR1, USART_CR1_RXFFIE);
+}
+#endif
+
/**
* @brief Disable Error Interrupt
* @note When set, Error Interrupt Enable Bit is enabling interrupt generation in case of a framing
@@ -1781,6 +2372,31 @@
CLEAR_BIT(LPUARTx->CR3, USART_CR3_WUFIE);
}
+#if defined(USART_CR1_FIFOEN)
+
+/**
+ * @brief Disable TX FIFO Threshold Interrupt
+ * @rmtoll CR3 TXFTIE LL_LPUART_DisableIT_TXFT
+ * @param LPUARTx LPUART Instance
+ * @retval None
+ */
+__STATIC_INLINE void LL_LPUART_DisableIT_TXFT(USART_TypeDef *LPUARTx)
+{
+ CLEAR_BIT(LPUARTx->CR3, USART_CR3_TXFTIE);
+}
+
+/**
+ * @brief Disable RX FIFO Threshold Interrupt
+ * @rmtoll CR3 RXFTIE LL_LPUART_DisableIT_RXFT
+ * @param LPUARTx LPUART Instance
+ * @retval None
+ */
+__STATIC_INLINE void LL_LPUART_DisableIT_RXFT(USART_TypeDef *LPUARTx)
+{
+ CLEAR_BIT(LPUARTx->CR3, USART_CR3_RXFTIE);
+}
+#endif
+
/**
* @brief Check if the LPUART IDLE Interrupt source is enabled or disabled.
* @rmtoll CR1 IDLEIE LL_LPUART_IsEnabledIT_IDLE
@@ -1792,6 +2408,23 @@
return (READ_BIT(LPUARTx->CR1, USART_CR1_IDLEIE) == (USART_CR1_IDLEIE));
}
+#if defined(USART_CR1_FIFOEN)
+
+/* Legacy define */
+#define LL_LPUART_IsEnabledIT_RXNE LL_LPUART_IsEnabledIT_RXNE_RXFNE
+
+/**
+ * @brief Check if the LPUART RX Not Empty and LPUART RX FIFO Not Empty Interrupt is enabled or disabled.
+ * @rmtoll CR1 RXNEIE_RXFNEIE LL_LPUART_IsEnabledIT_RXNE_RXFNE
+ * @param LPUARTx LPUART Instance
+ * @retval State of bit (1 or 0).
+ */
+__STATIC_INLINE uint32_t LL_LPUART_IsEnabledIT_RXNE_RXFNE(USART_TypeDef *LPUARTx)
+{
+ return (READ_BIT(LPUARTx->CR1, USART_CR1_RXNEIE_RXFNEIE) == (USART_CR1_RXNEIE_RXFNEIE));
+}
+#else
+
/**
* @brief Check if the LPUART RX Not Empty Interrupt is enabled or disabled.
* @rmtoll CR1 RXNEIE LL_LPUART_IsEnabledIT_RXNE
@@ -1802,6 +2435,7 @@
{
return (READ_BIT(LPUARTx->CR1, USART_CR1_RXNEIE) == (USART_CR1_RXNEIE));
}
+#endif
/**
* @brief Check if the LPUART Transmission Complete Interrupt is enabled or disabled.
@@ -1814,6 +2448,23 @@
return (READ_BIT(LPUARTx->CR1, USART_CR1_TCIE) == (USART_CR1_TCIE));
}
+#if defined(USART_CR1_FIFOEN)
+
+/* Legacy define */
+#define LL_LPUART_IsEnabledIT_TXE LL_LPUART_IsEnabledIT_TXE_TXFNF
+
+/**
+ * @brief Check if the LPUART TX Empty and LPUART TX FIFO Not Full Interrupt is enabled or disabled
+ * @rmtoll CR1 TXEIE_TXFNFIE LL_LPUART_IsEnabledIT_TXE_TXFNF
+ * @param LPUARTx LPUART Instance
+ * @retval State of bit (1 or 0).
+ */
+__STATIC_INLINE uint32_t LL_LPUART_IsEnabledIT_TXE_TXFNF(USART_TypeDef *LPUARTx)
+{
+ return (READ_BIT(LPUARTx->CR1, USART_CR1_TXEIE_TXFNFIE) == (USART_CR1_TXEIE_TXFNFIE));
+}
+#else
+
/**
* @brief Check if the LPUART TX Empty Interrupt is enabled or disabled.
* @rmtoll CR1 TXEIE LL_LPUART_IsEnabledIT_TXE
@@ -1824,6 +2475,7 @@
{
return (READ_BIT(LPUARTx->CR1, USART_CR1_TXEIE) == (USART_CR1_TXEIE));
}
+#endif
/**
* @brief Check if the LPUART Parity Error Interrupt is enabled or disabled.
@@ -1846,6 +2498,30 @@
{
return (READ_BIT(LPUARTx->CR1, USART_CR1_CMIE) == (USART_CR1_CMIE));
}
+#if defined(USART_CR1_FIFOEN)
+
+/**
+ * @brief Check if the LPUART TX FIFO Empty Interrupt is enabled or disabled
+ * @rmtoll CR1 TXFEIE LL_LPUART_IsEnabledIT_TXFE
+ * @param LPUARTx LPUART Instance
+ * @retval State of bit (1 or 0).
+ */
+__STATIC_INLINE uint32_t LL_LPUART_IsEnabledIT_TXFE(USART_TypeDef *LPUARTx)
+{
+ return (READ_BIT(LPUARTx->CR1, USART_CR1_TXFEIE) == (USART_CR1_TXFEIE));
+}
+
+/**
+ * @brief Check if the LPUART RX FIFO Full Interrupt is enabled or disabled
+ * @rmtoll CR1 RXFFIE LL_LPUART_IsEnabledIT_RXFF
+ * @param LPUARTx LPUART Instance
+ * @retval State of bit (1 or 0).
+ */
+__STATIC_INLINE uint32_t LL_LPUART_IsEnabledIT_RXFF(USART_TypeDef *LPUARTx)
+{
+ return (READ_BIT(LPUARTx->CR1, USART_CR1_RXFFIE) == (USART_CR1_RXFFIE));
+}
+#endif
/**
* @brief Check if the LPUART Error Interrupt is enabled or disabled.
@@ -1880,6 +2556,31 @@
return (READ_BIT(LPUARTx->CR3, USART_CR3_WUFIE) == (USART_CR3_WUFIE));
}
+#if defined(USART_CR1_FIFOEN)
+
+/**
+ * @brief Check if LPUART TX FIFO Threshold Interrupt is enabled or disabled
+ * @rmtoll CR3 TXFTIE LL_LPUART_IsEnabledIT_TXFT
+ * @param LPUARTx LPUART Instance
+ * @retval State of bit (1 or 0).
+ */
+__STATIC_INLINE uint32_t LL_LPUART_IsEnabledIT_TXFT(USART_TypeDef *LPUARTx)
+{
+ return (READ_BIT(LPUARTx->CR3, USART_CR3_TXFTIE) == (USART_CR3_TXFTIE));
+}
+
+/**
+ * @brief Check if LPUART RX FIFO Threshold Interrupt is enabled or disabled
+ * @rmtoll CR3 RXFTIE LL_LPUART_IsEnabledIT_RXFT
+ * @param LPUARTx LPUART Instance
+ * @retval State of bit (1 or 0).
+ */
+__STATIC_INLINE uint32_t LL_LPUART_IsEnabledIT_RXFT(USART_TypeDef *LPUARTx)
+{
+ return (READ_BIT(LPUARTx->CR3, USART_CR3_RXFTIE) == (USART_CR3_RXFTIE));
+}
+#endif
+
/**
* @}
*/
@@ -2100,7 +2801,13 @@
}
/**
+ @if USART_CR1_FIFOEN
+ * @brief Request a Receive Data and FIFO flush
+ * @note Allows to discard the received data without reading them, and avoid an overrun
+ * condition.
+ @else
* @brief Request a Receive Data flush
+ @endif
* @rmtoll RQR RXFRQ LL_LPUART_RequestRxDataFlush
* @param LPUARTx LPUART Instance
* @retval None
