Diff: TARGET_EFM32PG12_STK3402/TOOLCHAIN_GCC_ARM/efm32pg12b_lesense_st.h

Revision:

171:3a7713b1edbc

--- /dev/null	Thu Jan 01 00:00:00 1970 +0000
+++ b/TARGET_EFM32PG12_STK3402/TOOLCHAIN_GCC_ARM/efm32pg12b_lesense_st.h	Thu Nov 08 11:45:42 2018 +0000
@@ -0,0 +1,47 @@
+/**************************************************************************//**
+ * @file efm32pg12b_lesense_st.h
+ * @brief EFM32PG12B_LESENSE_ST register and bit field definitions
+ * @version 5.1.2
+ ******************************************************************************
+ * @section License
+ * <b>Copyright 2017 Silicon Laboratories, Inc. http://www.silabs.com</b>
+ ******************************************************************************
+ *
+ * Permission is granted to anyone to use this software for any purpose,
+ * including commercial applications, and to alter it and redistribute it
+ * freely, subject to the following restrictions:
+ *
+ * 1. The origin of this software must not be misrepresented; you must not
+ *    claim that you wrote the original software.@n
+ * 2. Altered source versions must be plainly marked as such, and must not be
+ *    misrepresented as being the original software.@n
+ * 3. This notice may not be removed or altered from any source distribution.
+ *
+ * DISCLAIMER OF WARRANTY/LIMITATION OF REMEDIES: Silicon Laboratories, Inc.
+ * has no obligation to support this Software. Silicon Laboratories, Inc. is
+ * providing the Software "AS IS", with no express or implied warranties of any
+ * kind, including, but not limited to, any implied warranties of
+ * merchantability or fitness for any particular purpose or warranties against
+ * infringement of any proprietary rights of a third party.
+ *
+ * Silicon Laboratories, Inc. will not be liable for any consequential,
+ * incidental, or special damages, or any other relief, or for any claim by
+ * any third party, arising from your use of this Software.
+ *
+ *****************************************************************************/
+/**************************************************************************//**
+* @addtogroup Parts
+* @{
+******************************************************************************/
+/**************************************************************************//**
+ * @brief LESENSE_ST EFM32PG12B LESENSE ST
+ *****************************************************************************/
+typedef struct
+{
+  __IOM uint32_t TCONFA; /**< State transition configuration A  */
+  __IOM uint32_t TCONFB; /**< State transition configuration B  */
+} LESENSE_ST_TypeDef;
+
+/** @} End of group Parts */
+
+