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Diff: TARGET_NUCLEO_F334R8/TARGET_STM/TARGET_STM32F3/device/stm32f3xx_hal_comp_ex.h
- Revision:
- 135:176b8275d35d
- Parent:
- 128:9bcdf88f62b0
--- a/TARGET_NUCLEO_F334R8/TARGET_STM/TARGET_STM32F3/device/stm32f3xx_hal_comp_ex.h Mon Jan 16 12:05:23 2017 +0000
+++ b/TARGET_NUCLEO_F334R8/TARGET_STM/TARGET_STM32F3/device/stm32f3xx_hal_comp_ex.h Thu Feb 02 16:02:30 2017 +0000
@@ -2,8 +2,8 @@
******************************************************************************
* @file stm32f3xx_hal_comp_ex.h
* @author MCD Application Team
- * @version V1.3.0
- * @date 01-July-2016
+ * @version V1.4.0
+ * @date 16-December-2016
* @brief Header file of COMP HAL Extended module.
******************************************************************************
* @attention
@@ -65,9 +65,9 @@
/** @defgroup COMPEx_InvertingInput COMP Extended InvertingInput (STM32F302xE/STM32F303xE/STM32F398xx/STM32F302xC/STM32F303xC/STM32F358xx Product devices)
* @{
*/
-#define COMP_INVERTINGINPUT_1_4VREFINT ((uint32_t)0x00000000) /*!< 1/4 VREFINT connected to comparator inverting input */
-#define COMP_INVERTINGINPUT_1_2VREFINT COMP_CSR_COMPxINSEL_0 /*!< 1/2 VREFINT connected to comparator inverting input */
-#define COMP_INVERTINGINPUT_3_4VREFINT COMP_CSR_COMPxINSEL_1 /*!< 3/4 VREFINT connected to comparator inverting input */
+#define COMP_INVERTINGINPUT_1_4VREFINT (0x00000000U) /*!< 1U/4 VREFINT connected to comparator inverting input */
+#define COMP_INVERTINGINPUT_1_2VREFINT COMP_CSR_COMPxINSEL_0 /*!< 1U/2 VREFINT connected to comparator inverting input */
+#define COMP_INVERTINGINPUT_3_4VREFINT COMP_CSR_COMPxINSEL_1 /*!< 3U/4 VREFINT connected to comparator inverting input */
#define COMP_INVERTINGINPUT_VREFINT (COMP_CSR_COMPxINSEL_1|COMP_CSR_COMPxINSEL_0) /*!< VREFINT connected to comparator inverting input */
#define COMP_INVERTINGINPUT_DAC1_CH1 COMP_CSR_COMPxINSEL_2 /*!< DAC1_CH1_OUT (PA4) connected to comparator inverting input */
#define COMP_INVERTINGINPUT_DAC1_CH2 (COMP_CSR_COMPxINSEL_2|COMP_CSR_COMPxINSEL_0) /*!< DAC1_CH2_OUT (PA5) connected to comparator inverting input */
@@ -86,9 +86,9 @@
/** @defgroup COMPEx_InvertingInput COMP Extended InvertingInput (STM32F301x8/STM32F302x8/STM32F318xx Product devices)
* @{
*/
-#define COMP_INVERTINGINPUT_1_4VREFINT ((uint32_t)0x00000000) /*!< 1/4 VREFINT connected to comparator inverting input */
-#define COMP_INVERTINGINPUT_1_2VREFINT COMP_CSR_COMPxINSEL_0 /*!< 1/2 VREFINT connected to comparator inverting input */
-#define COMP_INVERTINGINPUT_3_4VREFINT COMP_CSR_COMPxINSEL_1 /*!< 3/4 VREFINT connected to comparator inverting input */
+#define COMP_INVERTINGINPUT_1_4VREFINT (0x00000000U) /*!< 1U/4 VREFINT connected to comparator inverting input */
+#define COMP_INVERTINGINPUT_1_2VREFINT COMP_CSR_COMPxINSEL_0 /*!< 1U/2 VREFINT connected to comparator inverting input */
+#define COMP_INVERTINGINPUT_3_4VREFINT COMP_CSR_COMPxINSEL_1 /*!< 3U/4 VREFINT connected to comparator inverting input */
#define COMP_INVERTINGINPUT_VREFINT (COMP_CSR_COMPxINSEL_1|COMP_CSR_COMPxINSEL_0) /*!< VREFINT connected to comparator inverting input */
#define COMP_INVERTINGINPUT_DAC1_CH1 COMP_CSR_COMPxINSEL_2 /*!< DAC1_CH1_OUT (PA4) connected to comparator inverting input */
#define COMP_INVERTINGINPUT_IO1 (COMP_CSR_COMPxINSEL_2|COMP_CSR_COMPxINSEL_1) /*!< IO1 (PA2 for COMP2, PB2 for COMP4, PB15 for COMP6)
@@ -106,9 +106,9 @@
/* connected to a GPIO. */
/* It must be chosen among the 2 literals COMP_INVERTINGINPUT_IOx */
/* depending on comparator instance COMPx. */
-#define COMP_INVERTINGINPUT_1_4VREFINT ((uint32_t)0x00000000) /*!< 1/4 VREFINT connected to comparator inverting input */
-#define COMP_INVERTINGINPUT_1_2VREFINT COMP_CSR_COMPxINSEL_0 /*!< 1/2 VREFINT connected to comparator inverting input */
-#define COMP_INVERTINGINPUT_3_4VREFINT COMP_CSR_COMPxINSEL_1 /*!< 3/4 VREFINT connected to comparator inverting input */
+#define COMP_INVERTINGINPUT_1_4VREFINT (0x00000000U) /*!< 1U/4 VREFINT connected to comparator inverting input */
+#define COMP_INVERTINGINPUT_1_2VREFINT COMP_CSR_COMPxINSEL_0 /*!< 1U/2 VREFINT connected to comparator inverting input */
+#define COMP_INVERTINGINPUT_3_4VREFINT COMP_CSR_COMPxINSEL_1 /*!< 3U/4 VREFINT connected to comparator inverting input */
#define COMP_INVERTINGINPUT_VREFINT (COMP_CSR_COMPxINSEL_1|COMP_CSR_COMPxINSEL_0) /*!< VREFINT connected to comparator inverting input */
#define COMP_INVERTINGINPUT_DAC1_CH1 COMP_CSR_COMPxINSEL_2 /*!< DAC1_CH1_OUT (PA4) connected to comparator inverting input */
#define COMP_INVERTINGINPUT_DAC1_CH2 (COMP_CSR_COMPxINSEL_2|COMP_CSR_COMPxINSEL_0) /*!< DAC1_CH2_OUT (PA5) connected to comparator inverting input */
@@ -128,9 +128,9 @@
/** @defgroup COMPEx_InvertingInput COMP Extended InvertingInput (STM32F373xC/STM32F378xx Product devices)
* @{
*/
-#define COMP_INVERTINGINPUT_1_4VREFINT ((uint32_t)0x00000000) /*!< 1/4 VREFINT connected to comparator inverting input */
-#define COMP_INVERTINGINPUT_1_2VREFINT ((uint32_t)COMP_CSR_COMPxINSEL_0) /*!< 1/2 VREFINT connected to comparator inverting input */
-#define COMP_INVERTINGINPUT_3_4VREFINT ((uint32_t)COMP_CSR_COMPxINSEL_1) /*!< 3/4 VREFINT connected to comparator inverting input */
+#define COMP_INVERTINGINPUT_1_4VREFINT (0x00000000U) /*!< 1U/4 VREFINT connected to comparator inverting input */
+#define COMP_INVERTINGINPUT_1_2VREFINT ((uint32_t)COMP_CSR_COMPxINSEL_0) /*!< 1U/2 VREFINT connected to comparator inverting input */
+#define COMP_INVERTINGINPUT_3_4VREFINT ((uint32_t)COMP_CSR_COMPxINSEL_1) /*!< 3U/4 VREFINT connected to comparator inverting input */
#define COMP_INVERTINGINPUT_VREFINT ((uint32_t)(COMP_CSR_COMPxINSEL_1|COMP_CSR_COMPxINSEL_0)) /*!< VREFINT connected to comparator inverting input */
#define COMP_INVERTINGINPUT_DAC1_CH1 ((uint32_t)COMP_CSR_COMPxINSEL_2) /*!< DAC1_CH1_OUT (PA4) connected to comparator inverting input */
#define COMP_INVERTINGINPUT_DAC1_CH2 ((uint32_t)(COMP_CSR_COMPxINSEL_2|COMP_CSR_COMPxINSEL_0)) /*!< DAC1_CH2_OUT (PA5) connected to comparator inverting input */
@@ -150,7 +150,7 @@
/** @defgroup COMPEx_NonInvertingInput COMP Extended NonInvertingInput (STM32F302xC/STM32F303xC/STM32F358xx Product devices)
* @{
*/
-#define COMP_NONINVERTINGINPUT_IO1 ((uint32_t)0x00000000) /*!< IO1 (PA1 for COMP1, PA7 for COMP2, PB14 for COMP3,
+#define COMP_NONINVERTINGINPUT_IO1 (0x00000000U) /*!< IO1 (PA1 for COMP1, PA7 for COMP2, PB14 for COMP3,
PB0 for COMP4, PD12 for COMP5, PD11 for COMP6,
PA0 for COMP7) connected to comparator non inverting input */
#define COMP_NONINVERTINGINPUT_IO2 COMP_CSR_COMPxNONINSEL /*!< IO2 (PA3 for COMP2, PD14 for COMP3, PE7 for COMP4, PB13 for COMP5,
@@ -163,7 +163,7 @@
/** @defgroup COMPEx_NonInvertingInput COMP Extended NonInvertingInput (STM32F301x8/STM32F302x8/STM32F318xx Product devices)
* @{
*/
-#define COMP_NONINVERTINGINPUT_IO1 ((uint32_t)0x00000000) /*!< IO1 (PA7 for COMP2, PB0 for COMP4, PB11 for COMP6)
+#define COMP_NONINVERTINGINPUT_IO1 (0x00000000U) /*!< IO1 (PA7 for COMP2, PB0 for COMP4, PB11 for COMP6)
connected to comparator non inverting input */
#define COMP_NONINVERTINGINPUT_DAC1SWITCHCLOSED COMP2_CSR_COMP2INPDAC /*!< DAC ouput connected to comparator COMP2 non inverting input */
/**
@@ -173,7 +173,7 @@
/** @defgroup COMPEx_NonInvertingInput COMP Extended NonInvertingInput (STM32F373xC/STM32F378xx Product devices)
* @{
*/
-#define COMP_NONINVERTINGINPUT_IO1 ((uint32_t)0x00000000) /*!< IO1 (PA1 for COMP1, PA3 for COMP2)
+#define COMP_NONINVERTINGINPUT_IO1 (0x00000000U) /*!< IO1 (PA1 for COMP1, PA3 for COMP2)
connected to comparator non inverting input */
#define COMP_NONINVERTINGINPUT_DAC1SWITCHCLOSED COMP_CSR_COMP1SW1 /*!< DAC ouput connected to comparator COMP1 non inverting input */
/**
@@ -183,7 +183,7 @@
/** @defgroup COMPEx_NonInvertingInput COMP Extended NonInvertingInput (STM32F302xE/STM32F303xE/STM32F398xx Product devices)
* @{
*/
-#define COMP_NONINVERTINGINPUT_IO1 ((uint32_t)0x00000000) /*!< IO1 (PA1 for COMP1, PA7 for COMP2, PB14 for COMP3,
+#define COMP_NONINVERTINGINPUT_IO1 (0x00000000U) /*!< IO1 (PA1 for COMP1, PA7 for COMP2, PB14 for COMP3,
PB0 for COMP4, PD12 for COMP5, PD11 for COMP6,
PA0 for COMP7) connected to comparator non inverting input */
#define COMP_NONINVERTINGINPUT_DAC1SWITCHCLOSED COMP1_CSR_COMP1SW1 /*!< DAC ouput connected to comparator COMP1 non inverting input */
@@ -194,7 +194,7 @@
/** @defgroup COMPEx_NonInvertingInput COMP Extended NonInvertingInput (Other Product devices)
* @{
*/
-#define COMP_NONINVERTINGINPUT_IO1 ((uint32_t)0x00000000) /*!< IO1 (PA7 for COMP2, PB0 for COMP4, PB11 for COMP6)
+#define COMP_NONINVERTINGINPUT_IO1 (0x00000000U) /*!< IO1 (PA7 for COMP2, PB0 for COMP4, PB11 for COMP6)
connected to comparator non inverting input */
/**
* @}
@@ -209,23 +209,23 @@
* @{
*/
/* Output Redirection values common to all comparators COMP2, COMP4 and COMP6 */
-#define COMP_OUTPUT_NONE ((uint32_t)0x0000002A) /*!< COMP2, COMP4 or COMP6 output isn't connected to other peripherals */
-#define COMP_OUTPUT_TIM1BKIN ((uint32_t)0x0000042A) /*!< COMP2, COMP4 or COMP6 output connected to TIM1 Break Input (BKIN) */
-#define COMP_OUTPUT_TIM1BKIN2_BRK2 ((uint32_t)0x0000082A) /*!< COMP2, COMP4 or COMP6 output connected to TIM1 Break Input 2 (BRK2) */
-#define COMP_OUTPUT_TIM1BKIN2 ((uint32_t)0x0000142A) /*!< COMP2, COMP4 or COMP6 output connected to TIM1 Break Input 2 (BKIN2) */
+#define COMP_OUTPUT_NONE (0x0000002AU) /*!< COMP2, COMP4 or COMP6 output isn't connected to other peripherals */
+#define COMP_OUTPUT_TIM1BKIN (0x0000042AU) /*!< COMP2, COMP4 or COMP6 output connected to TIM1 Break Input (BKIN) */
+#define COMP_OUTPUT_TIM1BKIN2_BRK2 (0x0000082AU) /*!< COMP2, COMP4 or COMP6 output connected to TIM1 Break Input 2 (BRK2) */
+#define COMP_OUTPUT_TIM1BKIN2 (0x0000142AU) /*!< COMP2, COMP4 or COMP6 output connected to TIM1 Break Input 2 (BKIN2) */
/* Output Redirection specific to COMP2 */
-#define COMP_OUTPUT_TIM1OCREFCLR ((uint32_t)0x00001802) /*!< COMP2 output connected to TIM1 OCREF Clear */
-#define COMP_OUTPUT_TIM1IC1 ((uint32_t)0x00001C02) /*!< COMP2 output connected to TIM1 Input Capture 1 */
-#define COMP_OUTPUT_TIM2IC4 ((uint32_t)0x00002002) /*!< COMP2 output connected to TIM2 Input Capture 4 */
-#define COMP_OUTPUT_TIM2OCREFCLR ((uint32_t)0x00002402) /*!< COMP2 output connected to TIM2 OCREF Clear */
+#define COMP_OUTPUT_TIM1OCREFCLR (0x00001802U) /*!< COMP2 output connected to TIM1 OCREF Clear */
+#define COMP_OUTPUT_TIM1IC1 (0x00001C02U) /*!< COMP2 output connected to TIM1 Input Capture 1U */
+#define COMP_OUTPUT_TIM2IC4 (0x00002002U) /*!< COMP2 output connected to TIM2 Input Capture 4U */
+#define COMP_OUTPUT_TIM2OCREFCLR (0x00002402U) /*!< COMP2 output connected to TIM2 OCREF Clear */
/* Output Redirection specific to COMP4 */
-#define COMP_OUTPUT_TIM15IC2 ((uint32_t)0x00002008) /*!< COMP4 output connected to TIM15 Input Capture 2 */
-#define COMP_OUTPUT_TIM15OCREFCLR ((uint32_t)0x00002808) /*!< COMP4 output connected to TIM15 OCREF Clear */
+#define COMP_OUTPUT_TIM15IC2 (0x00002008U) /*!< COMP4 output connected to TIM15 Input Capture 2U */
+#define COMP_OUTPUT_TIM15OCREFCLR (0x00002808U) /*!< COMP4 output connected to TIM15 OCREF Clear */
/* Output Redirection specific to COMP6 */
-#define COMP_OUTPUT_TIM2IC2 ((uint32_t)0x00001820) /*!< COMP6 output connected to TIM2 Input Capture 2 */
-#define COMP_OUTPUT_COMP6_TIM2OCREFCLR ((uint32_t)0x00002020) /*!< COMP6 output connected to TIM2 OCREF Clear */
-#define COMP_OUTPUT_TIM16OCREFCLR ((uint32_t)0x00002420) /*!< COMP6 output connected to TIM16 OCREF Clear */
-#define COMP_OUTPUT_TIM16IC1 ((uint32_t)0x00002820) /*!< COMP6 output connected to TIM16 Input Capture 1 */
+#define COMP_OUTPUT_TIM2IC2 (0x00001820U) /*!< COMP6 output connected to TIM2 Input Capture 2U */
+#define COMP_OUTPUT_COMP6_TIM2OCREFCLR (0x00002020U) /*!< COMP6 output connected to TIM2 OCREF Clear */
+#define COMP_OUTPUT_TIM16OCREFCLR (0x00002420U) /*!< COMP6 output connected to TIM16 OCREF Clear */
+#define COMP_OUTPUT_TIM16IC1 (0x00002820U) /*!< COMP6 output connected to TIM16 Input Capture 1U */
/**
* @}
*/
@@ -237,26 +237,26 @@
* @{
*/
/* Output Redirection values common to all comparators COMP2, COMP4 and COMP6 */
-#define COMP_OUTPUT_NONE ((uint32_t)0x0000002A) /*!< COMP2, COMP4 or COMP6 output isn't connected to other peripherals */
-#define COMP_OUTPUT_TIM1BKIN ((uint32_t)0x0000042A) /*!< COMP2, COMP4 or COMP6 output connected to TIM1 Break Input (BKIN) */
-#define COMP_OUTPUT_TIM1BKIN2 ((uint32_t)0x0000082A) /*!< COMP2, COMP4 or COMP6 output connected to TIM1 Break Input 2 (BKIN2) */
+#define COMP_OUTPUT_NONE (0x0000002AU) /*!< COMP2, COMP4 or COMP6 output isn't connected to other peripherals */
+#define COMP_OUTPUT_TIM1BKIN (0x0000042AU) /*!< COMP2, COMP4 or COMP6 output connected to TIM1 Break Input (BKIN) */
+#define COMP_OUTPUT_TIM1BKIN2 (0x0000082AU) /*!< COMP2, COMP4 or COMP6 output connected to TIM1 Break Input 2 (BKIN2) */
/* Output Redirection common to COMP2 and COMP4 */
-#define COMP_OUTPUT_TIM3OCREFCLR ((uint32_t)0x00002C0A) /*!< COMP2 or COMP4 output connected to TIM3 OCREF Clear */
+#define COMP_OUTPUT_TIM3OCREFCLR (0x00002C0AU) /*!< COMP2 or COMP4 output connected to TIM3 OCREF Clear */
/* Output Redirection specific to COMP2 */
-#define COMP_OUTPUT_TIM1OCREFCLR ((uint32_t)0x00001802) /*!< COMP2 output connected to TIM1 OCREF Clear */
-#define COMP_OUTPUT_TIM1IC1 ((uint32_t)0x00001C02) /*!< COMP2 output connected to TIM1 Input Capture 1 */
-#define COMP_OUTPUT_TIM2IC4 ((uint32_t)0x00002002) /*!< COMP2 output connected to TIM2 Input Capture 4 */
-#define COMP_OUTPUT_TIM2OCREFCLR ((uint32_t)0x00002402) /*!< COMP2 output connected to TIM2 OCREF Clear */
-#define COMP_OUTPUT_TIM3IC1 ((uint32_t)0x00002802) /*!< COMP2 output connected to TIM3 Input Capture 1 */
+#define COMP_OUTPUT_TIM1OCREFCLR (0x00001802U) /*!< COMP2 output connected to TIM1 OCREF Clear */
+#define COMP_OUTPUT_TIM1IC1 (0x00001C02U) /*!< COMP2 output connected to TIM1 Input Capture 1U */
+#define COMP_OUTPUT_TIM2IC4 (0x00002002U) /*!< COMP2 output connected to TIM2 Input Capture 4U */
+#define COMP_OUTPUT_TIM2OCREFCLR (0x00002402U) /*!< COMP2 output connected to TIM2 OCREF Clear */
+#define COMP_OUTPUT_TIM3IC1 (0x00002802U) /*!< COMP2 output connected to TIM3 Input Capture 1U */
/* Output Redirection specific to COMP4 */
-#define COMP_OUTPUT_TIM3IC3 ((uint32_t)0x00001808) /*!< COMP4 output connected to TIM3 Input Capture 3 */
-#define COMP_OUTPUT_TIM15IC2 ((uint32_t)0x00002008) /*!< COMP4 output connected to TIM15 Input Capture 2 */
-#define COMP_OUTPUT_TIM15OCREFCLR ((uint32_t)0x00002808) /*!< COMP4 output connected to TIM15 OCREF Clear */
+#define COMP_OUTPUT_TIM3IC3 (0x00001808U) /*!< COMP4 output connected to TIM3 Input Capture 3U */
+#define COMP_OUTPUT_TIM15IC2 (0x00002008U) /*!< COMP4 output connected to TIM15 Input Capture 2U */
+#define COMP_OUTPUT_TIM15OCREFCLR (0x00002808U) /*!< COMP4 output connected to TIM15 OCREF Clear */
/* Output Redirection specific to COMP6 */
-#define COMP_OUTPUT_TIM2IC2 ((uint32_t)0x00001820) /*!< COMP6 output connected to TIM2 Input Capture 2 */
-#define COMP_OUTPUT_COMP6_TIM2OCREFCLR ((uint32_t)0x00002020) /*!< COMP6 output connected to TIM2 OCREF Clear */
-#define COMP_OUTPUT_TIM16OCREFCLR ((uint32_t)0x00002420) /*!< COMP6 output connected to TIM16 OCREF Clear */
-#define COMP_OUTPUT_TIM16IC1 ((uint32_t)0x00002820) /*!< COMP6 output connected to TIM16 Input Capture 1 */
+#define COMP_OUTPUT_TIM2IC2 (0x00001820U) /*!< COMP6 output connected to TIM2 Input Capture 2U */
+#define COMP_OUTPUT_COMP6_TIM2OCREFCLR (0x00002020U) /*!< COMP6 output connected to TIM2 OCREF Clear */
+#define COMP_OUTPUT_TIM16OCREFCLR (0x00002420U) /*!< COMP6 output connected to TIM16 OCREF Clear */
+#define COMP_OUTPUT_TIM16IC1 (0x00002820U) /*!< COMP6 output connected to TIM16 Input Capture 1U */
/**
* @}
*/
@@ -268,29 +268,29 @@
* @{
*/
/* Output Redirection values common to all comparators COMP1, COMP2, COMP4, COMP6 */
-#define COMP_OUTPUT_NONE ((uint32_t)0x0000002B) /*!< COMP1, COMP2, COMP4 or COMP6 output isn't connected to other peripherals */
-#define COMP_OUTPUT_TIM1BKIN ((uint32_t)0x0000042B) /*!< COMP1, COMP2, COMP4 or COMP6 output connected to TIM1 Break Input (BKIN) */
-#define COMP_OUTPUT_TIM1BKIN2_BRK2 ((uint32_t)0x0000082B) /*!< COMP1, COMP2, COMP4 or COMP6 output connected to TIM1 Break Input 2 (BRK2) */
-#define COMP_OUTPUT_TIM1BKIN2 ((uint32_t)0x0000142B) /*!< COMP1, COMP2, COMP4 or COMP6 output connected to TIM1 Break Input 2 (BKIN2) */
+#define COMP_OUTPUT_NONE (0x0000002BU) /*!< COMP1, COMP2, COMP4 or COMP6 output isn't connected to other peripherals */
+#define COMP_OUTPUT_TIM1BKIN (0x0000042BU) /*!< COMP1, COMP2, COMP4 or COMP6 output connected to TIM1 Break Input (BKIN) */
+#define COMP_OUTPUT_TIM1BKIN2_BRK2 (0x0000082BU) /*!< COMP1, COMP2, COMP4 or COMP6 output connected to TIM1 Break Input 2 (BRK2) */
+#define COMP_OUTPUT_TIM1BKIN2 (0x0000142BU) /*!< COMP1, COMP2, COMP4 or COMP6 output connected to TIM1 Break Input 2 (BKIN2) */
/* Output Redirection common to COMP1 and COMP2 */
-#define COMP_OUTPUT_TIM1OCREFCLR ((uint32_t)0x00001803) /*!< COMP1 or COMP2 output connected to TIM1 OCREF Clear */
-#define COMP_OUTPUT_TIM1IC1 ((uint32_t)0x00001C03) /*!< COMP1 or COMP2 output connected to TIM1 Input Capture 1 */
-#define COMP_OUTPUT_TIM2IC4 ((uint32_t)0x00002003) /*!< COMP1 or COMP2 output connected to TIM2 Input Capture 4 */
-#define COMP_OUTPUT_TIM2OCREFCLR ((uint32_t)0x00002403) /*!< COMP1 or COMP2 output connected to TIM2 OCREF Clear */
-#define COMP_OUTPUT_TIM3IC1 ((uint32_t)0x00002803) /*!< COMP1 or COMP2 output connected to TIM3 Input Capture 1 */
+#define COMP_OUTPUT_TIM1OCREFCLR (0x00001803U) /*!< COMP1 or COMP2 output connected to TIM1 OCREF Clear */
+#define COMP_OUTPUT_TIM1IC1 (0x00001C03U) /*!< COMP1 or COMP2 output connected to TIM1 Input Capture 1U */
+#define COMP_OUTPUT_TIM2IC4 (0x00002003U) /*!< COMP1 or COMP2 output connected to TIM2 Input Capture 4U */
+#define COMP_OUTPUT_TIM2OCREFCLR (0x00002403U) /*!< COMP1 or COMP2 output connected to TIM2 OCREF Clear */
+#define COMP_OUTPUT_TIM3IC1 (0x00002803U) /*!< COMP1 or COMP2 output connected to TIM3 Input Capture 1U */
/* Output Redirection common to COMP1,COMP2 and COMP4 */
-#define COMP_OUTPUT_TIM3OCREFCLR ((uint32_t)0x00002C0B) /*!< COMP1, COMP2 or COMP4 output connected to TIM3 OCREF Clear */
+#define COMP_OUTPUT_TIM3OCREFCLR (0x00002C0BU) /*!< COMP1, COMP2 or COMP4 output connected to TIM3 OCREF Clear */
/* Output Redirection specific to COMP4 */
-#define COMP_OUTPUT_TIM3IC3 ((uint32_t)0x00001808) /*!< COMP4 output connected to TIM3 Input Capture 3 */
-#define COMP_OUTPUT_TIM15IC2 ((uint32_t)0x00002008) /*!< COMP4 output connected to TIM15 Input Capture 2 */
-#define COMP_OUTPUT_TIM4IC2 ((uint32_t)0x00002408) /*!< COMP4 output connected to TIM4 Input Capture 2 */
-#define COMP_OUTPUT_TIM15OCREFCLR ((uint32_t)0x00002808) /*!< COMP4 output connected to TIM15 OCREF Clear */
+#define COMP_OUTPUT_TIM3IC3 (0x00001808U) /*!< COMP4 output connected to TIM3 Input Capture 3U */
+#define COMP_OUTPUT_TIM15IC2 (0x00002008U) /*!< COMP4 output connected to TIM15 Input Capture 2U */
+#define COMP_OUTPUT_TIM4IC2 (0x00002408U) /*!< COMP4 output connected to TIM4 Input Capture 2U */
+#define COMP_OUTPUT_TIM15OCREFCLR (0x00002808U) /*!< COMP4 output connected to TIM15 OCREF Clear */
/* Output Redirection specific to COMP6 */
-#define COMP_OUTPUT_TIM2IC2 ((uint32_t)0x00001820) /*!< COMP6 output connected to TIM2 Input Capture 2 */
-#define COMP_OUTPUT_COMP6_TIM2OCREFCLR ((uint32_t)0x00002020) /*!< COMP6 output connected to TIM2 OCREF Clear */
-#define COMP_OUTPUT_TIM16OCREFCLR ((uint32_t)0x00002420) /*!< COMP6 output connected to TIM16 OCREF Clear */
-#define COMP_OUTPUT_TIM16IC1 ((uint32_t)0x00002820) /*!< COMP6 output connected to TIM16 Input Capture 1 */
-#define COMP_OUTPUT_TIM4IC4 ((uint32_t)0x00002C20) /*!< COMP6 output connected to TIM4 Input Capture 4 */
+#define COMP_OUTPUT_TIM2IC2 (0x00001820U) /*!< COMP6 output connected to TIM2 Input Capture 2U */
+#define COMP_OUTPUT_COMP6_TIM2OCREFCLR (0x00002020U) /*!< COMP6 output connected to TIM2 OCREF Clear */
+#define COMP_OUTPUT_TIM16OCREFCLR (0x00002420U) /*!< COMP6 output connected to TIM16 OCREF Clear */
+#define COMP_OUTPUT_TIM16IC1 (0x00002820U) /*!< COMP6 output connected to TIM16 Input Capture 1U */
+#define COMP_OUTPUT_TIM4IC4 (0x00002C20U) /*!< COMP6 output connected to TIM4 Input Capture 4U */
/**
* @}
*/
@@ -302,50 +302,50 @@
* @{
*/
/* Output Redirection values common to all comparators COMP1...COMP7 */
-#define COMP_OUTPUT_NONE ((uint32_t)0x0000007F) /*!< COMP1, COMP2... or COMP7 output isn't connected to other peripherals */
-#define COMP_OUTPUT_TIM1BKIN ((uint32_t)0x0000047F) /*!< COMP1, COMP2... or COMP7 output connected to TIM1 Break Input (BKIN) */
-#define COMP_OUTPUT_TIM1BKIN2 ((uint32_t)0x0000087F) /*!< COMP1, COMP2... or COMP7 output connected to TIM1 Break Input 2 (BKIN2) */
-#define COMP_OUTPUT_TIM8BKIN ((uint32_t)0x00000C7F) /*!< COMP1, COMP2... or COMP7 output connected to TIM8 Break Input (BKIN) */
-#define COMP_OUTPUT_TIM8BKIN2 ((uint32_t)0x0000107F) /*!< COMP1, COMP2... or COMP7 output connected to TIM8 Break Input 2 (BKIN2) */
-#define COMP_OUTPUT_TIM1BKIN2_TIM8BKIN2 ((uint32_t)0x0000147F) /*!< COMP1, COMP2... or COMP7 output connected to TIM1 Break Input 2 and TIM8 Break Input 2 */
+#define COMP_OUTPUT_NONE (0x0000007FU) /*!< COMP1, COMP2... or COMP7 output isn't connected to other peripherals */
+#define COMP_OUTPUT_TIM1BKIN (0x0000047FU) /*!< COMP1, COMP2... or COMP7 output connected to TIM1 Break Input (BKIN) */
+#define COMP_OUTPUT_TIM1BKIN2 (0x0000087FU) /*!< COMP1, COMP2... or COMP7 output connected to TIM1 Break Input 2 (BKIN2) */
+#define COMP_OUTPUT_TIM8BKIN (0x00000C7FU) /*!< COMP1, COMP2... or COMP7 output connected to TIM8 Break Input (BKIN) */
+#define COMP_OUTPUT_TIM8BKIN2 (0x0000107FU) /*!< COMP1, COMP2... or COMP7 output connected to TIM8 Break Input 2 (BKIN2) */
+#define COMP_OUTPUT_TIM1BKIN2_TIM8BKIN2 (0x0000147FU) /*!< COMP1, COMP2... or COMP7 output connected to TIM1 Break Input 2 and TIM8 Break Input 2U */
/* Output Redirection common to COMP1, COMP2, COMP3 and COMP7 */
-#define COMP_OUTPUT_TIM1OCREFCLR ((uint32_t)0x00001847) /*!< COMP1, COMP2, COMP3 or COMP7 output connected to TIM1 OCREF Clear */
+#define COMP_OUTPUT_TIM1OCREFCLR (0x00001847U) /*!< COMP1, COMP2, COMP3 or COMP7 output connected to TIM1 OCREF Clear */
/* Output Redirection common to COMP1, COMP2 and COMP3 */
-#define COMP_OUTPUT_TIM2OCREFCLR ((uint32_t)0x00002407) /*!< COMP1, COMP2 or COMP3 output connected to TIM2 OCREF Clear */
+#define COMP_OUTPUT_TIM2OCREFCLR (0x00002407U) /*!< COMP1, COMP2 or COMP3 output connected to TIM2 OCREF Clear */
/* Output Redirection common to COMP1, COMP2, COMP4 and COMP5 */
-#define COMP_OUTPUT_TIM3OCREFCLR ((uint32_t)0x00002C1B) /*!< COMP1, COMP2, COMP4 or COMP5 output connected to TIM3 OCREF Clear */
+#define COMP_OUTPUT_TIM3OCREFCLR (0x00002C1BU) /*!< COMP1, COMP2, COMP4 or COMP5 output connected to TIM3 OCREF Clear */
/* Output Redirection common to COMP4, COMP5, COMP6 and COMP7 */
-#define COMP_OUTPUT_TIM8OCREFCLR ((uint32_t)0x00001C78) /*!< COMP4, COMP5, COMP6 or COMP7 output connected to TIM8 OCREF Clear */
+#define COMP_OUTPUT_TIM8OCREFCLR (0x00001C78U) /*!< COMP4, COMP5, COMP6 or COMP7 output connected to TIM8 OCREF Clear */
/* Output Redirection common to COMP1 and COMP2 */
-#define COMP_OUTPUT_TIM1IC1 ((uint32_t)0x00001C03) /*!< COMP1 or COMP2 output connected to TIM1 Input Capture 1 */
-#define COMP_OUTPUT_TIM2IC4 ((uint32_t)0x00002003) /*!< COMP1 or COMP2 output connected to TIM2 Input Capture 4 */
-#define COMP_OUTPUT_TIM3IC1 ((uint32_t)0x00002803) /*!< COMP1 or COMP2 output connected to TIM3 Input Capture 1 */
+#define COMP_OUTPUT_TIM1IC1 (0x00001C03U) /*!< COMP1 or COMP2 output connected to TIM1 Input Capture 1U */
+#define COMP_OUTPUT_TIM2IC4 (0x00002003U) /*!< COMP1 or COMP2 output connected to TIM2 Input Capture 4U */
+#define COMP_OUTPUT_TIM3IC1 (0x00002803U) /*!< COMP1 or COMP2 output connected to TIM3 Input Capture 1U */
/* Output Redirection specific to COMP3 */
-#define COMP_OUTPUT_TIM4IC1 ((uint32_t)0x00001C04) /*!< COMP3 output connected to TIM4 Input Capture 1 */
-#define COMP_OUTPUT_TIM3IC2 ((uint32_t)0x00002004) /*!< COMP3 output connected to TIM3 Input Capture 2 */
-#define COMP_OUTPUT_TIM15IC1 ((uint32_t)0x00002804) /*!< COMP3 output connected to TIM15 Input Capture 1 */
-#define COMP_OUTPUT_TIM15BKIN ((uint32_t)0x00002C04) /*!< COMP3 output connected to TIM15 Break Input (BKIN) */
+#define COMP_OUTPUT_TIM4IC1 (0x00001C04U) /*!< COMP3 output connected to TIM4 Input Capture 1U */
+#define COMP_OUTPUT_TIM3IC2 (0x00002004U) /*!< COMP3 output connected to TIM3 Input Capture 2U */
+#define COMP_OUTPUT_TIM15IC1 (0x00002804U) /*!< COMP3 output connected to TIM15 Input Capture 1U */
+#define COMP_OUTPUT_TIM15BKIN (0x00002C04U) /*!< COMP3 output connected to TIM15 Break Input (BKIN) */
/* Output Redirection specific to COMP4 */
-#define COMP_OUTPUT_TIM3IC3 ((uint32_t)0x00001808) /*!< COMP4 output connected to TIM3 Input Capture 3 */
-#define COMP_OUTPUT_TIM15IC2 ((uint32_t)0x00002008) /*!< COMP4 output connected to TIM15 Input Capture 2 */
-#define COMP_OUTPUT_TIM4IC2 ((uint32_t)0x00002408) /*!< COMP4 output connected to TIM4 Input Capture 2 */
-#define COMP_OUTPUT_TIM15OCREFCLR ((uint32_t)0x00002808) /*!< COMP4 output connected to TIM15 OCREF Clear */
+#define COMP_OUTPUT_TIM3IC3 (0x00001808U) /*!< COMP4 output connected to TIM3 Input Capture 3U */
+#define COMP_OUTPUT_TIM15IC2 (0x00002008U) /*!< COMP4 output connected to TIM15 Input Capture 2U */
+#define COMP_OUTPUT_TIM4IC2 (0x00002408U) /*!< COMP4 output connected to TIM4 Input Capture 2U */
+#define COMP_OUTPUT_TIM15OCREFCLR (0x00002808U) /*!< COMP4 output connected to TIM15 OCREF Clear */
/* Output Redirection specific to COMP5 */
-#define COMP_OUTPUT_TIM2IC1 ((uint32_t)0x00001810) /*!< COMP5 output connected to TIM2 Input Capture 1 */
-#define COMP_OUTPUT_TIM17IC1 ((uint32_t)0x00002010) /*!< COMP5 output connected to TIM17 Input Capture 1 */
-#define COMP_OUTPUT_TIM4IC3 ((uint32_t)0x00002410) /*!< COMP5 output connected to TIM4 Input Capture 3 */
-#define COMP_OUTPUT_TIM16BKIN ((uint32_t)0x00002810) /*!< COMP5 output connected to TIM16 Break Input (BKIN) */
+#define COMP_OUTPUT_TIM2IC1 (0x00001810U) /*!< COMP5 output connected to TIM2 Input Capture 1U */
+#define COMP_OUTPUT_TIM17IC1 (0x00002010U) /*!< COMP5 output connected to TIM17 Input Capture 1U */
+#define COMP_OUTPUT_TIM4IC3 (0x00002410U) /*!< COMP5 output connected to TIM4 Input Capture 3U */
+#define COMP_OUTPUT_TIM16BKIN (0x00002810U) /*!< COMP5 output connected to TIM16 Break Input (BKIN) */
/* Output Redirection specific to COMP6 */
-#define COMP_OUTPUT_TIM2IC2 ((uint32_t)0x00001820) /*!< COMP6 output connected to TIM2 Input Capture 2 */
-#define COMP_OUTPUT_COMP6_TIM2OCREFCLR ((uint32_t)0x00002020) /*!< COMP6 output connected to TIM2 OCREF Clear */
-#define COMP_OUTPUT_TIM16OCREFCLR ((uint32_t)0x00002420) /*!< COMP6 output connected to TIM16 OCREF Clear */
-#define COMP_OUTPUT_TIM16IC1 ((uint32_t)0x00002820) /*!< COMP6 output connected to TIM16 Input Capture 1 */
-#define COMP_OUTPUT_TIM4IC4 ((uint32_t)0x00002C20) /*!< COMP6 output connected to TIM4 Input Capture 4 */
+#define COMP_OUTPUT_TIM2IC2 (0x00001820U) /*!< COMP6 output connected to TIM2 Input Capture 2U */
+#define COMP_OUTPUT_COMP6_TIM2OCREFCLR (0x00002020U) /*!< COMP6 output connected to TIM2 OCREF Clear */
+#define COMP_OUTPUT_TIM16OCREFCLR (0x00002420U) /*!< COMP6 output connected to TIM16 OCREF Clear */
+#define COMP_OUTPUT_TIM16IC1 (0x00002820U) /*!< COMP6 output connected to TIM16 Input Capture 1U */
+#define COMP_OUTPUT_TIM4IC4 (0x00002C20U) /*!< COMP6 output connected to TIM4 Input Capture 4U */
/* Output Redirection specific to COMP7 */
-#define COMP_OUTPUT_TIM2IC3 ((uint32_t)0x00002040) /*!< COMP7 output connected to TIM2 Input Capture 3 */
-#define COMP_OUTPUT_TIM1IC2 ((uint32_t)0x00002440) /*!< COMP7 output connected to TIM1 Input Capture 2 */
-#define COMP_OUTPUT_TIM17OCREFCLR ((uint32_t)0x00002840) /*!< COMP7 output connected to TIM17 OCREF Clear */
-#define COMP_OUTPUT_TIM17BKIN ((uint32_t)0x00002C40) /*!< COMP7 output connected to TIM17 Break Input (BKIN) */
+#define COMP_OUTPUT_TIM2IC3 (0x00002040U) /*!< COMP7 output connected to TIM2 Input Capture 3U */
+#define COMP_OUTPUT_TIM1IC2 (0x00002440U) /*!< COMP7 output connected to TIM1 Input Capture 2U */
+#define COMP_OUTPUT_TIM17OCREFCLR (0x00002840U) /*!< COMP7 output connected to TIM17 OCREF Clear */
+#define COMP_OUTPUT_TIM17BKIN (0x00002C40U) /*!< COMP7 output connected to TIM17 Break Input (BKIN) */
/**
* @}
*/
@@ -357,55 +357,55 @@
* @{
*/
/* Output Redirection values common to all comparators COMP1...COMP7 */
-#define COMP_OUTPUT_NONE ((uint32_t)0x0000007F) /*!< COMP1, COMP2... or COMP7 output isn't connected to other peripherals */
-#define COMP_OUTPUT_TIM1BKIN ((uint32_t)0x0000047F) /*!< COMP1, COMP2... or COMP7 output connected to TIM1 Break Input (BKIN) */
-#define COMP_OUTPUT_TIM1BKIN2 ((uint32_t)0x0000087F) /*!< COMP1, COMP2... or COMP7 output connected to TIM1 Break Input 2 (BKIN2) */
-#define COMP_OUTPUT_TIM8BKIN ((uint32_t)0x00000C7F) /*!< COMP1, COMP2... or COMP7 output connected to TIM8 Break Input (BKIN) */
-#define COMP_OUTPUT_TIM8BKIN2 ((uint32_t)0x0000107F) /*!< COMP1, COMP2... or COMP7 output connected to TIM8 Break Input 2 (BKIN2) */
-#define COMP_OUTPUT_TIM1BKIN2_TIM8BKIN2 ((uint32_t)0x0000147F) /*!< COMP1, COMP2... or COMP7 output connected to TIM1 Break Input 2 and TIM8 Break Input 2 */
-#define COMP_OUTPUT_TIM20BKIN ((uint32_t)0x0000307F) /*!< COMP1, COMP2... or COMP7 output connected to TIM20 Break Input (BKIN) */
-#define COMP_OUTPUT_TIM20BKIN2 ((uint32_t)0x0000347F) /*!< COMP1, COMP2... or COMP7 output connected to TIM20 Break Input 2 (BKIN2) */
-#define COMP_OUTPUT_TIM1BKIN2_TIM8BKIN2_TIM20BKIN2 ((uint32_t)0x0000387F) /*!< COMP1, COMP2... or COMP7 output connected to TIM1 Break Input 2, TIM8 Break Input 2 and TIM20 Break Input 2 */
+#define COMP_OUTPUT_NONE (0x0000007FU) /*!< COMP1, COMP2... or COMP7 output isn't connected to other peripherals */
+#define COMP_OUTPUT_TIM1BKIN (0x0000047FU) /*!< COMP1, COMP2... or COMP7 output connected to TIM1 Break Input (BKIN) */
+#define COMP_OUTPUT_TIM1BKIN2 (0x0000087FU) /*!< COMP1, COMP2... or COMP7 output connected to TIM1 Break Input 2 (BKIN2) */
+#define COMP_OUTPUT_TIM8BKIN (0x00000C7FU) /*!< COMP1, COMP2... or COMP7 output connected to TIM8 Break Input (BKIN) */
+#define COMP_OUTPUT_TIM8BKIN2 (0x0000107FU) /*!< COMP1, COMP2... or COMP7 output connected to TIM8 Break Input 2 (BKIN2) */
+#define COMP_OUTPUT_TIM1BKIN2_TIM8BKIN2 (0x0000147FU) /*!< COMP1, COMP2... or COMP7 output connected to TIM1 Break Input 2 and TIM8 Break Input 2U */
+#define COMP_OUTPUT_TIM20BKIN (0x0000307FU) /*!< COMP1, COMP2... or COMP7 output connected to TIM20 Break Input (BKIN) */
+#define COMP_OUTPUT_TIM20BKIN2 (0x0000347FU) /*!< COMP1, COMP2... or COMP7 output connected to TIM20 Break Input 2 (BKIN2) */
+#define COMP_OUTPUT_TIM1BKIN2_TIM8BKIN2_TIM20BKIN2 (0x0000387FU) /*!< COMP1, COMP2... or COMP7 output connected to TIM1 Break Input 2U, TIM8 Break Input 2 and TIM20 Break Input 2 */
/* Output Redirection common to COMP1, COMP2, COMP3 and COMP7 */
-#define COMP_OUTPUT_TIM1OCREFCLR ((uint32_t)0x00001847) /*!< COMP1, COMP2, COMP3 or COMP7 output connected to TIM1 OCREF Clear */
+#define COMP_OUTPUT_TIM1OCREFCLR (0x00001847U) /*!< COMP1, COMP2, COMP3 or COMP7 output connected to TIM1 OCREF Clear */
/* Output Redirection common to COMP1, COMP2 and COMP3 */
-#define COMP_OUTPUT_TIM2OCREFCLR ((uint32_t)0x00002407) /*!< COMP1, COMP2 or COMP3 output connected to TIM2 OCREF Clear */
+#define COMP_OUTPUT_TIM2OCREFCLR (0x00002407U) /*!< COMP1, COMP2 or COMP3 output connected to TIM2 OCREF Clear */
/* Output Redirection common to COMP1, COMP2, COMP4 and COMP5 */
-#define COMP_OUTPUT_TIM3OCREFCLR ((uint32_t)0x00002C1B) /*!< COMP1, COMP2, COMP4 or COMP5 output connected to TIM3 OCREF Clear */
+#define COMP_OUTPUT_TIM3OCREFCLR (0x00002C1BU) /*!< COMP1, COMP2, COMP4 or COMP5 output connected to TIM3 OCREF Clear */
/* Output Redirection common to COMP4, COMP5, COMP6 and COMP7 */
-#define COMP_OUTPUT_TIM8OCREFCLR ((uint32_t)0x00001C78) /*!< COMP4, COMP5, COMP6 or COMP7 output connected to TIM8 OCREF Clear */
+#define COMP_OUTPUT_TIM8OCREFCLR (0x00001C78U) /*!< COMP4, COMP5, COMP6 or COMP7 output connected to TIM8 OCREF Clear */
/* Output Redirection common to COMP1 and COMP2 */
-#define COMP_OUTPUT_TIM1IC1 ((uint32_t)0x00001C03) /*!< COMP1 or COMP2 output connected to TIM1 Input Capture 1 */
-#define COMP_OUTPUT_TIM2IC4 ((uint32_t)0x00002003) /*!< COMP1 or COMP2 output connected to TIM2 Input Capture 4 */
-#define COMP_OUTPUT_TIM3IC1 ((uint32_t)0x00002803) /*!< COMP1 or COMP2 output connected to TIM3 Input Capture 1 */
+#define COMP_OUTPUT_TIM1IC1 (0x00001C03U) /*!< COMP1 or COMP2 output connected to TIM1 Input Capture 1U */
+#define COMP_OUTPUT_TIM2IC4 (0x00002003U) /*!< COMP1 or COMP2 output connected to TIM2 Input Capture 4U */
+#define COMP_OUTPUT_TIM3IC1 (0x00002803U) /*!< COMP1 or COMP2 output connected to TIM3 Input Capture 1U */
/* Output Redirection specific to COMP2 */
-#define COMP_OUTPUT_TIM20OCREFCLR ((uint32_t)0x00003C04) /*!< COMP2 output connected to TIM20 OCREF Clear */
+#define COMP_OUTPUT_TIM20OCREFCLR (0x00003C04U) /*!< COMP2 output connected to TIM20 OCREF Clear */
/* Output Redirection specific to COMP3 */
-#define COMP_OUTPUT_TIM4IC1 ((uint32_t)0x00001C04) /*!< COMP3 output connected to TIM4 Input Capture 1 */
-#define COMP_OUTPUT_TIM3IC2 ((uint32_t)0x00002004) /*!< COMP3 output connected to TIM3 Input Capture 2 */
-#define COMP_OUTPUT_TIM15IC1 ((uint32_t)0x00002804) /*!< COMP3 output connected to TIM15 Input Capture 1 */
-#define COMP_OUTPUT_TIM15BKIN ((uint32_t)0x00002C04) /*!< COMP3 output connected to TIM15 Break Input (BKIN) */
+#define COMP_OUTPUT_TIM4IC1 (0x00001C04U) /*!< COMP3 output connected to TIM4 Input Capture 1U */
+#define COMP_OUTPUT_TIM3IC2 (0x00002004U) /*!< COMP3 output connected to TIM3 Input Capture 2U */
+#define COMP_OUTPUT_TIM15IC1 (0x00002804U) /*!< COMP3 output connected to TIM15 Input Capture 1U */
+#define COMP_OUTPUT_TIM15BKIN (0x00002C04U) /*!< COMP3 output connected to TIM15 Break Input (BKIN) */
/* Output Redirection specific to COMP4 */
-#define COMP_OUTPUT_TIM3IC3 ((uint32_t)0x00001808) /*!< COMP4 output connected to TIM3 Input Capture 3 */
-#define COMP_OUTPUT_TIM15IC2 ((uint32_t)0x00002008) /*!< COMP4 output connected to TIM15 Input Capture 2 */
-#define COMP_OUTPUT_TIM4IC2 ((uint32_t)0x00002408) /*!< COMP4 output connected to TIM4 Input Capture 2 */
-#define COMP_OUTPUT_TIM15OCREFCLR ((uint32_t)0x00002808) /*!< COMP4 output connected to TIM15 OCREF Clear */
+#define COMP_OUTPUT_TIM3IC3 (0x00001808U) /*!< COMP4 output connected to TIM3 Input Capture 3U */
+#define COMP_OUTPUT_TIM15IC2 (0x00002008U) /*!< COMP4 output connected to TIM15 Input Capture 2U */
+#define COMP_OUTPUT_TIM4IC2 (0x00002408U) /*!< COMP4 output connected to TIM4 Input Capture 2U */
+#define COMP_OUTPUT_TIM15OCREFCLR (0x00002808U) /*!< COMP4 output connected to TIM15 OCREF Clear */
/* Output Redirection specific to COMP5 */
-#define COMP_OUTPUT_TIM2IC1 ((uint32_t)0x00001810) /*!< COMP5 output connected to TIM2 Input Capture 1 */
-#define COMP_OUTPUT_TIM17IC1 ((uint32_t)0x00002010) /*!< COMP5 output connected to TIM17 Input Capture 1 */
-#define COMP_OUTPUT_TIM4IC3 ((uint32_t)0x00002410) /*!< COMP5 output connected to TIM4 Input Capture 3 */
-#define COMP_OUTPUT_TIM16BKIN ((uint32_t)0x00002810) /*!< COMP5 output connected to TIM16 Break Input (BKIN) */
+#define COMP_OUTPUT_TIM2IC1 (0x00001810U) /*!< COMP5 output connected to TIM2 Input Capture 1U */
+#define COMP_OUTPUT_TIM17IC1 (0x00002010U) /*!< COMP5 output connected to TIM17 Input Capture 1U */
+#define COMP_OUTPUT_TIM4IC3 (0x00002410U) /*!< COMP5 output connected to TIM4 Input Capture 3U */
+#define COMP_OUTPUT_TIM16BKIN (0x00002810U) /*!< COMP5 output connected to TIM16 Break Input (BKIN) */
/* Output Redirection specific to COMP6 */
-#define COMP_OUTPUT_TIM2IC2 ((uint32_t)0x00001820) /*!< COMP6 output connected to TIM2 Input Capture 2 */
-#define COMP_OUTPUT_COMP6_TIM2OCREFCLR ((uint32_t)0x00002020) /*!< COMP6 output connected to TIM2 OCREF Clear */
-#define COMP_OUTPUT_TIM16OCREFCLR ((uint32_t)0x00002420) /*!< COMP6 output connected to TIM16 OCREF Clear */
-#define COMP_OUTPUT_TIM16IC1 ((uint32_t)0x00002820) /*!< COMP6 output connected to TIM16 Input Capture 1 */
-#define COMP_OUTPUT_TIM4IC4 ((uint32_t)0x00002C20) /*!< COMP6 output connected to TIM4 Input Capture 4 */
+#define COMP_OUTPUT_TIM2IC2 (0x00001820U) /*!< COMP6 output connected to TIM2 Input Capture 2U */
+#define COMP_OUTPUT_COMP6_TIM2OCREFCLR (0x00002020U) /*!< COMP6 output connected to TIM2 OCREF Clear */
+#define COMP_OUTPUT_TIM16OCREFCLR (0x00002420U) /*!< COMP6 output connected to TIM16 OCREF Clear */
+#define COMP_OUTPUT_TIM16IC1 (0x00002820U) /*!< COMP6 output connected to TIM16 Input Capture 1U */
+#define COMP_OUTPUT_TIM4IC4 (0x00002C20U) /*!< COMP6 output connected to TIM4 Input Capture 4U */
/* Output Redirection specific to COMP7 */
-#define COMP_OUTPUT_TIM2IC3 ((uint32_t)0x00002040) /*!< COMP7 output connected to TIM2 Input Capture 3 */
-#define COMP_OUTPUT_TIM1IC2 ((uint32_t)0x00002440) /*!< COMP7 output connected to TIM1 Input Capture 2 */
-#define COMP_OUTPUT_TIM17OCREFCLR ((uint32_t)0x00002840) /*!< COMP7 output connected to TIM17 OCREF Clear */
-#define COMP_OUTPUT_TIM17BKIN ((uint32_t)0x00002C40) /*!< COMP7 output connected to TIM17 Break Input (BKIN) */
+#define COMP_OUTPUT_TIM2IC3 (0x00002040U) /*!< COMP7 output connected to TIM2 Input Capture 3U */
+#define COMP_OUTPUT_TIM1IC2 (0x00002440U) /*!< COMP7 output connected to TIM1 Input Capture 2U */
+#define COMP_OUTPUT_TIM17OCREFCLR (0x00002840U) /*!< COMP7 output connected to TIM17 OCREF Clear */
+#define COMP_OUTPUT_TIM17BKIN (0x00002C40U) /*!< COMP7 output connected to TIM17 Break Input (BKIN) */
/**
* @}
*/
@@ -417,21 +417,21 @@
* @{
*/
/* Output Redirection values common to all comparators COMP1 and COMP2 */
-#define COMP_OUTPUT_NONE ((uint32_t)0x0003) /*!< COMP1 or COMP2 output isn't connected to other peripherals */
-#define COMP_OUTPUT_TIM2IC4 ((uint32_t)0x0403) /*!< COMP1 or COMP2 output connected to TIM2 Input Capture 4 */
-#define COMP_OUTPUT_TIM2OCREFCLR ((uint32_t)0x0503) /*!< COMP1 or COMP2 output connected to TIM2 OCREF Clear */
+#define COMP_OUTPUT_NONE (0x0003U) /*!< COMP1 or COMP2 output isn't connected to other peripherals */
+#define COMP_OUTPUT_TIM2IC4 (0x0403U) /*!< COMP1 or COMP2 output connected to TIM2 Input Capture 4U */
+#define COMP_OUTPUT_TIM2OCREFCLR (0x0503U) /*!< COMP1 or COMP2 output connected to TIM2 OCREF Clear */
/* Output Redirection specific to COMP1 */
-#define COMP_OUTPUT_TIM15BKIN ((uint32_t)0x0101) /*!< COMP1 output connected to TIM15 Break Input */
-#define COMP_OUTPUT_COMP1_TIM3IC1 ((uint32_t)0x0201) /*!< COMP1 output connected to TIM3 Input Capture 1 */
-#define COMP_OUTPUT_COMP1_TIM3OCREFCLR ((uint32_t)0x0301) /*!< COMP1 output connected to TIM3 OCREF Clear */
-#define COMP_OUTPUT_TIM5IC4 ((uint32_t)0x0601) /*!< COMP1 output connected to TIM5 Input Capture 4 */
-#define COMP_OUTPUT_TIM5OCREFCLR ((uint32_t)0x0701) /*!< COMP1 output connected to TIM5 OCREF Clear */
+#define COMP_OUTPUT_TIM15BKIN (0x0101U) /*!< COMP1 output connected to TIM15 Break Input */
+#define COMP_OUTPUT_COMP1_TIM3IC1 (0x0201U) /*!< COMP1 output connected to TIM3 Input Capture 1U */
+#define COMP_OUTPUT_COMP1_TIM3OCREFCLR (0x0301U) /*!< COMP1 output connected to TIM3 OCREF Clear */
+#define COMP_OUTPUT_TIM5IC4 (0x0601U) /*!< COMP1 output connected to TIM5 Input Capture 4U */
+#define COMP_OUTPUT_TIM5OCREFCLR (0x0701U) /*!< COMP1 output connected to TIM5 OCREF Clear */
/* Output Redirection specific to COMP2 */
-#define COMP_OUTPUT_TIM16BKIN ((uint32_t)0x0102) /*!< COMP2 output connected to TIM16 Break Input */
-#define COMP_OUTPUT_TIM4IC1 ((uint32_t)0x0202) /*!< COMP2 output connected to TIM4 Input Capture 1 */
-#define COMP_OUTPUT_TIM4OCREFCLR ((uint32_t)0x0302) /*!< COMP2 output connected to TIM4 OCREF Clear */
-#define COMP_OUTPUT_COMP2_TIM3IC1 ((uint32_t)0x0602) /*!< COMP2 output connected to TIM3 Input Capture 1 */
-#define COMP_OUTPUT_COMP2_TIM3OCREFCLR ((uint32_t)0x0702) /*!< COMP2 output connected to TIM3 OCREF Clear */
+#define COMP_OUTPUT_TIM16BKIN (0x0102U) /*!< COMP2 output connected to TIM16 Break Input */
+#define COMP_OUTPUT_TIM4IC1 (0x0202U) /*!< COMP2 output connected to TIM4 Input Capture 1U */
+#define COMP_OUTPUT_TIM4OCREFCLR (0x0302U) /*!< COMP2 output connected to TIM4 OCREF Clear */
+#define COMP_OUTPUT_COMP2_TIM3IC1 (0x0602U) /*!< COMP2 output connected to TIM3 Input Capture 1U */
+#define COMP_OUTPUT_COMP2_TIM3OCREFCLR (0x0702U) /*!< COMP2 output connected to TIM3 OCREF Clear */
/**
* @}
*/
@@ -441,9 +441,9 @@
/** @defgroup COMPEx_WindowMode COMP Extended WindowMode (STM32F302xC/STM32F303xC/STM32F358xx Product devices)
* @{
*/
-#define COMP_WINDOWMODE_DISABLE ((uint32_t)0x00000000) /*!< Window mode disabled */
-#define COMP_WINDOWMODE_ENABLE COMP_CSR_COMPxWNDWEN /*!< Window mode enabled: non inverting input of comparator X (x=2,4,6)
- is connected to the non inverting input of comparator X-1 */
+#define COMP_WINDOWMODE_DISABLE (0x00000000U) /*!< Window mode disabled */
+#define COMP_WINDOWMODE_ENABLE COMP_CSR_COMPxWNDWEN /*!< Window mode enabled: non inverting input of comparator X (x=2U,4,6U)
+ is connected to the non inverting input of comparator X-1U */
/**
* @}
*/
@@ -451,9 +451,9 @@
/** @defgroup COMPEx_WindowMode COMP Extended WindowMode (STM32F302xE/STM32F303xE/STM32F398xx Product devices)
* @{
*/
-#define COMP_WINDOWMODE_DISABLE ((uint32_t)0x00000000) /*!< Window mode disabled */
-#define COMP_WINDOWMODE_ENABLE COMP_CSR_COMPxWNDWEN /*!< Window mode enabled: non inverting input of comparator X (x=2,4,6)
- is connected to the non inverting input of comparator X-1 */
+#define COMP_WINDOWMODE_DISABLE (0x00000000U) /*!< Window mode disabled */
+#define COMP_WINDOWMODE_ENABLE COMP_CSR_COMPxWNDWEN /*!< Window mode enabled: non inverting input of comparator X (x=2U,4,6U)
+ is connected to the non inverting input of comparator X-1U */
/**
* @}
*/
@@ -461,7 +461,7 @@
/** @defgroup COMPEx_WindowMode COMP Extended WindowMode (STM32F373xC/STM32F378xx Product devices)
* @{
*/
-#define COMP_WINDOWMODE_DISABLE ((uint32_t)0x00000000) /*!< Window mode disabled */
+#define COMP_WINDOWMODE_DISABLE (0x00000000U) /*!< Window mode disabled */
#define COMP_WINDOWMODE_ENABLE ((uint32_t)COMP_CSR_COMPxWNDWEN) /*!< Window mode enabled: non inverting input of comparator 2
is connected to the non inverting input of comparator 1 (PA1) */
/**
@@ -471,7 +471,7 @@
/** @defgroup COMPEx_WindowMode COMP Extended WindowMode (Other Product devices)
* @{
*/
-#define COMP_WINDOWMODE_DISABLE ((uint32_t)0x00000000) /*!< Window mode disabled (not available) */
+#define COMP_WINDOWMODE_DISABLE (0x00000000U) /*!< Window mode disabled (not available) */
/**
* @}
*/
@@ -485,7 +485,7 @@
/* Please refer to the electrical characteristics in the device datasheet for
the power consumption values */
-#define COMP_MODE_HIGHSPEED ((uint32_t)0x00000000) /*!< High Speed */
+#define COMP_MODE_HIGHSPEED (0x00000000U) /*!< High Speed */
#define COMP_MODE_MEDIUMSPEED COMP_CSR_COMPxMODE_0 /*!< Medium Speed */
#define COMP_MODE_LOWPOWER COMP_CSR_COMPxMODE_1 /*!< Low power mode */
#define COMP_MODE_ULTRALOWPOWER COMP_CSR_COMPxMODE /*!< Ultra-low power mode */
@@ -502,14 +502,14 @@
#if defined(STM32F302xC) || defined(STM32F303xC) || defined(STM32F358xx) || \
defined(STM32F373xC) || defined(STM32F378xx)
-#define COMP_HYSTERESIS_NONE ((uint32_t)0x00000000) /*!< No hysteresis */
+#define COMP_HYSTERESIS_NONE (0x00000000U) /*!< No hysteresis */
#define COMP_HYSTERESIS_LOW COMP_CSR_COMPxHYST_0 /*!< Hysteresis level low */
#define COMP_HYSTERESIS_MEDIUM COMP_CSR_COMPxHYST_1 /*!< Hysteresis level medium */
#define COMP_HYSTERESIS_HIGH COMP_CSR_COMPxHYST /*!< Hysteresis level high */
#else
-#define COMP_HYSTERESIS_NONE ((uint32_t)0x00000000) /*!< No hysteresis */
+#define COMP_HYSTERESIS_NONE (0x00000000U) /*!< No hysteresis */
#endif /* STM32F302xC || STM32F303xC || STM32F358xx || */
/* STM32F373xC || STM32F378xx */
@@ -523,7 +523,7 @@
* @{
*/
/* No blanking source can be selected for all comparators */
-#define COMP_BLANKINGSRCE_NONE ((uint32_t)0x00000000) /*!< No blanking source */
+#define COMP_BLANKINGSRCE_NONE (0x00000000U) /*!< No blanking source */
/* Blanking source for COMP2 */
#define COMP_BLANKINGSRCE_TIM1OC5 COMP_CSR_COMPxBLANKING_0 /*!< TIM1 OC5 selected as blanking source for COMP2 */
#define COMP_BLANKINGSRCE_TIM2OC3 COMP_CSR_COMPxBLANKING_1 /*!< TIM2 OC3 selected as blanking source for COMP2 */
@@ -547,7 +547,7 @@
* @{
*/
/* No blanking source can be selected for all comparators */
-#define COMP_BLANKINGSRCE_NONE ((uint32_t)0x00000000) /*!< No blanking source */
+#define COMP_BLANKINGSRCE_NONE (0x00000000U) /*!< No blanking source */
/* Blanking source common for COMP1 and COMP2 */
#define COMP_BLANKINGSRCE_TIM1OC5 COMP_CSR_COMPxBLANKING_0 /*!< TIM1 OC5 selected as blanking source for COMP1 and COMP2 */
/* Blanking source common for COMP1 and COMP2 */
@@ -573,7 +573,7 @@
* @{
*/
/* No blanking source can be selected for all comparators */
-#define COMP_BLANKINGSRCE_NONE ((uint32_t)0x00000000) /*!< No blanking source */
+#define COMP_BLANKINGSRCE_NONE (0x00000000U) /*!< No blanking source */
/* Blanking source common for COMP1, COMP2, COMP3 and COMP7 */
#define COMP_BLANKINGSRCE_TIM1OC5 COMP_CSR_COMPxBLANKING_0 /*!< TIM1 OC5 selected as blanking source for COMP1, COMP2, COMP3 and COMP7 */
/* Blanking source common for COMP1 and COMP2 */
@@ -601,7 +601,7 @@
* @{
*/
/* No blanking source can be selected for all comparators */
-#define COMP_BLANKINGSRCE_NONE ((uint32_t)0x00000000) /*!< No blanking source */
+#define COMP_BLANKINGSRCE_NONE (0x00000000U) /*!< No blanking source */
/**
* @}
*/
@@ -645,7 +645,7 @@
regshift = COMP_CSR_COMP2_SHIFT; \
} \
SET_BIT(COMP->CSR, (uint32_t)COMP_CSR_COMPxEN << regshift); \
- } while(0)
+ } while(0U)
/**
* @brief Disable the specified comparator.
@@ -661,7 +661,7 @@
regshift = COMP_CSR_COMP2_SHIFT; \
} \
CLEAR_BIT(COMP->CSR, (uint32_t)COMP_CSR_COMPxEN << regshift); \
- } while(0)
+ } while(0U)
/**
* @brief Lock a comparator instance
@@ -677,7 +677,7 @@
regshift = COMP_CSR_COMP2_SHIFT; \
} \
SET_BIT(COMP->CSR, (uint32_t)COMP_CSR_COMPxLOCK << regshift); \
- } while(0)
+ } while(0U)
/** @brief Check whether the specified COMP flag is set or not.
* @param __HANDLE__ COMP Handle.
@@ -759,7 +759,7 @@
#define __HAL_COMP_COMP1_EXTI_ENABLE_RISING_FALLING_EDGE() do { \
__HAL_COMP_COMP1_EXTI_ENABLE_RISING_EDGE(); \
__HAL_COMP_COMP1_EXTI_ENABLE_FALLING_EDGE(); \
- } while(0)
+ } while(0U)
/**
* @brief Disable the COMP1 EXTI line rising & falling edge trigger.
@@ -768,7 +768,7 @@
#define __HAL_COMP_COMP1_EXTI_DISABLE_RISING_FALLING_EDGE() do { \
__HAL_COMP_COMP1_EXTI_DISABLE_RISING_EDGE(); \
__HAL_COMP_COMP1_EXTI_DISABLE_FALLING_EDGE(); \
- } while(0)
+ } while(0U)
/**
* @brief Enable the COMP1 EXTI line in interrupt mode.
@@ -847,7 +847,7 @@
#define __HAL_COMP_COMP2_EXTI_ENABLE_RISING_FALLING_EDGE() do { \
__HAL_COMP_COMP2_EXTI_ENABLE_RISING_EDGE(); \
__HAL_COMP_COMP2_EXTI_ENABLE_FALLING_EDGE(); \
- } while(0)
+ } while(0U)
/**
* @brief Disable the COMP2 EXTI line rising & falling edge trigger.
@@ -856,7 +856,7 @@
#define __HAL_COMP_COMP2_EXTI_DISABLE_RISING_FALLING_EDGE() do { \
__HAL_COMP_COMP2_EXTI_DISABLE_RISING_EDGE(); \
__HAL_COMP_COMP2_EXTI_DISABLE_FALLING_EDGE(); \
- } while(0)
+ } while(0U)
/**
* @brief Enable the COMP2 EXTI line in interrupt mode.
@@ -934,7 +934,7 @@
#define __HAL_COMP_COMP3_EXTI_ENABLE_RISING_FALLING_EDGE() do { \
__HAL_COMP_COMP3_EXTI_ENABLE_RISING_EDGE(); \
__HAL_COMP_COMP3_EXTI_ENABLE_FALLING_EDGE(); \
- } while(0)
+ } while(0U)
/**
* @brief Disable the COMP3 EXTI line rising & falling edge trigger.
@@ -943,7 +943,7 @@
#define __HAL_COMP_COMP3_EXTI_DISABLE_RISING_FALLING_EDGE() do { \
__HAL_COMP_COMP3_EXTI_DISABLE_RISING_EDGE(); \
__HAL_COMP_COMP3_EXTI_DISABLE_FALLING_EDGE(); \
- } while(0)
+ } while(0U)
/**
* @brief Enable the COMP3 EXTI line in interrupt mode.
@@ -1026,7 +1026,7 @@
#define __HAL_COMP_COMP4_EXTI_ENABLE_RISING_FALLING_EDGE() do { \
__HAL_COMP_COMP4_EXTI_ENABLE_RISING_EDGE(); \
__HAL_COMP_COMP4_EXTI_ENABLE_FALLING_EDGE(); \
- } while(0)
+ } while(0U)
/**
* @brief Disable the COMP4 EXTI line rising & falling edge trigger.
@@ -1035,7 +1035,7 @@
#define __HAL_COMP_COMP4_EXTI_DISABLE_RISING_FALLING_EDGE() do { \
__HAL_COMP_COMP4_EXTI_DISABLE_RISING_EDGE(); \
__HAL_COMP_COMP4_EXTI_DISABLE_FALLING_EDGE(); \
- } while(0)
+ } while(0U)
/**
* @brief Enable the COMP4 EXTI line in interrupt mode.
@@ -1118,7 +1118,7 @@
#define __HAL_COMP_COMP5_EXTI_ENABLE_RISING_FALLING_EDGE() do { \
__HAL_COMP_COMP5_EXTI_ENABLE_RISING_EDGE(); \
__HAL_COMP_COMP5_EXTI_ENABLE_FALLING_EDGE(); \
- } while(0)
+ } while(0U)
/**
* @brief Disable the COMP5 EXTI line rising & falling edge trigger.
@@ -1127,7 +1127,7 @@
#define __HAL_COMP_COMP5_EXTI_DISABLE_RISING_FALLING_EDGE() do { \
__HAL_COMP_COMP5_EXTI_DISABLE_RISING_EDGE(); \
__HAL_COMP_COMP5_EXTI_DISABLE_FALLING_EDGE(); \
- } while(0)
+ } while(0U)
/**
* @brief Enable the COMP5 EXTI line in interrupt mode.
@@ -1210,7 +1210,7 @@
#define __HAL_COMP_COMP6_EXTI_ENABLE_RISING_FALLING_EDGE() do { \
__HAL_COMP_COMP6_EXTI_ENABLE_RISING_EDGE(); \
__HAL_COMP_COMP6_EXTI_ENABLE_FALLING_EDGE(); \
- } while(0)
+ } while(0U)
/**
* @brief Disable the COMP6 EXTI line rising & falling edge trigger.
@@ -1219,7 +1219,7 @@
#define __HAL_COMP_COMP6_EXTI_DISABLE_RISING_FALLING_EDGE() do { \
__HAL_COMP_COMP6_EXTI_DISABLE_RISING_EDGE(); \
__HAL_COMP_COMP6_EXTI_DISABLE_FALLING_EDGE(); \
- } while(0)
+ } while(0U)
/**
* @brief Enable the COMP6 EXTI line in interrupt mode.
@@ -1301,7 +1301,7 @@
#define __HAL_COMP_COMP7_EXTI_ENABLE_RISING_FALLING_EDGE() do { \
__HAL_COMP_COMP7_EXTI_ENABLE_RISING_EDGE(); \
__HAL_COMP_COMP7_EXTI_ENABLE_FALLING_EDGE(); \
- } while(0)
+ } while(0U)
/**
* @brief Disable the COMP7 EXTI line rising & falling edge trigger.
@@ -1310,7 +1310,7 @@
#define __HAL_COMP_COMP7_EXTI_DISABLE_RISING_FALLING_EDGE() do { \
__HAL_COMP_COMP7_EXTI_DISABLE_RISING_EDGE(); \
__HAL_COMP_COMP7_EXTI_DISABLE_FALLING_EDGE(); \
- } while(0)
+ } while(0U)
/**
* @brief Enable the COMP7 EXTI line in interrupt mode.
@@ -1431,30 +1431,30 @@
#define COMP_CSR_COMPxPOL_MASK COMP_CSR_COMPxPOL /*!< COMP_CSR_COMPxPOL Mask */
#if defined(STM32F373xC) || defined(STM32F378xx)
/* CSR register reset value */
-#define COMP_CSR_RESET_VALUE ((uint32_t)0x00000000)
-#define COMP_CSR_RESET_PARAMETERS_MASK ((uint32_t)0x00003FFF)
-#define COMP_CSR_UPDATE_PARAMETERS_MASK ((uint32_t)0x00003FFE)
+#define COMP_CSR_RESET_VALUE (0x00000000U)
+#define COMP_CSR_RESET_PARAMETERS_MASK (0x00003FFFU)
+#define COMP_CSR_UPDATE_PARAMETERS_MASK (0x00003FFEU)
/* CSR COMP1/COMP2 shift */
#define COMP_CSR_COMP1_SHIFT 0U
#define COMP_CSR_COMP2_SHIFT 16U
#else
/* CSR register reset value */
-#define COMP_CSR_RESET_VALUE ((uint32_t)0x00000000)
+#define COMP_CSR_RESET_VALUE (0x00000000U)
#endif /* STM32F373xC || STM32F378xx */
#if defined(STM32F301x8) || defined(STM32F302x8) || defined(STM32F318xx)
#define COMP_CSR_COMPxNONINSEL_MASK (COMP2_CSR_COMP2INPDAC) /*!< COMP_CSR_COMPxNONINSEL mask */
-#define COMP_CSR_COMPxWNDWEN_MASK ((uint32_t)0x00000000) /*!< Mask empty: feature not available */
-#define COMP_CSR_COMPxMODE_MASK ((uint32_t)0x00000000) /*!< Mask empty: feature not available */
-#define COMP_CSR_COMPxHYST_MASK ((uint32_t)0x00000000) /*!< Mask empty: feature not available */
+#define COMP_CSR_COMPxWNDWEN_MASK (0x00000000U) /*!< Mask empty: feature not available */
+#define COMP_CSR_COMPxMODE_MASK (0x00000000U) /*!< Mask empty: feature not available */
+#define COMP_CSR_COMPxHYST_MASK (0x00000000U) /*!< Mask empty: feature not available */
#define COMP_CSR_COMPxBLANKING_MASK COMP_CSR_COMPxBLANKING /*!< COMP_CSR_COMPxBLANKING mask */
#endif /* STM32F301x8 || STM32F302x8 || STM32F318xx */
#if defined(STM32F303x8) || defined(STM32F334x8) || defined(STM32F328xx)
-#define COMP_CSR_COMPxNONINSEL_MASK ((uint32_t)0x00000000) /*!< Mask empty: feature not available */
-#define COMP_CSR_COMPxWNDWEN_MASK ((uint32_t)0x00000000) /*!< Mask empty: feature not available */
-#define COMP_CSR_COMPxMODE_MASK ((uint32_t)0x00000000) /*!< Mask empty: feature not available */
-#define COMP_CSR_COMPxHYST_MASK ((uint32_t)0x00000000) /*!< Mask empty: feature not available */
+#define COMP_CSR_COMPxNONINSEL_MASK (0x00000000U) /*!< Mask empty: feature not available */
+#define COMP_CSR_COMPxWNDWEN_MASK (0x00000000U) /*!< Mask empty: feature not available */
+#define COMP_CSR_COMPxMODE_MASK (0x00000000U) /*!< Mask empty: feature not available */
+#define COMP_CSR_COMPxHYST_MASK (0x00000000U) /*!< Mask empty: feature not available */
#define COMP_CSR_COMPxBLANKING_MASK COMP_CSR_COMPxBLANKING /*!< COMP_CSR_COMPxBLANKING mask */
#endif /* STM32F303x8 || STM32F334x8 || STM32F328xx */
@@ -1468,9 +1468,9 @@
#if defined(STM32F302xE) || defined(STM32F303xE) || defined(STM32F398xx)
#define COMP_CSR_COMPxNONINSEL_MASK (COMP1_CSR_COMP1SW1) /*!< COMP_CSR_COMPxNONINSEL mask */
-#define COMP_CSR_COMPxWNDWEN_MASK COMP_CSR_COMPxWNDWEN /*!< COMP_CSR_COMPxWNDWEN mask */
-#define COMP_CSR_COMPxMODE_MASK ((uint32_t)0x00000000) /*!< Mask empty: feature not available */
-#define COMP_CSR_COMPxHYST_MASK ((uint32_t)0x00000000) /*!< Mask empty: feature not available */
+#define COMP_CSR_COMPxWNDWEN_MASK (0x00000000U) /*!< Mask empty: feature not available */
+#define COMP_CSR_COMPxMODE_MASK (0x00000000U) /*!< Mask empty: feature not available */
+#define COMP_CSR_COMPxHYST_MASK (0x00000000U) /*!< Mask empty: feature not available */
#define COMP_CSR_COMPxBLANKING_MASK COMP_CSR_COMPxBLANKING /*!< COMP_CSR_COMPxBLANKING mask */
#endif /* STM32F302xE || STM32F303xE || STM32F398xx */
@@ -1479,7 +1479,7 @@
#define COMP_CSR_COMPxWNDWEN_MASK COMP_CSR_COMPxWNDWEN /*!< COMP_CSR_COMPxWNDWEN mask */
#define COMP_CSR_COMPxMODE_MASK COMP_CSR_COMPxMODE /*!< COMP_CSR_COMPxMODE Mask */
#define COMP_CSR_COMPxHYST_MASK COMP_CSR_COMPxHYST /*!< COMP_CSR_COMPxHYST Mask */
-#define COMP_CSR_COMPxBLANKING_MASK ((uint32_t)0x00000000) /*!< Mask empty: feature not available */
+#define COMP_CSR_COMPxBLANKING_MASK (0x00000000U) /*!< Mask empty: feature not available */
#endif /* STM32F373xC || STM32F378xx */
/**
@@ -1592,7 +1592,7 @@
{ \
COMP->CSR |= COMP_CSR_WNDWEN; \
} \
- } while(0)
+ } while(0U)
/**
* @brief DeInit a comparator instance
@@ -1610,7 +1610,7 @@
MODIFY_REG(COMP->CSR, \
COMP_CSR_RESET_PARAMETERS_MASK << regshift, \
COMP_CSR_RESET_VALUE << regshift); \
- } while(0)
+ } while(0U)
/**
@@ -1703,7 +1703,7 @@
*/
#define COMP_INIT(__HANDLE__) \
do { \
- __IO uint32_t csrreg = 0; \
+ __IO uint32_t csrreg = 0U; \
\
csrreg = READ_REG((__HANDLE__)->Instance->CSR); \
MODIFY_REG(csrreg, COMP_CSR_COMPxINSEL_MASK, (__HANDLE__)->Init.InvertingInput); \
@@ -1715,7 +1715,7 @@
MODIFY_REG(csrreg, COMP_CSR_COMPxMODE_MASK, (__HANDLE__)->Init.Mode); \
MODIFY_REG(csrreg, COMP_CSR_COMPxWNDWEN_MASK, (__HANDLE__)->Init.WindowMode); \
WRITE_REG((__HANDLE__)->Instance->CSR, csrreg); \
- } while(0)
+ } while(0U)
/**
* @brief DeInit a comparator instance
@@ -1933,7 +1933,7 @@
((SOURCE) == COMP_BLANKINGSRCE_TIM15OC1) || \
((SOURCE) == COMP_BLANKINGSRCE_TIM15OC2))
-/* STM32F301x6/x8, STM32F302x6/x8, STM32F303x6/x8, STM32F334x4/6/8, STM32F318xx/STM32F328xx devices comparator instances blanking source values */
+/* STM32F301x6/x8, STM32F302x6/x8, STM32F303x6/x8, STM32F334x4/6U/8U, STM32F318xx/STM32F328xx devices comparator instances blanking source values */
#define IS_COMP_BLANKINGSRCE_INSTANCE(INSTANCE, BLANKINGSRCE) \
((((INSTANCE) == COMP2) && \
(((BLANKINGSRCE) == COMP_BLANKINGSRCE_NONE) || \
@@ -2032,7 +2032,7 @@
((SOURCE) == COMP_BLANKINGSRCE_TIM15OC1) || \
((SOURCE) == COMP_BLANKINGSRCE_TIM15OC2))
-/* STM32F301x6/x8, STM32F302x6/x8, STM32F303x6/x8, STM32F334x4/6/8, STM32F318xx/STM32F328xx devices comparator instances blanking source values */
+/* STM32F301x6/x8, STM32F302x6/x8, STM32F303x6/x8, STM32F334x4/6U/8U, STM32F318xx/STM32F328xx devices comparator instances blanking source values */
#define IS_COMP_BLANKINGSRCE_INSTANCE(INSTANCE, BLANKINGSRCE) \
((((INSTANCE) == COMP2) && \
(((BLANKINGSRCE) == COMP_BLANKINGSRCE_NONE) || \
